From: Richard Henderson <richard.henderson@linaro.org>
To: Weiwei Li <liweiwei@iscas.ac.cn>,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: palmer@dabbelt.com, alistair.francis@wdc.com,
bin.meng@windriver.com, dbarboza@ventanamicro.com,
zhiwei_liu@linux.alibaba.com, wangjunqiang@iscas.ac.cn,
lazyparser@gmail.com
Subject: Re: [PATCH 7/8] target/riscv: Fix format for comments
Date: Fri, 24 Mar 2023 11:12:43 -0700 [thread overview]
Message-ID: <e0b08cd8-b5c5-ee96-0424-20d1588a9531@linaro.org> (raw)
In-Reply-To: <20230324123809.107714-8-liweiwei@iscas.ac.cn>
On 3/24/23 05:38, Weiwei Li wrote:
> Fix formats for multi-lines comments.
> Add spaces around single line comments(after "/*" and before "*/").
>
> Signed-off-by: Weiwei Li<liweiwei@iscas.ac.cn>
> Signed-off-by: Junqiang Wang<wangjunqiang@iscas.ac.cn>
> ---
> target/riscv/arch_dump.c | 3 +-
> target/riscv/cpu.c | 2 +-
> target/riscv/cpu.h | 26 ++++----
> target/riscv/cpu_bits.h | 2 +-
> target/riscv/cpu_helper.c | 57 +++++++++++------
> target/riscv/csr.c | 6 +-
> target/riscv/insn_trans/trans_rvv.c.inc | 8 ++-
> target/riscv/pmp.c | 23 ++++---
> target/riscv/sbi_ecall_interface.h | 8 +--
> target/riscv/translate.c | 8 ++-
> target/riscv/vector_helper.c | 82 +++++++++++++++----------
> 11 files changed, 135 insertions(+), 90 deletions(-)
Acked-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2023-03-24 18:13 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-24 12:38 [PATCH 0/8] target/riscv: Simplification for RVH related check and code style fix Weiwei Li
2023-03-24 12:38 ` [PATCH 1/8] target/riscv: Remove redundant call to riscv_cpu_virt_enabled Weiwei Li
2023-03-24 18:04 ` Richard Henderson
2023-03-24 12:38 ` [PATCH 2/8] target/riscv: Remove redundant check on RVH Weiwei Li
2023-03-24 18:04 ` Richard Henderson
2023-03-24 12:38 ` [PATCH 3/8] target/riscv: Remove check on RVH for riscv_cpu_virt_enabled Weiwei Li
2023-03-24 18:05 ` Richard Henderson
2023-03-24 12:38 ` [PATCH 4/8] target/riscv: Remove check on RVH for riscv_cpu_set_virt_enabled Weiwei Li
2023-03-24 18:10 ` Richard Henderson
2023-03-24 12:38 ` [PATCH 5/8] target/riscv: Remove redundant parentheses Weiwei Li
2023-03-24 18:10 ` Richard Henderson
2023-03-24 12:38 ` [PATCH 6/8] target/riscv: Fix format for indentation Weiwei Li
2023-03-25 14:23 ` LIU Zhiwei
2023-03-26 12:38 ` liweiwei
2023-03-24 12:38 ` [PATCH 7/8] target/riscv: Fix format for comments Weiwei Li
2023-03-24 18:12 ` Richard Henderson [this message]
2023-03-24 12:38 ` [PATCH 8/8] target/riscv: Fix lines with over 80 characters Weiwei Li
2023-03-25 15:05 ` [PATCH 0/8] target/riscv: Simplification for RVH related check and code style fix LIU Zhiwei
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