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From: Arnd Bergmann <arnd@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>, Vineet Gupta <vgupta@kernel.org>,
	Russell King <linux@armlinux.org.uk>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Guo Ren <guoren@kernel.org>,
	Brian Cain <bcain@quicinc.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Michal Simek <monstr@monstr.eu>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Dinh Nguyen <dinguyen@kernel.org>,
	Stafford Horne <shorne@gmail.com>, Helge Deller <deller@gmx.de>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Christophe Leroy <christophe.leroy@csgroup.eu>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Rich Felker <dalias@libc.org>,
	John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>,
	"David S. Miller" <davem@davemloft.net>,
	Max Filippov <jcmvbkbc@gmail.com>, Christoph Hellwig <hch@lst.de>,
	Robin Murphy <robin.murphy@arm.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	linux-snps-arc@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org, linux-oxnas@groups.io,
	linux-csky@vger.kernel.org, linux-hexagon@vger.kernel.org,
	linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org,
	linux-openrisc@vger.kernel.org, linux-parisc@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org,
	linux-sh@vger.kernel.org, sparclinux@vger.kernel.org,
	linux-xtensa@linux-xtensa.org
Subject: [PATCH 02/21] xtensa: dma-mapping: use normal cache invalidation rules
Date: Mon, 27 Mar 2023 14:12:58 +0200	[thread overview]
Message-ID: <20230327121317.4081816-3-arnd@kernel.org> (raw)
In-Reply-To: <20230327121317.4081816-1-arnd@kernel.org>

From: Arnd Bergmann <arnd@arndb.de>

xtensa is one of the platforms that has both write-back and write-through
caches, and needs to account for both in its DMA mapping operations.

It does this through a set of operations that is different from any
architecture. This is not a problem by itself, but it makes it rather
hard to figure out whether this is correct or not, and to unify this
implementation with the others.

Change the semantics to the usual ones for non-speculating CPUs:

 - On DMA_TO_DEVICE, call __flush_dcache_range() to perform the
   writeback even on writethrough caches, where this is a nop.

 - On DMA_FROM_DEVICE, invalidate the mapping before the DMA rather
   than afterwards.

 - On DMA_BIDIRECTIONAL, combine the pre-writeback with the
   post-invalidate into a call to __flush_invalidate_dcache_range()
   that turns into a simple invalidate on writeback caches.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/xtensa/Kconfig                  |  1 -
 arch/xtensa/include/asm/cacheflush.h |  6 +++---
 arch/xtensa/kernel/pci-dma.c         | 29 +++++-----------------------
 3 files changed, 8 insertions(+), 28 deletions(-)

diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index bcb0c5d2abc2..b938bacbb9af 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -8,7 +8,6 @@ config XTENSA
 	select ARCH_HAS_DMA_PREP_COHERENT if MMU
 	select ARCH_HAS_GCOV_PROFILE_ALL
 	select ARCH_HAS_KCOV
-	select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
 	select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
 	select ARCH_HAS_DMA_SET_UNCACHED if MMU
 	select ARCH_HAS_STRNCPY_FROM_USER if !KASAN
diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h
index 7b4359312c25..2f645d25565a 100644
--- a/arch/xtensa/include/asm/cacheflush.h
+++ b/arch/xtensa/include/asm/cacheflush.h
@@ -61,9 +61,9 @@ static inline void __flush_dcache_page(unsigned long va)
 static inline void __flush_dcache_range(unsigned long va, unsigned long sz)
 {
 }
-# define __flush_invalidate_dcache_all()	__invalidate_dcache_all()
-# define __flush_invalidate_dcache_page(p)	__invalidate_dcache_page(p)
-# define __flush_invalidate_dcache_range(p,s)	__invalidate_dcache_range(p,s)
+# define __flush_invalidate_dcache_all		__invalidate_dcache_all
+# define __flush_invalidate_dcache_page		__invalidate_dcache_page
+# define __flush_invalidate_dcache_range	__invalidate_dcache_range
 #endif
 
 #if defined(CONFIG_MMU) && (DCACHE_WAY_SIZE > PAGE_SIZE)
diff --git a/arch/xtensa/kernel/pci-dma.c b/arch/xtensa/kernel/pci-dma.c
index 94955caa4488..ff3bf015eca4 100644
--- a/arch/xtensa/kernel/pci-dma.c
+++ b/arch/xtensa/kernel/pci-dma.c
@@ -43,38 +43,19 @@ static void do_cache_op(phys_addr_t paddr, size_t size,
 		}
 }
 
-void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
+void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
 		enum dma_data_direction dir)
 {
 	switch (dir) {
-	case DMA_BIDIRECTIONAL:
+	case DMA_TO_DEVICE:
+		do_cache_op(paddr, size, __flush_dcache_range);
+		break;
 	case DMA_FROM_DEVICE:
 		do_cache_op(paddr, size, __invalidate_dcache_range);
 		break;
-
-	case DMA_NONE:
-		BUG();
-		break;
-
-	default:
-		break;
-	}
-}
-
-void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
-		enum dma_data_direction dir)
-{
-	switch (dir) {
 	case DMA_BIDIRECTIONAL:
-	case DMA_TO_DEVICE:
-		if (XCHAL_DCACHE_IS_WRITEBACK)
-			do_cache_op(paddr, size, __flush_dcache_range);
+		do_cache_op(paddr, size, __flush_invalidate_dcache_range);
 		break;
-
-	case DMA_NONE:
-		BUG();
-		break;
-
 	default:
 		break;
 	}
-- 
2.39.2


WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>, Vineet Gupta <vgupta@kernel.org>,
	Russell King <linux@armlinux.org.uk>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Guo Ren <guoren@kernel.org>,
	Brian Cain <bcain@quicinc.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Michal Simek <monstr@monstr.eu>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Dinh Nguyen <dinguyen@kernel.org>,
	Stafford Horne <shorne@gmail.com>, Helge Deller <deller@gmx.de>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Christophe Leroy <christophe.leroy@csgroup.eu>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Rich Felker <dalias@libc.org>,
	John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>,
	"David S. Miller" <davem@davemloft.net>,
	Max Filippov <jcmvbkbc@gmail.com>, Christoph Hellwig <hch@lst.de>,
	Robin Murphy <robin.murphy@arm.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	linux-snps-arc@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org, linux-oxnas@groups.io,
	linux-csky@vger.kernel.org, linux-hexagon@vger.kernel.org,
	linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org,
	linux-openrisc@vger.kernel.org, linux-parisc@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org,
	linux-sh@vger.kernel.org, sparclinux@vger.kernel.org,
	linux-xtensa@linux-xtensa.org
Subject: [PATCH 02/21] xtensa: dma-mapping: use normal cache invalidation rules
Date: Mon, 27 Mar 2023 14:12:58 +0200	[thread overview]
Message-ID: <20230327121317.4081816-3-arnd@kernel.org> (raw)
In-Reply-To: <20230327121317.4081816-1-arnd@kernel.org>

From: Arnd Bergmann <arnd@arndb.de>

xtensa is one of the platforms that has both write-back and write-through
caches, and needs to account for both in its DMA mapping operations.

It does this through a set of operations that is different from any
architecture. This is not a problem by itself, but it makes it rather
hard to figure out whether this is correct or not, and to unify this
implementation with the others.

Change the semantics to the usual ones for non-speculating CPUs:

 - On DMA_TO_DEVICE, call __flush_dcache_range() to perform the
   writeback even on writethrough caches, where this is a nop.

 - On DMA_FROM_DEVICE, invalidate the mapping before the DMA rather
   than afterwards.

 - On DMA_BIDIRECTIONAL, combine the pre-writeback with the
   post-invalidate into a call to __flush_invalidate_dcache_range()
   that turns into a simple invalidate on writeback caches.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/xtensa/Kconfig                  |  1 -
 arch/xtensa/include/asm/cacheflush.h |  6 +++---
 arch/xtensa/kernel/pci-dma.c         | 29 +++++-----------------------
 3 files changed, 8 insertions(+), 28 deletions(-)

diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index bcb0c5d2abc2..b938bacbb9af 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -8,7 +8,6 @@ config XTENSA
 	select ARCH_HAS_DMA_PREP_COHERENT if MMU
 	select ARCH_HAS_GCOV_PROFILE_ALL
 	select ARCH_HAS_KCOV
-	select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
 	select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
 	select ARCH_HAS_DMA_SET_UNCACHED if MMU
 	select ARCH_HAS_STRNCPY_FROM_USER if !KASAN
diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h
index 7b4359312c25..2f645d25565a 100644
--- a/arch/xtensa/include/asm/cacheflush.h
+++ b/arch/xtensa/include/asm/cacheflush.h
@@ -61,9 +61,9 @@ static inline void __flush_dcache_page(unsigned long va)
 static inline void __flush_dcache_range(unsigned long va, unsigned long sz)
 {
 }
-# define __flush_invalidate_dcache_all()	__invalidate_dcache_all()
-# define __flush_invalidate_dcache_page(p)	__invalidate_dcache_page(p)
-# define __flush_invalidate_dcache_range(p,s)	__invalidate_dcache_range(p,s)
+# define __flush_invalidate_dcache_all		__invalidate_dcache_all
+# define __flush_invalidate_dcache_page		__invalidate_dcache_page
+# define __flush_invalidate_dcache_range	__invalidate_dcache_range
 #endif
 
 #if defined(CONFIG_MMU) && (DCACHE_WAY_SIZE > PAGE_SIZE)
diff --git a/arch/xtensa/kernel/pci-dma.c b/arch/xtensa/kernel/pci-dma.c
index 94955caa4488..ff3bf015eca4 100644
--- a/arch/xtensa/kernel/pci-dma.c
+++ b/arch/xtensa/kernel/pci-dma.c
@@ -43,38 +43,19 @@ static void do_cache_op(phys_addr_t paddr, size_t size,
 		}
 }
 
-void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
+void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
 		enum dma_data_direction dir)
 {
 	switch (dir) {
-	case DMA_BIDIRECTIONAL:
+	case DMA_TO_DEVICE:
+		do_cache_op(paddr, size, __flush_dcache_range);
+		break;
 	case DMA_FROM_DEVICE:
 		do_cache_op(paddr, size, __invalidate_dcache_range);
 		break;
-
-	case DMA_NONE:
-		BUG();
-		break;
-
-	default:
-		break;
-	}
-}
-
-void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
-		enum dma_data_direction dir)
-{
-	switch (dir) {
 	case DMA_BIDIRECTIONAL:
-	case DMA_TO_DEVICE:
-		if (XCHAL_DCACHE_IS_WRITEBACK)
-			do_cache_op(paddr, size, __flush_dcache_range);
+		do_cache_op(paddr, size, __flush_invalidate_dcache_range);
 		break;
-
-	case DMA_NONE:
-		BUG();
-		break;
-
 	default:
 		break;
 	}
-- 
2.39.2


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>, Vineet Gupta <vgupta@kernel.org>,
	Russell King <linux@armlinux.org.uk>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Guo Ren <guoren@kernel.org>,
	Brian Cain <bcain@quicinc.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Michal Simek <monstr@monstr.eu>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Dinh Nguyen <dinguyen@kernel.org>,
	Stafford Horne <shorne@gmail.com>, Helge Deller <deller@gmx.de>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Christophe Leroy <christophe.leroy@csgroup.eu>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Rich Felker <dalias@libc.org>,
	John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>,
	"David S. Miller" <davem@davemloft.net>,
	Max Filippov <jcmvbkbc@gmail.com>, Christoph Hellwig <hch@lst.de>,
	Robin Murphy <robin.murphy@arm.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	linux-snps-arc@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org, linux-oxnas@groups.io,
	linux-csky@vger.kernel.org, linux-hexagon@vger.kernel.org,
	linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org,
	linux-openrisc@vger.kernel.org, linux-parisc@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org,
	linux-sh@vger.kernel.org, sparclinux@vger.kernel.org,
	linux-xtensa@linux-xtensa.org
Subject: [PATCH 02/21] xtensa: dma-mapping: use normal cache invalidation rules
Date: Mon, 27 Mar 2023 14:12:58 +0200	[thread overview]
Message-ID: <20230327121317.4081816-3-arnd@kernel.org> (raw)
In-Reply-To: <20230327121317.4081816-1-arnd@kernel.org>

From: Arnd Bergmann <arnd@arndb.de>

xtensa is one of the platforms that has both write-back and write-through
caches, and needs to account for both in its DMA mapping operations.

It does this through a set of operations that is different from any
architecture. This is not a problem by itself, but it makes it rather
hard to figure out whether this is correct or not, and to unify this
implementation with the others.

Change the semantics to the usual ones for non-speculating CPUs:

 - On DMA_TO_DEVICE, call __flush_dcache_range() to perform the
   writeback even on writethrough caches, where this is a nop.

 - On DMA_FROM_DEVICE, invalidate the mapping before the DMA rather
   than afterwards.

 - On DMA_BIDIRECTIONAL, combine the pre-writeback with the
   post-invalidate into a call to __flush_invalidate_dcache_range()
   that turns into a simple invalidate on writeback caches.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/xtensa/Kconfig                  |  1 -
 arch/xtensa/include/asm/cacheflush.h |  6 +++---
 arch/xtensa/kernel/pci-dma.c         | 29 +++++-----------------------
 3 files changed, 8 insertions(+), 28 deletions(-)

diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index bcb0c5d2abc2..b938bacbb9af 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -8,7 +8,6 @@ config XTENSA
 	select ARCH_HAS_DMA_PREP_COHERENT if MMU
 	select ARCH_HAS_GCOV_PROFILE_ALL
 	select ARCH_HAS_KCOV
-	select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
 	select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
 	select ARCH_HAS_DMA_SET_UNCACHED if MMU
 	select ARCH_HAS_STRNCPY_FROM_USER if !KASAN
diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h
index 7b4359312c25..2f645d25565a 100644
--- a/arch/xtensa/include/asm/cacheflush.h
+++ b/arch/xtensa/include/asm/cacheflush.h
@@ -61,9 +61,9 @@ static inline void __flush_dcache_page(unsigned long va)
 static inline void __flush_dcache_range(unsigned long va, unsigned long sz)
 {
 }
-# define __flush_invalidate_dcache_all()	__invalidate_dcache_all()
-# define __flush_invalidate_dcache_page(p)	__invalidate_dcache_page(p)
-# define __flush_invalidate_dcache_range(p,s)	__invalidate_dcache_range(p,s)
+# define __flush_invalidate_dcache_all		__invalidate_dcache_all
+# define __flush_invalidate_dcache_page		__invalidate_dcache_page
+# define __flush_invalidate_dcache_range	__invalidate_dcache_range
 #endif
 
 #if defined(CONFIG_MMU) && (DCACHE_WAY_SIZE > PAGE_SIZE)
diff --git a/arch/xtensa/kernel/pci-dma.c b/arch/xtensa/kernel/pci-dma.c
index 94955caa4488..ff3bf015eca4 100644
--- a/arch/xtensa/kernel/pci-dma.c
+++ b/arch/xtensa/kernel/pci-dma.c
@@ -43,38 +43,19 @@ static void do_cache_op(phys_addr_t paddr, size_t size,
 		}
 }
 
-void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
+void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
 		enum dma_data_direction dir)
 {
 	switch (dir) {
-	case DMA_BIDIRECTIONAL:
+	case DMA_TO_DEVICE:
+		do_cache_op(paddr, size, __flush_dcache_range);
+		break;
 	case DMA_FROM_DEVICE:
 		do_cache_op(paddr, size, __invalidate_dcache_range);
 		break;
-
-	case DMA_NONE:
-		BUG();
-		break;
-
-	default:
-		break;
-	}
-}
-
-void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
-		enum dma_data_direction dir)
-{
-	switch (dir) {
 	case DMA_BIDIRECTIONAL:
-	case DMA_TO_DEVICE:
-		if (XCHAL_DCACHE_IS_WRITEBACK)
-			do_cache_op(paddr, size, __flush_dcache_range);
+		do_cache_op(paddr, size, __flush_invalidate_dcache_range);
 		break;
-
-	case DMA_NONE:
-		BUG();
-		break;
-
 	default:
 		break;
 	}
-- 
2.39.2


_______________________________________________
linux-snps-arc mailing list
linux-snps-arc@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-snps-arc

WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>, Vineet Gupta <vgupta@kernel.org>,
	Russell King <linux@armlinux.org.uk>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Guo Ren <guoren@kernel.org>,
	Brian Cain <bcain@quicinc.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Michal Simek <monstr@monstr.eu>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Dinh Nguyen <dinguyen@kernel.org>,
	Stafford Horne <shorne@gmail.com>, Helge Deller <deller@gmx.de>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Christophe Leroy <christophe.leroy@csgroup.eu>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Rich Felker <dalias@libc.org>,
	John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>,
	"David S. Miller" <davem@davemloft.net>,
	Max Filippov <jcmvbkbc@gmail.com>, Christoph Hellwig <hch@lst.de>,
	Robin Murphy <robin.murphy@arm.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	linux-snps-arc@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org, linux-oxnas@groups.io,
	linux-csky@vger.kernel.org, linux-hexagon@vger.kernel.org,
	linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org,
	linux-openrisc@vger.kernel.org, linux-parisc@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org,
	linux-sh@vger.kernel.org, sparclinux@vger.kernel.org,
	linux-xtensa@linux-xtensa.org
Subject: [PATCH 02/21] xtensa: dma-mapping: use normal cache invalidation rules
Date: Mon, 27 Mar 2023 14:12:58 +0200	[thread overview]
Message-ID: <20230327121317.4081816-3-arnd@kernel.org> (raw)
In-Reply-To: <20230327121317.4081816-1-arnd@kernel.org>

From: Arnd Bergmann <arnd@arndb.de>

xtensa is one of the platforms that has both write-back and write-through
caches, and needs to account for both in its DMA mapping operations.

It does this through a set of operations that is different from any
architecture. This is not a problem by itself, but it makes it rather
hard to figure out whether this is correct or not, and to unify this
implementation with the others.

Change the semantics to the usual ones for non-speculating CPUs:

 - On DMA_TO_DEVICE, call __flush_dcache_range() to perform the
   writeback even on writethrough caches, where this is a nop.

 - On DMA_FROM_DEVICE, invalidate the mapping before the DMA rather
   than afterwards.

 - On DMA_BIDIRECTIONAL, combine the pre-writeback with the
   post-invalidate into a call to __flush_invalidate_dcache_range()
   that turns into a simple invalidate on writeback caches.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/xtensa/Kconfig                  |  1 -
 arch/xtensa/include/asm/cacheflush.h |  6 +++---
 arch/xtensa/kernel/pci-dma.c         | 29 +++++-----------------------
 3 files changed, 8 insertions(+), 28 deletions(-)

diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index bcb0c5d2abc2..b938bacbb9af 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -8,7 +8,6 @@ config XTENSA
 	select ARCH_HAS_DMA_PREP_COHERENT if MMU
 	select ARCH_HAS_GCOV_PROFILE_ALL
 	select ARCH_HAS_KCOV
-	select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
 	select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
 	select ARCH_HAS_DMA_SET_UNCACHED if MMU
 	select ARCH_HAS_STRNCPY_FROM_USER if !KASAN
diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h
index 7b4359312c25..2f645d25565a 100644
--- a/arch/xtensa/include/asm/cacheflush.h
+++ b/arch/xtensa/include/asm/cacheflush.h
@@ -61,9 +61,9 @@ static inline void __flush_dcache_page(unsigned long va)
 static inline void __flush_dcache_range(unsigned long va, unsigned long sz)
 {
 }
-# define __flush_invalidate_dcache_all()	__invalidate_dcache_all()
-# define __flush_invalidate_dcache_page(p)	__invalidate_dcache_page(p)
-# define __flush_invalidate_dcache_range(p,s)	__invalidate_dcache_range(p,s)
+# define __flush_invalidate_dcache_all		__invalidate_dcache_all
+# define __flush_invalidate_dcache_page		__invalidate_dcache_page
+# define __flush_invalidate_dcache_range	__invalidate_dcache_range
 #endif
 
 #if defined(CONFIG_MMU) && (DCACHE_WAY_SIZE > PAGE_SIZE)
diff --git a/arch/xtensa/kernel/pci-dma.c b/arch/xtensa/kernel/pci-dma.c
index 94955caa4488..ff3bf015eca4 100644
--- a/arch/xtensa/kernel/pci-dma.c
+++ b/arch/xtensa/kernel/pci-dma.c
@@ -43,38 +43,19 @@ static void do_cache_op(phys_addr_t paddr, size_t size,
 		}
 }
 
-void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
+void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
 		enum dma_data_direction dir)
 {
 	switch (dir) {
-	case DMA_BIDIRECTIONAL:
+	case DMA_TO_DEVICE:
+		do_cache_op(paddr, size, __flush_dcache_range);
+		break;
 	case DMA_FROM_DEVICE:
 		do_cache_op(paddr, size, __invalidate_dcache_range);
 		break;
-
-	case DMA_NONE:
-		BUG();
-		break;
-
-	default:
-		break;
-	}
-}
-
-void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
-		enum dma_data_direction dir)
-{
-	switch (dir) {
 	case DMA_BIDIRECTIONAL:
-	case DMA_TO_DEVICE:
-		if (XCHAL_DCACHE_IS_WRITEBACK)
-			do_cache_op(paddr, size, __flush_dcache_range);
+		do_cache_op(paddr, size, __flush_invalidate_dcache_range);
 		break;
-
-	case DMA_NONE:
-		BUG();
-		break;
-
 	default:
 		break;
 	}
-- 
2.39.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: Rich Felker <dalias@libc.org>,
	linux-sh@vger.kernel.org,
	Catalin Marinas <catalin.marinas@arm.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>,
	Max Filippov <jcmvbkbc@gmail.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Guo Ren <guoren@kernel.org>,
	linux-csky@vger.kernel.org, sparclinux@vger.kernel.org,
	linux-riscv@lists.infradead.org, Will Deacon <will@kernel.org>,
	Christoph Hellwig <hch@lst.de>, Helge Deller <deller@gmx.de>,
	Russell King <linux@armlinux.org.uk>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Vineet Gupta <vgupta@kernel.org>,
	linux-snps-arc@lists.infradead.org,
	linux-xtensa@linux-xtensa.org, Arnd Bergmann <arnd@arndb.de>,
	Brian Cain <bcain@quicinc.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	linux-m68k@lists.linux-m68k.org,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Stafford Horne <shorne@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Michal Sime k <monstr@monstr.eu>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	linux-parisc@vger.kernel.org, linux-openrisc@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-mips@vger.kernel.org,
	Dinh Nguyen <dinguyen@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	linux-hexagon@vger.kernel.org, linux-oxnas@groups.io,
	Robin Murphy <robin.murphy@arm.com>,
	"David S. Miller" <davem@davemloft.net>
Subject: [PATCH 02/21] xtensa: dma-mapping: use normal cache invalidation rules
Date: Mon, 27 Mar 2023 14:12:58 +0200	[thread overview]
Message-ID: <20230327121317.4081816-3-arnd@kernel.org> (raw)
In-Reply-To: <20230327121317.4081816-1-arnd@kernel.org>

From: Arnd Bergmann <arnd@arndb.de>

xtensa is one of the platforms that has both write-back and write-through
caches, and needs to account for both in its DMA mapping operations.

It does this through a set of operations that is different from any
architecture. This is not a problem by itself, but it makes it rather
hard to figure out whether this is correct or not, and to unify this
implementation with the others.

Change the semantics to the usual ones for non-speculating CPUs:

 - On DMA_TO_DEVICE, call __flush_dcache_range() to perform the
   writeback even on writethrough caches, where this is a nop.

 - On DMA_FROM_DEVICE, invalidate the mapping before the DMA rather
   than afterwards.

 - On DMA_BIDIRECTIONAL, combine the pre-writeback with the
   post-invalidate into a call to __flush_invalidate_dcache_range()
   that turns into a simple invalidate on writeback caches.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/xtensa/Kconfig                  |  1 -
 arch/xtensa/include/asm/cacheflush.h |  6 +++---
 arch/xtensa/kernel/pci-dma.c         | 29 +++++-----------------------
 3 files changed, 8 insertions(+), 28 deletions(-)

diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index bcb0c5d2abc2..b938bacbb9af 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -8,7 +8,6 @@ config XTENSA
 	select ARCH_HAS_DMA_PREP_COHERENT if MMU
 	select ARCH_HAS_GCOV_PROFILE_ALL
 	select ARCH_HAS_KCOV
-	select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
 	select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
 	select ARCH_HAS_DMA_SET_UNCACHED if MMU
 	select ARCH_HAS_STRNCPY_FROM_USER if !KASAN
diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h
index 7b4359312c25..2f645d25565a 100644
--- a/arch/xtensa/include/asm/cacheflush.h
+++ b/arch/xtensa/include/asm/cacheflush.h
@@ -61,9 +61,9 @@ static inline void __flush_dcache_page(unsigned long va)
 static inline void __flush_dcache_range(unsigned long va, unsigned long sz)
 {
 }
-# define __flush_invalidate_dcache_all()	__invalidate_dcache_all()
-# define __flush_invalidate_dcache_page(p)	__invalidate_dcache_page(p)
-# define __flush_invalidate_dcache_range(p,s)	__invalidate_dcache_range(p,s)
+# define __flush_invalidate_dcache_all		__invalidate_dcache_all
+# define __flush_invalidate_dcache_page		__invalidate_dcache_page
+# define __flush_invalidate_dcache_range	__invalidate_dcache_range
 #endif
 
 #if defined(CONFIG_MMU) && (DCACHE_WAY_SIZE > PAGE_SIZE)
diff --git a/arch/xtensa/kernel/pci-dma.c b/arch/xtensa/kernel/pci-dma.c
index 94955caa4488..ff3bf015eca4 100644
--- a/arch/xtensa/kernel/pci-dma.c
+++ b/arch/xtensa/kernel/pci-dma.c
@@ -43,38 +43,19 @@ static void do_cache_op(phys_addr_t paddr, size_t size,
 		}
 }
 
-void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
+void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
 		enum dma_data_direction dir)
 {
 	switch (dir) {
-	case DMA_BIDIRECTIONAL:
+	case DMA_TO_DEVICE:
+		do_cache_op(paddr, size, __flush_dcache_range);
+		break;
 	case DMA_FROM_DEVICE:
 		do_cache_op(paddr, size, __invalidate_dcache_range);
 		break;
-
-	case DMA_NONE:
-		BUG();
-		break;
-
-	default:
-		break;
-	}
-}
-
-void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
-		enum dma_data_direction dir)
-{
-	switch (dir) {
 	case DMA_BIDIRECTIONAL:
-	case DMA_TO_DEVICE:
-		if (XCHAL_DCACHE_IS_WRITEBACK)
-			do_cache_op(paddr, size, __flush_dcache_range);
+		do_cache_op(paddr, size, __flush_invalidate_dcache_range);
 		break;
-
-	case DMA_NONE:
-		BUG();
-		break;
-
 	default:
 		break;
 	}
-- 
2.39.2


WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>, Vineet Gupta <vgupta@kernel.org>,
	Russell King <linux@armlinux.org.uk>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Guo Ren <guoren@kernel.org>,
	Brian Cain <bcain@quicinc.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Michal Simek <monstr@monstr.eu>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Dinh Nguyen <dinguyen@kernel.org>,
	Stafford Horne <shorne@gmail.com>, Helge Deller <deller@gmx.de>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Christophe Leroy <christophe.leroy@csgroup.eu>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Rich Felker <dalias@libc.org>,
	John
Subject: [PATCH 02/21] xtensa: dma-mapping: use normal cache invalidation rules
Date: Mon, 27 Mar 2023 14:12:58 +0200	[thread overview]
Message-ID: <20230327121317.4081816-3-arnd@kernel.org> (raw)
In-Reply-To: <20230327121317.4081816-1-arnd@kernel.org>

From: Arnd Bergmann <arnd@arndb.de>

xtensa is one of the platforms that has both write-back and write-through
caches, and needs to account for both in its DMA mapping operations.

It does this through a set of operations that is different from any
architecture. This is not a problem by itself, but it makes it rather
hard to figure out whether this is correct or not, and to unify this
implementation with the others.

Change the semantics to the usual ones for non-speculating CPUs:

 - On DMA_TO_DEVICE, call __flush_dcache_range() to perform the
   writeback even on writethrough caches, where this is a nop.

 - On DMA_FROM_DEVICE, invalidate the mapping before the DMA rather
   than afterwards.

 - On DMA_BIDIRECTIONAL, combine the pre-writeback with the
   post-invalidate into a call to __flush_invalidate_dcache_range()
   that turns into a simple invalidate on writeback caches.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/xtensa/Kconfig                  |  1 -
 arch/xtensa/include/asm/cacheflush.h |  6 +++---
 arch/xtensa/kernel/pci-dma.c         | 29 +++++-----------------------
 3 files changed, 8 insertions(+), 28 deletions(-)

diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index bcb0c5d2abc2..b938bacbb9af 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -8,7 +8,6 @@ config XTENSA
 	select ARCH_HAS_DMA_PREP_COHERENT if MMU
 	select ARCH_HAS_GCOV_PROFILE_ALL
 	select ARCH_HAS_KCOV
-	select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
 	select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
 	select ARCH_HAS_DMA_SET_UNCACHED if MMU
 	select ARCH_HAS_STRNCPY_FROM_USER if !KASAN
diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h
index 7b4359312c25..2f645d25565a 100644
--- a/arch/xtensa/include/asm/cacheflush.h
+++ b/arch/xtensa/include/asm/cacheflush.h
@@ -61,9 +61,9 @@ static inline void __flush_dcache_page(unsigned long va)
 static inline void __flush_dcache_range(unsigned long va, unsigned long sz)
 {
 }
-# define __flush_invalidate_dcache_all()	__invalidate_dcache_all()
-# define __flush_invalidate_dcache_page(p)	__invalidate_dcache_page(p)
-# define __flush_invalidate_dcache_range(p,s)	__invalidate_dcache_range(p,s)
+# define __flush_invalidate_dcache_all		__invalidate_dcache_all
+# define __flush_invalidate_dcache_page		__invalidate_dcache_page
+# define __flush_invalidate_dcache_range	__invalidate_dcache_range
 #endif
 
 #if defined(CONFIG_MMU) && (DCACHE_WAY_SIZE > PAGE_SIZE)
diff --git a/arch/xtensa/kernel/pci-dma.c b/arch/xtensa/kernel/pci-dma.c
index 94955caa4488..ff3bf015eca4 100644
--- a/arch/xtensa/kernel/pci-dma.c
+++ b/arch/xtensa/kernel/pci-dma.c
@@ -43,38 +43,19 @@ static void do_cache_op(phys_addr_t paddr, size_t size,
 		}
 }
 
-void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
+void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
 		enum dma_data_direction dir)
 {
 	switch (dir) {
-	case DMA_BIDIRECTIONAL:
+	case DMA_TO_DEVICE:
+		do_cache_op(paddr, size, __flush_dcache_range);
+		break;
 	case DMA_FROM_DEVICE:
 		do_cache_op(paddr, size, __invalidate_dcache_range);
 		break;
-
-	case DMA_NONE:
-		BUG();
-		break;
-
-	default:
-		break;
-	}
-}
-
-void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
-		enum dma_data_direction dir)
-{
-	switch (dir) {
 	case DMA_BIDIRECTIONAL:
-	case DMA_TO_DEVICE:
-		if (XCHAL_DCACHE_IS_WRITEBACK)
-			do_cache_op(paddr, size, __flush_dcache_range);
+		do_cache_op(paddr, size, __flush_invalidate_dcache_range);
 		break;
-
-	case DMA_NONE:
-		BUG();
-		break;
-
 	default:
 		break;
 	}
-- 
2.39.2


  parent reply	other threads:[~2023-03-27 12:14 UTC|newest]

Thread overview: 456+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-27 12:12 [PATCH 00/21] dma-mapping: unify support for cache flushes Arnd Bergmann
2023-03-27 12:12 ` Arnd Bergmann
2023-03-27 12:12 ` Arnd Bergmann
2023-03-27 12:12 ` Arnd Bergmann
2023-03-27 12:12 ` Arnd Bergmann
2023-03-27 12:12 ` Arnd Bergmann
2023-03-27 12:12 ` [PATCH 01/21] openrisc: dma-mapping: flush bidirectional mappings Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 12:12 ` Arnd Bergmann [this message]
2023-03-27 12:12   ` [PATCH 02/21] xtensa: dma-mapping: use normal cache invalidation rules Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 15:42   ` Max Filippov
2023-03-27 15:42     ` Max Filippov
2023-03-27 15:42     ` Max Filippov
2023-03-27 15:42     ` Max Filippov
2023-03-27 15:42     ` Max Filippov
2023-03-27 15:42     ` Max Filippov
2023-03-27 12:12 ` [PATCH 03/21] sparc32: flush caches in dma_sync_*for_device Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 12:12   ` Arnd Bergmann
2023-03-27 12:13 ` [PATCH 04/21] microblaze: dma-mapping: skip extra DMA flushes Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13 ` [PATCH 05/21] powerpc: dma-mapping: split out cache operation logic Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13 ` [PATCH 06/21] powerpc: dma-mapping: minimize for_cpu flushing Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:56   ` Christophe Leroy
2023-03-27 12:56     ` Christophe Leroy
2023-03-27 12:56     ` Christophe Leroy
2023-03-27 12:56     ` Christophe Leroy
2023-03-27 12:56     ` Christophe Leroy
2023-03-27 12:56     ` Christophe Leroy
2023-03-27 13:02     ` Arnd Bergmann
2023-03-27 13:02       ` Arnd Bergmann
2023-03-27 13:02       ` Arnd Bergmann
2023-03-27 13:02       ` Arnd Bergmann
2023-03-27 13:02       ` Arnd Bergmann
2023-03-27 13:02       ` Arnd Bergmann
2023-03-27 12:13 ` [PATCH 07/21] powerpc: dma-mapping: always clean cache in _for_device() op Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13 ` [PATCH 08/21] riscv: dma-mapping: only invalidate after DMA, not flush Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-29 20:48   ` Conor Dooley
2023-03-29 20:48     ` Conor Dooley
2023-03-29 20:48     ` Conor Dooley
2023-03-29 20:48     ` Conor Dooley
2023-03-29 20:48     ` Conor Dooley
2023-03-29 20:48     ` Conor Dooley
2023-03-30  7:10     ` Arnd Bergmann
2023-03-30  7:10       ` Arnd Bergmann
2023-03-30  7:10       ` Arnd Bergmann
2023-03-30  7:10       ` Arnd Bergmann
2023-03-30  7:10       ` Arnd Bergmann
2023-03-30  7:10       ` Arnd Bergmann
2023-03-29 21:51   ` Jessica Clarke
2023-03-29 21:51     ` Jessica Clarke
2023-03-29 21:51     ` Jessica Clarke
2023-03-29 21:51     ` Jessica Clarke
2023-03-29 21:51     ` Jessica Clarke
2023-03-29 21:51     ` Jessica Clarke
2023-03-30 12:59   ` Lad, Prabhakar
2023-03-30 12:59     ` Lad, Prabhakar
2023-03-30 12:59     ` Lad, Prabhakar
2023-03-30 12:59     ` Lad, Prabhakar
2023-03-30 12:59     ` Lad, Prabhakar
2023-03-30 12:59     ` Lad, Prabhakar
2023-04-19 14:22   ` Palmer Dabbelt
2023-04-19 14:22     ` Palmer Dabbelt
2023-04-19 14:22     ` Palmer Dabbelt
2023-04-19 14:22     ` Palmer Dabbelt
2023-04-19 14:22     ` Palmer Dabbelt
2023-04-19 14:22     ` Palmer Dabbelt
2023-03-27 12:13 ` [PATCH 09/21] riscv: dma-mapping: skip invalidation before bidirectional DMA Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-29 20:16   ` Conor Dooley
2023-03-29 20:16     ` Conor Dooley
2023-03-29 20:16     ` Conor Dooley
2023-03-29 20:16     ` Conor Dooley
2023-03-29 20:16     ` Conor Dooley
2023-03-29 20:16     ` Conor Dooley
2023-03-30 13:26   ` Lad, Prabhakar
2023-03-30 13:26     ` Lad, Prabhakar
2023-03-30 13:26     ` Lad, Prabhakar
2023-03-30 13:26     ` Lad, Prabhakar
2023-03-30 13:26     ` Lad, Prabhakar
2023-03-30 13:26     ` Lad, Prabhakar
2023-04-19 14:22   ` Palmer Dabbelt
2023-04-19 14:22     ` Palmer Dabbelt
2023-04-19 14:22     ` Palmer Dabbelt
2023-04-19 14:22     ` Palmer Dabbelt
2023-04-19 14:22     ` Palmer Dabbelt
2023-04-19 14:22     ` Palmer Dabbelt
2023-05-05  5:47   ` Guo Ren
2023-05-05  5:47     ` Guo Ren
2023-05-05  5:47     ` Guo Ren
2023-05-05  5:47     ` Guo Ren
2023-05-05  5:47     ` Guo Ren
2023-05-05  5:47     ` Guo Ren
2023-05-05 13:18     ` Arnd Bergmann
2023-05-05 13:18       ` Arnd Bergmann
2023-05-05 13:18       ` Arnd Bergmann
2023-05-05 13:18       ` Arnd Bergmann
2023-05-05 13:18       ` Arnd Bergmann
2023-05-05 13:18       ` Arnd Bergmann
2023-05-06  7:25       ` Guo Ren
2023-05-06  7:25         ` Guo Ren
2023-05-06  7:25         ` Guo Ren
2023-05-06  7:25         ` Guo Ren
2023-05-06  7:25         ` Guo Ren
2023-05-06  7:25         ` Guo Ren
2023-05-06  7:53         ` Arnd Bergmann
2023-05-06  7:53           ` Arnd Bergmann
2023-05-06  7:53           ` Arnd Bergmann
2023-05-06  7:53           ` Arnd Bergmann
2023-05-06  7:53           ` Arnd Bergmann
2023-05-06  7:53           ` Arnd Bergmann
2023-03-27 12:13 ` [PATCH 10/21] csky: dma-mapping: skip invalidating before DMA from device Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 13:37   ` Guo Ren
2023-03-27 13:37     ` Guo Ren
2023-03-27 13:37     ` Guo Ren
2023-03-27 13:37     ` Guo Ren
2023-03-27 13:37     ` Guo Ren
2023-03-27 13:37     ` Guo Ren
2023-03-27 12:13 ` [PATCH 11/21] mips: dma-mapping: skip invalidating before bidirectional DMA Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13 ` [PATCH 12/21] mips: dma-mapping: split out cache operation logic Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13 ` [PATCH 13/21] arc: dma-mapping: skip invalidating before bidirectional DMA Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-04-02  6:52   ` Vineet Gupta
2023-04-02  6:52     ` Vineet Gupta
2023-04-02  6:52     ` Vineet Gupta
2023-04-02  6:52     ` Vineet Gupta
2023-04-02  6:52     ` Vineet Gupta
2023-04-02  6:52     ` Vineet Gupta
2023-04-04  8:27     ` Shahab Vahedi
2023-04-04  8:27       ` Shahab Vahedi
2023-04-04  8:27       ` Shahab Vahedi
2023-04-04  8:27       ` Shahab Vahedi
2023-04-04  8:27       ` Shahab Vahedi
2023-04-04  8:27       ` Shahab Vahedi
2023-04-06  9:01     ` Shahab Vahedi
2023-04-06  9:01       ` Shahab Vahedi
2023-04-06  9:01       ` Shahab Vahedi
2023-04-06  9:01       ` Shahab Vahedi
2023-04-06  9:01       ` Shahab Vahedi
2023-04-06  9:01       ` Shahab Vahedi
2023-03-27 12:13 ` [PATCH 14/21] parisc: dma-mapping: use regular flush/invalidate ops Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13 ` [PATCH 15/21] ARM: dma-mapping: always invalidate WT caches before DMA Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-31  9:01   ` Linus Walleij
2023-03-31  9:01     ` Linus Walleij
2023-03-31  9:01     ` Linus Walleij
2023-03-31  9:01     ` Linus Walleij
2023-03-31  9:01     ` Linus Walleij
2023-03-31  9:01     ` Linus Walleij
2023-03-31  9:07   ` Russell King (Oracle)
2023-03-31  9:07     ` Russell King (Oracle)
2023-03-31  9:07     ` Russell King (Oracle)
2023-03-31  9:07     ` Russell King (Oracle)
2023-03-31  9:07     ` Russell King (Oracle)
2023-03-31  9:07     ` Russell King (Oracle)
2023-03-31  9:35     ` Russell King (Oracle)
2023-03-31  9:35       ` Russell King (Oracle)
2023-03-31  9:35       ` Russell King (Oracle)
2023-03-31  9:35       ` Russell King (Oracle)
2023-03-31  9:35       ` Russell King (Oracle)
2023-03-31  9:35       ` Russell King (Oracle)
2023-03-31 10:38       ` Arnd Bergmann
2023-03-31 10:38         ` Arnd Bergmann
2023-03-31 10:38         ` Arnd Bergmann
2023-03-31 10:38         ` Arnd Bergmann
2023-03-31 10:38         ` Arnd Bergmann
2023-03-31 10:38         ` Arnd Bergmann
2023-03-31 11:01         ` David Laight
2023-03-31 11:01           ` David Laight
2023-03-31 11:01           ` David Laight
2023-03-31 11:01           ` David Laight
2023-03-31 11:01           ` David Laight
2023-03-31 11:08         ` Russell King (Oracle)
2023-03-31 11:08           ` Russell King (Oracle)
2023-03-31 11:08           ` Russell King (Oracle)
2023-03-31 11:08           ` Russell King (Oracle)
2023-03-31 11:08           ` Russell King (Oracle)
2023-03-31 11:08           ` Russell King (Oracle)
2023-03-31 12:32           ` Arnd Bergmann
2023-03-31 12:32             ` Arnd Bergmann
2023-03-31 12:32             ` Arnd Bergmann
2023-03-31 12:32             ` Arnd Bergmann
2023-03-31 12:32             ` Arnd Bergmann
2023-03-31 12:32             ` Arnd Bergmann
2023-03-27 12:13 ` [PATCH 16/21] ARM: dma-mapping: bring back dmac_{clean,inv}_range Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 13:10   ` Russell King (Oracle)
2023-03-27 13:10     ` Russell King (Oracle)
2023-03-27 13:10     ` Russell King (Oracle)
2023-03-27 13:10     ` Russell King (Oracle)
2023-03-27 13:10     ` Russell King (Oracle)
2023-03-27 13:10     ` Russell King (Oracle)
2023-03-27 12:13 ` [PATCH 17/21] ARM: dma-mapping: use arch_sync_dma_for_{device,cpu}() internally Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-31  9:10   ` Linus Walleij
2023-03-31  9:10     ` Linus Walleij
2023-03-31  9:10     ` Linus Walleij
2023-03-31  9:10     ` Linus Walleij
2023-03-31  9:10     ` Linus Walleij
2023-03-31  9:10     ` Linus Walleij
2023-03-31 12:48     ` Arnd Bergmann
2023-03-31 12:48       ` Arnd Bergmann
2023-03-31 12:48       ` Arnd Bergmann
2023-03-31 12:48       ` Arnd Bergmann
2023-03-31 12:48       ` Arnd Bergmann
2023-03-31 12:48       ` Arnd Bergmann
2023-03-27 12:13 ` [PATCH 18/21] ARM: drop SMP support for ARM11MPCore Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-30  7:48   ` Neil Armstrong
2023-03-30  7:48     ` Neil Armstrong
2023-03-30  7:48     ` Neil Armstrong
2023-03-30  7:48     ` Neil Armstrong
2023-03-30  7:48     ` Neil Armstrong
2023-03-30  7:48     ` Neil Armstrong
2023-03-30 10:03     ` Arnd Bergmann
2023-03-30 10:03       ` Arnd Bergmann
2023-03-30 10:03       ` Arnd Bergmann
2023-03-30 10:03       ` Arnd Bergmann
2023-03-30 10:03       ` Arnd Bergmann
2023-03-30 10:03       ` Arnd Bergmann
2023-03-30 16:40       ` Neil Armstrong
2023-03-30 16:40         ` Neil Armstrong
2023-03-30 16:40         ` Neil Armstrong
2023-03-30 16:40         ` Neil Armstrong
2023-03-30 16:40         ` Neil Armstrong
2023-03-30 16:40         ` Neil Armstrong
2023-03-30  8:12   ` Linus Walleij
2023-03-30  8:12     ` Linus Walleij
2023-03-30  8:12     ` Linus Walleij
2023-03-30  8:12     ` Linus Walleij
2023-03-30  8:12     ` Linus Walleij
2023-03-30  8:12     ` Linus Walleij
2023-03-30 11:28   ` Joel Stanley
2023-03-31 12:54     ` Arnd Bergmann
2023-04-05  1:49       ` Joel Stanley
2023-03-30 11:51   ` Ard Biesheuvel
2023-03-30 11:51     ` Ard Biesheuvel
2023-03-30 11:51     ` Ard Biesheuvel
2023-03-30 11:51     ` Ard Biesheuvel
2023-03-30 11:51     ` Ard Biesheuvel
2023-03-30 11:51     ` Ard Biesheuvel
2023-03-31 17:09   ` Catalin Marinas
2023-03-31 17:09     ` Catalin Marinas
2023-03-31 17:09     ` Catalin Marinas
2023-03-31 17:09     ` Catalin Marinas
2023-03-31 17:09     ` Catalin Marinas
2023-03-31 17:09     ` Catalin Marinas
2023-03-27 12:13 ` [PATCH 19/21] ARM: dma-mapping: use generic form of arch_sync_dma_* helpers Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13 ` [PATCH 20/21] ARM: dma-mapping: split out arch_dma_mark_clean() helper Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:48   ` Robin Murphy
2023-03-27 12:48     ` Robin Murphy
2023-03-27 12:48     ` Robin Murphy
2023-03-27 12:48     ` Robin Murphy
2023-03-27 12:48     ` Robin Murphy
2023-03-27 12:48     ` Robin Murphy
2023-03-31 14:00     ` Arnd Bergmann
2023-03-31 14:00       ` Arnd Bergmann
2023-03-31 14:00       ` Arnd Bergmann
2023-03-31 14:00       ` Arnd Bergmann
2023-03-31 14:00       ` Arnd Bergmann
2023-03-31 14:00       ` Arnd Bergmann
2023-03-31 15:12       ` Robin Murphy
2023-03-31 15:12         ` Robin Murphy
2023-03-31 15:12         ` Robin Murphy
2023-03-31 15:12         ` Robin Murphy
2023-03-31 15:12         ` Robin Murphy
2023-03-31 15:12         ` Robin Murphy
2023-03-31 17:20         ` Arnd Bergmann
2023-03-31 17:20           ` Arnd Bergmann
2023-03-31 17:20           ` Arnd Bergmann
2023-03-31 17:20           ` Arnd Bergmann
2023-03-31 17:20           ` Arnd Bergmann
2023-03-31 17:20           ` Arnd Bergmann
2023-03-27 15:01   ` Russell King (Oracle)
2023-03-27 15:01     ` Russell King (Oracle)
2023-03-27 15:01     ` Russell King (Oracle)
2023-03-27 15:01     ` Russell King (Oracle)
2023-03-27 15:01     ` Russell King (Oracle)
2023-03-27 15:01     ` Russell King (Oracle)
2023-03-31 14:06     ` Arnd Bergmann
2023-03-31 14:06       ` Arnd Bergmann
2023-03-31 14:06       ` Arnd Bergmann
2023-03-31 14:06       ` Arnd Bergmann
2023-03-31 14:06       ` Arnd Bergmann
2023-03-31 14:06       ` Arnd Bergmann
2023-03-31 15:54       ` Russell King (Oracle)
2023-03-31 15:54         ` Russell King (Oracle)
2023-03-31 15:54         ` Russell King (Oracle)
2023-03-31 15:54         ` Russell King (Oracle)
2023-03-31 15:54         ` Russell King (Oracle)
2023-03-31 15:54         ` Russell King (Oracle)
2023-03-27 18:42   ` kernel test robot
2023-03-27 19:03   ` kernel test robot
2023-03-28 13:17   ` kernel test robot
2023-07-03  7:54   ` Geert Uytterhoeven
2023-07-03  7:54     ` Geert Uytterhoeven
2023-07-03  7:54     ` Geert Uytterhoeven
2023-07-03  7:54     ` Geert Uytterhoeven
2023-07-03  7:54     ` Geert Uytterhoeven
2023-07-03  7:54     ` Geert Uytterhoeven
2023-07-06 14:11     ` Christoph Hellwig
2023-07-06 14:11       ` Christoph Hellwig
2023-07-06 14:11       ` Christoph Hellwig
2023-07-06 14:11       ` Christoph Hellwig
2023-07-06 14:11       ` Christoph Hellwig
2023-07-06 14:11       ` Christoph Hellwig
2023-03-27 12:13 ` [PATCH 21/21] dma-mapping: replace custom code with generic implementation Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 12:13   ` Arnd Bergmann
2023-03-27 22:25   ` Christoph Hellwig
2023-03-27 22:25     ` Christoph Hellwig
2023-03-27 22:25     ` Christoph Hellwig
2023-03-27 22:25     ` Christoph Hellwig
2023-03-27 22:25     ` Christoph Hellwig
2023-03-27 22:25     ` Christoph Hellwig
2023-03-31 13:04     ` Arnd Bergmann
2023-03-31 13:04       ` Arnd Bergmann
2023-03-31 13:04       ` Arnd Bergmann
2023-03-31 13:04       ` Arnd Bergmann
2023-03-31 13:04       ` Arnd Bergmann
2023-03-31 13:04       ` Arnd Bergmann
2023-03-30 14:06   ` Lad, Prabhakar
2023-03-30 14:06     ` Lad, Prabhakar
2023-03-30 14:06     ` Lad, Prabhakar
2023-03-30 14:06     ` Lad, Prabhakar
2023-03-30 14:06     ` Lad, Prabhakar
2023-03-30 14:06     ` Lad, Prabhakar
2023-04-13 12:13   ` Biju Das
2023-04-13 12:13     ` Biju Das
2023-04-13 12:13     ` Biju Das
2023-04-13 12:13     ` Biju Das
2023-04-13 12:13     ` Biju Das
2023-04-13 12:13     ` Biju Das
2023-04-13 12:13     ` Biju Das
2023-04-13 12:51     ` Arnd Bergmann
2023-04-13 12:51       ` Arnd Bergmann
2023-04-13 12:51       ` Arnd Bergmann
2023-04-13 12:51       ` Arnd Bergmann
2023-04-13 12:51       ` Arnd Bergmann
2023-04-13 12:51       ` Arnd Bergmann
2023-06-27 16:52       ` Geert Uytterhoeven
2023-06-27 16:52         ` Geert Uytterhoeven
2023-06-27 16:52         ` Geert Uytterhoeven
2023-06-27 16:52         ` Geert Uytterhoeven
2023-06-27 16:52         ` Geert Uytterhoeven
2023-06-27 16:52         ` Geert Uytterhoeven
2023-03-31 16:53 ` [PATCH 00/21] dma-mapping: unify support for cache flushes Catalin Marinas
2023-03-31 16:53   ` Catalin Marinas
2023-03-31 16:53   ` Catalin Marinas
2023-03-31 16:53   ` Catalin Marinas
2023-03-31 16:53   ` Catalin Marinas
2023-03-31 16:53   ` Catalin Marinas
2023-03-31 20:27   ` Arnd Bergmann
2023-03-31 20:27     ` Arnd Bergmann
2023-03-31 20:27     ` Arnd Bergmann
2023-03-31 20:27     ` Arnd Bergmann
2023-03-31 20:27     ` Arnd Bergmann
2023-03-31 20:27     ` Arnd Bergmann
2023-05-25  7:46 ` Lad, Prabhakar
2023-05-25  7:46   ` Lad, Prabhakar
2023-05-25  7:46   ` Lad, Prabhakar
2023-05-25  7:46   ` Lad, Prabhakar
2023-05-25  7:46   ` Lad, Prabhakar
2023-05-25  7:46   ` Lad, Prabhakar

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