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From: Nicholas Piggin <npiggin@gmail.com>
To: kvm@vger.kernel.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
	linuxppc-dev@lists.ozlabs.org,
	Laurent Vivier <lvivier@redhat.com>,
	Thomas Huth <thuth@redhat.com>
Subject: [kvm-unit-tests v3 06/13] powerpc: Extract some common helpers and defines to headers
Date: Mon, 27 Mar 2023 22:45:13 +1000	[thread overview]
Message-ID: <20230327124520.2707537-7-npiggin@gmail.com> (raw)
In-Reply-To: <20230327124520.2707537-1-npiggin@gmail.com>

Move some common helpers and defines to processor.h.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
Since v2:
- New patch

 lib/powerpc/asm/processor.h | 38 +++++++++++++++++++++++++++++++++----
 powerpc/spapr_hcall.c       |  9 +--------
 powerpc/sprs.c              |  9 ---------
 3 files changed, 35 insertions(+), 21 deletions(-)

diff --git a/lib/powerpc/asm/processor.h b/lib/powerpc/asm/processor.h
index ebfeff2..4ad6612 100644
--- a/lib/powerpc/asm/processor.h
+++ b/lib/powerpc/asm/processor.h
@@ -9,13 +9,43 @@ void handle_exception(int trap, void (*func)(struct pt_regs *, void *), void *);
 void do_handle_exception(struct pt_regs *regs);
 #endif /* __ASSEMBLY__ */
 
-static inline uint64_t get_tb(void)
+#define SPR_TB		0x10c
+#define SPR_SPRG0	0x110
+#define SPR_SPRG1	0x111
+#define SPR_SPRG2	0x112
+#define SPR_SPRG3	0x113
+
+static inline uint64_t mfspr(int nr)
 {
-	uint64_t tb;
+	uint64_t ret;
+
+	asm volatile("mfspr %0,%1" : "=r"(ret) : "i"(nr) : "memory");
+
+	return ret;
+}
 
-	asm volatile ("mfspr %[tb],268" : [tb] "=r" (tb));
+static inline void mtspr(int nr, uint64_t val)
+{
+	asm volatile("mtspr %0,%1" : : "i"(nr), "r"(val) : "memory");
+}
+
+static inline uint64_t mfmsr(void)
+{
+	uint64_t msr;
 
-	return tb;
+	asm volatile ("mfmsr %[msr]" : [msr] "=r" (msr) :: "memory");
+
+	return msr;
+}
+
+static inline void mtmsr(uint64_t msr)
+{
+	asm volatile ("mtmsrd %[msr]" :: [msr] "r" (msr) : "memory");
+}
+
+static inline uint64_t get_tb(void)
+{
+	return mfspr(SPR_TB);
 }
 
 extern void delay(uint64_t cycles);
diff --git a/powerpc/spapr_hcall.c b/powerpc/spapr_hcall.c
index 823a574..0d0f25a 100644
--- a/powerpc/spapr_hcall.c
+++ b/powerpc/spapr_hcall.c
@@ -9,20 +9,13 @@
 #include <util.h>
 #include <alloc.h>
 #include <asm/hcall.h>
+#include <asm/processor.h>
 
 #define PAGE_SIZE 4096
 
 #define H_ZERO_PAGE	(1UL << (63-48))
 #define H_COPY_PAGE	(1UL << (63-49))
 
-#define mfspr(nr) ({ \
-	uint64_t ret; \
-	asm volatile("mfspr %0,%1" : "=r"(ret) : "i"(nr)); \
-	ret; \
-})
-
-#define SPR_SPRG0	0x110
-
 /**
  * Test the H_SET_SPRG0 h-call by setting some values and checking whether
  * the SPRG0 register contains the correct values afterwards
diff --git a/powerpc/sprs.c b/powerpc/sprs.c
index 6ee6dba..57e487c 100644
--- a/powerpc/sprs.c
+++ b/powerpc/sprs.c
@@ -28,15 +28,6 @@
 #include <asm/processor.h>
 #include <asm/barrier.h>
 
-#define mfspr(nr) ({ \
-	uint64_t ret; \
-	asm volatile("mfspr %0,%1" : "=r"(ret) : "i"(nr)); \
-	ret; \
-})
-
-#define mtspr(nr, val) \
-	asm volatile("mtspr %0,%1" : : "i"(nr), "r"(val))
-
 uint64_t before[1024], after[1024];
 
 /* Common SPRs for all PowerPC CPUs */
-- 
2.37.2


WARNING: multiple messages have this Message-ID (diff)
From: Nicholas Piggin <npiggin@gmail.com>
To: kvm@vger.kernel.org
Cc: Laurent Vivier <lvivier@redhat.com>,
	Thomas Huth <thuth@redhat.com>,
	linuxppc-dev@lists.ozlabs.org,
	Nicholas Piggin <npiggin@gmail.com>
Subject: [kvm-unit-tests v3 06/13] powerpc: Extract some common helpers and defines to headers
Date: Mon, 27 Mar 2023 22:45:13 +1000	[thread overview]
Message-ID: <20230327124520.2707537-7-npiggin@gmail.com> (raw)
In-Reply-To: <20230327124520.2707537-1-npiggin@gmail.com>

Move some common helpers and defines to processor.h.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
Since v2:
- New patch

 lib/powerpc/asm/processor.h | 38 +++++++++++++++++++++++++++++++++----
 powerpc/spapr_hcall.c       |  9 +--------
 powerpc/sprs.c              |  9 ---------
 3 files changed, 35 insertions(+), 21 deletions(-)

diff --git a/lib/powerpc/asm/processor.h b/lib/powerpc/asm/processor.h
index ebfeff2..4ad6612 100644
--- a/lib/powerpc/asm/processor.h
+++ b/lib/powerpc/asm/processor.h
@@ -9,13 +9,43 @@ void handle_exception(int trap, void (*func)(struct pt_regs *, void *), void *);
 void do_handle_exception(struct pt_regs *regs);
 #endif /* __ASSEMBLY__ */
 
-static inline uint64_t get_tb(void)
+#define SPR_TB		0x10c
+#define SPR_SPRG0	0x110
+#define SPR_SPRG1	0x111
+#define SPR_SPRG2	0x112
+#define SPR_SPRG3	0x113
+
+static inline uint64_t mfspr(int nr)
 {
-	uint64_t tb;
+	uint64_t ret;
+
+	asm volatile("mfspr %0,%1" : "=r"(ret) : "i"(nr) : "memory");
+
+	return ret;
+}
 
-	asm volatile ("mfspr %[tb],268" : [tb] "=r" (tb));
+static inline void mtspr(int nr, uint64_t val)
+{
+	asm volatile("mtspr %0,%1" : : "i"(nr), "r"(val) : "memory");
+}
+
+static inline uint64_t mfmsr(void)
+{
+	uint64_t msr;
 
-	return tb;
+	asm volatile ("mfmsr %[msr]" : [msr] "=r" (msr) :: "memory");
+
+	return msr;
+}
+
+static inline void mtmsr(uint64_t msr)
+{
+	asm volatile ("mtmsrd %[msr]" :: [msr] "r" (msr) : "memory");
+}
+
+static inline uint64_t get_tb(void)
+{
+	return mfspr(SPR_TB);
 }
 
 extern void delay(uint64_t cycles);
diff --git a/powerpc/spapr_hcall.c b/powerpc/spapr_hcall.c
index 823a574..0d0f25a 100644
--- a/powerpc/spapr_hcall.c
+++ b/powerpc/spapr_hcall.c
@@ -9,20 +9,13 @@
 #include <util.h>
 #include <alloc.h>
 #include <asm/hcall.h>
+#include <asm/processor.h>
 
 #define PAGE_SIZE 4096
 
 #define H_ZERO_PAGE	(1UL << (63-48))
 #define H_COPY_PAGE	(1UL << (63-49))
 
-#define mfspr(nr) ({ \
-	uint64_t ret; \
-	asm volatile("mfspr %0,%1" : "=r"(ret) : "i"(nr)); \
-	ret; \
-})
-
-#define SPR_SPRG0	0x110
-
 /**
  * Test the H_SET_SPRG0 h-call by setting some values and checking whether
  * the SPRG0 register contains the correct values afterwards
diff --git a/powerpc/sprs.c b/powerpc/sprs.c
index 6ee6dba..57e487c 100644
--- a/powerpc/sprs.c
+++ b/powerpc/sprs.c
@@ -28,15 +28,6 @@
 #include <asm/processor.h>
 #include <asm/barrier.h>
 
-#define mfspr(nr) ({ \
-	uint64_t ret; \
-	asm volatile("mfspr %0,%1" : "=r"(ret) : "i"(nr)); \
-	ret; \
-})
-
-#define mtspr(nr, val) \
-	asm volatile("mtspr %0,%1" : : "i"(nr), "r"(val))
-
 uint64_t before[1024], after[1024];
 
 /* Common SPRs for all PowerPC CPUs */
-- 
2.37.2


  parent reply	other threads:[~2023-03-27 12:45 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-27 12:45 [kvm-unit-tests v3 00/13] powerpc: updates, P10, PNV support Nicholas Piggin
2023-03-27 12:45 ` Nicholas Piggin
2023-03-27 12:45 ` [kvm-unit-tests v3 01/13] MAINTAINERS: Update powerpc list Nicholas Piggin
2023-03-27 12:45   ` Nicholas Piggin
2023-03-27 12:45 ` [kvm-unit-tests v3 02/13] powerpc: Add local variant of SPR test Nicholas Piggin
2023-03-27 12:45   ` Nicholas Piggin
2023-03-27 12:45 ` [kvm-unit-tests v3 03/13] powerpc: Add some checking to exception handler install Nicholas Piggin
2023-03-27 12:45   ` Nicholas Piggin
2023-03-27 14:39   ` Thomas Huth
2023-03-27 14:39     ` Thomas Huth
2023-03-28  6:53     ` Nicholas Piggin
2023-03-28  6:53       ` Nicholas Piggin
2023-03-27 12:45 ` [kvm-unit-tests v3 04/13] powerpc: Abstract H_CEDE calls into a sleep functions Nicholas Piggin
2023-03-27 12:45   ` Nicholas Piggin
2023-03-27 14:49   ` Thomas Huth
2023-03-27 12:45 ` [kvm-unit-tests v3 05/13] powerpc: Add ISA v3.1 (POWER10) support to SPR test Nicholas Piggin
2023-03-27 12:45   ` Nicholas Piggin
2023-03-27 12:45 ` Nicholas Piggin [this message]
2023-03-27 12:45   ` [kvm-unit-tests v3 06/13] powerpc: Extract some common helpers and defines to headers Nicholas Piggin
2023-03-31 10:42   ` Thomas Huth
2023-03-27 12:45 ` [kvm-unit-tests v3 07/13] powerpc/sprs: Specify SPRs with data rather than code Nicholas Piggin
2023-03-27 12:45   ` Nicholas Piggin
2023-04-04  7:02   ` Thomas Huth
2023-04-04  7:02     ` Thomas Huth
2023-03-27 12:45 ` [kvm-unit-tests v3 08/13] powerpc/spapr_vpa: Add basic VPA tests Nicholas Piggin
2023-03-27 12:45   ` Nicholas Piggin
2023-04-04  7:17   ` Thomas Huth
2023-04-04  7:17     ` Thomas Huth
2023-03-27 12:45 ` [kvm-unit-tests v3 09/13] powerpc: Expand exception handler vector granularity Nicholas Piggin
2023-03-27 12:45   ` Nicholas Piggin
2023-04-04  7:18   ` Thomas Huth
2023-04-04  7:18     ` Thomas Huth
2023-03-27 12:45 ` [kvm-unit-tests v3 10/13] powerpc: Add support for more interrupts including HV interrupts Nicholas Piggin
2023-03-27 12:45   ` Nicholas Piggin
2023-04-04  7:32   ` Thomas Huth
2023-04-04  7:32     ` Thomas Huth
2023-04-05 23:45   ` Joel Stanley
2023-04-05 23:45     ` Joel Stanley
2023-03-27 12:45 ` [kvm-unit-tests v3 11/13] powerpc: Discover runtime load address dynamically Nicholas Piggin
2023-03-27 12:45   ` Nicholas Piggin
2023-04-04  7:34   ` Thomas Huth
2023-04-04  7:34     ` Thomas Huth
2023-03-27 12:45 ` [kvm-unit-tests v3 12/13] powerpc: Support powernv machine with QEMU TCG Nicholas Piggin
2023-03-27 12:45   ` Nicholas Piggin
2023-03-27 16:06   ` Cédric Le Goater
2023-03-27 16:06     ` Cédric Le Goater
2023-03-27 12:45 ` [kvm-unit-tests v3 13/13] powerpc/sprs: Test hypervisor registers on powernv machine Nicholas Piggin
2023-03-27 12:45   ` Nicholas Piggin
2023-03-27 16:09 ` [kvm-unit-tests v3 00/13] powerpc: updates, P10, PNV support Cédric Le Goater
2023-03-27 16:09   ` Cédric Le Goater
2023-03-28  7:15   ` Nicholas Piggin
2023-03-28  7:15     ` Nicholas Piggin
2023-03-28  7:32     ` Cédric Le Goater
2023-03-28  7:32       ` Cédric Le Goater

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