* [PATCH 0/2] arm64: dts: imx8mp: Add GPT blocks
@ 2023-03-27 17:35 ` Uwe Kleine-König
0 siblings, 0 replies; 18+ messages in thread
From: Uwe Kleine-König @ 2023-03-27 17:35 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer
Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel
Hello,
according to the dt binding we have the following major GPT variants:
imx1
imx21
imx31
imx6dl
I compared the GPT documentation for i.MX8MP, i.MX6DL and i.MX6Q (which
is a member of the imx31 variant) and didn't spot a difference. So
either these are actually identical, or I missed a detail. In the latter
case i.MX8MP might be a member of the imx31 variant, too, and not as
advertised in the commit logs of the imx6dl.
Does someone know (or spot) the relevant difference?
Best regards
Uwe
Uwe Kleine-König (2):
dt-bindings: timer: fsl,imxgpt: Add i.MX8MP variant
arm64: dts: imx8mp: Add GPT blocks
.../devicetree/bindings/timer/fsl,imxgpt.yaml | 1 +
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 48 +++++++++++++++++++
2 files changed, 49 insertions(+)
base-commit: fe15c26ee26efa11741a7b632e9f23b01aca4cc6
--
2.39.2
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 0/2] arm64: dts: imx8mp: Add GPT blocks
@ 2023-03-27 17:35 ` Uwe Kleine-König
0 siblings, 0 replies; 18+ messages in thread
From: Uwe Kleine-König @ 2023-03-27 17:35 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer
Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel
Hello,
according to the dt binding we have the following major GPT variants:
imx1
imx21
imx31
imx6dl
I compared the GPT documentation for i.MX8MP, i.MX6DL and i.MX6Q (which
is a member of the imx31 variant) and didn't spot a difference. So
either these are actually identical, or I missed a detail. In the latter
case i.MX8MP might be a member of the imx31 variant, too, and not as
advertised in the commit logs of the imx6dl.
Does someone know (or spot) the relevant difference?
Best regards
Uwe
Uwe Kleine-König (2):
dt-bindings: timer: fsl,imxgpt: Add i.MX8MP variant
arm64: dts: imx8mp: Add GPT blocks
.../devicetree/bindings/timer/fsl,imxgpt.yaml | 1 +
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 48 +++++++++++++++++++
2 files changed, 49 insertions(+)
base-commit: fe15c26ee26efa11741a7b632e9f23b01aca4cc6
--
2.39.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 1/2] dt-bindings: timer: fsl,imxgpt: Add i.MX8MP variant
2023-03-27 17:35 ` Uwe Kleine-König
@ 2023-03-27 17:35 ` Uwe Kleine-König
-1 siblings, 0 replies; 18+ messages in thread
From: Uwe Kleine-König @ 2023-03-27 17:35 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer
Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel
The i.MX8MP has the same register layout as the i.MX6DL, so add it as a
variant allowing to add the GPT IP blocks to the i.MX8MP's dtsi file.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
index 716c6afcca1f..f5f8b297da13 100644
--- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
+++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
@@ -31,6 +31,7 @@ properties:
- enum:
- fsl,imx6sl-gpt
- fsl,imx6sx-gpt
+ - fsl,imx8mp-gpt
- fsl,imxrt1050-gpt
- fsl,imxrt1170-gpt
- const: fsl,imx6dl-gpt
--
2.39.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 1/2] dt-bindings: timer: fsl,imxgpt: Add i.MX8MP variant
@ 2023-03-27 17:35 ` Uwe Kleine-König
0 siblings, 0 replies; 18+ messages in thread
From: Uwe Kleine-König @ 2023-03-27 17:35 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer
Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel
The i.MX8MP has the same register layout as the i.MX6DL, so add it as a
variant allowing to add the GPT IP blocks to the i.MX8MP's dtsi file.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
index 716c6afcca1f..f5f8b297da13 100644
--- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
+++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
@@ -31,6 +31,7 @@ properties:
- enum:
- fsl,imx6sl-gpt
- fsl,imx6sx-gpt
+ - fsl,imx8mp-gpt
- fsl,imxrt1050-gpt
- fsl,imxrt1170-gpt
- const: fsl,imx6dl-gpt
--
2.39.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/2] arm64: dts: imx8mp: Add GPT blocks
2023-03-27 17:35 ` Uwe Kleine-König
@ 2023-03-27 17:35 ` Uwe Kleine-König
-1 siblings, 0 replies; 18+ messages in thread
From: Uwe Kleine-König @ 2023-03-27 17:35 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer
Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel
The i.MX8MP includes the same GPT blocks as the i.MX6DL. Add all 6
instances.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 48 +++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index a19224fe1a6a..910534624beb 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -409,6 +409,30 @@ wdog3: watchdog@302a0000 {
status = "disabled";
};
+ gpt1: timer@302d0000 {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x302d0000 0x10000>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_GPT1_ROOT>, <&clk IMX8MP_CLK_GPT1>;
+ clock-names = "ipg", "per";
+ };
+
+ gpt2: timer@302e0000 {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x302e0000 0x10000>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_GPT2_ROOT>, <&clk IMX8MP_CLK_GPT2>;
+ clock-names = "ipg", "per";
+ };
+
+ gpt3: timer@302f0000 {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x302f0000 0x10000>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_GPT3_ROOT>, <&clk IMX8MP_CLK_GPT3>;
+ clock-names = "ipg", "per";
+ };
+
iomuxc: pinctrl@30330000 {
compatible = "fsl,imx8mp-iomuxc";
reg = <0x30330000 0x10000>;
@@ -722,6 +746,30 @@ system_counter: timer@306a0000 {
clocks = <&osc_24m>;
clock-names = "per";
};
+
+ gpt6: timer@306e0000 {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x306e0000 0x10000>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_GPT6_ROOT>, <&clk IMX8MP_CLK_GPT6>;
+ clock-names = "ipg", "per";
+ };
+
+ gpt5: timer@306f0000 {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x306f0000 0x10000>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_GPT5_ROOT>, <&clk IMX8MP_CLK_GPT5>;
+ clock-names = "ipg", "per";
+ };
+
+ gpt4: timer@30700000 {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x30700000 0x10000>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_GPT4_ROOT>, <&clk IMX8MP_CLK_GPT4>;
+ clock-names = "ipg", "per";
+ };
};
aips3: bus@30800000 {
--
2.39.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/2] arm64: dts: imx8mp: Add GPT blocks
@ 2023-03-27 17:35 ` Uwe Kleine-König
0 siblings, 0 replies; 18+ messages in thread
From: Uwe Kleine-König @ 2023-03-27 17:35 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer
Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel
The i.MX8MP includes the same GPT blocks as the i.MX6DL. Add all 6
instances.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 48 +++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index a19224fe1a6a..910534624beb 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -409,6 +409,30 @@ wdog3: watchdog@302a0000 {
status = "disabled";
};
+ gpt1: timer@302d0000 {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x302d0000 0x10000>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_GPT1_ROOT>, <&clk IMX8MP_CLK_GPT1>;
+ clock-names = "ipg", "per";
+ };
+
+ gpt2: timer@302e0000 {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x302e0000 0x10000>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_GPT2_ROOT>, <&clk IMX8MP_CLK_GPT2>;
+ clock-names = "ipg", "per";
+ };
+
+ gpt3: timer@302f0000 {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x302f0000 0x10000>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_GPT3_ROOT>, <&clk IMX8MP_CLK_GPT3>;
+ clock-names = "ipg", "per";
+ };
+
iomuxc: pinctrl@30330000 {
compatible = "fsl,imx8mp-iomuxc";
reg = <0x30330000 0x10000>;
@@ -722,6 +746,30 @@ system_counter: timer@306a0000 {
clocks = <&osc_24m>;
clock-names = "per";
};
+
+ gpt6: timer@306e0000 {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x306e0000 0x10000>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_GPT6_ROOT>, <&clk IMX8MP_CLK_GPT6>;
+ clock-names = "ipg", "per";
+ };
+
+ gpt5: timer@306f0000 {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x306f0000 0x10000>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_GPT5_ROOT>, <&clk IMX8MP_CLK_GPT5>;
+ clock-names = "ipg", "per";
+ };
+
+ gpt4: timer@30700000 {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x30700000 0x10000>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_GPT4_ROOT>, <&clk IMX8MP_CLK_GPT4>;
+ clock-names = "ipg", "per";
+ };
};
aips3: bus@30800000 {
--
2.39.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] dt-bindings: timer: fsl,imxgpt: Add i.MX8MP variant
2023-03-27 17:35 ` Uwe Kleine-König
@ 2023-03-28 6:41 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 18+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-28 6:41 UTC (permalink / raw)
To: Uwe Kleine-König, Daniel Lezcano, Thomas Gleixner,
Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer
Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel
On 27/03/2023 19:35, Uwe Kleine-König wrote:
> The i.MX8MP has the same register layout as the i.MX6DL, so add it as a
> variant allowing to add the GPT IP blocks to the i.MX8MP's dtsi file.
>
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
> Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml | 1 +
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] dt-bindings: timer: fsl,imxgpt: Add i.MX8MP variant
@ 2023-03-28 6:41 ` Krzysztof Kozlowski
0 siblings, 0 replies; 18+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-28 6:41 UTC (permalink / raw)
To: Uwe Kleine-König, Daniel Lezcano, Thomas Gleixner,
Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer
Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel
On 27/03/2023 19:35, Uwe Kleine-König wrote:
> The i.MX8MP has the same register layout as the i.MX6DL, so add it as a
> variant allowing to add the GPT IP blocks to the i.MX8MP's dtsi file.
>
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
> Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml | 1 +
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/2] arm64: dts: imx8mp: Add GPT blocks
2023-03-27 17:35 ` Uwe Kleine-König
@ 2023-03-28 11:03 ` Uwe Kleine-König
-1 siblings, 0 replies; 18+ messages in thread
From: Uwe Kleine-König @ 2023-03-28 11:03 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer
Cc: linux-arm-kernel, devicetree, Fabio Estevam, NXP Linux Team,
Pengutronix Kernel Team
[-- Attachment #1: Type: text/plain, Size: 2947 bytes --]
On Mon, Mar 27, 2023 at 07:35:24PM +0200, Uwe Kleine-König wrote:
> Hello,
>
> according to the dt binding we have the following major GPT variants:
>
> imx1
> imx21
> imx31
> imx6dl
>
> I compared the GPT documentation for i.MX8MP, i.MX6DL and i.MX6Q (which
> is a member of the imx31 variant) and didn't spot a difference. So
> either these are actually identical, or I missed a detail. In the latter
> case i.MX8MP might be a member of the imx31 variant, too, and not as
> advertised in the commit logs of the imx6dl.
TL;DR: I did it right, i.MX8MP has a GPT of the i.MX6DL type.
> Does someone know (or spot) the relevant difference?
I found it. The relevant difference is that the i.MX6DL variant has a
bit EN_24M in the CR register which is missing on i.MX31. Finding that
was a bit complicated by the fact that i.MX6Q in fact has a GPT of the
i.MX6DL type starting with rev1.1.
The only difference betweeen these two types in the gpt driver is:
static void imx31_gpt_setup_tctl(struct imx_timer *imxtm)
{
u32 tctl_val;
tctl_val = V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;
if (clk_get_rate(imxtm->clk_per) == V2_TIMER_RATE_OSC_DIV8)
tctl_val |= V2_TCTL_CLK_OSC_DIV8;
else
tctl_val |= V2_TCTL_CLK_PER;
writel_relaxed(tctl_val, imxtm->base + MXC_TCTL);
}
static void imx6dl_gpt_setup_tctl(struct imx_timer *imxtm)
{
u32 tctl_val;
tctl_val = V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;
if (clk_get_rate(imxtm->clk_per) == V2_TIMER_RATE_OSC_DIV8) {
tctl_val |= V2_TCTL_CLK_OSC_DIV8;
/* 24 / 8 = 3 MHz */
writel_relaxed(7 << V2_TPRER_PRE24M, imxtm->base + MXC_TPRER);
tctl_val |= V2_TCTL_24MEN;
} else {
tctl_val |= V2_TCTL_CLK_PER;
}
writel_relaxed(tctl_val, imxtm->base + MXC_TCTL);
}
I wonder about a few things:
- Does setting the V2_TCTL_24MEN flag has an effect on the i.MX31
variant? I assume the 24M clk is on unconditionally there?
OTOH in the RM of the i.MX31 (MCIMX31RM Rev. 2.4 12/2008) the value
V2_TCTL_CLK_OSC_DIV8 (i.e. b101) is reserved for the CLKSRC field. So
maybe the 24M clk cannot be used as a clksrc here?
- The check
clk_get_rate(imxtm->clk_per) == V2_TIMER_RATE_OSC_DIV8
looks strange. If the per clk runs at V2_TIMER_RATE_OSC_DIV8
(i.e. 3000000) Hz it's not the 24M clk, is it? So using
V2_TCTL_CLK_OSC_DIV8 has no effect?!
If the check is always false, we can handle the i.MX6DL and the
i.MX31 type GPT identically.
- Should we change i.MX6Q to use the i.MX6DL type GPT? Is rev1.0 still
relevant?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/2] arm64: dts: imx8mp: Add GPT blocks
@ 2023-03-28 11:03 ` Uwe Kleine-König
0 siblings, 0 replies; 18+ messages in thread
From: Uwe Kleine-König @ 2023-03-28 11:03 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer
Cc: linux-arm-kernel, devicetree, Fabio Estevam, NXP Linux Team,
Pengutronix Kernel Team
[-- Attachment #1.1: Type: text/plain, Size: 2947 bytes --]
On Mon, Mar 27, 2023 at 07:35:24PM +0200, Uwe Kleine-König wrote:
> Hello,
>
> according to the dt binding we have the following major GPT variants:
>
> imx1
> imx21
> imx31
> imx6dl
>
> I compared the GPT documentation for i.MX8MP, i.MX6DL and i.MX6Q (which
> is a member of the imx31 variant) and didn't spot a difference. So
> either these are actually identical, or I missed a detail. In the latter
> case i.MX8MP might be a member of the imx31 variant, too, and not as
> advertised in the commit logs of the imx6dl.
TL;DR: I did it right, i.MX8MP has a GPT of the i.MX6DL type.
> Does someone know (or spot) the relevant difference?
I found it. The relevant difference is that the i.MX6DL variant has a
bit EN_24M in the CR register which is missing on i.MX31. Finding that
was a bit complicated by the fact that i.MX6Q in fact has a GPT of the
i.MX6DL type starting with rev1.1.
The only difference betweeen these two types in the gpt driver is:
static void imx31_gpt_setup_tctl(struct imx_timer *imxtm)
{
u32 tctl_val;
tctl_val = V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;
if (clk_get_rate(imxtm->clk_per) == V2_TIMER_RATE_OSC_DIV8)
tctl_val |= V2_TCTL_CLK_OSC_DIV8;
else
tctl_val |= V2_TCTL_CLK_PER;
writel_relaxed(tctl_val, imxtm->base + MXC_TCTL);
}
static void imx6dl_gpt_setup_tctl(struct imx_timer *imxtm)
{
u32 tctl_val;
tctl_val = V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;
if (clk_get_rate(imxtm->clk_per) == V2_TIMER_RATE_OSC_DIV8) {
tctl_val |= V2_TCTL_CLK_OSC_DIV8;
/* 24 / 8 = 3 MHz */
writel_relaxed(7 << V2_TPRER_PRE24M, imxtm->base + MXC_TPRER);
tctl_val |= V2_TCTL_24MEN;
} else {
tctl_val |= V2_TCTL_CLK_PER;
}
writel_relaxed(tctl_val, imxtm->base + MXC_TCTL);
}
I wonder about a few things:
- Does setting the V2_TCTL_24MEN flag has an effect on the i.MX31
variant? I assume the 24M clk is on unconditionally there?
OTOH in the RM of the i.MX31 (MCIMX31RM Rev. 2.4 12/2008) the value
V2_TCTL_CLK_OSC_DIV8 (i.e. b101) is reserved for the CLKSRC field. So
maybe the 24M clk cannot be used as a clksrc here?
- The check
clk_get_rate(imxtm->clk_per) == V2_TIMER_RATE_OSC_DIV8
looks strange. If the per clk runs at V2_TIMER_RATE_OSC_DIV8
(i.e. 3000000) Hz it's not the 24M clk, is it? So using
V2_TCTL_CLK_OSC_DIV8 has no effect?!
If the check is always false, we can handle the i.MX6DL and the
i.MX31 type GPT identically.
- Should we change i.MX6Q to use the i.MX6DL type GPT? Is rev1.0 still
relevant?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] arm64: dts: imx8mp: Add GPT blocks
2023-03-27 17:35 ` Uwe Kleine-König
@ 2023-04-05 13:37 ` Shawn Guo
-1 siblings, 0 replies; 18+ messages in thread
From: Shawn Guo @ 2023-04-05 13:37 UTC (permalink / raw)
To: Uwe Kleine-König
Cc: Rob Herring, Krzysztof Kozlowski, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel
On Mon, Mar 27, 2023 at 07:35:26PM +0200, Uwe Kleine-König wrote:
> The i.MX8MP includes the same GPT blocks as the i.MX6DL. Add all 6
> instances.
>
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Applied, thanks!
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] arm64: dts: imx8mp: Add GPT blocks
@ 2023-04-05 13:37 ` Shawn Guo
0 siblings, 0 replies; 18+ messages in thread
From: Shawn Guo @ 2023-04-05 13:37 UTC (permalink / raw)
To: Uwe Kleine-König
Cc: Rob Herring, Krzysztof Kozlowski, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel
On Mon, Mar 27, 2023 at 07:35:26PM +0200, Uwe Kleine-König wrote:
> The i.MX8MP includes the same GPT blocks as the i.MX6DL. Add all 6
> instances.
>
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Applied, thanks!
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/2] arm64: dts: imx8mp: Add GPT blocks
2023-03-28 11:03 ` Uwe Kleine-König
(?)
@ 2023-05-10 6:40 ` Alexander Stein
-1 siblings, 0 replies; 18+ messages in thread
From: Alexander Stein @ 2023-05-10 6:40 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer, linux-arm-kernel
Cc: linux-arm-kernel, devicetree, Fabio Estevam, NXP Linux Team,
Pengutronix Kernel Team, Uwe Kleine-König
Hi Uwe,
Am Dienstag, 28. März 2023, 13:03:07 CEST schrieb Uwe Kleine-König:
> * PGP Signed by an unknown key
>
> On Mon, Mar 27, 2023 at 07:35:24PM +0200, Uwe Kleine-König wrote:
> > Hello,
> >
> > according to the dt binding we have the following major GPT variants:
> > imx1
> > imx21
> > imx31
> > imx6dl
> >
> > I compared the GPT documentation for i.MX8MP, i.MX6DL and i.MX6Q (which
> > is a member of the imx31 variant) and didn't spot a difference. So
> > either these are actually identical, or I missed a detail. In the latter
> > case i.MX8MP might be a member of the imx31 variant, too, and not as
> > advertised in the commit logs of the imx6dl.
>
> TL;DR: I did it right, i.MX8MP has a GPT of the i.MX6DL type.
>
> > Does someone know (or spot) the relevant difference?
>
> I found it. The relevant difference is that the i.MX6DL variant has a
> bit EN_24M in the CR register which is missing on i.MX31. Finding that
> was a bit complicated by the fact that i.MX6Q in fact has a GPT of the
> i.MX6DL type starting with rev1.1.
>
> The only difference betweeen these two types in the gpt driver is:
>
> static void imx31_gpt_setup_tctl(struct imx_timer *imxtm)
> {
> u32 tctl_val;
>
> tctl_val = V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;
> if (clk_get_rate(imxtm->clk_per) == V2_TIMER_RATE_OSC_DIV8)
> tctl_val |= V2_TCTL_CLK_OSC_DIV8;
> else
> tctl_val |= V2_TCTL_CLK_PER;
>
> writel_relaxed(tctl_val, imxtm->base + MXC_TCTL);
> }
>
> static void imx6dl_gpt_setup_tctl(struct imx_timer *imxtm)
> {
> u32 tctl_val;
>
> tctl_val = V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;
> if (clk_get_rate(imxtm->clk_per) == V2_TIMER_RATE_OSC_DIV8) {
> tctl_val |= V2_TCTL_CLK_OSC_DIV8;
> /* 24 / 8 = 3 MHz */
> writel_relaxed(7 << V2_TPRER_PRE24M, imxtm->base +
> MXC_TPRER); tctl_val |= V2_TCTL_24MEN;
> } else {
> tctl_val |= V2_TCTL_CLK_PER;
> }
>
> writel_relaxed(tctl_val, imxtm->base + MXC_TCTL);
> }
>
> I wonder about a few things:
>
> - Does setting the V2_TCTL_24MEN flag has an effect on the i.MX31
> variant? I assume the 24M clk is on unconditionally there?
> OTOH in the RM of the i.MX31 (MCIMX31RM Rev. 2.4 12/2008) the value
> V2_TCTL_CLK_OSC_DIV8 (i.e. b101) is reserved for the CLKSRC field. So
> maybe the 24M clk cannot be used as a clksrc here?
>
> - The check
>
> clk_get_rate(imxtm->clk_per) == V2_TIMER_RATE_OSC_DIV8
>
> looks strange. If the per clk runs at V2_TIMER_RATE_OSC_DIV8
> (i.e. 3000000) Hz it's not the 24M clk, is it? So using
> V2_TCTL_CLK_OSC_DIV8 has no effect?!
>
> If the check is always false, we can handle the i.MX6DL and the
> i.MX31 type GPT identically.
I think this is related to commit 2b2244a3e7c3 ("ARM: dts: imx6: make gpt per
clock can be from OSC") where clk_per can be set to 3MHz for imx6qdl. The
commit message also mentions i.mx6q > rev 1.0.
This 'osc_per' is also currently causing a lot of dtbs_check warnings for
imx6qdl boards.
Best regards,
Alexander
> - Should we change i.MX6Q to use the i.MX6DL type GPT? Is rev1.0 still
> relevant?
>
> Best regards
> Uwe
--
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] dt-bindings: timer: fsl,imxgpt: Add i.MX8MP variant
2023-03-27 17:35 ` Uwe Kleine-König
(?)
(?)
@ 2023-05-14 22:17 ` Uwe Kleine-König
2023-06-07 22:23 ` Marek Vasut
-1 siblings, 1 reply; 18+ messages in thread
From: Uwe Kleine-König @ 2023-05-14 22:17 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer
Cc: linux-arm-kernel, devicetree, Fabio Estevam, NXP Linux Team,
Pengutronix Kernel Team, Marek Vasut
[-- Attachment #1: Type: text/plain, Size: 1290 bytes --]
Hello,
On Mon, Mar 27, 2023 at 07:35:25PM +0200, Uwe Kleine-König wrote:
> The i.MX8MP has the same register layout as the i.MX6DL, so add it as a
> variant allowing to add the GPT IP blocks to the i.MX8MP's dtsi file.
>
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
> Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
> index 716c6afcca1f..f5f8b297da13 100644
> --- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
> +++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
> @@ -31,6 +31,7 @@ properties:
> - enum:
> - fsl,imx6sl-gpt
> - fsl,imx6sx-gpt
> + - fsl,imx8mp-gpt
> - fsl,imxrt1050-gpt
> - fsl,imxrt1170-gpt
> - const: fsl,imx6dl-gpt
Patch 2 (which makes use of fsl,imx8mp-gpt in the imx8mp.dtsi) is
already applied. I wonder who will pick up this one?!
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] dt-bindings: timer: fsl,imxgpt: Add i.MX8MP variant
2023-05-14 22:17 ` Uwe Kleine-König
@ 2023-06-07 22:23 ` Marek Vasut
0 siblings, 0 replies; 18+ messages in thread
From: Marek Vasut @ 2023-06-07 22:23 UTC (permalink / raw)
To: Uwe Kleine-König, Daniel Lezcano, Thomas Gleixner,
Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer
Cc: linux-arm-kernel, devicetree, Fabio Estevam, NXP Linux Team,
Pengutronix Kernel Team
On 5/15/23 00:17, Uwe Kleine-König wrote:
> Hello,
>
> On Mon, Mar 27, 2023 at 07:35:25PM +0200, Uwe Kleine-König wrote:
>> The i.MX8MP has the same register layout as the i.MX6DL, so add it as a
>> variant allowing to add the GPT IP blocks to the i.MX8MP's dtsi file.
>>
>> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
>> ---
>> Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
>> index 716c6afcca1f..f5f8b297da13 100644
>> --- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
>> +++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
>> @@ -31,6 +31,7 @@ properties:
>> - enum:
>> - fsl,imx6sl-gpt
>> - fsl,imx6sx-gpt
>> + - fsl,imx8mp-gpt
>> - fsl,imxrt1050-gpt
>> - fsl,imxrt1170-gpt
>> - const: fsl,imx6dl-gpt
>
> Patch 2 (which makes use of fsl,imx8mp-gpt in the imx8mp.dtsi) is
> already applied. I wonder who will pick up this one?!
Rob, since you just applied
[PATCH V4 2/2] dt-bindings: imxgpt: add imx6ul compatible
Can you please also pick this one ?
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] dt-bindings: timer: fsl,imxgpt: Add i.MX8MP variant
@ 2023-06-07 22:23 ` Marek Vasut
0 siblings, 0 replies; 18+ messages in thread
From: Marek Vasut @ 2023-06-07 22:23 UTC (permalink / raw)
To: Uwe Kleine-König, Daniel Lezcano, Thomas Gleixner,
Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer
Cc: linux-arm-kernel, devicetree, Fabio Estevam, NXP Linux Team,
Pengutronix Kernel Team
On 5/15/23 00:17, Uwe Kleine-König wrote:
> Hello,
>
> On Mon, Mar 27, 2023 at 07:35:25PM +0200, Uwe Kleine-König wrote:
>> The i.MX8MP has the same register layout as the i.MX6DL, so add it as a
>> variant allowing to add the GPT IP blocks to the i.MX8MP's dtsi file.
>>
>> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
>> ---
>> Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
>> index 716c6afcca1f..f5f8b297da13 100644
>> --- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
>> +++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
>> @@ -31,6 +31,7 @@ properties:
>> - enum:
>> - fsl,imx6sl-gpt
>> - fsl,imx6sx-gpt
>> + - fsl,imx8mp-gpt
>> - fsl,imxrt1050-gpt
>> - fsl,imxrt1170-gpt
>> - const: fsl,imx6dl-gpt
>
> Patch 2 (which makes use of fsl,imx8mp-gpt in the imx8mp.dtsi) is
> already applied. I wonder who will pick up this one?!
Rob, since you just applied
[PATCH V4 2/2] dt-bindings: imxgpt: add imx6ul compatible
Can you please also pick this one ?
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] dt-bindings: timer: fsl,imxgpt: Add i.MX8MP variant
2023-03-27 17:35 ` Uwe Kleine-König
@ 2023-06-15 17:31 ` Rob Herring
-1 siblings, 0 replies; 18+ messages in thread
From: Rob Herring @ 2023-06-15 17:31 UTC (permalink / raw)
To: Uwe Kleine-König
Cc: Rob Herring, NXP Linux Team, Krzysztof Kozlowski, Fabio Estevam,
Shawn Guo, Daniel Lezcano, Thomas Gleixner, Sascha Hauer,
devicetree, linux-arm-kernel, Pengutronix Kernel Team
On Mon, 27 Mar 2023 19:35:25 +0200, Uwe Kleine-König wrote:
> The i.MX8MP has the same register layout as the i.MX6DL, so add it as a
> variant allowing to add the GPT IP blocks to the i.MX8MP's dtsi file.
>
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
> Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Applied, thanks!
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] dt-bindings: timer: fsl,imxgpt: Add i.MX8MP variant
@ 2023-06-15 17:31 ` Rob Herring
0 siblings, 0 replies; 18+ messages in thread
From: Rob Herring @ 2023-06-15 17:31 UTC (permalink / raw)
To: Uwe Kleine-König
Cc: Rob Herring, NXP Linux Team, Krzysztof Kozlowski, Fabio Estevam,
Shawn Guo, Daniel Lezcano, Thomas Gleixner, Sascha Hauer,
devicetree, linux-arm-kernel, Pengutronix Kernel Team
On Mon, 27 Mar 2023 19:35:25 +0200, Uwe Kleine-König wrote:
> The i.MX8MP has the same register layout as the i.MX6DL, so add it as a
> variant allowing to add the GPT IP blocks to the i.MX8MP's dtsi file.
>
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
> Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Applied, thanks!
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2023-06-15 17:32 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-27 17:35 [PATCH 0/2] arm64: dts: imx8mp: Add GPT blocks Uwe Kleine-König
2023-03-27 17:35 ` Uwe Kleine-König
2023-03-27 17:35 ` [PATCH 1/2] dt-bindings: timer: fsl,imxgpt: Add i.MX8MP variant Uwe Kleine-König
2023-03-27 17:35 ` Uwe Kleine-König
2023-03-28 6:41 ` Krzysztof Kozlowski
2023-03-28 6:41 ` Krzysztof Kozlowski
2023-05-14 22:17 ` Uwe Kleine-König
2023-06-07 22:23 ` Marek Vasut
2023-06-07 22:23 ` Marek Vasut
2023-06-15 17:31 ` Rob Herring
2023-06-15 17:31 ` Rob Herring
2023-03-27 17:35 ` [PATCH 2/2] arm64: dts: imx8mp: Add GPT blocks Uwe Kleine-König
2023-03-27 17:35 ` Uwe Kleine-König
2023-04-05 13:37 ` Shawn Guo
2023-04-05 13:37 ` Shawn Guo
2023-03-28 11:03 ` [PATCH 0/2] " Uwe Kleine-König
2023-03-28 11:03 ` Uwe Kleine-König
2023-05-10 6:40 ` Alexander Stein
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