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From: Song Gao <gaosong@loongson.cn>
To: qemu-devel@nongnu.org
Cc: richard.henderson@linaro.org
Subject: [RFC PATCH v2 23/44] target/loongarch: Implement vsll vsrl vsra vrotr
Date: Tue, 28 Mar 2023 11:06:10 +0800	[thread overview]
Message-ID: <20230328030631.3117129-24-gaosong@loongson.cn> (raw)
In-Reply-To: <20230328030631.3117129-1-gaosong@loongson.cn>

This patch includes:
- VSLL[I].{B/H/W/D};
- VSRL[I].{B/H/W/D};
- VSRA[I].{B/H/W/D};
- VROTR[I].{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/disas.c                    | 36 +++++++++++++++++++++
 target/loongarch/insn_trans/trans_lsx.c.inc | 36 +++++++++++++++++++++
 target/loongarch/insns.decode               | 36 +++++++++++++++++++++
 3 files changed, 108 insertions(+)

diff --git a/target/loongarch/disas.c b/target/loongarch/disas.c
index eca0a4bb7b..f7d0fb4441 100644
--- a/target/loongarch/disas.c
+++ b/target/loongarch/disas.c
@@ -1103,3 +1103,39 @@ INSN_LSX(vandi_b,          vv_i)
 INSN_LSX(vori_b,           vv_i)
 INSN_LSX(vxori_b,          vv_i)
 INSN_LSX(vnori_b,          vv_i)
+
+INSN_LSX(vsll_b,           vvv)
+INSN_LSX(vsll_h,           vvv)
+INSN_LSX(vsll_w,           vvv)
+INSN_LSX(vsll_d,           vvv)
+INSN_LSX(vslli_b,          vv_i)
+INSN_LSX(vslli_h,          vv_i)
+INSN_LSX(vslli_w,          vv_i)
+INSN_LSX(vslli_d,          vv_i)
+
+INSN_LSX(vsrl_b,           vvv)
+INSN_LSX(vsrl_h,           vvv)
+INSN_LSX(vsrl_w,           vvv)
+INSN_LSX(vsrl_d,           vvv)
+INSN_LSX(vsrli_b,          vv_i)
+INSN_LSX(vsrli_h,          vv_i)
+INSN_LSX(vsrli_w,          vv_i)
+INSN_LSX(vsrli_d,          vv_i)
+
+INSN_LSX(vsra_b,           vvv)
+INSN_LSX(vsra_h,           vvv)
+INSN_LSX(vsra_w,           vvv)
+INSN_LSX(vsra_d,           vvv)
+INSN_LSX(vsrai_b,          vv_i)
+INSN_LSX(vsrai_h,          vv_i)
+INSN_LSX(vsrai_w,          vv_i)
+INSN_LSX(vsrai_d,          vv_i)
+
+INSN_LSX(vrotr_b,          vvv)
+INSN_LSX(vrotr_h,          vvv)
+INSN_LSX(vrotr_w,          vvv)
+INSN_LSX(vrotr_d,          vvv)
+INSN_LSX(vrotri_b,         vv_i)
+INSN_LSX(vrotri_h,         vv_i)
+INSN_LSX(vrotri_w,         vv_i)
+INSN_LSX(vrotri_d,         vv_i)
diff --git a/target/loongarch/insn_trans/trans_lsx.c.inc b/target/loongarch/insn_trans/trans_lsx.c.inc
index c20d77bd3a..84c8d92ad6 100644
--- a/target/loongarch/insn_trans/trans_lsx.c.inc
+++ b/target/loongarch/insn_trans/trans_lsx.c.inc
@@ -2618,3 +2618,39 @@ static void do_vnori_b(unsigned vece, uint32_t vd_ofs, uint32_t vj_ofs,
 }
 
 TRANS(vnori_b, gvec_vv_i, MO_8, do_vnori_b)
+
+TRANS(vsll_b, gvec_vvv, MO_8, tcg_gen_gvec_shlv)
+TRANS(vsll_h, gvec_vvv, MO_16, tcg_gen_gvec_shlv)
+TRANS(vsll_w, gvec_vvv, MO_32, tcg_gen_gvec_shlv)
+TRANS(vsll_d, gvec_vvv, MO_64, tcg_gen_gvec_shlv)
+TRANS(vslli_b, gvec_vv_i, MO_8, tcg_gen_gvec_shli)
+TRANS(vslli_h, gvec_vv_i, MO_16, tcg_gen_gvec_shli)
+TRANS(vslli_w, gvec_vv_i, MO_32, tcg_gen_gvec_shli)
+TRANS(vslli_d, gvec_vv_i, MO_64, tcg_gen_gvec_shli)
+
+TRANS(vsrl_b, gvec_vvv, MO_8, tcg_gen_gvec_shrv)
+TRANS(vsrl_h, gvec_vvv, MO_16, tcg_gen_gvec_shrv)
+TRANS(vsrl_w, gvec_vvv, MO_32, tcg_gen_gvec_shrv)
+TRANS(vsrl_d, gvec_vvv, MO_64, tcg_gen_gvec_shrv)
+TRANS(vsrli_b, gvec_vv_i, MO_8, tcg_gen_gvec_shri)
+TRANS(vsrli_h, gvec_vv_i, MO_16, tcg_gen_gvec_shri)
+TRANS(vsrli_w, gvec_vv_i, MO_32, tcg_gen_gvec_shri)
+TRANS(vsrli_d, gvec_vv_i, MO_64, tcg_gen_gvec_shri)
+
+TRANS(vsra_b, gvec_vvv, MO_8, tcg_gen_gvec_sarv)
+TRANS(vsra_h, gvec_vvv, MO_16, tcg_gen_gvec_sarv)
+TRANS(vsra_w, gvec_vvv, MO_32, tcg_gen_gvec_sarv)
+TRANS(vsra_d, gvec_vvv, MO_64, tcg_gen_gvec_sarv)
+TRANS(vsrai_b, gvec_vv_i, MO_8, tcg_gen_gvec_sari)
+TRANS(vsrai_h, gvec_vv_i, MO_16, tcg_gen_gvec_sari)
+TRANS(vsrai_w, gvec_vv_i, MO_32, tcg_gen_gvec_sari)
+TRANS(vsrai_d, gvec_vv_i, MO_64, tcg_gen_gvec_sari)
+
+TRANS(vrotr_b, gvec_vvv, MO_8, tcg_gen_gvec_rotrv)
+TRANS(vrotr_h, gvec_vvv, MO_16, tcg_gen_gvec_rotrv)
+TRANS(vrotr_w, gvec_vvv, MO_32, tcg_gen_gvec_rotrv)
+TRANS(vrotr_d, gvec_vvv, MO_64, tcg_gen_gvec_rotrv)
+TRANS(vrotri_b, gvec_vv_i, MO_8, tcg_gen_gvec_rotri)
+TRANS(vrotri_h, gvec_vv_i, MO_16, tcg_gen_gvec_rotri)
+TRANS(vrotri_w, gvec_vv_i, MO_32, tcg_gen_gvec_rotri)
+TRANS(vrotri_d, gvec_vv_i, MO_64, tcg_gen_gvec_rotri)
diff --git a/target/loongarch/insns.decode b/target/loongarch/insns.decode
index 6309683be9..7c0b0c4ac8 100644
--- a/target/loongarch/insns.decode
+++ b/target/loongarch/insns.decode
@@ -803,3 +803,39 @@ vandi_b          0111 00111101 00 ........ ..... .....    @vv_ui8
 vori_b           0111 00111101 01 ........ ..... .....    @vv_ui8
 vxori_b          0111 00111101 10 ........ ..... .....    @vv_ui8
 vnori_b          0111 00111101 11 ........ ..... .....    @vv_ui8
+
+vsll_b           0111 00001110 10000 ..... ..... .....    @vvv
+vsll_h           0111 00001110 10001 ..... ..... .....    @vvv
+vsll_w           0111 00001110 10010 ..... ..... .....    @vvv
+vsll_d           0111 00001110 10011 ..... ..... .....    @vvv
+vslli_b          0111 00110010 11000 01 ... ..... .....   @vv_ui3
+vslli_h          0111 00110010 11000 1 .... ..... .....   @vv_ui4
+vslli_w          0111 00110010 11001 ..... ..... .....    @vv_ui5
+vslli_d          0111 00110010 1101 ...... ..... .....    @vv_ui6
+
+vsrl_b           0111 00001110 10100 ..... ..... .....    @vvv
+vsrl_h           0111 00001110 10101 ..... ..... .....    @vvv
+vsrl_w           0111 00001110 10110 ..... ..... .....    @vvv
+vsrl_d           0111 00001110 10111 ..... ..... .....    @vvv
+vsrli_b          0111 00110011 00000 01 ... ..... .....   @vv_ui3
+vsrli_h          0111 00110011 00000 1 .... ..... .....   @vv_ui4
+vsrli_w          0111 00110011 00001 ..... ..... .....    @vv_ui5
+vsrli_d          0111 00110011 0001 ...... ..... .....    @vv_ui6
+
+vsra_b           0111 00001110 11000 ..... ..... .....    @vvv
+vsra_h           0111 00001110 11001 ..... ..... .....    @vvv
+vsra_w           0111 00001110 11010 ..... ..... .....    @vvv
+vsra_d           0111 00001110 11011 ..... ..... .....    @vvv
+vsrai_b          0111 00110011 01000 01 ... ..... .....   @vv_ui3
+vsrai_h          0111 00110011 01000 1 .... ..... .....   @vv_ui4
+vsrai_w          0111 00110011 01001 ..... ..... .....    @vv_ui5
+vsrai_d          0111 00110011 0101 ...... ..... .....    @vv_ui6
+
+vrotr_b          0111 00001110 11100 ..... ..... .....    @vvv
+vrotr_h          0111 00001110 11101 ..... ..... .....    @vvv
+vrotr_w          0111 00001110 11110 ..... ..... .....    @vvv
+vrotr_d          0111 00001110 11111 ..... ..... .....    @vvv
+vrotri_b         0111 00101010 00000 01 ... ..... .....   @vv_ui3
+vrotri_h         0111 00101010 00000 1 .... ..... .....   @vv_ui4
+vrotri_w         0111 00101010 00001 ..... ..... .....    @vv_ui5
+vrotri_d         0111 00101010 0001 ...... ..... .....    @vv_ui6
-- 
2.31.1



  parent reply	other threads:[~2023-03-28  3:13 UTC|newest]

Thread overview: 114+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-28  3:05 [RFC PATCH v2 00/44] Add LoongArch LSX instructions Song Gao
2023-03-28  3:05 ` [RFC PATCH v2 01/44] target/loongarch: Add LSX data type VReg Song Gao
2023-03-28 19:56   ` Richard Henderson
2023-03-29  2:28     ` gaosong
2023-03-28  3:05 ` [RFC PATCH v2 02/44] target/loongarch: CPUCFG support LSX Song Gao
2023-03-28 19:33   ` Richard Henderson
2023-03-28  3:05 ` [RFC PATCH v2 03/44] target/loongarch: meson.build support build LSX Song Gao
2023-03-28 19:35   ` Richard Henderson
2023-03-28  3:05 ` [RFC PATCH v2 04/44] target/loongarch: Add CHECK_SXE maccro for check LSX enable Song Gao
2023-03-28 19:42   ` Richard Henderson
2023-03-29  2:28     ` gaosong
2023-03-28  3:05 ` [RFC PATCH v2 05/44] target/loongarch: Implement vadd/vsub Song Gao
2023-03-28 19:50   ` Richard Henderson
2023-03-28 19:59   ` Richard Henderson
2023-03-29  9:59     ` gaosong
2023-03-29 15:22       ` Richard Henderson
2023-03-28  3:05 ` [RFC PATCH v2 06/44] target/loongarch: Implement vaddi/vsubi Song Gao
2023-03-28 19:58   ` Richard Henderson
2023-03-28  3:05 ` [RFC PATCH v2 07/44] target/loongarch: Implement vneg Song Gao
2023-03-28 20:02   ` Richard Henderson
2023-03-28  3:05 ` [RFC PATCH v2 08/44] target/loongarch: Implement vsadd/vssub Song Gao
2023-03-28 20:03   ` Richard Henderson
2023-03-28  3:05 ` [RFC PATCH v2 09/44] target/loongarch: Implement vhaddw/vhsubw Song Gao
2023-03-28 20:17   ` Richard Henderson
2023-03-29  3:24     ` gaosong
2023-03-29 15:25       ` Richard Henderson
2023-03-28  3:05 ` [RFC PATCH v2 10/44] target/loongarch: Implement vaddw/vsubw Song Gao
2023-03-28 20:28   ` Richard Henderson
2023-03-28  3:05 ` [RFC PATCH v2 11/44] target/loongarch: Implement vavg/vavgr Song Gao
2023-03-28 20:31   ` Richard Henderson
2023-03-28  3:05 ` [RFC PATCH v2 12/44] target/loongarch: Implement vabsd Song Gao
2023-03-28 20:32   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 13/44] target/loongarch: Implement vadda Song Gao
2023-03-28 20:33   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 14/44] target/loongarch: Implement vmax/vmin Song Gao
2023-03-28 20:39   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 15/44] target/loongarch: Implement vmul/vmuh/vmulw{ev/od} Song Gao
2023-03-28 20:46   ` Richard Henderson
2023-04-06 12:09     ` gaosong
2023-04-06 16:52       ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 16/44] target/loongarch: Implement vmadd/vmsub/vmaddw{ev/od} Song Gao
2023-03-28 20:50   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 17/44] target/loongarch: Implement vdiv/vmod Song Gao
2023-03-28 20:52   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 18/44] target/loongarch: Implement vsat Song Gao
2023-04-01  5:03   ` Richard Henderson
2023-04-03 12:55     ` gaosong
2023-04-03 20:13       ` Richard Henderson
2023-04-04  2:11         ` gaosong
2023-04-04  3:46           ` Richard Henderson
2023-04-19  9:31     ` Song Gao
2023-04-19 11:06       ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 19/44] target/loongarch: Implement vexth Song Gao
2023-04-01  5:07   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 20/44] target/loongarch: Implement vsigncov Song Gao
2023-04-01  5:11   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 21/44] target/loongarch: Implement vmskltz/vmskgez/vmsknz Song Gao
2023-04-01  5:20   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 22/44] target/loongarch: Implement LSX logic instructions Song Gao
2023-04-01  5:31   ` Richard Henderson
2023-03-28  3:06 ` Song Gao [this message]
2023-04-01  5:38   ` [RFC PATCH v2 23/44] target/loongarch: Implement vsll vsrl vsra vrotr Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 24/44] target/loongarch: Implement vsllwil vextl Song Gao
2023-04-01  5:40   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 25/44] target/loongarch: Implement vsrlr vsrar Song Gao
2023-04-01  5:42   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 26/44] target/loongarch: Implement vsrln vsran Song Gao
2023-04-01  5:46   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 27/44] target/loongarch: Implement vsrlrn vsrarn Song Gao
2023-04-01  5:53   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 28/44] target/loongarch: Implement vssrln vssran Song Gao
2023-04-02  3:26   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 29/44] target/loongarch: Implement vssrlrn vssrarn Song Gao
2023-04-02  3:31   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 30/44] target/loongarch: Implement vclo vclz Song Gao
2023-04-02  3:34   ` Richard Henderson
2023-04-07  7:40     ` gaosong
2023-04-07 16:46       ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 31/44] target/loongarch: Implement vpcnt Song Gao
2023-04-02  3:35   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 32/44] target/loongarch: Implement vbitclr vbitset vbitrev Song Gao
2023-04-02  5:14   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 33/44] target/loongarch: Implement vfrstp Song Gao
2023-04-02  5:17   ` Richard Henderson
2023-04-03  2:27     ` gaosong
2023-03-28  3:06 ` [RFC PATCH v2 34/44] target/loongarch: Implement LSX fpu arith instructions Song Gao
2023-04-02  5:19   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 35/44] target/loongarch: Implement LSX fpu fcvt instructions Song Gao
2023-04-02  5:22   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 36/44] target/loongarch: Implement vseq vsle vslt Song Gao
2023-04-02  5:27   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 37/44] target/loongarch: Implement vfcmp Song Gao
2023-04-04  0:47   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 38/44] target/loongarch: Implement vbitsel vset Song Gao
2023-04-04  1:03   ` Richard Henderson
2023-04-11 11:37     ` gaosong
2023-04-12  6:53       ` Richard Henderson
2023-04-13  2:53         ` gaosong
2023-04-13 10:06           ` Richard Henderson
2023-04-14  3:22             ` gaosong
2023-04-14  3:47               ` gaosong
2023-03-28  3:06 ` [RFC PATCH v2 39/44] target/loongarch: Implement vinsgr2vr vpickve2gr vreplgr2vr Song Gao
2023-04-04  1:09   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 40/44] target/loongarch: Implement vreplve vpack vpick Song Gao
2023-04-04  1:17   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 41/44] target/loongarch: Implement vilvl vilvh vextrins vshuf Song Gao
2023-04-04  1:31   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 42/44] target/loongarch: Implement vld vst Song Gao
2023-04-04  3:35   ` Richard Henderson
2023-03-28  3:06 ` [RFC PATCH v2 43/44] target/loongarch: Implement vldi Song Gao
2023-04-04  3:39   ` Richard Henderson
2023-04-18  9:03     ` Song Gao
2023-03-28  3:06 ` [RFC PATCH v2 44/44] target/loongarch: Use {set/get}_gpr replace to cpu_fpr Song Gao
2023-04-04  3:44   ` Richard Henderson

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