From: Nishanth Menon <nm@ti.com>
To: Vaishnav Achath <vaishnav.a@ti.com>
Cc: Sinthu Raja <sinthu.raja@mistralsolutions.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Vignesh Raghavendra <vigneshr@ti.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Sinthu Raja <sinthu.raja@ti.com>
Subject: Re: [PATCH V3 1/2] arm64: dts: ti: k3-j721s2-mcu-wakeup: Fix IO PADCONFIG size for wakeup domain
Date: Tue, 28 Mar 2023 06:47:42 -0500 [thread overview]
Message-ID: <20230328114742.tnaa5hi3qm3rsgld@ecology> (raw)
In-Reply-To: <5f08cb2f-d2de-8e4e-a9be-1ef3a5fd3a39@ti.com>
On 16:48-20230328, Vaishnav Achath wrote:
> Hi Sinthu,
>
> On 16/03/23 17:11, Sinthu Raja wrote:
> > From: Sinthu Raja <sinthu.raja@ti.com>
> >
> > The size of wkup domain I/O PADCONFIG register set is incorrect for J721S2.
> > Therefore, update the PADCONFIG total offset size to the correct value for
> > J721S22 SoC.
> >
> > Fixes: b8545f9d3a54 ("arm64: dts: ti: Add initial support for J721S2 SoC")
> > Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
> > ---
> >
> > Changes in V3:
> > - Added Fix tag
> >
> > Changes in V2:
> > - Update commit description.
> > - Update the offset value to 0x194 because 0x190 is the last register of the
> > IO PADCONFIG register set.
> >
>
> The existing PADCONFIG register region descriptions in the pinctrl nodes seems
> to be incorrect for j721s2-main and j721s2-mcu-wakeup due to non-addressable
> holes in the region which causes bus aborts when the registers are read and
> causes system crash if we read something like,
> /sys/kernel/debug/pinctrl/4301c000.pinctrl-pinctrl-single/pins
>
> This is what I saw from inspection of the datasheet:
>
> * WKUP_PADCONFIG13, WKUP_PADCONFIG25 missing in WKUP_PADCONFIG region
> * MAIN_PADCONFIG 64-68 missing in MAIN_PADCONFIG region
>
> I have verified that your patch does not introduce new issues, but since it is a
> Fix patch, I will defer the decision to the maintainers on whether we should
> split the nodes to avoid non-addressable regions and fix it completely here or
> later do a fix for the split.
Do a single fix-up please.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
WARNING: multiple messages have this Message-ID (diff)
From: Nishanth Menon <nm@ti.com>
To: Vaishnav Achath <vaishnav.a@ti.com>
Cc: Sinthu Raja <sinthu.raja@mistralsolutions.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Vignesh Raghavendra <vigneshr@ti.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Sinthu Raja <sinthu.raja@ti.com>
Subject: Re: [PATCH V3 1/2] arm64: dts: ti: k3-j721s2-mcu-wakeup: Fix IO PADCONFIG size for wakeup domain
Date: Tue, 28 Mar 2023 06:47:42 -0500 [thread overview]
Message-ID: <20230328114742.tnaa5hi3qm3rsgld@ecology> (raw)
In-Reply-To: <5f08cb2f-d2de-8e4e-a9be-1ef3a5fd3a39@ti.com>
On 16:48-20230328, Vaishnav Achath wrote:
> Hi Sinthu,
>
> On 16/03/23 17:11, Sinthu Raja wrote:
> > From: Sinthu Raja <sinthu.raja@ti.com>
> >
> > The size of wkup domain I/O PADCONFIG register set is incorrect for J721S2.
> > Therefore, update the PADCONFIG total offset size to the correct value for
> > J721S22 SoC.
> >
> > Fixes: b8545f9d3a54 ("arm64: dts: ti: Add initial support for J721S2 SoC")
> > Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
> > ---
> >
> > Changes in V3:
> > - Added Fix tag
> >
> > Changes in V2:
> > - Update commit description.
> > - Update the offset value to 0x194 because 0x190 is the last register of the
> > IO PADCONFIG register set.
> >
>
> The existing PADCONFIG register region descriptions in the pinctrl nodes seems
> to be incorrect for j721s2-main and j721s2-mcu-wakeup due to non-addressable
> holes in the region which causes bus aborts when the registers are read and
> causes system crash if we read something like,
> /sys/kernel/debug/pinctrl/4301c000.pinctrl-pinctrl-single/pins
>
> This is what I saw from inspection of the datasheet:
>
> * WKUP_PADCONFIG13, WKUP_PADCONFIG25 missing in WKUP_PADCONFIG region
> * MAIN_PADCONFIG 64-68 missing in MAIN_PADCONFIG region
>
> I have verified that your patch does not introduce new issues, but since it is a
> Fix patch, I will defer the decision to the maintainers on whether we should
> split the nodes to avoid non-addressable regions and fix it completely here or
> later do a fix for the split.
Do a single fix-up please.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
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next prev parent reply other threads:[~2023-03-28 11:47 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-16 11:41 [PATCH V3 0/2] Fix WKUP domain IO PADCONFIG size issue and RPi header support Sinthu Raja
2023-03-16 11:41 ` Sinthu Raja
2023-03-16 11:41 ` [PATCH V3 1/2] arm64: dts: ti: k3-j721s2-mcu-wakeup: Fix IO PADCONFIG size for wakeup domain Sinthu Raja
2023-03-16 11:41 ` Sinthu Raja
2023-03-28 11:18 ` Vaishnav Achath
2023-03-28 11:18 ` Vaishnav Achath
2023-03-28 11:47 ` Nishanth Menon [this message]
2023-03-28 11:47 ` Nishanth Menon
2023-03-16 11:41 ` [PATCH V3 2/2] arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header Sinthu Raja
2023-03-16 11:41 ` Sinthu Raja
2023-03-28 11:00 ` Vaishnav Achath
2023-03-28 11:00 ` Vaishnav Achath
2023-03-30 6:43 ` Vaishnav Achath
2023-03-30 6:43 ` Vaishnav Achath
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