[igt-dev] [PATCH i-g-t 0/3] switch lib/igt_fb.c to use lib/i915/i915_blt functions for blitter on Intel hw

[igt-dev] [PATCH i-g-t 0/3] switch lib/igt_fb.c to use lib/i915/i915_blt functions for blitter on Intel hw

[Juha-Pekka Heikkila]

Switch to new blitter functions on framebuffer creation. On Intel CI there's
still some legacy machines with relocation support hence left XY_SRC path as
legacy path.

v2. Do rendercompression with blitter when have flat ccs

Juha-Pekka Heikkila (3):
  lib/i915/i915_blt: Add offset to block and fast copy
  lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions
  lib/igt_fb: use blitter for rendercompression on Intel hw with flat
    ccs

 lib/i915/i915_blt.c |  12 ++-
 lib/i915/i915_blt.h |   1 +
 lib/igt_fb.c        | 225 +++++++++++++++++++++++++++++++++++++++-----
 3 files changed, 208 insertions(+), 30 deletions(-)

-- 
2.39.0

[igt-dev] [PATCH i-g-t 1/3] lib/i915/i915_blt: Add offset to block and fast copy

[Juha-Pekka Heikkila]

Add offset to src and dst blits, this allow to use i915_blt with multiplane
framebuffers.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 lib/i915/i915_blt.c | 12 ++++++++----
 lib/i915/i915_blt.h |  1 +
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index ef67fe26f..ffaa97b42 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -708,8 +708,10 @@ uint64_t emit_blt_block_copy(int i915,
 	igt_assert_f(blt, "block-copy requires data to do blit\n");
 
 	alignment = gem_detect_safe_alignment(i915);
-	src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
-	dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
+	src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment)
+		     + blt->src.offset;
+	dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment)
+		     + blt->dst.offset;
 	bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
 
 	fill_data(&data, blt, src_offset, dst_offset, ext);
@@ -1179,8 +1181,10 @@ uint64_t emit_blt_fast_copy(int i915,
 	data.dw03.dst_x2 = blt->dst.x2;
 	data.dw03.dst_y2 = blt->dst.y2;
 
-	src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
-	dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
+	src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment)
+		     + blt->src.offset;
+	dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment)
+		     + blt->dst.offset;
 	bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
 
 	data.dw04.dst_address_lo = dst_offset;
diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
index a5f0edd15..3e5bec496 100644
--- a/lib/i915/i915_blt.h
+++ b/lib/i915/i915_blt.h
@@ -80,6 +80,7 @@ struct blt_copy_object {
 	enum blt_compression compression;  /* BC only */
 	enum blt_compression_type compression_type; /* BC only */
 	uint32_t pitch;
+	uint32_t offset;
 	uint16_t x_offset, y_offset;
 	int16_t x1, y1, x2, y2;
 
-- 
2.39.0

[igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions

[Juha-Pekka Heikkila]

reduce code duplication

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 lib/igt_fb.c | 214 +++++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 191 insertions(+), 23 deletions(-)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index ba89e1f60..7668fc553 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -35,6 +35,8 @@
 #include "drmtest.h"
 #include "i915/gem_create.h"
 #include "i915/gem_mman.h"
+#include "i915/i915_blt.h"
+#include "i915/intel_mocs.h"
 #include "igt_aux.h"
 #include "igt_color_encoding.h"
 #include "igt_fb.h"
@@ -2680,12 +2682,132 @@ static void copy_with_engine(struct fb_blit_upload *blit,
 	fini_buf(src);
 }
 
+static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb,
+					   uint32_t plane, uint32_t memregion)
+{
+	uint32_t name, handle;
+	struct blt_copy_object *blt;
+	enum blt_tiling_type blt_tile;
+	uint64_t stride;
+
+	blt = malloc(sizeof(*blt));
+	igt_assert(blt);
+
+	name = gem_flink(fb->fd, fb->gem_handle);
+	handle = gem_open(fb->fd, name);
+
+	switch (igt_fb_mod_to_tiling(fb->modifier)) {
+	case I915_TILING_X:
+		blt_tile = T_XMAJOR;
+		stride = fb->strides[plane] / 4;
+		break;
+	case I915_TILING_Y:
+		blt_tile = T_YMAJOR;
+		stride = fb->strides[plane] / 4;
+		break;
+	case I915_TILING_4:
+		blt_tile = T_TILE4;
+		stride = fb->strides[plane] / 4;
+		break;
+	case I915_TILING_NONE:
+	default:
+		blt_tile = T_LINEAR;
+		stride = fb->strides[plane];
+		break;
+	}
+
+	blt_set_object(blt, handle, fb->size, memregion,
+		       intel_get_uc_mocs(fb->fd),
+		       blt_tile,
+		       is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : COMPRESSION_DISABLED,
+		       is_gen12_mc_ccs_modifier(fb->modifier) ? COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D);
+
+	blt_set_geom(blt, stride, 0, 0, fb->width, fb->plane_height[plane], 0, 0);
+
+	blt->offset = fb->offsets[plane];
+
+	blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size,
+					     PROT_READ | PROT_WRITE);
+	return blt;
+}
+
+static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb)
+{
+	switch (fb->plane_bpp[0]) {
+	case 8:
+		return CD_8bit;
+	case 16:
+		return CD_16bit;
+	case 32:
+		return CD_32bit;
+	case 64:
+		return CD_64bit;
+	case 96:
+		return CD_96bit;
+	case 128:
+		return CD_128bit;
+	default:
+		igt_assert(0);
+	}
+}
+
+#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \
+			  x.compression_type == COMPRESSION_TYPE_3D)
+
+#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \
+			  x.compression_type == COMPRESSION_TYPE_MEDIA)
+
+static uint32_t blt_compression_format(struct blt_copy_data *blt,
+				       const struct igt_fb *fb)
+{
+	if (blt->src.compression == COMPRESSION_DISABLED &&
+	    blt->dst.compression == COMPRESSION_DISABLED)
+		return 0;
+
+	if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) {
+		switch (blt->color_depth) {
+		case CD_32bit:
+			return 8;
+		default:
+			igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color depth\n");
+		}
+	}
+
+	if (BLT_TARGET_MC(blt->src) || BLT_TARGET_MC(blt->dst)) {
+		switch (fb->drm_format) {
+		case DRM_FORMAT_XRGB8888:
+			return 8;
+		case DRM_FORMAT_XYUV8888:
+			return 9;
+		case DRM_FORMAT_NV12:
+			return 9;
+		case DRM_FORMAT_P010:
+		case DRM_FORMAT_P012:
+		case DRM_FORMAT_P016:
+			return 8;
+		default:
+			igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n");
+		}
+	} else {
+		igt_assert_f(0, "unknown compression\n");
+	}
+}
+
 static void blitcopy(const struct igt_fb *dst_fb,
 		     const struct igt_fb *src_fb)
 {
 	uint32_t src_tiling, dst_tiling;
 	uint32_t ctx = 0;
 	uint64_t ahnd = 0;
+	const intel_ctx_t *ictx = intel_ctx_create_all_physical(src_fb->fd);
+	struct intel_execution_engine2 *e;
+	uint32_t bb;
+	uint64_t bb_size = 4096;
+	struct blt_copy_data blt = {};
+	struct blt_copy_object *src, *dst;
+	struct blt_block_copy_data_ext ext = {}, *pext = NULL;
+	uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
+			   ? REGION_LMEM(0) : REGION_SMEM;
 
 	igt_assert_eq(dst_fb->fd, src_fb->fd);
 	igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
@@ -2697,36 +2819,81 @@ static void blitcopy(const struct igt_fb *dst_fb,
 		igt_require(gem_has_contexts(dst_fb->fd));
 		ctx = gem_context_create(dst_fb->fd);
 		ahnd = get_reloc_ahnd(dst_fb->fd, ctx);
+
+		igt_assert(__gem_create_in_memory_regions(src_fb->fd,
+							  &bb,
+							  &bb_size,
+							  mem_region) == 0);
+
+		for_each_ctx_engine(src_fb->fd, ictx, e) {
+			if (gem_engine_can_block_copy(src_fb->fd, e))
+				break;
+		}
 	}
 
 	for (int i = 0; i < dst_fb->num_planes; i++) {
 		igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
 		igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
 		igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]);
-		/*
-		 * On GEN12+ X-tiled format support is removed from the fast
-		 * blit command, so use the XY_SRC blit command for it
-		 * instead.
-		 */
-		if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
-			igt_blitter_fast_copy__raw(dst_fb->fd,
-						   ahnd, ctx, NULL,
-						   src_fb->gem_handle,
-						   src_fb->offsets[i],
-						   src_fb->strides[i],
-						   src_tiling,
-						   0, 0, /* src_x, src_y */
-						   src_fb->size,
-						   dst_fb->plane_width[i],
-						   dst_fb->plane_height[i],
-						   dst_fb->plane_bpp[i],
-						   dst_fb->gem_handle,
-						   dst_fb->offsets[i],
-						   dst_fb->strides[i],
-						   dst_tiling,
-						   0, 0 /* dst_x, dst_y */,
-						   dst_fb->size);
+
+		if (ahnd && fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
+			memset(&blt, 0, sizeof(blt));
+			blt.color_depth = blt_get_bpp(src_fb);
+
+			src = blt_fb_init(src_fb, i, mem_region);
+			dst = blt_fb_init(dst_fb, i, mem_region);
+
+			blt_set_copy_object(&blt.src, src);
+			blt_set_copy_object(&blt.dst, dst);
+
+			blt_set_batch(&blt.bb, bb, bb_size, mem_region);
+
+			blt_fast_copy(src_fb->fd, ictx, e, ahnd, &blt);
+			gem_sync(src_fb->fd, blt.dst.handle);
+
+			blt_destroy_object(src_fb->fd, src);
+			blt_destroy_object(dst_fb->fd, dst);
+		} else if (ahnd && blt_has_block_copy(src_fb->fd)) {
+			/*
+			* On GEN12+ X-tiled format support is removed from
+			* the fast blit command, so use the block copy blit
+			* command for it instead.
+			*/
+			src = blt_fb_init(src_fb, i, mem_region);
+			dst = blt_fb_init(dst_fb, i, mem_region);
+
+			memset(&blt, 0, sizeof(blt));
+			blt.print_bb = true;
+			blt.color_depth = blt_get_bpp(src_fb);
+			blt_set_copy_object(&blt.src, src);
+			blt_set_copy_object(&blt.dst, dst);
+
+			if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) {
+				blt_set_object_ext(&ext.src,
+						   blt_compression_format(&blt, src_fb),
+						   src_fb->width, src_fb->height,
+						   SURFACE_TYPE_2D);
+
+				blt_set_object_ext(&ext.dst,
+						   blt_compression_format(&blt, dst_fb),
+						   dst_fb->width, dst_fb->height,
+						   SURFACE_TYPE_2D);
+
+				pext = &ext;
+			}
+
+			blt_set_batch(&blt.bb, bb, bb_size, mem_region);
+
+			blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext);
+			gem_sync(src_fb->fd, blt.dst.handle);
+
+			blt_destroy_object(src_fb->fd, src);
+			blt_destroy_object(dst_fb->fd, dst);
 		} else {
+			/*
+			 * If on legacy hardware where relocations are supported
+			 * we'll use XY_SRC blit command instead
+			 */
 			igt_blitter_src_copy(dst_fb->fd,
 					     ahnd, ctx, NULL,
 					     src_fb->gem_handle,
@@ -2750,6 +2917,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
 	if (ctx)
 		gem_context_destroy(dst_fb->fd, ctx);
 	put_ahnd(ahnd);
+	intel_ctx_destroy(src_fb->fd, ictx);
 }
 
 static void free_linear_mapping(struct fb_blit_upload *blit)
-- 
2.39.0

[igt-dev] [PATCH i-g-t 3/3] lib/igt_fb: use blitter for rendercompression on Intel hw with flat ccs

[Juha-Pekka Heikkila]

When on flat ccs use blitter for doing rc ccs and rc ccs cc instead
of rendercopy

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 lib/igt_fb.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 7668fc553..c8ef3b2e6 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -2452,7 +2452,9 @@ static bool blitter_ok(const struct igt_fb *fb)
 	if (!is_i915_device(fb->fd))
 		return false;
 
-	if (is_ccs_modifier(fb->modifier))
+	if ((is_ccs_modifier(fb->modifier) &&
+	     !HAS_FLATCCS(intel_get_drm_devid(fb->fd)))
+	     || is_gen12_mc_ccs_modifier(fb->modifier))
 		return false;
 
 	for (int i = 0; i < fb->num_planes; i++) {
@@ -2808,9 +2810,12 @@ static void blitcopy(const struct igt_fb *dst_fb,
 	struct blt_block_copy_data_ext ext = {}, *pext = NULL;
 	uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
 			   ? REGION_LMEM(0) : REGION_SMEM;
+	/* To ignore CC plane */
+	uint32_t src_cc = src_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0;
+	uint32_t dst_cc = dst_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0;
 
 	igt_assert_eq(dst_fb->fd, src_fb->fd);
-	igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
+	igt_assert_eq(dst_fb->num_planes - dst_cc, src_fb->num_planes - src_cc);
 
 	src_tiling = igt_fb_mod_to_tiling(src_fb->modifier);
 	dst_tiling = igt_fb_mod_to_tiling(dst_fb->modifier);
@@ -2831,7 +2836,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
 		}
 	}
 
-	for (int i = 0; i < dst_fb->num_planes; i++) {
+	for (int i = 0; i < dst_fb->num_planes - dst_cc; i++) {
 		igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
 		igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
 		igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]);
-- 
2.39.0

[igt-dev] ✓ Fi.CI.BAT: success for switch lib/igt_fb.c to use lib/i915/i915_blt functions for blitter on Intel hw (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4545 bytes --]

== Series Details ==

Series: switch lib/igt_fb.c to use lib/i915/i915_blt functions for blitter on Intel hw (rev3)
URL   : https://patchwork.freedesktop.org/series/115691/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12929 -> IGTPW_8704
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/index.html

Participating hosts (37 -> 36)
------------------------------

  Missing    (1): fi-kbl-soraka 

Known issues
------------

  Here are the changes found in IGTPW_8704 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-kbl-x1275:       [PASS][1] -> [DMESG-FAIL][2] ([i915#5334] / [i915#7872])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/fi-kbl-x1275/igt@i915_selftest@live@gt_heartbeat.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/fi-kbl-x1275/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@migrate:
    - bat-adlp-9:         [PASS][3] -> [DMESG-FAIL][4] ([i915#7699])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/bat-adlp-9/igt@i915_selftest@live@migrate.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/bat-adlp-9/igt@i915_selftest@live@migrate.html

  * igt@i915_selftest@live@requests:
    - bat-rpls-2:         [PASS][5] -> [ABORT][6] ([i915#4983] / [i915#7913])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/bat-rpls-2/igt@i915_selftest@live@requests.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/bat-rpls-2/igt@i915_selftest@live@requests.html

  * igt@kms_chamelium_hpd@common-hpd-after-suspend:
    - bat-dg2-11:         NOTRUN -> [SKIP][7] ([i915#7828])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/bat-dg2-11/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
    - bat-rpls-1:         NOTRUN -> [SKIP][8] ([i915#7828])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/bat-rpls-1/igt@kms_chamelium_hpd@common-hpd-after-suspend.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - bat-rpls-1:         NOTRUN -> [SKIP][9] ([i915#1845])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/bat-rpls-1/igt@kms_pipe_crc_basic@suspend-read-crc.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s3@smem:
    - bat-rpls-1:         [ABORT][10] ([i915#6687] / [i915#7978]) -> [PASS][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@i915_selftest@live@hangcheck:
    - bat-dg2-11:         [ABORT][12] ([i915#7913]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/bat-dg2-11/igt@i915_selftest@live@hangcheck.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/bat-dg2-11/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@slpc:
    - bat-rpls-1:         [DMESG-FAIL][14] ([i915#6367]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/bat-rpls-1/igt@i915_selftest@live@slpc.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/bat-rpls-1/igt@i915_selftest@live@slpc.html

  
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
  [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7223 -> IGTPW_8704

  CI-20190529: 20190529
  CI_DRM_12929: b00bf43f572fe03dc058267c1f52d7724df03393 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8704: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/index.html
  IGT_7223: 2cbfa210fc95d126edf9a60ae6ab4e96cf4fca7f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/index.html

[-- Attachment #2: Type: text/html, Size: 5484 bytes --]

[igt-dev] ✗ Fi.CI.IGT: failure for switch lib/igt_fb.c to use lib/i915/i915_blt functions for blitter on Intel hw (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 16338 bytes --]

== Series Details ==

Series: switch lib/igt_fb.c to use lib/i915/i915_blt functions for blitter on Intel hw (rev3)
URL   : https://patchwork.freedesktop.org/series/115691/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12929_full -> IGTPW_8704_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_8704_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_8704_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/index.html

Participating hosts (7 -> 7)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_8704_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_plane_scaling@plane-scaler-with-modifiers-unity-scaling@pipe-a-hdmi-a-1:
    - shard-glk:          [PASS][1] -> [FAIL][2] +106 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-glk7/igt@kms_plane_scaling@plane-scaler-with-modifiers-unity-scaling@pipe-a-hdmi-a-1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-glk4/igt@kms_plane_scaling@plane-scaler-with-modifiers-unity-scaling@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-b-dp-1:
    - shard-apl:          [PASS][3] -> [FAIL][4] +69 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-apl2/igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-b-dp-1.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-apl4/igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-b-dp-1.html

  
#### Warnings ####

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-glk:          [SKIP][5] ([fdo#109271]) -> [FAIL][6] +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-glk2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-glk3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-apl:          [SKIP][7] ([fdo#109271]) -> [FAIL][8] +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-apl4/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-apl2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-upscaling@pipe-a-valid-mode:
    - {shard-dg1}:        NOTRUN -> [FAIL][9]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-dg1-15/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-upscaling@pipe-a-valid-mode.html

  
Known issues
------------

  Here are the changes found in IGTPW_8704_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_hotunplug@unbind-rebind:
    - shard-snb:          [PASS][10] -> [ABORT][11] ([i915#4528])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-snb5/igt@core_hotunplug@unbind-rebind.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-snb2/igt@core_hotunplug@unbind-rebind.html

  * igt@gem_close_race@multigpu-basic-process:
    - shard-apl:          NOTRUN -> [SKIP][12] ([fdo#109271]) +15 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-apl1/igt@gem_close_race@multigpu-basic-process.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [PASS][13] -> [FAIL][14] ([i915#2842])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-glk7/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-glk5/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@i915_pm_dc@dc9-dpms:
    - shard-apl:          [PASS][15] -> [FAIL][16] ([i915#4275])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-apl2/igt@i915_pm_dc@dc9-dpms.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-apl6/igt@i915_pm_dc@dc9-dpms.html

  * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf:
    - shard-apl:          NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#658])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-apl6/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-apl:          [PASS][18] -> [DMESG-FAIL][19] ([IGT#6]) +1 similar issue
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-apl1/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-apl3/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html

  
#### Possible fixes ####

  * igt@gem_ctx_bad_destroy@invalid-pad:
    - {shard-dg1}:        [DMESG-WARN][20] -> [PASS][21]
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-dg1-15/igt@gem_ctx_bad_destroy@invalid-pad.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-dg1-14/igt@gem_ctx_bad_destroy@invalid-pad.html

  * igt@gem_eio@hibernate:
    - {shard-tglu}:       [ABORT][22] ([i915#7975]) -> [PASS][23]
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-tglu-10/igt@gem_eio@hibernate.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-tglu-8/igt@gem_eio@hibernate.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [FAIL][24] ([i915#2846]) -> [PASS][25]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-glk5/igt@gem_exec_fair@basic-deadline.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-glk1/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-pace@vcs0:
    - shard-glk:          [FAIL][26] ([i915#2842]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-glk5/igt@gem_exec_fair@basic-pace@vcs0.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-glk8/igt@gem_exec_fair@basic-pace@vcs0.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-apl:          [ABORT][28] ([i915#180]) -> [PASS][29]
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-apl6/igt@gem_workarounds@suspend-resume-fd.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-apl7/igt@gem_workarounds@suspend-resume-fd.html

  * igt@kms_cursor_legacy@forked-bo@pipe-b:
    - {shard-dg1}:        [INCOMPLETE][30] ([i915#8011]) -> [PASS][31]
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-dg1-14/igt@kms_cursor_legacy@forked-bo@pipe-b.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-dg1-16/igt@kms_cursor_legacy@forked-bo@pipe-b.html

  * igt@kms_vblank@pipe-c-wait-forked-busy-hang:
    - shard-apl:          [SKIP][32] ([fdo#109271]) -> [PASS][33]
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-apl7/igt@kms_vblank@pipe-c-wait-forked-busy-hang.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-apl1/igt@kms_vblank@pipe-c-wait-forked-busy-hang.html
    - shard-glk:          [SKIP][34] ([fdo#109271]) -> [PASS][35]
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12929/shard-glk9/igt@kms_vblank@pipe-c-wait-forked-busy-hang.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/shard-glk3/igt@kms_vblank@pipe-c-wait-forked-busy-hang.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
  [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
  [i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
  [i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
  [i915#4036]: https://gitlab.freedesktop.org/drm/intel/issues/4036
  [i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4275]: https://gitlab.freedesktop.org/drm/intel/issues/4275
  [i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
  [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
  [i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
  [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#5852]: https://gitlab.freedesktop.org/drm/intel/issues/5852
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
  [i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
  [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
  [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7443]: https://gitlab.freedesktop.org/drm/intel/issues/7443
  [i915#7479]: https://gitlab.freedesktop.org/drm/intel/issues/7479
  [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
  [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
  [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
  [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
  [i915#8247]: https://gitlab.freedesktop.org/drm/intel/issues/8247
  [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
  [i915#8308]: https://gitlab.freedesktop.org/drm/intel/issues/8308


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7223 -> IGTPW_8704
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_12929: b00bf43f572fe03dc058267c1f52d7724df03393 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8704: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/index.html
  IGT_7223: 2cbfa210fc95d126edf9a60ae6ab4e96cf4fca7f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8704/index.html

[-- Attachment #2: Type: text/html, Size: 11146 bytes --]

Re: [igt-dev] [PATCH i-g-t 1/3] lib/i915/i915_blt: Add offset to block and fast copy

[Zbigniew Kempczyński]

On Tue, Mar 28, 2023 at 09:30:41PM +0300, Juha-Pekka Heikkila wrote:
> Add offset to src and dst blits, this allow to use i915_blt with multiplane
> framebuffers.
> 
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
>  lib/i915/i915_blt.c | 12 ++++++++----
>  lib/i915/i915_blt.h |  1 +
>  2 files changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
> index ef67fe26f..ffaa97b42 100644
> --- a/lib/i915/i915_blt.c
> +++ b/lib/i915/i915_blt.c
> @@ -708,8 +708,10 @@ uint64_t emit_blt_block_copy(int i915,
>  	igt_assert_f(blt, "block-copy requires data to do blit\n");
>  
>  	alignment = gem_detect_safe_alignment(i915);
> -	src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> -	dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> +	src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment)
> +		     + blt->src.offset;
> +	dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment)
> +		     + blt->dst.offset;
>  	bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
>  
>  	fill_data(&data, blt, src_offset, dst_offset, ext);
> @@ -1179,8 +1181,10 @@ uint64_t emit_blt_fast_copy(int i915,
>  	data.dw03.dst_x2 = blt->dst.x2;
>  	data.dw03.dst_y2 = blt->dst.y2;
>  
> -	src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
> -	dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
> +	src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment)
> +		     + blt->src.offset;
> +	dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment)
> +		     + blt->dst.offset;
>  	bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
>  
>  	data.dw04.dst_address_lo = dst_offset;
> diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
> index a5f0edd15..3e5bec496 100644
> --- a/lib/i915/i915_blt.h
> +++ b/lib/i915/i915_blt.h
> @@ -80,6 +80,7 @@ struct blt_copy_object {
>  	enum blt_compression compression;  /* BC only */
>  	enum blt_compression_type compression_type; /* BC only */
>  	uint32_t pitch;
> +	uint32_t offset;

I think renaming to plane_offset and adding to the end of
the structure would be better. Offset is ambiguous (may be
offset on gpu, etc). And add some comment what's for.

With this:

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew

>  	uint16_t x_offset, y_offset;
>  	int16_t x1, y1, x2, y2;
>  
> -- 
> 2.39.0
> 

Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions

[Zbigniew Kempczyński]

On Tue, Mar 28, 2023 at 09:30:42PM +0300, Juha-Pekka Heikkila wrote:
> reduce code duplication
> 
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
>  lib/igt_fb.c | 214 +++++++++++++++++++++++++++++++++++++++++++++------
>  1 file changed, 191 insertions(+), 23 deletions(-)
> 
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index ba89e1f60..7668fc553 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -35,6 +35,8 @@
>  #include "drmtest.h"
>  #include "i915/gem_create.h"
>  #include "i915/gem_mman.h"
> +#include "i915/i915_blt.h"
> +#include "i915/intel_mocs.h"
>  #include "igt_aux.h"
>  #include "igt_color_encoding.h"
>  #include "igt_fb.h"
> @@ -2680,12 +2682,132 @@ static void copy_with_engine(struct fb_blit_upload *blit,
>  	fini_buf(src);
>  }
>  
> +static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb,
> +					   uint32_t plane, uint32_t memregion)
> +{
> +	uint32_t name, handle;
> +	struct blt_copy_object *blt;
> +	enum blt_tiling_type blt_tile;
> +	uint64_t stride;
> +
> +	blt = malloc(sizeof(*blt));
> +	igt_assert(blt);
> +
> +	name = gem_flink(fb->fd, fb->gem_handle);
> +	handle = gem_open(fb->fd, name);
> +
> +	switch (igt_fb_mod_to_tiling(fb->modifier)) {
> +	case I915_TILING_X:
> +		blt_tile = T_XMAJOR;
> +		stride = fb->strides[plane] / 4;
> +		break;
> +	case I915_TILING_Y:
> +		blt_tile = T_YMAJOR;
> +		stride = fb->strides[plane] / 4;
> +		break;
> +	case I915_TILING_4:
> +		blt_tile = T_TILE4;
> +		stride = fb->strides[plane] / 4;
> +		break;
> +	case I915_TILING_NONE:
> +	default:
> +		blt_tile = T_LINEAR;
> +		stride = fb->strides[plane];
> +		break;
> +	}
> +
> +	blt_set_object(blt, handle, fb->size, memregion,
> +		       intel_get_uc_mocs(fb->fd),
> +		       blt_tile,
> +		       is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : COMPRESSION_DISABLED,
> +		       is_gen12_mc_ccs_modifier(fb->modifier) ? COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D);
> +
> +	blt_set_geom(blt, stride, 0, 0, fb->width, fb->plane_height[plane], 0, 0);
> +
> +	blt->offset = fb->offsets[plane];
> +
> +	blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size,
> +					     PROT_READ | PROT_WRITE);
> +	return blt;
> +}
> +
> +static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb)
> +{
> +	switch (fb->plane_bpp[0]) {
> +	case 8:
> +		return CD_8bit;
> +	case 16:
> +		return CD_16bit;
> +	case 32:
> +		return CD_32bit;
> +	case 64:
> +		return CD_64bit;
> +	case 96:
> +		return CD_96bit;
> +	case 128:
> +		return CD_128bit;
> +	default:
> +		igt_assert(0);
> +	}
> +}
> +
> +#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \
> +			  x.compression_type == COMPRESSION_TYPE_3D)
> +
> +#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \
> +			  x.compression_type == COMPRESSION_TYPE_MEDIA)
> +
> +static uint32_t blt_compression_format(struct blt_copy_data *blt,
> +				       const struct igt_fb *fb)
> +{
> +	if (blt->src.compression == COMPRESSION_DISABLED &&
> +	    blt->dst.compression == COMPRESSION_DISABLED)
> +		return 0;
> +
> +	if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) {
> +		switch (blt->color_depth) {
> +		case CD_32bit:
> +			return 8;
> +		default:
> +			igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color depth\n");
> +		}
> +	}
> +
> +	if (BLT_TARGET_MC(blt->src) || BLT_TARGET_MC(blt->dst)) {
> +		switch (fb->drm_format) {
> +		case DRM_FORMAT_XRGB8888:
> +			return 8;
> +		case DRM_FORMAT_XYUV8888:
> +			return 9;
> +		case DRM_FORMAT_NV12:
> +			return 9;
> +		case DRM_FORMAT_P010:
> +		case DRM_FORMAT_P012:
> +		case DRM_FORMAT_P016:
> +			return 8;
> +		default:
> +			igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n");
> +		}
> +	} else {
> +		igt_assert_f(0, "unknown compression\n");
> +	}
> +}
> +
>  static void blitcopy(const struct igt_fb *dst_fb,
>  		     const struct igt_fb *src_fb)
>  {
>  	uint32_t src_tiling, dst_tiling;
>  	uint32_t ctx = 0;
>  	uint64_t ahnd = 0;
> +	const intel_ctx_t *ictx = intel_ctx_create_all_physical(src_fb->fd);
> +	struct intel_execution_engine2 *e;
> +	uint32_t bb;
> +	uint64_t bb_size = 4096;
> +	struct blt_copy_data blt = {};
> +	struct blt_copy_object *src, *dst;
> +	struct blt_block_copy_data_ext ext = {}, *pext = NULL;
> +	uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
> +			   ? REGION_LMEM(0) : REGION_SMEM;
>  
>  	igt_assert_eq(dst_fb->fd, src_fb->fd);
>  	igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
> @@ -2697,36 +2819,81 @@ static void blitcopy(const struct igt_fb *dst_fb,
>  		igt_require(gem_has_contexts(dst_fb->fd));
>  		ctx = gem_context_create(dst_fb->fd);
>  		ahnd = get_reloc_ahnd(dst_fb->fd, ctx);
> +
> +		igt_assert(__gem_create_in_memory_regions(src_fb->fd,
> +							  &bb,
> +							  &bb_size,
> +							  mem_region) == 0);
> +
> +		for_each_ctx_engine(src_fb->fd, ictx, e) {
> +			if (gem_engine_can_block_copy(src_fb->fd, e))
> +				break;

Hmm, this means we need to be careful when using cmds_info. As
not all engines support block-copy simple information from the
library (blt_has_block_copy()) is not enough.

> +		}
>  	}
>  
>  	for (int i = 0; i < dst_fb->num_planes; i++) {
>  		igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
>  		igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
>  		igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]);
> -		/*
> -		 * On GEN12+ X-tiled format support is removed from the fast
> -		 * blit command, so use the XY_SRC blit command for it
> -		 * instead.
> -		 */
> -		if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
> -			igt_blitter_fast_copy__raw(dst_fb->fd,
> -						   ahnd, ctx, NULL,
> -						   src_fb->gem_handle,
> -						   src_fb->offsets[i],
> -						   src_fb->strides[i],
> -						   src_tiling,
> -						   0, 0, /* src_x, src_y */
> -						   src_fb->size,
> -						   dst_fb->plane_width[i],
> -						   dst_fb->plane_height[i],
> -						   dst_fb->plane_bpp[i],
> -						   dst_fb->gem_handle,
> -						   dst_fb->offsets[i],
> -						   dst_fb->strides[i],
> -						   dst_tiling,
> -						   0, 0 /* dst_x, dst_y */,
> -						   dst_fb->size);
> +
> +		if (ahnd && fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
> +			memset(&blt, 0, sizeof(blt));
> +			blt.color_depth = blt_get_bpp(src_fb);
> +
> +			src = blt_fb_init(src_fb, i, mem_region);
> +			dst = blt_fb_init(dst_fb, i, mem_region);
> +
> +			blt_set_copy_object(&blt.src, src);
> +			blt_set_copy_object(&blt.dst, dst);
> +
> +			blt_set_batch(&blt.bb, bb, bb_size, mem_region);
> +
> +			blt_fast_copy(src_fb->fd, ictx, e, ahnd, &blt);

Do we require block-copy engine here?

> +			gem_sync(src_fb->fd, blt.dst.handle);
> +
> +			blt_destroy_object(src_fb->fd, src);
> +			blt_destroy_object(dst_fb->fd, dst);
> +		} else if (ahnd && blt_has_block_copy(src_fb->fd)) {
> +			/*
> +			* On GEN12+ X-tiled format support is removed from
> +			* the fast blit command, so use the block copy blit
> +			* command for it instead.
> +			*/
> +			src = blt_fb_init(src_fb, i, mem_region);
> +			dst = blt_fb_init(dst_fb, i, mem_region);
> +
> +			memset(&blt, 0, sizeof(blt));
> +			blt.print_bb = true;
> +			blt.color_depth = blt_get_bpp(src_fb);
> +			blt_set_copy_object(&blt.src, src);
> +			blt_set_copy_object(&blt.dst, dst);
> +
> +			if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) {
> +				blt_set_object_ext(&ext.src,
> +						   blt_compression_format(&blt, src_fb),
> +						   src_fb->width, src_fb->height,
> +						   SURFACE_TYPE_2D);
> +
> +				blt_set_object_ext(&ext.dst,
> +						   blt_compression_format(&blt, dst_fb),
> +						   dst_fb->width, dst_fb->height,
> +						   SURFACE_TYPE_2D);
> +
> +				pext = &ext;
> +			}
> +
> +			blt_set_batch(&blt.bb, bb, bb_size, mem_region);
> +
> +			blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext);

I think to prepend with:

igt_assert(e);

for potential situation there's no block-copy capable engine.

--
Zbigniew

> +			gem_sync(src_fb->fd, blt.dst.handle);
> +
> +			blt_destroy_object(src_fb->fd, src);
> +			blt_destroy_object(dst_fb->fd, dst);
>  		} else {
> +			/*
> +			 * If on legacy hardware where relocations are supported
> +			 * we'll use XY_SRC blit command instead
> +			 */
>  			igt_blitter_src_copy(dst_fb->fd,
>  					     ahnd, ctx, NULL,
>  					     src_fb->gem_handle,
> @@ -2750,6 +2917,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
>  	if (ctx)
>  		gem_context_destroy(dst_fb->fd, ctx);
>  	put_ahnd(ahnd);
> +	intel_ctx_destroy(src_fb->fd, ictx);
>  }
>  
>  static void free_linear_mapping(struct fb_blit_upload *blit)
> -- 
> 2.39.0
> 

Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions

[Juha-Pekka Heikkila]

On 3.4.2023 9.17, Zbigniew Kempczyński wrote:
> On Tue, Mar 28, 2023 at 09:30:42PM +0300, Juha-Pekka Heikkila wrote:
>> reduce code duplication
>>
>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>> ---
>>   lib/igt_fb.c | 214 +++++++++++++++++++++++++++++++++++++++++++++------
>>   1 file changed, 191 insertions(+), 23 deletions(-)
>>
>> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
>> index ba89e1f60..7668fc553 100644
>> --- a/lib/igt_fb.c
>> +++ b/lib/igt_fb.c
>> @@ -35,6 +35,8 @@
>>   #include "drmtest.h"
>>   #include "i915/gem_create.h"
>>   #include "i915/gem_mman.h"
>> +#include "i915/i915_blt.h"
>> +#include "i915/intel_mocs.h"
>>   #include "igt_aux.h"
>>   #include "igt_color_encoding.h"
>>   #include "igt_fb.h"
>> @@ -2680,12 +2682,132 @@ static void copy_with_engine(struct fb_blit_upload *blit,
>>   	fini_buf(src);
>>   }
>>   
>> +static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb,
>> +					   uint32_t plane, uint32_t memregion)
>> +{
>> +	uint32_t name, handle;
>> +	struct blt_copy_object *blt;
>> +	enum blt_tiling_type blt_tile;
>> +	uint64_t stride;
>> +
>> +	blt = malloc(sizeof(*blt));
>> +	igt_assert(blt);
>> +
>> +	name = gem_flink(fb->fd, fb->gem_handle);
>> +	handle = gem_open(fb->fd, name);
>> +
>> +	switch (igt_fb_mod_to_tiling(fb->modifier)) {
>> +	case I915_TILING_X:
>> +		blt_tile = T_XMAJOR;
>> +		stride = fb->strides[plane] / 4;
>> +		break;
>> +	case I915_TILING_Y:
>> +		blt_tile = T_YMAJOR;
>> +		stride = fb->strides[plane] / 4;
>> +		break;
>> +	case I915_TILING_4:
>> +		blt_tile = T_TILE4;
>> +		stride = fb->strides[plane] / 4;
>> +		break;
>> +	case I915_TILING_NONE:
>> +	default:
>> +		blt_tile = T_LINEAR;
>> +		stride = fb->strides[plane];
>> +		break;
>> +	}
>> +
>> +	blt_set_object(blt, handle, fb->size, memregion,
>> +		       intel_get_uc_mocs(fb->fd),
>> +		       blt_tile,
>> +		       is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : COMPRESSION_DISABLED,
>> +		       is_gen12_mc_ccs_modifier(fb->modifier) ? COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D);
>> +
>> +	blt_set_geom(blt, stride, 0, 0, fb->width, fb->plane_height[plane], 0, 0);
>> +
>> +	blt->offset = fb->offsets[plane];
>> +
>> +	blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size,
>> +					     PROT_READ | PROT_WRITE);
>> +	return blt;
>> +}
>> +
>> +static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb)
>> +{
>> +	switch (fb->plane_bpp[0]) {
>> +	case 8:
>> +		return CD_8bit;
>> +	case 16:
>> +		return CD_16bit;
>> +	case 32:
>> +		return CD_32bit;
>> +	case 64:
>> +		return CD_64bit;
>> +	case 96:
>> +		return CD_96bit;
>> +	case 128:
>> +		return CD_128bit;
>> +	default:
>> +		igt_assert(0);
>> +	}
>> +}
>> +
>> +#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \
>> +			  x.compression_type == COMPRESSION_TYPE_3D)
>> +
>> +#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \
>> +			  x.compression_type == COMPRESSION_TYPE_MEDIA)
>> +
>> +static uint32_t blt_compression_format(struct blt_copy_data *blt,
>> +				       const struct igt_fb *fb)
>> +{
>> +	if (blt->src.compression == COMPRESSION_DISABLED &&
>> +	    blt->dst.compression == COMPRESSION_DISABLED)
>> +		return 0;
>> +
>> +	if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) {
>> +		switch (blt->color_depth) {
>> +		case CD_32bit:
>> +			return 8;
>> +		default:
>> +			igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color depth\n");
>> +		}
>> +	}
>> +
>> +	if (BLT_TARGET_MC(blt->src) || BLT_TARGET_MC(blt->dst)) {
>> +		switch (fb->drm_format) {
>> +		case DRM_FORMAT_XRGB8888:
>> +			return 8;
>> +		case DRM_FORMAT_XYUV8888:
>> +			return 9;
>> +		case DRM_FORMAT_NV12:
>> +			return 9;
>> +		case DRM_FORMAT_P010:
>> +		case DRM_FORMAT_P012:
>> +		case DRM_FORMAT_P016:
>> +			return 8;
>> +		default:
>> +			igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n");
>> +		}
>> +	} else {
>> +		igt_assert_f(0, "unknown compression\n");
>> +	}
>> +}
>> +
>>   static void blitcopy(const struct igt_fb *dst_fb,
>>   		     const struct igt_fb *src_fb)
>>   {
>>   	uint32_t src_tiling, dst_tiling;
>>   	uint32_t ctx = 0;
>>   	uint64_t ahnd = 0;
>> +	const intel_ctx_t *ictx = intel_ctx_create_all_physical(src_fb->fd);
>> +	struct intel_execution_engine2 *e;
>> +	uint32_t bb;
>> +	uint64_t bb_size = 4096;
>> +	struct blt_copy_data blt = {};
>> +	struct blt_copy_object *src, *dst;
>> +	struct blt_block_copy_data_ext ext = {}, *pext = NULL;
>> +	uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
>> +			   ? REGION_LMEM(0) : REGION_SMEM;
>>   
>>   	igt_assert_eq(dst_fb->fd, src_fb->fd);
>>   	igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
>> @@ -2697,36 +2819,81 @@ static void blitcopy(const struct igt_fb *dst_fb,
>>   		igt_require(gem_has_contexts(dst_fb->fd));
>>   		ctx = gem_context_create(dst_fb->fd);
>>   		ahnd = get_reloc_ahnd(dst_fb->fd, ctx);
>> +
>> +		igt_assert(__gem_create_in_memory_regions(src_fb->fd,
>> +							  &bb,
>> +							  &bb_size,
>> +							  mem_region) == 0);
>> +
>> +		for_each_ctx_engine(src_fb->fd, ictx, e) {
>> +			if (gem_engine_can_block_copy(src_fb->fd, e))
>> +				break;
> 
> Hmm, this means we need to be careful when using cmds_info. As
> not all engines support block-copy simple information from the
> library (blt_has_block_copy()) is not enough.

Thanks for the comments Zbigniew, I fell out from this work for a while 
with Covid and now finally reached to state with all other things I can 
continue with this.

I wasn't certain what you meant with above comment? There would be 
better way to find correct engine for doing block copy? As is I'm 
testing new version of this set where these parts are bit changed, I'll 
probably today/tomorrow send another version for ci to show what I still 
missed.

My final target with all this is blitter path would do rc ccs and I'd 
need Vebox only for compressing mc ccs.

/Juha-Pekka

> 
>> +		}
>>   	}
>>   
>>   	for (int i = 0; i < dst_fb->num_planes; i++) {
>>   		igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
>>   		igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
>>   		igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]);
>> -		/*
>> -		 * On GEN12+ X-tiled format support is removed from the fast
>> -		 * blit command, so use the XY_SRC blit command for it
>> -		 * instead.
>> -		 */
>> -		if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
>> -			igt_blitter_fast_copy__raw(dst_fb->fd,
>> -						   ahnd, ctx, NULL,
>> -						   src_fb->gem_handle,
>> -						   src_fb->offsets[i],
>> -						   src_fb->strides[i],
>> -						   src_tiling,
>> -						   0, 0, /* src_x, src_y */
>> -						   src_fb->size,
>> -						   dst_fb->plane_width[i],
>> -						   dst_fb->plane_height[i],
>> -						   dst_fb->plane_bpp[i],
>> -						   dst_fb->gem_handle,
>> -						   dst_fb->offsets[i],
>> -						   dst_fb->strides[i],
>> -						   dst_tiling,
>> -						   0, 0 /* dst_x, dst_y */,
>> -						   dst_fb->size);
>> +
>> +		if (ahnd && fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
>> +			memset(&blt, 0, sizeof(blt));
>> +			blt.color_depth = blt_get_bpp(src_fb);
>> +
>> +			src = blt_fb_init(src_fb, i, mem_region);
>> +			dst = blt_fb_init(dst_fb, i, mem_region);
>> +
>> +			blt_set_copy_object(&blt.src, src);
>> +			blt_set_copy_object(&blt.dst, dst);
>> +
>> +			blt_set_batch(&blt.bb, bb, bb_size, mem_region);
>> +
>> +			blt_fast_copy(src_fb->fd, ictx, e, ahnd, &blt);
> 
> Do we require block-copy engine here?
> 
>> +			gem_sync(src_fb->fd, blt.dst.handle);
>> +
>> +			blt_destroy_object(src_fb->fd, src);
>> +			blt_destroy_object(dst_fb->fd, dst);
>> +		} else if (ahnd && blt_has_block_copy(src_fb->fd)) {
>> +			/*
>> +			* On GEN12+ X-tiled format support is removed from
>> +			* the fast blit command, so use the block copy blit
>> +			* command for it instead.
>> +			*/
>> +			src = blt_fb_init(src_fb, i, mem_region);
>> +			dst = blt_fb_init(dst_fb, i, mem_region);
>> +
>> +			memset(&blt, 0, sizeof(blt));
>> +			blt.print_bb = true;
>> +			blt.color_depth = blt_get_bpp(src_fb);
>> +			blt_set_copy_object(&blt.src, src);
>> +			blt_set_copy_object(&blt.dst, dst);
>> +
>> +			if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) {
>> +				blt_set_object_ext(&ext.src,
>> +						   blt_compression_format(&blt, src_fb),
>> +						   src_fb->width, src_fb->height,
>> +						   SURFACE_TYPE_2D);
>> +
>> +				blt_set_object_ext(&ext.dst,
>> +						   blt_compression_format(&blt, dst_fb),
>> +						   dst_fb->width, dst_fb->height,
>> +						   SURFACE_TYPE_2D);
>> +
>> +				pext = &ext;
>> +			}
>> +
>> +			blt_set_batch(&blt.bb, bb, bb_size, mem_region);
>> +
>> +			blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext);
> 
> I think to prepend with:
> 
> igt_assert(e);
> 
> for potential situation there's no block-copy capable engine.
> 
> --
> Zbigniew
> 
>> +			gem_sync(src_fb->fd, blt.dst.handle);
>> +
>> +			blt_destroy_object(src_fb->fd, src);
>> +			blt_destroy_object(dst_fb->fd, dst);
>>   		} else {
>> +			/*
>> +			 * If on legacy hardware where relocations are supported
>> +			 * we'll use XY_SRC blit command instead
>> +			 */
>>   			igt_blitter_src_copy(dst_fb->fd,
>>   					     ahnd, ctx, NULL,
>>   					     src_fb->gem_handle,
>> @@ -2750,6 +2917,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
>>   	if (ctx)
>>   		gem_context_destroy(dst_fb->fd, ctx);
>>   	put_ahnd(ahnd);
>> +	intel_ctx_destroy(src_fb->fd, ictx);
>>   }
>>   
>>   static void free_linear_mapping(struct fb_blit_upload *blit)
>> -- 
>> 2.39.0
>>

Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions

[Zbigniew Kempczyński]

On Wed, May 31, 2023 at 06:50:39PM +0300, Juha-Pekka Heikkila wrote:

<cut>

> > > +		for_each_ctx_engine(src_fb->fd, ictx, e) {
> > > +			if (gem_engine_can_block_copy(src_fb->fd, e))
> > > +				break;
> > 
> > Hmm, this means we need to be careful when using cmds_info. As
> > not all engines support block-copy simple information from the
> > library (blt_has_block_copy()) is not enough.
> 
> Thanks for the comments Zbigniew, I fell out from this work for a while with
> Covid and now finally reached to state with all other things I can continue
> with this.
> 
> I wasn't certain what you meant with above comment? There would be better
> way to find correct engine for doing block copy? As is I'm testing new
> version of this set where these parts are bit changed, I'll probably
> today/tomorrow send another version for ci to show what I still missed.

I'm sorry for the confusion, I was sure gem_engine_can_block_copy() calls
i915_blt function which doesn't check engine capability, just reports platform
supports block-copy or not. Function you're using just does what I mean
- checks engine block-copy capability.

--
Zbigniew

> 
> My final target with all this is blitter path would do rc ccs and I'd need
> Vebox only for compressing mc ccs.
> 
> /Juha-Pekka
> 
 

[igt-dev] [PATCH i-g-t 3/3] lib/igt_fb: use blitter for rendercompression on Intel hw with flat ccs

[Juha-Pekka Heikkila]

When on flat ccs use blitter for doing rc ccs and rc ccs cc instead
of rendercopy

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
 lib/igt_fb.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index b3fc3766..fd84ef24 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -2486,7 +2486,9 @@ static bool blitter_ok(const struct igt_fb *fb)
 	if (!is_i915_device(fb->fd))
 		return false;
 
-	if (is_ccs_modifier(fb->modifier))
+	if ((is_ccs_modifier(fb->modifier) &&
+	     !HAS_FLATCCS(intel_get_drm_devid(fb->fd)))
+	     || is_gen12_mc_ccs_modifier(fb->modifier))
 		return false;
 
 	for (int i = 0; i < fb->num_planes; i++) {
@@ -2833,9 +2835,12 @@ static void blitcopy(const struct igt_fb *dst_fb,
 	struct blt_block_copy_data_ext ext = {}, *pext = NULL;
 	uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
 			   ? REGION_LMEM(0) : REGION_SMEM;
+	/* To ignore CC plane */
+	uint32_t src_cc = src_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0;
+	uint32_t dst_cc = dst_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0;
 
 	igt_assert_eq(dst_fb->fd, src_fb->fd);
-	igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
+	igt_assert_eq(dst_fb->num_planes - dst_cc, src_fb->num_planes - src_cc);
 
 	src_tiling = igt_fb_mod_to_tiling(src_fb->modifier);
 	dst_tiling = igt_fb_mod_to_tiling(dst_fb->modifier);
@@ -2851,7 +2856,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
 							  mem_region) == 0);
 	}
 
-	for (int i = 0; i < dst_fb->num_planes; i++) {
+	for (int i = 0; i < dst_fb->num_planes - dst_cc; i++) {
 		igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
 		igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
 		igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]);
-- 
2.25.1