* [PATCH v2 00/18] Migration to using binman to generate
@ 2023-04-04 12:13 Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 01/18] binman: Add support for generating TI Board config binaries Neha Malcom Francis
` (18 more replies)
0 siblings, 19 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
This series aims to eliminate the use of additional custom repositories
such as k3-image-gen (K3 Image Generation) repo that was plumbed into
the U-Boot build flow to generate boot images for TI K3 platform devices.
And instead, we move towards using binman that aligns better with the
community standard build flow.
This series uses binman for all K3 platforms supported on U-Boot currently;
both HS (High Security) and GP (General Purpose) devices.
Background on using k3-image-gen:
* TI K3 devices require a SYSFW (System Firmware) image consisting
of a signed system firmware image and board configuration binaries,
this is needed to bring up system firmware during U-Boot R5 SPL
startup.
* Board configuration data contain board-specific information
such as resource management, power management and security.
Series intends to use binman to take over the packaging and signing for
the R5 bootloader images tiboot3.bin (and sysfw.itb, for non-combined
boot flow) instead of k3-image-gen.
Series also packages the A72/A53 bootloader images (tispl.bin and
u-boot.img) using ATF, OPTEE and DM (Device Manager)
Changes in v2:
- removed all external scripts
- created ti-board-config etype to support generation of board
config binaries
- created ti-secure and ti-secure-rom etypes to handle signing
instead of using external TI_SECURE_DEV_PKG
- updated openssl btool to support x509 certificate generation
- dropped Makefile changes to obtain external binary components,
moving to using BINMAN_INDIRS to achieve the same
Neha Malcom Francis (18):
binman: Add support for generating TI Board config binaries
binman: ti-secure: Add support for TI signing
ti: sysfw: tiboot3: Add support for packaging sysfw.itb and
tiboot3.bin
j721e: schema: yaml: Add general schema and J721E board config files
j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin,
u-boot.img
j7200: yaml: Add J7200 board config files
j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
am65x: yaml: Add AM65x board config files
am65: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin,
u-boot.img
config: am64x: Add board config for AM64x
am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.img
j721s2: yaml: Add board config for J721S2
j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
am62: yaml: Add board config for AM62
am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
am62a: yaml: Add board config for AM62ax
am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
k3: tools: config.mk: Update makefile and remove scripts
arch/arm/dts/k3-am625-r5-sk.dts | 1 +
arch/arm/dts/k3-am625-sk-binman.dtsi | 472 +++
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 2 +
arch/arm/dts/k3-am62a-sk-binman.dtsi | 472 +++
arch/arm/dts/k3-am62a7-r5-sk.dts | 1 +
arch/arm/dts/k3-am62a7-sk.dts | 1 +
arch/arm/dts/k3-am642-evm-u-boot.dtsi | 2 +
arch/arm/dts/k3-am642-r5-evm.dts | 1 +
arch/arm/dts/k3-am64x-binman.dtsi | 521 +++
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 1 +
.../dts/k3-am654-r5-base-board-u-boot.dtsi | 1 +
arch/arm/dts/k3-am65x-binman.dtsi | 543 +++
arch/arm/dts/k3-j7200-binman.dtsi | 471 +++
.../k3-j7200-common-proc-board-u-boot.dtsi | 2 +
arch/arm/dts/k3-j721e-binman.dtsi | 634 ++++
.../k3-j721e-common-proc-board-u-boot.dtsi | 1 +
.../arm/dts/k3-j721e-r5-common-proc-board.dts | 1 +
arch/arm/dts/k3-j721s2-binman.dtsi | 474 +++
.../k3-j721s2-common-proc-board-u-boot.dtsi | 2 +
.../dts/k3-j721s2-r5-common-proc-board.dts | 1 +
arch/arm/mach-k3/config.mk | 126 +-
board/ti/am62ax/Kconfig | 2 +
board/ti/am62ax/board-cfg.yaml | 36 +
board/ti/am62ax/pm-cfg.yaml | 12 +
board/ti/am62ax/rm-cfg.yaml | 1151 +++++++
board/ti/am62ax/sec-cfg.yaml | 375 +++
board/ti/am62x/Kconfig | 2 +
board/ti/am62x/board-cfg.yaml | 36 +
board/ti/am62x/pm-cfg.yaml | 12 +
board/ti/am62x/rm-cfg.yaml | 1088 +++++++
board/ti/am62x/sec-cfg.yaml | 375 +++
board/ti/am64x/Kconfig | 2 +
board/ti/am64x/board-cfg.yaml | 37 +
board/ti/am64x/pm-cfg.yaml | 12 +
board/ti/am64x/rm-cfg.yaml | 1400 ++++++++
board/ti/am64x/sec-cfg.yaml | 378 +++
board/ti/am65x/Kconfig | 2 +
board/ti/am65x/board-cfg.yaml | 36 +
board/ti/am65x/pm-cfg.yaml | 12 +
board/ti/am65x/rm-cfg.yaml | 2068 ++++++++++++
board/ti/am65x/sec-cfg.yaml | 375 +++
board/ti/common/schema.yaml | 355 ++
board/ti/j721e/Kconfig | 4 +
board/ti/j721e/board-cfg.yaml | 37 +
board/ti/j721e/board-cfg_j7200.yaml | 36 +
board/ti/j721e/pm-cfg.yaml | 13 +
board/ti/j721e/pm-cfg_j7200.yaml | 12 +
board/ti/j721e/rm-cfg.yaml | 2757 ++++++++++++++++
board/ti/j721e/rm-cfg_j7200.yaml | 2065 ++++++++++++
board/ti/j721e/sec-cfg.yaml | 379 +++
board/ti/j721e/sec-cfg_j7200.yaml | 378 +++
board/ti/j721s2/Kconfig | 2 +
board/ti/j721s2/board-cfg.yaml | 37 +
board/ti/j721s2/pm-cfg.yaml | 12 +
board/ti/j721s2/rm-cfg.yaml | 2901 +++++++++++++++++
board/ti/j721s2/sec-cfg.yaml | 375 +++
board/ti/keys/custMpk.pem | 51 +
board/ti/keys/ti-degenerate-key.pem | 10 +
scripts/Makefile.spl | 2 +
tools/binman/btool/openssl.py | 244 ++
tools/binman/entries.rst | 75 +
tools/binman/etype/ti_board_config.py | 246 ++
tools/binman/etype/ti_secure.py | 83 +
tools/binman/etype/ti_secure_rom.py | 233 ++
tools/binman/etype/x509_cert.py | 87 +-
tools/binman/ftest.py | 57 +
tools/binman/test/277_ti_board_cfg.dts | 11 +
.../binman/test/278_ti_board_cfg_combined.dts | 25 +
tools/binman/test/279_ti_secure.dts | 17 +
tools/binman/test/280_ti_secure_rom.dts | 17 +
.../test/281_ti_secure_rom_combined.dts | 25 +
tools/binman/test/yaml/config.yaml | 11 +
tools/binman/test/yaml/schema.yaml | 26 +
tools/k3_fit_atf.sh | 123 -
tools/k3_gen_x509_cert.sh | 262 --
75 files changed, 21634 insertions(+), 475 deletions(-)
create mode 100644 arch/arm/dts/k3-am625-sk-binman.dtsi
create mode 100644 arch/arm/dts/k3-am62a-sk-binman.dtsi
create mode 100644 arch/arm/dts/k3-am64x-binman.dtsi
create mode 100644 arch/arm/dts/k3-am65x-binman.dtsi
create mode 100644 arch/arm/dts/k3-j7200-binman.dtsi
create mode 100644 arch/arm/dts/k3-j721e-binman.dtsi
create mode 100644 arch/arm/dts/k3-j721s2-binman.dtsi
create mode 100644 board/ti/am62ax/board-cfg.yaml
create mode 100644 board/ti/am62ax/pm-cfg.yaml
create mode 100644 board/ti/am62ax/rm-cfg.yaml
create mode 100644 board/ti/am62ax/sec-cfg.yaml
create mode 100644 board/ti/am62x/board-cfg.yaml
create mode 100644 board/ti/am62x/pm-cfg.yaml
create mode 100644 board/ti/am62x/rm-cfg.yaml
create mode 100644 board/ti/am62x/sec-cfg.yaml
create mode 100644 board/ti/am64x/board-cfg.yaml
create mode 100644 board/ti/am64x/pm-cfg.yaml
create mode 100644 board/ti/am64x/rm-cfg.yaml
create mode 100644 board/ti/am64x/sec-cfg.yaml
create mode 100644 board/ti/am65x/board-cfg.yaml
create mode 100644 board/ti/am65x/pm-cfg.yaml
create mode 100644 board/ti/am65x/rm-cfg.yaml
create mode 100644 board/ti/am65x/sec-cfg.yaml
create mode 100644 board/ti/common/schema.yaml
create mode 100644 board/ti/j721e/board-cfg.yaml
create mode 100644 board/ti/j721e/board-cfg_j7200.yaml
create mode 100644 board/ti/j721e/pm-cfg.yaml
create mode 100644 board/ti/j721e/pm-cfg_j7200.yaml
create mode 100644 board/ti/j721e/rm-cfg.yaml
create mode 100644 board/ti/j721e/rm-cfg_j7200.yaml
create mode 100644 board/ti/j721e/sec-cfg.yaml
create mode 100644 board/ti/j721e/sec-cfg_j7200.yaml
create mode 100644 board/ti/j721s2/board-cfg.yaml
create mode 100644 board/ti/j721s2/pm-cfg.yaml
create mode 100644 board/ti/j721s2/rm-cfg.yaml
create mode 100644 board/ti/j721s2/sec-cfg.yaml
create mode 100644 board/ti/keys/custMpk.pem
create mode 100644 board/ti/keys/ti-degenerate-key.pem
create mode 100644 tools/binman/etype/ti_board_config.py
create mode 100644 tools/binman/etype/ti_secure.py
create mode 100644 tools/binman/etype/ti_secure_rom.py
create mode 100644 tools/binman/test/277_ti_board_cfg.dts
create mode 100644 tools/binman/test/278_ti_board_cfg_combined.dts
create mode 100644 tools/binman/test/279_ti_secure.dts
create mode 100644 tools/binman/test/280_ti_secure_rom.dts
create mode 100644 tools/binman/test/281_ti_secure_rom_combined.dts
create mode 100644 tools/binman/test/yaml/config.yaml
create mode 100644 tools/binman/test/yaml/schema.yaml
delete mode 100755 tools/k3_fit_atf.sh
delete mode 100755 tools/k3_gen_x509_cert.sh
--
2.34.1
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH v2 01/18] binman: Add support for generating TI Board config binaries
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-05 18:37 ` Simon Glass
2023-04-04 12:13 ` [PATCH v2 02/18] binman: ti-secure: Add support for TI signing Neha Malcom Francis
` (17 subsequent siblings)
18 siblings, 1 reply; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
The ti-board-config entry loads and validates a given YAML config file
against a given schema, and generates the board config binary. K3
devices require these generated binaries to be packed into the final
system firmware images.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
tools/binman/entries.rst | 50 ++++
tools/binman/etype/ti_board_config.py | 246 ++++++++++++++++++
tools/binman/ftest.py | 11 +
tools/binman/test/277_ti_board_cfg.dts | 11 +
.../binman/test/278_ti_board_cfg_combined.dts | 25 ++
tools/binman/test/yaml/config.yaml | 11 +
tools/binman/test/yaml/schema.yaml | 26 ++
7 files changed, 380 insertions(+)
create mode 100644 tools/binman/etype/ti_board_config.py
create mode 100644 tools/binman/test/277_ti_board_cfg.dts
create mode 100644 tools/binman/test/278_ti_board_cfg_combined.dts
create mode 100644 tools/binman/test/yaml/config.yaml
create mode 100644 tools/binman/test/yaml/schema.yaml
diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index b71af801fd..7cfe61dd09 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -2423,3 +2423,53 @@ may be used instead.
+.. _etype_ti_board_config:
+
+Entry: ti-board-config: Texas Instruments board config binary
+-------------------------------------------------------------
+
+Support for generation of TI schema validated board configuration
+binary
+This etype supports generation of two kinds of board configuration
+binaries: singular board config binary as well as combined board config
+binary.
+
+Properties / Entry arguments:
+ - config-file: File containing board configuration data in YAML
+ - schema-file: File containing board configuration YAML schema against
+ which the config file is validated
+
+These above parameters are used only when the generated binary is
+intended to be a single board configuration binary. Example::
+
+/* generate a my-ti-board-config.bin generated from a YAML configuration
+file validated against the schema*/
+my-ti-board-config {
+ ti-board-config {
+ config = "board-config.yaml";
+ schema = "schema.yaml";
+ };
+};
+
+To generate a combined board configuration binary, we pack the
+needed individual binaries into a ti-board-config binary. In this case,
+the available supported subnode names are board-cfg, pm-cfg, sec-cfg and
+rm-cfg. For example::
+
+/* generate a my-combined-ti-board-config.bin packed with a header
+(containing details about the included board config binaries), along
+with the YAML schema validated binaries themselves*/
+my-combined-ti-board-config {
+ ti-board-config {
+ board-cfg {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ sec-cfg {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+};
+
+
diff --git a/tools/binman/etype/ti_board_config.py b/tools/binman/etype/ti_board_config.py
new file mode 100644
index 0000000000..0a9be44afc
--- /dev/null
+++ b/tools/binman/etype/ti_board_config.py
@@ -0,0 +1,246 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (c) 2022 Texas Instruments Incorporated - https://www.ti.com/
+# Written by Neha Malcom Francis <n-francis@ti.com>
+#
+# Entry-type module for generating schema validated TI board
+# configuration binary
+#
+
+import os
+import struct
+import tempfile
+import yaml
+
+from collections import OrderedDict
+from jsonschema import validate
+from shutil import copyfileobj
+from shutil import rmtree
+
+from binman.entry import Entry
+from binman.etype.section import Entry_section
+from binman.etype.blob_ext import Entry_blob_ext
+from binman.etype.blob_ext_list import Entry_blob_ext_list
+from dtoc import fdt_util
+from u_boot_pylib import tools, tout
+
+BOARDCFG = 0xB
+BOARDCFG_SEC = 0xD
+BOARDCFG_PM = 0xE
+BOARDCFG_RM = 0xC
+BOARDCFG_NUM_ELEMS = 4
+
+class Entry_ti_board_config(Entry_section):
+ """
+ Support for generation of TI schema validated board configuration
+ binary
+ This etype supports generation of two kinds of board configuration
+ binaries: singular board config binary as well as combined board config
+ binary.
+
+ Available parameters are:
+
+ config-file
+ File containing board configuration data in YAML
+
+ schema-file
+ File containing board configuration YAML schema against which the
+ config file is validated
+
+ These above parameters are used only when the generated binary is
+ intended to be a single board configuration binary. Example::
+
+ /* generate a my-ti-board-config.bin generated from a YAML configuration
+ file validated against the schema*/
+ my-ti-board-config {
+ ti-board-config {
+ config = "board-config.yaml";
+ schema = "schema.yaml";
+ };
+ };
+
+ To generate a combined board configuration binary, we pack the
+ needed individual binaries into a ti-board-config binary. In this case,
+ the available supported subnode names are board-cfg, pm-cfg, sec-cfg and
+ rm-cfg. For example::
+
+ /* generate a my-combined-ti-board-config.bin packed with a header
+ (containing details about the included board config binaries), along
+ with the YAML schema validated binaries themselves*/
+ my-combined-ti-board-config {
+ ti-board-config {
+ board-cfg {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ sec-cfg {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ }
+ }
+ """
+ def __init__(self, section, etype, node):
+ super().__init__(section, etype, node)
+
+ self.config_file = None
+ self.schema_file = None
+
+ self._entries = OrderedDict()
+ self._entries_data = OrderedDict()
+ self.num_elems = BOARDCFG_NUM_ELEMS
+ self.fmt = '<HHHBB'
+ self.index = 0
+ self.binary_offset = 0
+ self.sw_rev = 1
+ self.devgrp = 0
+
+ def ReadNode(self):
+ super().ReadNode()
+ self.config_file = fdt_util.GetString(self._node, 'config')
+ self.schema_file = fdt_util.GetString(self._node, 'schema')
+ if self.config_file is None:
+ self.ReadEntries()
+
+ def ReadEntries(self):
+ """Read the subnodes to find out what should go in this image"""
+ num_cfgs = 0
+ for node in self._node.subnodes:
+ if 'type' not in node.props:
+ num_cfgs += 1
+ etype = 'ti-board-config'
+ entry = Entry.Create(self, node, etype)
+ entry.ReadNode()
+ cfg_data = entry.BuildSectionData(True)
+ self._entries[entry.name] = entry
+ self._entries_data[entry.name] = cfg_data
+ self.num_elems = num_cfgs
+
+ def _convert_to_byte_chunk(self, val, data_type):
+ """Convert value into byte array"""
+ size = 0
+ if (data_type == "#/definitions/u8"):
+ size = 1
+ elif (data_type == "#/definitions/u16"):
+ size = 2
+ elif (data_type == "#/definitions/u32"):
+ size = 4
+ else:
+ raise Exception("Data type not present in definitions")
+ if type(val) == int:
+ br = val.to_bytes(size, byteorder="little")
+ return br
+
+ def _compile_yaml(self, schema_yaml, file_yaml):
+ """Convert YAML file into byte array based on YAML schema"""
+ br = bytearray()
+ for key in file_yaml.keys():
+ node = file_yaml[key]
+ node_schema = schema_yaml['properties'][key]
+ node_type = node_schema.get('type')
+ if not 'type' in node_schema:
+ br += self._convert_to_byte_chunk(node,
+ node_schema.get('$ref'))
+ elif node_type == 'object':
+ br += self._compile_yaml(node_schema, node)
+ elif node_type == 'array':
+ for item in node:
+ if not isinstance(item, dict):
+ br += self._convert_to_byte_chunk(
+ item, schema_yaml['properties'][key]['items']["$ref"])
+ else:
+ br += self._compile_yaml(node_schema.get('items'), item)
+ return br
+
+ def _generate_binaries(self):
+ """Generate config binary artifacts from the loaded YAML configuration file"""
+ try:
+ cfg_binary = bytearray()
+ for key in self.file_yaml.keys():
+ node = self.file_yaml[key]
+ node_schema = self.schema_yaml['properties'][key]
+ br = self._compile_yaml(node_schema, node)
+ cfg_binary += br
+ except Exception as e:
+ tout.warning("Combined board config binary was not generated properly")
+ cfg_binary = tools.get_bytes(0, 512)
+ return cfg_binary
+
+ def _add_boardcfg(self, bcfgtype, bcfgdata):
+ size = len(bcfgdata)
+ desc = struct.pack(self.fmt, bcfgtype,
+ self.binary_offset, size, self.devgrp, 0)
+ with open(self.descfile, "ab+") as desc_fh:
+ desc_fh.write(desc)
+ with open(self.bcfgfile, "ab+") as bcfg_fh:
+ bcfg_fh.write(bcfgdata)
+ self.binary_offset += size
+ self.index += 1
+
+ def _finalize(self):
+ try:
+ with open(self.descfile, "rb") as desc_fh:
+ with open(self.bcfgfile, "rb") as bcfg_fh:
+ with open(self.fh_file, 'ab+') as fh:
+ desc_fh.seek(0)
+ bcfg_fh.seek(0)
+ copyfileobj(desc_fh, fh)
+ copyfileobj(bcfg_fh, fh)
+ data = tools.read_file(self.fh_file)
+ except Exception as e:
+ tout.warning("Combined board config binary was not generated properly")
+ data = tools.get_bytes(0, 512)
+ rmtree(self.tmpdir)
+ return data
+
+ def BuildSectionData(self, required):
+ if self.config_file is None:
+ self.binary_offset = 0
+ self.tmpdir = tempfile.mkdtemp()
+ self.fh_file = os.path.join(self.tmpdir, "fh")
+ self.descfile = os.path.join(self.tmpdir, "desc")
+ self.bcfgfile = os.path.join(self.tmpdir, "bcfg")
+ try:
+ with open(self.fh_file, 'wb') as f:
+ t_bytes = f.write(struct.pack(
+ '<BB', self.num_elems, self.sw_rev))
+ self.binary_offset += t_bytes
+ self.binary_offset += self.num_elems * struct.calcsize(self.fmt)
+ except Exception as e:
+ tout.warning("Combined board config header was not generated properly")
+
+ if 'board-cfg' in self._entries:
+ self._add_boardcfg(BOARDCFG, self._entries_data['board-cfg'])
+
+ if 'sec-cfg' in self._entries:
+ self._add_boardcfg(BOARDCFG_SEC, self._entries_data['sec-cfg'])
+
+ if 'pm-cfg' in self._entries:
+ self._add_boardcfg(BOARDCFG_PM, self._entries_data['pm-cfg'])
+
+ if 'rm-cfg' in self._entries:
+ self._add_boardcfg(BOARDCFG_RM, self._entries_data['rm-cfg'])
+
+ data = self._finalize()
+ return data
+
+ else:
+ with open(self.config_file, 'r') as f:
+ self.file_yaml = yaml.safe_load(f)
+ with open(self.schema_file, 'r') as sch:
+ self.schema_yaml = yaml.safe_load(sch)
+ try:
+ validate(self.file_yaml, self.schema_yaml)
+ except Exception as e:
+ tout.error(f"Schema validation error: {e}")
+
+ data = self._generate_binaries()
+ return data
+
+ def SetImagePos(self, image_pos):
+ Entry.SetImagePos(self, image_pos)
+
+ def SetCalculatedProperties(self):
+ Entry.SetCalculatedProperties(self)
+
+ def CheckEntries(self):
+ Entry.CheckEntries(self)
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index 43b4f850a6..28b5bd19d5 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -97,6 +97,7 @@ ENV_DATA = b'var1=1\nvar2="2"'
PRE_LOAD_MAGIC = b'UBSH'
PRE_LOAD_VERSION = 0x11223344.to_bytes(4, 'big')
PRE_LOAD_HDR_SIZE = 0x00001000.to_bytes(4, 'big')
+TI_BOARD_CONFIG_DATA = b'\x00\x01'
# Subdirectory of the input dir to use to put test FDTs
TEST_FDT_SUBDIR = 'fdts'
@@ -6676,6 +6677,16 @@ fdt fdtmap Extract the devicetree blob from the fdtmap
['fit'])
self.assertIn("Node '/fit': Missing tool: 'mkimage'", str(e.exception))
+ def testTIBoardConfig(self):
+ """Test that a schema validated board config file can be generated"""
+ data = self._DoReadFile('277_ti_board_cfg.dts')
+ self.assertEqual(TI_BOARD_CONFIG_DATA, data)
+
+ def testTIBoardConfig(self):
+ """Test that a schema validated combined board config file can be generated"""
+ data = self._DoReadFile('278_ti_board_cfg_combined.dts')
+ configlen_noheader = TI_BOARD_CONFIG_DATA*4
+ self.assertGreater(data, configlen_noheader)
if __name__ == "__main__":
unittest.main()
diff --git a/tools/binman/test/277_ti_board_cfg.dts b/tools/binman/test/277_ti_board_cfg.dts
new file mode 100644
index 0000000000..8b1b210d9d
--- /dev/null
+++ b/tools/binman/test/277_ti_board_cfg.dts
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+
+/dts-v1/;
+
+/ {
+ binman {
+ ti-board-config {
+ config = "tools/binman/test/yaml/config.yaml";
+ schema = "tools/binman/test/yaml/schema.yaml";
+ };
+ };
+};
diff --git a/tools/binman/test/278_ti_board_cfg_combined.dts b/tools/binman/test/278_ti_board_cfg_combined.dts
new file mode 100644
index 0000000000..54cb383d90
--- /dev/null
+++ b/tools/binman/test/278_ti_board_cfg_combined.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0+
+/dts-v1/;
+
+/ {
+ binman {
+ ti-board-config {
+ board-cfg {
+ config = "tools/binman/test/yaml/config.yaml";
+ schema = "tools/binman/test/yaml/schema.yaml";
+ };
+ sec-cfg {
+ config = "tools/binman/test/yaml/config.yaml";
+ schema = "tools/binman/test/yaml/schema.yaml";
+ };
+ rm-cfg {
+ config = "tools/binman/test/yaml/config.yaml";
+ schema = "tools/binman/test/yaml/schema.yaml";
+ };
+ pm-cfg {
+ config = "tools/binman/test/yaml/config.yaml";
+ schema = "tools/binman/test/yaml/schema.yaml";
+ };
+ };
+ };
+};
diff --git a/tools/binman/test/yaml/config.yaml b/tools/binman/test/yaml/config.yaml
new file mode 100644
index 0000000000..5b17e78af9
--- /dev/null
+++ b/tools/binman/test/yaml/config.yaml
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Test config
+#
+---
+
+main-branch:
+ small-branch:
+ a: 0x0
+ b: 0x1
diff --git a/tools/binman/test/yaml/schema.yaml b/tools/binman/test/yaml/schema.yaml
new file mode 100644
index 0000000000..44f08bb6b0
--- /dev/null
+++ b/tools/binman/test/yaml/schema.yaml
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Test schema
+#
+---
+
+definitions:
+ u8:
+ type: integer
+ minimum: 0
+ maximum: 0xff
+
+type: object
+properties:
+ main-branch:
+ type: object
+ properties:
+ small-branch:
+ type: object
+ properties:
+ a:
+ $ref: "#/definitions/u8"
+ b:
+ $ref: "#/definitions/u8"
+
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 02/18] binman: ti-secure: Add support for TI signing
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 01/18] binman: Add support for generating TI Board config binaries Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 17:11 ` Andrew Davis
2023-04-05 18:37 ` Simon Glass
2023-04-04 12:13 ` [PATCH v2 03/18] ti: sysfw: tiboot3: Add support for packaging sysfw.itb and tiboot3.bin Neha Malcom Francis
` (16 subsequent siblings)
18 siblings, 2 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
The ti-secure entry contains certificate for binaries that will be
loaded or booted by system firmware whereas the ti-secure-rom entry
contains certificate for binaries that will be booted by ROM. Support
for both these types of certificates is necessary for booting of K3
devices.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/keys/custMpk.pem | 51 ++++
board/ti/keys/ti-degenerate-key.pem | 10 +
tools/binman/btool/openssl.py | 244 ++++++++++++++++++
tools/binman/entries.rst | 25 ++
tools/binman/etype/ti_secure.py | 83 ++++++
tools/binman/etype/ti_secure_rom.py | 233 +++++++++++++++++
tools/binman/etype/x509_cert.py | 87 ++++++-
tools/binman/ftest.py | 46 ++++
tools/binman/test/279_ti_secure.dts | 17 ++
tools/binman/test/280_ti_secure_rom.dts | 17 ++
.../test/281_ti_secure_rom_combined.dts | 25 ++
11 files changed, 830 insertions(+), 8 deletions(-)
create mode 100644 board/ti/keys/custMpk.pem
create mode 100644 board/ti/keys/ti-degenerate-key.pem
create mode 100644 tools/binman/etype/ti_secure.py
create mode 100644 tools/binman/etype/ti_secure_rom.py
create mode 100644 tools/binman/test/279_ti_secure.dts
create mode 100644 tools/binman/test/280_ti_secure_rom.dts
create mode 100644 tools/binman/test/281_ti_secure_rom_combined.dts
diff --git a/board/ti/keys/custMpk.pem b/board/ti/keys/custMpk.pem
new file mode 100644
index 0000000000..adba378c80
--- /dev/null
+++ b/board/ti/keys/custMpk.pem
@@ -0,0 +1,51 @@
+-----BEGIN RSA PRIVATE KEY-----
+MIIJKQIBAAKCAgEAvxSuSdh/ctNrI83rSA5l3CJN8g5PgvbttfLd23yR+m5Z/9X3
+tt4EHYrM0pXZ0eDEwfhQv/9IDJEiUJpMe4vzlgooJrOk2eCpVUEa+z5bJ2y/ysBx
+ry9yIu5GASVirT7HBPaxGLYswBJuD+KbPuWmoKgGRQNBF04WH6l01oRO1nmnELgR
+qQ6SHyXdf7Hy0bnyaNgzWUuCfXfM0Zz6I7T7WIjyzerVFvIsdS36YsPBCW7gBnDg
+tQcJmWLZ1uTnbG3IggdQk/fi2O3RX+PQns+TVNlf3V3ON2DxqxSKBHtlp7p/30VF
+fEuhW65OxpQ9jE6H0pQ8pPOf2vzyNnznDa1aQjfxKoHQbqGnZwMeh+0Au3NKaCgx
+ooKaowTB6If/RX6qwZ/UOwXHg/0hcf69fzjJFhlSDuYDM40dHsk2HM1OnYIpiM2b
+Kr5sX3uysjp5AGp99a0anR7NWCrPXvROgKs7T9341N40osQg2VkZLYUCXh9osUyN
+uREG6S12tViMUKg3bmZ4b4MwRk00n7QYSrm7+nvFrtYyEISEbD+agDM1/E281W5g
+VFDPfm2AlwT6jwsg/b2YK6E3vVn9SuxFoQmLF8lyFDO3BV4SXeJaHc4hVPbh6tVV
+qifrTQnfGUCCLmaJF2XZbrPWOE6NYRbWdNTeFl9RGdVCuIPSyN5LqWmXto0CAwEA
+AQKCAgAzkAwcJ0z1GnId/lJQZno8NhGckRoJuEKbR8dwlCP8VUz6Ca5H7Y9kvXDa
+Hs/hn+rYgP6hYOz7XyrIX2rmJ/T6dxEwqGeC1+o59FConcIRWHpE5zuGT6JYJL5F
+TuZa48bm4v8VMQvQZOjIZpkIFwao8c6HTwKAnHTB5IN/48I2hCt+Cn3RhfoOZ7Rm
+4gkpaSkt+7GXlhXHb82YfujNO+hbktEamhUYlQ9EK70Wa8aqmf3gHxO0JgsEFjW8
+lJaSnultlTW8SDcx3LMUUjCYumECk4oX/VlJfmKYjPlVjkr3QQ+Cm3nNucb4K4hc
+c+JL+2ERhSj8RjXL7VgbNgdPnIjvQDJuTNqecTU8xWPYrkOLQpNibbLjnutLkhJz
+fMyRtmDtrsey8WiCDuCHkPJ8/f8RjL2zWI9fzTDDIzdlEKouUFGOovaHVnbua6pn
+hymcu9d9FV3p2rcbj0ivCs7e8j+vhSxFJEJoAbcQdXCTi/n2uR7pLtoMNiUzsejy
+d46Uz+KEU920NTwE2z6JJq8I2vegnxjc7PDDrV3/5rK04B93aXiqvwWseCpxelrI
+xaMkRHbXrIXRO6MXQ3N+zNq8Dg3hjGTTvaBKuwgvqLwlXY8+Aa3ooFzEOInIOSsI
+XcWqXxt/tgZgsj9RwpC42t8kbA+BkbNk9EIUa+P5kEr2P/fO7QKCAQEA4EtArnOX
+D6tQF8uTw8USOZC2P9s/ez1z4jRq3oKP0Kv4tJiuIObJ/dUvGVD7aM5v2xaCfhm8
+xpk09VPUgghfG5jR5qVvQr75kCNToJQudWi4ngk1HwKJzzTO11giFEdybvTUA+Pj
+fmxCM0dYYqRWZoj0hLqXlUCwxE74BFIhJVjeYbf+nTQrqpllTLoW7MTZHzGx5SXx
+4dNzyVAUH49Yt2D8mgXXCkf5sGLh762wj34b/rR10Kr4O5utGMZrfTRIbuQ1pNjU
+m66baPzq+mC0BzqZEW70TgEb7lOr8rcVXLOi3r36omfd9/MHx7iZD6o3K1axSO15
+grD4ZrN7Ac3QJwKCAQEA2heCoBdpvy6YUk8AO2k8qDygTdmPQRuwjjT+Z2fMslBt
+D7DkpKwZ6Bl9OclcpiiLHmH+hv65KqYg+tR0RRb7PcogB9El9x7yKkGTPZEYWGky
+n8P84rJpKwjnwWQvPQktI1cs3YGvZA9DQTFBavRrwuzgd1oSJq5aPQ2tme0kMvWp
+l1/B/cPK+PKCi/Wfisaze1TjijP9qIeUwkdNN6WLrLU3QgsGppcg2I7RQtAIikT6
+GkuiOQAvWMsrJVV6PNrVKz4fJDJ59Rz6jbDHZNi1MEYNxQoB/Pl7QIakbfjWpHLv
+8Ey7cB2JKxjQy8tmyl8WNQVbXbE6daPXcMTUmaRAKwKCAQBv1lYMJmq+T2eCVen6
+BbvOpE+bi5EdvEiaFBTtmiBnpjg+pJq+oRU60h/H+c9CNR0lGxY6Fk9An4f+g6xE
+ojP6KLsQzJCrsVny+wpp2TlJJcxYULMCIVvhy60PR0zG29E9biqBPhJjKUvhEcQK
+e3LxcXyq6fdHXphFajLUxLbuTl+kTgBRFoBnclFGbsubh5PTsA3J+p+fQLZNPPar
+veg4l82cZykQYU8pGkUaI3sUMYd3+zd7sqRP5JHs9pMGPRmY4YW2CsAIWIn5UZNB
+ARMDP76vKKn8cyUgMuxb+9pU/OVLN2NPs4bEaZQJjAwV+YPEwldny7F47xEM9JVz
+EtKlAoIBAQDUt62u3GdGE/p5/ZgqWoDRTyDEDfmN9aYFbmbdEP80xQE7FrxMaZhz
+K7laja6SWmUm40nQ/c45bQQp4uLtKHcxU15egX7YRBTLZl5o5IasZR79ebnEm2O8
+l9kEZeU1USf3mmWmP4GExOZCRfqaiYA6BbUCdJXTqKdXeWnkAssV8UrS3JFoJHpq
+yo7OWGqefyQ8nRW6jO9SW7uaqtUD+7H6aF5XSk3YWvusfdBZrHNH+fM/hpnZovaL
+Us7ogTDS/laA8PyK37jYfMVdQhmZoU1Iomt3zkUWK3gt/aWPpfAlQf4Jka4YspZB
+tNiijefaZ1hPqsPs5Joyd/YAhdsfaHc1AoIBAQCn/9j6RRjRaw0ip756oad4AXHz
+XBwVB2CrY96qT6Hj9Sq7tGgdskqGkOQkAivBLBizUdcWv0t1yenOsSgasQeMlvlh
+B8md9cLvpKXPB3HM3rTDH/xNXe0TpVKLf7SXC8HfDyIweHwMW3QgO2DWrvI4BV/T
+ckBatRNQ90HxkqGFhC/Mp529lQlyg3ifxPxJsvZOyPMUnrflAvsKQk5c2ZiQg3nZ
+h7I2pjSYgCl+Ib52l8p9bf1kcrVGgPM+auzm496i0RPobFeDBoBvSoznJktHJ7+3
+NnZH+jLiZCODiQPGtQUi+T6eIZUIJF0YASpsCCtUzXCxwW3lYIDNy7UlMivF
+-----END RSA PRIVATE KEY-----
diff --git a/board/ti/keys/ti-degenerate-key.pem b/board/ti/keys/ti-degenerate-key.pem
new file mode 100644
index 0000000000..bd7d3745ad
--- /dev/null
+++ b/board/ti/keys/ti-degenerate-key.pem
@@ -0,0 +1,10 @@
+-----BEGIN RSA PRIVATE KEY-----
+MIIBWwIBAAKBgQDRfrnXQaP0k6vRK/gZ+bDflSU6y1JagGeQ/b+QYuiDz14japog
+8fRSu5WBsAxaSaySAUwS3L9Ppw+hGMecmyIJ494aMfZTtk1g49gU58joduiRnu7e
+QSZHMnehhuNlfD7A2tAAKnxIYuabs8zHYM/SS9Ne7t3kIQMbKfUSzNy6qQIBAQIB
+AQJBAOelUA376o6w3HkShXfN+shaOZYqFuTJ9exLMwsLp7DZKXB5F9I4JJ+Vkvho
+k6QWs7vkhleLSYUZknXHYm26ZE0CQQDnhTtd4PTBoZPjPXOeYMJFtEdMNy0XP6ey
+bcce389ugoY7BEkvASrd8PHgJQHziepgWOG4DGp33c64Hfq4zI3NAgEBAgEBAkA0
+RbK4uqoLciQluesTPU6lBy7Se3Dw0F9xBqlF5SR4KI6q+zQrHpBKyFOofMHZgizR
+iCrL55cxEM146zMw3AnF
+-----END RSA PRIVATE KEY-----
diff --git a/tools/binman/btool/openssl.py b/tools/binman/btool/openssl.py
index 3a4dbdd6d7..aad3b61ae2 100644
--- a/tools/binman/btool/openssl.py
+++ b/tools/binman/btool/openssl.py
@@ -15,6 +15,13 @@ import hashlib
from binman import bintool
from u_boot_pylib import tools
+
+VALID_SHAS = [256, 384, 512, 224]
+SHA_OIDS = {256:'2.16.840.1.101.3.4.2.1',
+ 384:'2.16.840.1.101.3.4.2.2',
+ 512:'2.16.840.1.101.3.4.2.3',
+ 224:'2.16.840.1.101.3.4.2.4'}
+
class Bintoolopenssl(bintool.Bintool):
"""openssl tool
@@ -74,6 +81,243 @@ imageSize = INTEGER:{len(indata)}
'-sha512']
return self.run_cmd(*args)
+ def x509_cert_sysfw(self, cert_fname, input_fname, key_fname, sw_rev,
+ config_fname, req_dist_name_dict):
+ """Create a certificate to be booted by system firmware
+
+ Args:
+ cert_fname (str): Filename of certificate to create
+ input_fname (str): Filename containing data to sign
+ key_fname (str): Filename of .pem file
+ sw_rev (int): Software revision
+ config_fname (str): Filename to write fconfig into
+ req_dist_name_dict (dict): Dictionary containing key-value pairs of
+ req_distinguished_name section extensions, must contain extensions for
+ C, ST, L, O, OU, CN and emailAddress
+
+ Returns:
+ str: Tool output
+ """
+ indata = tools.read_file(input_fname)
+ hashval = hashlib.sha512(indata).hexdigest()
+ with open(config_fname, 'w', encoding='utf-8') as outf:
+ print(f'''[ req ]
+distinguished_name = req_distinguished_name
+x509_extensions = v3_ca
+prompt = no
+dirstring_type = nobmp
+
+[ req_distinguished_name ]
+C = {req_dist_name_dict['C']}
+ST = {req_dist_name_dict['ST']}
+L = {req_dist_name_dict['L']}
+O = {req_dist_name_dict['O']}
+OU = {req_dist_name_dict['OU']}
+CN = {req_dist_name_dict['CN']}
+emailAddress = {req_dist_name_dict['emailAddress']}
+
+[ v3_ca ]
+basicConstraints = CA:true
+1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv
+1.3.6.1.4.1.294.1.34 = ASN1:SEQUENCE:sysfw_image_integrity
+1.3.6.1.4.1.294.1.35 = ASN1:SEQUENCE:sysfw_image_load
+
+[ swrv ]
+swrv = INTEGER:{sw_rev}
+
+[ sysfw_image_integrity ]
+shaType = OID:2.16.840.1.101.3.4.2.3
+shaValue = FORMAT:HEX,OCT:{hashval}
+imageSize = INTEGER:{len(indata)}
+
+[ sysfw_image_load ]
+destAddr = FORMAT:HEX,OCT:00000000
+authInPlace = INTEGER:2
+''', file=outf)
+ args = ['req', '-new', '-x509', '-key', key_fname, '-nodes',
+ '-outform', 'DER', '-out', cert_fname, '-config', config_fname,
+ '-sha512']
+ return self.run_cmd(*args)
+
+ def x509_cert_rom(self, cert_fname, input_fname, key_fname, sw_rev,
+ config_fname, req_dist_name_dict, cert_type, bootcore,
+ bootcore_opts, load_addr, sha):
+ """Create a certificate
+
+ Args:
+ cert_fname (str): Filename of certificate to create
+ input_fname (str): Filename containing data to sign
+ key_fname (str): Filename of .pem file
+ sw_rev (int): Software revision
+ config_fname (str): Filename to write fconfig into
+ req_dist_name_dict (dict): Dictionary containing key-value pairs of
+ req_distinguished_name section extensions, must contain extensions for
+ C, ST, L, O, OU, CN and emailAddress
+ cert_type (int): Certification type
+ bootcore (int): Booting core
+ load_addr (int): Load address of image
+ sha (int): Hash function
+
+ Returns:
+ str: Tool output
+ """
+ indata = tools.read_file(input_fname)
+ hashval = hashlib.sha512(indata).hexdigest()
+ with open(config_fname, 'w', encoding='utf-8') as outf:
+ print(f'''
+[ req ]
+ distinguished_name = req_distinguished_name
+ x509_extensions = v3_ca
+ prompt = no
+ dirstring_type = nobmp
+
+ [ req_distinguished_name ]
+C = {req_dist_name_dict['C']}
+ST = {req_dist_name_dict['ST']}
+L = {req_dist_name_dict['L']}
+O = {req_dist_name_dict['O']}
+OU = {req_dist_name_dict['OU']}
+CN = {req_dist_name_dict['CN']}
+emailAddress = {req_dist_name_dict['emailAddress']}
+
+ [ v3_ca ]
+ basicConstraints = CA:true
+ 1.3.6.1.4.1.294.1.1 = ASN1:SEQUENCE:boot_seq
+ 1.3.6.1.4.1.294.1.2 = ASN1:SEQUENCE:image_integrity
+ 1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv
+# 1.3.6.1.4.1.294.1.4 = ASN1:SEQUENCE:encryption
+ 1.3.6.1.4.1.294.1.8 = ASN1:SEQUENCE:debug
+
+ [ boot_seq ]
+ certType = INTEGER:{cert_type}
+ bootCore = INTEGER:{bootcore}
+ bootCoreOpts = INTEGER:{bootcore_opts}
+ destAddr = FORMAT:HEX,OCT:{load_addr:08x}
+ imageSize = INTEGER:{len(indata)}
+
+ [ image_integrity ]
+ shaType = OID:{SHA_OIDS[sha]}
+ shaValue = FORMAT:HEX,OCT:{hashval}
+
+ [ swrv ]
+ swrv = INTEGER:{sw_rev}
+
+# [ encryption ]
+# initalVector = FORMAT:HEX,OCT:TEST_IMAGE_ENC_IV
+# randomString = FORMAT:HEX,OCT:TEST_IMAGE_ENC_RS
+# iterationCnt = INTEGER:TEST_IMAGE_KEY_DERIVE_INDEX
+# salt = FORMAT:HEX,OCT:TEST_IMAGE_KEY_DERIVE_SALT
+
+ [ debug ]
+ debugUID = FORMAT:HEX,OCT:0000000000000000000000000000000000000000000000000000000000000000
+ debugType = INTEGER:4
+ coreDbgEn = INTEGER:0
+ coreDbgSecEn = INTEGER:0
+''', file=outf)
+ args = ['req', '-new', '-x509', '-key', key_fname, '-nodes',
+ '-outform', 'DER', '-out', cert_fname, '-config', config_fname,
+ '-sha512']
+ return self.run_cmd(*args)
+
+ def x509_cert_rom_combined(self, cert_fname, input_fname, key_fname, sw_rev,
+ config_fname, req_dist_name_dict, load_addr, sha, total_size, num_comps,
+ sysfw_inner_cert_ext_boot_sequence_string, dm_data_ext_boot_sequence_string,
+ imagesize_sbl, hashval_sbl, load_addr_sysfw, imagesize_sysfw,
+ hashval_sysfw, load_addr_sysfw_data, imagesize_sysfw_data,
+ hashval_sysfw_data, sysfw_inner_cert_ext_boot_block,
+ dm_data_ext_boot_block):
+ """Create a certificate
+
+ Args:
+ cert_fname (str): Filename of certificate to create
+ input_fname (str): Filename containing data to sign
+ key_fname (str): Filename of .pem file
+ sw_rev (int): Software revision
+ config_fname (str): Filename to write fconfig into
+ req_dist_name_dict (dict): Dictionary containing key-value pairs of
+ req_distinguished_name section extensions, must contain extensions for
+ C, ST, L, O, OU, CN and emailAddress
+ cert_type (int): Certification type
+ bootcore (int): Booting core
+ load_addr (int): Load address of image
+ sha (int): Hash function
+
+ Returns:
+ str: Tool output
+ """
+ indata = tools.read_file(input_fname)
+ hashval = hashlib.sha512(indata).hexdigest()
+ sha_type = SHA_OIDS[sha]
+ with open(config_fname, 'w', encoding='utf-8') as outf:
+ print(f'''
+[ req ]
+distinguished_name = req_distinguished_name
+x509_extensions = v3_ca
+prompt = no
+dirstring_type = nobmp
+
+[ req_distinguished_name ]
+C = {req_dist_name_dict['C']}
+ST = {req_dist_name_dict['ST']}
+L = {req_dist_name_dict['L']}
+O = {req_dist_name_dict['O']}
+OU = {req_dist_name_dict['OU']}
+CN = {req_dist_name_dict['CN']}
+emailAddress = {req_dist_name_dict['emailAddress']}
+
+[ v3_ca ]
+basicConstraints = CA:true
+1.3.6.1.4.1.294.1.3=ASN1:SEQUENCE:swrv
+1.3.6.1.4.1.294.1.9=ASN1:SEQUENCE:ext_boot_info
+
+[swrv]
+swrv=INTEGER:{sw_rev}
+
+[ext_boot_info]
+extImgSize=INTEGER:{total_size}
+numComp=INTEGER:{num_comps}
+sbl=SEQUENCE:sbl
+sysfw=SEQUENCE:sysfw
+sysfw_data=SEQUENCE:sysfw_data
+{sysfw_inner_cert_ext_boot_sequence_string}
+{dm_data_ext_boot_sequence_string}
+
+[sbl]
+compType = INTEGER:1
+bootCore = INTEGER:16
+compOpts = INTEGER:0
+destAddr = FORMAT:HEX,OCT:{load_addr:08x}
+compSize = INTEGER:{imagesize_sbl}
+shaType = OID:{sha_type}
+shaValue = FORMAT:HEX,OCT:{hashval_sbl}
+
+[sysfw]
+compType = INTEGER:2
+bootCore = INTEGER:0
+compOpts = INTEGER:0
+destAddr = FORMAT:HEX,OCT:{load_addr_sysfw:08x}
+compSize = INTEGER:{imagesize_sysfw}
+shaType = OID:{sha_type}
+shaValue = FORMAT:HEX,OCT:{hashval_sysfw}
+
+[sysfw_data]
+compType = INTEGER:18
+bootCore = INTEGER:0
+compOpts = INTEGER:0
+destAddr = FORMAT:HEX,OCT:{load_addr_sysfw_data:08x}
+compSize = INTEGER:{imagesize_sysfw_data}
+shaType = OID:{sha_type}
+shaValue = FORMAT:HEX,OCT:{hashval_sysfw_data}
+
+{sysfw_inner_cert_ext_boot_block}
+
+{dm_data_ext_boot_block}
+ ''', file=outf)
+ args = ['req', '-new', '-x509', '-key', key_fname, '-nodes',
+ '-outform', 'DER', '-out', cert_fname, '-config', config_fname,
+ '-sha512']
+ return self.run_cmd(*args)
+
def fetch(self, method):
"""Fetch handler for openssl
diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index 7cfe61dd09..e240d5ce62 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -2473,3 +2473,28 @@ my-combined-ti-board-config {
};
+
+.. _etype_ti_secure:
+
+Entry: ti-secure: Texas Instruments secured binary
+-------------------------------------------------------------
+
+Support for generation of TI secured binary blobs
+
+Properties / Entry arguments:
+ - content: List of phandles to entries to sign
+ - keyfile: Filename of file containing key to sign binary with
+ - sha: Hash function to be used for signing
+
+Output files:
+ - input.<unique_name> - input file passed to openssl
+ - config.<unique_name> - input file generated for openssl (which is
+ used as the config file)
+ - cert.<unique_name> - output file generated by openssl (which is
+ used as the entry contents)
+
+openssl signs the provided data, using the TI templated config file and
+writes the signature in this entry. This allows verification that the
+data is genuine.
+
+
diff --git a/tools/binman/etype/ti_secure.py b/tools/binman/etype/ti_secure.py
new file mode 100644
index 0000000000..bf58d359b8
--- /dev/null
+++ b/tools/binman/etype/ti_secure.py
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 20
+# Written by Neha Malcom Francis <n-francis@ti.com>
+#
+
+# Support for generation of TI secured binary blobs
+
+from collections import OrderedDict
+import os
+
+from binman.entry import EntryArg
+from binman.etype.x509_cert import Entry_x509_cert
+
+import hashlib
+
+from dtoc import fdt_util
+from u_boot_pylib import tools
+
+class Entry_ti_secure(Entry_x509_cert):
+ """
+ Support for generation of TI secured binary blobs
+
+ Properties / Entry arguments:
+ - content: List of phandles to entries to sign
+ - keyfile: Filename of file containing key to sign binary with
+ - sha: Hash function to be used for signing
+
+ Output files:
+ - input.<unique_name> - input file passed to openssl
+ - config.<unique_name> - input file generated for openssl (which is
+ used as the config file)
+ - cert.<unique_name> - output file generated by openssl (which is
+ used as the entry contents)
+
+ openssl signs the provided data, using the TI templated config file and
+ writes the signature in this entry. This allows verification that the
+ data is genuine.
+ """
+ def __init__(self, section, etype, node):
+ super().__init__(section, etype, node)
+ self.openssl = None
+
+ def ReadNode(self):
+ super().ReadNode()
+ self.key_fname = self.GetEntryArgsOrProps([
+ EntryArg('keyfile', str)], required=True)[0]
+ self.sha = fdt_util.GetInt(self._node, 'sha', 512)
+ self.req_dist_name = {'C': 'US',
+ 'ST': 'TX',
+ 'L': 'Dallas',
+ 'O': 'Texas Instruments Incorporated',
+ 'OU': 'Processors',
+ 'CN': 'TI Support',
+ 'emailAddress': 'support@ti.com'}
+
+ def GetCertificate(self, required):
+ """Get the contents of this entry
+
+ Args:
+ required: True if the data must be present, False if it is OK to
+ return None
+
+ Returns:
+ bytes content of the entry, which is the signed vblock for the
+ provided data
+ """
+ return super().GetCertificate(required=required, type='sysfw')
+
+ def ObtainContents(self):
+ data = self.GetCertificate(False)
+ if data is None:
+ return False
+ self.SetContents(data)
+ return True
+
+ def ProcessContents(self):
+ # The blob may have changed due to WriteSymbols()
+ data = self.GetCertificate(True)
+ return self.ProcessContentsUpdate(data)
+
+ def AddBintools(self, btools):
+ super().AddBintools(btools)
+ self.openssl = self.AddBintool(btools, 'openssl')
diff --git a/tools/binman/etype/ti_secure_rom.py b/tools/binman/etype/ti_secure_rom.py
new file mode 100644
index 0000000000..1e7bb84aef
--- /dev/null
+++ b/tools/binman/etype/ti_secure_rom.py
@@ -0,0 +1,233 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 20
+# Written by Neha Malcom Francis <n-francis@ti.com>
+#
+
+# Support for generation of TI secured bootloaders booted by ROM
+
+from collections import OrderedDict
+import os
+
+from binman.entry import EntryArg
+from binman.etype.x509_cert import Entry_x509_cert
+
+import hashlib
+
+from dtoc import fdt_util
+from u_boot_pylib import tools
+
+VALID_SHAS = [256, 384, 512, 224]
+SHA_OIDS = {256:'2.16.840.1.101.3.4.2.1',
+ 384:'2.16.840.1.101.3.4.2.2',
+ 512:'2.16.840.1.101.3.4.2.3',
+ 224:'2.16.840.1.101.3.4.2.4'}
+
+class Entry_ti_secure_rom(Entry_x509_cert):
+ """
+ Support for generation of TI secured bootloaders booted by ROM
+
+ Properties / Entry arguments:
+ - keyfile: Filename of file containing key to sign binary with
+ - combined: boolean if device follows combined boot flow
+ - countersign: boolean if device contains countersigned system firmware
+ - load: load address of SPL
+ - sw-rev: software revision
+ - sha: Hash function to be used for signing
+ - core: core on which bootloader runs, valid cores are 'secure' and 'public'
+ In case of legacy bootflow:
+ - content: phandle of SPL
+ In case of combined bootflow:
+ - sysfw-inner-cert: boolean if binary contains sysfw inner certificate
+ - dm-data: boolean if binary contains dm-data binary
+ - content-sbl: phandle of SPL binary
+ - content-sysfw: phandle of sysfw binary
+ - content-sysfw-data: phandle of sysfw-data or tifs-data binary
+ - content-sysfw-inner-cert (optional): phandle of sysfw inner certificate binary
+ - content-dm-data (optional): phandle of dm-data binary
+ - load-sysfw: load address of sysfw binary
+ - load-sysfw-data: load address of sysfw-data or tifs-data binary
+ - load-sysfw-inner-cert (optional): load address of sysfw inner certificate binary
+ - load-dm-data (optional): load address of dm-data binary
+
+
+ Output files:
+ - input.<unique_name> - input file passed to openssl
+ - config.<unique_name> - input file generated for openssl (which is
+ used as the config file)
+ - cert.<unique_name> - output file generated by openssl (which is
+ used as the entry contents)
+
+ openssl signs the provided data, using the TI templated config file and
+ writes the signature in this entry. This allows verification that the
+ data is genuine."""
+ def __init__(self, section, etype, node):
+ super().__init__(section, etype, node)
+ self.openssl = None
+
+ def ReadNode(self):
+ super().ReadNode()
+ self.combined = fdt_util.GetBool(self._node, 'combined', False)
+ self.countersign = fdt_util.GetBool(self._node, 'countersign', False)
+ self.load_addr = fdt_util.GetInt(self._node, 'load', 0x00000000)
+ self.sw_rev = fdt_util.GetInt(self._node, 'sw-rev', 1)
+ self.sha = fdt_util.GetInt(self._node, 'sha', 512)
+ self.core = fdt_util.GetString(self._node, 'core', 'secure')
+ self.key_fname = self.GetEntryArgsOrProps([
+ EntryArg('keyfile', str)], required=True)[0]
+ if self.combined:
+ self.sysfw_inner_cert = fdt_util.GetBool(self._node, 'sysfw-inner-cert', False)
+ self.load_addr_sysfw = fdt_util.GetInt(self._node, 'load-sysfw', 0x00000000)
+ self.load_addr_sysfw_data = fdt_util.GetInt(self._node, 'load-sysfw-data', 0x00000000)
+ self.dm_data = fdt_util.GetBool(self._node, 'dm-data', False)
+ if self.dm_data:
+ self.load_addr_dm_data = fdt_util.GetInt(self._node, 'load-dm-data', 0x00000000)
+ self.req_dist_name = {'C': 'US',
+ 'ST': 'TX',
+ 'L': 'Dallas',
+ 'O': 'Texas Instruments Incorporated',
+ 'OU': 'Processors',
+ 'CN': 'TI Support',
+ 'emailAddress': 'support@ti.com'}
+
+ def NonCombinedGetCertificate(self, required):
+ if self.core == 'secure':
+ if self.countersign:
+ self.cert_type = 2
+ else:
+ self.cert_type = 3
+ self.bootcore = 0
+ self.bootcore_opts = 32
+ else:
+ self.cert_type = 1
+ self.bootcore = 16
+ if self.combined:
+ self.bootcore_opts = 32
+ else:
+ self.bootcore_opts = 0
+ return super().GetCertificate(required=required, type='rom')
+
+ def CombinedGetCertificate(self, required):
+ uniq = self.GetUniqueName()
+
+ self.num_comps = 3
+ self.sha_type = SHA_OIDS[self.sha]
+
+ # sbl
+ self.content = fdt_util.GetPhandleList(self._node, 'content-sbl')
+ input_data_sbl = self.GetContents(required)
+ if input_data_sbl is None:
+ return None
+
+ input_fname_sbl = tools.get_output_filename('input.%s' % uniq)
+ tools.write_file(input_fname_sbl, input_data_sbl)
+
+ indata_sbl = tools.read_file(input_fname_sbl)
+ self.hashval_sbl = hashlib.sha512(indata_sbl).hexdigest()
+ self.imagesize_sbl = len(indata_sbl)
+
+ # sysfw
+ self.content = fdt_util.GetPhandleList(self._node, 'content-sysfw')
+ input_data_sysfw = self.GetContents(required)
+ if input_data_sysfw is None:
+ return None
+
+ input_fname_sysfw = tools.get_output_filename('input.%s' % uniq)
+ tools.write_file(input_fname_sysfw, input_data_sysfw)
+
+ indata_sysfw = tools.read_file(input_fname_sysfw)
+ self.hashval_sysfw = hashlib.sha512(indata_sysfw).hexdigest()
+ self.imagesize_sysfw = len(indata_sysfw)
+
+ # sysfw data
+ self.content = fdt_util.GetPhandleList(self._node, 'content-sysfw-data')
+ input_data_sysfw_data = self.GetContents(required)
+ if input_data_sysfw_data is None:
+ return None
+
+ input_fname_sysfw_data = tools.get_output_filename('input.%s' % uniq)
+ tools.write_file(input_fname_sysfw_data, input_data_sysfw_data)
+
+ indata_sysfw_data = tools.read_file(input_fname_sysfw_data)
+ self.hashval_sysfw_data = hashlib.sha512(indata_sysfw_data).hexdigest()
+ self.imagesize_sysfw_data = len(indata_sysfw_data)
+
+ # sysfw inner cert
+ if self.sysfw_inner_cert:
+ self.content = fdt_util.GetPhandleList(self._node, 'content-sysfw-inner-cert')
+ input_data_sysfw_inner_cert = self.GetContents(required)
+ if input_data_sysfw_inner_cert is None:
+ return None
+
+ input_fname_sysfw_inner_cert = tools.get_output_filename('input.%s' % uniq)
+ tools.write_file(input_fname_sysfw_inner_cert, input_data_sysfw_inner_cert)
+
+ indata_sysfw_inner_cert = tools.read_file(input_fname_sysfw_inner_cert)
+ hashval_sysfw_inner_cert = hashlib.sha512(indata_sysfw_inner_cert).hexdigest()
+ imagesize_sysfw_inner_cert = len(indata_sysfw_inner_cert)
+ self.num_comps += 1
+ self.sysfw_inner_cert_ext_boot_sequence_string = "sysfw_inner_cert=SEQUENCE:sysfw_inner_cert"
+ self.sysfw_inner_cert_ext_boot_block = f"""[sysfw_inner_cert]
+compType = INTEGER:3
+bootCore = INTEGER:0
+compOpts = INTEGER:0
+destAddr = FORMAT:HEX,OCT:00000000
+compSize = INTEGER:{imagesize_sysfw_inner_cert}
+shaType = OID:{self.sha_type}
+shaValue = FORMAT:HEX,OCT:{hashval_sysfw_inner_cert}"""
+ else:
+ self.sysfw_inner_cert_ext_boot_block = ""
+ self.sysfw_inner_cert_ext_boot_sequence_string = ""
+ imagesize_sysfw_inner_cert = 0
+
+ # dm data
+ if self.dm_data:
+ self.content = fdt_util.GetPhandleList(self._node, 'content-dm-data')
+ input_data_dm_data = self.GetContents(required)
+ if input_data_dm_data is None:
+ return None
+
+ input_fname_dm_data = tools.get_output_filename('input.%s' % uniq)
+ tools.write_file(input_fname_dm_data, input_data_dm_data)
+
+ indata_dm_data = tools.read_file(input_fname_dm_data)
+ hashval_dm_data = hashlib.sha512(indata_dm_data).hexdigest()
+ imagesize_dm_data = len(indata_dm_data)
+ self.num_comps += 1
+ self.dm_data_ext_boot_sequence_string = "dm_data=SEQUENCE:dm_data"
+ self.dm_data_ext_boot_block = f"""[dm_data]
+compType = INTEGER:17
+bootCore = INTEGER:16
+compOpts = INTEGER:0
+destAddr = FORMAT:HEX,OCT:{self.load_addr_dm_data:08x}
+compSize = INTEGER:{imagesize_dm_data}
+shaType = OID:{self.sha_type}
+shaValue = FORMAT:HEX,OCT:{hashval_dm_data}"""
+ else:
+ self.dm_data_ext_boot_sequence_string = ""
+ self.dm_data_ext_boot_block = ""
+ imagesize_dm_data = 0
+
+ self.total_size = self.imagesize_sbl + self.imagesize_sysfw + self.imagesize_sysfw_data + imagesize_sysfw_inner_cert + imagesize_dm_data
+ return super().GetCertificate(required=required, type='rom-combined')
+
+ def GetCertificate(self, required):
+ if self.combined:
+ return self.CombinedGetCertificate(required)
+ else:
+ return self.NonCombinedGetCertificate(required)
+
+ def ObtainContents(self):
+ data = self.GetCertificate(False)
+ if data is None:
+ return False
+ self.SetContents(data)
+ return True
+
+ def ProcessContents(self):
+ # The blob may have changed due to WriteSymbols()
+ data = self.GetCertificate(True)
+ return self.ProcessContentsUpdate(data)
+
+ def AddBintools(self, btools):
+ super().AddBintools(btools)
+ self.openssl = self.AddBintool(btools, 'openssl')
diff --git a/tools/binman/etype/x509_cert.py b/tools/binman/etype/x509_cert.py
index f80a6ec2d1..d028cfe38c 100644
--- a/tools/binman/etype/x509_cert.py
+++ b/tools/binman/etype/x509_cert.py
@@ -31,6 +31,26 @@ class Entry_x509_cert(Entry_collection):
def __init__(self, section, etype, node):
super().__init__(section, etype, node)
self.openssl = None
+ self.req_dist_name = None
+ self.cert_type = None
+ self.bootcore = None
+ self.bootcore_opts = None
+ self.load_addr = None
+ self.sha = None
+ self.total_size = None
+ self.num_comps = None
+ self.sysfw_inner_cert_ext_boot_sequence_string = None
+ self.dm_data_ext_boot_sequence_string = None
+ self.imagesize_sbl = None
+ self.hashval_sbl = None
+ self.load_addr_sysfw = None
+ self.imagesize_sysfw = None
+ self.hashval_sysfw = None
+ self.load_addr_sysfw_data = None
+ self.imagesize_sysfw_data = None
+ self.hashval_sysfw_data = None
+ self.sysfw_inner_cert_ext_boot_block = None
+ self.dm_data_ext_boot_block = None
def ReadNode(self):
super().ReadNode()
@@ -38,13 +58,16 @@ class Entry_x509_cert(Entry_collection):
self._cert_rev = fdt_util.GetInt(self._node, 'cert-revision-int', 0)
self.key_fname = self.GetEntryArgsOrProps([
EntryArg('keyfile', str)], required=True)[0]
+ self.sw_rev = fdt_util.GetInt(self._node, 'sw-rev', 1)
- def GetCertificate(self, required):
+ def GetCertificate(self, required, type='generic'):
"""Get the contents of this entry
Args:
required: True if the data must be present, False if it is OK to
return None
+ type: Type of x509 certificate to generate, current supported ones are
+ 'generic', 'sysfw', 'rom'
Returns:
bytes content of the entry, which is the signed vblock for the
@@ -60,13 +83,61 @@ class Entry_x509_cert(Entry_collection):
input_fname = tools.get_output_filename('input.%s' % uniq)
config_fname = tools.get_output_filename('config.%s' % uniq)
tools.write_file(input_fname, input_data)
- stdout = self.openssl.x509_cert(
- cert_fname=output_fname,
- input_fname=input_fname,
- key_fname=self.key_fname,
- cn=self._cert_ca,
- revision=self._cert_rev,
- config_fname=config_fname)
+ if type == 'generic':
+ stdout = self.openssl.x509_cert(
+ cert_fname=output_fname,
+ input_fname=input_fname,
+ key_fname=self.key_fname,
+ cn=self._cert_ca,
+ revision=self._cert_rev,
+ config_fname=config_fname)
+ elif type == 'sysfw':
+ stdout = self.openssl.x509_cert_sysfw(
+ cert_fname=output_fname,
+ input_fname=input_fname,
+ key_fname=self.key_fname,
+ config_fname=config_fname,
+ sw_rev=self.sw_rev,
+ req_dist_name_dict=self.req_dist_name)
+ elif type == 'rom':
+ stdout = self.openssl.x509_cert_rom(
+ cert_fname=output_fname,
+ input_fname=input_fname,
+ key_fname=self.key_fname,
+ config_fname=config_fname,
+ sw_rev=self.sw_rev,
+ req_dist_name_dict=self.req_dist_name,
+ cert_type=self.cert_type,
+ bootcore=self.bootcore,
+ bootcore_opts=self.bootcore_opts,
+ load_addr=self.load_addr,
+ sha=self.sha
+ )
+ elif type == 'rom-combined':
+ stdout = self.openssl.x509_cert_rom_combined(
+ cert_fname=output_fname,
+ input_fname=input_fname,
+ key_fname=self.key_fname,
+ config_fname=config_fname,
+ sw_rev=self.sw_rev,
+ req_dist_name_dict=self.req_dist_name,
+ load_addr=self.load_addr,
+ sha=self.sha,
+ total_size=self.total_size,
+ num_comps=self.num_comps,
+ sysfw_inner_cert_ext_boot_sequence_string=self.sysfw_inner_cert_ext_boot_sequence_string,
+ dm_data_ext_boot_sequence_string=self.dm_data_ext_boot_sequence_string,
+ imagesize_sbl=self.imagesize_sbl,
+ hashval_sbl=self.hashval_sbl,
+ load_addr_sysfw=self.load_addr_sysfw,
+ imagesize_sysfw=self.imagesize_sysfw,
+ hashval_sysfw=self.hashval_sysfw,
+ load_addr_sysfw_data=self.load_addr_sysfw_data,
+ imagesize_sysfw_data=self.imagesize_sysfw_data,
+ hashval_sysfw_data=self.hashval_sysfw_data,
+ sysfw_inner_cert_ext_boot_block=self.sysfw_inner_cert_ext_boot_block,
+ dm_data_ext_boot_block=self.dm_data_ext_boot_block
+ )
if stdout is not None:
data = tools.read_file(output_fname)
else:
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index 28b5bd19d5..61b71aa87e 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -98,6 +98,7 @@ PRE_LOAD_MAGIC = b'UBSH'
PRE_LOAD_VERSION = 0x11223344.to_bytes(4, 'big')
PRE_LOAD_HDR_SIZE = 0x00001000.to_bytes(4, 'big')
TI_BOARD_CONFIG_DATA = b'\x00\x01'
+TI_UNSECURE_DATA = b'unsecuredata'
# Subdirectory of the input dir to use to put test FDTs
TEST_FDT_SUBDIR = 'fdts'
@@ -208,6 +209,7 @@ class TestFunctional(unittest.TestCase):
TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA)
TestFunctional._MakeInputFile('scp.bin', SCP_DATA)
TestFunctional._MakeInputFile('rockchip-tpl.bin', ROCKCHIP_TPL_DATA)
+ TestFunctional._MakeInputFile('ti_unsecure.bin', TI_UNSECURE_DATA)
# Add a few .dtb files for testing
TestFunctional._MakeInputFile('%s/test-fdt1.dtb' % TEST_FDT_SUBDIR,
@@ -6688,5 +6690,49 @@ fdt fdtmap Extract the devicetree blob from the fdtmap
configlen_noheader = TI_BOARD_CONFIG_DATA*4
self.assertGreater(data, configlen_noheader)
+ def testPackTiSecure(self):
+ """Test that an image with a TI secured binary can be created"""
+ keyfile = self.TestFile('key.key')
+ entry_args = {
+ 'keyfile': keyfile,
+ }
+ data = self._DoReadFileDtb('279_ti_secure.dts',
+ entry_args=entry_args)[0]
+ self.assertGreater(len(data), len(TI_UNSECURE_DATA))
+
+ def testPackTiSecureMissingTool(self):
+ """Test that an image with a TI secured binary (non-functional) can be created
+ when openssl is missing"""
+ keyfile = self.TestFile('key.key')
+ entry_args = {
+ 'keyfile': keyfile,
+ }
+ with test_util.capture_sys_output() as (_, stderr):
+ self._DoTestFile('279_ti_secure.dts',
+ force_missing_bintools='openssl',
+ entry_args=entry_args)
+ err = stderr.getvalue()
+ self.assertRegex(err, "Image 'image'.*missing bintools.*: openssl")
+
+ def testPackTiSecureROM(self):
+ """Test that a ROM image with a TI secured binary can be created"""
+ keyfile = self.TestFile('key.key')
+ entry_args = {
+ 'keyfile': keyfile,
+ }
+ data = self._DoReadFileDtb('280_ti_secure_rom.dts',
+ entry_args=entry_args)[0]
+ self.assertGreater(len(data), len(TI_UNSECURE_DATA))
+
+ def testPackTiSecureROMCombined(self):
+ """Test that a ROM image with a TI secured binary can be created"""
+ keyfile = self.TestFile('key.key')
+ entry_args = {
+ 'keyfile': keyfile,
+ }
+ data = self._DoReadFileDtb('281_ti_secure_rom_combined.dts',
+ entry_args=entry_args)[0]
+ self.assertGreater(len(data), len(TI_UNSECURE_DATA))
+
if __name__ == "__main__":
unittest.main()
diff --git a/tools/binman/test/279_ti_secure.dts b/tools/binman/test/279_ti_secure.dts
new file mode 100644
index 0000000000..941d0ab4ca
--- /dev/null
+++ b/tools/binman/test/279_ti_secure.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ ti-secure {
+ content = <&unsecure_binary>;
+ };
+ unsecure_binary: blob-ext {
+ filename = "ti_unsecure.bin";
+ };
+ };
+};
diff --git a/tools/binman/test/280_ti_secure_rom.dts b/tools/binman/test/280_ti_secure_rom.dts
new file mode 100644
index 0000000000..d1313769f4
--- /dev/null
+++ b/tools/binman/test/280_ti_secure_rom.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ ti-secure-rom {
+ content = <&unsecure_binary>;
+ };
+ unsecure_binary: blob-ext {
+ filename = "ti_unsecure.bin";
+ };
+ };
+};
diff --git a/tools/binman/test/281_ti_secure_rom_combined.dts b/tools/binman/test/281_ti_secure_rom_combined.dts
new file mode 100644
index 0000000000..bf872739bc
--- /dev/null
+++ b/tools/binman/test/281_ti_secure_rom_combined.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ ti-secure-rom {
+ content = <&unsecure_binary>;
+ content-sbl = <&unsecure_binary>;
+ content-sysfw = <&unsecure_binary>;
+ content-sysfw-data = <&unsecure_binary>;
+ content-sysfw-inner-cert = <&unsecure_binary>;
+ content-dm-data = <&unsecure_binary>;
+ combined;
+ sysfw-inner-cert;
+ dm-data;
+ };
+ unsecure_binary: blob-ext {
+ filename = "ti_unsecure.bin";
+ };
+ };
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 03/18] ti: sysfw: tiboot3: Add support for packaging sysfw.itb and tiboot3.bin
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 01/18] binman: Add support for generating TI Board config binaries Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 02/18] binman: ti-secure: Add support for TI signing Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 04/18] j721e: schema: yaml: Add general schema and J721E board config files Neha Malcom Francis
` (15 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Board config binary artifacts must be populated in the R5 output
directory to be used by binman to package sysfw.itb and tiboot3.bin.
For devices that follow combined flow, these board configuration
binaries must again be packaged into a combined board configuration
blobs to be used by binman to package tiboot3.bin.
Modify config.mk to generate all the board configuration binaries
as well as the combined blob binaries.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/mach-k3/config.mk | 50 ++++++++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index 9306f2627d..b280a6a048 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -39,6 +39,56 @@ $(warning "WARNING: Software revision file not found. Default may not work on HS
endif
endif
+O ?= .
+
+# Board config binary artifacts necessary for packaging of tiboot3.bin
+# and sysfw.itb by binman, currently for general purpose devices and
+# devices that require sysfw.itb in ROM boot image.
+
+ifdef CONFIG_BINMAN
+
+ifndef CONFIG_TARGET_J7200_R5_EVM
+BOARD_YAML = $(srctree)/board/ti/$(BOARD)/board-cfg.yaml
+RM_YAML = $(srctree)/board/ti/$(BOARD)/rm-cfg.yaml
+SEC_YAML = $(srctree)/board/ti/$(BOARD)/sec-cfg.yaml
+PM_YAML = $(srctree)/board/ti/$(BOARD)/pm-cfg.yaml
+else
+BOARD_YAML = $(srctree)/board/ti/$(BOARD)/board-cfg_j7200.yaml
+RM_YAML = $(srctree)/board/ti/$(BOARD)/rm-cfg_j7200.yaml
+SEC_YAML = $(srctree)/board/ti/$(BOARD)/sec-cfg_j7200.yaml
+PM_YAML = $(srctree)/board/ti/$(BOARD)/pm-cfg_j7200.yaml
+endif
+
+CUSTOMER_KEY = $(srctree)/board/ti/keys/custMpk.pem
+TI_DEGENERATE_KEY = $(srctree)/board/ti/keys/ti-degenerate-key.pem
+
+SCHEMA_YAML = $(srctree)/board/ti/common/schema.yaml
+
+board-cfg.yaml: $(BOARD_YAML)
+ @cp $< $@
+rm-cfg.yaml: $(RM_YAML)
+ @cp $< $@
+sec-cfg.yaml: $(SEC_YAML)
+ @cp $< $@
+pm-cfg.yaml: $(PM_YAML)
+ @cp $< $@
+
+schema.yaml: $(SCHEMA_YAML)
+ @cp $< $@
+custMpk.pem: $(CUSTOMER_KEY)
+ @cp $< $@
+ti-degenerate-key.pem: $(TI_DEGENERATE_KEY)
+ @cp $< $@
+
+INPUTS-y += board-cfg.yaml
+INPUTS-y += rm-cfg.yaml
+INPUTS-y += sec-cfg.yaml
+INPUTS-y += pm-cfg.yaml
+INPUTS-y += schema.yaml
+INPUTS-y += custMpk.pem
+INPUTS-y += ti-degenerate-key.pem
+endif
+
# tiboot3.bin is mandated by ROM and ROM only supports R5 boot.
# So restrict tiboot3.bin creation for CPU_V7R.
ifdef CONFIG_CPU_V7R
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 04/18] j721e: schema: yaml: Add general schema and J721E board config files
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (2 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 03/18] ti: sysfw: tiboot3: Add support for packaging sysfw.itb and tiboot3.bin Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 05/18] j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img Neha Malcom Francis
` (14 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Schema file in YAML must be provided in board/ti/common for validating
input config files and packaging system firmware. The schema includes
entries for rm-cfg, board-cfg, pm-cfg and sec-cfg.
Board config file must be provided in board/ti/<devicename> in YAML.
These can then be consumed for generation of binaries to package system
firmware. Added YAML config for J721E in particular.
Signed-off-by: Tarun Sahu <t-sahu@ti.com>
[n-francis@ti.com: prepared patch for upstreaming]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/common/schema.yaml | 355 +++++
board/ti/j721e/board-cfg.yaml | 37 +
board/ti/j721e/pm-cfg.yaml | 13 +
board/ti/j721e/rm-cfg.yaml | 2757 +++++++++++++++++++++++++++++++++
board/ti/j721e/sec-cfg.yaml | 379 +++++
5 files changed, 3541 insertions(+)
create mode 100644 board/ti/common/schema.yaml
create mode 100644 board/ti/j721e/board-cfg.yaml
create mode 100644 board/ti/j721e/pm-cfg.yaml
create mode 100644 board/ti/j721e/rm-cfg.yaml
create mode 100644 board/ti/j721e/sec-cfg.yaml
diff --git a/board/ti/common/schema.yaml b/board/ti/common/schema.yaml
new file mode 100644
index 0000000000..070ff797e0
--- /dev/null
+++ b/board/ti/common/schema.yaml
@@ -0,0 +1,355 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Config schema for TI K3 devices
+#
+
+---
+
+definitions:
+ u8:
+ type: integer
+ minimum: 0
+ maximum: 0xff
+ u16:
+ type: integer
+ minimum: 0
+ maximum: 0xffff
+ u32:
+ type: integer
+ minimum: 0
+ maximum: 0xffffffff
+
+
+
+type: object
+properties:
+ pm-cfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+ board-cfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+ control:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ main_isolation_enable:
+ $ref: "#/definitions/u8"
+ main_isolation_hostid:
+ $ref: "#/definitions/u16"
+
+
+ secproxy:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ scaling_factor:
+ $ref: "#/definitions/u8"
+ scaling_profile:
+ $ref: "#/definitions/u8"
+ disable_main_nav_secure_proxy:
+ $ref: "#/definitions/u8"
+
+ msmc:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ msmc_cache_size:
+ $ref: "#/definitions/u8"
+ debug_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ trace_dst_enables:
+ $ref: "#/definitions/u16"
+ trace_src_enables:
+ $ref: "#/definitions/u16"
+
+ sec-cfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+
+ processor_acl_list:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ proc_acl_entries:
+ type: array
+ minItems: 32
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ processor_id:
+ $ref: "#/definitions/u8"
+ proc_access_master:
+ $ref: "#/definitions/u8"
+ proc_access_secondary:
+ type: array
+ minItems: 3
+ maxItems: 3
+ items:
+ $ref: "#/definitions/u8"
+ host_hierarchy:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ host_hierarchy_entries:
+ type: array
+ minItems: 32
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ host_id:
+ $ref: "#/definitions/u8"
+ supervisor_host_id:
+ $ref: "#/definitions/u8"
+
+ otp_config:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ otp_entry:
+ type: array
+ minItems: 32
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ host_id:
+ $ref: "#/definitions/u8"
+ host_perms:
+ $ref: "#/definitions/u8"
+ write_host_id:
+ $ref: "#/definitions/u8"
+
+ dkek_config:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ allowed_hosts:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+ allow_dkek_export_tisci:
+ $ref: "#/definitions/u8"
+ rsvd:
+ type: array
+ minItems: 3
+ maxItems: 3
+ items:
+ $ref: "#/definitions/u8"
+
+ sa2ul_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ rsvd:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+ sec_dbg_config:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ allow_jtag_unlock:
+ $ref: "#/definitions/u8"
+ allow_wildcard_unlock:
+ $ref: "#/definitions/u8"
+ allowed_debug_level_rsvd:
+ $ref: "#/definitions/u8"
+ rsvd:
+ $ref: "#/definitions/u8"
+ min_cert_rev:
+ $ref: "#/definitions/u32"
+ jtag_unlock_hosts:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+
+
+ sec_handover_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ handover_msg_sender:
+ $ref: "#/definitions/u8"
+ handover_to_host_id:
+ $ref: "#/definitions/u8"
+ rsvd:
+ type: array
+ minItems: 4
+ maxItems: 4
+ items:
+ $ref: "#/definitions/u8"
+
+ rm-cfg:
+ type: object
+ properties:
+ rm_boardcfg:
+ type: object
+ properties:
+ rev:
+ type: object
+ properties:
+ boardcfg_abi_maj:
+ $ref: "#/definitions/u8"
+ boardcfg_abi_min:
+ $ref: "#/definitions/u8"
+
+ host_cfg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ host_cfg_entries:
+ type: array
+ minItems: 0
+ maxItems: 32
+ items:
+ type: object
+ properties:
+ host_id:
+ $ref: "#/definitions/u8"
+ allowed_atype:
+ $ref: "#/definitions/u8"
+ allowed_qos:
+ $ref: "#/definitions/u16"
+ allowed_orderid:
+ $ref: "#/definitions/u32"
+ allowed_priority:
+ $ref: "#/definitions/u16"
+ allowed_sched_priority:
+ $ref: "#/definitions/u8"
+ resasg:
+ type: object
+ properties:
+ subhdr:
+ type: object
+ properties:
+ magic:
+ $ref: "#/definitions/u16"
+ size:
+ $ref: "#/definitions/u16"
+ resasg_entries_size:
+ $ref: "#/definitions/u16"
+ reserved:
+ $ref: "#/definitions/u16"
+
+ resasg_entries:
+ type: array
+ minItems: 0
+ maxItems: 418
+ items:
+ type: object
+ properties:
+ start_resource:
+ $ref: "#/definitions/u16"
+ num_resource:
+ $ref: "#/definitions/u16"
+ type:
+ $ref: "#/definitions/u16"
+ host_id:
+ $ref: "#/definitions/u8"
+ reserved:
+ $ref: "#/definitions/u8"
diff --git a/board/ti/j721e/board-cfg.yaml b/board/ti/j721e/board-cfg.yaml
new file mode 100644
index 0000000000..9f5e00b3dc
--- /dev/null
+++ b/board/ti/j721e/board-cfg.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for J721E
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size: 0x0
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
+
diff --git a/board/ti/j721e/pm-cfg.yaml b/board/ti/j721e/pm-cfg.yaml
new file mode 100644
index 0000000000..40a8dfb7af
--- /dev/null
+++ b/board/ti/j721e/pm-cfg.yaml
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for J721E
+#
+
+---
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+
diff --git a/board/ti/j721e/rm-cfg.yaml b/board/ti/j721e/rm-cfg.yaml
new file mode 100644
index 0000000000..2fc41f5e87
--- /dev/null
+++ b/board/ti/j721e/rm-cfg.yaml
@@ -0,0 +1,2757 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Resource management configuration for J721E
+#
+
+---
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size: 356
+ host_cfg_entries:
+ - #1
+ host_id: 3
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #2
+ host_id: 5
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #3
+ host_id: 12
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #4
+ host_id: 13
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #5
+ host_id: 21
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #6
+ host_id: 26
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #7
+ host_id: 28
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #8
+ host_id: 35
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #9
+ host_id: 37
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #10
+ host_id: 40
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #11
+ host_id: 42
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - #12
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #13
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #14
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #15
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #16
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #17
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #18
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #19
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #20
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #21
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #22
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #23
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #24
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #25
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #26
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #27
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #28
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #29
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #30
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - #31
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+ num_resource: 0
+ type: 15117
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 0
+ type: 15117
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 8
+ num_resource: 1
+ type: 15117
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 9
+ num_resource: 1
+ type: 15117
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 1
+ type: 15117
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 11
+ num_resource: 1
+ type: 15117
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 12
+ num_resource: 1
+ type: 15117
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 1
+ type: 15117
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 14
+ num_resource: 1
+ type: 15117
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 15
+ num_resource: 9
+ type: 15117
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 24
+ num_resource: 6
+ type: 15117
+ host_id: 13
+ reserved: 0
+ -
+ start_resource: 30
+ num_resource: 3
+ type: 15117
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 33
+ num_resource: 2
+ type: 15117
+ host_id: 5
+ reserved: 0
+ -
+ start_resource: 35
+ num_resource: 1
+ type: 15117
+ host_id: 40
+ reserved: 0
+ -
+ start_resource: 36
+ num_resource: 1
+ type: 15117
+ host_id: 42
+ reserved: 0
+ -
+ start_resource: 37
+ num_resource: 1
+ type: 15117
+ host_id: 21
+ reserved: 0
+ -
+ start_resource: 38
+ num_resource: 1
+ type: 15117
+ host_id: 26
+ reserved: 0
+ -
+ start_resource: 39
+ num_resource: 1
+ type: 15117
+ host_id: 28
+ reserved: 0
+ -
+ start_resource: 40
+ num_resource: 2
+ type: 15117
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 42
+ num_resource: 1
+ type: 15117
+ host_id: 37
+ reserved: 0
+ -
+ start_resource: 43
+ num_resource: 3
+ type: 15117
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15119
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 15119
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 12
+ num_resource: 20
+ type: 15168
+ host_id: 3
+ reserved: 0
+ -
+ start_resource: 36
+ num_resource: 28
+ type: 15168
+ host_id: 5
+ reserved: 0
diff --git a/board/ti/j721e/sec-cfg.yaml b/board/ti/j721e/sec-cfg.yaml
new file mode 100644
index 0000000000..0f62e51e9f
--- /dev/null
+++ b/board/ti/j721e/sec-cfg.yaml
@@ -0,0 +1,379 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security configuration for J721E
+#
+
+---
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ write_host_id: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci: 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size: 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
+ allowed_debug_level_rsvd: 0
+ rsvd: 0
+ min_cert_rev: 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender: 0
+ handover_to_host_id: 0
+ rsvd: [0, 0, 0, 0]
+
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 05/18] j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (3 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 04/18] j721e: schema: yaml: Add general schema and J721E board config files Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 17:20 ` Andrew Davis
2023-04-04 12:13 ` [PATCH v2 06/18] j7200: yaml: Add J7200 board config files Neha Malcom Francis
` (13 subsequent siblings)
18 siblings, 1 reply; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
By providing entries in the binman node of the device tree, binman will
be able to find and package board config artifacts generated by
TIBoardConfig with sysfw.bin and generate the final image sysfw.itb.
It will also pick out the R5 SPL and sign it with the help of TI signing
entry and generate the final tiboot3.bin.
Entries for A72 build have been added to k3-j721e-binman.dtsi to
generate tispl.bin and u-boot.img.
Support has been added for both HS(SR 1.1) and GP images where the
encrypted system firmware binary must be signed along with the signed
certificate binary.
tiboot3.bin and sysfw-j721e_sr1_1-hs.itb: For HS devices
tiboot3.bin_unsigned and sysfw-j721e-gp-evm.itb: For GP devices
<filename>.bin/img: For HS devices
<filename>.bin_unsigned/img_unsigned: For GP devices
Intention of patch is to move signing and packaging to binman,
thus making makefile target only if binman is not enabled.
It is to be noted that the bootflow followed by J721E requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
sysfw.itb:
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OPTEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-j721e-binman.dtsi | 634 ++++++++++++++++++
.../k3-j721e-common-proc-board-u-boot.dtsi | 1 +
.../arm/dts/k3-j721e-r5-common-proc-board.dts | 1 +
arch/arm/mach-k3/config.mk | 4 +
board/ti/j721e/Kconfig | 2 +
scripts/Makefile.spl | 2 +
6 files changed, 644 insertions(+)
create mode 100644 arch/arm/dts/k3-j721e-binman.dtsi
diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi
new file mode 100644
index 0000000000..fc53b3f119
--- /dev/null
+++ b/arch/arm/dts/k3-j721e-binman.dtsi
@@ -0,0 +1,634 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_J721E_R5_EVM
+
+&binman {
+ board-cfg {
+ filename = "board-cfg.bin";
+ ti-board-config {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ pm-cfg {
+ filename = "pm-cfg.bin";
+ ti-board-config {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ rm-cfg {
+ filename = "rm-cfg.bin";
+ ti-board-config {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ sec-cfg {
+ filename = "sec-cfg.bin";
+ ti-board-config {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure-rom {
+ content = <&u_boot_spl>;
+ core = "public";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_spl: u-boot-spl {
+ no-expanded;
+ };
+ };
+ sysfw {
+ filename = "sysfw.bin";
+ ti-secure-rom {
+ content = <&ti_fs_cert>;
+ core = "secure";
+ load = <0x40000>;
+ keyfile = "custMpk.pem";
+ countersign;
+ };
+ ti_fs_cert: ti-fs-cert.bin {
+ filename = "ti-fs-firmware-j721e_sr1_1-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ ti-fs-firmware-j721e_sr1_1-hs-enc.bin {
+ filename = "ti-fs-firmware-j721e_sr1_1-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ itb {
+ filename = "sysfw-j721e_sr1_1-hs.itb";
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&board_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ board_cfg: board-cfg {
+ filename = "board-cfg.bin";
+ type = "blob-ext";
+ };
+
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&pm_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ pm_cfg: pm-cfg {
+ filename = "pm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&rm_cfg>;
+ keyfile = "custMpk.pem";\
+ };
+ rm_cfg: rm-cfg {
+ filename = "rm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&sec_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ sec_cfg: sec-cfg {
+ filename = "sec-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure-rom {
+ content = <&u_boot_spl_unsigned>;
+ core = "public";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ keyfile = "ti-degenerate-key.pem";
+ };
+ u_boot_spl_unsigned: u-boot-spl {
+ no-expanded;
+ };
+ };
+ sysfw_gp {
+ filename = "sysfw.bin_gp";
+ ti-secure-rom {
+ content = <&ti_fs>;
+ core = "secure";
+ load = <0x40000>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ keyfile = "ti-degenerate-key.pem";
+ countersign;
+ };
+ ti_fs: ti-fs.bin {
+ filename = "ti-fs-firmware-j721e-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ itb_gp {
+ filename = "sysfw-j721e-gp-evm.itb";
+ symlink = "sysfw.itb";
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin_gp";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "board-cfg.bin";
+ };
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "pm-cfg.bin";
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "rm-cfg.bin";
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sec-cfg.bin";
+ };
+ };
+ };
+ };
+ };
+};
+#endif
+
+#ifdef CONFIG_TARGET_J721E_A72_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_J721E_EVM_DTB "spl/dts/k3-j721e-common-proc-board.dtb"
+#define SPL_J721E_SK_DTB "spl/dts/k3-j721e-sk.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define J721E_EVM_DTB "arch/arm/dts/k3-j721e-common-proc-board.dtb"
+#define J721E_SK_DTB "arch/arm/dts/k3-j721e-sk.dtb"
+
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_spl_nodtb>;
+ keyfile = "custMpk.pem";
+
+ };
+ u_boot_spl_nodtb: blob-ext {
+ filename = SPL_NODTB;
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&spl_j721e_evm_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ spl_j721e_evm_dtb: blob-ext {
+ filename = SPL_J721E_EVM_DTB;
+ };
+ };
+
+ fdt-2 {
+ description = "k3-j721e-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&spl_j721e_sk_dtb>;
+ keyfile = "custMpk.pem";
+
+ };
+ spl_j721e_sk_dtb: blob-ext {
+ filename = SPL_J721E_SK_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-j721e-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+
+ conf-2 {
+ description = "k3-j721e-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-2";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for j721e board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_nodtb>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_nodtb: u-boot-nodtb {
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&j721e_evm_dtb>;
+ keyfile = "custMpk.pem";
+
+ };
+ j721e_evm_dtb: blob-ext {
+ filename = J721E_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-2 {
+ description = "k3-j721e-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&j721e_sk_dtb>;
+ keyfile = "custMpk.pem";
+
+ };
+ j721e_sk_dtb: blob-ext {
+ filename = J721E_SK_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-j721e-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ conf-2 {
+ description = "k3-j721e-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-2";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-pager_v2.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob-ext {
+ filename = SPL_NODTB;
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_J721E_EVM_DTB;
+ };
+ };
+
+ fdt-2 {
+ description = "k3-j721e-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_J721E_SK_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-j721e-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+
+ conf-2 {
+ description = "k3-j721e-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-2";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for j721e board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = J721E_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-2 {
+ description = "k3-j721e-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = J721E_SK_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-j721e-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+
+ conf-2 {
+ description = "k3-j721e-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-2";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index 867ec2bb1a..540c847eb3 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -4,6 +4,7 @@
*/
#include <dt-bindings/net/ti-dp83867.h>
+#include "k3-j721e-binman.dtsi"
/ {
chosen {
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index e9e50538cb..2913eae4d2 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -8,6 +8,7 @@
#include "k3-j721e-som-p0.dtsi"
#include "k3-j721e-ddr-evm-lp4-4266.dtsi"
#include "k3-j721e-ddr.dtsi"
+#include "k3-j721e-binman.dtsi"
#include <dt-bindings/phy/phy-cadence.h>
/ {
diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index b280a6a048..b342a56538 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -91,6 +91,7 @@ endif
# tiboot3.bin is mandated by ROM and ROM only supports R5 boot.
# So restrict tiboot3.bin creation for CPU_V7R.
+ifndef CONFIG_BINMAN
ifdef CONFIG_CPU_V7R
image_check: $(obj)/u-boot-spl.bin FORCE
@if [ $(IMAGE_SIZE) -gt $(MAX_SIZE) ]; then \
@@ -107,6 +108,7 @@ tiboot3.bin: image_check FORCE
INPUTS-y += tiboot3.bin
endif
+endif
ifdef CONFIG_ARM64
@@ -114,6 +116,7 @@ ifeq ($(CONFIG_SOC_K3_J721E),)
export DM := /dev/null
endif
+ifndef CONFIG_BINMAN
ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
SPL_ITS := u-boot-spl-k3_HS.its
$(SPL_ITS): export IS_HS=1
@@ -122,6 +125,7 @@ else
SPL_ITS := u-boot-spl-k3.its
INPUTS-y += tispl.bin
endif
+endif
ifeq ($(CONFIG_SPL_OF_LIST),)
LIST_OF_DTB := $(CONFIG_DEFAULT_DEVICE_TREE)
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index 84bca32712..4a127c4a10 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -13,6 +13,7 @@ config TARGET_J721E_A72_EVM
select BOARD_LATE_INIT
imply TI_I2C_BOARD_DETECT
select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
config TARGET_J721E_R5_EVM
bool "TI K3 based J721E EVM running on R5"
@@ -22,6 +23,7 @@ config TARGET_J721E_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 15ac87286d..a7811609bf 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -593,6 +593,8 @@ $(obj)/$(SPL_BIN).multidtb.fit.lzo: $(obj)/$(SPL_BIN).multidtb.fit
@lzop -f9 $< > $@
ifdef CONFIG_ARCH_K3
+ifndef CONFIG_BINMAN
tispl.bin: $(obj)/u-boot-spl-nodtb.bin $(SHRUNK_ARCH_DTB) $(SPL_ITS) FORCE
$(call if_changed,mkfitimage)
endif
+endif
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 06/18] j7200: yaml: Add J7200 board config files
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (4 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 05/18] j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 07/18] j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img Neha Malcom Francis
` (12 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Added YAML config for J7200
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/j721e/board-cfg_j7200.yaml | 36 +
board/ti/j721e/pm-cfg_j7200.yaml | 12 +
board/ti/j721e/rm-cfg_j7200.yaml | 2065 +++++++++++++++++++++++++++
board/ti/j721e/sec-cfg_j7200.yaml | 378 +++++
4 files changed, 2491 insertions(+)
create mode 100644 board/ti/j721e/board-cfg_j7200.yaml
create mode 100644 board/ti/j721e/pm-cfg_j7200.yaml
create mode 100644 board/ti/j721e/rm-cfg_j7200.yaml
create mode 100644 board/ti/j721e/sec-cfg_j7200.yaml
diff --git a/board/ti/j721e/board-cfg_j7200.yaml b/board/ti/j721e/board-cfg_j7200.yaml
new file mode 100644
index 0000000000..1453317ecb
--- /dev/null
+++ b/board/ti/j721e/board-cfg_j7200.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for J7200
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable : 0x5A
+ main_isolation_hostid : 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor : 0x1
+ scaling_profile : 0x1
+ disable_main_nav_secure_proxy : 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size : 0x10
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables : 0x00
+ trace_src_enables : 0x00
diff --git a/board/ti/j721e/pm-cfg_j7200.yaml b/board/ti/j721e/pm-cfg_j7200.yaml
new file mode 100644
index 0000000000..588a1d530d
--- /dev/null
+++ b/board/ti/j721e/pm-cfg_j7200.yaml
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for J7200
+#
+
+---
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
diff --git a/board/ti/j721e/rm-cfg_j7200.yaml b/board/ti/j721e/rm-cfg_j7200.yaml
new file mode 100644
index 0000000000..66b589f370
--- /dev/null
+++ b/board/ti/j721e/rm-cfg_j7200.yaml
@@ -0,0 +1,2065 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Resource management configuration for J7200
+#
+
+---
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 3
+ allowed_atype : 0b101010
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #2
+ host_id: 5
+ allowed_atype : 0b101010
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #3
+ host_id: 12
+ allowed_atype : 0b101010
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #4
+ host_id: 13
+ allowed_atype : 0b101010
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #5
+ host_id: 35
+ allowed_atype : 0b101010
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #6
+ host_id: 37
+ allowed_atype : 0b101010
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #7
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #8
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #9
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #10
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #11
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #12
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #13
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #14
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #15
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #16
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #17
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #18
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #19
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #20
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #21
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #22
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #23
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #24
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #25
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #26
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #27
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #28
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #29
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #30
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #31
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #32
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size : 8
+ resasg_entries_size: 2048
+ reserved : 0
+ resasg_entries:
+ -
+ start_resource: 0
+ num_resource: 32
+ type: 8192
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 32
+ type: 8192
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 24
+ type: 8320
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 24
+ type: 8320
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 8384
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 8384
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 8384
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 8
+ type: 8384
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 16
+ type: 8384
+ host_id: 12
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+ start_resource: 48
+ num_resource: 0
+ type: 15045
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 1
+ type: 15045
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 49
+ num_resource: 1
+ type: 15045
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15047
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15047
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15047
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 1
+ type: 15047
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 1
+ type: 15050
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 1
+ type: 15050
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 3
+ type: 15051
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 2
+ type: 15051
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 6
+ type: 15051
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 6
+ type: 15051
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 17
+ num_resource: 5
+ type: 15051
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 5
+ type: 15051
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 27
+ num_resource: 5
+ type: 15051
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 8
+ type: 15104
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 56
+ num_resource: 4
+ type: 15104
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 60
+ num_resource: 8
+ type: 15104
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 68
+ num_resource: 4
+ type: 15104
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 8
+ type: 15104
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 80
+ num_resource: 4
+ type: 15104
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 84
+ num_resource: 12
+ type: 15104
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15105
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 56320
+ num_resource: 256
+ type: 15106
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15107
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 3
+ type: 15114
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 2
+ type: 15114
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 2
+ type: 15114
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 2
+ type: 15114
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 2
+ type: 15114
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 2
+ type: 15114
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 9
+ type: 15114
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 15114
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 15114
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 4
+ type: 15114
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 4
+ type: 15114
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 4
+ type: 15114
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 1
+ type: 15114
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15115
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15115
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15115
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 1
+ type: 15115
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 3
+ type: 15117
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 2
+ type: 15117
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 2
+ type: 15117
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 2
+ type: 15117
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 2
+ type: 15117
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 2
+ type: 15117
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 15
+ num_resource: 9
+ type: 15117
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 15117
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 15117
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 4
+ type: 15117
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 4
+ type: 15117
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 40
+ num_resource: 4
+ type: 15117
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 2
+ type: 15117
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15119
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 15119
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 15119
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 1
+ num_resource: 1
+ type: 15119
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 20
+ type: 15168
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 28
+ type: 15168
+ host_id: 5
+ reserved: 0
diff --git a/board/ti/j721e/sec-cfg_j7200.yaml b/board/ti/j721e/sec-cfg_j7200.yaml
new file mode 100644
index 0000000000..fecf74a352
--- /dev/null
+++ b/board/ti/j721e/sec-cfg_j7200.yaml
@@ -0,0 +1,378 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security management configuration for J7200
+#
+
+---
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id : 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci : 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size : 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock : 0x5A
+ allow_wildcard_unlock : 0x5A
+ allowed_debug_level_rsvd : 0
+ rsvd : 0
+ min_cert_rev : 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender : 0
+ handover_to_host_id : 0
+ rsvd: [0, 0, 0, 0]
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 07/18] j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (5 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 06/18] j7200: yaml: Add J7200 board config files Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 08/18] am65x: yaml: Add AM65x board config files Neha Malcom Francis
` (11 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Support added for HS and GP boot binaries for J7200.
tiboot3.bin, tispl.bin and u-boot.img: For HS devices
tiboot3.bin_unsigned, tispl.bin_unsigned and u-boot.img_unsigned: For GP
devices
It is to be noted that the bootflow followed by J7200 requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OPTEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-j7200-binman.dtsi | 471 ++++++++++++++++++
.../k3-j7200-common-proc-board-u-boot.dtsi | 2 +
board/ti/j721e/Kconfig | 2 +
3 files changed, 475 insertions(+)
create mode 100644 arch/arm/dts/k3-j7200-binman.dtsi
diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi
new file mode 100644
index 0000000000..f4906e2b4e
--- /dev/null
+++ b/arch/arm/dts/k3-j7200-binman.dtsi
@@ -0,0 +1,471 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_J7200_R5_EVM
+
+&binman {
+ board-cfg {
+ filename = "board-cfg.bin";
+ ti-board-config {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ pm-cfg {
+ filename = "pm-cfg.bin";
+ ti-board-config {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ rm-cfg {
+ filename = "rm-cfg.bin";
+ ti-board-config {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ sec-cfg {
+ filename = "sec-cfg.bin";
+ ti-board-config {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+
+ combined-tifs-cfg {
+ filename = "combined-tifs-cfg.bin";
+ ti-board-config {
+ board-cfg {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ sec-cfg {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ pm-cfg {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ rm-cfg {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ };
+ combined-dm-cfg {
+ filename = "combined-dm-cfg.bin";
+ ti-board-config {
+ pm-cfg {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ rm-cfg {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+
+ };
+ };
+
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure-rom {
+ content = <&u_boot_spl>, <&ti_fs_enc>, <&combined_tifs_cfg>,
+ <&combined_dm_cfg>, <&sysfw_inner_cert>;
+ combined;
+ dm-data;
+ sysfw-inner-cert;
+ keyfile = "custMpk.pem";
+ sw-rev = <1>;
+ content-sbl = <&u_boot_spl>;
+ content-sysfw = <&ti_fs_enc>;
+ content-sysfw-data = <&combined_tifs_cfg>;
+ content-sysfw-inner-cert = <&sysfw_inner_cert>;
+ content-dm-data = <&combined_dm_cfg>;
+ load = <0x41c00000>;
+ load-sysfw = <0x40000>;
+ load-sysfw-data = <0x7f000>;
+ load-dm-data = <0x41c80000>;
+ };
+ u_boot_spl: u-boot-spl {
+ no-expanded;
+ };
+ ti_fs_enc: ti-fs-enc.bin {
+ filename = "ti-fs-firmware-j7200-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_tifs_cfg: blob-ext@1 {
+ filename = "combined-tifs-cfg.bin";
+ };
+ combined_dm_cfg: combined-dm-cfg.bin {
+ filename = "combined-dm-cfg.bin";
+ type = "blob-ext";
+ };
+ sysfw_inner_cert: sysfw-inner-cert {
+ filename = "ti-fs-firmware-j7200-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+};
+
+&binman {
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure-rom {
+ content = <&u_boot_spl_unsigned>, <&ti_fs_gp>,
+ <&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>;
+ combined;
+ dm-data;
+ content-sbl = <&u_boot_spl_unsigned>;
+ load = <0x41c00000>;
+ content-sysfw = <&ti_fs_gp>;
+ load-sysfw = <0x40000>;
+ content-sysfw-data = <&combined_tifs_cfg_gp>;
+ load-sysfw-data = <0x7f000>;
+ content-dm-data = <&combined_dm_cfg_gp>;
+ load-dm-data = <0x41c80000>;
+ sw-rev = <1>;
+ keyfile = "ti-degenerate-key.pem";
+ };
+ u_boot_spl_unsigned: u-boot-spl {
+ no-expanded;
+ };
+ ti_fs_gp: ti-fs-gp.bin {
+ filename = "ti-fs-firmware-j7200-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_tifs_cfg_gp: combined-tifs-cfg-gp.bin {
+ filename = "combined-tifs-cfg.bin";
+ type = "blob-ext";
+ };
+ combined_dm_cfg_gp: combined-dm-cfg-gp.bin {
+ filename = "combined-dm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+};
+
+#endif
+
+#ifdef CONFIG_TARGET_J7200_A72_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_J7200_EVM_DTB "spl/dts/k3-j7200-common-proc-board.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define J7200_EVM_DTB "arch/arm/dts/k3-j7200-common-proc-board.dtb"
+
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_spl_nodtb>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_spl_nodtb: blob-ext {
+ filename = SPL_NODTB;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-j7200-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&spl_j7200_evm_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ spl_j7200_evm_dtb: blob-ext {
+ filename = SPL_J7200_EVM_DTB;
+ };
+ };
+
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-j7200-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for J7200 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_nodtb>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_nodtb: u-boot-nodtb {
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-j7200-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&j7200_evm_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ j7200_evm_dtb: blob-ext {
+ filename = J7200_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-j7200-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-pager_v2.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename = SPL_NODTB;
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j7200-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_J7200_EVM_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-j7200-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for J7200 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j7200-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = J7200_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-j7200-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
index f57c2306ba..f25c7136c9 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include "k3-j7200-binman.dtsi"
+
/ {
chosen {
stdout-path = "serial2:115200n8";
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index 4a127c4a10..e6cb21f77b 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -33,6 +33,7 @@ config TARGET_J7200_A72_EVM
select BOARD_LATE_INIT
imply TI_I2C_BOARD_DETECT
select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
config TARGET_J7200_R5_EVM
bool "TI K3 based J7200 EVM running on R5"
@@ -42,6 +43,7 @@ config TARGET_J7200_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 08/18] am65x: yaml: Add AM65x board config files
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (6 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 07/18] j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 09/18] am65: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img Neha Malcom Francis
` (10 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Added YAML config for AM65x
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/am65x/board-cfg.yaml | 36 +
board/ti/am65x/pm-cfg.yaml | 12 +
board/ti/am65x/rm-cfg.yaml | 2068 +++++++++++++++++++++++++++++++++
board/ti/am65x/sec-cfg.yaml | 375 ++++++
4 files changed, 2491 insertions(+)
create mode 100644 board/ti/am65x/board-cfg.yaml
create mode 100644 board/ti/am65x/pm-cfg.yaml
create mode 100644 board/ti/am65x/rm-cfg.yaml
create mode 100644 board/ti/am65x/sec-cfg.yaml
diff --git a/board/ti/am65x/board-cfg.yaml b/board/ti/am65x/board-cfg.yaml
new file mode 100644
index 0000000000..133720ec3e
--- /dev/null
+++ b/board/ti/am65x/board-cfg.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM65x
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable : 0x5A
+ main_isolation_hostid : 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor : 0x1
+ scaling_profile : 0x1
+ disable_main_nav_secure_proxy : 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size : 0x10
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables : 0x00
+ trace_src_enables : 0x00
diff --git a/board/ti/am65x/pm-cfg.yaml b/board/ti/am65x/pm-cfg.yaml
new file mode 100644
index 0000000000..4b1ce475cd
--- /dev/null
+++ b/board/ti/am65x/pm-cfg.yaml
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for AM65x
+#
+
+---
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
diff --git a/board/ti/am65x/rm-cfg.yaml b/board/ti/am65x/rm-cfg.yaml
new file mode 100644
index 0000000000..501cc464c4
--- /dev/null
+++ b/board/ti/am65x/rm-cfg.yaml
@@ -0,0 +1,2068 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Resource management configuration for AM65x
+#
+
+---
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #2
+ host_id: 5
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #3
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #4
+ host_id: 13
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #5
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #6
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #7
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #8
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #9
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #10
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #11
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #12
+ host_id: 5
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #13
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #14
+ host_id: 13
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #15
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #16
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #17
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #18
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #19
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #20
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #21
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #22
+ host_id: 5
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #23
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #24
+ host_id: 13
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #25
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #26
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #27
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #28
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #29
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #30
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #31
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #32
+ host_id: 5
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size : 8
+ resasg_entries_size: 2080
+ reserved : 0
+ resasg_entries:
+ -
+ start_resource: 0
+ num_resource: 12
+ type: 192
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 4
+ type: 192
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 192
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 192
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 8
+ type: 192
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 32
+ type: 9664
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 32
+ type: 9664
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 32
+ type: 9664
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 24
+ type: 9728
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 24
+ type: 9728
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 24
+ type: 9728
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 20
+ type: 16384
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 16384
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 16384
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 16384
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 16384
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 20800
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 20800
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 16
+ type: 20800
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 8
+ type: 20800
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 21888
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 21888
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 4
+ type: 21888
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 4
+ type: 21888
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 4
+ type: 21888
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 80
+ type: 24138
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 96
+ num_resource: 30
+ type: 24138
+ host_id: 13
+ reserved: 0
+
+ -
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+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 10
+ type: 25869
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 12
+ type: 25869
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 25871
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 25871
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 25871
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 25871
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 25920
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 96
+ num_resource: 32
+ type: 25921
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 128
+ num_resource: 8
+ type: 25921
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 136
+ num_resource: 60
+ type: 25921
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 136
+ num_resource: 60
+ type: 25921
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 196
+ num_resource: 60
+ type: 25921
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 50
+ num_resource: 2
+ type: 25922
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 52
+ num_resource: 4
+ type: 25922
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 52
+ num_resource: 4
+ type: 25922
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 52
+ num_resource: 0
+ type: 25922
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 56
+ num_resource: 2
+ type: 25922
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 58
+ num_resource: 12
+ type: 25922
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 70
+ num_resource: 4
+ type: 25922
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 74
+ num_resource: 10
+ type: 25922
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 74
+ num_resource: 10
+ type: 25922
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 84
+ num_resource: 12
+ type: 25922
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 25923
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 25923
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 25923
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 0
+ type: 25923
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 2
+ type: 25923
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 12
+ type: 25923
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 4
+ type: 25923
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 10
+ type: 25923
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 10
+ type: 25923
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 12
+ type: 25923
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 0
+ type: 25925
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 2
+ type: 25925
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 0
+ type: 25925
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 2
+ type: 25925
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 25927
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 25927
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 25927
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 25927
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 1
+ type: 25930
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 3
+ num_resource: 1
+ type: 25930
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 8
+ type: 25931
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 25931
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 8
+ type: 25931
+ host_id: 4
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 8
+ type: 25931
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 8
+ type: 25931
+ host_id: 128
+ reserved: 0
diff --git a/board/ti/am65x/sec-cfg.yaml b/board/ti/am65x/sec-cfg.yaml
new file mode 100644
index 0000000000..72478b4fb5
--- /dev/null
+++ b/board/ti/am65x/sec-cfg.yaml
@@ -0,0 +1,375 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security management configuration for AM65x
+#
+
+---
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id : 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci : 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size : 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock : 0x5A
+ allow_wildcard_unlock : 0x5A
+ min_cert_rev : 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender : 0
+ handover_to_host_id : 0
+ rsvd: [0, 0, 0, 0]
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 09/18] am65: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (7 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 08/18] am65x: yaml: Add AM65x board config files Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 10/18] config: am64x: Add board config for AM64x Neha Malcom Francis
` (9 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Support added for HS and GP boot binaries for AM65x.
tiboot3.bin, sysfw.itb, tispl.bin and u-boot.img: For HS devices
tiboot3.bin_unsigned, sysfw.itb, tispl.bin_unsigned,
u-boot.img_unsigned: For GP devices
Note that the bootflow followed by AM65x requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
sysfw.itb:
* sysfw
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* ATF
* OPTEE
* A53 SPL
* A53 SPL dtbs
u-boot.img:
* A53 U-Boot
* A53 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 1 +
.../dts/k3-am654-r5-base-board-u-boot.dtsi | 1 +
arch/arm/dts/k3-am65x-binman.dtsi | 543 ++++++++++++++++++
board/ti/am65x/Kconfig | 2 +
4 files changed, 547 insertions(+)
create mode 100644 arch/arm/dts/k3-am65x-binman.dtsi
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 0c1305df7e..e4cbc47c2a 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -4,6 +4,7 @@
*/
#include "k3-am654-r5-base-board-u-boot.dtsi"
+#include "k3-am65x-binman.dtsi"
&pru0_0 {
remoteproc-name = "pru0_0";
diff --git a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi
index 4516ab1437..949320c91d 100644
--- a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi
@@ -5,6 +5,7 @@
#include <dt-bindings/pinctrl/k3.h>
#include <dt-bindings/net/ti-dp83867.h>
+#include "k3-am65x-binman.dtsi"
/ {
chosen {
diff --git a/arch/arm/dts/k3-am65x-binman.dtsi b/arch/arm/dts/k3-am65x-binman.dtsi
new file mode 100644
index 0000000000..890de42ef3
--- /dev/null
+++ b/arch/arm/dts/k3-am65x-binman.dtsi
@@ -0,0 +1,543 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_AM654_R5_EVM
+
+&binman {
+ board-cfg {
+ filename = "board-cfg.bin";
+ ti-board-config {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ pm-cfg {
+ filename = "pm-cfg.bin";
+ ti-board-config {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ rm-cfg {
+ filename = "rm-cfg.bin";
+ ti-board-config {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ sec-cfg {
+ filename = "sec-cfg.bin";
+ ti-board-config {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure-rom {
+ content = <&u_boot_spl>;
+ core = "public";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_spl: u-boot-spl {
+ no-expanded;
+ };
+ };
+ sysfw {
+ filename = "sysfw.bin";
+ ti-secure-rom {
+ content = <&ti_sci_cert>;
+ core = "secure";
+ load = <0x40000>;
+ keyfile = "custMpk.pem";
+ countersign;
+ };
+ ti_sci_cert: ti-sci-cert.bin {
+ filename = "ti-sci-firmware-am65x-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ ti-sci-firmware-am65x-hs-enc.bin {
+ filename = "ti-sci-firmware-am65x-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ itb {
+ filename = "sysfw-am65x-hs.itb";
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&board_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ board_cfg: board-cfg {
+ filename = "board-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&pm_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ pm_cfg: pm-cfg {
+ filename = "pm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&rm_cfg>;
+ keyfile = "custMpk.pem";\
+ };
+ rm_cfg: rm-cfg {
+ filename = "rm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&sec_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ sec_cfg: sec-cfg {
+ filename = "sec-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure-rom {
+ content = <&u_boot_spl_unsigned>;
+ core = "public";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ keyfile = "ti-degenerate-key.pem";
+ };
+ u_boot_spl_unsigned: u-boot-spl {
+ no-expanded;
+ };
+ };
+ sysfw_gp {
+ filename = "sysfw.bin_gp";
+ ti-secure-rom {
+ content = <&ti_sci>;
+ core = "secure";
+ load = <0x40000>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ keyfile = "ti-degenerate-key.pem";
+ countersign;
+ };
+ ti_sci: ti-sci.bin {
+ filename = "ti-sci-firmware-am65x-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+ itb_gp {
+ filename = "sysfw-am65x-gp-evm.itb";
+ symlink = "sysfw.itb";
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin_gp";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "board-cfg.bin";
+ };
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "pm-cfg.bin";
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "rm-cfg.bin";
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sec-cfg.bin";
+ };
+ };
+ };
+ };
+ };
+};
+#endif
+
+#ifdef CONFIG_TARGET_AM654_A53_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_AM654_EVM_DTB "spl/dts/k3-am654-base-board.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define AM654_EVM_DTB "arch/arm/dts/k3-am654-base-board.dtb"
+
+&binman {
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "/dev/null";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_spl_nodtb>;
+ keyfile = "custMpk.pem";
+
+ };
+ u_boot_spl_nodtb: blob-ext {
+ filename = SPL_NODTB;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am654-base-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&spl_am65x_evm_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ spl_am65x_evm_dtb: blob-ext {
+ filename = SPL_AM654_EVM_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am654-base-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM65 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_nodtb>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_nodtb: u-boot-nodtb {
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am654-base-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&am65x_evm_dtb>;
+ keyfile = "custMpk.pem";
+
+ };
+ am65x_evm_dtb: blob-ext {
+ filename = AM654_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am654-base-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-pager_v2.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "/dev/null";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob-ext {
+ filename = SPL_NODTB;
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j721e-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_AM654_EVM_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-am654-base-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM65 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am654-base-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = AM654_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-am654-base-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/board/ti/am65x/Kconfig b/board/ti/am65x/Kconfig
index 220dd0234c..5fd19d652a 100644
--- a/board/ti/am65x/Kconfig
+++ b/board/ti/am65x/Kconfig
@@ -12,6 +12,7 @@ config TARGET_AM654_A53_EVM
select ARM64
select SYS_DISABLE_DCACHE_OPS
select BOARD_LATE_INIT
+ select BINMAN
imply TI_I2C_BOARD_DETECT
config TARGET_AM654_R5_EVM
@@ -20,6 +21,7 @@ config TARGET_AM654_R5_EVM
select SYS_THUMB_BUILD
select K3_LOAD_SYSFW
select K3_AM654_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 10/18] config: am64x: Add board config for AM64x
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (8 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 09/18] am65: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 11/18] am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.img Neha Malcom Francis
` (8 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Added YAML config for AM64xx
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/am64x/board-cfg.yaml | 37 +
board/ti/am64x/pm-cfg.yaml | 12 +
board/ti/am64x/rm-cfg.yaml | 1400 +++++++++++++++++++++++++++++++++
board/ti/am64x/sec-cfg.yaml | 378 +++++++++
4 files changed, 1827 insertions(+)
create mode 100644 board/ti/am64x/board-cfg.yaml
create mode 100644 board/ti/am64x/pm-cfg.yaml
create mode 100644 board/ti/am64x/rm-cfg.yaml
create mode 100644 board/ti/am64x/sec-cfg.yaml
diff --git a/board/ti/am64x/board-cfg.yaml b/board/ti/am64x/board-cfg.yaml
new file mode 100644
index 0000000000..f1f7c68d50
--- /dev/null
+++ b/board/ti/am64x/board-cfg.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM64x
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable : 0x5A
+ main_isolation_hostid : 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor : 0x1
+ scaling_profile : 0x1
+ disable_main_nav_secure_proxy : 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size : 0x0
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables : 0x00
+ trace_src_enables : 0x00
+
diff --git a/board/ti/am64x/pm-cfg.yaml b/board/ti/am64x/pm-cfg.yaml
new file mode 100644
index 0000000000..c97495f482
--- /dev/null
+++ b/board/ti/am64x/pm-cfg.yaml
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for AM64x
+#
+
+---
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
diff --git a/board/ti/am64x/rm-cfg.yaml b/board/ti/am64x/rm-cfg.yaml
new file mode 100644
index 0000000000..6488c8a9c5
--- /dev/null
+++ b/board/ti/am64x/rm-cfg.yaml
@@ -0,0 +1,1400 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Resource management configuration for AM64x
+#
+
+---
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #2
+ host_id: 30
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #3
+ host_id: 36
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #4
+ host_id: 38
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #5
+ host_id: 41
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #6
+ host_id: 43
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #7
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #8
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #9
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #10
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #11
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #12
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #13
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #14
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #15
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #16
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #17
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #18
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #19
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #20
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #21
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #22
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #23
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #24
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #25
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #26
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #27
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #28
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #29
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #30
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #31
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+
+ - #32
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size : 8
+ resasg_entries_size: 1288
+ reserved : 0
+ resasg_entries:
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 64
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 64
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 4
+ type: 64
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 4
+ type: 64
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 8
+ type: 64
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 12
+ type: 192
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 192
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 2
+ type: 192
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 320
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 320
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 41
+ type: 384
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 50176
+ num_resource: 136
+ type: 1666
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 1667
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 12
+ type: 1677
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 1677
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 1677
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 2
+ type: 1677
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 4
+ type: 1677
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 1677
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 1
+ type: 1677
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 27
+ num_resource: 1
+ type: 1677
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 48
+ num_resource: 6
+ type: 1678
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 6
+ type: 1678
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 6
+ type: 1678
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 60
+ num_resource: 2
+ type: 1678
+ host_id: 38
+ reserved: 0
+
+ -
+ start_resource: 62
+ num_resource: 4
+ type: 1678
+ host_id: 41
+ reserved: 0
+
+ -
+ start_resource: 66
+ num_resource: 2
+ type: 1678
+ host_id: 43
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 6
+ type: 1679
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 34
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diff --git a/board/ti/am64x/sec-cfg.yaml b/board/ti/am64x/sec-cfg.yaml
new file mode 100644
index 0000000000..f93e9515b2
--- /dev/null
+++ b/board/ti/am64x/sec-cfg.yaml
@@ -0,0 +1,378 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security configuration for AM64x
+#
+
+---
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
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+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
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+ host_id: 0
+ supervisor_host_id: 0
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+ host_id: 0
+ supervisor_host_id: 0
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+ host_id: 0
+ supervisor_host_id: 0
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+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id : 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci : 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size : 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock : 0x5A
+ allow_wildcard_unlock : 0x5A
+ allowed_debug_level_rsvd : 0
+ rsvd : 0
+ min_cert_rev : 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender : 0
+ handover_to_host_id : 0
+ rsvd: [0, 0, 0, 0]
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 11/18] am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.img
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (9 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 10/18] config: am64x: Add board config for AM64x Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 12/18] j721s2: yaml: Add board config for J721S2 Neha Malcom Francis
` (7 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Support added for HS and GP boot binaries for AM64x.
tiboot3.bin, tispl.bin and u-boot.img: For HS devices
tiboot3.bin_unsigned, tispl.bin_unsigned, u-boot.img_unsigned: For GP
devices
Note that the bootflow followed by AM64x requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
* sysfw
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* ATF
* OPTEE
* A53 SPL
* A53 SPL dtbs
u-boot.img:
* A53 U-Boot
* A53 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-am642-evm-u-boot.dtsi | 2 +
arch/arm/dts/k3-am642-r5-evm.dts | 1 +
arch/arm/dts/k3-am64x-binman.dtsi | 521 ++++++++++++++++++++++++++
board/ti/am64x/Kconfig | 2 +
4 files changed, 526 insertions(+)
create mode 100644 arch/arm/dts/k3-am64x-binman.dtsi
diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
index 64857b0909..73577e8cfd 100644
--- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include "k3-am64x-binman.dtsi"
+
/ {
chosen {
stdout-path = "serial2:115200n8";
diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts
index ca5ce4a35a..d6b1ec6e58 100644
--- a/arch/arm/dts/k3-am642-r5-evm.dts
+++ b/arch/arm/dts/k3-am642-r5-evm.dts
@@ -8,6 +8,7 @@
#include "k3-am642.dtsi"
#include "k3-am64-evm-ddr4-1600MTs.dtsi"
#include "k3-am64-ddr.dtsi"
+#include "k3-am64x-binman.dtsi"
/ {
chosen {
diff --git a/arch/arm/dts/k3-am64x-binman.dtsi b/arch/arm/dts/k3-am64x-binman.dtsi
new file mode 100644
index 0000000000..ff746f2565
--- /dev/null
+++ b/arch/arm/dts/k3-am64x-binman.dtsi
@@ -0,0 +1,521 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+
+#include <config.h>
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_AM642_R5_EVM
+
+&binman {
+ board-cfg {
+ filename = "board-cfg.bin";
+ ti-board-config {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ pm-cfg {
+ filename = "pm-cfg.bin";
+ ti-board-config {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ rm-cfg {
+ filename = "rm-cfg.bin";
+ ti-board-config {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ sec-cfg {
+ filename = "sec-cfg.bin";
+ ti-board-config {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ combined-sysfw-cfg {
+ filename = "combined-sysfw-cfg.bin";
+ ti-board-config {
+ board-cfg {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ sec-cfg {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ pm-cfg {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ rm-cfg {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ };
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure-rom {
+ content = <&u_boot_spl>, <&ti_sci_enc>,
+ <&combined_sysfw_cfg>, <&sysfw_inner_cert>;
+ combined;
+ sysfw-inner-cert;
+ keyfile = "custMpk.pem";
+ sw-rev = <1>;
+ content-sbl = <&u_boot_spl>;
+ content-sysfw = <&ti_sci_enc>;
+ content-sysfw-data = <&combined_sysfw_cfg>;
+ content-sysfw-inner-cert = <&sysfw_inner_cert>;
+ load = <0x70000000>;
+ load-sysfw = <0x44000>;
+ load-sysfw-data = <0x7b000>;
+ };
+ u_boot_spl: u-boot-spl {
+ no-expanded;
+ };
+ ti_sci_enc: ti-fs-enc.bin {
+ filename = "ti-sci-firmware-am64x_sr2-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_sysfw_cfg: blob-ext@1 {
+ filename = "combined-sysfw-cfg.bin";
+ };
+ sysfw_inner_cert: sysfw-inner-cert {
+ filename = "ti-sci-firmware-am64x_sr2-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+
+ };
+};
+
+&binman {
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure-rom {
+ content = <&u_boot_spl_unsigned>, <&ti_sci_gp>, <&combined_sysfw_cfg_gp>;
+ combined;
+ content-sbl = <&u_boot_spl_unsigned>;
+ load = <0x70000000>;
+ content-sysfw = <&ti_sci_gp>;
+ load-sysfw = <0x44000>;
+ content-sysfw-data = <&combined_sysfw_cfg_gp>;
+ load-sysfw-data = <0x7b000>;
+ sw-rev = <1>;
+ keyfile = "ti-degenerate-key.pem";
+ };
+ u_boot_spl_unsigned: u-boot-spl {
+ no-expanded;
+ };
+ ti_sci_gp: ti-sci-gp.bin {
+ filename = "ti-sci-firmware-am64x-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_sysfw_cfg_gp: combined-sysfw-cfg-gp.bin {
+ filename = "combined-sysfw-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+};
+
+#endif
+
+#ifdef CONFIG_TARGET_AM642_A53_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_AM642_EVM_DTB "spl/dts/k3-am642-evm.dtb"
+#define SPL_AM642_SK_DTB "spl/dts/k3-am642-sk.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define AM642_EVM_DTB "arch/arm/dts/k3-am642-evm.dtb"
+#define AM642_SK_DTB "arch/arm/dts/k3-am642-sk.dtb"
+
+&binman {
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "/dev/null";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_spl_nodtb>;
+ keyfile = "custMpk.pem";
+
+ };
+ u_boot_spl_nodtb: blob-ext {
+ filename = SPL_NODTB;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am642-evm";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&spl_am64x_evm_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ spl_am64x_evm_dtb: blob-ext {
+ filename = SPL_AM642_EVM_DTB;
+ };
+
+ };
+
+ fdt-1 {
+ description = "k3-am642-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&spl_am64x_sk_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ spl_am64x_sk_dtb: blob-ext {
+ filename = SPL_AM642_SK_DTB;
+ };
+
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am642-evm";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+
+ conf-1 {
+ description = "k3-am642-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM64 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_nodtb>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_nodtb: u-boot-nodtb {
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am642-evm";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&am64x_evm_dtb>;
+ keyfile = "custMpk.pem";
+
+ };
+ am64x_evm_dtb: blob-ext {
+ filename = AM642_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am642-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&am64x_sk_dtb>;
+ keyfile = "custMpk.pem";
+
+ };
+ am64x_sk_dtb: blob-ext {
+ filename = AM642_SK_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am642-evm";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ conf-1 {
+ description = "k3-am642-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "/dev/null";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am642-evm";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_AM642_EVM_DTB;
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am642-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_AM642_SK_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am642-evm";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+
+ conf-1 {
+ description = "k3-am642-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM64 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am642-evm";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = AM642_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am642-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = AM642_SK_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am642-evm";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ conf-1 {
+ description = "k3-am642-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/board/ti/am64x/Kconfig b/board/ti/am64x/Kconfig
index afb54f8cda..fb596e4adf 100644
--- a/board/ti/am64x/Kconfig
+++ b/board/ti/am64x/Kconfig
@@ -9,6 +9,7 @@ choice
config TARGET_AM642_A53_EVM
bool "TI K3 based AM642 EVM running on A53"
select ARM64
+ select BINMAN
imply BOARD
imply SPL_BOARD
imply TI_I2C_BOARD_DETECT
@@ -21,6 +22,7 @@ config TARGET_AM642_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 12/18] j721s2: yaml: Add board config for J721S2
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (10 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 11/18] am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.img Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 13/18] j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img Neha Malcom Francis
` (6 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Added YAML config for J721S2
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/j721s2/board-cfg.yaml | 37 +
board/ti/j721s2/pm-cfg.yaml | 12 +
board/ti/j721s2/rm-cfg.yaml | 2901 ++++++++++++++++++++++++++++++++
board/ti/j721s2/sec-cfg.yaml | 375 +++++
4 files changed, 3325 insertions(+)
create mode 100644 board/ti/j721s2/board-cfg.yaml
create mode 100644 board/ti/j721s2/pm-cfg.yaml
create mode 100644 board/ti/j721s2/rm-cfg.yaml
create mode 100644 board/ti/j721s2/sec-cfg.yaml
diff --git a/board/ti/j721s2/board-cfg.yaml b/board/ti/j721s2/board-cfg.yaml
new file mode 100644
index 0000000000..d80f308ca6
--- /dev/null
+++ b/board/ti/j721s2/board-cfg.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for J721S2
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable : 0x5A
+ main_isolation_hostid : 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor : 0x1
+ scaling_profile : 0x1
+ disable_main_nav_secure_proxy : 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size : 0x0
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables : 0x00
+ trace_src_enables : 0x00
+
diff --git a/board/ti/j721s2/pm-cfg.yaml b/board/ti/j721s2/pm-cfg.yaml
new file mode 100644
index 0000000000..45994e23cc
--- /dev/null
+++ b/board/ti/j721s2/pm-cfg.yaml
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for J721S2
+#
+
+---
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
diff --git a/board/ti/j721s2/rm-cfg.yaml b/board/ti/j721s2/rm-cfg.yaml
new file mode 100644
index 0000000000..d18288ae08
--- /dev/null
+++ b/board/ti/j721s2/rm-cfg.yaml
@@ -0,0 +1,2901 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Resource management configuration for J721S2
+#
+
+---
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 3
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #2
+ host_id: 5
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #3
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #4
+ host_id: 13
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #5
+ host_id: 21
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #6
+ host_id: 23
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #7
+ host_id: 35
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #8
+ host_id: 37
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #9
+ host_id: 40
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #10
+ host_id: 42
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #11
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #12
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #13
+ host_id: 0
+ allowed_atype : 0
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+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #14
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #15
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #16
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #17
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #18
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #19
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #20
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #21
+ host_id: 0
+ allowed_atype : 0
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+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #22
+ host_id: 0
+ allowed_atype : 0
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+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #23
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #24
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #25
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #26
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #27
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #28
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #29
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #30
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #31
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #32
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size : 8
+ resasg_entries_size: 3032
+ reserved : 0
+ resasg_entries:
+ -
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+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 40138
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 0
+ type: 40138
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 9
+ type: 40138
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 6
+ type: 40138
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 29
+ num_resource: 1
+ type: 40138
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 30
+ num_resource: 1
+ type: 40138
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 31
+ num_resource: 2
+ type: 40138
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 33
+ num_resource: 1
+ type: 40138
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 1
+ type: 40138
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 1
+ type: 40138
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 3
+ type: 40138
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 39
+ num_resource: 2
+ type: 40138
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 41
+ num_resource: 4
+ type: 40138
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 40139
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 40139
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 4
+ type: 40141
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 0
+ type: 40141
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 6
+ num_resource: 1
+ type: 40141
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 7
+ num_resource: 1
+ type: 40141
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 8
+ num_resource: 1
+ type: 40141
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 9
+ num_resource: 1
+ type: 40141
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 1
+ type: 40141
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 11
+ num_resource: 1
+ type: 40141
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 2
+ type: 40141
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 0
+ type: 40141
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 14
+ num_resource: 9
+ type: 40141
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 6
+ type: 40141
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 29
+ num_resource: 1
+ type: 40141
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 30
+ num_resource: 1
+ type: 40141
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 31
+ num_resource: 2
+ type: 40141
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 33
+ num_resource: 1
+ type: 40141
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 1
+ type: 40141
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 1
+ type: 40141
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 36
+ num_resource: 3
+ type: 40141
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 39
+ num_resource: 2
+ type: 40141
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 41
+ num_resource: 5
+ type: 40141
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 0
+ type: 40143
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 2
+ type: 40143
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 32
+ type: 40266
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 16
+ type: 40266
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 70
+ num_resource: 8
+ type: 40266
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 78
+ num_resource: 8
+ type: 40266
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 86
+ num_resource: 24
+ type: 40266
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 110
+ num_resource: 8
+ type: 40266
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 40266
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 134
+ num_resource: 16
+ type: 40266
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 150
+ num_resource: 64
+ type: 40266
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 214
+ num_resource: 4
+ type: 40266
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 218
+ num_resource: 38
+ type: 40266
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 16406
+ num_resource: 128
+ type: 40269
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16534
+ num_resource: 128
+ type: 40269
+ host_id: 13
+ reserved: 0
+
+ -
+ start_resource: 16662
+ num_resource: 64
+ type: 40269
+ host_id: 21
+ reserved: 0
+
+ -
+ start_resource: 16726
+ num_resource: 64
+ type: 40269
+ host_id: 23
+ reserved: 0
+
+ -
+ start_resource: 16790
+ num_resource: 128
+ type: 40269
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 16918
+ num_resource: 128
+ type: 40269
+ host_id: 37
+ reserved: 0
+
+ -
+ start_resource: 17046
+ num_resource: 128
+ type: 40269
+ host_id: 40
+ reserved: 0
+
+ -
+ start_resource: 17174
+ num_resource: 128
+ type: 40269
+ host_id: 42
+ reserved: 0
+
+ -
+ start_resource: 17302
+ num_resource: 256
+ type: 40269
+ host_id: 3
+ reserved: 0
+
+ -
+ start_resource: 17558
+ num_resource: 64
+ type: 40269
+ host_id: 5
+ reserved: 0
+
+ -
+ start_resource: 17622
+ num_resource: 298
+ type: 40269
+ host_id: 128
+ reserved: 0
diff --git a/board/ti/j721s2/sec-cfg.yaml b/board/ti/j721s2/sec-cfg.yaml
new file mode 100644
index 0000000000..b9a016b760
--- /dev/null
+++ b/board/ti/j721s2/sec-cfg.yaml
@@ -0,0 +1,375 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security management configuration for J721S2
+#
+
+---
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id : 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci : 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size : 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock : 0x0
+ allow_wildcard_unlock : 0x0
+ min_cert_rev : 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender : 0
+ handover_to_host_id : 0
+ rsvd: [0, 0, 0, 0]
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 13/18] j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (11 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 12/18] j721s2: yaml: Add board config for J721S2 Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 14/18] am62: yaml: Add board config for AM62 Neha Malcom Francis
` (5 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Support added for HS and GP boot binaries for J721S2.
tiboot3.bin, tispl.bin and u-boot.img: For HS devices
tiboot3.bin_unsigned, tispl.bin_unsigned, u-boot.img_unsigned: For GP
devices
It is to be noted that the bootflow followed by J721S2 requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OPTEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-j721s2-binman.dtsi | 474 ++++++++++++++++++
.../k3-j721s2-common-proc-board-u-boot.dtsi | 2 +
.../dts/k3-j721s2-r5-common-proc-board.dts | 1 +
board/ti/j721s2/Kconfig | 2 +
4 files changed, 479 insertions(+)
create mode 100644 arch/arm/dts/k3-j721s2-binman.dtsi
diff --git a/arch/arm/dts/k3-j721s2-binman.dtsi b/arch/arm/dts/k3-j721s2-binman.dtsi
new file mode 100644
index 0000000000..0c0cde1df2
--- /dev/null
+++ b/arch/arm/dts/k3-j721s2-binman.dtsi
@@ -0,0 +1,474 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_J721S2_R5_EVM
+
+&binman {
+ board-cfg {
+ filename = "board-cfg.bin";
+ ti-board-config {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ pm-cfg {
+ filename = "pm-cfg.bin";
+ ti-board-config {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ rm-cfg {
+ filename = "rm-cfg.bin";
+ ti-board-config {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ sec-cfg {
+ filename = "sec-cfg.bin";
+ ti-board-config {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ combined-tifs-cfg {
+ filename = "combined-tifs-cfg.bin";
+ ti-board-config {
+ board-cfg {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ sec-cfg {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ pm-cfg {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ rm-cfg {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ };
+ combined-dm-cfg {
+ filename = "combined-dm-cfg.bin";
+ ti-board-config {
+ pm-cfg {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ rm-cfg {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+
+ };
+ };
+
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure-rom {
+ content = <&u_boot_spl>, <&ti_fs_enc>, <&combined_tifs_cfg>,
+ <&combined_dm_cfg>, <&sysfw_inner_cert>;
+ combined;
+ dm-data;
+ sysfw-inner-cert;
+ keyfile = "custMpk.pem";
+ sw-rev = <1>;
+ content-sbl = <&u_boot_spl>;
+ content-sysfw = <&ti_fs_enc>;
+ content-sysfw-data = <&combined_tifs_cfg>;
+ content-sysfw-inner-cert = <&sysfw_inner_cert>;
+ content-dm-data = <&combined_dm_cfg>;
+ load = <0x41c00000>;
+ load-sysfw = <0x40000>;
+ load-sysfw-data = <0x67000>;
+ load-dm-data = <0x41c80000>;
+ };
+ u_boot_spl: u-boot-spl {
+ no-expanded;
+ };
+ ti_fs_enc: ti-fs-enc.bin {
+ filename = "ti-fs-firmware-j721s2-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_tifs_cfg: blob-ext@1 {
+ filename = "combined-tifs-cfg.bin";
+ };
+ combined_dm_cfg: combined-dm-cfg.bin {
+ filename = "combined-dm-cfg.bin";
+ type = "blob-ext";
+ };
+ sysfw_inner_cert: sysfw-inner-cert {
+ filename = "ti-fs-firmware-j721s2-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+
+ };
+};
+
+&binman {
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure-rom {
+ content = <&u_boot_spl_unsigned>, <&ti_fs_gp>,
+ <&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>;
+ combined;
+ dm-data;
+ content-sbl = <&u_boot_spl_unsigned>;
+ load = <0x41c00000>;
+ content-sysfw = <&ti_fs_gp>;
+ load-sysfw = <0x40000>;
+ content-sysfw-data = <&combined_tifs_cfg_gp>;
+ load-sysfw-data = <0x67000>;
+ content-dm-data = <&combined_dm_cfg_gp>;
+ load-dm-data = <0x41c80000>;
+ sw-rev = <1>;
+ keyfile = "ti-degenerate-key.pem";
+ };
+ u_boot_spl_unsigned: u-boot-spl {
+ no-expanded;
+ };
+ ti_fs_gp: ti-fs-gp.bin {
+ filename = "ti-fs-firmware-j721s2-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_tifs_cfg_gp: combined-tifs-cfg-gp.bin {
+ filename = "combined-tifs-cfg.bin";
+ type = "blob-ext";
+ };
+ combined_dm_cfg_gp: combined-dm-cfg-gp.bin {
+ filename = "combined-dm-cfg.bin";
+ type = "blob-ext";
+ };
+
+ };
+};
+
+#endif
+
+#ifdef CONFIG_TARGET_J721S2_A72_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_J721S2_EVM_DTB "spl/dts/k3-j721s2-common-proc-board.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define J721S2_EVM_DTB "arch/arm/dts/k3-j721s2-common-proc-board.dtb"
+
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_spl_nodtb>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_spl_nodtb: blob-ext {
+ filename = SPL_NODTB;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-j721s2-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&spl_j721s2_evm_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ spl_j721s2_evm_dtb: blob-ext {
+ filename = SPL_J721S2_EVM_DTB;
+ };
+
+ };
+
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-j721s2-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for J721S2 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_nodtb>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_nodtb: u-boot-nodtb {
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-j721s2-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&j721s2_evm_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ j721s2_evm_dtb: blob-ext {
+ filename = J721S2_EVM_DTB;
+ };
+
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-j721s2-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-pager_v2.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j721s2-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_J721S2_EVM_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-j721s2-common-proc-board";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for J721S2 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-j721s2-common-proc-board";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = J721S2_EVM_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-j721s2-common-proc-board";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
index 4fd6d36417..f940ffee87 100644
--- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include "k3-j721s2-binman.dtsi"
+
/ {
chosen {
stdout-path = "serial2:115200n8";
diff --git a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
index bc617022c1..e04cee3d99 100644
--- a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
@@ -8,6 +8,7 @@
#include "k3-j721s2-som-p0.dtsi"
#include "k3-j721s2-ddr-evm-lp4-4266.dtsi"
#include "k3-j721s2-ddr.dtsi"
+#include "k3-j721s2-binman.dtsi"
/ {
chosen {
diff --git a/board/ti/j721s2/Kconfig b/board/ti/j721s2/Kconfig
index a24641f8cf..f6d1cb5765 100644
--- a/board/ti/j721s2/Kconfig
+++ b/board/ti/j721s2/Kconfig
@@ -13,6 +13,7 @@ config TARGET_J721S2_A72_EVM
select BOARD_LATE_INIT
imply TI_I2C_BOARD_DETECT
select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
config TARGET_J721S2_R5_EVM
bool "TI K3 based J721S2 EVM running on R5"
@@ -22,6 +23,7 @@ config TARGET_J721S2_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 14/18] am62: yaml: Add board config for AM62
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (12 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 13/18] j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 15/18] am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img Neha Malcom Francis
` (4 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Added YAML config for AM62
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/am62x/board-cfg.yaml | 36 ++
board/ti/am62x/pm-cfg.yaml | 12 +
board/ti/am62x/rm-cfg.yaml | 1088 +++++++++++++++++++++++++++++++++
board/ti/am62x/sec-cfg.yaml | 375 ++++++++++++
board/ti/am65x/rm-cfg.yaml | 144 ++---
5 files changed, 1583 insertions(+), 72 deletions(-)
create mode 100644 board/ti/am62x/board-cfg.yaml
create mode 100644 board/ti/am62x/pm-cfg.yaml
create mode 100644 board/ti/am62x/rm-cfg.yaml
create mode 100644 board/ti/am62x/sec-cfg.yaml
diff --git a/board/ti/am62x/board-cfg.yaml b/board/ti/am62x/board-cfg.yaml
new file mode 100644
index 0000000000..a26ef55bd4
--- /dev/null
+++ b/board/ti/am62x/board-cfg.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM62
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable : 0x5A
+ main_isolation_hostid : 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor : 0x1
+ scaling_profile : 0x1
+ disable_main_nav_secure_proxy : 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size : 0x0
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables : 0x00
+ trace_src_enables : 0x00
diff --git a/board/ti/am62x/pm-cfg.yaml b/board/ti/am62x/pm-cfg.yaml
new file mode 100644
index 0000000000..aa94097e97
--- /dev/null
+++ b/board/ti/am62x/pm-cfg.yaml
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for AM62
+#
+
+---
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
diff --git a/board/ti/am62x/rm-cfg.yaml b/board/ti/am62x/rm-cfg.yaml
new file mode 100644
index 0000000000..ba82146551
--- /dev/null
+++ b/board/ti/am62x/rm-cfg.yaml
@@ -0,0 +1,1088 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Resource management configuration for AM62
+#
+
+---
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size : 356
+ host_cfg_entries:
+ - #1
+ host_id: 12
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #2
+ host_id: 30
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #3
+ host_id: 36
+ allowed_atype : 0x2A
+ allowed_qos : 0xAAAA
+ allowed_orderid : 0xAAAAAAAA
+ allowed_priority : 0xAAAA
+ allowed_sched_priority : 0xAA
+ - #4
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #5
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #6
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #7
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #8
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #9
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #10
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #11
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #12
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #13
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #14
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #15
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #16
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #17
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #18
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #19
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #20
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #21
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #22
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #23
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #24
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #25
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #26
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #27
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #28
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #29
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #30
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #31
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ - #32
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size : 8
+ resasg_entries_size: 960
+ reserved : 0
+ resasg_entries:
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 64
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 22
+ type: 64
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 192
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 34
+ num_resource: 2
+ type: 192
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 4
+ type: 320
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 4
+ num_resource: 4
+ type: 320
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 26
+ type: 384
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 50176
+ num_resource: 164
+ type: 2434
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 2435
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 2445
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2445
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2445
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 2445
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 6
+ type: 2445
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 54
+ num_resource: 18
+ type: 2446
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 6
+ type: 2446
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 72
+ num_resource: 6
+ type: 2446
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 78
+ num_resource: 2
+ type: 2446
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 80
+ num_resource: 2
+ type: 2446
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 32
+ num_resource: 12
+ type: 2447
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 6
+ type: 2447
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 6
+ type: 2447
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 50
+ num_resource: 2
+ type: 2447
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 52
+ num_resource: 2
+ type: 2447
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 2464
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2464
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2464
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 2464
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 6
+ type: 2464
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 18
+ type: 2465
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2465
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 6
+ type: 2465
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 24
+ num_resource: 2
+ type: 2465
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 26
+ num_resource: 2
+ type: 2465
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 12
+ type: 2466
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 2466
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 12
+ num_resource: 6
+ type: 2466
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 18
+ num_resource: 2
+ type: 2466
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 2
+ type: 2466
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 5
+ num_resource: 35
+ type: 2570
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 36
+ type: 2570
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 44
+ num_resource: 36
+ type: 2570
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 168
+ num_resource: 8
+ type: 2570
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 512
+ type: 2573
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 525
+ num_resource: 256
+ type: 2573
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 525
+ num_resource: 256
+ type: 2573
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 781
+ num_resource: 128
+ type: 2573
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 909
+ num_resource: 627
+ type: 2573
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1024
+ type: 2575
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4096
+ num_resource: 29
+ type: 2576
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 4608
+ num_resource: 99
+ type: 2577
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 5120
+ num_resource: 24
+ type: 2578
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 5632
+ num_resource: 51
+ type: 2579
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 6144
+ num_resource: 51
+ type: 2580
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 6656
+ num_resource: 51
+ type: 2581
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 8192
+ num_resource: 32
+ type: 2582
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 8704
+ num_resource: 32
+ type: 2583
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 9216
+ num_resource: 32
+ type: 2584
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 9728
+ num_resource: 22
+ type: 2585
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 10240
+ num_resource: 22
+ type: 2586
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 10752
+ num_resource: 22
+ type: 2587
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 11264
+ num_resource: 28
+ type: 2588
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 11776
+ num_resource: 28
+ type: 2589
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 12288
+ num_resource: 28
+ type: 2590
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 3075
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 3088
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3088
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3088
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 3088
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 3088
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 64
+ type: 3089
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 64
+ type: 3089
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 83
+ num_resource: 8
+ type: 3090
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 91
+ num_resource: 8
+ type: 3091
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 99
+ num_resource: 10
+ type: 3094
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 109
+ num_resource: 3
+ type: 3094
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 109
+ num_resource: 3
+ type: 3094
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 112
+ num_resource: 3
+ type: 3094
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 115
+ num_resource: 3
+ type: 3094
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 3095
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 118
+ num_resource: 16
+ type: 3095
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 134
+ num_resource: 8
+ type: 3096
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 134
+ num_resource: 8
+ type: 3097
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 142
+ num_resource: 8
+ type: 3098
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 142
+ num_resource: 8
+ type: 3099
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 3107
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3107
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3107
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 3107
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 3107
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 3108
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 3108
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 27
+ num_resource: 1
+ type: 3109
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 28
+ num_resource: 1
+ type: 3110
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 3113
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3113
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3113
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 3113
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 3113
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 3114
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3114
+ host_id: 35
+ reserved: 0
+
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 3114
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 3114
+ host_id: 30
+ reserved: 0
+
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 3114
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 3115
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 3115
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 3116
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 3116
+ host_id: 36
+ reserved: 0
+
+ -
+ start_resource: 20
+ num_resource: 1
+ type: 3117
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 3118
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 21
+ num_resource: 1
+ type: 3119
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 3120
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 22
+ num_resource: 1
+ type: 3121
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 3122
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 23
+ num_resource: 1
+ type: 3123
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 3124
+ host_id: 12
+ reserved: 0
+
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 3264
+ host_id: 128
+ reserved: 0
+
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 3274
+ host_id: 12
+ reserved: 0
diff --git a/board/ti/am62x/sec-cfg.yaml b/board/ti/am62x/sec-cfg.yaml
new file mode 100644
index 0000000000..bb7302dc7e
--- /dev/null
+++ b/board/ti/am62x/sec-cfg.yaml
@@ -0,0 +1,375 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security management configuration for AM62
+#
+
+---
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id : 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci : 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size : 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock : 0x5A
+ allow_wildcard_unlock : 0x5A
+ min_cert_rev : 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender : 0
+ handover_to_host_id : 0
+ rsvd: [0, 0, 0, 0]
diff --git a/board/ti/am65x/rm-cfg.yaml b/board/ti/am65x/rm-cfg.yaml
index 501cc464c4..84ec04e1e1 100644
--- a/board/ti/am65x/rm-cfg.yaml
+++ b/board/ti/am65x/rm-cfg.yaml
@@ -80,40 +80,40 @@ rm-cfg:
allowed_priority : 0
allowed_sched_priority : 0
- #10
- host_id: 3
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #11
- host_id: 3
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #12
- host_id: 5
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #13
- host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #14
- host_id: 13
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #15
host_id: 0
allowed_atype : 0
@@ -157,33 +157,33 @@ rm-cfg:
allowed_priority : 0
allowed_sched_priority : 0
- #21
- host_id: 3
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #22
- host_id: 5
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #23
- host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #24
- host_id: 13
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #25
host_id: 0
allowed_atype : 0
@@ -220,26 +220,26 @@ rm-cfg:
allowed_priority : 0
allowed_sched_priority : 0
- #30
- host_id: 3
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #31
- host_id: 3
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
- #32
- host_id: 5
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
+ host_id: 0
+ allowed_atype : 0
+ allowed_qos : 0
+ allowed_orderid : 0
+ allowed_priority : 0
+ allowed_sched_priority : 0
resasg:
subhdr:
magic: 0x7B25
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 15/18] am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (13 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 14/18] am62: yaml: Add board config for AM62 Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 16/18] am62a: yaml: Add board config for AM62ax Neha Malcom Francis
` (3 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Support added for HS and GP boot binaries for AM62
tiboot3.bin, tispl.bin and u-boot.img: For HS devices
tiboot3.bin_unsigned, tispl.bin_unsigned, u-boot.img_unsigned: For GP
devices
It is to be noted that the bootflow followed by AM62 requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OPTEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-am625-r5-sk.dts | 1 +
arch/arm/dts/k3-am625-sk-binman.dtsi | 472 +++++++++++++++++++++++++++
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 2 +
board/ti/am62x/Kconfig | 2 +
4 files changed, 477 insertions(+)
create mode 100644 arch/arm/dts/k3-am625-sk-binman.dtsi
diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts
index dad46704a2..26ccfa0a4b 100644
--- a/arch/arm/dts/k3-am625-r5-sk.dts
+++ b/arch/arm/dts/k3-am625-r5-sk.dts
@@ -9,6 +9,7 @@
#include "k3-am62-ddr.dtsi"
#include "k3-am625-sk-u-boot.dtsi"
+#include "k3-am625-sk-binman.dtsi"
/ {
aliases {
diff --git a/arch/arm/dts/k3-am625-sk-binman.dtsi b/arch/arm/dts/k3-am625-sk-binman.dtsi
new file mode 100644
index 0000000000..13c90791b0
--- /dev/null
+++ b/arch/arm/dts/k3-am625-sk-binman.dtsi
@@ -0,0 +1,472 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_AM625_R5_EVM
+
+&binman {
+ board-cfg {
+ filename = "board-cfg.bin";
+ ti-board-config {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ pm-cfg {
+ filename = "pm-cfg.bin";
+ ti-board-config {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ rm-cfg {
+ filename = "rm-cfg.bin";
+ ti-board-config {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ sec-cfg {
+ filename = "sec-cfg.bin";
+ ti-board-config {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ combined-tifs-cfg {
+ filename = "combined-tifs-cfg.bin";
+ ti-board-config {
+ board-cfg {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ sec-cfg {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ pm-cfg {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ rm-cfg {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ };
+ combined-dm-cfg {
+ filename = "combined-dm-cfg.bin";
+ ti-board-config {
+ pm-cfg {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ rm-cfg {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+
+ };
+ };
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure-rom {
+ content = <&u_boot_spl>, <&ti_fs_enc>, <&combined_tifs_cfg>,
+ <&combined_dm_cfg>, <&sysfw_inner_cert>;
+ combined;
+ dm-data;
+ sysfw-inner-cert;
+ keyfile = "custMpk.pem";
+ sw-rev = <1>;
+ content-sbl = <&u_boot_spl>;
+ content-sysfw = <&ti_fs_enc>;
+ content-sysfw-data = <&combined_tifs_cfg>;
+ content-sysfw-inner-cert = <&sysfw_inner_cert>;
+ content-dm-data = <&combined_dm_cfg>;
+ load = <0x43c00000>;
+ load-sysfw = <0x40000>;
+ load-sysfw-data = <0x67000>;
+ load-dm-data = <0x43c3a800>;
+ };
+ u_boot_spl: u-boot-spl {
+ no-expanded;
+ };
+ ti_fs_enc: ti-fs-enc.bin {
+ filename = "ti-fs-firmware-am62x-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_tifs_cfg: blob-ext@1 {
+ filename = "combined-tifs-cfg.bin";
+ };
+ combined_dm_cfg: combined-dm-cfg.bin {
+ filename = "combined-dm-cfg.bin";
+ type = "blob-ext";
+ };
+ sysfw_inner_cert: sysfw-inner-cert {
+ filename = "ti-fs-firmware-am62x-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+
+ };
+};
+
+&binman {
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure-rom {
+ content = <&u_boot_spl_unsigned>, <&ti_fs_gp>,
+ <&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>;
+ combined;
+ dm-data;
+ content-sbl = <&u_boot_spl_unsigned>;
+ load = <0x43c00000>;
+ content-sysfw = <&ti_fs_gp>;
+ load-sysfw = <0x40000>;
+ content-sysfw-data = <&combined_tifs_cfg_gp>;
+ load-sysfw-data = <0x67000>;
+ content-dm-data = <&combined_dm_cfg_gp>;
+ load-dm-data = <0x43c3a800>;
+ sw-rev = <1>;
+ keyfile = "ti-degenerate-key.pem";
+ };
+ u_boot_spl_unsigned: u-boot-spl {
+ no-expanded;
+ };
+ ti_fs_gp: ti-fs-gp.bin {
+ filename = "ti-fs-firmware-am62x-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_tifs_cfg_gp: combined-tifs-cfg-gp.bin {
+ filename = "combined-tifs-cfg.bin";
+ type = "blob-ext";
+ };
+ combined_dm_cfg_gp: combined-dm-cfg-gp.bin {
+ filename = "combined-dm-cfg.bin";
+ type = "blob-ext";
+ };
+
+ };
+};
+
+#endif
+
+#ifdef CONFIG_TARGET_AM625_A53_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_AM625_SK_DTB "spl/dts/k3-am625-sk.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define AM625_SK_DTB "arch/arm/dts/k3-am625-sk.dtb"
+
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_spl_nodtb>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_spl_nodtb: blob-ext {
+ filename = SPL_NODTB;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am625-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&spl_am625_sk_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ spl_am625_sk_dtb: blob-ext {
+ filename = SPL_AM625_SK_DTB;
+ };
+
+ };
+
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am625-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM625 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_nodtb>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_nodtb: u-boot-nodtb {
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am625-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&am625_sk_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ am625_sk_dtb: blob-ext {
+ filename = AM625_SK_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am625-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-pager_v2.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am625-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_AM625_SK_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-am625-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM625 board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am625-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = AM625_SK_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-am625-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index 249155733a..a60c37f1db 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -4,6 +4,8 @@
* Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include "k3-am625-sk-binman.dtsi"
+
/ {
chosen {
stdout-path = "serial2:115200n8";
diff --git a/board/ti/am62x/Kconfig b/board/ti/am62x/Kconfig
index 5e8dfa3cc4..cd17e939e5 100644
--- a/board/ti/am62x/Kconfig
+++ b/board/ti/am62x/Kconfig
@@ -10,6 +10,7 @@ choice
config TARGET_AM625_A53_EVM
bool "TI K3 based AM625 EVM running on A53"
select ARM64
+ select BINMAN
config TARGET_AM625_R5_EVM
bool "TI K3 based AM625 EVM running on R5"
@@ -19,6 +20,7 @@ config TARGET_AM625_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
endchoice
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 16/18] am62a: yaml: Add board config for AM62ax
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (14 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 15/18] am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 17/18] am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img Neha Malcom Francis
` (2 subsequent siblings)
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Added YAML config for AM62ax
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
board/ti/am62ax/board-cfg.yaml | 36 +
board/ti/am62ax/pm-cfg.yaml | 12 +
board/ti/am62ax/rm-cfg.yaml | 1151 ++++++++++++++++++++++++++++++++
board/ti/am62ax/sec-cfg.yaml | 375 +++++++++++
4 files changed, 1574 insertions(+)
create mode 100644 board/ti/am62ax/board-cfg.yaml
create mode 100644 board/ti/am62ax/pm-cfg.yaml
create mode 100644 board/ti/am62ax/rm-cfg.yaml
create mode 100644 board/ti/am62ax/sec-cfg.yaml
diff --git a/board/ti/am62ax/board-cfg.yaml b/board/ti/am62ax/board-cfg.yaml
new file mode 100644
index 0000000000..6e45b494e0
--- /dev/null
+++ b/board/ti/am62ax/board-cfg.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM62ax
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable : 0x5A
+ main_isolation_hostid : 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor : 0x1
+ scaling_profile : 0x1
+ disable_main_nav_secure_proxy : 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size : 0x10
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables : 0x00
+ trace_src_enables : 0x00
diff --git a/board/ti/am62ax/pm-cfg.yaml b/board/ti/am62ax/pm-cfg.yaml
new file mode 100644
index 0000000000..a491f11260
--- /dev/null
+++ b/board/ti/am62ax/pm-cfg.yaml
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for AM62ax
+#
+
+---
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
diff --git a/board/ti/am62ax/rm-cfg.yaml b/board/ti/am62ax/rm-cfg.yaml
new file mode 100644
index 0000000000..f7315dd2b0
--- /dev/null
+++ b/board/ti/am62ax/rm-cfg.yaml
@@ -0,0 +1,1151 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Resource management configuration for AM62ax
+#
+
+---
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ host_cfg:
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diff --git a/board/ti/am62ax/sec-cfg.yaml b/board/ti/am62ax/sec-cfg.yaml
new file mode 100644
index 0000000000..95602f2671
--- /dev/null
+++ b/board/ti/am62ax/sec-cfg.yaml
@@ -0,0 +1,375 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security configuration for AM62ax
+#
+
+---
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj : 0x0
+ boardcfg_abi_min : 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - #1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - #32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - #1
+ host_id: 0
+ supervisor_host_id: 0
+ - #2
+ host_id: 0
+ supervisor_host_id: 0
+ - #3
+ host_id: 0
+ supervisor_host_id: 0
+ - #4
+ host_id: 0
+ supervisor_host_id: 0
+ - #5
+ host_id: 0
+ supervisor_host_id: 0
+ - #6
+ host_id: 0
+ supervisor_host_id: 0
+ - #7
+ host_id: 0
+ supervisor_host_id: 0
+ - #8
+ host_id: 0
+ supervisor_host_id: 0
+ - #9
+ host_id: 0
+ supervisor_host_id: 0
+ - #10
+ host_id: 0
+ supervisor_host_id: 0
+ - #11
+ host_id: 0
+ supervisor_host_id: 0
+ - #12
+ host_id: 0
+ supervisor_host_id: 0
+ - #13
+ host_id: 0
+ supervisor_host_id: 0
+ - #14
+ host_id: 0
+ supervisor_host_id: 0
+ - #15
+ host_id: 0
+ supervisor_host_id: 0
+ - #16
+ host_id: 0
+ supervisor_host_id: 0
+ - #17
+ host_id: 0
+ supervisor_host_id: 0
+ - #18
+ host_id: 0
+ supervisor_host_id: 0
+ - #19
+ host_id: 0
+ supervisor_host_id: 0
+ - #20
+ host_id: 0
+ supervisor_host_id: 0
+ - #21
+ host_id: 0
+ supervisor_host_id: 0
+ - #22
+ host_id: 0
+ supervisor_host_id: 0
+ - #23
+ host_id: 0
+ supervisor_host_id: 0
+ - #24
+ host_id: 0
+ supervisor_host_id: 0
+ - #25
+ host_id: 0
+ supervisor_host_id: 0
+ - #26
+ host_id: 0
+ supervisor_host_id: 0
+ - #27
+ host_id: 0
+ supervisor_host_id: 0
+ - #28
+ host_id: 0
+ supervisor_host_id: 0
+ - #29
+ host_id: 0
+ supervisor_host_id: 0
+ - #30
+ host_id: 0
+ supervisor_host_id: 0
+ - #31
+ host_id: 0
+ supervisor_host_id: 0
+ - #32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id : 0
+ otp_entry:
+ - #1
+ host_id: 0
+ host_perms: 0
+ - #2
+ host_id: 0
+ host_perms: 0
+ - #3
+ host_id: 0
+ host_perms: 0
+ - #4
+ host_id: 0
+ host_perms: 0
+ - #5
+ host_id: 0
+ host_perms: 0
+ - #6
+ host_id: 0
+ host_perms: 0
+ - #7
+ host_id: 0
+ host_perms: 0
+ - #8
+ host_id: 0
+ host_perms: 0
+ - #9
+ host_id: 0
+ host_perms: 0
+ - #10
+ host_id: 0
+ host_perms: 0
+ - #11
+ host_id: 0
+ host_perms: 0
+ - #12
+ host_id: 0
+ host_perms: 0
+ - #13
+ host_id: 0
+ host_perms: 0
+ - #14
+ host_id: 0
+ host_perms: 0
+ - #15
+ host_id: 0
+ host_perms: 0
+ - #16
+ host_id: 0
+ host_perms: 0
+ - #17
+ host_id: 0
+ host_perms: 0
+ - #18
+ host_id: 0
+ host_perms: 0
+ - #19
+ host_id: 0
+ host_perms: 0
+ - #20
+ host_id: 0
+ host_perms: 0
+ - #21
+ host_id: 0
+ host_perms: 0
+ - #22
+ host_id: 0
+ host_perms: 0
+ - #23
+ host_id: 0
+ host_perms: 0
+ - #24
+ host_id: 0
+ host_perms: 0
+ - #25
+ host_id: 0
+ host_perms: 0
+ - #26
+ host_id: 0
+ host_perms: 0
+ - #27
+ host_id: 0
+ host_perms: 0
+ - #28
+ host_id: 0
+ host_perms: 0
+ - #29
+ host_id: 0
+ host_perms: 0
+ - #30
+ host_id: 0
+ host_perms: 0
+ - #31
+ host_id: 0
+ host_perms: 0
+ - #32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci : 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size : 0
+ rsvd: [0, 0, 0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock : 0x5A
+ allow_wildcard_unlock : 0x5A
+ min_cert_rev : 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender : 0
+ handover_to_host_id : 0
+ rsvd: [0, 0, 0, 0]
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 17/18] am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (15 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 16/18] am62a: yaml: Add board config for AM62ax Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 18/18] k3: tools: config.mk: Update makefile and remove scripts Neha Malcom Francis
2023-04-04 18:57 ` [PATCH v2 00/18] Migration to using binman to generate Andrew Davis
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Support added for HS and GP boot binaries for AM62ax.
tiboot3.bin, tispl.bin and u-boot.img: For HS devices
tiboot3.bin_unsigned, tispl.bin_unsigned and u-boot.img_unsigned: For GP
devices
It is to be noted that the bootflow followed by AM62ax requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OPTEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/dts/k3-am62a-sk-binman.dtsi | 472 +++++++++++++++++++++++++++
arch/arm/dts/k3-am62a7-r5-sk.dts | 1 +
arch/arm/dts/k3-am62a7-sk.dts | 1 +
board/ti/am62ax/Kconfig | 2 +
4 files changed, 476 insertions(+)
create mode 100644 arch/arm/dts/k3-am62a-sk-binman.dtsi
diff --git a/arch/arm/dts/k3-am62a-sk-binman.dtsi b/arch/arm/dts/k3-am62a-sk-binman.dtsi
new file mode 100644
index 0000000000..d79e4e47af
--- /dev/null
+++ b/arch/arm/dts/k3-am62a-sk-binman.dtsi
@@ -0,0 +1,472 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+#ifdef CONFIG_TARGET_AM62A7_R5_EVM
+
+&binman {
+ board-cfg {
+ filename = "board-cfg.bin";
+ ti-board-config {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ pm-cfg {
+ filename = "pm-cfg.bin";
+ ti-board-config {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ rm-cfg {
+ filename = "rm-cfg.bin";
+ ti-board-config {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ sec-cfg {
+ filename = "sec-cfg.bin";
+ ti-board-config {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ combined-tifs-cfg {
+ filename = "combined-tifs-cfg.bin";
+ ti-board-config {
+ board-cfg {
+ config = "board-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ sec-cfg {
+ config = "sec-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ pm-cfg {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ rm-cfg {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ };
+ };
+ combined-dm-cfg {
+ filename = "combined-dm-cfg.bin";
+ ti-board-config {
+ pm-cfg {
+ config = "pm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+ rm-cfg {
+ config = "rm-cfg.yaml";
+ schema = "schema.yaml";
+ };
+
+ };
+ };
+
+ tiboot3 {
+ filename = "tiboot3.bin";
+ ti-secure-rom {
+ content = <&u_boot_spl>, <&ti_fs_enc>, <&combined_tifs_cfg>,
+ <&combined_dm_cfg>, <&sysfw_inner_cert>;
+ combined;
+ dm-data;
+ sysfw-inner-cert;
+ keyfile = "custMpk.pem";
+ sw-rev = <1>;
+ content-sbl = <&u_boot_spl>;
+ content-sysfw = <&ti_fs_enc>;
+ content-sysfw-data = <&combined_tifs_cfg>;
+ content-sysfw-inner-cert = <&sysfw_inner_cert>;
+ content-dm-data = <&combined_dm_cfg>;
+ load = <0x43c00000>;
+ load-sysfw = <0x40000>;
+ load-sysfw-data = <0x67000>;
+ load-dm-data = <0x43c3a800>;
+ };
+ u_boot_spl: u-boot-spl {
+ no-expanded;
+ };
+ ti_fs_enc: ti-fs-enc.bin {
+ filename = "ti-fs-firmware-am62ax-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_tifs_cfg: blob-ext@1 {
+ filename = "combined-tifs-cfg.bin";
+ };
+ combined_dm_cfg: combined-dm-cfg.bin {
+ filename = "combined-dm-cfg.bin";
+ type = "blob-ext";
+ };
+ sysfw_inner_cert: sysfw-inner-cert {
+ filename = "ti-fs-firmware-am62ax-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+
+ };
+};
+
+&binman {
+ tiboot3_unsigned {
+ filename = "tiboot3.bin_unsigned";
+ ti-secure-rom {
+ content = <&u_boot_spl_unsigned>, <&ti_fs_gp>,
+ <&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>;
+ combined;
+ dm-data;
+ content-sbl = <&u_boot_spl_unsigned>;
+ load = <0x43c00000>;
+ content-sysfw = <&ti_fs_gp>;
+ load-sysfw = <0x40000>;
+ content-sysfw-data = <&combined_tifs_cfg_gp>;
+ load-sysfw-data = <0x67000>;
+ content-dm-data = <&combined_dm_cfg_gp>;
+ load-dm-data = <0x43c3a800>;
+ sw-rev = <1>;
+ keyfile = "ti-degenerate-key.pem";
+ };
+ u_boot_spl_unsigned: u-boot-spl {
+ no-expanded;
+ };
+ ti_fs_gp: ti-fs-gp.bin {
+ filename = "ti-fs-firmware-am62ax-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_tifs_cfg_gp: combined-tifs-cfg-gp.bin {
+ filename = "combined-tifs-cfg.bin";
+ type = "blob-ext";
+ };
+ combined_dm_cfg_gp: combined-dm-cfg-gp.bin {
+ filename = "combined-dm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+};
+
+#endif
+
+#ifdef CONFIG_TARGET_AM62A7_A53_EVM
+
+#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
+#define SPL_AM62A7_SK_DTB "spl/dts/k3-am62a7-sk.dtb"
+
+#define UBOOT_NODTB "u-boot-nodtb.bin"
+#define AM62A7_SK_DTB "arch/arm/dts/k3-am62a7-sk.dtb"
+
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
+ ti-spl {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_spl_nodtb>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_spl_nodtb: blob-ext {
+ filename = SPL_NODTB;
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am62a7-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&spl_am62a7_sk_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ spl_am62a7_sk_dtb: blob-ext {
+ filename = SPL_AM62A7_SK_DTB;
+ };
+
+ };
+
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am62a7-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM62Ax board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_nodtb>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_nodtb: u-boot-nodtb {
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am62a7-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&am62a7_sk_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ am62a7_sk_dtb: blob-ext {
+ filename = AM62A7_SK_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am62a7-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OPTEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-pager_v2.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am62a7-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = SPL_AM62A7_SK_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-am62a7-sk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ description = "U-Boot for AM62Ax board";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = UBOOT_NODTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
+ fdt-1 {
+ description = "k3-am62a7-sk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = AM62A7_SK_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+
+ conf-1 {
+ description = "k3-am62a7-sk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-1";
+ };
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/k3-am62a7-r5-sk.dts b/arch/arm/dts/k3-am62a7-r5-sk.dts
index c953a82c7a..0b799a2537 100644
--- a/arch/arm/dts/k3-am62a7-r5-sk.dts
+++ b/arch/arm/dts/k3-am62a7-r5-sk.dts
@@ -7,6 +7,7 @@
#include "k3-am62a7-sk.dts"
#include "k3-am62a-ddr-1866mhz-32bit.dtsi"
#include "k3-am62a-ddr.dtsi"
+#include "k3-am62a-sk-binman.dtsi"
#include "k3-am62a7-sk-u-boot.dtsi"
diff --git a/arch/arm/dts/k3-am62a7-sk.dts b/arch/arm/dts/k3-am62a7-sk.dts
index b08a083d72..270e669f65 100644
--- a/arch/arm/dts/k3-am62a7-sk.dts
+++ b/arch/arm/dts/k3-am62a7-sk.dts
@@ -10,6 +10,7 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include "k3-am62a7.dtsi"
+#include "k3-am62a-sk-binman.dtsi"
/ {
compatible = "ti,am62a7-sk", "ti,am62a7";
diff --git a/board/ti/am62ax/Kconfig b/board/ti/am62ax/Kconfig
index 9b868e4553..61f289facc 100644
--- a/board/ti/am62ax/Kconfig
+++ b/board/ti/am62ax/Kconfig
@@ -10,6 +10,7 @@ choice
config TARGET_AM62A7_A53_EVM
bool "TI K3 based AM62A7 EVM running on A53"
select ARM64
+ select BINMAN
imply BOARD
imply SPL_BOARD
imply TI_I2C_BOARD_DETECT
@@ -22,6 +23,7 @@ config TARGET_AM62A7_R5_EVM
select RAM
select SPL_RAM
select K3_DDRSS
+ select BINMAN
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 18/18] k3: tools: config.mk: Update makefile and remove scripts
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (16 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 17/18] am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img Neha Malcom Francis
@ 2023-04-04 12:13 ` Neha Malcom Francis
2023-04-04 18:57 ` [PATCH v2 00/18] Migration to using binman to generate Andrew Davis
18 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 12:13 UTC (permalink / raw)
To: u-boot, trini, sjg, afd, vigneshr, rogerq
Cc: n-francis, alpernebiyasak, nm, bb, u-kumar1
Since binman is used to package bootloader images for all K3 devices, we
do not have to rely on the earlier methods to package them.
config.mk has been edited to only have binman required make commands.
Scripts that were used to generate x509 certificate for tiboot3.bin and
generate tispl.bin have also been removed.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
arch/arm/mach-k3/config.mk | 92 -------------
tools/k3_fit_atf.sh | 123 -----------------
tools/k3_gen_x509_cert.sh | 262 -------------------------------------
3 files changed, 477 deletions(-)
delete mode 100755 tools/k3_fit_atf.sh
delete mode 100755 tools/k3_gen_x509_cert.sh
diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index b342a56538..39767196a7 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -11,34 +11,6 @@ ifeq ($(shell which openssl),)
$(error "No openssl in $(PATH), consider installing openssl")
endif
-IMAGE_SIZE= $(shell cat $(obj)/u-boot-spl.bin | wc -c)
-MAX_SIZE= $(shell printf "%d" $(CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE))
-
-ifeq ($(CONFIG_SYS_K3_KEY), "")
-KEY=""
-# On HS use real key or warn if not available
-ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
-ifneq ($(wildcard $(TI_SECURE_DEV_PKG)/keys/custMpk.pem),)
-KEY=$(TI_SECURE_DEV_PKG)/keys/custMpk.pem
-else
-$(warning "WARNING: signing key not found. Random key will NOT work on HS hardware!")
-endif
-endif
-else
-KEY=$(patsubst "%",$(srctree)/%,$(CONFIG_SYS_K3_KEY))
-endif
-
-# X509 SWRV default
-SWRV = $(CONFIG_K3_X509_SWRV)
-# On HS use SECDEV provided software revision or warn if not available
-ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
-ifneq ($(wildcard $(TI_SECURE_DEV_PKG)/keys/swrv.txt),)
-SWRV= $(shell cat $(TI_SECURE_DEV_PKG)/keys/swrv.txt)
-else
-$(warning "WARNING: Software revision file not found. Default may not work on HS hardware.")
-endif
-endif
-
O ?= .
# Board config binary artifacts necessary for packaging of tiboot3.bin
@@ -88,68 +60,4 @@ INPUTS-y += schema.yaml
INPUTS-y += custMpk.pem
INPUTS-y += ti-degenerate-key.pem
endif
-
-# tiboot3.bin is mandated by ROM and ROM only supports R5 boot.
-# So restrict tiboot3.bin creation for CPU_V7R.
-ifndef CONFIG_BINMAN
-ifdef CONFIG_CPU_V7R
-image_check: $(obj)/u-boot-spl.bin FORCE
- @if [ $(IMAGE_SIZE) -gt $(MAX_SIZE) ]; then \
- echo "===============================================" >&2; \
- echo "ERROR: Final Image too big. " >&2; \
- echo "$< size = $(IMAGE_SIZE), max size = $(MAX_SIZE)" >&2; \
- echo "===============================================" >&2; \
- exit 1; \
- fi
-
-tiboot3.bin: image_check FORCE
- $(srctree)/tools/k3_gen_x509_cert.sh -c 16 -b $(obj)/u-boot-spl.bin \
- -o $@ -l $(CONFIG_SPL_TEXT_BASE) -r $(SWRV) -k $(KEY)
-
-INPUTS-y += tiboot3.bin
-endif
-endif
-
-ifdef CONFIG_ARM64
-
-ifeq ($(CONFIG_SOC_K3_J721E),)
-export DM := /dev/null
endif
-
-ifndef CONFIG_BINMAN
-ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
-SPL_ITS := u-boot-spl-k3_HS.its
-$(SPL_ITS): export IS_HS=1
-INPUTS-y += tispl.bin_HS
-else
-SPL_ITS := u-boot-spl-k3.its
-INPUTS-y += tispl.bin
-endif
-endif
-
-ifeq ($(CONFIG_SPL_OF_LIST),)
-LIST_OF_DTB := $(CONFIG_DEFAULT_DEVICE_TREE)
-else
-LIST_OF_DTB := $(CONFIG_SPL_OF_LIST)
-endif
-
-quiet_cmd_k3_mkits = MKITS $@
-cmd_k3_mkits = \
- $(srctree)/tools/k3_fit_atf.sh \
- $(CONFIG_K3_ATF_LOAD_ADDR) \
- $(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(LIST_OF_DTB))) > $@
-
-$(SPL_ITS): FORCE
- $(call cmd,k3_mkits)
-endif
-
-else
-
-ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
-INPUTS-y += u-boot.img_HS
-else
-INPUTS-y += u-boot.img
-endif
-endif
-
-include $(srctree)/arch/arm/mach-k3/config_secure.mk
diff --git a/tools/k3_fit_atf.sh b/tools/k3_fit_atf.sh
deleted file mode 100755
index 7bc07ad074..0000000000
--- a/tools/k3_fit_atf.sh
+++ /dev/null
@@ -1,123 +0,0 @@
-#!/bin/sh
-# SPDX-License-Identifier: GPL-2.0+
-#
-# script to generate FIT image source for K3 Family boards with
-# ATF, OPTEE, SPL and multiple device trees (given on the command line).
-# Inspired from board/sunxi/mksunxi_fit_atf.sh
-#
-# usage: $0 <atf_load_addr> <dt_name> [<dt_name> [<dt_name] ...]
-
-[ -z "$ATF" ] && ATF="bl31.bin"
-
-if [ ! -f $ATF ]; then
- echo "WARNING ATF file $ATF NOT found, resulting binary is non-functional" >&2
- ATF=/dev/null
-fi
-
-[ -z "$TEE" ] && TEE="bl32.bin"
-
-if [ ! -f $TEE ]; then
- echo "WARNING OPTEE file $TEE NOT found, resulting might be non-functional" >&2
- TEE=/dev/null
-fi
-
-[ -z "$DM" ] && DM="dm.bin"
-
-if [ ! -e $DM ]; then
- echo "WARNING DM file $DM NOT found, resulting might be non-functional" >&2
- DM=/dev/null
-fi
-
-if [ ! -z "$IS_HS" ]; then
- HS_APPEND=_HS
-fi
-
-cat << __HEADER_EOF
-/dts-v1/;
-
-/ {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
- images {
- atf {
- description = "ARM Trusted Firmware";
- data = /incbin/("$ATF");
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <$1>;
- entry = <$1>;
- };
- tee {
- description = "OPTEE";
- data = /incbin/("$TEE");
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- };
- dm {
- description = "DM binary";
- data = /incbin/("$DM");
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
- };
- spl {
- description = "SPL (64-bit)";
- data = /incbin/("spl/u-boot-spl-nodtb.bin$HS_APPEND");
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <0x80080000>;
- entry = <0x80080000>;
- };
-__HEADER_EOF
-
-# shift through ATF load address in the command line arguments
-shift
-
-for dtname in $*
-do
- cat << __FDT_IMAGE_EOF
- $(basename $dtname) {
- description = "$(basename $dtname .dtb)";
- data = /incbin/("$dtname$HS_APPEND");
- type = "flat_dt";
- arch = "arm";
- compression = "none";
- };
-__FDT_IMAGE_EOF
-done
-
-cat << __CONF_HEADER_EOF
- };
- configurations {
- default = "$(basename $1)";
-
-__CONF_HEADER_EOF
-
-for dtname in $*
-do
- cat << __CONF_SECTION_EOF
- $(basename $dtname) {
- description = "$(basename $dtname .dtb)";
- firmware = "atf";
- loadables = "tee", "dm", "spl";
- fdt = "$(basename $dtname)";
- };
-__CONF_SECTION_EOF
-done
-
-cat << __ITS_EOF
- };
-};
-__ITS_EOF
diff --git a/tools/k3_gen_x509_cert.sh b/tools/k3_gen_x509_cert.sh
deleted file mode 100755
index d9cde07417..0000000000
--- a/tools/k3_gen_x509_cert.sh
+++ /dev/null
@@ -1,262 +0,0 @@
-#!/bin/bash
-# SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
-#
-# Script to add K3 specific x509 cetificate to a binary.
-#
-
-# Variables
-OUTPUT=tiboot3.bin
-TEMP_X509=x509-temp.cert
-CERT=certificate.bin
-RAND_KEY=eckey.pem
-LOADADDR=0x41c00000
-BOOTCORE_OPTS=0
-BOOTCORE=16
-DEBUG_TYPE=0
-SWRV=1
-
-gen_degen_template() {
-cat << 'EOF' > degen-template.txt
-
-asn1=SEQUENCE:rsa_key
-
-[rsa_key]
-version=INTEGER:0
-modulus=INTEGER:0xDEGEN_MODULUS
-pubExp=INTEGER:1
-privExp=INTEGER:1
-p=INTEGER:0xDEGEN_P
-q=INTEGER:0xDEGEN_Q
-e1=INTEGER:1
-e2=INTEGER:1
-coeff=INTEGER:0xDEGEN_COEFF
-EOF
-}
-
-# Generate x509 Template
-gen_template() {
-cat << 'EOF' > x509-template.txt
- [ req ]
- distinguished_name = req_distinguished_name
- x509_extensions = v3_ca
- prompt = no
- dirstring_type = nobmp
-
- [ req_distinguished_name ]
- C = US
- ST = TX
- L = Dallas
- O = Texas Instruments Incorporated
- OU = Processors
- CN = TI support
- emailAddress = support@ti.com
-
- [ v3_ca ]
- basicConstraints = CA:true
- 1.3.6.1.4.1.294.1.1 = ASN1:SEQUENCE:boot_seq
- 1.3.6.1.4.1.294.1.2 = ASN1:SEQUENCE:image_integrity
- 1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv
-# 1.3.6.1.4.1.294.1.4 = ASN1:SEQUENCE:encryption
- 1.3.6.1.4.1.294.1.8 = ASN1:SEQUENCE:debug
-
- [ boot_seq ]
- certType = INTEGER:TEST_CERT_TYPE
- bootCore = INTEGER:TEST_BOOT_CORE
- bootCoreOpts = INTEGER:TEST_BOOT_CORE_OPTS
- destAddr = FORMAT:HEX,OCT:TEST_BOOT_ADDR
- imageSize = INTEGER:TEST_IMAGE_LENGTH
-
- [ image_integrity ]
- shaType = OID:2.16.840.1.101.3.4.2.3
- shaValue = FORMAT:HEX,OCT:TEST_IMAGE_SHA_VAL
-
- [ swrv ]
- swrv = INTEGER:TEST_SWRV
-
-# [ encryption ]
-# initalVector = FORMAT:HEX,OCT:TEST_IMAGE_ENC_IV
-# randomString = FORMAT:HEX,OCT:TEST_IMAGE_ENC_RS
-# iterationCnt = INTEGER:TEST_IMAGE_KEY_DERIVE_INDEX
-# salt = FORMAT:HEX,OCT:TEST_IMAGE_KEY_DERIVE_SALT
-
- [ debug ]
- debugUID = FORMAT:HEX,OCT:0000000000000000000000000000000000000000000000000000000000000000
- debugType = INTEGER:TEST_DEBUG_TYPE
- coreDbgEn = INTEGER:0
- coreDbgSecEn = INTEGER:0
-EOF
-}
-
-parse_key() {
- sed '/ /s/://g' key.txt | \
- awk '!/ / {printf("\n%s\n", $0)}; / / {printf("%s", $0)}' | \
- sed 's/ //g' | \
- awk "/$1:/{getline; print}"
-}
-
-gen_degen_key() {
-# Generate a 4096 bit RSA Key
- openssl genrsa -out key.pem 1024 >>/dev/null 2>&1
- openssl rsa -in key.pem -text -out key.txt >>/dev/null 2>&1
- DEGEN_MODULUS=$( parse_key 'modulus' )
- DEGEN_P=$( parse_key 'prime1' )
- DEGEN_Q=$( parse_key 'prime2' )
- DEGEN_COEFF=$( parse_key 'coefficient' )
- gen_degen_template
-
- sed -e "s/DEGEN_MODULUS/$DEGEN_MODULUS/"\
- -e "s/DEGEN_P/$DEGEN_P/" \
- -e "s/DEGEN_Q/$DEGEN_Q/" \
- -e "s/DEGEN_COEFF/$DEGEN_COEFF/" \
- degen-template.txt > degenerateKey.txt
-
- openssl asn1parse -genconf degenerateKey.txt -out degenerateKey.der >>/dev/null 2>&1
- openssl rsa -in degenerateKey.der -inform DER -outform PEM -out $RAND_KEY >>/dev/null 2>&1
- KEY=$RAND_KEY
- rm key.pem key.txt degen-template.txt degenerateKey.txt degenerateKey.der
-}
-
-declare -A options_help
-usage() {
- if [ -n "$*" ]; then
- echo "ERROR: $*"
- fi
- echo -n "Usage: $0 "
- for option in "${!options_help[@]}"
- do
- arg=`echo ${options_help[$option]}|cut -d ':' -f1`
- if [ -n "$arg" ]; then
- arg=" $arg"
- fi
- echo -n "[-$option$arg] "
- done
- echo
- echo -e "\nWhere:"
- for option in "${!options_help[@]}"
- do
- arg=`echo ${options_help[$option]}|cut -d ':' -f1`
- txt=`echo ${options_help[$option]}|cut -d ':' -f2`
- tb="\t\t\t"
- if [ -n "$arg" ]; then
- arg=" $arg"
- tb="\t"
- fi
- echo -e " -$option$arg:$tb$txt"
- done
- echo
- echo "Examples of usage:-"
- echo "# Example of signing the SYSFW binary with rsa degenerate key"
- echo " $0 -c 0 -b ti-sci-firmware-am6x.bin -o sysfw.bin -l 0x40000"
- echo "# Example of signing the SPL binary with rsa degenerate key"
- echo " $0 -c 16 -b spl/u-boot-spl.bin -o tiboot3.bin -l 0x41c00000"
-}
-
-options_help[b]="bin_file:Bin file that needs to be signed"
-options_help[k]="key_file:file with key inside it. If not provided script generates a rsa degenerate key."
-options_help[o]="output_file:Name of the final output file. default to $OUTPUT"
-options_help[c]="core_id:target core id on which the image would be running. Default to $BOOTCORE"
-options_help[l]="loadaddr: Target load address of the binary in hex. Default to $LOADADDR"
-options_help[d]="debug_type: Debug type, set to 4 to enable early JTAG. Default to $DEBUG_TYPE"
-options_help[r]="SWRV: Software Rev for X509 certificate"
-
-while getopts "b:k:o:c:l:d:h:r:" opt
-do
- case $opt in
- b)
- BIN=$OPTARG
- ;;
- k)
- KEY=$OPTARG
- ;;
- o)
- OUTPUT=$OPTARG
- ;;
- l)
- LOADADDR=$OPTARG
- ;;
- c)
- BOOTCORE=$OPTARG
- ;;
- d)
- DEBUG_TYPE=$OPTARG
- ;;
- r)
- SWRV=$OPTARG
- ;;
- h)
- usage
- exit 0
- ;;
- \?)
- usage "Invalid Option '-$OPTARG'"
- exit 1
- ;;
- :)
- usage "Option '-$OPTARG' Needs an argument."
- exit 1
- ;;
- esac
-done
-
-if [ "$#" -eq 0 ]; then
- usage "Arguments missing"
- exit 1
-fi
-
-if [ -z "$BIN" ]; then
- usage "Bin file missing in arguments"
- exit 1
-fi
-
-# Generate rsa degenerate key if user doesn't provide a key
-if [ -z "$KEY" ]; then
- gen_degen_key
-fi
-
-if [ $BOOTCORE == 0 ]; then # BOOTCORE M3, loaded by ROM
- CERTTYPE=2
-elif [ $BOOTCORE == 16 ]; then # BOOTCORE R5, loaded by ROM
- CERTTYPE=1
-else # Non BOOTCORE, loaded by SYSFW
- BOOTCORE_OPTS_VER=$(printf "%01x" 1)
- # Add input args option for SET and CLR flags.
- BOOTCORE_OPTS_SETFLAG=$(printf "%08x" 0)
- BOOTCORE_OPTS_CLRFLAG=$(printf "%08x" 0x100) # Clear FLAG_ARMV8_AARCH32
- BOOTCORE_OPTS="0x$BOOTCORE_OPTS_VER$BOOTCORE_OPTS_SETFLAG$BOOTCORE_OPTS_CLRFLAG"
- # Set the cert type to zero.
- # We are not using public/private key store now
- CERTTYPE=$(printf "0x%08x" 0)
-fi
-
-SHA_VAL=`openssl dgst -sha512 -hex $BIN | sed -e "s/^.*= //g"`
-BIN_SIZE=`cat $BIN | wc -c`
-ADDR=`printf "%08x" $LOADADDR`
-
-gen_cert() {
- #echo "Certificate being generated :"
- #echo " LOADADDR = 0x$ADDR"
- #echo " IMAGE_SIZE = $BIN_SIZE"
- #echo " CERT_TYPE = $CERTTYPE"
- #echo " DEBUG_TYPE = $DEBUG_TYPE"
- #echo " SWRV = $SWRV"
- sed -e "s/TEST_IMAGE_LENGTH/$BIN_SIZE/" \
- -e "s/TEST_IMAGE_SHA_VAL/$SHA_VAL/" \
- -e "s/TEST_CERT_TYPE/$CERTTYPE/" \
- -e "s/TEST_BOOT_CORE_OPTS/$BOOTCORE_OPTS/" \
- -e "s/TEST_BOOT_CORE/$BOOTCORE/" \
- -e "s/TEST_BOOT_ADDR/$ADDR/" \
- -e "s/TEST_DEBUG_TYPE/$DEBUG_TYPE/" \
- -e "s/TEST_SWRV/$SWRV/" \
- x509-template.txt > $TEMP_X509
- openssl req -new -x509 -key $KEY -nodes -outform DER -out $CERT -config $TEMP_X509 -sha512
-}
-
-gen_template
-gen_cert
-cat $CERT $BIN > $OUTPUT
-
-# Remove all intermediate files
-rm $TEMP_X509 $CERT x509-template.txt
-if [ "$KEY" == "$RAND_KEY" ]; then
- rm $RAND_KEY
-fi
--
2.34.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [PATCH v2 02/18] binman: ti-secure: Add support for TI signing
2023-04-04 12:13 ` [PATCH v2 02/18] binman: ti-secure: Add support for TI signing Neha Malcom Francis
@ 2023-04-04 17:11 ` Andrew Davis
2023-04-04 18:23 ` Neha Malcom Francis
2023-04-05 18:37 ` Simon Glass
1 sibling, 1 reply; 28+ messages in thread
From: Andrew Davis @ 2023-04-04 17:11 UTC (permalink / raw)
To: Neha Malcom Francis, u-boot, trini, sjg, vigneshr, rogerq
Cc: alpernebiyasak, nm, bb, u-kumar1
On 4/4/23 7:13 AM, Neha Malcom Francis wrote:
> The ti-secure entry contains certificate for binaries that will be
> loaded or booted by system firmware whereas the ti-secure-rom entry
> contains certificate for binaries that will be booted by ROM. Support
> for both these types of certificates is necessary for booting of K3
> devices.
>
> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
> ---
[...]
> +++ b/tools/binman/etype/ti_secure.py
> @@ -0,0 +1,83 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +# Copyright 20
Looks like this Copyright string got broken, I see this in a couple spots.
Andrew
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v2 05/18] j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img
2023-04-04 12:13 ` [PATCH v2 05/18] j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img Neha Malcom Francis
@ 2023-04-04 17:20 ` Andrew Davis
2023-04-04 18:24 ` Neha Malcom Francis
0 siblings, 1 reply; 28+ messages in thread
From: Andrew Davis @ 2023-04-04 17:20 UTC (permalink / raw)
To: Neha Malcom Francis, u-boot, trini, sjg, vigneshr, rogerq
Cc: alpernebiyasak, nm, bb, u-kumar1
On 4/4/23 7:13 AM, Neha Malcom Francis wrote:
> By providing entries in the binman node of the device tree, binman will
> be able to find and package board config artifacts generated by
> TIBoardConfig with sysfw.bin and generate the final image sysfw.itb.
> It will also pick out the R5 SPL and sign it with the help of TI signing
> entry and generate the final tiboot3.bin.
>
> Entries for A72 build have been added to k3-j721e-binman.dtsi to
> generate tispl.bin and u-boot.img.
>
> Support has been added for both HS(SR 1.1) and GP images where the
> encrypted system firmware binary must be signed along with the signed
> certificate binary.
>
> tiboot3.bin and sysfw-j721e_sr1_1-hs.itb: For HS devices
> tiboot3.bin_unsigned and sysfw-j721e-gp-evm.itb: For GP devices
> <filename>.bin/img: For HS devices
> <filename>.bin_unsigned/img_unsigned: For GP devices
>
> Intention of patch is to move signing and packaging to binman,
> thus making makefile target only if binman is not enabled.
>
> It is to be noted that the bootflow followed by J721E requires:
>
> tiboot3.bin:
> * R5 SPL
> * R5 SPL dtbs
>
> sysfw.itb:
> * TIFS
> * board-cfg
> * pm-cfg
> * sec-cfg
> * rm-cfg
>
> tispl.bin:
> * DM
> * ATF
> * OPTEE
> * A72 SPL
> * A72 SPL dtbs
>
> u-boot.img:
> * A72 U-Boot
> * A72 U-Boot dtbs
>
> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
> ---
[...]
> + ti_fs_cert: ti-fs-cert.bin {
> + filename = "ti-fs-firmware-j721e_sr1_1-hs-cert.bin";
Suggest prefix these with the expected directory name,
filename = "ti-sysfw/ti-fs-firmware-j721e_sr1_1-hs-cert.bin";
that way we only need to do one simple firmware path export:
export BINMAN_INDIRS="<ti-linux-firmware>"
Same below for DM firmware which lives in the same firmware repo but in
a directory that depends on the platform, selecting the correct platform
directory here in this file makes it so much easier for users.
[...]
> + filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f";
filename = "ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f";
Do that for all the DM/SYSFW files for all the platforms in this series.
Thanks,
Andrew
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v2 02/18] binman: ti-secure: Add support for TI signing
2023-04-04 17:11 ` Andrew Davis
@ 2023-04-04 18:23 ` Neha Malcom Francis
0 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 18:23 UTC (permalink / raw)
To: Andrew Davis, u-boot, trini, sjg, vigneshr, rogerq
Cc: alpernebiyasak, nm, bb, u-kumar1
Hi Andrew,
On 04/04/23 22:41, Andrew Davis wrote:
> On 4/4/23 7:13 AM, Neha Malcom Francis wrote:
>> The ti-secure entry contains certificate for binaries that will be
>> loaded or booted by system firmware whereas the ti-secure-rom entry
>> contains certificate for binaries that will be booted by ROM. Support
>> for both these types of certificates is necessary for booting of K3
>> devices.
>>
>> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
>> ---
>
> [...]
>
>> +++ b/tools/binman/etype/ti_secure.py
>> @@ -0,0 +1,83 @@
>> +# SPDX-License-Identifier: GPL-2.0+
>> +# Copyright 20
>
> Looks like this Copyright string got broken, I see this in a couple spots.
>
> Andrew
Right, I'll clean those up. Thanks!
--
Thanking You
Neha Malcom Francis
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v2 05/18] j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img
2023-04-04 17:20 ` Andrew Davis
@ 2023-04-04 18:24 ` Neha Malcom Francis
0 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-04 18:24 UTC (permalink / raw)
To: Andrew Davis, u-boot, trini, sjg, vigneshr, rogerq
Cc: alpernebiyasak, nm, bb, u-kumar1
Hi Andrew
On 04/04/23 22:50, Andrew Davis wrote:
> On 4/4/23 7:13 AM, Neha Malcom Francis wrote:
>> By providing entries in the binman node of the device tree, binman will
>> be able to find and package board config artifacts generated by
>> TIBoardConfig with sysfw.bin and generate the final image sysfw.itb.
>> It will also pick out the R5 SPL and sign it with the help of TI signing
>> entry and generate the final tiboot3.bin.
>>
>> Entries for A72 build have been added to k3-j721e-binman.dtsi to
>> generate tispl.bin and u-boot.img.
>>
>> Support has been added for both HS(SR 1.1) and GP images where the
>> encrypted system firmware binary must be signed along with the signed
>> certificate binary.
>>
>> tiboot3.bin and sysfw-j721e_sr1_1-hs.itb: For HS devices
>> tiboot3.bin_unsigned and sysfw-j721e-gp-evm.itb: For GP devices
>> <filename>.bin/img: For HS devices
>> <filename>.bin_unsigned/img_unsigned: For GP devices
>>
>> Intention of patch is to move signing and packaging to binman,
>> thus making makefile target only if binman is not enabled.
>>
>> It is to be noted that the bootflow followed by J721E requires:
>>
>> tiboot3.bin:
>> * R5 SPL
>> * R5 SPL dtbs
>>
>> sysfw.itb:
>> * TIFS
>> * board-cfg
>> * pm-cfg
>> * sec-cfg
>> * rm-cfg
>>
>> tispl.bin:
>> * DM
>> * ATF
>> * OPTEE
>> * A72 SPL
>> * A72 SPL dtbs
>>
>> u-boot.img:
>> * A72 U-Boot
>> * A72 U-Boot dtbs
>>
>> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
>> ---
>
> [...]
>
>> + ti_fs_cert: ti-fs-cert.bin {
>> + filename = "ti-fs-firmware-j721e_sr1_1-hs-cert.bin";
> Suggest prefix these with the expected directory name,
>
> filename = "ti-sysfw/ti-fs-firmware-j721e_sr1_1-hs-cert.bin";
>
> that way we only need to do one simple firmware path export:
>
> export BINMAN_INDIRS="<ti-linux-firmware>"
>
> Same below for DM firmware which lives in the same firmware repo but in
> a directory that depends on the platform, selecting the correct platform
> directory here in this file makes it so much easier for users.
>
> [...]
>
>> + filename = "ipc_echo_testb_mcu1_0_release_strip.xer5f";
>
> filename = "ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f";
>
> Do that for all the DM/SYSFW files for all the platforms in this series.
>
That makes it easier, I'll do that, thanks!
> Thanks,
> Andrew
--
Thanking You
Neha Malcom Francis
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v2 00/18] Migration to using binman to generate
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
` (17 preceding siblings ...)
2023-04-04 12:13 ` [PATCH v2 18/18] k3: tools: config.mk: Update makefile and remove scripts Neha Malcom Francis
@ 2023-04-04 18:57 ` Andrew Davis
2023-04-05 8:00 ` Neha Malcom Francis
18 siblings, 1 reply; 28+ messages in thread
From: Andrew Davis @ 2023-04-04 18:57 UTC (permalink / raw)
To: Neha Malcom Francis, u-boot, trini, sjg, vigneshr, rogerq
Cc: alpernebiyasak, nm, bb, u-kumar1
On 4/4/23 7:13 AM, Neha Malcom Francis wrote:
> This series aims to eliminate the use of additional custom repositories
> such as k3-image-gen (K3 Image Generation) repo that was plumbed into
> the U-Boot build flow to generate boot images for TI K3 platform devices.
> And instead, we move towards using binman that aligns better with the
> community standard build flow.
>
> This series uses binman for all K3 platforms supported on U-Boot currently;
> both HS (High Security) and GP (General Purpose) devices.
>
> Background on using k3-image-gen:
> * TI K3 devices require a SYSFW (System Firmware) image consisting
> of a signed system firmware image and board configuration binaries,
> this is needed to bring up system firmware during U-Boot R5 SPL
> startup.
> * Board configuration data contain board-specific information
> such as resource management, power management and security.
>
> Series intends to use binman to take over the packaging and signing for
> the R5 bootloader images tiboot3.bin (and sysfw.itb, for non-combined
> boot flow) instead of k3-image-gen.
>
> Series also packages the A72/A53 bootloader images (tispl.bin and
> u-boot.img) using ATF, OPTEE and DM (Device Manager)
>
> Changes in v2:
> - removed all external scripts
> - created ti-board-config etype to support generation of board
> config binaries
> - created ti-secure and ti-secure-rom etypes to handle signing
> instead of using external TI_SECURE_DEV_PKG
> - updated openssl btool to support x509 certificate generation
> - dropped Makefile changes to obtain external binary components,
> moving to using BINMAN_INDIRS to achieve the same
>
Another thing that got changed is you seem to have dropped the documentation
update patch from v1. The documentation change is the best part as it shows
how much easier this series makes building U-Boot for K3! :)
I did notice a build error when trying this with am62x_evm_r5_defconfig. I
don't think this series caused the issue, but it does expose the issue. Fix
sent here[0]. So if anyone has issues building this series try that patch.
Other than the couple minor comments, everything looks good and I'm extremely
impressed how well this all turned out. Removing the external tooling and scripts
previously needed to build U-Boot for K3 is key to our upstream-first goals and
long term support strategy.
Thank you!
For the whole series,
Acked-by: Andrew Davis <afd@ti.com>
[0] https://lists.denx.de/pipermail/u-boot/2023-April/514400.html
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v2 00/18] Migration to using binman to generate
2023-04-04 18:57 ` [PATCH v2 00/18] Migration to using binman to generate Andrew Davis
@ 2023-04-05 8:00 ` Neha Malcom Francis
0 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-05 8:00 UTC (permalink / raw)
To: Andrew Davis, u-boot, trini, sjg, vigneshr, rogerq
Cc: alpernebiyasak, nm, bb, u-kumar1
Hi Andrew,
On 05/04/23 00:27, Andrew Davis wrote:
> On 4/4/23 7:13 AM, Neha Malcom Francis wrote:
>> This series aims to eliminate the use of additional custom repositories
>> such as k3-image-gen (K3 Image Generation) repo that was plumbed into
>> the U-Boot build flow to generate boot images for TI K3 platform devices.
>> And instead, we move towards using binman that aligns better with the
>> community standard build flow.
>>
>> This series uses binman for all K3 platforms supported on U-Boot
>> currently;
>> both HS (High Security) and GP (General Purpose) devices.
>>
>> Background on using k3-image-gen:
>> * TI K3 devices require a SYSFW (System Firmware) image consisting
>> of a signed system firmware image and board configuration binaries,
>> this is needed to bring up system firmware during U-Boot R5 SPL
>> startup.
>> * Board configuration data contain board-specific information
>> such as resource management, power management and security.
>>
>> Series intends to use binman to take over the packaging and signing for
>> the R5 bootloader images tiboot3.bin (and sysfw.itb, for non-combined
>> boot flow) instead of k3-image-gen.
>>
>> Series also packages the A72/A53 bootloader images (tispl.bin and
>> u-boot.img) using ATF, OPTEE and DM (Device Manager)
>>
>> Changes in v2:
>> - removed all external scripts
>> - created ti-board-config etype to support generation of board
>> config binaries
>> - created ti-secure and ti-secure-rom etypes to handle signing
>> instead of using external TI_SECURE_DEV_PKG
>> - updated openssl btool to support x509 certificate generation
>> - dropped Makefile changes to obtain external binary components,
>> moving to using BINMAN_INDIRS to achieve the same
>>
>
> Another thing that got changed is you seem to have dropped the
> documentation
> update patch from v1. The documentation change is the best part as it shows
> how much easier this series makes building U-Boot for K3! :)
>
My bad, I didn't realize that had slipped out while sending v2, I will
be sure to add it when sending the next version.
> I did notice a build error when trying this with am62x_evm_r5_defconfig. I
> don't think this series caused the issue, but it does expose the issue. Fix
> sent here[0]. So if anyone has issues building this series try that patch.
>
Thank you for noticing, I had included types.h while building and
excluded it later, this patch should fix it. Thanks for the patch!
> Other than the couple minor comments, everything looks good and I'm
> extremely
> impressed how well this all turned out. Removing the external tooling
> and scripts
> previously needed to build U-Boot for K3 is key to our upstream-first
> goals and
> long term support strategy.
>
> Thank you!
>
> For the whole series,
>
> Acked-by: Andrew Davis <afd@ti.com>
>
> [0] https://lists.denx.de/pipermail/u-boot/2023-April/514400.html
--
Thanking You
Neha Malcom Francis
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v2 01/18] binman: Add support for generating TI Board config binaries
2023-04-04 12:13 ` [PATCH v2 01/18] binman: Add support for generating TI Board config binaries Neha Malcom Francis
@ 2023-04-05 18:37 ` Simon Glass
0 siblings, 0 replies; 28+ messages in thread
From: Simon Glass @ 2023-04-05 18:37 UTC (permalink / raw)
To: Neha Malcom Francis
Cc: u-boot, trini, afd, vigneshr, rogerq, alpernebiyasak, nm, bb, u-kumar1
Hi Neha,
On Wed, 5 Apr 2023 at 00:13, Neha Malcom Francis <n-francis@ti.com> wrote:
>
> The ti-board-config entry loads and validates a given YAML config file
> against a given schema, and generates the board config binary. K3
> devices require these generated binaries to be packed into the final
> system firmware images.
>
> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
> ---
> tools/binman/entries.rst | 50 ++++
> tools/binman/etype/ti_board_config.py | 246 ++++++++++++++++++
> tools/binman/ftest.py | 11 +
> tools/binman/test/277_ti_board_cfg.dts | 11 +
> .../binman/test/278_ti_board_cfg_combined.dts | 25 ++
> tools/binman/test/yaml/config.yaml | 11 +
> tools/binman/test/yaml/schema.yaml | 26 ++
> 7 files changed, 380 insertions(+)
> create mode 100644 tools/binman/etype/ti_board_config.py
> create mode 100644 tools/binman/test/277_ti_board_cfg.dts
> create mode 100644 tools/binman/test/278_ti_board_cfg_combined.dts
> create mode 100644 tools/binman/test/yaml/config.yaml
> create mode 100644 tools/binman/test/yaml/schema.yaml
This looks pretty good. Some things to fix:
The first line of a function comment should fit on that line. Add a
blank line afterwards. Add full comments to all functions, describing
the purpose / type of each arg (you have done many of them).
Use 'binman entry-docs >tools/binman/entries.rst' to generate the docs
rather than hand editing. Try 'make htmldocs' as this fails for your
updates.
Some test coverage is missing - use 'binman test -T' to try it. You
will need to add tests for failing cases as well as success, perhaps
adding new .dts files for your tests.
The jsonschema module is now required. That needs to be added to the
'dependencies' line of tools/binman/pyproject.toml
A few minor nits below
>
> diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
> index b71af801fd..7cfe61dd09 100644
> --- a/tools/binman/entries.rst
> +++ b/tools/binman/entries.rst
> @@ -2423,3 +2423,53 @@ may be used instead.
>
>
>
> +.. _etype_ti_board_config:
> +
> +Entry: ti-board-config: Texas Instruments board config binary
> +-------------------------------------------------------------
> +
> +Support for generation of TI schema validated board configuration
> +binary
> +This etype supports generation of two kinds of board configuration
> +binaries: singular board config binary as well as combined board config
> +binary.
> +
> +Properties / Entry arguments:
> + - config-file: File containing board configuration data in YAML
> + - schema-file: File containing board configuration YAML schema against
> + which the config file is validated
> +
> +These above parameters are used only when the generated binary is
> +intended to be a single board configuration binary. Example::
> +
> +/* generate a my-ti-board-config.bin generated from a YAML configuration
> +file validated against the schema*/
> +my-ti-board-config {
> + ti-board-config {
> + config = "board-config.yaml";
> + schema = "schema.yaml";
> + };
> +};
> +
> +To generate a combined board configuration binary, we pack the
> +needed individual binaries into a ti-board-config binary. In this case,
> +the available supported subnode names are board-cfg, pm-cfg, sec-cfg and
> +rm-cfg. For example::
> +
> +/* generate a my-combined-ti-board-config.bin packed with a header
> +(containing details about the included board config binaries), along
> +with the YAML schema validated binaries themselves*/
> +my-combined-ti-board-config {
> + ti-board-config {
> + board-cfg {
> + config = "board-cfg.yaml";
> + schema = "schema.yaml";
> + };
> + sec-cfg {
> + config = "sec-cfg.yaml";
> + schema = "schema.yaml";
> + };
> + };
> +};
> +
> +
> diff --git a/tools/binman/etype/ti_board_config.py b/tools/binman/etype/ti_board_config.py
> new file mode 100644
> index 0000000000..0a9be44afc
> --- /dev/null
> +++ b/tools/binman/etype/ti_board_config.py
> @@ -0,0 +1,246 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +# Copyright (c) 2022 Texas Instruments Incorporated - https://www.ti.com/
> +# Written by Neha Malcom Francis <n-francis@ti.com>
> +#
> +# Entry-type module for generating schema validated TI board
> +# configuration binary
> +#
> +
> +import os
> +import struct
> +import tempfile
> +import yaml
> +
> +from collections import OrderedDict
> +from jsonschema import validate
> +from shutil import copyfileobj
> +from shutil import rmtree
> +
> +from binman.entry import Entry
> +from binman.etype.section import Entry_section
> +from binman.etype.blob_ext import Entry_blob_ext
> +from binman.etype.blob_ext_list import Entry_blob_ext_list
> +from dtoc import fdt_util
> +from u_boot_pylib import tools, tout
> +
> +BOARDCFG = 0xB
> +BOARDCFG_SEC = 0xD
> +BOARDCFG_PM = 0xE
> +BOARDCFG_RM = 0xC
> +BOARDCFG_NUM_ELEMS = 4
> +
> +class Entry_ti_board_config(Entry_section):
> + """
> + Support for generation of TI schema validated board configuration
> + binary
> + This etype supports generation of two kinds of board configuration
> + binaries: singular board config binary as well as combined board config
> + binary.
> +
> + Available parameters are:
> +
> + config-file
> + File containing board configuration data in YAML
> +
> + schema-file
> + File containing board configuration YAML schema against which the
> + config file is validated
> +
> + These above parameters are used only when the generated binary is
> + intended to be a single board configuration binary. Example::
> +
> + /* generate a my-ti-board-config.bin generated from a YAML configuration
> + file validated against the schema*/
> + my-ti-board-config {
> + ti-board-config {
> + config = "board-config.yaml";
> + schema = "schema.yaml";
> + };
> + };
> +
> + To generate a combined board configuration binary, we pack the
> + needed individual binaries into a ti-board-config binary. In this case,
> + the available supported subnode names are board-cfg, pm-cfg, sec-cfg and
> + rm-cfg. For example::
> +
> + /* generate a my-combined-ti-board-config.bin packed with a header
> + (containing details about the included board config binaries), along
> + with the YAML schema validated binaries themselves*/
> + my-combined-ti-board-config {
> + ti-board-config {
> + board-cfg {
> + config = "board-cfg.yaml";
> + schema = "schema.yaml";
> + };
> + sec-cfg {
> + config = "sec-cfg.yaml";
> + schema = "schema.yaml";
> + };
> + }
> + }
> + """
> + def __init__(self, section, etype, node):
> + super().__init__(section, etype, node)
> +
> + self.config_file = None
> + self.schema_file = None
> +
> + self._entries = OrderedDict()
> + self._entries_data = OrderedDict()
> + self.num_elems = BOARDCFG_NUM_ELEMS
> + self.fmt = '<HHHBB'
> + self.index = 0
> + self.binary_offset = 0
> + self.sw_rev = 1
> + self.devgrp = 0
Better to use a _ prefix with private properties, ie.. self._devgr[
> +
> + def ReadNode(self):
> + super().ReadNode()
> + self.config_file = fdt_util.GetString(self._node, 'config')
> + self.schema_file = fdt_util.GetString(self._node, 'schema')
> + if self.config_file is None:
> + self.ReadEntries()
Why is this not done if self.config_file is not None? Please add a comment.
> +
> + def ReadEntries(self):
> + """Read the subnodes to find out what should go in this image"""
> + num_cfgs = 0
> + for node in self._node.subnodes:
> + if 'type' not in node.props:
> + num_cfgs += 1
> + etype = 'ti-board-config'
Can you drop that and just use the string in the next line?
> + entry = Entry.Create(self, node, etype)
> + entry.ReadNode()
> + cfg_data = entry.BuildSectionData(True)
> + self._entries[entry.name] = entry
> + self._entries_data[entry.name] = cfg_data
You could add your data to the entry if you like?
entry._cfg_data = cfg_data
?
> + self.num_elems = num_cfgs
Isn't that len(self._node.subnodes) ?
> +
> + def _convert_to_byte_chunk(self, val, data_type):
> + """Convert value into byte array"""
> + size = 0
> + if (data_type == "#/definitions/u8"):
> + size = 1
> + elif (data_type == "#/definitions/u16"):
> + size = 2
> + elif (data_type == "#/definitions/u32"):
> + size = 4
> + else:
> + raise Exception("Data type not present in definitions")
ValueError()
Please use single quotes where possible except for function docs
(please fix throughout)
> + if type(val) == int:
> + br = val.to_bytes(size, byteorder="little")
> + return br
> +
> + def _compile_yaml(self, schema_yaml, file_yaml):
> + """Convert YAML file into byte array based on YAML schema"""
> + br = bytearray()
> + for key in file_yaml.keys():
> + node = file_yaml[key]
> + node_schema = schema_yaml['properties'][key]
> + node_type = node_schema.get('type')
> + if not 'type' in node_schema:
> + br += self._convert_to_byte_chunk(node,
> + node_schema.get('$ref'))
> + elif node_type == 'object':
> + br += self._compile_yaml(node_schema, node)
> + elif node_type == 'array':
> + for item in node:
> + if not isinstance(item, dict):
> + br += self._convert_to_byte_chunk(
> + item, schema_yaml['properties'][key]['items']["$ref"])
> + else:
> + br += self._compile_yaml(node_schema.get('items'), item)
> + return br
> +
> + def _generate_binaries(self):
> + """Generate config binary artifacts from the loaded YAML configuration file"""
Return:
> + try:
> + cfg_binary = bytearray()
> + for key in self.file_yaml.keys():
> + node = self.file_yaml[key]
You can do:
for key, node in self.file_yaml.items():
> + node_schema = self.schema_yaml['properties'][key]
> + br = self._compile_yaml(node_schema, node)
> + cfg_binary += br
> + except Exception as e:
> + tout.warning("Combined board config binary was not generated properly")
> + cfg_binary = tools.get_bytes(0, 512)
> + return cfg_binary
> +
> + def _add_boardcfg(self, bcfgtype, bcfgdata):
comment
> + size = len(bcfgdata)
> + desc = struct.pack(self.fmt, bcfgtype,
> + self.binary_offset, size, self.devgrp, 0)
> + with open(self.descfile, "ab+") as desc_fh:
> + desc_fh.write(desc)
> + with open(self.bcfgfile, "ab+") as bcfg_fh:
> + bcfg_fh.write(bcfgdata)
> + self.binary_offset += size
> + self.index += 1
> +
> + def _finalize(self):
> + try:
> + with open(self.descfile, "rb") as desc_fh:
> + with open(self.bcfgfile, "rb") as bcfg_fh:
> + with open(self.fh_file, 'ab+') as fh:
> + desc_fh.seek(0)
> + bcfg_fh.seek(0)
But if they are just opened you don't need to seek. Can't you drop
those two lines?
> + copyfileobj(desc_fh, fh)
> + copyfileobj(bcfg_fh, fh)
> + data = tools.read_file(self.fh_file)
> + except Exception as e:
You should not catch Exception since this will cause anything to be
caught. Here I think you want IOError ?
> + tout.warning("Combined board config binary was not generated properly")
> + data = tools.get_bytes(0, 512)
> + rmtree(self.tmpdir)
> + return data
> +
> + def BuildSectionData(self, required):
> + if self.config_file is None:
> + self.binary_offset = 0
> + self.tmpdir = tempfile.mkdtemp()
This should use tools.get_output_filename() rather than create a temp
dir. We want the output to be visible for debugging, etc.
> + self.fh_file = os.path.join(self.tmpdir, "fh")
> + self.descfile = os.path.join(self.tmpdir, "desc")
> + self.bcfgfile = os.path.join(self.tmpdir, "bcfg")
> + try:
> + with open(self.fh_file, 'wb') as f:
> + t_bytes = f.write(struct.pack(
> + '<BB', self.num_elems, self.sw_rev))
> + self.binary_offset += t_bytes
> + self.binary_offset += self.num_elems * struct.calcsize(self.fmt)
> + except Exception as e:
> + tout.warning("Combined board config header was not generated properly")
> +
> + if 'board-cfg' in self._entries:
> + self._add_boardcfg(BOARDCFG, self._entries_data['board-cfg'])
> +
> + if 'sec-cfg' in self._entries:
> + self._add_boardcfg(BOARDCFG_SEC, self._entries_data['sec-cfg'])
> +
> + if 'pm-cfg' in self._entries:
> + self._add_boardcfg(BOARDCFG_PM, self._entries_data['pm-cfg'])
> +
> + if 'rm-cfg' in self._entries:
> + self._add_boardcfg(BOARDCFG_RM, self._entries_data['rm-cfg'])
> +
> + data = self._finalize()
> + return data
> +
> + else:
> + with open(self.config_file, 'r') as f:
> + self.file_yaml = yaml.safe_load(f)
> + with open(self.schema_file, 'r') as sch:
> + self.schema_yaml = yaml.safe_load(sch)
> + try:
> + validate(self.file_yaml, self.schema_yaml)
> + except Exception as e:
> + tout.error(f"Schema validation error: {e}")
> +
> + data = self._generate_binaries()
> + return data
> +
> + def SetImagePos(self, image_pos):
> + Entry.SetImagePos(self, image_pos)
> +
> + def SetCalculatedProperties(self):
> + Entry.SetCalculatedProperties(self)
> +
> + def CheckEntries(self):
> + Entry.CheckEntries(self)
[..]
> + def testTIBoardConfig(self):
> + """Test that a schema validated board config file can be generated"""
> + data = self._DoReadFile('277_ti_board_cfg.dts')
> + self.assertEqual(TI_BOARD_CONFIG_DATA, data)
> +
> + def testTIBoardConfig(self):
> + """Test that a schema validated combined board config file can be generated"""
> + data = self._DoReadFile('278_ti_board_cfg_combined.dts')
> + configlen_noheader = TI_BOARD_CONFIG_DATA*4
spaces around *
> + self.assertGreater(data, configlen_noheader)
>
> if __name__ == "__main__":
> unittest.main()
Regards,
Simon
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v2 02/18] binman: ti-secure: Add support for TI signing
2023-04-04 12:13 ` [PATCH v2 02/18] binman: ti-secure: Add support for TI signing Neha Malcom Francis
2023-04-04 17:11 ` Andrew Davis
@ 2023-04-05 18:37 ` Simon Glass
2023-04-12 13:50 ` Neha Malcom Francis
1 sibling, 1 reply; 28+ messages in thread
From: Simon Glass @ 2023-04-05 18:37 UTC (permalink / raw)
To: Neha Malcom Francis
Cc: u-boot, trini, afd, vigneshr, rogerq, alpernebiyasak, nm, bb, u-kumar1
kHi Neha,
On Wed, 5 Apr 2023 at 00:13, Neha Malcom Francis <n-francis@ti.com> wrote:
>
> The ti-secure entry contains certificate for binaries that will be
> loaded or booted by system firmware whereas the ti-secure-rom entry
> contains certificate for binaries that will be booted by ROM. Support
> for both these types of certificates is necessary for booting of K3
> devices.
>
> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
> ---
> board/ti/keys/custMpk.pem | 51 ++++
> board/ti/keys/ti-degenerate-key.pem | 10 +
> tools/binman/btool/openssl.py | 244 ++++++++++++++++++
> tools/binman/entries.rst | 25 ++
> tools/binman/etype/ti_secure.py | 83 ++++++
> tools/binman/etype/ti_secure_rom.py | 233 +++++++++++++++++
> tools/binman/etype/x509_cert.py | 87 ++++++-
> tools/binman/ftest.py | 46 ++++
> tools/binman/test/279_ti_secure.dts | 17 ++
> tools/binman/test/280_ti_secure_rom.dts | 17 ++
> .../test/281_ti_secure_rom_combined.dts | 25 ++
> 11 files changed, 830 insertions(+), 8 deletions(-)
> create mode 100644 board/ti/keys/custMpk.pem
> create mode 100644 board/ti/keys/ti-degenerate-key.pem
> create mode 100644 tools/binman/etype/ti_secure.py
> create mode 100644 tools/binman/etype/ti_secure_rom.py
> create mode 100644 tools/binman/test/279_ti_secure.dts
> create mode 100644 tools/binman/test/280_ti_secure_rom.dts
> create mode 100644 tools/binman/test/281_ti_secure_rom_combined.dts
> diff --git a/tools/binman/btool/openssl.py b/tools/binman/btool/openssl.py
> index 3a4dbdd6d7..aad3b61ae2 100644
> --- a/tools/binman/btool/openssl.py
> +++ b/tools/binman/btool/openssl.py
> @@ -15,6 +15,13 @@ import hashlib
> from binman import bintool
> from u_boot_pylib import tools
>
> +
> +VALID_SHAS = [256, 384, 512, 224]
> +SHA_OIDS = {256:'2.16.840.1.101.3.4.2.1',
> + 384:'2.16.840.1.101.3.4.2.2',
> + 512:'2.16.840.1.101.3.4.2.3',
> + 224:'2.16.840.1.101.3.4.2.4'}
> +
> class Bintoolopenssl(bintool.Bintool):
> """openssl tool
>
> @@ -74,6 +81,243 @@ imageSize = INTEGER:{len(indata)}
> '-sha512']
> return self.run_cmd(*args)
>
> + def x509_cert_sysfw(self, cert_fname, input_fname, key_fname, sw_rev,
> + config_fname, req_dist_name_dict):
> + """Create a certificate to be booted by system firmware
> +
> + Args:
> + cert_fname (str): Filename of certificate to create
> + input_fname (str): Filename containing data to sign
> + key_fname (str): Filename of .pem file
> + sw_rev (int): Software revision
> + config_fname (str): Filename to write fconfig into
> + req_dist_name_dict (dict): Dictionary containing key-value pairs of
> + req_distinguished_name section extensions, must contain extensions for
> + C, ST, L, O, OU, CN and emailAddress
> +
> + Returns:
> + str: Tool output
> + """
> + indata = tools.read_file(input_fname)
> + hashval = hashlib.sha512(indata).hexdigest()
> + with open(config_fname, 'w', encoding='utf-8') as outf:
> + print(f'''[ req ]
> +distinguished_name = req_distinguished_name
> +x509_extensions = v3_ca
> +prompt = no
> +dirstring_type = nobmp
> +
> +[ req_distinguished_name ]
> +C = {req_dist_name_dict['C']}
> +ST = {req_dist_name_dict['ST']}
> +L = {req_dist_name_dict['L']}
> +O = {req_dist_name_dict['O']}
> +OU = {req_dist_name_dict['OU']}
> +CN = {req_dist_name_dict['CN']}
> +emailAddress = {req_dist_name_dict['emailAddress']}
> +
> +[ v3_ca ]
> +basicConstraints = CA:true
> +1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv
> +1.3.6.1.4.1.294.1.34 = ASN1:SEQUENCE:sysfw_image_integrity
> +1.3.6.1.4.1.294.1.35 = ASN1:SEQUENCE:sysfw_image_load
> +
> +[ swrv ]
> +swrv = INTEGER:{sw_rev}
> +
> +[ sysfw_image_integrity ]
> +shaType = OID:2.16.840.1.101.3.4.2.3
> +shaValue = FORMAT:HEX,OCT:{hashval}
> +imageSize = INTEGER:{len(indata)}
There's a lot of duplication here, but at least it is in one file.
Would it make sense, for example, to have a function like
add_dn(buf, dict)
which adds the req_distinguished_name to a stringio buffer? Then that
could be calls from multiple places.
Also, please check test coverage (binman test -T). That should be 100%
so you will need to add tests for failing cases as well.
Regards,
Simon
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v2 02/18] binman: ti-secure: Add support for TI signing
2023-04-05 18:37 ` Simon Glass
@ 2023-04-12 13:50 ` Neha Malcom Francis
0 siblings, 0 replies; 28+ messages in thread
From: Neha Malcom Francis @ 2023-04-12 13:50 UTC (permalink / raw)
To: Simon Glass
Cc: u-boot, trini, afd, vigneshr, rogerq, alpernebiyasak, nm, bb, u-kumar1
Hi Simon
On 06/04/23 00:07, Simon Glass wrote:
> kHi Neha,
>
> On Wed, 5 Apr 2023 at 00:13, Neha Malcom Francis <n-francis@ti.com> wrote:
>>
>> The ti-secure entry contains certificate for binaries that will be
>> loaded or booted by system firmware whereas the ti-secure-rom entry
>> contains certificate for binaries that will be booted by ROM. Support
>> for both these types of certificates is necessary for booting of K3
>> devices.
>>
>> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
>> ---
>> board/ti/keys/custMpk.pem | 51 ++++
>> board/ti/keys/ti-degenerate-key.pem | 10 +
>> tools/binman/btool/openssl.py | 244 ++++++++++++++++++
>> tools/binman/entries.rst | 25 ++
>> tools/binman/etype/ti_secure.py | 83 ++++++
>> tools/binman/etype/ti_secure_rom.py | 233 +++++++++++++++++
>> tools/binman/etype/x509_cert.py | 87 ++++++-
>> tools/binman/ftest.py | 46 ++++
>> tools/binman/test/279_ti_secure.dts | 17 ++
>> tools/binman/test/280_ti_secure_rom.dts | 17 ++
>> .../test/281_ti_secure_rom_combined.dts | 25 ++
>> 11 files changed, 830 insertions(+), 8 deletions(-)
>> create mode 100644 board/ti/keys/custMpk.pem
>> create mode 100644 board/ti/keys/ti-degenerate-key.pem
>> create mode 100644 tools/binman/etype/ti_secure.py
>> create mode 100644 tools/binman/etype/ti_secure_rom.py
>> create mode 100644 tools/binman/test/279_ti_secure.dts
>> create mode 100644 tools/binman/test/280_ti_secure_rom.dts
>> create mode 100644 tools/binman/test/281_ti_secure_rom_combined.dts
>
>> diff --git a/tools/binman/btool/openssl.py b/tools/binman/btool/openssl.py
>> index 3a4dbdd6d7..aad3b61ae2 100644
>> --- a/tools/binman/btool/openssl.py
>> +++ b/tools/binman/btool/openssl.py
>> @@ -15,6 +15,13 @@ import hashlib
>> from binman import bintool
>> from u_boot_pylib import tools
>>
>> +
>> +VALID_SHAS = [256, 384, 512, 224]
>> +SHA_OIDS = {256:'2.16.840.1.101.3.4.2.1',
>> + 384:'2.16.840.1.101.3.4.2.2',
>> + 512:'2.16.840.1.101.3.4.2.3',
>> + 224:'2.16.840.1.101.3.4.2.4'}
>> +
>> class Bintoolopenssl(bintool.Bintool):
>> """openssl tool
>>
>> @@ -74,6 +81,243 @@ imageSize = INTEGER:{len(indata)}
>> '-sha512']
>> return self.run_cmd(*args)
>>
>> + def x509_cert_sysfw(self, cert_fname, input_fname, key_fname, sw_rev,
>> + config_fname, req_dist_name_dict):
>> + """Create a certificate to be booted by system firmware
>> +
>> + Args:
>> + cert_fname (str): Filename of certificate to create
>> + input_fname (str): Filename containing data to sign
>> + key_fname (str): Filename of .pem file
>> + sw_rev (int): Software revision
>> + config_fname (str): Filename to write fconfig into
>> + req_dist_name_dict (dict): Dictionary containing key-value pairs of
>> + req_distinguished_name section extensions, must contain extensions for
>> + C, ST, L, O, OU, CN and emailAddress
>> +
>> + Returns:
>> + str: Tool output
>> + """
>> + indata = tools.read_file(input_fname)
>> + hashval = hashlib.sha512(indata).hexdigest()
>> + with open(config_fname, 'w', encoding='utf-8') as outf:
>> + print(f'''[ req ]
>> +distinguished_name = req_distinguished_name
>> +x509_extensions = v3_ca
>> +prompt = no
>> +dirstring_type = nobmp
>> +
>> +[ req_distinguished_name ]
>> +C = {req_dist_name_dict['C']}
>> +ST = {req_dist_name_dict['ST']}
>> +L = {req_dist_name_dict['L']}
>> +O = {req_dist_name_dict['O']}
>> +OU = {req_dist_name_dict['OU']}
>> +CN = {req_dist_name_dict['CN']}
>> +emailAddress = {req_dist_name_dict['emailAddress']}
>> +
>> +[ v3_ca ]
>> +basicConstraints = CA:true
>> +1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv
>> +1.3.6.1.4.1.294.1.34 = ASN1:SEQUENCE:sysfw_image_integrity
>> +1.3.6.1.4.1.294.1.35 = ASN1:SEQUENCE:sysfw_image_load
>> +
>> +[ swrv ]
>> +swrv = INTEGER:{sw_rev}
>> +
>> +[ sysfw_image_integrity ]
>> +shaType = OID:2.16.840.1.101.3.4.2.3
>> +shaValue = FORMAT:HEX,OCT:{hashval}
>> +imageSize = INTEGER:{len(indata)}
>
> There's a lot of duplication here, but at least it is in one file.
>
> Would it make sense, for example, to have a function like
>
> add_dn(buf, dict)
>
> which adds the req_distinguished_name to a stringio buffer? Then that
> could be calls from multiple places.
>
Right that is possible, plus it gives an outline if this etype can be
simplified in the future similarly.
> Also, please check test coverage (binman test -T). That should be 100%
> so you will need to add tests for failing cases as well.
>
I'll take note of these corrections and send v3 soon, thanks!
> Regards,
> Simon
--
Thanking You
Neha Malcom Francis
^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2023-04-12 13:51 UTC | newest]
Thread overview: 28+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-04-04 12:13 [PATCH v2 00/18] Migration to using binman to generate Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 01/18] binman: Add support for generating TI Board config binaries Neha Malcom Francis
2023-04-05 18:37 ` Simon Glass
2023-04-04 12:13 ` [PATCH v2 02/18] binman: ti-secure: Add support for TI signing Neha Malcom Francis
2023-04-04 17:11 ` Andrew Davis
2023-04-04 18:23 ` Neha Malcom Francis
2023-04-05 18:37 ` Simon Glass
2023-04-12 13:50 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 03/18] ti: sysfw: tiboot3: Add support for packaging sysfw.itb and tiboot3.bin Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 04/18] j721e: schema: yaml: Add general schema and J721E board config files Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 05/18] j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img Neha Malcom Francis
2023-04-04 17:20 ` Andrew Davis
2023-04-04 18:24 ` Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 06/18] j7200: yaml: Add J7200 board config files Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 07/18] j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 08/18] am65x: yaml: Add AM65x board config files Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 09/18] am65: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 10/18] config: am64x: Add board config for AM64x Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 11/18] am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.img Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 12/18] j721s2: yaml: Add board config for J721S2 Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 13/18] j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 14/18] am62: yaml: Add board config for AM62 Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 15/18] am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 16/18] am62a: yaml: Add board config for AM62ax Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 17/18] am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img Neha Malcom Francis
2023-04-04 12:13 ` [PATCH v2 18/18] k3: tools: config.mk: Update makefile and remove scripts Neha Malcom Francis
2023-04-04 18:57 ` [PATCH v2 00/18] Migration to using binman to generate Andrew Davis
2023-04-05 8:00 ` Neha Malcom Francis
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