[PATCH 2/4] include: riscv: Fix wrong include guard in riscv_pmu.h

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From: Alexandre Ghiti <alexghiti@rivosinc.com>
To: Jonathan Corbet <corbet@lwn.net>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Atish Patra <atishp@atishpatra.org>,
	Anup Patel <anup@brainfault.org>, Will Deacon <will@kernel.org>,
	Rob Herring <robh@kernel.org>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-perf-users@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Cc: Alexandre Ghiti <alexghiti@rivosinc.com>
Subject: [PATCH 2/4] include: riscv: Fix wrong include guard in riscv_pmu.h
Date: Thu, 13 Apr 2023 18:17:23 +0200	[thread overview]
Message-ID: <20230413161725.195417-3-alexghiti@rivosinc.com> (raw)
In-Reply-To: <20230413161725.195417-1-alexghiti@rivosinc.com>

The current include guard prevents the inclusion of asm/perf_event.h
which uses the same include guard: fix the one in riscv_pmu.h so that it
matches the file name.

Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
---
 include/linux/perf/riscv_pmu.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/linux/perf/riscv_pmu.h b/include/linux/perf/riscv_pmu.h
index 43fc892aa7d9..9f70d94942e0 100644
--- a/include/linux/perf/riscv_pmu.h
+++ b/include/linux/perf/riscv_pmu.h
@@ -6,8 +6,8 @@
  *
  */
 
-#ifndef _ASM_RISCV_PERF_EVENT_H
-#define _ASM_RISCV_PERF_EVENT_H
+#ifndef _RISCV_PMU_H
+#define _RISCV_PMU_H
 
 #include <linux/perf_event.h>
 #include <linux/ptrace.h>
@@ -81,4 +81,4 @@ int riscv_pmu_get_hpm_info(u32 *hw_ctr_width, u32 *num_hw_ctr);
 
 #endif /* CONFIG_RISCV_PMU */
 
-#endif /* _ASM_RISCV_PERF_EVENT_H */
+#endif /* _RISCV_PMU_H */
-- 
2.37.2

WARNING: multiple messages have this Message-ID (diff)

From: Alexandre Ghiti <alexghiti@rivosinc.com>
To: Jonathan Corbet <corbet@lwn.net>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Atish Patra <atishp@atishpatra.org>,
	Anup Patel <anup@brainfault.org>, Will Deacon <will@kernel.org>,
	Rob Herring <robh@kernel.org>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-perf-users@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Cc: Alexandre Ghiti <alexghiti@rivosinc.com>
Subject: [PATCH 2/4] include: riscv: Fix wrong include guard in riscv_pmu.h
Date: Thu, 13 Apr 2023 18:17:23 +0200	[thread overview]
Message-ID: <20230413161725.195417-3-alexghiti@rivosinc.com> (raw)
In-Reply-To: <20230413161725.195417-1-alexghiti@rivosinc.com>

The current include guard prevents the inclusion of asm/perf_event.h
which uses the same include guard: fix the one in riscv_pmu.h so that it
matches the file name.

Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
---
 include/linux/perf/riscv_pmu.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/linux/perf/riscv_pmu.h b/include/linux/perf/riscv_pmu.h
index 43fc892aa7d9..9f70d94942e0 100644
--- a/include/linux/perf/riscv_pmu.h
+++ b/include/linux/perf/riscv_pmu.h
@@ -6,8 +6,8 @@
  *
  */
 
-#ifndef _ASM_RISCV_PERF_EVENT_H
-#define _ASM_RISCV_PERF_EVENT_H
+#ifndef _RISCV_PMU_H
+#define _RISCV_PMU_H
 
 #include <linux/perf_event.h>
 #include <linux/ptrace.h>
@@ -81,4 +81,4 @@ int riscv_pmu_get_hpm_info(u32 *hw_ctr_width, u32 *num_hw_ctr);
 
 #endif /* CONFIG_RISCV_PMU */
 
-#endif /* _ASM_RISCV_PERF_EVENT_H */
+#endif /* _RISCV_PMU_H */
-- 
2.37.2


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)

From: Alexandre Ghiti <alexghiti@rivosinc.com>
To: Jonathan Corbet <corbet@lwn.net>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Atish Patra <atishp@atishpatra.org>,
	Anup Patel <anup@brainfault.org>, Will Deacon <will@kernel.org>,
	Rob Herring <robh@kernel.org>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-perf-users@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Cc: Alexandre Ghiti <alexghiti@rivosinc.com>
Subject: [PATCH 2/4] include: riscv: Fix wrong include guard in riscv_pmu.h
Date: Thu, 13 Apr 2023 18:17:23 +0200	[thread overview]
Message-ID: <20230413161725.195417-3-alexghiti@rivosinc.com> (raw)
In-Reply-To: <20230413161725.195417-1-alexghiti@rivosinc.com>

The current include guard prevents the inclusion of asm/perf_event.h
which uses the same include guard: fix the one in riscv_pmu.h so that it
matches the file name.

Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
---
 include/linux/perf/riscv_pmu.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/linux/perf/riscv_pmu.h b/include/linux/perf/riscv_pmu.h
index 43fc892aa7d9..9f70d94942e0 100644
--- a/include/linux/perf/riscv_pmu.h
+++ b/include/linux/perf/riscv_pmu.h
@@ -6,8 +6,8 @@
  *
  */
 
-#ifndef _ASM_RISCV_PERF_EVENT_H
-#define _ASM_RISCV_PERF_EVENT_H
+#ifndef _RISCV_PMU_H
+#define _RISCV_PMU_H
 
 #include <linux/perf_event.h>
 #include <linux/ptrace.h>
@@ -81,4 +81,4 @@ int riscv_pmu_get_hpm_info(u32 *hw_ctr_width, u32 *num_hw_ctr);
 
 #endif /* CONFIG_RISCV_PMU */
 
-#endif /* _ASM_RISCV_PERF_EVENT_H */
+#endif /* _RISCV_PMU_H */
-- 
2.37.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

next prev parent reply	other threads:[~2023-04-13 16:19 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-13 16:17 [PATCH 0/4] riscv: Allow userspace to directly access perf counters Alexandre Ghiti
2023-04-13 16:17 ` Alexandre Ghiti
2023-04-13 16:17 ` Alexandre Ghiti
2023-04-13 16:17 ` [PATCH 1/4] perf: Fix wrong comment about default event_idx Alexandre Ghiti
2023-04-13 16:17   ` Alexandre Ghiti
2023-04-13 16:17   ` Alexandre Ghiti
2023-04-13 16:17 ` Alexandre Ghiti [this message]
2023-04-13 16:17   ` [PATCH 2/4] include: riscv: Fix wrong include guard in riscv_pmu.h Alexandre Ghiti
2023-04-13 16:17   ` Alexandre Ghiti
2023-04-18 18:26   ` Conor Dooley
2023-04-18 18:26     ` Conor Dooley
2023-04-18 18:26     ` Conor Dooley
2023-04-13 16:17 ` [PATCH 3/4] riscv: Make legacy counter enum match the HW numbering Alexandre Ghiti
2023-04-13 16:17   ` Alexandre Ghiti
2023-04-13 16:17   ` Alexandre Ghiti
2023-04-13 16:17 ` [PATCH 4/4] riscv: Enable perf counters user access only through perf Alexandre Ghiti
2023-04-13 16:17   ` Alexandre Ghiti
2023-04-13 16:17   ` Alexandre Ghiti
2023-04-13 21:20   ` kernel test robot
2023-04-13 21:20     ` kernel test robot
2023-04-13 21:20     ` kernel test robot
2023-04-14  2:09   ` kernel test robot
2023-04-14  2:09     ` kernel test robot
2023-04-14  2:09     ` kernel test robot
2023-04-26 12:57   ` Andrew Jones
2023-04-26 12:57     ` Andrew Jones
2023-04-26 12:57     ` Andrew Jones
2023-04-26 13:17     ` Alexandre Ghiti
2023-04-26 13:17       ` Alexandre Ghiti
2023-04-26 13:17       ` Alexandre Ghiti
2023-04-26 13:25       ` Andrew Jones
2023-04-26 13:25         ` Andrew Jones
2023-04-26 13:25         ` Andrew Jones
2023-04-29  6:19         ` Atish Patra
2023-04-29  6:19           ` Atish Patra
2023-04-29  6:19           ` Atish Patra
2023-04-29  6:50           ` Atish Patra
2023-04-29  6:50             ` Atish Patra
2023-04-29  6:50             ` Atish Patra
2023-05-09 12:24       ` Emil Renner Berthing
2023-05-09 12:24         ` Emil Renner Berthing
2023-05-09 13:40         ` Alexandre Ghiti
2023-05-09 13:40           ` Alexandre Ghiti
2023-05-01  2:09   ` Bagas Sanjaya
2023-05-01  2:09     ` Bagas Sanjaya
2023-05-01  2:09     ` Bagas Sanjaya
2023-04-13 16:36 ` [PATCH 0/4] riscv: Allow userspace to directly access perf counters Ian Rogers
2023-04-13 16:36   ` Ian Rogers
2023-04-13 16:36   ` Ian Rogers
2023-04-13 19:17 ` Atish Patra
2023-04-13 19:17   ` Atish Patra
2023-04-13 19:17   ` Atish Patra
2023-04-13 21:10   ` David Laight
2023-04-13 21:10     ` David Laight
2023-04-13 21:10     ` David Laight
2023-04-18 16:43     ` Atish Patra
2023-04-18 16:43       ` Atish Patra
2023-04-18 16:43       ` Atish Patra
2023-04-18 18:15       ` Ian Rogers
2023-04-18 18:15         ` Ian Rogers
2023-04-18 18:15         ` Ian Rogers
2023-04-18 20:30         ` Atish Patra
2023-04-18 20:30           ` Atish Patra
2023-04-18 20:30           ` Atish Patra
2023-04-19  9:21           ` Alexandre Ghiti
2023-04-19  9:21             ` Alexandre Ghiti
2023-04-19  9:21             ` Alexandre Ghiti
2023-04-19 17:42             ` Ian Rogers
2023-04-19 17:42               ` Ian Rogers
2023-04-19 17:42               ` Ian Rogers
2023-04-19 23:21               ` Atish Patra
2023-04-19 23:21                 ` Atish Patra
2023-04-19 23:21                 ` Atish Patra
2023-04-20  0:31                 ` Ian Rogers
2023-04-20  0:31                   ` Ian Rogers
2023-04-20  0:31                   ` Ian Rogers

find likely ancestor, descendant, or conflicting patches for this message:
dfblob:43fc892aa7d dfblob:43fc892aa7d dfblob:43fc892aa7d
dfblob:9f70d94942e dfblob:9f70d94942e dfblob:9f70d94942e
	(help)

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