[PATCH 0/1] fix pin count in gpio bank

[PATCH 0/1] fix pin count in gpio bank

[Henning Schild]

This is a rather trivial fix of a problem that happened because i looked
at the wrong spec file when implementing the code.

I added a "Fixes" in the hope that this can be backported as a bugfix.

Henning Schild (1):
  gpio-f7188x: fix pin count on nct6116d bank 7

 drivers/gpio/gpio-f7188x.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.39.2

[PATCH 1/1] gpio-f7188x: fix pin count on nct6116d bank 7

[Henning Schild]

The count was wrong because i looked at the wrong spec for the chip in
question. I now got access to the spec for that very chip and group7 has
all 8 pins, just like the other groups.

Fixes: d0918a84aff0 ("gpio-f7188x: Add GPIO support for Nuvoton NCT6116")
Reported-by: Xing Tong Wu <xingtong.wu@siemens.com>
Signed-off-by: Henning Schild <henning.schild@siemens.com>
---
 drivers/gpio/gpio-f7188x.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c
index 9effa7769bef..05c0edc4778f 100644
--- a/drivers/gpio/gpio-f7188x.c
+++ b/drivers/gpio/gpio-f7188x.c
@@ -282,7 +282,7 @@ static struct f7188x_gpio_bank nct6116d_gpio_bank[] = {
 	F7188X_GPIO_BANK(40, 8, 0xF0, DRVNAME "-4"),
 	F7188X_GPIO_BANK(50, 8, 0xF4, DRVNAME "-5"),
 	F7188X_GPIO_BANK(60, 8, 0xF8, DRVNAME "-6"),
-	F7188X_GPIO_BANK(70, 1, 0xFC, DRVNAME "-7"),
+	F7188X_GPIO_BANK(70, 8, 0xFC, DRVNAME "-7"),
 };
 
 static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
-- 
2.39.2

Re: [PATCH 1/1] gpio-f7188x: fix pin count on nct6116d bank 7

[Simon Guinot]

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On Tue, Apr 25, 2023 at 05:39:11PM +0200, Henning Schild wrote:
> The count was wrong because i looked at the wrong spec for the chip in
> question. I now got access to the spec for that very chip and group7 has
> all 8 pins, just like the other groups.

Did you use the NCT6102D / NCT6106D datasheet in a first place ?

If the only difference with NCT6116D is the number of pins on port
GPIO-7, then maybe we should handle it and claim support for this models
as well ?

Simon
 
> 
> Fixes: d0918a84aff0 ("gpio-f7188x: Add GPIO support for Nuvoton NCT6116")
> Reported-by: Xing Tong Wu <xingtong.wu@siemens.com>
> Signed-off-by: Henning Schild <henning.schild@siemens.com>
> ---
>  drivers/gpio/gpio-f7188x.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c
> index 9effa7769bef..05c0edc4778f 100644
> --- a/drivers/gpio/gpio-f7188x.c
> +++ b/drivers/gpio/gpio-f7188x.c
> @@ -282,7 +282,7 @@ static struct f7188x_gpio_bank nct6116d_gpio_bank[] = {
>  	F7188X_GPIO_BANK(40, 8, 0xF0, DRVNAME "-4"),
>  	F7188X_GPIO_BANK(50, 8, 0xF4, DRVNAME "-5"),
>  	F7188X_GPIO_BANK(60, 8, 0xF8, DRVNAME "-6"),
> -	F7188X_GPIO_BANK(70, 1, 0xFC, DRVNAME "-7"),
> +	F7188X_GPIO_BANK(70, 8, 0xFC, DRVNAME "-7"),
>  };
>  
>  static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
> -- 
> 2.39.2

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Re: [PATCH 1/1] gpio-f7188x: fix pin count on nct6116d bank 7

[Henning Schild]

Am Thu, 27 Apr 2023 10:29:41 +0200
schrieb Simon Guinot <simon.guinot@sequanux.org>:

> On Tue, Apr 25, 2023 at 05:39:11PM +0200, Henning Schild wrote:
> > The count was wrong because i looked at the wrong spec for the chip
> > in question. I now got access to the spec for that very chip and
> > group7 has all 8 pins, just like the other groups.  
> 
> Did you use the NCT6102D / NCT6106D datasheet in a first place ?

I do not remember which one, but one of the few one could find online.
Now i have datasheets for two chips directly from the vendor, both
files not publicly available and i am afraid i can not share.

> If the only difference with NCT6116D is the number of pins on port
> GPIO-7, then maybe we should handle it and claim support for this
> models as well ?

Please hold this patch back until i confirm again. It might be that i
got the model name wrong as well and might have to fix some strings. I
basically started my journey with a preliminary driver i got from
Nuvoton, which maybe made me think i was looking at a NCT6116D while i
was not.

At least that is what the chip IDs from the specs seem to strongly
suggest.

I am sorry for the confusion and will try to clean that up.

Now having access to some of those specs, i can offer to add more
variants without testing. Such support would be in patches on top, not
subject to fixing what we have in stable already. But i would only do
this on demand and have a weird feeling about it, the code might be
trivial but i have no means of testing.

Henning

> Simon
>  
> > 
> > Fixes: d0918a84aff0 ("gpio-f7188x: Add GPIO support for Nuvoton
> > NCT6116") Reported-by: Xing Tong Wu <xingtong.wu@siemens.com>
> > Signed-off-by: Henning Schild <henning.schild@siemens.com>
> > ---
> >  drivers/gpio/gpio-f7188x.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c
> > index 9effa7769bef..05c0edc4778f 100644
> > --- a/drivers/gpio/gpio-f7188x.c
> > +++ b/drivers/gpio/gpio-f7188x.c
> > @@ -282,7 +282,7 @@ static struct f7188x_gpio_bank
> > nct6116d_gpio_bank[] = { F7188X_GPIO_BANK(40, 8, 0xF0, DRVNAME
> > "-4"), F7188X_GPIO_BANK(50, 8, 0xF4, DRVNAME "-5"),
> >  	F7188X_GPIO_BANK(60, 8, 0xF8, DRVNAME "-6"),
> > -	F7188X_GPIO_BANK(70, 1, 0xFC, DRVNAME "-7"),
> > +	F7188X_GPIO_BANK(70, 8, 0xFC, DRVNAME "-7"),
> >  };
> >  
> >  static int f7188x_gpio_get_direction(struct gpio_chip *chip,
> > unsigned offset) -- 
> > 2.39.2  

Re: [PATCH 1/1] gpio-f7188x: fix pin count on nct6116d bank 7

[Henning Schild]

Am Thu, 27 Apr 2023 11:21:06 +0200
schrieb Henning Schild <henning.schild@siemens.com>:

> Am Thu, 27 Apr 2023 10:29:41 +0200
> schrieb Simon Guinot <simon.guinot@sequanux.org>:
> 
> > On Tue, Apr 25, 2023 at 05:39:11PM +0200, Henning Schild wrote:  
> > > The count was wrong because i looked at the wrong spec for the
> > > chip in question. I now got access to the spec for that very chip
> > > and group7 has all 8 pins, just like the other groups.    
> > 
> > Did you use the NCT6102D / NCT6106D datasheet in a first place ?  
> 
> I do not remember which one, but one of the few one could find online.
> Now i have datasheets for two chips directly from the vendor, both
> files not publicly available and i am afraid i can not share.
> 
> > If the only difference with NCT6116D is the number of pins on port
> > GPIO-7, then maybe we should handle it and claim support for this
> > models as well ?  
> 
> Please hold this patch back until i confirm again. It might be that i
> got the model name wrong as well and might have to fix some strings. I
> basically started my journey with a preliminary driver i got from
> Nuvoton, which maybe made me think i was looking at a NCT6116D while i
> was not.

I just sent a v2. I indeed have a 6126D on all of the three boards, and
never had a 6116D. So that v2 does change that name and the pin count
on the last bank.

Henning

> 
> At least that is what the chip IDs from the specs seem to strongly
> suggest.
> 
> I am sorry for the confusion and will try to clean that up.
> 
> Now having access to some of those specs, i can offer to add more
> variants without testing. Such support would be in patches on top, not
> subject to fixing what we have in stable already. But i would only do
> this on demand and have a weird feeling about it, the code might be
> trivial but i have no means of testing.
> 
> Henning
> 
> > Simon
> >    
> > > 
> > > Fixes: d0918a84aff0 ("gpio-f7188x: Add GPIO support for Nuvoton
> > > NCT6116") Reported-by: Xing Tong Wu <xingtong.wu@siemens.com>
> > > Signed-off-by: Henning Schild <henning.schild@siemens.com>
> > > ---
> > >  drivers/gpio/gpio-f7188x.c | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpio/gpio-f7188x.c
> > > b/drivers/gpio/gpio-f7188x.c index 9effa7769bef..05c0edc4778f
> > > 100644 --- a/drivers/gpio/gpio-f7188x.c
> > > +++ b/drivers/gpio/gpio-f7188x.c
> > > @@ -282,7 +282,7 @@ static struct f7188x_gpio_bank
> > > nct6116d_gpio_bank[] = { F7188X_GPIO_BANK(40, 8, 0xF0, DRVNAME
> > > "-4"), F7188X_GPIO_BANK(50, 8, 0xF4, DRVNAME "-5"),
> > >  	F7188X_GPIO_BANK(60, 8, 0xF8, DRVNAME "-6"),
> > > -	F7188X_GPIO_BANK(70, 1, 0xFC, DRVNAME "-7"),
> > > +	F7188X_GPIO_BANK(70, 8, 0xFC, DRVNAME "-7"),
> > >  };
> > >  
> > >  static int f7188x_gpio_get_direction(struct gpio_chip *chip,
> > > unsigned offset) -- 
> > > 2.39.2    
> 

Re: [PATCH 1/1] gpio-f7188x: fix pin count on nct6116d bank 7

[Simon Guinot]

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On Thu, Apr 27, 2023 at 11:21:06AM +0200, Henning Schild wrote:
> Now having access to some of those specs, i can offer to add more
> variants without testing. Such support would be in patches on top, not
> subject to fixing what we have in stable already. But i would only do
> this on demand and have a weird feeling about it, the code might be
> trivial but i have no means of testing.

OK

Simon

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