* [PULL 01/73] cryptodev: Introduce cryptodev.json
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
@ 2023-03-08 1:10 ` Michael S. Tsirkin
2023-03-08 1:10 ` [PULL 02/73] cryptodev: Remove 'name' & 'model' fields Michael S. Tsirkin
` (72 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:10 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, zhenwei pi, Daniel P . Berrangé,
Gonglei (Arei),
Eric Blake, Markus Armbruster, Michael Roth
From: zhenwei pi <pizhenwei@bytedance.com>
Introduce QCryptodevBackendType in cryptodev.json, also apply this to
related codes. Then we can drop 'enum CryptoDevBackendOptionsType'.
Note that `CRYPTODEV_BACKEND_TYPE_NONE` is *NOT* used by anywhere, so
drop it(no 'none' enum in QCryptodevBackendType).
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
Message-Id: <20230301105847.253084-2-pizhenwei@bytedance.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
qapi/cryptodev.json | 20 ++++++++++++++++++++
qapi/qapi-schema.json | 1 +
include/sysemu/cryptodev.h | 11 ++---------
backends/cryptodev-builtin.c | 2 +-
backends/cryptodev-lkcf.c | 2 +-
backends/cryptodev-vhost-user.c | 4 ++--
backends/cryptodev-vhost.c | 4 ++--
MAINTAINERS | 1 +
qapi/meson.build | 1 +
9 files changed, 31 insertions(+), 15 deletions(-)
create mode 100644 qapi/cryptodev.json
diff --git a/qapi/cryptodev.json b/qapi/cryptodev.json
new file mode 100644
index 0000000000..b65edbe183
--- /dev/null
+++ b/qapi/cryptodev.json
@@ -0,0 +1,20 @@
+# -*- Mode: Python -*-
+# vim: filetype=python
+#
+# This work is licensed under the terms of the GNU GPL, version 2 or later.
+# See the COPYING file in the top-level directory.
+
+##
+# @QCryptodevBackendType:
+#
+# The crypto device backend type
+#
+# @builtin: the QEMU builtin support
+# @vhost-user: vhost-user
+# @lkcf: Linux kernel cryptographic framework
+#
+# Since: 8.0
+##
+{ 'enum': 'QCryptodevBackendType',
+ 'prefix': 'QCRYPTODEV_BACKEND_TYPE',
+ 'data': ['builtin', 'vhost-user', 'lkcf']}
diff --git a/qapi/qapi-schema.json b/qapi/qapi-schema.json
index f000b90744..1e923945db 100644
--- a/qapi/qapi-schema.json
+++ b/qapi/qapi-schema.json
@@ -95,3 +95,4 @@
{ 'include': 'pci.json' }
{ 'include': 'stats.json' }
{ 'include': 'virtio.json' }
+{ 'include': 'cryptodev.json' }
diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h
index cf9b3f07fe..8d2adda974 100644
--- a/include/sysemu/cryptodev.h
+++ b/include/sysemu/cryptodev.h
@@ -25,6 +25,7 @@
#include "qemu/queue.h"
#include "qom/object.h"
+#include "qapi/qapi-types-cryptodev.h"
/**
* CryptoDevBackend:
@@ -215,16 +216,8 @@ struct CryptoDevBackendClass {
void *opaque);
};
-typedef enum CryptoDevBackendOptionsType {
- CRYPTODEV_BACKEND_TYPE_NONE = 0,
- CRYPTODEV_BACKEND_TYPE_BUILTIN = 1,
- CRYPTODEV_BACKEND_TYPE_VHOST_USER = 2,
- CRYPTODEV_BACKEND_TYPE_LKCF = 3,
- CRYPTODEV_BACKEND_TYPE__MAX,
-} CryptoDevBackendOptionsType;
-
struct CryptoDevBackendClient {
- CryptoDevBackendOptionsType type;
+ QCryptodevBackendType type;
char *model;
char *name;
char *info_str;
diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c
index cda6ca3b71..8c7c10847d 100644
--- a/backends/cryptodev-builtin.c
+++ b/backends/cryptodev-builtin.c
@@ -76,7 +76,7 @@ static void cryptodev_builtin_init(
"cryptodev-builtin", NULL);
cc->info_str = g_strdup_printf("cryptodev-builtin0");
cc->queue_index = 0;
- cc->type = CRYPTODEV_BACKEND_TYPE_BUILTIN;
+ cc->type = QCRYPTODEV_BACKEND_TYPE_BUILTIN;
backend->conf.peers.ccs[0] = cc;
backend->conf.crypto_services =
diff --git a/backends/cryptodev-lkcf.c b/backends/cryptodev-lkcf.c
index 133bd706a4..91e02c0df9 100644
--- a/backends/cryptodev-lkcf.c
+++ b/backends/cryptodev-lkcf.c
@@ -226,7 +226,7 @@ static void cryptodev_lkcf_init(CryptoDevBackend *backend, Error **errp)
cc = cryptodev_backend_new_client("cryptodev-lkcf", NULL);
cc->info_str = g_strdup_printf("cryptodev-lkcf0");
cc->queue_index = 0;
- cc->type = CRYPTODEV_BACKEND_TYPE_LKCF;
+ cc->type = QCRYPTODEV_BACKEND_TYPE_LKCF;
backend->conf.peers.ccs[0] = cc;
backend->conf.crypto_services =
diff --git a/backends/cryptodev-vhost-user.c b/backends/cryptodev-vhost-user.c
index ab3028e045..c165a1b1d6 100644
--- a/backends/cryptodev-vhost-user.c
+++ b/backends/cryptodev-vhost-user.c
@@ -67,7 +67,7 @@ cryptodev_vhost_user_get_vhost(
{
CryptoDevBackendVhostUser *s =
CRYPTODEV_BACKEND_VHOST_USER(b);
- assert(cc->type == CRYPTODEV_BACKEND_TYPE_VHOST_USER);
+ assert(cc->type == QCRYPTODEV_BACKEND_TYPE_VHOST_USER);
assert(queue < MAX_CRYPTO_QUEUE_NUM);
return s->vhost_crypto[queue];
@@ -203,7 +203,7 @@ static void cryptodev_vhost_user_init(
cc->info_str = g_strdup_printf("cryptodev-vhost-user%zu to %s ",
i, chr->label);
cc->queue_index = i;
- cc->type = CRYPTODEV_BACKEND_TYPE_VHOST_USER;
+ cc->type = QCRYPTODEV_BACKEND_TYPE_VHOST_USER;
backend->conf.peers.ccs[i] = cc;
diff --git a/backends/cryptodev-vhost.c b/backends/cryptodev-vhost.c
index 74ea0ad63d..93523732f3 100644
--- a/backends/cryptodev-vhost.c
+++ b/backends/cryptodev-vhost.c
@@ -127,7 +127,7 @@ cryptodev_get_vhost(CryptoDevBackendClient *cc,
switch (cc->type) {
#if defined(CONFIG_VHOST_USER) && defined(CONFIG_LINUX)
- case CRYPTODEV_BACKEND_TYPE_VHOST_USER:
+ case QCRYPTODEV_BACKEND_TYPE_VHOST_USER:
vhost_crypto = cryptodev_vhost_user_get_vhost(cc, b, queue);
break;
#endif
@@ -195,7 +195,7 @@ int cryptodev_vhost_start(VirtIODevice *dev, int total_queues)
* because vhost user doesn't interrupt masking/unmasking
* properly.
*/
- if (cc->type == CRYPTODEV_BACKEND_TYPE_VHOST_USER) {
+ if (cc->type == QCRYPTODEV_BACKEND_TYPE_VHOST_USER) {
dev->use_guest_notifier_mask = false;
}
}
diff --git a/MAINTAINERS b/MAINTAINERS
index 5340de0515..cbb05de8eb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2879,6 +2879,7 @@ M: Gonglei <arei.gonglei@huawei.com>
S: Maintained
F: include/sysemu/cryptodev*.h
F: backends/cryptodev*.c
+F: qapi/cryptodev.json
Python library
M: John Snow <jsnow@redhat.com>
diff --git a/qapi/meson.build b/qapi/meson.build
index fbdb442fdf..1c37ae7491 100644
--- a/qapi/meson.build
+++ b/qapi/meson.build
@@ -56,6 +56,7 @@ if have_system
qapi_all_modules += [
'acpi',
'audio',
+ 'cryptodev',
'qdev',
'pci',
'rdma',
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 02/73] cryptodev: Remove 'name' & 'model' fields
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
2023-03-08 1:10 ` [PULL 01/73] cryptodev: Introduce cryptodev.json Michael S. Tsirkin
@ 2023-03-08 1:10 ` Michael S. Tsirkin
2023-03-08 1:10 ` [PULL 03/73] cryptodev: Introduce cryptodev alg type in QAPI Michael S. Tsirkin
` (71 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:10 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, zhenwei pi, Daniel P . Berrangé, Gonglei (Arei)
From: zhenwei pi <pizhenwei@bytedance.com>
We have already used qapi to generate crypto device types, this allows
to convert type to a string 'model', so the 'model' field is not
needed.
And the 'name' field is not used by any backend driver, drop it.
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
Message-Id: <20230301105847.253084-3-pizhenwei@bytedance.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/sysemu/cryptodev.h | 12 +++---------
backends/cryptodev-builtin.c | 3 +--
backends/cryptodev-lkcf.c | 2 +-
backends/cryptodev-vhost-user.c | 3 +--
backends/cryptodev.c | 11 +----------
5 files changed, 7 insertions(+), 24 deletions(-)
diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h
index 8d2adda974..af152d09db 100644
--- a/include/sysemu/cryptodev.h
+++ b/include/sysemu/cryptodev.h
@@ -218,8 +218,6 @@ struct CryptoDevBackendClass {
struct CryptoDevBackendClient {
QCryptodevBackendType type;
- char *model;
- char *name;
char *info_str;
unsigned int queue_index;
int vring_enable;
@@ -264,11 +262,8 @@ struct CryptoDevBackend {
/**
* cryptodev_backend_new_client:
- * @model: the cryptodev backend model
- * @name: the cryptodev backend name, can be NULL
*
- * Creates a new cryptodev backend client object
- * with the @name in the model @model.
+ * Creates a new cryptodev backend client object.
*
* The returned object must be released with
* cryptodev_backend_free_client() when no
@@ -276,9 +271,8 @@ struct CryptoDevBackend {
*
* Returns: a new cryptodev backend client object
*/
-CryptoDevBackendClient *
-cryptodev_backend_new_client(const char *model,
- const char *name);
+CryptoDevBackendClient *cryptodev_backend_new_client(void);
+
/**
* cryptodev_backend_free_client:
* @cc: the cryptodev backend client object
diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c
index 8c7c10847d..08895271eb 100644
--- a/backends/cryptodev-builtin.c
+++ b/backends/cryptodev-builtin.c
@@ -72,8 +72,7 @@ static void cryptodev_builtin_init(
return;
}
- cc = cryptodev_backend_new_client(
- "cryptodev-builtin", NULL);
+ cc = cryptodev_backend_new_client();
cc->info_str = g_strdup_printf("cryptodev-builtin0");
cc->queue_index = 0;
cc->type = QCRYPTODEV_BACKEND_TYPE_BUILTIN;
diff --git a/backends/cryptodev-lkcf.c b/backends/cryptodev-lkcf.c
index 91e02c0df9..de3d1867c5 100644
--- a/backends/cryptodev-lkcf.c
+++ b/backends/cryptodev-lkcf.c
@@ -223,7 +223,7 @@ static void cryptodev_lkcf_init(CryptoDevBackend *backend, Error **errp)
return;
}
- cc = cryptodev_backend_new_client("cryptodev-lkcf", NULL);
+ cc = cryptodev_backend_new_client();
cc->info_str = g_strdup_printf("cryptodev-lkcf0");
cc->queue_index = 0;
cc->type = QCRYPTODEV_BACKEND_TYPE_LKCF;
diff --git a/backends/cryptodev-vhost-user.c b/backends/cryptodev-vhost-user.c
index c165a1b1d6..580bd1abb0 100644
--- a/backends/cryptodev-vhost-user.c
+++ b/backends/cryptodev-vhost-user.c
@@ -198,8 +198,7 @@ static void cryptodev_vhost_user_init(
s->opened = true;
for (i = 0; i < queues; i++) {
- cc = cryptodev_backend_new_client(
- "cryptodev-vhost-user", NULL);
+ cc = cryptodev_backend_new_client();
cc->info_str = g_strdup_printf("cryptodev-vhost-user%zu to %s ",
i, chr->label);
cc->queue_index = i;
diff --git a/backends/cryptodev.c b/backends/cryptodev.c
index 54ee8c81f5..81941af816 100644
--- a/backends/cryptodev.c
+++ b/backends/cryptodev.c
@@ -34,18 +34,11 @@
static QTAILQ_HEAD(, CryptoDevBackendClient) crypto_clients;
-CryptoDevBackendClient *
-cryptodev_backend_new_client(const char *model,
- const char *name)
+CryptoDevBackendClient *cryptodev_backend_new_client(void)
{
CryptoDevBackendClient *cc;
cc = g_new0(CryptoDevBackendClient, 1);
- cc->model = g_strdup(model);
- if (name) {
- cc->name = g_strdup(name);
- }
-
QTAILQ_INSERT_TAIL(&crypto_clients, cc, next);
return cc;
@@ -55,8 +48,6 @@ void cryptodev_backend_free_client(
CryptoDevBackendClient *cc)
{
QTAILQ_REMOVE(&crypto_clients, cc, next);
- g_free(cc->name);
- g_free(cc->model);
g_free(cc->info_str);
g_free(cc);
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 03/73] cryptodev: Introduce cryptodev alg type in QAPI
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
2023-03-08 1:10 ` [PULL 01/73] cryptodev: Introduce cryptodev.json Michael S. Tsirkin
2023-03-08 1:10 ` [PULL 02/73] cryptodev: Remove 'name' & 'model' fields Michael S. Tsirkin
@ 2023-03-08 1:10 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 04/73] cryptodev: Introduce server " Michael S. Tsirkin
` (70 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:10 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, zhenwei pi, Daniel P . Berrangé,
Gonglei (Arei),
Eric Blake, Markus Armbruster
From: zhenwei pi <pizhenwei@bytedance.com>
Introduce cryptodev alg type in cryptodev.json, then apply this to
related codes, and drop 'enum CryptoDevBackendAlgType'.
There are two options:
1, { 'enum': 'QCryptodevBackendAlgType',
'prefix': 'CRYPTODEV_BACKEND_ALG',
'data': ['sym', 'asym']}
Then we can keep 'CRYPTODEV_BACKEND_ALG_SYM' and avoid lots of
changes.
2, changes in this patch(with prefix 'QCRYPTODEV_BACKEND_ALG').
To avoid breaking the rule of QAPI, use 2 here.
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
Message-Id: <20230301105847.253084-4-pizhenwei@bytedance.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
qapi/cryptodev.json | 14 ++++++++++++++
include/sysemu/cryptodev.h | 8 +-------
backends/cryptodev-builtin.c | 6 +++---
backends/cryptodev-lkcf.c | 4 ++--
backends/cryptodev.c | 6 +++---
hw/virtio/virtio-crypto.c | 14 +++++++-------
6 files changed, 30 insertions(+), 22 deletions(-)
diff --git a/qapi/cryptodev.json b/qapi/cryptodev.json
index b65edbe183..ebb6852035 100644
--- a/qapi/cryptodev.json
+++ b/qapi/cryptodev.json
@@ -4,6 +4,20 @@
# This work is licensed under the terms of the GNU GPL, version 2 or later.
# See the COPYING file in the top-level directory.
+##
+# @QCryptodevBackendAlgType:
+#
+# The supported algorithm types of a crypto device.
+#
+# @sym: symmetric encryption
+# @asym: asymmetric Encryption
+#
+# Since: 8.0
+##
+{ 'enum': 'QCryptodevBackendAlgType',
+ 'prefix': 'QCRYPTODEV_BACKEND_ALG',
+ 'data': ['sym', 'asym']}
+
##
# @QCryptodevBackendType:
#
diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h
index af152d09db..16f01dd48a 100644
--- a/include/sysemu/cryptodev.h
+++ b/include/sysemu/cryptodev.h
@@ -49,12 +49,6 @@ typedef struct CryptoDevBackendPeers CryptoDevBackendPeers;
typedef struct CryptoDevBackendClient
CryptoDevBackendClient;
-enum CryptoDevBackendAlgType {
- CRYPTODEV_BACKEND_ALG_SYM,
- CRYPTODEV_BACKEND_ALG_ASYM,
- CRYPTODEV_BACKEND_ALG__MAX,
-};
-
/**
* CryptoDevBackendSymSessionInfo:
*
@@ -181,7 +175,7 @@ typedef struct CryptoDevBackendAsymOpInfo {
} CryptoDevBackendAsymOpInfo;
typedef struct CryptoDevBackendOpInfo {
- enum CryptoDevBackendAlgType algtype;
+ QCryptodevBackendAlgType algtype;
uint32_t op_code;
uint64_t session_id;
union {
diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c
index 08895271eb..e70dcd5dad 100644
--- a/backends/cryptodev-builtin.c
+++ b/backends/cryptodev-builtin.c
@@ -537,7 +537,7 @@ static int cryptodev_builtin_operation(
CryptoDevBackendBuiltinSession *sess;
CryptoDevBackendSymOpInfo *sym_op_info;
CryptoDevBackendAsymOpInfo *asym_op_info;
- enum CryptoDevBackendAlgType algtype = op_info->algtype;
+ QCryptodevBackendAlgType algtype = op_info->algtype;
int status = -VIRTIO_CRYPTO_ERR;
Error *local_error = NULL;
@@ -549,11 +549,11 @@ static int cryptodev_builtin_operation(
}
sess = builtin->sessions[op_info->session_id];
- if (algtype == CRYPTODEV_BACKEND_ALG_SYM) {
+ if (algtype == QCRYPTODEV_BACKEND_ALG_SYM) {
sym_op_info = op_info->u.sym_op_info;
status = cryptodev_builtin_sym_operation(sess, sym_op_info,
&local_error);
- } else if (algtype == CRYPTODEV_BACKEND_ALG_ASYM) {
+ } else if (algtype == QCRYPTODEV_BACKEND_ALG_ASYM) {
asym_op_info = op_info->u.asym_op_info;
status = cryptodev_builtin_asym_operation(sess, op_info->op_code,
asym_op_info, &local_error);
diff --git a/backends/cryptodev-lkcf.c b/backends/cryptodev-lkcf.c
index de3d1867c5..53a932b58d 100644
--- a/backends/cryptodev-lkcf.c
+++ b/backends/cryptodev-lkcf.c
@@ -477,7 +477,7 @@ static int cryptodev_lkcf_operation(
CryptoDevBackendLKCF *lkcf =
CRYPTODEV_BACKEND_LKCF(backend);
CryptoDevBackendLKCFSession *sess;
- enum CryptoDevBackendAlgType algtype = op_info->algtype;
+ QCryptodevBackendAlgType algtype = op_info->algtype;
CryptoDevLKCFTask *task;
if (op_info->session_id >= MAX_SESSIONS ||
@@ -488,7 +488,7 @@ static int cryptodev_lkcf_operation(
}
sess = lkcf->sess[op_info->session_id];
- if (algtype != CRYPTODEV_BACKEND_ALG_ASYM) {
+ if (algtype != QCRYPTODEV_BACKEND_ALG_ASYM) {
error_report("algtype not supported: %u", algtype);
return -VIRTIO_CRYPTO_NOTSUPP;
}
diff --git a/backends/cryptodev.c b/backends/cryptodev.c
index 81941af816..c2a053db0e 100644
--- a/backends/cryptodev.c
+++ b/backends/cryptodev.c
@@ -120,10 +120,10 @@ int cryptodev_backend_crypto_operation(
{
VirtIOCryptoReq *req = opaque1;
CryptoDevBackendOpInfo *op_info = &req->op_info;
- enum CryptoDevBackendAlgType algtype = req->flags;
+ QCryptodevBackendAlgType algtype = req->flags;
- if ((algtype != CRYPTODEV_BACKEND_ALG_SYM)
- && (algtype != CRYPTODEV_BACKEND_ALG_ASYM)) {
+ if ((algtype != QCRYPTODEV_BACKEND_ALG_SYM)
+ && (algtype != QCRYPTODEV_BACKEND_ALG_ASYM)) {
error_report("Unsupported cryptodev alg type: %" PRIu32 "", algtype);
return -VIRTIO_CRYPTO_NOTSUPP;
}
diff --git a/hw/virtio/virtio-crypto.c b/hw/virtio/virtio-crypto.c
index 516425e26a..0d1be0ada9 100644
--- a/hw/virtio/virtio-crypto.c
+++ b/hw/virtio/virtio-crypto.c
@@ -462,7 +462,7 @@ static void virtio_crypto_init_request(VirtIOCrypto *vcrypto, VirtQueue *vq,
req->in_iov = NULL;
req->in_num = 0;
req->in_len = 0;
- req->flags = CRYPTODEV_BACKEND_ALG__MAX;
+ req->flags = QCRYPTODEV_BACKEND_ALG__MAX;
memset(&req->op_info, 0x00, sizeof(req->op_info));
}
@@ -472,7 +472,7 @@ static void virtio_crypto_free_request(VirtIOCryptoReq *req)
return;
}
- if (req->flags == CRYPTODEV_BACKEND_ALG_SYM) {
+ if (req->flags == QCRYPTODEV_BACKEND_ALG_SYM) {
size_t max_len;
CryptoDevBackendSymOpInfo *op_info = req->op_info.u.sym_op_info;
@@ -485,7 +485,7 @@ static void virtio_crypto_free_request(VirtIOCryptoReq *req)
/* Zeroize and free request data structure */
memset(op_info, 0, sizeof(*op_info) + max_len);
g_free(op_info);
- } else if (req->flags == CRYPTODEV_BACKEND_ALG_ASYM) {
+ } else if (req->flags == QCRYPTODEV_BACKEND_ALG_ASYM) {
CryptoDevBackendAsymOpInfo *op_info = req->op_info.u.asym_op_info;
if (op_info) {
g_free(op_info->src);
@@ -570,10 +570,10 @@ static void virtio_crypto_req_complete(void *opaque, int ret)
VirtIODevice *vdev = VIRTIO_DEVICE(vcrypto);
uint8_t status = -ret;
- if (req->flags == CRYPTODEV_BACKEND_ALG_SYM) {
+ if (req->flags == QCRYPTODEV_BACKEND_ALG_SYM) {
virtio_crypto_sym_input_data_helper(vdev, req, status,
req->op_info.u.sym_op_info);
- } else if (req->flags == CRYPTODEV_BACKEND_ALG_ASYM) {
+ } else if (req->flags == QCRYPTODEV_BACKEND_ALG_ASYM) {
virtio_crypto_akcipher_input_data_helper(vdev, req, status,
req->op_info.u.asym_op_info);
}
@@ -875,7 +875,7 @@ virtio_crypto_handle_request(VirtIOCryptoReq *request)
switch (opcode) {
case VIRTIO_CRYPTO_CIPHER_ENCRYPT:
case VIRTIO_CRYPTO_CIPHER_DECRYPT:
- op_info->algtype = request->flags = CRYPTODEV_BACKEND_ALG_SYM;
+ op_info->algtype = request->flags = QCRYPTODEV_BACKEND_ALG_SYM;
ret = virtio_crypto_handle_sym_req(vcrypto,
&req.u.sym_req, op_info,
out_iov, out_num);
@@ -885,7 +885,7 @@ virtio_crypto_handle_request(VirtIOCryptoReq *request)
case VIRTIO_CRYPTO_AKCIPHER_DECRYPT:
case VIRTIO_CRYPTO_AKCIPHER_SIGN:
case VIRTIO_CRYPTO_AKCIPHER_VERIFY:
- op_info->algtype = request->flags = CRYPTODEV_BACKEND_ALG_ASYM;
+ op_info->algtype = request->flags = QCRYPTODEV_BACKEND_ALG_ASYM;
ret = virtio_crypto_handle_asym_req(vcrypto,
&req.u.akcipher_req, op_info,
out_iov, out_num);
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 04/73] cryptodev: Introduce server type in QAPI
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (2 preceding siblings ...)
2023-03-08 1:10 ` [PULL 03/73] cryptodev: Introduce cryptodev alg type in QAPI Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 05/73] cryptodev: Introduce 'query-cryptodev' QMP command Michael S. Tsirkin
` (69 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, zhenwei pi, Daniel P . Berrangé,
Gonglei (Arei),
Eric Blake, Markus Armbruster
From: zhenwei pi <pizhenwei@bytedance.com>
Introduce cryptodev service type in cryptodev.json, then apply this
to related codes. Now we can remove VIRTIO_CRYPTO_SERVICE_xxx
dependence from QEMU cryptodev.
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
Message-Id: <20230301105847.253084-5-pizhenwei@bytedance.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
qapi/cryptodev.json | 11 +++++++++++
backends/cryptodev-builtin.c | 8 ++++----
backends/cryptodev-lkcf.c | 2 +-
backends/cryptodev-vhost-user.c | 6 +++---
hw/virtio/virtio-crypto.c | 27 +++++++++++++++++++++++++--
5 files changed, 44 insertions(+), 10 deletions(-)
diff --git a/qapi/cryptodev.json b/qapi/cryptodev.json
index ebb6852035..8732a30524 100644
--- a/qapi/cryptodev.json
+++ b/qapi/cryptodev.json
@@ -18,6 +18,17 @@
'prefix': 'QCRYPTODEV_BACKEND_ALG',
'data': ['sym', 'asym']}
+##
+# @QCryptodevBackendServiceType:
+#
+# The supported service types of a crypto device.
+#
+# Since: 8.0
+##
+{ 'enum': 'QCryptodevBackendServiceType',
+ 'prefix': 'QCRYPTODEV_BACKEND_SERVICE',
+ 'data': ['cipher', 'hash', 'mac', 'aead', 'akcipher']}
+
##
# @QCryptodevBackendType:
#
diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c
index e70dcd5dad..c0fbb650d7 100644
--- a/backends/cryptodev-builtin.c
+++ b/backends/cryptodev-builtin.c
@@ -79,10 +79,10 @@ static void cryptodev_builtin_init(
backend->conf.peers.ccs[0] = cc;
backend->conf.crypto_services =
- 1u << VIRTIO_CRYPTO_SERVICE_CIPHER |
- 1u << VIRTIO_CRYPTO_SERVICE_HASH |
- 1u << VIRTIO_CRYPTO_SERVICE_MAC |
- 1u << VIRTIO_CRYPTO_SERVICE_AKCIPHER;
+ 1u << QCRYPTODEV_BACKEND_SERVICE_CIPHER |
+ 1u << QCRYPTODEV_BACKEND_SERVICE_HASH |
+ 1u << QCRYPTODEV_BACKEND_SERVICE_MAC |
+ 1u << QCRYPTODEV_BACKEND_SERVICE_AKCIPHER;
backend->conf.cipher_algo_l = 1u << VIRTIO_CRYPTO_CIPHER_AES_CBC;
backend->conf.hash_algo = 1u << VIRTIO_CRYPTO_HASH_SHA1;
backend->conf.akcipher_algo = 1u << VIRTIO_CRYPTO_AKCIPHER_RSA;
diff --git a/backends/cryptodev-lkcf.c b/backends/cryptodev-lkcf.c
index 53a932b58d..edec99f104 100644
--- a/backends/cryptodev-lkcf.c
+++ b/backends/cryptodev-lkcf.c
@@ -230,7 +230,7 @@ static void cryptodev_lkcf_init(CryptoDevBackend *backend, Error **errp)
backend->conf.peers.ccs[0] = cc;
backend->conf.crypto_services =
- 1u << VIRTIO_CRYPTO_SERVICE_AKCIPHER;
+ 1u << QCRYPTODEV_BACKEND_SERVICE_AKCIPHER;
backend->conf.akcipher_algo = 1u << VIRTIO_CRYPTO_AKCIPHER_RSA;
lkcf->running = true;
diff --git a/backends/cryptodev-vhost-user.c b/backends/cryptodev-vhost-user.c
index 580bd1abb0..b1d9eb735f 100644
--- a/backends/cryptodev-vhost-user.c
+++ b/backends/cryptodev-vhost-user.c
@@ -221,9 +221,9 @@ static void cryptodev_vhost_user_init(
cryptodev_vhost_user_event, NULL, s, NULL, true);
backend->conf.crypto_services =
- 1u << VIRTIO_CRYPTO_SERVICE_CIPHER |
- 1u << VIRTIO_CRYPTO_SERVICE_HASH |
- 1u << VIRTIO_CRYPTO_SERVICE_MAC;
+ 1u << QCRYPTODEV_BACKEND_SERVICE_CIPHER |
+ 1u << QCRYPTODEV_BACKEND_SERVICE_HASH |
+ 1u << QCRYPTODEV_BACKEND_SERVICE_MAC;
backend->conf.cipher_algo_l = 1u << VIRTIO_CRYPTO_CIPHER_AES_CBC;
backend->conf.hash_algo = 1u << VIRTIO_CRYPTO_HASH_SHA1;
diff --git a/hw/virtio/virtio-crypto.c b/hw/virtio/virtio-crypto.c
index 0d1be0ada9..e4f0de4d1c 100644
--- a/hw/virtio/virtio-crypto.c
+++ b/hw/virtio/virtio-crypto.c
@@ -997,12 +997,35 @@ static void virtio_crypto_reset(VirtIODevice *vdev)
}
}
+static uint32_t virtio_crypto_init_services(uint32_t qservices)
+{
+ uint32_t vservices = 0;
+
+ if (qservices & (1 << QCRYPTODEV_BACKEND_SERVICE_CIPHER)) {
+ vservices |= (1 << VIRTIO_CRYPTO_SERVICE_CIPHER);
+ }
+ if (qservices & (1 << QCRYPTODEV_BACKEND_SERVICE_HASH)) {
+ vservices |= (1 << VIRTIO_CRYPTO_SERVICE_HASH);
+ }
+ if (qservices & (1 << QCRYPTODEV_BACKEND_SERVICE_MAC)) {
+ vservices |= (1 << VIRTIO_CRYPTO_SERVICE_MAC);
+ }
+ if (qservices & (1 << QCRYPTODEV_BACKEND_SERVICE_AEAD)) {
+ vservices |= (1 << VIRTIO_CRYPTO_SERVICE_AEAD);
+ }
+ if (qservices & (1 << QCRYPTODEV_BACKEND_SERVICE_AKCIPHER)) {
+ vservices |= (1 << VIRTIO_CRYPTO_SERVICE_AKCIPHER);
+ }
+
+ return vservices;
+}
+
static void virtio_crypto_init_config(VirtIODevice *vdev)
{
VirtIOCrypto *vcrypto = VIRTIO_CRYPTO(vdev);
- vcrypto->conf.crypto_services =
- vcrypto->conf.cryptodev->conf.crypto_services;
+ vcrypto->conf.crypto_services = virtio_crypto_init_services(
+ vcrypto->conf.cryptodev->conf.crypto_services);
vcrypto->conf.cipher_algo_l =
vcrypto->conf.cryptodev->conf.cipher_algo_l;
vcrypto->conf.cipher_algo_h =
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 05/73] cryptodev: Introduce 'query-cryptodev' QMP command
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (3 preceding siblings ...)
2023-03-08 1:11 ` [PULL 04/73] cryptodev: Introduce server " Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 06/73] cryptodev-builtin: Detect akcipher capability Michael S. Tsirkin
` (68 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, zhenwei pi, Daniel P . Berrangé,
Gonglei (Arei),
Eric Blake, Markus Armbruster
From: zhenwei pi <pizhenwei@bytedance.com>
Now we have a QMP command to query crypto devices:
virsh qemu-monitor-command vm '{"execute": "query-cryptodev"}' | jq
{
"return": [
{
"service": [
"akcipher",
"mac",
"hash",
"cipher"
],
"id": "cryptodev1",
"client": [
{
"queue": 0,
"type": "builtin"
}
]
},
{
"service": [
"akcipher"
],
"id": "cryptodev0",
"client": [
{
"queue": 0,
"type": "lkcf"
}
]
}
],
"id": "libvirt-417"
}
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
Message-Id: <20230301105847.253084-6-pizhenwei@bytedance.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
qapi/cryptodev.json | 44 +++++++++++++++++++++++++++++++++++++++++++
backends/cryptodev.c | 45 ++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 89 insertions(+)
diff --git a/qapi/cryptodev.json b/qapi/cryptodev.json
index 8732a30524..f33f96a692 100644
--- a/qapi/cryptodev.json
+++ b/qapi/cryptodev.json
@@ -43,3 +43,47 @@
{ 'enum': 'QCryptodevBackendType',
'prefix': 'QCRYPTODEV_BACKEND_TYPE',
'data': ['builtin', 'vhost-user', 'lkcf']}
+
+##
+# @QCryptodevBackendClient:
+#
+# Information about a queue of crypto device.
+#
+# @queue: the queue index of the crypto device
+#
+# @type: the type of the crypto device
+#
+# Since: 8.0
+##
+{ 'struct': 'QCryptodevBackendClient',
+ 'data': { 'queue': 'uint32',
+ 'type': 'QCryptodevBackendType' } }
+
+##
+# @QCryptodevInfo:
+#
+# Information about a crypto device.
+#
+# @id: the id of the crypto device
+#
+# @service: supported service types of a crypto device
+#
+# @client: the additional infomation of the crypto device
+#
+# Since: 8.0
+##
+{ 'struct': 'QCryptodevInfo',
+ 'data': { 'id': 'str',
+ 'service': ['QCryptodevBackendServiceType'],
+ 'client': ['QCryptodevBackendClient'] } }
+
+##
+# @query-cryptodev:
+#
+# Returns information about current crypto devices.
+#
+# Returns: a list of @QCryptodevInfo
+#
+# Since: 8.0
+##
+{ 'command': 'query-cryptodev', 'returns': ['QCryptodevInfo']}
diff --git a/backends/cryptodev.c b/backends/cryptodev.c
index c2a053db0e..3a45d19823 100644
--- a/backends/cryptodev.c
+++ b/backends/cryptodev.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "sysemu/cryptodev.h"
#include "qapi/error.h"
+#include "qapi/qapi-commands-cryptodev.h"
#include "qapi/visitor.h"
#include "qemu/config-file.h"
#include "qemu/error-report.h"
@@ -33,6 +34,50 @@
static QTAILQ_HEAD(, CryptoDevBackendClient) crypto_clients;
+static int qmp_query_cryptodev_foreach(Object *obj, void *data)
+{
+ CryptoDevBackend *backend;
+ QCryptodevInfoList **infolist = data;
+ uint32_t services, i;
+
+ if (!object_dynamic_cast(obj, TYPE_CRYPTODEV_BACKEND)) {
+ return 0;
+ }
+
+ QCryptodevInfo *info = g_new0(QCryptodevInfo, 1);
+ info->id = g_strdup(object_get_canonical_path_component(obj));
+
+ backend = CRYPTODEV_BACKEND(obj);
+ services = backend->conf.crypto_services;
+ for (i = 0; i < QCRYPTODEV_BACKEND_SERVICE__MAX; i++) {
+ if (services & (1 << i)) {
+ QAPI_LIST_PREPEND(info->service, i);
+ }
+ }
+
+ for (i = 0; i < backend->conf.peers.queues; i++) {
+ CryptoDevBackendClient *cc = backend->conf.peers.ccs[i];
+ QCryptodevBackendClient *client = g_new0(QCryptodevBackendClient, 1);
+
+ client->queue = cc->queue_index;
+ client->type = cc->type;
+ QAPI_LIST_PREPEND(info->client, client);
+ }
+
+ QAPI_LIST_PREPEND(*infolist, info);
+
+ return 0;
+}
+
+QCryptodevInfoList *qmp_query_cryptodev(Error **errp)
+{
+ QCryptodevInfoList *list = NULL;
+ Object *objs = container_get(object_get_root(), "/objects");
+
+ object_child_foreach(objs, qmp_query_cryptodev_foreach, &list);
+
+ return list;
+}
CryptoDevBackendClient *cryptodev_backend_new_client(void)
{
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 06/73] cryptodev-builtin: Detect akcipher capability
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (4 preceding siblings ...)
2023-03-08 1:11 ` [PULL 05/73] cryptodev: Introduce 'query-cryptodev' QMP command Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 07/73] hmp: add cryptodev info command Michael S. Tsirkin
` (67 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, zhenwei pi, Daniel P . Berrangé, Gonglei (Arei)
From: zhenwei pi <pizhenwei@bytedance.com>
Rather than exposing akcipher service/RSA algorithm to virtio crypto
device unconditionally, detect akcipher capability from akcipher
crypto framework. This avoids unsuccessful requests.
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
Message-Id: <20230301105847.253084-7-pizhenwei@bytedance.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
backends/cryptodev-builtin.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c
index c0fbb650d7..c45b5906c5 100644
--- a/backends/cryptodev-builtin.c
+++ b/backends/cryptodev-builtin.c
@@ -59,6 +59,19 @@ struct CryptoDevBackendBuiltin {
CryptoDevBackendBuiltinSession *sessions[MAX_NUM_SESSIONS];
};
+static void cryptodev_builtin_init_akcipher(CryptoDevBackend *backend)
+{
+ QCryptoAkCipherOptions opts;
+
+ opts.alg = QCRYPTO_AKCIPHER_ALG_RSA;
+ opts.u.rsa.padding_alg = QCRYPTO_RSA_PADDING_ALG_RAW;
+ if (qcrypto_akcipher_supports(&opts)) {
+ backend->conf.crypto_services |=
+ (1u << QCRYPTODEV_BACKEND_SERVICE_AKCIPHER);
+ backend->conf.akcipher_algo = 1u << VIRTIO_CRYPTO_AKCIPHER_RSA;
+ }
+}
+
static void cryptodev_builtin_init(
CryptoDevBackend *backend, Error **errp)
{
@@ -81,11 +94,9 @@ static void cryptodev_builtin_init(
backend->conf.crypto_services =
1u << QCRYPTODEV_BACKEND_SERVICE_CIPHER |
1u << QCRYPTODEV_BACKEND_SERVICE_HASH |
- 1u << QCRYPTODEV_BACKEND_SERVICE_MAC |
- 1u << QCRYPTODEV_BACKEND_SERVICE_AKCIPHER;
+ 1u << QCRYPTODEV_BACKEND_SERVICE_MAC;
backend->conf.cipher_algo_l = 1u << VIRTIO_CRYPTO_CIPHER_AES_CBC;
backend->conf.hash_algo = 1u << VIRTIO_CRYPTO_HASH_SHA1;
- backend->conf.akcipher_algo = 1u << VIRTIO_CRYPTO_AKCIPHER_RSA;
/*
* Set the Maximum length of crypto request.
* Why this value? Just avoid to overflow when
@@ -94,6 +105,7 @@ static void cryptodev_builtin_init(
backend->conf.max_size = LONG_MAX - sizeof(CryptoDevBackendOpInfo);
backend->conf.max_cipher_key_len = CRYPTODEV_BUITLIN_MAX_CIPHER_KEY_LEN;
backend->conf.max_auth_key_len = CRYPTODEV_BUITLIN_MAX_AUTH_KEY_LEN;
+ cryptodev_builtin_init_akcipher(backend);
cryptodev_backend_set_ready(backend, true);
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 07/73] hmp: add cryptodev info command
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (5 preceding siblings ...)
2023-03-08 1:11 ` [PULL 06/73] cryptodev-builtin: Detect akcipher capability Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 08/73] cryptodev: Use CryptoDevBackendOpInfo for operation Michael S. Tsirkin
` (66 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, zhenwei pi, Dr . David Alan Gilbert,
Daniel P . Berrangé, Gonglei (Arei)
From: zhenwei pi <pizhenwei@bytedance.com>
Example of this command:
# virsh qemu-monitor-command vm --hmp info cryptodev
cryptodev1: service=[akcipher|mac|hash|cipher]
queue 0: type=builtin
cryptodev0: service=[akcipher]
queue 0: type=lkcf
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
Message-Id: <20230301105847.253084-8-pizhenwei@bytedance.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/monitor/hmp.h | 1 +
backends/cryptodev-hmp-cmds.c | 54 +++++++++++++++++++++++++++++++++++
backends/meson.build | 1 +
hmp-commands-info.hx | 14 +++++++++
4 files changed, 70 insertions(+)
create mode 100644 backends/cryptodev-hmp-cmds.c
diff --git a/include/monitor/hmp.h b/include/monitor/hmp.h
index efae6b06bc..fdb69b7f9c 100644
--- a/include/monitor/hmp.h
+++ b/include/monitor/hmp.h
@@ -180,5 +180,6 @@ void hmp_ioport_read(Monitor *mon, const QDict *qdict);
void hmp_ioport_write(Monitor *mon, const QDict *qdict);
void hmp_boot_set(Monitor *mon, const QDict *qdict);
void hmp_info_mtree(Monitor *mon, const QDict *qdict);
+void hmp_info_cryptodev(Monitor *mon, const QDict *qdict);
#endif
diff --git a/backends/cryptodev-hmp-cmds.c b/backends/cryptodev-hmp-cmds.c
new file mode 100644
index 0000000000..4f7220bb13
--- /dev/null
+++ b/backends/cryptodev-hmp-cmds.c
@@ -0,0 +1,54 @@
+/*
+ * HMP commands related to cryptodev
+ *
+ * Copyright (c) 2023 Bytedance.Inc
+ *
+ * Authors:
+ * zhenwei pi<pizhenwei@bytedance.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or
+ * (at your option) any later version.
+ */
+
+#include "qemu/osdep.h"
+#include "monitor/hmp.h"
+#include "monitor/monitor.h"
+#include "qapi/qapi-commands-cryptodev.h"
+#include "qapi/qmp/qdict.h"
+
+
+void hmp_info_cryptodev(Monitor *mon, const QDict *qdict)
+{
+ QCryptodevInfoList *il;
+ QCryptodevBackendServiceTypeList *sl;
+ QCryptodevBackendClientList *cl;
+
+ for (il = qmp_query_cryptodev(NULL); il; il = il->next) {
+ g_autofree char *services = NULL;
+ QCryptodevInfo *info = il->value;
+ char *tmp_services;
+
+ /* build a string like 'service=[akcipher|mac|hash|cipher]' */
+ for (sl = info->service; sl; sl = sl->next) {
+ const char *service = QCryptodevBackendServiceType_str(sl->value);
+
+ if (!services) {
+ services = g_strdup(service);
+ } else {
+ tmp_services = g_strjoin("|", services, service, NULL);
+ g_free(services);
+ services = tmp_services;
+ }
+ }
+ monitor_printf(mon, "%s: service=[%s]\n", info->id, services);
+
+ for (cl = info->client; cl; cl = cl->next) {
+ QCryptodevBackendClient *client = cl->value;
+ monitor_printf(mon, " queue %" PRIu32 ": type=%s\n",
+ client->queue,
+ QCryptodevBackendType_str(client->type));
+ }
+ }
+
+ qapi_free_QCryptodevInfoList(il);
+}
diff --git a/backends/meson.build b/backends/meson.build
index 954e658b25..b369e0a9d0 100644
--- a/backends/meson.build
+++ b/backends/meson.build
@@ -1,5 +1,6 @@
softmmu_ss.add([files(
'cryptodev-builtin.c',
+ 'cryptodev-hmp-cmds.c',
'cryptodev.c',
'hostmem-ram.c',
'hostmem.c',
diff --git a/hmp-commands-info.hx b/hmp-commands-info.hx
index 754b1e8408..47d63d26db 100644
--- a/hmp-commands-info.hx
+++ b/hmp-commands-info.hx
@@ -993,3 +993,17 @@ SRST
``info virtio-queue-element`` *path* *queue* [*index*]
Display element of a given virtio queue
ERST
+
+ {
+ .name = "cryptodev",
+ .args_type = "",
+ .params = "",
+ .help = "show the crypto devices",
+ .cmd = hmp_info_cryptodev,
+ .flags = "p",
+ },
+
+SRST
+ ``info cryptodev``
+ Show the crypto devices.
+ERST
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 08/73] cryptodev: Use CryptoDevBackendOpInfo for operation
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (6 preceding siblings ...)
2023-03-08 1:11 ` [PULL 07/73] hmp: add cryptodev info command Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 09/73] cryptodev: Account statistics Michael S. Tsirkin
` (65 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, zhenwei pi, Daniel P . Berrangé, Gonglei (Arei)
From: zhenwei pi <pizhenwei@bytedance.com>
Move queue_index, CryptoDevCompletionFunc and opaque into struct
CryptoDevBackendOpInfo, then cryptodev_backend_crypto_operation()
needs an argument CryptoDevBackendOpInfo *op_info only. And remove
VirtIOCryptoReq from cryptodev. It's also possible to hide
VirtIOCryptoReq into virtio-crypto.c in the next step. (In theory,
VirtIOCryptoReq is a private structure used by virtio-crypto only)
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
Message-Id: <20230301105847.253084-9-pizhenwei@bytedance.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/sysemu/cryptodev.h | 26 ++++++++++----------------
backends/cryptodev-builtin.c | 9 +++------
backends/cryptodev-lkcf.c | 9 +++------
backends/cryptodev.c | 18 +++++-------------
hw/virtio/virtio-crypto.c | 7 ++++---
5 files changed, 25 insertions(+), 44 deletions(-)
diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h
index 16f01dd48a..048a627035 100644
--- a/include/sysemu/cryptodev.h
+++ b/include/sysemu/cryptodev.h
@@ -174,9 +174,14 @@ typedef struct CryptoDevBackendAsymOpInfo {
uint8_t *dst;
} CryptoDevBackendAsymOpInfo;
+typedef void (*CryptoDevCompletionFunc) (void *opaque, int ret);
+
typedef struct CryptoDevBackendOpInfo {
QCryptodevBackendAlgType algtype;
uint32_t op_code;
+ uint32_t queue_index;
+ CryptoDevCompletionFunc cb;
+ void *opaque; /* argument for cb */
uint64_t session_id;
union {
CryptoDevBackendSymOpInfo *sym_op_info;
@@ -184,7 +189,6 @@ typedef struct CryptoDevBackendOpInfo {
} u;
} CryptoDevBackendOpInfo;
-typedef void (*CryptoDevCompletionFunc) (void *opaque, int ret);
struct CryptoDevBackendClass {
ObjectClass parent_class;
@@ -204,10 +208,7 @@ struct CryptoDevBackendClass {
void *opaque);
int (*do_op)(CryptoDevBackend *backend,
- CryptoDevBackendOpInfo *op_info,
- uint32_t queue_index,
- CryptoDevCompletionFunc cb,
- void *opaque);
+ CryptoDevBackendOpInfo *op_info);
};
struct CryptoDevBackendClient {
@@ -335,24 +336,17 @@ int cryptodev_backend_close_session(
/**
* cryptodev_backend_crypto_operation:
* @backend: the cryptodev backend object
- * @opaque1: pointer to a VirtIOCryptoReq object
- * @queue_index: queue index of cryptodev backend client
- * @errp: pointer to a NULL-initialized error object
- * @cb: callbacks when operation is completed
- * @opaque2: parameter passed to cb
+ * @op_info: pointer to a CryptoDevBackendOpInfo object
*
- * Do crypto operation, such as encryption and
- * decryption
+ * Do crypto operation, such as encryption, decryption, signature and
+ * verification
*
* Returns: 0 for success and cb will be called when creation is completed,
* negative value for error, and cb will not be called.
*/
int cryptodev_backend_crypto_operation(
CryptoDevBackend *backend,
- void *opaque1,
- uint32_t queue_index,
- CryptoDevCompletionFunc cb,
- void *opaque2);
+ CryptoDevBackendOpInfo *op_info);
/**
* cryptodev_backend_set_used:
diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c
index c45b5906c5..39d0455280 100644
--- a/backends/cryptodev-builtin.c
+++ b/backends/cryptodev-builtin.c
@@ -539,10 +539,7 @@ static int cryptodev_builtin_asym_operation(
static int cryptodev_builtin_operation(
CryptoDevBackend *backend,
- CryptoDevBackendOpInfo *op_info,
- uint32_t queue_index,
- CryptoDevCompletionFunc cb,
- void *opaque)
+ CryptoDevBackendOpInfo *op_info)
{
CryptoDevBackendBuiltin *builtin =
CRYPTODEV_BACKEND_BUILTIN(backend);
@@ -574,8 +571,8 @@ static int cryptodev_builtin_operation(
if (local_error) {
error_report_err(local_error);
}
- if (cb) {
- cb(opaque, status);
+ if (op_info->cb) {
+ op_info->cb(op_info->opaque, status);
}
return 0;
}
diff --git a/backends/cryptodev-lkcf.c b/backends/cryptodev-lkcf.c
index edec99f104..45aba1ff67 100644
--- a/backends/cryptodev-lkcf.c
+++ b/backends/cryptodev-lkcf.c
@@ -469,10 +469,7 @@ static void *cryptodev_lkcf_worker(void *arg)
static int cryptodev_lkcf_operation(
CryptoDevBackend *backend,
- CryptoDevBackendOpInfo *op_info,
- uint32_t queue_index,
- CryptoDevCompletionFunc cb,
- void *opaque)
+ CryptoDevBackendOpInfo *op_info)
{
CryptoDevBackendLKCF *lkcf =
CRYPTODEV_BACKEND_LKCF(backend);
@@ -495,8 +492,8 @@ static int cryptodev_lkcf_operation(
task = g_new0(CryptoDevLKCFTask, 1);
task->op_info = op_info;
- task->cb = cb;
- task->opaque = opaque;
+ task->cb = op_info->cb;
+ task->opaque = op_info->opaque;
task->sess = sess;
task->lkcf = lkcf;
task->status = -VIRTIO_CRYPTO_ERR;
diff --git a/backends/cryptodev.c b/backends/cryptodev.c
index 3a45d19823..ba7b0bc770 100644
--- a/backends/cryptodev.c
+++ b/backends/cryptodev.c
@@ -143,29 +143,22 @@ int cryptodev_backend_close_session(
static int cryptodev_backend_operation(
CryptoDevBackend *backend,
- CryptoDevBackendOpInfo *op_info,
- uint32_t queue_index,
- CryptoDevCompletionFunc cb,
- void *opaque)
+ CryptoDevBackendOpInfo *op_info)
{
CryptoDevBackendClass *bc =
CRYPTODEV_BACKEND_GET_CLASS(backend);
if (bc->do_op) {
- return bc->do_op(backend, op_info, queue_index, cb, opaque);
+ return bc->do_op(backend, op_info);
}
return -VIRTIO_CRYPTO_NOTSUPP;
}
int cryptodev_backend_crypto_operation(
CryptoDevBackend *backend,
- void *opaque1,
- uint32_t queue_index,
- CryptoDevCompletionFunc cb, void *opaque2)
+ CryptoDevBackendOpInfo *op_info)
{
- VirtIOCryptoReq *req = opaque1;
- CryptoDevBackendOpInfo *op_info = &req->op_info;
- QCryptodevBackendAlgType algtype = req->flags;
+ QCryptodevBackendAlgType algtype = op_info->algtype;
if ((algtype != QCRYPTODEV_BACKEND_ALG_SYM)
&& (algtype != QCRYPTODEV_BACKEND_ALG_ASYM)) {
@@ -173,8 +166,7 @@ int cryptodev_backend_crypto_operation(
return -VIRTIO_CRYPTO_NOTSUPP;
}
- return cryptodev_backend_operation(backend, op_info, queue_index,
- cb, opaque2);
+ return cryptodev_backend_operation(backend, op_info);
}
static void
diff --git a/hw/virtio/virtio-crypto.c b/hw/virtio/virtio-crypto.c
index e4f0de4d1c..802e1b9659 100644
--- a/hw/virtio/virtio-crypto.c
+++ b/hw/virtio/virtio-crypto.c
@@ -871,6 +871,9 @@ virtio_crypto_handle_request(VirtIOCryptoReq *request)
opcode = ldl_le_p(&req.header.opcode);
op_info->session_id = ldq_le_p(&req.header.session_id);
op_info->op_code = opcode;
+ op_info->queue_index = queue_index;
+ op_info->cb = virtio_crypto_req_complete;
+ op_info->opaque = request;
switch (opcode) {
case VIRTIO_CRYPTO_CIPHER_ENCRYPT:
@@ -898,9 +901,7 @@ check_result:
virtio_crypto_req_complete(request, -VIRTIO_CRYPTO_NOTSUPP);
} else {
ret = cryptodev_backend_crypto_operation(vcrypto->cryptodev,
- request, queue_index,
- virtio_crypto_req_complete,
- request);
+ op_info);
if (ret < 0) {
virtio_crypto_req_complete(request, ret);
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 09/73] cryptodev: Account statistics
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (7 preceding siblings ...)
2023-03-08 1:11 ` [PULL 08/73] cryptodev: Use CryptoDevBackendOpInfo for operation Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 10/73] cryptodev: support QoS Michael S. Tsirkin
` (64 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, zhenwei pi, Daniel P . Berrangé, Gonglei (Arei)
From: zhenwei pi <pizhenwei@bytedance.com>
Account OPS/BPS for crypto device, this will be used for 'query-stats'
QEMU monitor command and QoS in the next step.
Note that a crypto device may support symmetric mode, asymmetric mode,
both symmetric and asymmetric mode. So we use two structure to
describe the statistics of a crypto device.
Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
Message-Id: <20230301105847.253084-10-pizhenwei@bytedance.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
---
include/sysemu/cryptodev.h | 49 +++++++++++++++++++++++++++
backends/cryptodev.c | 68 +++++++++++++++++++++++++++++++++++---
2 files changed, 112 insertions(+), 5 deletions(-)
diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h
index 048a627035..c0250c4a2c 100644
--- a/include/sysemu/cryptodev.h
+++ b/include/sysemu/cryptodev.h
@@ -246,6 +246,24 @@ struct CryptoDevBackendConf {
uint64_t max_size;
};
+typedef struct CryptodevBackendSymStat {
+ int64_t encrypt_ops;
+ int64_t decrypt_ops;
+ int64_t encrypt_bytes;
+ int64_t decrypt_bytes;
+} CryptodevBackendSymStat;
+
+typedef struct CryptodevBackendAsymStat {
+ int64_t encrypt_ops;
+ int64_t decrypt_ops;
+ int64_t sign_ops;
+ int64_t verify_ops;
+ int64_t encrypt_bytes;
+ int64_t decrypt_bytes;
+ int64_t sign_bytes;
+ int64_t verify_bytes;
+} CryptodevBackendAsymStat;
+
struct CryptoDevBackend {
Object parent_obj;
@@ -253,8 +271,39 @@ struct CryptoDevBackend {
/* Tag the cryptodev backend is used by virtio-crypto or not */
bool is_used;
CryptoDevBackendConf conf;
+ CryptodevBackendSymStat *sym_stat;
+ CryptodevBackendAsymStat *asym_stat;
};
+#define CryptodevSymStatInc(be, op, bytes) do { \
+ be->sym_stat->op##_bytes += (bytes); \
+ be->sym_stat->op##_ops += 1; \
+} while (/*CONSTCOND*/0)
+
+#define CryptodevSymStatIncEncrypt(be, bytes) \
+ CryptodevSymStatInc(be, encrypt, bytes)
+
+#define CryptodevSymStatIncDecrypt(be, bytes) \
+ CryptodevSymStatInc(be, decrypt, bytes)
+
+#define CryptodevAsymStatInc(be, op, bytes) do { \
+ be->asym_stat->op##_bytes += (bytes); \
+ be->asym_stat->op##_ops += 1; \
+} while (/*CONSTCOND*/0)
+
+#define CryptodevAsymStatIncEncrypt(be, bytes) \
+ CryptodevAsymStatInc(be, encrypt, bytes)
+
+#define CryptodevAsymStatIncDecrypt(be, bytes) \
+ CryptodevAsymStatInc(be, decrypt, bytes)
+
+#define CryptodevAsymStatIncSign(be, bytes) \
+ CryptodevAsymStatInc(be, sign, bytes)
+
+#define CryptodevAsymStatIncVerify(be, bytes) \
+ CryptodevAsymStatInc(be, verify, bytes)
+
+
/**
* cryptodev_backend_new_client:
*
diff --git a/backends/cryptodev.c b/backends/cryptodev.c
index ba7b0bc770..5ee7507ca5 100644
--- a/backends/cryptodev.c
+++ b/backends/cryptodev.c
@@ -107,6 +107,9 @@ void cryptodev_backend_cleanup(
if (bc->cleanup) {
bc->cleanup(backend, errp);
}
+
+ g_free(backend->sym_stat);
+ g_free(backend->asym_stat);
}
int cryptodev_backend_create_session(
@@ -154,16 +157,61 @@ static int cryptodev_backend_operation(
return -VIRTIO_CRYPTO_NOTSUPP;
}
+static int cryptodev_backend_account(CryptoDevBackend *backend,
+ CryptoDevBackendOpInfo *op_info)
+{
+ enum QCryptodevBackendAlgType algtype = op_info->algtype;
+ int len;
+
+ if (algtype == QCRYPTODEV_BACKEND_ALG_ASYM) {
+ CryptoDevBackendAsymOpInfo *asym_op_info = op_info->u.asym_op_info;
+ len = asym_op_info->src_len;
+ switch (op_info->op_code) {
+ case VIRTIO_CRYPTO_AKCIPHER_ENCRYPT:
+ CryptodevAsymStatIncEncrypt(backend, len);
+ break;
+ case VIRTIO_CRYPTO_AKCIPHER_DECRYPT:
+ CryptodevAsymStatIncDecrypt(backend, len);
+ break;
+ case VIRTIO_CRYPTO_AKCIPHER_SIGN:
+ CryptodevAsymStatIncSign(backend, len);
+ break;
+ case VIRTIO_CRYPTO_AKCIPHER_VERIFY:
+ CryptodevAsymStatIncVerify(backend, len);
+ break;
+ default:
+ return -VIRTIO_CRYPTO_NOTSUPP;
+ }
+ } else if (algtype == QCRYPTODEV_BACKEND_ALG_SYM) {
+ CryptoDevBackendSymOpInfo *sym_op_info = op_info->u.sym_op_info;
+ len = sym_op_info->src_len;
+ switch (op_info->op_code) {
+ case VIRTIO_CRYPTO_CIPHER_ENCRYPT:
+ CryptodevSymStatIncEncrypt(backend, len);
+ break;
+ case VIRTIO_CRYPTO_CIPHER_DECRYPT:
+ CryptodevSymStatIncDecrypt(backend, len);
+ break;
+ default:
+ return -VIRTIO_CRYPTO_NOTSUPP;
+ }
+ } else {
+ error_report("Unsupported cryptodev alg type: %" PRIu32 "", algtype);
+ return -VIRTIO_CRYPTO_NOTSUPP;
+ }
+
+ return len;
+}
+
int cryptodev_backend_crypto_operation(
CryptoDevBackend *backend,
CryptoDevBackendOpInfo *op_info)
{
- QCryptodevBackendAlgType algtype = op_info->algtype;
+ int ret;
- if ((algtype != QCRYPTODEV_BACKEND_ALG_SYM)
- && (algtype != QCRYPTODEV_BACKEND_ALG_ASYM)) {
- error_report("Unsupported cryptodev alg type: %" PRIu32 "", algtype);
- return -VIRTIO_CRYPTO_NOTSUPP;
+ ret = cryptodev_backend_account(backend, op_info);
+ if (ret < 0) {
+ return ret;
}
return cryptodev_backend_operation(backend, op_info);
@@ -202,10 +250,20 @@ cryptodev_backend_complete(UserCreatable *uc, Error **errp)
{
CryptoDevBackend *backend = CRYPTODEV_BACKEND(uc);
CryptoDevBackendClass *bc = CRYPTODEV_BACKEND_GET_CLASS(uc);
+ uint32_t services;
if (bc->init) {
bc->init(backend, errp);
}
+
+ services = backend->conf.crypto_services;
+ if (services & (1 << QCRYPTODEV_BACKEND_SERVICE_CIPHER)) {
+ backend->sym_stat = g_new0(CryptodevBackendSymStat, 1);
+ }
+
+ if (services & (1 << QCRYPTODEV_BACKEND_SERVICE_AKCIPHER)) {
+ backend->asym_stat = g_new0(CryptodevBackendAsymStat, 1);
+ }
}
void cryptodev_backend_set_used(CryptoDevBackend *backend, bool used)
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 10/73] cryptodev: support QoS
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (8 preceding siblings ...)
2023-03-08 1:11 ` [PULL 09/73] cryptodev: Account statistics Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 11/73] cryptodev: Support query-stats QMP command Michael S. Tsirkin
` (63 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, zhenwei pi, Daniel P . Berrangé,
Gonglei (Arei),
Paolo Bonzini, Eduardo Habkost, Eric Blake, Markus Armbruster
From: zhenwei pi <pizhenwei@bytedance.com>
Add 'throttle-bps' and 'throttle-ops' limitation to set QoS. The
two arguments work with both QEMU command line and QMP command.
Example of QEMU command line:
-object cryptodev-backend-builtin,id=cryptodev1,throttle-bps=1600,\
throttle-ops=100
Example of QMP command:
virsh qemu-monitor-command buster --hmp qom-set /objects/cryptodev1 \
throttle-ops 100
or cancel limitation:
virsh qemu-monitor-command buster --hmp qom-set /objects/cryptodev1 \
throttle-ops 0
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
Message-Id: <20230301105847.253084-11-pizhenwei@bytedance.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
qapi/qom.json | 8 ++-
include/sysemu/cryptodev.h | 7 ++
backends/cryptodev.c | 138 +++++++++++++++++++++++++++++++++++++
3 files changed, 152 insertions(+), 1 deletion(-)
diff --git a/qapi/qom.json b/qapi/qom.json
index 30e76653ad..a877b879b9 100644
--- a/qapi/qom.json
+++ b/qapi/qom.json
@@ -278,10 +278,16 @@
# cryptodev-backend and must be 1 for cryptodev-backend-builtin.
# (default: 1)
#
+# @throttle-bps: limit total bytes per second (Since 8.0)
+#
+# @throttle-ops: limit total operations per second (Since 8.0)
+#
# Since: 2.8
##
{ 'struct': 'CryptodevBackendProperties',
- 'data': { '*queues': 'uint32' } }
+ 'data': { '*queues': 'uint32',
+ '*throttle-bps': 'uint64',
+ '*throttle-ops': 'uint64' } }
##
# @CryptodevVhostUserProperties:
diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h
index c0250c4a2c..bc021ce847 100644
--- a/include/sysemu/cryptodev.h
+++ b/include/sysemu/cryptodev.h
@@ -24,6 +24,7 @@
#define CRYPTODEV_H
#include "qemu/queue.h"
+#include "qemu/throttle.h"
#include "qom/object.h"
#include "qapi/qapi-types-cryptodev.h"
@@ -187,6 +188,7 @@ typedef struct CryptoDevBackendOpInfo {
CryptoDevBackendSymOpInfo *sym_op_info;
CryptoDevBackendAsymOpInfo *asym_op_info;
} u;
+ QTAILQ_ENTRY(CryptoDevBackendOpInfo) next;
} CryptoDevBackendOpInfo;
struct CryptoDevBackendClass {
@@ -273,6 +275,11 @@ struct CryptoDevBackend {
CryptoDevBackendConf conf;
CryptodevBackendSymStat *sym_stat;
CryptodevBackendAsymStat *asym_stat;
+
+ ThrottleState ts;
+ ThrottleTimers tt;
+ ThrottleConfig tc;
+ QTAILQ_HEAD(, CryptoDevBackendOpInfo) opinfos;
};
#define CryptodevSymStatInc(be, op, bytes) do { \
diff --git a/backends/cryptodev.c b/backends/cryptodev.c
index 5ee7507ca5..7c10a2e1cb 100644
--- a/backends/cryptodev.c
+++ b/backends/cryptodev.c
@@ -28,6 +28,7 @@
#include "qapi/visitor.h"
#include "qemu/config-file.h"
#include "qemu/error-report.h"
+#include "qemu/main-loop.h"
#include "qom/object_interfaces.h"
#include "hw/virtio/virtio-crypto.h"
@@ -203,17 +204,53 @@ static int cryptodev_backend_account(CryptoDevBackend *backend,
return len;
}
+static void cryptodev_backend_throttle_timer_cb(void *opaque)
+{
+ CryptoDevBackend *backend = (CryptoDevBackend *)opaque;
+ CryptoDevBackendOpInfo *op_info, *tmpop;
+ int ret;
+
+ QTAILQ_FOREACH_SAFE(op_info, &backend->opinfos, next, tmpop) {
+ QTAILQ_REMOVE(&backend->opinfos, op_info, next);
+ ret = cryptodev_backend_account(backend, op_info);
+ if (ret < 0) {
+ op_info->cb(op_info->opaque, ret);
+ continue;
+ }
+
+ throttle_account(&backend->ts, true, ret);
+ cryptodev_backend_operation(backend, op_info);
+ if (throttle_enabled(&backend->tc) &&
+ throttle_schedule_timer(&backend->ts, &backend->tt, true)) {
+ break;
+ }
+ }
+}
+
int cryptodev_backend_crypto_operation(
CryptoDevBackend *backend,
CryptoDevBackendOpInfo *op_info)
{
int ret;
+ if (!throttle_enabled(&backend->tc)) {
+ goto do_account;
+ }
+
+ if (throttle_schedule_timer(&backend->ts, &backend->tt, true) ||
+ !QTAILQ_EMPTY(&backend->opinfos)) {
+ QTAILQ_INSERT_TAIL(&backend->opinfos, op_info, next);
+ return 0;
+ }
+
+do_account:
ret = cryptodev_backend_account(backend, op_info);
if (ret < 0) {
return ret;
}
+ throttle_account(&backend->ts, true, ret);
+
return cryptodev_backend_operation(backend, op_info);
}
@@ -245,12 +282,98 @@ cryptodev_backend_set_queues(Object *obj, Visitor *v, const char *name,
backend->conf.peers.queues = value;
}
+static void cryptodev_backend_set_throttle(CryptoDevBackend *backend, int field,
+ uint64_t value, Error **errp)
+{
+ uint64_t orig = backend->tc.buckets[field].avg;
+ bool enabled = throttle_enabled(&backend->tc);
+
+ if (orig == value) {
+ return;
+ }
+
+ backend->tc.buckets[field].avg = value;
+ if (!throttle_enabled(&backend->tc)) {
+ throttle_timers_destroy(&backend->tt);
+ cryptodev_backend_throttle_timer_cb(backend); /* drain opinfos */
+ return;
+ }
+
+ if (!throttle_is_valid(&backend->tc, errp)) {
+ backend->tc.buckets[field].avg = orig; /* revert change */
+ return;
+ }
+
+ if (!enabled) {
+ throttle_init(&backend->ts);
+ throttle_timers_init(&backend->tt, qemu_get_aio_context(),
+ QEMU_CLOCK_REALTIME,
+ cryptodev_backend_throttle_timer_cb, /* FIXME */
+ cryptodev_backend_throttle_timer_cb, backend);
+ }
+
+ throttle_config(&backend->ts, QEMU_CLOCK_REALTIME, &backend->tc);
+}
+
+static void cryptodev_backend_get_bps(Object *obj, Visitor *v,
+ const char *name, void *opaque,
+ Error **errp)
+{
+ CryptoDevBackend *backend = CRYPTODEV_BACKEND(obj);
+ uint64_t value = backend->tc.buckets[THROTTLE_BPS_TOTAL].avg;
+
+ visit_type_uint64(v, name, &value, errp);
+}
+
+static void cryptodev_backend_set_bps(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ CryptoDevBackend *backend = CRYPTODEV_BACKEND(obj);
+ uint64_t value;
+
+ if (!visit_type_uint64(v, name, &value, errp)) {
+ return;
+ }
+
+ cryptodev_backend_set_throttle(backend, THROTTLE_BPS_TOTAL, value, errp);
+}
+
+static void cryptodev_backend_get_ops(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ CryptoDevBackend *backend = CRYPTODEV_BACKEND(obj);
+ uint64_t value = backend->tc.buckets[THROTTLE_OPS_TOTAL].avg;
+
+ visit_type_uint64(v, name, &value, errp);
+}
+
+static void cryptodev_backend_set_ops(Object *obj, Visitor *v,
+ const char *name, void *opaque,
+ Error **errp)
+{
+ CryptoDevBackend *backend = CRYPTODEV_BACKEND(obj);
+ uint64_t value;
+
+ if (!visit_type_uint64(v, name, &value, errp)) {
+ return;
+ }
+
+ cryptodev_backend_set_throttle(backend, THROTTLE_OPS_TOTAL, value, errp);
+}
+
static void
cryptodev_backend_complete(UserCreatable *uc, Error **errp)
{
CryptoDevBackend *backend = CRYPTODEV_BACKEND(uc);
CryptoDevBackendClass *bc = CRYPTODEV_BACKEND_GET_CLASS(uc);
uint32_t services;
+ uint64_t value;
+
+ QTAILQ_INIT(&backend->opinfos);
+ value = backend->tc.buckets[THROTTLE_OPS_TOTAL].avg;
+ cryptodev_backend_set_throttle(backend, THROTTLE_OPS_TOTAL, value, errp);
+ value = backend->tc.buckets[THROTTLE_BPS_TOTAL].avg;
+ cryptodev_backend_set_throttle(backend, THROTTLE_BPS_TOTAL, value, errp);
if (bc->init) {
bc->init(backend, errp);
@@ -294,8 +417,12 @@ cryptodev_backend_can_be_deleted(UserCreatable *uc)
static void cryptodev_backend_instance_init(Object *obj)
{
+ CryptoDevBackend *backend = CRYPTODEV_BACKEND(obj);
+
/* Initialize devices' queues property to 1 */
object_property_set_int(obj, "queues", 1, NULL);
+
+ throttle_config_init(&backend->tc);
}
static void cryptodev_backend_finalize(Object *obj)
@@ -303,6 +430,9 @@ static void cryptodev_backend_finalize(Object *obj)
CryptoDevBackend *backend = CRYPTODEV_BACKEND(obj);
cryptodev_backend_cleanup(backend, NULL);
+ if (throttle_enabled(&backend->tc)) {
+ throttle_timers_destroy(&backend->tt);
+ }
}
static void
@@ -318,6 +448,14 @@ cryptodev_backend_class_init(ObjectClass *oc, void *data)
cryptodev_backend_get_queues,
cryptodev_backend_set_queues,
NULL, NULL);
+ object_class_property_add(oc, "throttle-bps", "uint64",
+ cryptodev_backend_get_bps,
+ cryptodev_backend_set_bps,
+ NULL, NULL);
+ object_class_property_add(oc, "throttle-ops", "uint64",
+ cryptodev_backend_get_ops,
+ cryptodev_backend_set_ops,
+ NULL, NULL);
}
static const TypeInfo cryptodev_backend_info = {
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 11/73] cryptodev: Support query-stats QMP command
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (9 preceding siblings ...)
2023-03-08 1:11 ` [PULL 10/73] cryptodev: support QoS Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-05-02 17:03 ` Peter Maydell
2023-03-08 1:11 ` [PULL 12/73] MAINTAINERS: add myself as the maintainer for cryptodev Michael S. Tsirkin
` (62 subsequent siblings)
73 siblings, 1 reply; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, zhenwei pi, Daniel P . Berrangé,
Gonglei (Arei),
Eric Blake, Markus Armbruster
From: zhenwei pi <pizhenwei@bytedance.com>
Now we can use "query-stats" QMP command to query statistics of
crypto devices. (Originally this was designed to show statistics
by '{"execute": "query-cryptodev"}'. Daniel Berrangé suggested that
querying configuration info by "query-cryptodev", and querying
runtime performance info by "query-stats". This makes sense!)
Example:
~# virsh qemu-monitor-command vm '{"execute": "query-stats", \
"arguments": {"target": "cryptodev"} }' | jq
{
"return": [
{
"provider": "cryptodev",
"stats": [
{
"name": "asym-verify-bytes",
"value": 7680
},
...
{
"name": "asym-decrypt-ops",
"value": 32
},
{
"name": "asym-encrypt-ops",
"value": 48
}
],
"qom-path": "/objects/cryptodev0" # support asym only
},
{
"provider": "cryptodev",
"stats": [
{
"name": "asym-verify-bytes",
"value": 0
},
...
{
"name": "sym-decrypt-bytes",
"value": 5376
},
...
],
"qom-path": "/objects/cryptodev1" # support asym/sym
}
],
"id": "libvirt-422"
}
Suggested-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
Message-Id: <20230301105847.253084-12-pizhenwei@bytedance.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
qapi/stats.json | 10 ++-
backends/cryptodev.c | 155 +++++++++++++++++++++++++++++++++++++++++
stats/stats-hmp-cmds.c | 5 ++
stats/stats-qmp-cmds.c | 2 +
4 files changed, 170 insertions(+), 2 deletions(-)
diff --git a/qapi/stats.json b/qapi/stats.json
index 57db5b1c74..1f5d3c59ab 100644
--- a/qapi/stats.json
+++ b/qapi/stats.json
@@ -50,10 +50,14 @@
#
# Enumeration of statistics providers.
#
+# @kvm: since 7.1
+#
+# @cryptodev: since 8.0
+#
# Since: 7.1
##
{ 'enum': 'StatsProvider',
- 'data': [ 'kvm' ] }
+ 'data': [ 'kvm', 'cryptodev' ] }
##
# @StatsTarget:
@@ -65,10 +69,12 @@
#
# @vcpu: statistics that apply to a single virtual CPU.
#
+# @cryptodev: statistics that apply to a crypto device. since 8.0
+#
# Since: 7.1
##
{ 'enum': 'StatsTarget',
- 'data': [ 'vm', 'vcpu' ] }
+ 'data': [ 'vm', 'vcpu', 'cryptodev' ] }
##
# @StatsRequest:
diff --git a/backends/cryptodev.c b/backends/cryptodev.c
index 7c10a2e1cb..94ca393cee 100644
--- a/backends/cryptodev.c
+++ b/backends/cryptodev.c
@@ -23,8 +23,10 @@
#include "qemu/osdep.h"
#include "sysemu/cryptodev.h"
+#include "sysemu/stats.h"
#include "qapi/error.h"
#include "qapi/qapi-commands-cryptodev.h"
+#include "qapi/qapi-types-stats.h"
#include "qapi/visitor.h"
#include "qemu/config-file.h"
#include "qemu/error-report.h"
@@ -32,6 +34,28 @@
#include "qom/object_interfaces.h"
#include "hw/virtio/virtio-crypto.h"
+#define SYM_ENCRYPT_OPS_STR "sym-encrypt-ops"
+#define SYM_DECRYPT_OPS_STR "sym-decrypt-ops"
+#define SYM_ENCRYPT_BYTES_STR "sym-encrypt-bytes"
+#define SYM_DECRYPT_BYTES_STR "sym-decrypt-bytes"
+
+#define ASYM_ENCRYPT_OPS_STR "asym-encrypt-ops"
+#define ASYM_DECRYPT_OPS_STR "asym-decrypt-ops"
+#define ASYM_SIGN_OPS_STR "asym-sign-ops"
+#define ASYM_VERIFY_OPS_STR "asym-verify-ops"
+#define ASYM_ENCRYPT_BYTES_STR "asym-encrypt-bytes"
+#define ASYM_DECRYPT_BYTES_STR "asym-decrypt-bytes"
+#define ASYM_SIGN_BYTES_STR "asym-sign-bytes"
+#define ASYM_VERIFY_BYTES_STR "asym-verify-bytes"
+
+typedef struct StatsArgs {
+ union StatsResultsType {
+ StatsResultList **stats;
+ StatsSchemaList **schema;
+ } result;
+ strList *names;
+ Error **errp;
+} StatsArgs;
static QTAILQ_HEAD(, CryptoDevBackendClient) crypto_clients;
@@ -435,6 +459,134 @@ static void cryptodev_backend_finalize(Object *obj)
}
}
+static StatsList *cryptodev_backend_stats_add(const char *name, int64_t *val,
+ StatsList *stats_list)
+{
+ Stats *stats = g_new0(Stats, 1);
+
+ stats->name = g_strdup(name);
+ stats->value = g_new0(StatsValue, 1);
+ stats->value->type = QTYPE_QNUM;
+ stats->value->u.scalar = *val;
+
+ QAPI_LIST_PREPEND(stats_list, stats);
+ return stats_list;
+}
+
+static int cryptodev_backend_stats_query(Object *obj, void *data)
+{
+ StatsArgs *stats_args = data;
+ StatsResultList **stats_results = stats_args->result.stats;
+ StatsList *stats_list = NULL;
+ StatsResult *entry;
+ CryptoDevBackend *backend;
+ CryptodevBackendSymStat *sym_stat;
+ CryptodevBackendAsymStat *asym_stat;
+
+ if (!object_dynamic_cast(obj, TYPE_CRYPTODEV_BACKEND)) {
+ return 0;
+ }
+
+ backend = CRYPTODEV_BACKEND(obj);
+ sym_stat = backend->sym_stat;
+ if (sym_stat) {
+ stats_list = cryptodev_backend_stats_add(SYM_ENCRYPT_OPS_STR,
+ &sym_stat->encrypt_ops, stats_list);
+ stats_list = cryptodev_backend_stats_add(SYM_DECRYPT_OPS_STR,
+ &sym_stat->decrypt_ops, stats_list);
+ stats_list = cryptodev_backend_stats_add(SYM_ENCRYPT_BYTES_STR,
+ &sym_stat->encrypt_bytes, stats_list);
+ stats_list = cryptodev_backend_stats_add(SYM_DECRYPT_BYTES_STR,
+ &sym_stat->decrypt_bytes, stats_list);
+ }
+
+ asym_stat = backend->asym_stat;
+ if (asym_stat) {
+ stats_list = cryptodev_backend_stats_add(ASYM_ENCRYPT_OPS_STR,
+ &asym_stat->encrypt_ops, stats_list);
+ stats_list = cryptodev_backend_stats_add(ASYM_DECRYPT_OPS_STR,
+ &asym_stat->decrypt_ops, stats_list);
+ stats_list = cryptodev_backend_stats_add(ASYM_SIGN_OPS_STR,
+ &asym_stat->sign_ops, stats_list);
+ stats_list = cryptodev_backend_stats_add(ASYM_VERIFY_OPS_STR,
+ &asym_stat->verify_ops, stats_list);
+ stats_list = cryptodev_backend_stats_add(ASYM_ENCRYPT_BYTES_STR,
+ &asym_stat->encrypt_bytes, stats_list);
+ stats_list = cryptodev_backend_stats_add(ASYM_DECRYPT_BYTES_STR,
+ &asym_stat->decrypt_bytes, stats_list);
+ stats_list = cryptodev_backend_stats_add(ASYM_SIGN_BYTES_STR,
+ &asym_stat->sign_bytes, stats_list);
+ stats_list = cryptodev_backend_stats_add(ASYM_VERIFY_BYTES_STR,
+ &asym_stat->verify_bytes, stats_list);
+ }
+
+ entry = g_new0(StatsResult, 1);
+ entry->provider = STATS_PROVIDER_CRYPTODEV;
+ entry->qom_path = g_strdup(object_get_canonical_path(obj));
+ entry->stats = stats_list;
+ QAPI_LIST_PREPEND(*stats_results, entry);
+
+ return 0;
+}
+
+static void cryptodev_backend_stats_cb(StatsResultList **result,
+ StatsTarget target,
+ strList *names, strList *targets,
+ Error **errp)
+{
+ switch (target) {
+ case STATS_TARGET_CRYPTODEV:
+ {
+ Object *objs = container_get(object_get_root(), "/objects");
+ StatsArgs stats_args;
+ stats_args.result.stats = result;
+ stats_args.names = names;
+ stats_args.errp = errp;
+
+ object_child_foreach(objs, cryptodev_backend_stats_query, &stats_args);
+ break;
+ }
+ default:
+ break;
+ }
+}
+
+static StatsSchemaValueList *cryptodev_backend_schemas_add(const char *name,
+ StatsSchemaValueList *list)
+{
+ StatsSchemaValueList *schema_entry = g_new0(StatsSchemaValueList, 1);
+
+ schema_entry->value = g_new0(StatsSchemaValue, 1);
+ schema_entry->value->type = STATS_TYPE_CUMULATIVE;
+ schema_entry->value->name = g_strdup(name);
+ schema_entry->next = list;
+
+ return schema_entry;
+}
+
+static void cryptodev_backend_schemas_cb(StatsSchemaList **result,
+ Error **errp)
+{
+ StatsSchemaValueList *stats_list = NULL;
+ const char *sym_stats[] = { SYM_ENCRYPT_OPS_STR, SYM_DECRYPT_OPS_STR,
+ SYM_ENCRYPT_BYTES_STR, SYM_DECRYPT_BYTES_STR };
+ const char *asym_stats[] = { ASYM_ENCRYPT_OPS_STR, ASYM_DECRYPT_OPS_STR,
+ ASYM_SIGN_OPS_STR, ASYM_VERIFY_OPS_STR,
+ ASYM_ENCRYPT_BYTES_STR, ASYM_DECRYPT_BYTES_STR,
+ ASYM_SIGN_BYTES_STR, ASYM_VERIFY_BYTES_STR };
+
+ for (int i = 0; i < ARRAY_SIZE(sym_stats); i++) {
+ stats_list = cryptodev_backend_schemas_add(sym_stats[i], stats_list);
+ }
+
+ for (int i = 0; i < ARRAY_SIZE(asym_stats); i++) {
+ stats_list = cryptodev_backend_schemas_add(asym_stats[i], stats_list);
+ }
+
+ add_stats_schema(result, STATS_PROVIDER_CRYPTODEV, STATS_TARGET_CRYPTODEV,
+ stats_list);
+}
+
static void
cryptodev_backend_class_init(ObjectClass *oc, void *data)
{
@@ -456,6 +608,9 @@ cryptodev_backend_class_init(ObjectClass *oc, void *data)
cryptodev_backend_get_ops,
cryptodev_backend_set_ops,
NULL, NULL);
+
+ add_stats_callbacks(STATS_PROVIDER_CRYPTODEV, cryptodev_backend_stats_cb,
+ cryptodev_backend_schemas_cb);
}
static const TypeInfo cryptodev_backend_info = {
diff --git a/stats/stats-hmp-cmds.c b/stats/stats-hmp-cmds.c
index 531e35d128..1f91bf8bd5 100644
--- a/stats/stats-hmp-cmds.c
+++ b/stats/stats-hmp-cmds.c
@@ -155,6 +155,8 @@ static StatsFilter *stats_filter(StatsTarget target, const char *names,
filter->u.vcpu.vcpus = vcpu_list;
break;
}
+ case STATS_TARGET_CRYPTODEV:
+ break;
default:
break;
}
@@ -226,6 +228,9 @@ void hmp_info_stats(Monitor *mon, const QDict *qdict)
int cpu_index = monitor_get_cpu_index(mon);
filter = stats_filter(target, names, cpu_index, provider);
break;
+ case STATS_TARGET_CRYPTODEV:
+ filter = stats_filter(target, names, -1, provider);
+ break;
default:
abort();
}
diff --git a/stats/stats-qmp-cmds.c b/stats/stats-qmp-cmds.c
index bc973747fb..e214b964fd 100644
--- a/stats/stats-qmp-cmds.c
+++ b/stats/stats-qmp-cmds.c
@@ -64,6 +64,8 @@ static bool invoke_stats_cb(StatsCallbacks *entry,
targets = filter->u.vcpu.vcpus;
}
break;
+ case STATS_TARGET_CRYPTODEV:
+ break;
default:
abort();
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PULL 11/73] cryptodev: Support query-stats QMP command
2023-03-08 1:11 ` [PULL 11/73] cryptodev: Support query-stats QMP command Michael S. Tsirkin
@ 2023-05-02 17:03 ` Peter Maydell
2023-05-03 4:19 ` zhenwei pi
0 siblings, 1 reply; 99+ messages in thread
From: Peter Maydell @ 2023-05-02 17:03 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: qemu-devel, zhenwei pi, Daniel P . Berrangé, Gonglei (Arei),
Eric Blake, Markus Armbruster
On Wed, 8 Mar 2023 at 01:11, Michael S. Tsirkin <mst@redhat.com> wrote:
>
> From: zhenwei pi <pizhenwei@bytedance.com>
>
> Now we can use "query-stats" QMP command to query statistics of
> crypto devices. (Originally this was designed to show statistics
> by '{"execute": "query-cryptodev"}'. Daniel Berrangé suggested that
> querying configuration info by "query-cryptodev", and querying
> runtime performance info by "query-stats". This makes sense!)
Hi; Coverity points out (CID 1508074) that this change
introduces a memory leak:
> +static int cryptodev_backend_stats_query(Object *obj, void *data)
> +{
> + entry = g_new0(StatsResult, 1);
> + entry->provider = STATS_PROVIDER_CRYPTODEV;
> + entry->qom_path = g_strdup(object_get_canonical_path(obj));
object_get_canonical_path() already returns allocated memory
that the caller should free with g_free(), so we should not
g_strdup() it (which then leaks that memory).
> + entry->stats = stats_list;
> + QAPI_LIST_PREPEND(*stats_results, entry);
> +
> + return 0;
> +}
Would somebody like to send a patch?
thanks
-- PMM
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: Re: [PULL 11/73] cryptodev: Support query-stats QMP command
2023-05-02 17:03 ` Peter Maydell
@ 2023-05-03 4:19 ` zhenwei pi
0 siblings, 0 replies; 99+ messages in thread
From: zhenwei pi @ 2023-05-03 4:19 UTC (permalink / raw)
To: Peter Maydell
Cc: qemu-devel, Daniel P . Berrangé,
Michael S. Tsirkin, Gonglei (Arei),
Eric Blake, Markus Armbruster
On 5/3/23 01:03, Peter Maydell wrote:
> On Wed, 8 Mar 2023 at 01:11, Michael S. Tsirkin <mst@redhat.com> wrote:
>>
>> From: zhenwei pi <pizhenwei@bytedance.com>
>>
>> Now we can use "query-stats" QMP command to query statistics of
>> crypto devices. (Originally this was designed to show statistics
>> by '{"execute": "query-cryptodev"}'. Daniel Berrangé suggested that
>> querying configuration info by "query-cryptodev", and querying
>> runtime performance info by "query-stats". This makes sense!)
>
> Hi; Coverity points out (CID 1508074) that this change
> introduces a memory leak:
>
>> +static int cryptodev_backend_stats_query(Object *obj, void *data)
>> +{
>
>> + entry = g_new0(StatsResult, 1);
>> + entry->provider = STATS_PROVIDER_CRYPTODEV;
>> + entry->qom_path = g_strdup(object_get_canonical_path(obj));
>
> object_get_canonical_path() already returns allocated memory
> that the caller should free with g_free(), so we should not
> g_strdup() it (which then leaks that memory).
>
>> + entry->stats = stats_list;
>> + QAPI_LIST_PREPEND(*stats_results, entry);
>> +
>> + return 0;
>> +}
>
> Would somebody like to send a patch?
>
> thanks
> -- PMM
Hi,
Thanks for pointing out this, I'll fix this later.
--
zhenwei pi
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PULL 12/73] MAINTAINERS: add myself as the maintainer for cryptodev
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (10 preceding siblings ...)
2023-03-08 1:11 ` [PULL 11/73] cryptodev: Support query-stats QMP command Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 13/73] vdpa net: move iova tree creation from init to start Michael S. Tsirkin
` (61 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, zhenwei pi, Gonglei, Philippe Mathieu-Daudé,
Richard Henderson, Thomas Huth, Alex Bennée
From: zhenwei pi <pizhenwei@bytedance.com>
I developed the akcipher service, QoS setting, QMP/HMP commands and
statistics accounting for crypto device. Making myself as the
maintainer for QEMU's cryptodev.
Cc: Gonglei <arei.gonglei@huawei.com>
Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
Message-Id: <20230301105847.253084-13-pizhenwei@bytedance.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index cbb05de8eb..72ac2ac4b6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2876,6 +2876,7 @@ T: git https://gitlab.com/ehabkost/qemu.git machine-next
Cryptodev Backends
M: Gonglei <arei.gonglei@huawei.com>
+M: zhenwei pi <pizhenwei@bytedance.com>
S: Maintained
F: include/sysemu/cryptodev*.h
F: backends/cryptodev*.c
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 13/73] vdpa net: move iova tree creation from init to start
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (11 preceding siblings ...)
2023-03-08 1:11 ` [PULL 12/73] MAINTAINERS: add myself as the maintainer for cryptodev Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 14/73] vdpa: Remember last call fd set Michael S. Tsirkin
` (60 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Jason Wang, Lei Yang
From: Eugenio Pérez <eperezma@redhat.com>
Only create iova_tree if and when it is needed.
The cleanup keeps being responsible for the last VQ but this change
allows it to merge both cleanup functions.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20230303172445.1089785-2-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
net/vhost-vdpa.c | 113 ++++++++++++++++++++++++++++++++++-------------
1 file changed, 83 insertions(+), 30 deletions(-)
diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
index de5ed8ff22..d195f48776 100644
--- a/net/vhost-vdpa.c
+++ b/net/vhost-vdpa.c
@@ -178,13 +178,9 @@ err_init:
static void vhost_vdpa_cleanup(NetClientState *nc)
{
VhostVDPAState *s = DO_UPCAST(VhostVDPAState, nc, nc);
- struct vhost_dev *dev = &s->vhost_net->dev;
qemu_vfree(s->cvq_cmd_out_buffer);
qemu_vfree(s->status);
- if (dev->vq_index + dev->nvqs == dev->vq_index_end) {
- g_clear_pointer(&s->vhost_vdpa.iova_tree, vhost_iova_tree_delete);
- }
if (s->vhost_net) {
vhost_net_cleanup(s->vhost_net);
g_free(s->vhost_net);
@@ -234,10 +230,64 @@ static ssize_t vhost_vdpa_receive(NetClientState *nc, const uint8_t *buf,
return size;
}
+/** From any vdpa net client, get the netclient of the first queue pair */
+static VhostVDPAState *vhost_vdpa_net_first_nc_vdpa(VhostVDPAState *s)
+{
+ NICState *nic = qemu_get_nic(s->nc.peer);
+ NetClientState *nc0 = qemu_get_peer(nic->ncs, 0);
+
+ return DO_UPCAST(VhostVDPAState, nc, nc0);
+}
+
+static void vhost_vdpa_net_data_start_first(VhostVDPAState *s)
+{
+ struct vhost_vdpa *v = &s->vhost_vdpa;
+
+ if (v->shadow_vqs_enabled) {
+ v->iova_tree = vhost_iova_tree_new(v->iova_range.first,
+ v->iova_range.last);
+ }
+}
+
+static int vhost_vdpa_net_data_start(NetClientState *nc)
+{
+ VhostVDPAState *s = DO_UPCAST(VhostVDPAState, nc, nc);
+ struct vhost_vdpa *v = &s->vhost_vdpa;
+
+ assert(nc->info->type == NET_CLIENT_DRIVER_VHOST_VDPA);
+
+ if (v->index == 0) {
+ vhost_vdpa_net_data_start_first(s);
+ return 0;
+ }
+
+ if (v->shadow_vqs_enabled) {
+ VhostVDPAState *s0 = vhost_vdpa_net_first_nc_vdpa(s);
+ v->iova_tree = s0->vhost_vdpa.iova_tree;
+ }
+
+ return 0;
+}
+
+static void vhost_vdpa_net_client_stop(NetClientState *nc)
+{
+ VhostVDPAState *s = DO_UPCAST(VhostVDPAState, nc, nc);
+ struct vhost_dev *dev;
+
+ assert(nc->info->type == NET_CLIENT_DRIVER_VHOST_VDPA);
+
+ dev = s->vhost_vdpa.dev;
+ if (dev->vq_index + dev->nvqs == dev->vq_index_end) {
+ g_clear_pointer(&s->vhost_vdpa.iova_tree, vhost_iova_tree_delete);
+ }
+}
+
static NetClientInfo net_vhost_vdpa_info = {
.type = NET_CLIENT_DRIVER_VHOST_VDPA,
.size = sizeof(VhostVDPAState),
.receive = vhost_vdpa_receive,
+ .start = vhost_vdpa_net_data_start,
+ .stop = vhost_vdpa_net_client_stop,
.cleanup = vhost_vdpa_cleanup,
.has_vnet_hdr = vhost_vdpa_has_vnet_hdr,
.has_ufo = vhost_vdpa_has_ufo,
@@ -351,7 +401,7 @@ dma_map_err:
static int vhost_vdpa_net_cvq_start(NetClientState *nc)
{
- VhostVDPAState *s;
+ VhostVDPAState *s, *s0;
struct vhost_vdpa *v;
uint64_t backend_features;
int64_t cvq_group;
@@ -415,8 +465,6 @@ static int vhost_vdpa_net_cvq_start(NetClientState *nc)
return r;
}
- v->iova_tree = vhost_iova_tree_new(v->iova_range.first,
- v->iova_range.last);
v->shadow_vqs_enabled = true;
s->vhost_vdpa.address_space_id = VHOST_VDPA_NET_CVQ_ASID;
@@ -425,6 +473,27 @@ out:
return 0;
}
+ s0 = vhost_vdpa_net_first_nc_vdpa(s);
+ if (s0->vhost_vdpa.iova_tree) {
+ /*
+ * SVQ is already configured for all virtqueues. Reuse IOVA tree for
+ * simplicity, whether CVQ shares ASID with guest or not, because:
+ * - Memory listener need access to guest's memory addresses allocated
+ * in the IOVA tree.
+ * - There should be plenty of IOVA address space for both ASID not to
+ * worry about collisions between them. Guest's translations are
+ * still validated with virtio virtqueue_pop so there is no risk for
+ * the guest to access memory that it shouldn't.
+ *
+ * To allocate a iova tree per ASID is doable but it complicates the
+ * code and it is not worth it for the moment.
+ */
+ v->iova_tree = s0->vhost_vdpa.iova_tree;
+ } else {
+ v->iova_tree = vhost_iova_tree_new(v->iova_range.first,
+ v->iova_range.last);
+ }
+
r = vhost_vdpa_cvq_map_buf(&s->vhost_vdpa, s->cvq_cmd_out_buffer,
vhost_vdpa_net_cvq_cmd_page_len(), false);
if (unlikely(r < 0)) {
@@ -449,15 +518,9 @@ static void vhost_vdpa_net_cvq_stop(NetClientState *nc)
if (s->vhost_vdpa.shadow_vqs_enabled) {
vhost_vdpa_cvq_unmap_buf(&s->vhost_vdpa, s->cvq_cmd_out_buffer);
vhost_vdpa_cvq_unmap_buf(&s->vhost_vdpa, s->status);
- if (!s->always_svq) {
- /*
- * If only the CVQ is shadowed we can delete this safely.
- * If all the VQs are shadows this will be needed by the time the
- * device is started again to register SVQ vrings and similar.
- */
- g_clear_pointer(&s->vhost_vdpa.iova_tree, vhost_iova_tree_delete);
- }
}
+
+ vhost_vdpa_net_client_stop(nc);
}
static ssize_t vhost_vdpa_net_cvq_add(VhostVDPAState *s, size_t out_len,
@@ -667,8 +730,7 @@ static NetClientState *net_vhost_vdpa_init(NetClientState *peer,
int nvqs,
bool is_datapath,
bool svq,
- struct vhost_vdpa_iova_range iova_range,
- VhostIOVATree *iova_tree)
+ struct vhost_vdpa_iova_range iova_range)
{
NetClientState *nc = NULL;
VhostVDPAState *s;
@@ -690,7 +752,6 @@ static NetClientState *net_vhost_vdpa_init(NetClientState *peer,
s->vhost_vdpa.shadow_vqs_enabled = svq;
s->vhost_vdpa.iova_range = iova_range;
s->vhost_vdpa.shadow_data = svq;
- s->vhost_vdpa.iova_tree = iova_tree;
if (!is_datapath) {
s->cvq_cmd_out_buffer = qemu_memalign(qemu_real_host_page_size(),
vhost_vdpa_net_cvq_cmd_page_len());
@@ -760,7 +821,6 @@ int net_init_vhost_vdpa(const Netdev *netdev, const char *name,
uint64_t features;
int vdpa_device_fd;
g_autofree NetClientState **ncs = NULL;
- g_autoptr(VhostIOVATree) iova_tree = NULL;
struct vhost_vdpa_iova_range iova_range;
NetClientState *nc;
int queue_pairs, r, i = 0, has_cvq = 0;
@@ -812,12 +872,8 @@ int net_init_vhost_vdpa(const Netdev *netdev, const char *name,
goto err;
}
- if (opts->x_svq) {
- if (!vhost_vdpa_net_valid_svq_features(features, errp)) {
- goto err_svq;
- }
-
- iova_tree = vhost_iova_tree_new(iova_range.first, iova_range.last);
+ if (opts->x_svq && !vhost_vdpa_net_valid_svq_features(features, errp)) {
+ goto err;
}
ncs = g_malloc0(sizeof(*ncs) * queue_pairs);
@@ -825,7 +881,7 @@ int net_init_vhost_vdpa(const Netdev *netdev, const char *name,
for (i = 0; i < queue_pairs; i++) {
ncs[i] = net_vhost_vdpa_init(peer, TYPE_VHOST_VDPA, name,
vdpa_device_fd, i, 2, true, opts->x_svq,
- iova_range, iova_tree);
+ iova_range);
if (!ncs[i])
goto err;
}
@@ -833,13 +889,11 @@ int net_init_vhost_vdpa(const Netdev *netdev, const char *name,
if (has_cvq) {
nc = net_vhost_vdpa_init(peer, TYPE_VHOST_VDPA, name,
vdpa_device_fd, i, 1, false,
- opts->x_svq, iova_range, iova_tree);
+ opts->x_svq, iova_range);
if (!nc)
goto err;
}
- /* iova_tree ownership belongs to last NetClientState */
- g_steal_pointer(&iova_tree);
return 0;
err:
@@ -849,7 +903,6 @@ err:
}
}
-err_svq:
qemu_close(vdpa_device_fd);
return -1;
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 14/73] vdpa: Remember last call fd set
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (12 preceding siblings ...)
2023-03-08 1:11 ` [PULL 13/73] vdpa net: move iova tree creation from init to start Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 15/73] vdpa: Negotiate _F_SUSPEND feature Michael S. Tsirkin
` (59 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Lei Yang
From: Eugenio Pérez <eperezma@redhat.com>
As SVQ can be enabled dynamically at any time, it needs to store call fd
always.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230303172445.1089785-3-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/virtio/vhost-vdpa.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
index df3a1e92ac..108cd63289 100644
--- a/hw/virtio/vhost-vdpa.c
+++ b/hw/virtio/vhost-vdpa.c
@@ -1227,16 +1227,16 @@ static int vhost_vdpa_set_vring_call(struct vhost_dev *dev,
struct vhost_vring_file *file)
{
struct vhost_vdpa *v = dev->opaque;
+ int vdpa_idx = file->index - dev->vq_index;
+ VhostShadowVirtqueue *svq = g_ptr_array_index(v->shadow_vqs, vdpa_idx);
+ /* Remember last call fd because we can switch to SVQ anytime. */
+ vhost_svq_set_svq_call_fd(svq, file->fd);
if (v->shadow_vqs_enabled) {
- int vdpa_idx = file->index - dev->vq_index;
- VhostShadowVirtqueue *svq = g_ptr_array_index(v->shadow_vqs, vdpa_idx);
-
- vhost_svq_set_svq_call_fd(svq, file->fd);
return 0;
- } else {
- return vhost_vdpa_set_vring_dev_call(dev, file);
}
+
+ return vhost_vdpa_set_vring_dev_call(dev, file);
}
static int vhost_vdpa_get_features(struct vhost_dev *dev,
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 15/73] vdpa: Negotiate _F_SUSPEND feature
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (13 preceding siblings ...)
2023-03-08 1:11 ` [PULL 14/73] vdpa: Remember last call fd set Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 16/73] vdpa: rewind at get_base, not set_base Michael S. Tsirkin
` (58 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Jason Wang, Lei Yang
From: Eugenio Pérez <eperezma@redhat.com>
This is needed for qemu to know it can suspend the device to retrieve
its status and enable SVQ with it, so all the process is transparent to
the guest.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20230303172445.1089785-4-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/virtio/vhost-vdpa.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
index 108cd63289..5cfa9d5d27 100644
--- a/hw/virtio/vhost-vdpa.c
+++ b/hw/virtio/vhost-vdpa.c
@@ -659,7 +659,8 @@ static int vhost_vdpa_set_backend_cap(struct vhost_dev *dev)
uint64_t features;
uint64_t f = 0x1ULL << VHOST_BACKEND_F_IOTLB_MSG_V2 |
0x1ULL << VHOST_BACKEND_F_IOTLB_BATCH |
- 0x1ULL << VHOST_BACKEND_F_IOTLB_ASID;
+ 0x1ULL << VHOST_BACKEND_F_IOTLB_ASID |
+ 0x1ULL << VHOST_BACKEND_F_SUSPEND;
int r;
if (vhost_vdpa_call(dev, VHOST_GET_BACKEND_FEATURES, &features)) {
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 16/73] vdpa: rewind at get_base, not set_base
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (14 preceding siblings ...)
2023-03-08 1:11 ` [PULL 15/73] vdpa: Negotiate _F_SUSPEND feature Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 17/73] vdpa: add vhost_vdpa->suspended parameter Michael S. Tsirkin
` (57 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Jason Wang, Lei Yang
From: Eugenio Pérez <eperezma@redhat.com>
At this moment it is only possible to migrate to a vdpa device running
with x-svq=on. As a protective measure, the rewind of the inflight
descriptors was done at the destination. That way if the source sent a
virtqueue with inuse descriptors they are always discarded.
Since this series allows to migrate also to passthrough devices with no
SVQ, the right thing to do is to rewind at the source so the base of
vrings are correct.
Support for inflight descriptors may be added in the future.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20230303172445.1089785-5-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/virtio/vhost-shadow-virtqueue.c | 8 ++++++--
hw/virtio/vhost-vdpa.c | 11 -----------
2 files changed, 6 insertions(+), 13 deletions(-)
diff --git a/hw/virtio/vhost-shadow-virtqueue.c b/hw/virtio/vhost-shadow-virtqueue.c
index 515ccf870d..8361e70d1b 100644
--- a/hw/virtio/vhost-shadow-virtqueue.c
+++ b/hw/virtio/vhost-shadow-virtqueue.c
@@ -694,13 +694,17 @@ void vhost_svq_stop(VhostShadowVirtqueue *svq)
g_autofree VirtQueueElement *elem = NULL;
elem = g_steal_pointer(&svq->desc_state[i].elem);
if (elem) {
- virtqueue_detach_element(svq->vq, elem, 0);
+ /*
+ * TODO: This is ok for networking, but other kinds of devices
+ * might have problems with just unpop these.
+ */
+ virtqueue_unpop(svq->vq, elem, 0);
}
}
next_avail_elem = g_steal_pointer(&svq->next_guest_avail_elem);
if (next_avail_elem) {
- virtqueue_detach_element(svq->vq, next_avail_elem, 0);
+ virtqueue_unpop(svq->vq, next_avail_elem, 0);
}
svq->vq = NULL;
g_free(svq->desc_next);
diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
index 5cfa9d5d27..1550b1e26a 100644
--- a/hw/virtio/vhost-vdpa.c
+++ b/hw/virtio/vhost-vdpa.c
@@ -1170,18 +1170,7 @@ static int vhost_vdpa_set_vring_base(struct vhost_dev *dev,
struct vhost_vring_state *ring)
{
struct vhost_vdpa *v = dev->opaque;
- VirtQueue *vq = virtio_get_queue(dev->vdev, ring->index);
- /*
- * vhost-vdpa devices does not support in-flight requests. Set all of them
- * as available.
- *
- * TODO: This is ok for networking, but other kinds of devices might
- * have problems with these retransmissions.
- */
- while (virtqueue_rewind(vq, 1)) {
- continue;
- }
if (v->shadow_vqs_enabled) {
/*
* Device vring base was set at device start. SVQ base is handled by
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 17/73] vdpa: add vhost_vdpa->suspended parameter
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (15 preceding siblings ...)
2023-03-08 1:11 ` [PULL 16/73] vdpa: rewind at get_base, not set_base Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 18/73] vdpa: add vhost_vdpa_suspend Michael S. Tsirkin
` (56 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Lei Yang
From: Eugenio Pérez <eperezma@redhat.com>
This allows vhost_vdpa to track if it is safe to get the vring base from
the device or not. If it is not, vhost can fall back to fetch idx from
the guest buffer again.
No functional change intended in this patch, later patches will use this
field.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230303172445.1089785-6-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/virtio/vhost-vdpa.h | 2 ++
hw/virtio/vhost-vdpa.c | 8 ++++++++
2 files changed, 10 insertions(+)
diff --git a/include/hw/virtio/vhost-vdpa.h b/include/hw/virtio/vhost-vdpa.h
index 7997f09a8d..4a7d396674 100644
--- a/include/hw/virtio/vhost-vdpa.h
+++ b/include/hw/virtio/vhost-vdpa.h
@@ -42,6 +42,8 @@ typedef struct vhost_vdpa {
bool shadow_vqs_enabled;
/* Vdpa must send shadow addresses as IOTLB key for data queues, not GPA */
bool shadow_data;
+ /* Device suspended successfully */
+ bool suspended;
/* IOVA mapping used by the Shadow Virtqueue */
VhostIOVATree *iova_tree;
GPtrArray *shadow_vqs;
diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
index 1550b1e26a..517e3cdc8d 100644
--- a/hw/virtio/vhost-vdpa.c
+++ b/hw/virtio/vhost-vdpa.c
@@ -1193,6 +1193,14 @@ static int vhost_vdpa_get_vring_base(struct vhost_dev *dev,
return 0;
}
+ if (!v->suspended) {
+ /*
+ * Cannot trust in value returned by device, let vhost recover used
+ * idx from guest.
+ */
+ return -1;
+ }
+
ret = vhost_vdpa_call(dev, VHOST_GET_VRING_BASE, ring);
trace_vhost_vdpa_get_vring_base(dev, ring->index, ring->num);
return ret;
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 18/73] vdpa: add vhost_vdpa_suspend
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (16 preceding siblings ...)
2023-03-08 1:11 ` [PULL 17/73] vdpa: add vhost_vdpa->suspended parameter Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 19/73] vdpa: move vhost reset after get vring base Michael S. Tsirkin
` (55 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Lei Yang
From: Eugenio Pérez <eperezma@redhat.com>
The function vhost.c:vhost_dev_stop fetches the vring base so the vq
state can be migrated to other devices. However, this is unreliable in
vdpa, since we didn't signal the device to suspend the queues, making
the value fetched useless.
Suspend the device if possible before fetching first and subsequent
vring bases.
Moreover, vdpa totally reset and wipes the device at the last device
before fetch its vrings base, making that operation useless in the last
device. This will be fixed in later patches of this series.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230303172445.1089785-7-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/virtio/vhost-vdpa.c | 26 ++++++++++++++++++++++++++
hw/virtio/trace-events | 1 +
2 files changed, 27 insertions(+)
diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
index 517e3cdc8d..aecc01c6a7 100644
--- a/hw/virtio/vhost-vdpa.c
+++ b/hw/virtio/vhost-vdpa.c
@@ -692,11 +692,13 @@ static int vhost_vdpa_get_device_id(struct vhost_dev *dev,
static int vhost_vdpa_reset_device(struct vhost_dev *dev)
{
+ struct vhost_vdpa *v = dev->opaque;
int ret;
uint8_t status = 0;
ret = vhost_vdpa_call(dev, VHOST_VDPA_SET_STATUS, &status);
trace_vhost_vdpa_reset_device(dev, status);
+ v->suspended = false;
return ret;
}
@@ -1095,6 +1097,29 @@ static void vhost_vdpa_svqs_stop(struct vhost_dev *dev)
}
}
+static void vhost_vdpa_suspend(struct vhost_dev *dev)
+{
+ struct vhost_vdpa *v = dev->opaque;
+ int r;
+
+ if (!vhost_vdpa_first_dev(dev)) {
+ return;
+ }
+
+ if (dev->backend_cap & BIT_ULL(VHOST_BACKEND_F_SUSPEND)) {
+ trace_vhost_vdpa_suspend(dev);
+ r = ioctl(v->device_fd, VHOST_VDPA_SUSPEND);
+ if (unlikely(r)) {
+ error_report("Cannot suspend: %s(%d)", g_strerror(errno), errno);
+ } else {
+ v->suspended = true;
+ return;
+ }
+ }
+
+ vhost_vdpa_reset_device(dev);
+}
+
static int vhost_vdpa_dev_start(struct vhost_dev *dev, bool started)
{
struct vhost_vdpa *v = dev->opaque;
@@ -1109,6 +1134,7 @@ static int vhost_vdpa_dev_start(struct vhost_dev *dev, bool started)
}
vhost_vdpa_set_vring_ready(dev);
} else {
+ vhost_vdpa_suspend(dev);
vhost_vdpa_svqs_stop(dev);
vhost_vdpa_host_notifiers_uninit(dev, dev->nvqs);
}
diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
index a87c5f39a2..8f8d05cf9b 100644
--- a/hw/virtio/trace-events
+++ b/hw/virtio/trace-events
@@ -50,6 +50,7 @@ vhost_vdpa_set_vring_ready(void *dev) "dev: %p"
vhost_vdpa_dump_config(void *dev, const char *line) "dev: %p %s"
vhost_vdpa_set_config(void *dev, uint32_t offset, uint32_t size, uint32_t flags) "dev: %p offset: %"PRIu32" size: %"PRIu32" flags: 0x%"PRIx32
vhost_vdpa_get_config(void *dev, void *config, uint32_t config_len) "dev: %p config: %p config_len: %"PRIu32
+vhost_vdpa_suspend(void *dev) "dev: %p"
vhost_vdpa_dev_start(void *dev, bool started) "dev: %p started: %d"
vhost_vdpa_set_log_base(void *dev, uint64_t base, unsigned long long size, int refcnt, int fd, void *log) "dev: %p base: 0x%"PRIx64" size: %llu refcnt: %d fd: %d log: %p"
vhost_vdpa_set_vring_addr(void *dev, unsigned int index, unsigned int flags, uint64_t desc_user_addr, uint64_t used_user_addr, uint64_t avail_user_addr, uint64_t log_guest_addr) "dev: %p index: %u flags: 0x%x desc_user_addr: 0x%"PRIx64" used_user_addr: 0x%"PRIx64" avail_user_addr: 0x%"PRIx64" log_guest_addr: 0x%"PRIx64
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 19/73] vdpa: move vhost reset after get vring base
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (17 preceding siblings ...)
2023-03-08 1:11 ` [PULL 18/73] vdpa: add vhost_vdpa_suspend Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 20/73] vdpa: add vdpa net migration state notifier Michael S. Tsirkin
` (54 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Lei Yang
From: Eugenio Pérez <eperezma@redhat.com>
The function vhost.c:vhost_dev_stop calls vhost operation
vhost_dev_start(false). In the case of vdpa it totally reset and wipes
the device, making the fetching of the vring base (virtqueue state) totally
useless.
The kernel backend does not use vhost_dev_start vhost op callback, but
vhost-user do. A patch to make vhost_user_dev_start more similar to vdpa
is desirable, but it can be added on top.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230303172445.1089785-8-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/virtio/vhost-backend.h | 4 ++++
hw/virtio/vhost-vdpa.c | 24 +++++++++++++++++-------
hw/virtio/vhost.c | 3 +++
3 files changed, 24 insertions(+), 7 deletions(-)
diff --git a/include/hw/virtio/vhost-backend.h b/include/hw/virtio/vhost-backend.h
index c5ab49051e..ec3fbae58d 100644
--- a/include/hw/virtio/vhost-backend.h
+++ b/include/hw/virtio/vhost-backend.h
@@ -130,6 +130,9 @@ typedef bool (*vhost_force_iommu_op)(struct vhost_dev *dev);
typedef int (*vhost_set_config_call_op)(struct vhost_dev *dev,
int fd);
+
+typedef void (*vhost_reset_status_op)(struct vhost_dev *dev);
+
typedef struct VhostOps {
VhostBackendType backend_type;
vhost_backend_init vhost_backend_init;
@@ -177,6 +180,7 @@ typedef struct VhostOps {
vhost_get_device_id_op vhost_get_device_id;
vhost_force_iommu_op vhost_force_iommu;
vhost_set_config_call_op vhost_set_config_call;
+ vhost_reset_status_op vhost_reset_status;
} VhostOps;
int vhost_backend_update_device_iotlb(struct vhost_dev *dev,
diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
index aecc01c6a7..c9a82ce5e0 100644
--- a/hw/virtio/vhost-vdpa.c
+++ b/hw/virtio/vhost-vdpa.c
@@ -1146,14 +1146,23 @@ static int vhost_vdpa_dev_start(struct vhost_dev *dev, bool started)
if (started) {
memory_listener_register(&v->listener, &address_space_memory);
return vhost_vdpa_add_status(dev, VIRTIO_CONFIG_S_DRIVER_OK);
- } else {
- vhost_vdpa_reset_device(dev);
- vhost_vdpa_add_status(dev, VIRTIO_CONFIG_S_ACKNOWLEDGE |
- VIRTIO_CONFIG_S_DRIVER);
- memory_listener_unregister(&v->listener);
-
- return 0;
}
+
+ return 0;
+}
+
+static void vhost_vdpa_reset_status(struct vhost_dev *dev)
+{
+ struct vhost_vdpa *v = dev->opaque;
+
+ if (dev->vq_index + dev->nvqs != dev->vq_index_end) {
+ return;
+ }
+
+ vhost_vdpa_reset_device(dev);
+ vhost_vdpa_add_status(dev, VIRTIO_CONFIG_S_ACKNOWLEDGE |
+ VIRTIO_CONFIG_S_DRIVER);
+ memory_listener_unregister(&v->listener);
}
static int vhost_vdpa_set_log_base(struct vhost_dev *dev, uint64_t base,
@@ -1337,4 +1346,5 @@ const VhostOps vdpa_ops = {
.vhost_vq_get_addr = vhost_vdpa_vq_get_addr,
.vhost_force_iommu = vhost_vdpa_force_iommu,
.vhost_set_config_call = vhost_vdpa_set_config_call,
+ .vhost_reset_status = vhost_vdpa_reset_status,
};
diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c
index eb8c4c378c..a266396576 100644
--- a/hw/virtio/vhost.c
+++ b/hw/virtio/vhost.c
@@ -2049,6 +2049,9 @@ void vhost_dev_stop(struct vhost_dev *hdev, VirtIODevice *vdev, bool vrings)
hdev->vqs + i,
hdev->vq_index + i);
}
+ if (hdev->vhost_ops->vhost_reset_status) {
+ hdev->vhost_ops->vhost_reset_status(hdev);
+ }
if (vhost_dev_has_iommu(hdev)) {
if (hdev->vhost_ops->vhost_set_iotlb_callback) {
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 20/73] vdpa: add vdpa net migration state notifier
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (18 preceding siblings ...)
2023-03-08 1:11 ` [PULL 19/73] vdpa: move vhost reset after get vring base Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 21/73] vdpa: disable RAM block discard only for the first device Michael S. Tsirkin
` (53 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Lei Yang, Jason Wang
From: Eugenio Pérez <eperezma@redhat.com>
This allows net to restart the device backend to configure SVQ on it.
Ideally, these changes should not be net specific and they could be done
in:
* vhost_vdpa_set_features (with VHOST_F_LOG_ALL)
* vhost_vdpa_set_vring_addr (with .enable_log)
* vhost_vdpa_set_log_base.
However, the vdpa net backend is the one with enough knowledge to
configure everything because of some reasons:
* Queues might need to be shadowed or not depending on its kind (control
vs data).
* Queues need to share the same map translations (iova tree).
Also, there are other problems that may have solutions but complicates
the implementation at this stage:
* We're basically duplicating vhost_dev_start and vhost_dev_stop, and
they could go out of sync. If we want to reuse them, we need a way to
skip some function calls to avoid recursiveness (either vhost_ops ->
vhost_set_features, vhost_set_vring_addr, ...).
* We need to traverse all vhost_dev of a given net device twice: one to
stop and get the vq state and another one after the reset to
configure properties like address, fd, etc.
Because of that it is cleaner to restart the whole net backend and
configure again as expected, similar to how vhost-kernel moves between
userspace and passthrough.
If more kinds of devices need dynamic switching to SVQ we can:
* Create a callback struct like VhostOps and move most of the code
there. VhostOps cannot be reused since all vdpa backend share them,
and to personalize just for networking would be too heavy.
* Add a parent struct or link all the vhost_vdpa or vhost_dev structs so
we can traverse them.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230303172445.1089785-9-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
net/vhost-vdpa.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 69 insertions(+), 3 deletions(-)
diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
index d195f48776..167b43679d 100644
--- a/net/vhost-vdpa.c
+++ b/net/vhost-vdpa.c
@@ -26,12 +26,15 @@
#include <err.h>
#include "standard-headers/linux/virtio_net.h"
#include "monitor/monitor.h"
+#include "migration/migration.h"
+#include "migration/misc.h"
#include "hw/virtio/vhost.h"
/* Todo:need to add the multiqueue support here */
typedef struct VhostVDPAState {
NetClientState nc;
struct vhost_vdpa vhost_vdpa;
+ Notifier migration_state;
VHostNetState *vhost_net;
/* Control commands shadow buffers */
@@ -239,10 +242,59 @@ static VhostVDPAState *vhost_vdpa_net_first_nc_vdpa(VhostVDPAState *s)
return DO_UPCAST(VhostVDPAState, nc, nc0);
}
+static void vhost_vdpa_net_log_global_enable(VhostVDPAState *s, bool enable)
+{
+ struct vhost_vdpa *v = &s->vhost_vdpa;
+ VirtIONet *n;
+ VirtIODevice *vdev;
+ int data_queue_pairs, cvq, r;
+
+ /* We are only called on the first data vqs and only if x-svq is not set */
+ if (s->vhost_vdpa.shadow_vqs_enabled == enable) {
+ return;
+ }
+
+ vdev = v->dev->vdev;
+ n = VIRTIO_NET(vdev);
+ if (!n->vhost_started) {
+ return;
+ }
+
+ data_queue_pairs = n->multiqueue ? n->max_queue_pairs : 1;
+ cvq = virtio_vdev_has_feature(vdev, VIRTIO_NET_F_CTRL_VQ) ?
+ n->max_ncs - n->max_queue_pairs : 0;
+ /*
+ * TODO: vhost_net_stop does suspend, get_base and reset. We can be smarter
+ * in the future and resume the device if read-only operations between
+ * suspend and reset goes wrong.
+ */
+ vhost_net_stop(vdev, n->nic->ncs, data_queue_pairs, cvq);
+
+ /* Start will check migration setup_or_active to configure or not SVQ */
+ r = vhost_net_start(vdev, n->nic->ncs, data_queue_pairs, cvq);
+ if (unlikely(r < 0)) {
+ error_report("unable to start vhost net: %s(%d)", g_strerror(-r), -r);
+ }
+}
+
+static void vdpa_net_migration_state_notifier(Notifier *notifier, void *data)
+{
+ MigrationState *migration = data;
+ VhostVDPAState *s = container_of(notifier, VhostVDPAState,
+ migration_state);
+
+ if (migration_in_setup(migration)) {
+ vhost_vdpa_net_log_global_enable(s, true);
+ } else if (migration_has_failed(migration)) {
+ vhost_vdpa_net_log_global_enable(s, false);
+ }
+}
+
static void vhost_vdpa_net_data_start_first(VhostVDPAState *s)
{
struct vhost_vdpa *v = &s->vhost_vdpa;
+ add_migration_state_change_notifier(&s->migration_state);
if (v->shadow_vqs_enabled) {
v->iova_tree = vhost_iova_tree_new(v->iova_range.first,
v->iova_range.last);
@@ -256,6 +308,15 @@ static int vhost_vdpa_net_data_start(NetClientState *nc)
assert(nc->info->type == NET_CLIENT_DRIVER_VHOST_VDPA);
+ if (s->always_svq ||
+ migration_is_setup_or_active(migrate_get_current()->state)) {
+ v->shadow_vqs_enabled = true;
+ v->shadow_data = true;
+ } else {
+ v->shadow_vqs_enabled = false;
+ v->shadow_data = false;
+ }
+
if (v->index == 0) {
vhost_vdpa_net_data_start_first(s);
return 0;
@@ -276,6 +337,10 @@ static void vhost_vdpa_net_client_stop(NetClientState *nc)
assert(nc->info->type == NET_CLIENT_DRIVER_VHOST_VDPA);
+ if (s->vhost_vdpa.index == 0) {
+ remove_migration_state_change_notifier(&s->migration_state);
+ }
+
dev = s->vhost_vdpa.dev;
if (dev->vq_index + dev->nvqs == dev->vq_index_end) {
g_clear_pointer(&s->vhost_vdpa.iova_tree, vhost_iova_tree_delete);
@@ -412,11 +477,12 @@ static int vhost_vdpa_net_cvq_start(NetClientState *nc)
s = DO_UPCAST(VhostVDPAState, nc, nc);
v = &s->vhost_vdpa;
- v->shadow_data = s->always_svq;
+ s0 = vhost_vdpa_net_first_nc_vdpa(s);
+ v->shadow_data = s0->vhost_vdpa.shadow_vqs_enabled;
v->shadow_vqs_enabled = s->always_svq;
s->vhost_vdpa.address_space_id = VHOST_VDPA_GUEST_PA_ASID;
- if (s->always_svq) {
+ if (s->vhost_vdpa.shadow_data) {
/* SVQ is already configured for all virtqueues */
goto out;
}
@@ -473,7 +539,6 @@ out:
return 0;
}
- s0 = vhost_vdpa_net_first_nc_vdpa(s);
if (s0->vhost_vdpa.iova_tree) {
/*
* SVQ is already configured for all virtqueues. Reuse IOVA tree for
@@ -749,6 +814,7 @@ static NetClientState *net_vhost_vdpa_init(NetClientState *peer,
s->vhost_vdpa.device_fd = vdpa_device_fd;
s->vhost_vdpa.index = queue_pair_index;
s->always_svq = svq;
+ s->migration_state.notify = vdpa_net_migration_state_notifier;
s->vhost_vdpa.shadow_vqs_enabled = svq;
s->vhost_vdpa.iova_range = iova_range;
s->vhost_vdpa.shadow_data = svq;
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 21/73] vdpa: disable RAM block discard only for the first device
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (19 preceding siblings ...)
2023-03-08 1:11 ` [PULL 20/73] vdpa: add vdpa net migration state notifier Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 22/73] vdpa net: block migration if the device has CVQ Michael S. Tsirkin
` (52 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Lei Yang
From: Eugenio Pérez <eperezma@redhat.com>
Although it does not make a big difference, its more correct and
simplifies the cleanup path in subsequent patches.
Move ram_block_discard_disable(false) call to the top of
vhost_vdpa_cleanup because:
* We cannot use vhost_vdpa_first_dev after dev->opaque = NULL
assignment.
* Improve the stack order in cleanup: since it is the last action taken
in init, it should be the first at cleanup.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230303172445.1089785-10-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/virtio/vhost-vdpa.c | 25 ++++++++++++++-----------
1 file changed, 14 insertions(+), 11 deletions(-)
diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
index c9a82ce5e0..49afa59261 100644
--- a/hw/virtio/vhost-vdpa.c
+++ b/hw/virtio/vhost-vdpa.c
@@ -431,16 +431,6 @@ static int vhost_vdpa_init(struct vhost_dev *dev, void *opaque, Error **errp)
trace_vhost_vdpa_init(dev, opaque);
int ret;
- /*
- * Similar to VFIO, we end up pinning all guest memory and have to
- * disable discarding of RAM.
- */
- ret = ram_block_discard_disable(true);
- if (ret) {
- error_report("Cannot set discarding of RAM broken");
- return ret;
- }
-
v = opaque;
v->dev = dev;
dev->opaque = opaque ;
@@ -452,6 +442,16 @@ static int vhost_vdpa_init(struct vhost_dev *dev, void *opaque, Error **errp)
return 0;
}
+ /*
+ * Similar to VFIO, we end up pinning all guest memory and have to
+ * disable discarding of RAM.
+ */
+ ret = ram_block_discard_disable(true);
+ if (ret) {
+ error_report("Cannot set discarding of RAM broken");
+ return ret;
+ }
+
vhost_vdpa_add_status(dev, VIRTIO_CONFIG_S_ACKNOWLEDGE |
VIRTIO_CONFIG_S_DRIVER);
@@ -577,12 +577,15 @@ static int vhost_vdpa_cleanup(struct vhost_dev *dev)
assert(dev->vhost_ops->backend_type == VHOST_BACKEND_TYPE_VDPA);
v = dev->opaque;
trace_vhost_vdpa_cleanup(dev, v);
+ if (vhost_vdpa_first_dev(dev)) {
+ ram_block_discard_disable(false);
+ }
+
vhost_vdpa_host_notifiers_uninit(dev, dev->nvqs);
memory_listener_unregister(&v->listener);
vhost_vdpa_svq_cleanup(dev);
dev->opaque = NULL;
- ram_block_discard_disable(false);
return 0;
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 22/73] vdpa net: block migration if the device has CVQ
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (20 preceding siblings ...)
2023-03-08 1:11 ` [PULL 21/73] vdpa: disable RAM block discard only for the first device Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:11 ` [PULL 23/73] vdpa: block migration if device has unsupported features Michael S. Tsirkin
` (51 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Lei Yang, Jason Wang
From: Eugenio Pérez <eperezma@redhat.com>
Devices with CVQ need to migrate state beyond vq state. Leaving this to
future series.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230303172445.1089785-11-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/virtio/vhost-vdpa.h | 1 +
hw/virtio/vhost-vdpa.c | 1 +
net/vhost-vdpa.c | 9 +++++++++
3 files changed, 11 insertions(+)
diff --git a/include/hw/virtio/vhost-vdpa.h b/include/hw/virtio/vhost-vdpa.h
index 4a7d396674..c278a2a8de 100644
--- a/include/hw/virtio/vhost-vdpa.h
+++ b/include/hw/virtio/vhost-vdpa.h
@@ -50,6 +50,7 @@ typedef struct vhost_vdpa {
const VhostShadowVirtqueueOps *shadow_vq_ops;
void *shadow_vq_ops_opaque;
struct vhost_dev *dev;
+ Error *migration_blocker;
VhostVDPAHostNotifier notifier[VIRTIO_QUEUE_MAX];
} VhostVDPA;
diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
index 49afa59261..e9167977d5 100644
--- a/hw/virtio/vhost-vdpa.c
+++ b/hw/virtio/vhost-vdpa.c
@@ -438,6 +438,7 @@ static int vhost_vdpa_init(struct vhost_dev *dev, void *opaque, Error **errp)
v->msg_type = VHOST_IOTLB_MSG_V2;
vhost_vdpa_init_svq(dev, v);
+ error_propagate(&dev->migration_blocker, v->migration_blocker);
if (!vhost_vdpa_first_dev(dev)) {
return 0;
}
diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
index 167b43679d..533ba54317 100644
--- a/net/vhost-vdpa.c
+++ b/net/vhost-vdpa.c
@@ -828,6 +828,15 @@ static NetClientState *net_vhost_vdpa_init(NetClientState *peer,
s->vhost_vdpa.shadow_vq_ops = &vhost_vdpa_net_svq_ops;
s->vhost_vdpa.shadow_vq_ops_opaque = s;
+
+ /*
+ * TODO: We cannot migrate devices with CVQ as there is no way to set
+ * the device state (MAC, MQ, etc) before starting the datapath.
+ *
+ * Migration blocker ownership now belongs to s->vhost_vdpa.
+ */
+ error_setg(&s->vhost_vdpa.migration_blocker,
+ "net vdpa cannot migrate with CVQ feature");
}
ret = vhost_vdpa_add(nc, (void *)&s->vhost_vdpa, queue_pair_index, nvqs);
if (ret) {
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 23/73] vdpa: block migration if device has unsupported features
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (21 preceding siblings ...)
2023-03-08 1:11 ` [PULL 22/73] vdpa net: block migration if the device has CVQ Michael S. Tsirkin
@ 2023-03-08 1:11 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 24/73] vdpa: block migration if SVQ does not admit a feature Michael S. Tsirkin
` (50 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:11 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Lei Yang, Jason Wang
From: Eugenio Pérez <eperezma@redhat.com>
A vdpa net device must initialize with SVQ in order to be migratable at
this moment, and initialization code verifies some conditions. If the
device is not initialized with the x-svq parameter, it will not expose
_F_LOG so the vhost subsystem will block VM migration from its
initialization.
Next patches change this, so we need to verify migration conditions
differently.
QEMU only supports a subset of net features in SVQ, and it cannot
migrate state that cannot track or restore in the destination. Add a
migration blocker if the device offers an unsupported feature.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230303172445.1089785-12-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
net/vhost-vdpa.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
index 533ba54317..1089c35959 100644
--- a/net/vhost-vdpa.c
+++ b/net/vhost-vdpa.c
@@ -795,7 +795,8 @@ static NetClientState *net_vhost_vdpa_init(NetClientState *peer,
int nvqs,
bool is_datapath,
bool svq,
- struct vhost_vdpa_iova_range iova_range)
+ struct vhost_vdpa_iova_range iova_range,
+ uint64_t features)
{
NetClientState *nc = NULL;
VhostVDPAState *s;
@@ -818,7 +819,10 @@ static NetClientState *net_vhost_vdpa_init(NetClientState *peer,
s->vhost_vdpa.shadow_vqs_enabled = svq;
s->vhost_vdpa.iova_range = iova_range;
s->vhost_vdpa.shadow_data = svq;
- if (!is_datapath) {
+ if (queue_pair_index == 0) {
+ vhost_vdpa_net_valid_svq_features(features,
+ &s->vhost_vdpa.migration_blocker);
+ } else if (!is_datapath) {
s->cvq_cmd_out_buffer = qemu_memalign(qemu_real_host_page_size(),
vhost_vdpa_net_cvq_cmd_page_len());
memset(s->cvq_cmd_out_buffer, 0, vhost_vdpa_net_cvq_cmd_page_len());
@@ -956,7 +960,7 @@ int net_init_vhost_vdpa(const Netdev *netdev, const char *name,
for (i = 0; i < queue_pairs; i++) {
ncs[i] = net_vhost_vdpa_init(peer, TYPE_VHOST_VDPA, name,
vdpa_device_fd, i, 2, true, opts->x_svq,
- iova_range);
+ iova_range, features);
if (!ncs[i])
goto err;
}
@@ -964,7 +968,7 @@ int net_init_vhost_vdpa(const Netdev *netdev, const char *name,
if (has_cvq) {
nc = net_vhost_vdpa_init(peer, TYPE_VHOST_VDPA, name,
vdpa_device_fd, i, 1, false,
- opts->x_svq, iova_range);
+ opts->x_svq, iova_range, features);
if (!nc)
goto err;
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 24/73] vdpa: block migration if SVQ does not admit a feature
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (22 preceding siblings ...)
2023-03-08 1:11 ` [PULL 23/73] vdpa: block migration if device has unsupported features Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 25/73] vdpa net: allow VHOST_F_LOG_ALL Michael S. Tsirkin
` (49 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Lei Yang
From: Eugenio Pérez <eperezma@redhat.com>
Next patches enable devices to be migrated even if vdpa netdev has not
been started with x-svq. However, not all devices are migratable, so we
need to block migration if we detect that.
Block migration if we detect the device expose a feature SVQ does not
know how to work with.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230303172445.1089785-13-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/virtio/vhost-vdpa.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
index e9167977d5..48ffb67a34 100644
--- a/hw/virtio/vhost-vdpa.c
+++ b/hw/virtio/vhost-vdpa.c
@@ -443,6 +443,21 @@ static int vhost_vdpa_init(struct vhost_dev *dev, void *opaque, Error **errp)
return 0;
}
+ /*
+ * If dev->shadow_vqs_enabled at initialization that means the device has
+ * been started with x-svq=on, so don't block migration
+ */
+ if (dev->migration_blocker == NULL && !v->shadow_vqs_enabled) {
+ /* We don't have dev->features yet */
+ uint64_t features;
+ ret = vhost_vdpa_get_dev_features(dev, &features);
+ if (unlikely(ret)) {
+ error_setg_errno(errp, -ret, "Could not get device features");
+ return ret;
+ }
+ vhost_svq_valid_features(features, &dev->migration_blocker);
+ }
+
/*
* Similar to VFIO, we end up pinning all guest memory and have to
* disable discarding of RAM.
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 25/73] vdpa net: allow VHOST_F_LOG_ALL
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (23 preceding siblings ...)
2023-03-08 1:12 ` [PULL 24/73] vdpa: block migration if SVQ does not admit a feature Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 26/73] vdpa: return VHOST_F_LOG_ALL in vhost-vdpa devices Michael S. Tsirkin
` (48 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Jason Wang, Lei Yang
From: Eugenio Pérez <eperezma@redhat.com>
Since some actions move to the start function instead of init, the
device features may not be the parent vdpa device's, but the one
returned by vhost backend. If transition to SVQ is supported, the vhost
backend will return _F_LOG_ALL to signal the device is migratable.
Add VHOST_F_LOG_ALL. HW dirty page tracking can be added on top of this
change if the device supports it in the future.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20230303172445.1089785-14-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
net/vhost-vdpa.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
index 1089c35959..99904a0da7 100644
--- a/net/vhost-vdpa.c
+++ b/net/vhost-vdpa.c
@@ -101,6 +101,8 @@ static const uint64_t vdpa_svq_device_features =
BIT_ULL(VIRTIO_NET_F_MQ) |
BIT_ULL(VIRTIO_F_ANY_LAYOUT) |
BIT_ULL(VIRTIO_NET_F_CTRL_MAC_ADDR) |
+ /* VHOST_F_LOG_ALL is exposed by SVQ */
+ BIT_ULL(VHOST_F_LOG_ALL) |
BIT_ULL(VIRTIO_NET_F_RSC_EXT) |
BIT_ULL(VIRTIO_NET_F_STANDBY);
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 26/73] vdpa: return VHOST_F_LOG_ALL in vhost-vdpa devices
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (24 preceding siblings ...)
2023-03-08 1:12 ` [PULL 25/73] vdpa net: allow VHOST_F_LOG_ALL Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 27/73] Revert "tests/qtest: Check for devices in bios-tables-test" Michael S. Tsirkin
` (47 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Eugenio Pérez, Jason Wang, Lei Yang
From: Eugenio Pérez <eperezma@redhat.com>
vhost-vdpa devices can return this feature now that blockers have been
set in case some features are not met.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20230303172445.1089785-15-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/virtio/vhost-vdpa.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
index 48ffb67a34..bc6bad23d5 100644
--- a/hw/virtio/vhost-vdpa.c
+++ b/hw/virtio/vhost-vdpa.c
@@ -1294,10 +1294,9 @@ static int vhost_vdpa_set_vring_call(struct vhost_dev *dev,
static int vhost_vdpa_get_features(struct vhost_dev *dev,
uint64_t *features)
{
- struct vhost_vdpa *v = dev->opaque;
int ret = vhost_vdpa_get_dev_features(dev, features);
- if (ret == 0 && v->shadow_vqs_enabled) {
+ if (ret == 0) {
/* Add SVQ logging capabilities */
*features |= BIT_ULL(VHOST_F_LOG_ALL);
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 27/73] Revert "tests/qtest: Check for devices in bios-tables-test"
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (25 preceding siblings ...)
2023-03-08 1:12 ` [PULL 26/73] vdpa: return VHOST_F_LOG_ALL in vhost-vdpa devices Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 28/73] tests: acpi: whitelist new q35.noacpihp test and pc.hpbrroot Michael S. Tsirkin
` (46 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Fabiano Rosas, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
This reverts commit c471eb4f40445908c1be7bb11a37ac676a0edae7.
which broke acpi tables test and rebuild due to skipping some tests
even thought none of devices tests depend on weren't disabled.
As result it leads to some expected tables not being updated,
merge conflicts and tests failure.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-2-imammedo@redhat.com>
Acked-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test.c | 75 ++--------------------------------
1 file changed, 4 insertions(+), 71 deletions(-)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index d29a4e47af..d8c8cda58e 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -1008,12 +1008,6 @@ static void test_acpi_q35_multif_bridge(void)
.machine = MACHINE_Q35,
.variant = ".multi-bridge",
};
-
- if (!qtest_has_device("pcie-root-port")) {
- g_test_skip("Device pcie-root-port is not available");
- goto out;
- }
-
test_vm_prepare("-S"
" -device virtio-balloon,id=balloon0,addr=0x4.0x2"
" -device pcie-root-port,id=rp0,multifunction=on,"
@@ -1049,7 +1043,6 @@ static void test_acpi_q35_multif_bridge(void)
/* check that reboot/reset doesn't change any ACPI tables */
qtest_qmp_send(data.qts, "{'execute':'system_reset' }");
process_acpi_tables(&data);
-out:
free_test_data(&data);
}
@@ -1403,11 +1396,6 @@ static void test_acpi_tcg_dimm_pxm(const char *machine)
{
test_data data;
- if (!qtest_has_device("nvdimm")) {
- g_test_skip("Device nvdimm is not available");
- return;
- }
-
memset(&data, 0, sizeof(data));
data.machine = machine;
data.variant = ".dimmpxm";
@@ -1456,11 +1444,6 @@ static void test_acpi_virt_tcg_memhp(void)
.scan_len = 256ULL * 1024 * 1024,
};
- if (!qtest_has_device("nvdimm")) {
- g_test_skip("Device nvdimm is not available");
- goto out;
- }
-
data.variant = ".memhp";
test_acpi_one(" -machine nvdimm=on"
" -cpu cortex-a57"
@@ -1474,7 +1457,7 @@ static void test_acpi_virt_tcg_memhp(void)
" -device pc-dimm,id=dimm0,memdev=ram2,node=0"
" -device nvdimm,id=dimm1,memdev=nvm0,node=1",
&data);
-out:
+
free_test_data(&data);
}
@@ -1492,11 +1475,6 @@ static void test_acpi_microvm_tcg(void)
{
test_data data;
- if (!qtest_has_device("virtio-blk-device")) {
- g_test_skip("Device virtio-blk-device is not available");
- return;
- }
-
test_acpi_microvm_prepare(&data);
test_acpi_one(" -machine microvm,acpi=on,ioapic2=off,rtc=off",
&data);
@@ -1507,11 +1485,6 @@ static void test_acpi_microvm_usb_tcg(void)
{
test_data data;
- if (!qtest_has_device("virtio-blk-device")) {
- g_test_skip("Device virtio-blk-device is not available");
- return;
- }
-
test_acpi_microvm_prepare(&data);
data.variant = ".usb";
test_acpi_one(" -machine microvm,acpi=on,ioapic2=off,usb=on,rtc=off",
@@ -1523,11 +1496,6 @@ static void test_acpi_microvm_rtc_tcg(void)
{
test_data data;
- if (!qtest_has_device("virtio-blk-device")) {
- g_test_skip("Device virtio-blk-device is not available");
- return;
- }
-
test_acpi_microvm_prepare(&data);
data.variant = ".rtc";
test_acpi_one(" -machine microvm,acpi=on,ioapic2=off,rtc=on",
@@ -1539,11 +1507,6 @@ static void test_acpi_microvm_pcie_tcg(void)
{
test_data data;
- if (!qtest_has_device("virtio-blk-device")) {
- g_test_skip("Device virtio-blk-device is not available");
- return;
- }
-
test_acpi_microvm_prepare(&data);
data.variant = ".pcie";
data.tcg_only = true; /* need constant host-phys-bits */
@@ -1556,11 +1519,6 @@ static void test_acpi_microvm_ioapic2_tcg(void)
{
test_data data;
- if (!qtest_has_device("virtio-blk-device")) {
- g_test_skip("Device virtio-blk-device is not available");
- return;
- }
-
test_acpi_microvm_prepare(&data);
data.variant = ".ioapic2";
test_acpi_one(" -machine microvm,acpi=on,ioapic2=on,rtc=off",
@@ -1600,12 +1558,6 @@ static void test_acpi_virt_tcg_pxb(void)
.ram_start = 0x40000000ULL,
.scan_len = 128ULL * 1024 * 1024,
};
-
- if (!qtest_has_device("pcie-root-port")) {
- g_test_skip("Device pcie-root-port is not available");
- goto out;
- }
-
/*
* While using -cdrom, the cdrom would auto plugged into pxb-pcie,
* the reason is the bus of pxb-pcie is also root bus, it would lead
@@ -1624,7 +1576,7 @@ static void test_acpi_virt_tcg_pxb(void)
" -cpu cortex-a57"
" -device pxb-pcie,bus_nr=128",
&data);
-out:
+
free_test_data(&data);
}
@@ -1812,12 +1764,6 @@ static void test_acpi_microvm_acpi_erst(void)
gchar *params;
test_data data;
- if (!qtest_has_device("virtio-blk-device")) {
- g_test_skip("Device virtio-blk-device is not available");
- g_free(tmp_path);
- return;
- }
-
test_acpi_microvm_prepare(&data);
data.variant = ".pcie";
data.tcg_only = true; /* need constant host-phys-bits */
@@ -1878,11 +1824,6 @@ static void test_acpi_q35_viot(void)
.variant = ".viot",
};
- if (!qtest_has_device("virtio-iommu")) {
- g_test_skip("Device virtio-iommu is not available");
- goto out;
- }
-
/*
* To keep things interesting, two buses bypass the IOMMU.
* VIOT should only describes the other two buses.
@@ -1893,7 +1834,6 @@ static void test_acpi_q35_viot(void)
"-device pxb-pcie,bus_nr=0x20,id=pcie.200,bus=pcie.0,bypass_iommu=on "
"-device pxb-pcie,bus_nr=0x30,id=pcie.300,bus=pcie.0",
&data);
-out:
free_test_data(&data);
}
@@ -1954,10 +1894,8 @@ static void test_acpi_virt_viot(void)
.scan_len = 128ULL * 1024 * 1024,
};
- if (qtest_has_device("virtio-iommu")) {
- test_acpi_one("-cpu cortex-a57 "
- "-device virtio-iommu-pci", &data);
- }
+ test_acpi_one("-cpu cortex-a57 "
+ "-device virtio-iommu-pci", &data);
free_test_data(&data);
}
@@ -2066,11 +2004,6 @@ static void test_acpi_microvm_oem_fields(void)
test_data data;
char *args;
- if (!qtest_has_device("virtio-blk-device")) {
- g_test_skip("Device virtio-blk-device is not available");
- return;
- }
-
test_acpi_microvm_prepare(&data);
args = test_acpi_create_args(&data,
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 28/73] tests: acpi: whitelist new q35.noacpihp test and pc.hpbrroot
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (26 preceding siblings ...)
2023-03-08 1:12 ` [PULL 27/73] Revert "tests/qtest: Check for devices in bios-tables-test" Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 29/73] tests: acpi: add test_acpi_q35_tcg_no_acpi_hotplug test and extend test_acpi_piix4_no_acpi_pci_hotplug Michael S. Tsirkin
` (45 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
for q35.noacpihp use plain default Q35 DSDT table as a starting point.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-3-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 2 ++
tests/data/acpi/q35/DSDT.noacpihp | Bin 0 -> 8252 bytes
2 files changed, 2 insertions(+)
create mode 100644 tests/data/acpi/q35/DSDT.noacpihp
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..b2c5312871 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,3 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/pc/DSDT.hpbrroot",
+"tests/data/acpi/q35/DSDT.noacpihp",
diff --git a/tests/data/acpi/q35/DSDT.noacpihp b/tests/data/acpi/q35/DSDT.noacpihp
new file mode 100644
index 0000000000000000000000000000000000000000..d68c472b460e4609a64ea67de3c4cebfca76164d
GIT binary patch
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zt;J90*<2b9#V`jm%%<!Xa~JwSufq1J3!Uyp#Vz#xR={r4v9-%v7HC0(5MGzZOZ}i5
z825IPK2UjTPpVhPsvAeBURA1BdG#v#r&h1J)2mm*y*6nVYcW_aO0-+4Bb4`)@*Xem
zjg|KfDeooa{W0+t)~f#RvG<koJ}>W&mG=)R?<eJJ<K;6)C|^^`*LeBbSozu^<!ed#
z`gr;55z5z<@^xOmK32YdNcnnFzA;{Y<_P5*O8Eva-xw?3IHY_dDc>9~KYN7oO{IL3
zmv4@hZyr*<iSikmj>gM7qP(0u@M?g^T`W%OZSD+z<ncq#b&_uUF}4bNI=nATq!VpZ
z(@i{=MLiu}A|}#_wyEhRp0h<g9o{S^(uuaI=_Z~VS5Jr6jfr%kZECuS=ir#04(}in
z=|tPqbQAaWaXlSgOeWHawyEhR?$aeb9o|+Z(up=bozphOLVe9_c4|F&`x%(>Xkk9w
zZFYKXhBxnr-{%;Xt{sXOFW1)nQm5<pOYY0ud17jbVrm+E5Lr$%vOgO}Y#3oZcAt&r
zKN}9%?*=ye*MGD7Fh^J#Ew2}>`H%4zgpxD-S;K<5+i!Hlb<9`1PODrlzs#IVuZb=;
zt*bAj<$8OkTMJ}wEzA+<ZQko_mYQ$B7r%A$H>G#pc=zp_?`*&EE(;B>vvx6gX!4fT
zFut+Bu?_nc)L~l3n*BGnWrufuNI`{_yiRT1@LKDE;dR@W4XnJE>8ozAwCA;btnL>H
znf8L(S_yE!(ko%vy0zXiV@8d5_|9MD8w2Q&=wza1wM^X*8z5P?;PvXiN{y`H4*S@H
z)a!0@2HOUex$x<$FJx4qB!Jfa$D2_sX3=PQIDUd8#MT1V`zOw<UEGh{c9vuvt&lOE
z3K^#6ck9Q!z*{#Dkzso4wJXKcLCm&e<Jwn#ad^#$*|pf99f+^i?B5O}<Nh|9qIi3}
zBo{p1h>J2>x<B5E%d-9TXl^*L4p8Rnc-r~VGZQ06*FE08OMM)$n*;Rf%U4D(O~Ck_
zfy=jTrQ?Z#!AbCLZqo)?EhBcwDB%{{rb`ZO+u`bTaTB@FpPO6Lhq*oHT?%^kA;UcV
zZkfoB!Hcg?8JpNjjkgl?#&{!!d1~*%k6xvFnx1Y(yE?e9&3(GN@dUIhy+Y1185S<+
zb=aN9=3g&IV%X008}2DQJeUUhwemTZJn{4((LLp~kBKLX?+5Wo<U-E+^W8j4VUEJ*
zfWC}|@yLE;8z$Nf8#^$JeTUPJ?8k8)+eeK3hi~rj^Yk`-a6oU<^hq&o+t0+#)*r<g
z_6P0E1MCNWFU~x8?cQ_PDonD8Hd061Vi2l*D8}@&=VhQ%?2huC#|ox9F_lrfGKXQ3
z?p3Uum^S$wR+=fz7}$dh_by~Q%}$rkg=0xDNK@v+$y^WY2exqn)9;V2qI__^U!2Jp
z=sS*I>=(_9m9nsYhv+3bLrR>VJ-H0w-t+Y<p0LaOMy<Vx%YKf~V?B1VPL^g}$6vlm
zlbf@4lCEO7mkY|}zSs^9_kJ9dUljqan8D!T!K%-&yNQEy^58rjK)D;#pMY0rK5un5
zQdVTyj+fy@!aF~GAx&inNoNiEmxF&~8&&%9=*u@5%xt4Z$94K@&{xw8_g=hM_0buz
zd7XwQlBUGGPFTkpM#Lg!;C8#luHpA=ieJ@d+LtyTvlj4Dqp(aXdzQA2!@YBBo!+X<
zoxym)!SFXr!8%sHVZ5JyKW&<4cX{S>-lg_qP8R6toJZ+LX=a{vIOo}J&wJdP9O{ts
i^3*YlnPHw~26bm4s8^G5PqP)~*z^eEU7?1}@c#ikX|rko
literal 0
HcmV?d00001
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 29/73] tests: acpi: add test_acpi_q35_tcg_no_acpi_hotplug test and extend test_acpi_piix4_no_acpi_pci_hotplug
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (27 preceding siblings ...)
2023-03-08 1:12 ` [PULL 28/73] tests: acpi: whitelist new q35.noacpihp test and pc.hpbrroot Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 30/73] tests: acpi: update expected blobs Michael S. Tsirkin
` (44 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
test bridge AML generator with ACPI PCI hotplug disabled
(i.e. with native hotplug enabled/disabled per bridge/root port)
PS:
while at make sure that devices on pci-bridge are starting
from addr=1.0 as slot 0 is not available there and test
passes only because of a bug in ACPI hotplug that will be
fixed by follow up patch
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-4-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test.c | 42 +++++++++++++++++++++++++++++++---
1 file changed, 39 insertions(+), 3 deletions(-)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index d8c8cda58e..7828c6b7e6 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -949,9 +949,14 @@ static void test_acpi_piix4_no_acpi_pci_hotplug(void)
data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types);
test_acpi_one("-global PIIX4_PM.acpi-root-pci-hotplug=off "
"-global PIIX4_PM.acpi-pci-hotplug-with-bridge-support=off "
- "-device pci-bridge,chassis_nr=1 "
- "-device pci-testdev,bus=pci.0 "
- "-device pci-testdev,bus=pci.1", &data);
+ "-device pci-bridge,chassis_nr=1,addr=4.0 "
+ "-device pci-testdev,bus=pci.0,addr=5.0 "
+ "-device pci-testdev,bus=pci.0,addr=6.0,acpi-index=101 "
+ "-device pci-testdev,bus=pci.1,addr=1.0 "
+ "-device pci-testdev,bus=pci.1,addr=2.0,acpi-index=201 "
+ "-device pci-bridge,id=nhpbr,chassis_nr=2,shpc=off,addr=7.0 "
+ "-device pci-testdev,bus=nhpbr,addr=1.0,acpi-index=301 "
+ , &data);
free_test_data(&data);
}
@@ -1002,6 +1007,35 @@ static void test_acpi_q35_tcg_bridge(void)
free_test_data(&data);
}
+static void test_acpi_q35_tcg_no_acpi_hotplug(void)
+{
+ test_data data;
+
+ memset(&data, 0, sizeof(data));
+ data.machine = MACHINE_Q35;
+ data.variant = ".noacpihp";
+ data.required_struct_types = base_required_struct_types;
+ data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types);
+ test_acpi_one("-global ICH9-LPC.acpi-pci-hotplug-with-bridge-support=off"
+ " -device pci-testdev,bus=pcie.0,acpi-index=101,addr=3.0"
+ " -device pci-bridge,chassis_nr=1,id=shpcbr,addr=4.0"
+ " -device pci-testdev,bus=shpcbr,addr=1.0,acpi-index=201"
+ " -device pci-bridge,chassis_nr=2,shpc=off,id=noshpcbr,addr=5.0"
+ " -device pci-testdev,bus=noshpcbr,addr=1.0,acpi-index=301"
+ " -device pcie-root-port,id=hprp,port=0x0,chassis=1,addr=6.0"
+ " -device pci-testdev,bus=hprp,acpi-index=401"
+ " -device pcie-root-port,id=nohprp,port=0x0,chassis=2,hotplug=off,"
+ "addr=7.0"
+ " -device pci-testdev,bus=nohprp,acpi-index=501"
+ " -device pcie-root-port,id=nohprpint,port=0x0,chassis=3,hotplug=off,"
+ "addr=8.0"
+ " -device pcie-root-port,id=hprp2,port=0x0,chassis=4,bus=nohprpint,"
+ "addr=9.0"
+ " -device pci-testdev,bus=hprp2,acpi-index=601"
+ , &data);
+ free_test_data(&data);
+}
+
static void test_acpi_q35_multif_bridge(void)
{
test_data data = {
@@ -2094,6 +2128,8 @@ int main(int argc, char *argv[])
test_acpi_q35_tcg_tpm12_tis);
}
qtest_add_func("acpi/q35/bridge", test_acpi_q35_tcg_bridge);
+ qtest_add_func("acpi/q35/no-acpi-hotplug",
+ test_acpi_q35_tcg_no_acpi_hotplug);
qtest_add_func("acpi/q35/multif-bridge",
test_acpi_q35_multif_bridge);
qtest_add_func("acpi/q35/mmio64", test_acpi_q35_tcg_mmio64);
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 30/73] tests: acpi: update expected blobs
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (28 preceding siblings ...)
2023-03-08 1:12 ` [PULL 29/73] tests: acpi: add test_acpi_q35_tcg_no_acpi_hotplug test and extend test_acpi_piix4_no_acpi_pci_hotplug Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-13 10:57 ` Philippe Mathieu-Daudé
2023-03-08 1:12 ` [PULL 31/73] tests: acpi: whitelist q35/DSDT.multi-bridge before extending testcase Michael S. Tsirkin
` (43 subsequent siblings)
73 siblings, 1 reply; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
expected changes:
Basically adds devices present on root bus in form:
Device (SXX)
{
Name (_ADR, 0xYYYYYYYY) // _ADR: Address
}
On top of that For q35.noacpihp, all ACPI PCI hotplug
AML is removed and _OSC get native hotplug enabled:
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
- Local0 &= 0x1E
+ Local0 &= 0x1F
If ((Arg1 != One))
{
CDW1 |= 0x08
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-5-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 2 --
tests/data/acpi/pc/DSDT.hpbrroot | Bin 3081 -> 3115 bytes
tests/data/acpi/q35/DSDT.noacpihp | Bin 8252 -> 7932 bytes
3 files changed, 2 deletions(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index b2c5312871..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,3 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/pc/DSDT.hpbrroot",
-"tests/data/acpi/q35/DSDT.noacpihp",
diff --git a/tests/data/acpi/pc/DSDT.hpbrroot b/tests/data/acpi/pc/DSDT.hpbrroot
index a71ed4fbaa14be655c28a5e03e50157b4476e480..d77752960285a5afa6d0c0a04e400842f6acd2ed 100644
GIT binary patch
delta 100
zcmeB_SS`Wj66_M9&BMUJ_;DlGJx(rXm6-Tor+5Kx<;|Zse=<548N_qMJGuk`Rj@Eb
YH}MA>S-=HY!2-qz6>JazgbH>B01xpO00000
delta 66
zcmZ22(J8^@66_Mf$-}_Fcyc4xJx(r1rI`3&r+5KR#m%2Me=^D$TEuh2JGuk`RWLI|
NH}MA>8NdZt7ywGL58eO(
diff --git a/tests/data/acpi/q35/DSDT.noacpihp b/tests/data/acpi/q35/DSDT.noacpihp
index d68c472b460e4609a64ea67de3c4cebfca76164d..f35338db30a44638cc3a55d2870e0e377af4246f 100644
GIT binary patch
delta 160
zcmdnv@W+<RCD<k8j~oL7<AsS_R~Y3d-Y?y}kV#F7$x(3gNf~~|$trT`TwV$>@xe~<
z0!|8(r^?wU^9LJR#B;<ux&-ksFfcPjH}MA>8NdZtAOZ*#tY86SgbFr@073;jSil6K
Lf@AYVxj04uw-F~b
delta 485
zcmexkyT^gcCD<jzMuCBWaq2{_D~xgz@0ZpK_=xDm2Rp?FIC~mIHv~8bhcI#<;Njwk
zZWI7<oPpw@3P8d|A-W;h)hnKn`veacOLQYQh~w;J;OYgGaPspFV&uL6(FWo;JNbqB
zDg=1CL?}cvI{7$zGl-}LIJ<f=MJt1N|Nj?cfK(Jz)-z@@fDDON2Z=9X5Ycu7YQj(k
zR0T4u07N7})h38IaR#^q`|>VuVVj)AP$0<6$dFLLkhnl<(&P+5VJ?9S<|m&9n^yTw
z6o2I_dDz)^Nx}m5shM0%OA-n|mNa+dFfjN7Nk)bwpq|>vNeq*dc>V(cLv12sVr^n2
zBNsbEVnJd@0s{k3uj=G1F7^T;Rwf2spgnLCAO;j9K~!xHVN{c1@)g}&BhAm~72V{;
z65tUK#1Ze|>B1Y}7hvFMV8*}^9}40*dn$P3mlWibrYjVs7U!21C8rhx<$^;Txwtvv
zor8h}dAYdU84vIr;9-=Q+$odE<suaWiYfsg$;p3Y>^Cozjb`K(;E8t+a1~*TcQr6%
F000aMj?@4E
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PULL 30/73] tests: acpi: update expected blobs
2023-03-08 1:12 ` [PULL 30/73] tests: acpi: update expected blobs Michael S. Tsirkin
@ 2023-03-13 10:57 ` Philippe Mathieu-Daudé
2023-03-13 12:59 ` Michael S. Tsirkin
0 siblings, 1 reply; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-03-13 10:57 UTC (permalink / raw)
To: Michael S. Tsirkin, qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
On 8/3/23 02:12, Michael S. Tsirkin wrote:
> From: Igor Mammedov <imammedo@redhat.com>
>
> expected changes:
> Basically adds devices present on root bus in form:
> Device (SXX)
> {
> Name (_ADR, 0xYYYYYYYY) // _ADR: Address
> }
>
> On top of that For q35.noacpihp, all ACPI PCI hotplug
> AML is removed and _OSC get native hotplug enabled:
>
> CreateDWordField (Arg3, 0x04, CDW2)
> CreateDWordField (Arg3, 0x08, CDW3)
> Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> - Local0 &= 0x1E
> + Local0 &= 0x1F
> If ((Arg1 != One))
> {
> CDW1 |= 0x08
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> Message-Id: <20230302161543.286002-5-imammedo@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Better safe than sorry! :P
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 2 --
> tests/data/acpi/pc/DSDT.hpbrroot | Bin 3081 -> 3115 bytes
> tests/data/acpi/q35/DSDT.noacpihp | Bin 8252 -> 7932 bytes
> 3 files changed, 2 deletions(-)
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PULL 30/73] tests: acpi: update expected blobs
2023-03-13 10:57 ` Philippe Mathieu-Daudé
@ 2023-03-13 12:59 ` Michael S. Tsirkin
0 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-13 12:59 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Peter Maydell, Igor Mammedov, Ani Sinha
On Mon, Mar 13, 2023 at 11:57:52AM +0100, Philippe Mathieu-Daudé wrote:
> On 8/3/23 02:12, Michael S. Tsirkin wrote:
> > From: Igor Mammedov <imammedo@redhat.com>
> >
> > expected changes:
> > Basically adds devices present on root bus in form:
> > Device (SXX)
> > {
> > Name (_ADR, 0xYYYYYYYY) // _ADR: Address
> > }
> >
> > On top of that For q35.noacpihp, all ACPI PCI hotplug
> > AML is removed and _OSC get native hotplug enabled:
> >
> > CreateDWordField (Arg3, 0x04, CDW2)
> > CreateDWordField (Arg3, 0x08, CDW3)
> > Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> > - Local0 &= 0x1E
> > + Local0 &= 0x1F
> > If ((Arg1 != One))
> > {
> > CDW1 |= 0x08
> > Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> > Message-Id: <20230302161543.286002-5-imammedo@redhat.com>
> > Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> > Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> > Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> > Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> > Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> > Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> > Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
>
> Better safe than sorry! :P
Oh. I don't know how that happened :(
> > ---
> > tests/qtest/bios-tables-test-allowed-diff.h | 2 --
> > tests/data/acpi/pc/DSDT.hpbrroot | Bin 3081 -> 3115 bytes
> > tests/data/acpi/q35/DSDT.noacpihp | Bin 8252 -> 7932 bytes
> > 3 files changed, 2 deletions(-)
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PULL 31/73] tests: acpi: whitelist q35/DSDT.multi-bridge before extending testcase
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (29 preceding siblings ...)
2023-03-08 1:12 ` [PULL 30/73] tests: acpi: update expected blobs Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 32/73] tests: acpi: extend multi-bridge case with case 'root-port,id=HOHP,hotplug=off root-port,bus=NOHP' Michael S. Tsirkin
` (42 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-6-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..dabc024f53 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,2 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/q35/DSDT.multi-bridge",
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 32/73] tests: acpi: extend multi-bridge case with case 'root-port,id=HOHP,hotplug=off root-port,bus=NOHP'
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (30 preceding siblings ...)
2023-03-08 1:12 ` [PULL 31/73] tests: acpi: whitelist q35/DSDT.multi-bridge before extending testcase Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 33/73] x86: pcihp: fix missing PCNT callchain when intermediate root-port has 'hotplug=off' set Michael S. Tsirkin
` (41 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
Following corner case wasn't covered:
-device pcie-root-port,id=NO_HOTPLUG,hotplug=off
-device pcie-root-port,bus=NO_HOTPLUG
when intermediate root-port has explicitly disabled hotplug,
all hierarchy below it is not described anymore (used to be
described in 7.2)
So as result we see only NO_HOTPLUG root-port described
+ Device (S50)
+ {
+ Name (_ADR, 0x000A0000) // _ADR: Address
+ }
and no children nor notification chain for them are being composed.
Follow up patches will fix missing leaf root-port descriptor
and notification chain that should accompany it.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-7-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 7828c6b7e6..295d80740e 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -1055,7 +1055,10 @@ static void test_acpi_q35_multif_bridge(void)
" -device pci-testdev,bus=pcie.0,addr=2.4"
" -device pci-testdev,bus=pcie.0,addr=5.0"
" -device pci-testdev,bus=rp0,addr=0.0"
- " -device pci-testdev,bus=br1", &data);
+ " -device pci-testdev,bus=br1"
+ " -device pcie-root-port,id=rpnohp,chassis=8,addr=0xA.0,hotplug=off"
+ " -device pcie-root-port,id=rp3,chassis=9,bus=rpnohp"
+ , &data);
/* hotplugged bridges section */
qtest_qmp_device_add(data.qts, "pci-bridge", "hpbr1",
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 33/73] x86: pcihp: fix missing PCNT callchain when intermediate root-port has 'hotplug=off' set
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (31 preceding siblings ...)
2023-03-08 1:12 ` [PULL 32/73] tests: acpi: extend multi-bridge case with case 'root-port,id=HOHP,hotplug=off root-port,bus=NOHP' Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 34/73] tests: acpi: whitelist pc/DSDT.hpbrroot and pc/DSDT.hpbridge tests Michael S. Tsirkin
` (40 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Igor Mammedov, Ani Sinha, Paolo Bonzini,
Richard Henderson, Eduardo Habkost, Marcel Apfelbaum
From: Igor Mammedov <imammedo@redhat.com>
Beside BSEL numbers change (due to 2 extra root-ports in q35/miltibridge test),
following change is expected:
Scope (\_SB.PCI0)
{
...
+ Scope (S50)
+ {
+ Scope (S00)
+ {
+ Method (PCNT, 0, NotSerialized)
+ {
+ BNUM = Zero
+ DVNT (PCIU, One)
+ DVNT (PCID, 0x03)
+ }
+ }
+
+ Method (PCNT, 0, NotSerialized)
+ {
+ ^S00.PCNT
+ }
+ }
...
Method (PCNT, 0, NotSerialized)
{
+ ^S50.PCNT ()
^S13.PCNT ()
^S12.PCNT ()
^S11.PCNT ()
I practice [1] hasn't broke anything since on hardware side we unset
hotplug_handler on such intermediate port => hotplug behind it has
not been properly wired and as result not worked.
1)
Fixes: ddab4d3fae4e8 ("pcihp: compose PCNT callchain right before its user _GPE._E01")
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-8-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/i386/acpi-build.c | 22 +++++++++++++---------
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b19fb4259e..c691104d47 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -517,16 +517,24 @@ static bool build_append_notfication_callback(Aml *parent_scope,
PCIBus *sec;
QObject *bsel;
int nr_notifiers = 0;
+ GQueue *pcnt_bus_list = g_queue_new();
QLIST_FOREACH(sec, &bus->child, sibling) {
Aml *br_scope = aml_scope("S%.02X", sec->parent_dev->devfn);
- if (pci_bus_is_root(sec) ||
- !object_property_find(OBJECT(sec), ACPI_PCIHP_PROP_BSEL)) {
+ if (pci_bus_is_root(sec)) {
continue;
}
nr_notifiers = nr_notifiers +
build_append_notfication_callback(br_scope, sec);
- aml_append(parent_scope, br_scope);
+ /*
+ * add new child scope to parent
+ * and keep track of bus that have PCNT,
+ * bus list is used later to call children PCNTs from this level PCNT
+ */
+ if (nr_notifiers) {
+ g_queue_push_tail(pcnt_bus_list, sec);
+ aml_append(parent_scope, br_scope);
+ }
}
/*
@@ -550,17 +558,13 @@ static bool build_append_notfication_callback(Aml *parent_scope,
}
/* Notify about child bus events in any case */
- QLIST_FOREACH(sec, &bus->child, sibling) {
- if (pci_bus_is_root(sec) ||
- !object_property_find(OBJECT(sec), ACPI_PCIHP_PROP_BSEL)) {
- continue;
- }
-
+ while ((sec = g_queue_pop_head(pcnt_bus_list))) {
aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn));
}
aml_append(parent_scope, method);
qobject_unref(bsel);
+ g_queue_free(pcnt_bus_list);
return !!nr_notifiers;
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 34/73] tests: acpi: whitelist pc/DSDT.hpbrroot and pc/DSDT.hpbridge tests
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (32 preceding siblings ...)
2023-03-08 1:12 ` [PULL 33/73] x86: pcihp: fix missing PCNT callchain when intermediate root-port has 'hotplug=off' set Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 35/73] x86: pcihp: fix missing bridge AML when intermediate root-port has 'hotplug=off' set Michael S. Tsirkin
` (39 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
follow up fix for missing root-port AML will affect these tests
by adding non-hotpluggable Device descriptors of colplugged
bridges when bridge hotplug is disabled.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-9-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dabc024f53..a0dbb28cde 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,2 +1,5 @@
/* List of comma-separated changed AML files to ignore */
"tests/data/acpi/q35/DSDT.multi-bridge",
+"tests/data/acpi/pc/DSDT.hpbridge",
+"tests/data/acpi/pc/DSDT.hpbrroot",
+"tests/data/acpi/q35/DSDT.noacpihp",
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 35/73] x86: pcihp: fix missing bridge AML when intermediate root-port has 'hotplug=off' set
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (33 preceding siblings ...)
2023-03-08 1:12 ` [PULL 34/73] tests: acpi: whitelist pc/DSDT.hpbrroot and pc/DSDT.hpbridge tests Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 36/73] tests: acpi: update expected blobs Michael S. Tsirkin
` (38 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
(I practice [1] hasn't broke anything since on hardware side we unset
hotplug_handler on such intermediate port => hotplug behind it has
never worked)
When deciding if bridge should be described, the original
condition was
cold_plugged_bridge && pcihp_bridge_en
which was replaced [1] by
bridge has ACPI_PCIHP_PROP_BSEL
the later however is not the same thing as the original
and flips to false if intermediate bridge has hotplug
turned off (root-port with 'hotplug=off' option).
Since we already in build_pci_bridge_aml(), the question
if it's bridge is answered. Use DeviceState::hotplugged
to make decision if bridge should describe its slots.
What's left out is pcihp_bridge_en, which tells us if
ACPI bridge hotplug is enabled.
With hotplug and non hotplug part now being mostly
separated, omitting this check will only lead to
colplugged bridges describe occupied slots in case
when ACPI bridge hotplug is disabled.
Which makes behavior consistent with occupied slots
on hostbridge.
Ex (pc/DSDT.hpbrroot diff):
...
Device (S20)
{
Name (_ADR, 0x00040000) // _ADR: Address
+ Device (S08)
+ {
+ Name (_ADR, 0x00010000) // _ADR: Address
+ }
+
+ Device (S10)
+ {
+ Name (_ADR, 0x00020000) // _ADR: Address
+ }
}
...
PS:
testing shows that above doesn't affect adversely guest OS
behavior: i.e. if ACPI bridge hotplug is enabled it's
expected behaviour, and with ACPI bridge hotplug is disabled
(a.k. native hotplug), it doesn't break slot enumeration
nor native hotplug. (tested with RHEL9.0 and WS2022).
1)
Fixes: 6c36ec46b0d ("pcihp: make bridge describe itself using AcpiDevAmlIfClass:build_dev_aml")
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-10-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/acpi/pci-bridge.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/acpi/pci-bridge.c b/hw/acpi/pci-bridge.c
index 5f3ee5157f..4fbf6da6ad 100644
--- a/hw/acpi/pci-bridge.c
+++ b/hw/acpi/pci-bridge.c
@@ -21,7 +21,7 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope)
{
PCIBridge *br = PCI_BRIDGE(adev);
- if (object_property_find(OBJECT(&br->sec_bus), ACPI_PCIHP_PROP_BSEL)) {
+ if (!DEVICE(br)->hotplugged) {
build_append_pci_bus_devices(scope, pci_bridge_get_sec_bus(br));
}
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 36/73] tests: acpi: update expected blobs
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (34 preceding siblings ...)
2023-03-08 1:12 ` [PULL 35/73] x86: pcihp: fix missing bridge AML when intermediate root-port has 'hotplug=off' set Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 37/73] pcihp: piix4: do not redirect hotplug controller to piix4 when ACPI hotplug is disabled Michael S. Tsirkin
` (37 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
BNUM numbering changes across DSDT due to addition of new bridges.
Fixed missing PCI tree brunch (q35/DSDT.multi-bridge case):
// -device pcie-root-port,id=rpnohp,chassis=8,addr=0xA.0,hotplug=off
+ Device (S50)
+ {
+ Name (_ADR, 0x000A0000) // _ADR: Address
// -device pcie-root-port,id=rp3,chassis=9,bus=rpnohp
+ Device (S00)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Name (BSEL, Zero)
+ Device (S00)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Name (ASUN, Zero)
+ Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
+ {
+ Local0 = Package (0x02)
+ {
+ BSEL,
+ ASUN
+ }
+ Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0))
+ }
+
+ Name (_SUN, Zero) // _SUN: Slot User Number
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
+ {
+ PCEJ (BSEL, _SUN)
+ }
+ }
+
+ Method (DVNT, 2, NotSerialized)
+ {
+ If ((Arg0 & One))
+ {
+ Notify (S00, Arg1)
+ }
+ }
+ }
+ }
Fixed hotplug notification for leaf root port (hotplug=on) attached to
intermediate root port (hotplug=off) (q35/DSDT.multi-bridge case)
// -device pcie-root-port,id=rpnohp,chassis=8,addr=0xA.0,hotplug=off
+ Scope (S50)
+ {
// -device pcie-root-port,id=rp3,chassis=9,bus=rpnohp
+ Scope (S00)
+ {
+ Method (PCNT, 0, NotSerialized)
+ {
+ BNUM = Zero
+ DVNT (PCIU, One)
+ DVNT (PCID, 0x03)
+ }
+ }
+
+ Method (PCNT, 0, NotSerialized)
+ {
+ ^S00.PCNT ()
+ }
+ }
...
Method (PCNT, 0, NotSerialized)
{
+ ^S50.PCNT ()
^S13.PCNT ()
Populated slots being described on coldplugged bridges even if
ACPI bridge hotplug is disabled.
(pc/DSDT.hpbridge and pc/DSDT.hpbrroot)
...
Device (S18)
{
Name (_ADR, 0x00030000) // _ADR: Address
+ Device (S08)
+ {
+ Name (_ADR, 0x00010000) // _ADR: Address
+ }
+
+ Device (S10)
+ {
+ Name (_ADR, 0x00020000) // _ADR: Address
+ }
}
...
Device (S18)
{
Name (_ADR, 0x00030000) // _ADR: Address
+ Device (S00)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ }
}
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-11-imammedo@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 4 ----
tests/data/acpi/pc/DSDT.hpbridge | Bin 6289 -> 6323 bytes
tests/data/acpi/pc/DSDT.hpbrroot | Bin 3115 -> 3166 bytes
tests/data/acpi/q35/DSDT.multi-bridge | Bin 12337 -> 12545 bytes
tests/data/acpi/q35/DSDT.noacpihp | Bin 7932 -> 8022 bytes
5 files changed, 4 deletions(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index a0dbb28cde..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,5 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/q35/DSDT.multi-bridge",
-"tests/data/acpi/pc/DSDT.hpbridge",
-"tests/data/acpi/pc/DSDT.hpbrroot",
-"tests/data/acpi/q35/DSDT.noacpihp",
diff --git a/tests/data/acpi/pc/DSDT.hpbridge b/tests/data/acpi/pc/DSDT.hpbridge
index 834c27002edbd3e2298a71c9ff1b501e3a3314f7..5dea100bc9492bb2367aac8660522201785c1efb 100644
GIT binary patch
delta 89
zcmbPexY>})CD<iovjhVJqvb}fa&9iSGcobOPVoYMr#E+Ve`ho>3^ufg=ZJT73F2X3
bU}lJJ;tw`J2rz;L3=QBam^M$~W#k3`PB0c2
delta 55
zcmdmNIMI;HCD<ioq67m2qvA%ca&9h{Q!(+uPVoXhCpUL<e`n<54>q)j=ZJT73F2X3
LVBWlmmysI)zZnl0
diff --git a/tests/data/acpi/pc/DSDT.hpbrroot b/tests/data/acpi/pc/DSDT.hpbrroot
index d77752960285a5afa6d0c0a04e400842f6acd2ed..893ab221c2cca1829937a4c26152680313633df4 100644
GIT binary patch
delta 121
zcmZ22aZiHFCD<h-j)#GPaneSvdz@Tu>M`-bPVoYMYMVcCerGf=3^p=|=ZJT72?DBN
iVTf+x4>quX3owEO3=t}rCV%HvRZs{vMyO%O)C2%vb{qNt
delta 70
zcmca7v08%5CD<iIn}>mc@#99Wdz@U(DlzfFPVoZX%9}rNerM$44>mH0=ZJT72?DBN
SnJmep%FiEcYylTyX8-`NSP<#}
diff --git a/tests/data/acpi/q35/DSDT.multi-bridge b/tests/data/acpi/q35/DSDT.multi-bridge
index 66b39be294a261a6bd991c6bcbd8e2a04a03403f..f2f60fdbb3b44ab9adb69bb36e4a80978536af9b 100644
GIT binary patch
delta 312
zcmdm((3r&K66_MfXvo08IA<eQqa05Y2V+cpuv5H1Cp+Whsd7n-?2|vrM@|luS7u}e
zu^7E4pO;shTr3|y*-t@k@(1~-$;T7|CV!W6-5jmBoSUCjgv}+)FNBH1DcIGAi)FH)
zu9T4zN3f|uJV(5vOArqO0~bSdlLLFO0aSzmtP&{Z$$}7@{9i6;v$k#wqqwtlj2_56
z0nVNV0yZFX1XO|QCeP4Q6cZ5$aP|vfh|>dU1Tle9hQ^ck>8bJ<#fvC_B@4KiCNI<%
zpL}1BALs!Pi%nm4@&bLy$u{~Nla=))CdcRtPj=B)5)e=eHZ(wJV+Sgh5OijNSpl>e
K#GJfezX$-13sfWk
delta 216
zcmZon+L*xQ66_LUXu!b0*uIggQI5;|e@uL^Q@nul|H;$kk{H=07brwdz97#sIb2?T
z@@M(D$yem%Cg&?eP4-n#Vq^fyu4H5dk}jL$6qj?Wvxu;{g!zRqaX1CL`fxErdC^V$
z!A2JG9Py4WK|Bl$tPGns=*BS$dWps8f$R!!_B0Ss4K_5Mtg5fb3St>ej?q`;F^m^c
z2ypfbVJP5YnyjxcKKZo1EYLE2eTm6B23nJ~4LB!n2C{t&BqzVnmt?a5tDW3$Py_&m
C13TgX
diff --git a/tests/data/acpi/q35/DSDT.noacpihp b/tests/data/acpi/q35/DSDT.noacpihp
index f35338db30a44638cc3a55d2870e0e377af4246f..4ea982de2df3cf7cd89cb3b4467a350eaf8f5d29 100644
GIT binary patch
delta 213
zcmexkd(Do^CD<h-OrC*(F=8Xv3mGmKwV3!|r+5J$)yaQk0_qiljSS*B;vHRrco-O1
z7^0i_gAFX;0*pWbpbCTlD>fA}!Nv$P*nldygAJepKn_qAp`RU1R<}tv*aV@O1FYTz
Op`H^({pNYHaf|>-)-eG9
delta 122
zcmca+_s5pYCD<k8j~oL7<Ase}FJ!p96k_6oo#F+Y6ej<X2?*j3HZq9kh<9`e;$dK5
jVTf)53Ru7eSiu6u2o-D)0fY*6uz(3d1;^$evT=+6@ys3p
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 37/73] pcihp: piix4: do not redirect hotplug controller to piix4 when ACPI hotplug is disabled
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (35 preceding siblings ...)
2023-03-08 1:12 ` [PULL 36/73] tests: acpi: update expected blobs Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 38/73] pci: fix 'hotplugglable' property behavior Michael S. Tsirkin
` (36 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Igor Mammedov, Ani Sinha,
Philippe Mathieu-Daudé,
Aurelien Jarno, Marcel Apfelbaum
From: Igor Mammedov <imammedo@redhat.com>
commit [1] added ability to disable ACPI PCI hotplug
on hostbridge but forgot to take into account that it
should disable all ACPI hotplug machinery in case both
hostbridge and bridge hotplug are disabled.
Commit [2] tried to fix that, however it forgot to
remove hotplug_handler override which hands hotplug
control over to piix4 hotplug controller
(uninitialized after [2]).
As result at the time bridge is plugged in, its default
(SHPC) hotplug handler is replaced by piix4 one in
acpi_pcihp_device_plug_cb()
...
if (!s->legacy_piix &&
...
qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev));
which is acting on uninitialized s->legacy_piix value
(0 by default) that was supposed to be initialized by
acpi_pcihp_init(), that is no longer called due to
following condition being false:
piix4_acpi_system_hot_add_init()
if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) {
and the bridge ends up with piix4 as hotplug handler
instead of shpc one.
Followup hotplug on that bridge as result yields
piix4 specific error:
Error: Unsupported bus. Bus doesn't have property 'acpi-pcihp-bsel' set
1) 3d7e78aa777 (Introduce a new flag for i440fx to disable PCI hotplug on the root bus)
2) df4008c9c59 (piix4: don't reserve hw resources when hotplug is off globally)
Fixes: df4008c9c59 (piix4: don't reserve hw resources when hotplug is off globally)
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-12-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/acpi/piix4.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index eac2125abd..8fc422829a 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -492,7 +492,6 @@ static void piix4_pm_realize(PCIDevice *dev, Error **errp)
piix4_acpi_system_hot_add_init(pci_address_space_io(dev),
pci_get_bus(dev), s);
- qbus_set_hotplug_handler(BUS(pci_get_bus(dev)), OBJECT(s));
piix4_pm_add_properties(s);
}
@@ -564,6 +563,7 @@ static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) {
acpi_pcihp_init(OBJECT(s), &s->acpi_pci_hotplug, bus, parent,
s->use_acpi_hotplug_bridge, ACPI_PCIHP_ADDR_PIIX4);
+ qbus_set_hotplug_handler(BUS(pci_get_bus(PCI_DEVICE(s))), OBJECT(s));
}
s->cpu_hotplug_legacy = true;
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 38/73] pci: fix 'hotplugglable' property behavior
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (36 preceding siblings ...)
2023-03-08 1:12 ` [PULL 37/73] pcihp: piix4: do not redirect hotplug controller to piix4 when ACPI hotplug is disabled Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 39/73] tests: acpi: whitelist DSDT blobs before isolating PCI _DSM func 0 prolog Michael S. Tsirkin
` (35 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Igor Mammedov, Marcel Apfelbaum, Paolo Bonzini,
Daniel P. Berrangé,
Eduardo Habkost
From: Igor Mammedov <imammedo@redhat.com>
Currently the property may flip its state
during VM bring up or just doesn't work as
the name implies.
In particular with PCIE root port that has
'hotplug={on|off}' property, and when it's
turned off, one would expect
'hotpluggable' == false
for any devices attached to it.
Which is not the case since qbus_is_hotpluggable()
used by the property just checks for presence
of any hotplug_handler set on bus.
The problem is that name BusState::hotplug_handler
from its inception is misnomer, as it handles
not only hotplug but also in many cases coldplug
as well (i.e. generic wiring interface), and
it's fine to have hotplug_handler set on bus
while it doesn't support hotplug (ex. pcie-slot
with hotplug=off).
Another case of root port flipping 'hotpluggable'
state when ACPI PCI hotplug is enabled in this
case root port with 'hotplug=off' starts as
hotpluggable and then later on, pcihp
hotplug_handler clears hotplug_handler
explicitly after checking root port's 'hotplug'
property.
So root-port hotpluggablity check sort of works
if pcihp is enabled but is broken if pcihp is
disabled.
One way to deal with the issue is to ask
hotplug_handler if bus it controls is hotpluggable
or not. To do that add is_hotpluggable_bus()
hook to HotplugHandler interface and use it in
'hotpluggable' property + teach pcie-slot to
actually look into 'hotplug' property state
before deciding if bus is hotpluggable.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-13-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/hotplug.h | 2 ++
include/hw/qdev-core.h | 13 ++++++++++++-
hw/pci/pcie_port.c | 8 ++++++++
3 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/include/hw/hotplug.h b/include/hw/hotplug.h
index e15f59c8b3..a9840ed485 100644
--- a/include/hw/hotplug.h
+++ b/include/hw/hotplug.h
@@ -48,6 +48,7 @@ typedef void (*hotplug_fn)(HotplugHandler *plug_handler,
* @unplug: unplug callback.
* Used for device removal with devices that implement
* asynchronous and synchronous (surprise) removal.
+ * @is_hotpluggable_bus: called to check if bus/its parent allow hotplug on bus
*/
struct HotplugHandlerClass {
/* <private> */
@@ -58,6 +59,7 @@ struct HotplugHandlerClass {
hotplug_fn plug;
hotplug_fn unplug_request;
hotplug_fn unplug;
+ bool (*is_hotpluggable_bus)(HotplugHandler *plug_handler, BusState *bus);
};
/**
diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
index f5b3b2f89a..bd50ad5ee1 100644
--- a/include/hw/qdev-core.h
+++ b/include/hw/qdev-core.h
@@ -812,7 +812,18 @@ void qbus_set_bus_hotplug_handler(BusState *bus);
static inline bool qbus_is_hotpluggable(BusState *bus)
{
- return bus->hotplug_handler;
+ HotplugHandler *plug_handler = bus->hotplug_handler;
+ bool ret = !!plug_handler;
+
+ if (plug_handler) {
+ HotplugHandlerClass *hdc;
+
+ hdc = HOTPLUG_HANDLER_GET_CLASS(plug_handler);
+ if (hdc->is_hotpluggable_bus) {
+ ret = hdc->is_hotpluggable_bus(plug_handler, bus);
+ }
+ }
+ return ret;
}
/**
diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c
index 65a397ad23..000633fec1 100644
--- a/hw/pci/pcie_port.c
+++ b/hw/pci/pcie_port.c
@@ -161,6 +161,13 @@ PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn)
return NULL;
}
+static bool pcie_slot_is_hotpluggbale_bus(HotplugHandler *plug_handler,
+ BusState *bus)
+{
+ PCIESlot *s = PCIE_SLOT(bus->parent);
+ return s->hotplug;
+}
+
static const TypeInfo pcie_port_type_info = {
.name = TYPE_PCIE_PORT,
.parent = TYPE_PCI_BRIDGE,
@@ -188,6 +195,7 @@ static void pcie_slot_class_init(ObjectClass *oc, void *data)
hc->plug = pcie_cap_slot_plug_cb;
hc->unplug = pcie_cap_slot_unplug_cb;
hc->unplug_request = pcie_cap_slot_unplug_request_cb;
+ hc->is_hotpluggable_bus = pcie_slot_is_hotpluggbale_bus;
}
static const TypeInfo pcie_slot_type_info = {
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 39/73] tests: acpi: whitelist DSDT blobs before isolating PCI _DSM func 0 prolog
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (37 preceding siblings ...)
2023-03-08 1:12 ` [PULL 38/73] pci: fix 'hotplugglable' property behavior Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 40/73] pcihp: move PCI _DSM function 0 prolog into separate function Michael S. Tsirkin
` (34 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-14-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 35 +++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..7e7745db39 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,36 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/pc/DSDT",
+"tests/data/acpi/pc/DSDT.acpierst",
+"tests/data/acpi/pc/DSDT.acpihmat",
+"tests/data/acpi/pc/DSDT.bridge",
+"tests/data/acpi/pc/DSDT.cphp",
+"tests/data/acpi/pc/DSDT.dimmpxm",
+"tests/data/acpi/pc/DSDT.hpbridge",
+"tests/data/acpi/pc/DSDT.ipmikcs",
+"tests/data/acpi/pc/DSDT.memhp",
+"tests/data/acpi/pc/DSDT.nohpet",
+"tests/data/acpi/pc/DSDT.numamem",
+"tests/data/acpi/pc/DSDT.roothp",
+"tests/data/acpi/q35/DSDT",
+"tests/data/acpi/q35/DSDT.acpierst",
+"tests/data/acpi/q35/DSDT.acpihmat",
+"tests/data/acpi/q35/DSDT.acpihmat-noinitiator",
+"tests/data/acpi/q35/DSDT.applesmc",
+"tests/data/acpi/q35/DSDT.bridge",
+"tests/data/acpi/q35/DSDT.core-count2",
+"tests/data/acpi/q35/DSDT.cphp",
+"tests/data/acpi/q35/DSDT.cxl",
+"tests/data/acpi/q35/DSDT.dimmpxm",
+"tests/data/acpi/q35/DSDT.ipmibt",
+"tests/data/acpi/q35/DSDT.ipmismbus",
+"tests/data/acpi/q35/DSDT.ivrs",
+"tests/data/acpi/q35/DSDT.memhp",
+"tests/data/acpi/q35/DSDT.mmio64",
+"tests/data/acpi/q35/DSDT.multi-bridge",
+"tests/data/acpi/q35/DSDT.nohpet",
+"tests/data/acpi/q35/DSDT.numamem",
+"tests/data/acpi/q35/DSDT.pvpanic-isa",
+"tests/data/acpi/q35/DSDT.tis.tpm12",
+"tests/data/acpi/q35/DSDT.tis.tpm2",
+"tests/data/acpi/q35/DSDT.viot",
+"tests/data/acpi/q35/DSDT.xapic",
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 40/73] pcihp: move PCI _DSM function 0 prolog into separate function
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (38 preceding siblings ...)
2023-03-08 1:12 ` [PULL 39/73] tests: acpi: whitelist DSDT blobs before isolating PCI _DSM func 0 prolog Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 41/73] tests: acpi: update expected blobs Michael S. Tsirkin
` (33 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Igor Mammedov, Ani Sinha, Paolo Bonzini,
Richard Henderson, Eduardo Habkost, Marcel Apfelbaum
From: Igor Mammedov <imammedo@redhat.com>
it will be reused by follow up patches that will implement
static _DSM for non-hotpluggable devices.
no functional AML change, only context one, where 'cap' (Local1)
initialization is moved after UUID/revision checks.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-15-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/i386/acpi-build.c | 54 ++++++++++++++++++++++++--------------------
1 file changed, 30 insertions(+), 24 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index c691104d47..d8ec91b8e3 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -373,6 +373,33 @@ Aml *aml_pci_device_dsm(void)
return method;
}
+static void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar)
+{
+ Aml *UUID, *ifctx1;
+ uint8_t byte_list[1] = { 0 }; /* nothing supported yet */
+
+ aml_append(ctx, aml_store(aml_buffer(1, byte_list), retvar));
+ /*
+ * PCI Firmware Specification 3.1
+ * 4.6. _DSM Definitions for PCI
+ */
+ UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D");
+ ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(0), UUID)));
+ {
+ /* call is for unsupported UUID, bail out */
+ aml_append(ifctx1, aml_return(retvar));
+ }
+ aml_append(ctx, ifctx1);
+
+ ifctx1 = aml_if(aml_lless(aml_arg(1), aml_int(2)));
+ {
+ /* call is for unsupported REV, bail out */
+ aml_append(ifctx1, aml_return(retvar));
+ }
+ aml_append(ctx, ifctx1);
+}
+
+
static void build_append_pcihp_notify_entry(Aml *method, int slot)
{
Aml *if_ctx;
@@ -570,14 +597,13 @@ static bool build_append_notfication_callback(Aml *parent_scope,
static Aml *aml_pci_pdsm(void)
{
- Aml *method, *UUID, *ifctx, *ifctx1;
+ Aml *method, *ifctx, *ifctx1;
Aml *ret = aml_local(0);
Aml *caps = aml_local(1);
Aml *acpi_index = aml_local(2);
Aml *zero = aml_int(0);
Aml *one = aml_int(1);
Aml *func = aml_arg(2);
- Aml *rev = aml_arg(1);
Aml *params = aml_arg(4);
Aml *bnum = aml_derefof(aml_index(params, aml_int(0)));
Aml *sunum = aml_derefof(aml_index(params, aml_int(1)));
@@ -587,29 +613,9 @@ static Aml *aml_pci_pdsm(void)
/* get supported functions */
ifctx = aml_if(aml_equal(func, zero));
{
- uint8_t byte_list[1] = { 0 }; /* nothing supported yet */
- aml_append(ifctx, aml_store(aml_buffer(1, byte_list), ret));
+ build_append_pci_dsm_func0_common(ifctx, ret);
+
aml_append(ifctx, aml_store(zero, caps));
-
- /*
- * PCI Firmware Specification 3.1
- * 4.6. _DSM Definitions for PCI
- */
- UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D");
- ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(0), UUID)));
- {
- /* call is for unsupported UUID, bail out */
- aml_append(ifctx1, aml_return(ret));
- }
- aml_append(ifctx, ifctx1);
-
- ifctx1 = aml_if(aml_lless(rev, aml_int(2)));
- {
- /* call is for unsupported REV, bail out */
- aml_append(ifctx1, aml_return(ret));
- }
- aml_append(ifctx, ifctx1);
-
aml_append(ifctx,
aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
/*
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 41/73] tests: acpi: update expected blobs
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (39 preceding siblings ...)
2023-03-08 1:12 ` [PULL 40/73] pcihp: move PCI _DSM function 0 prolog into separate function Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 42/73] tests: acpi: whitelist DSDT before adding EDSM method Michael S. Tsirkin
` (32 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
only following context change:
- Local1 = Zero
If ((Arg0 != ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
Return (Local0)
...
Return (Local0)
}
+ Local1 = Zero
Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One]
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-16-imammedo@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 35 ------------------
tests/data/acpi/pc/DSDT | Bin 6360 -> 6360 bytes
tests/data/acpi/pc/DSDT.acpierst | Bin 6283 -> 6283 bytes
tests/data/acpi/pc/DSDT.acpihmat | Bin 7685 -> 7685 bytes
tests/data/acpi/pc/DSDT.bridge | Bin 12487 -> 12487 bytes
tests/data/acpi/pc/DSDT.cphp | Bin 6824 -> 6824 bytes
tests/data/acpi/pc/DSDT.dimmpxm | Bin 8014 -> 8014 bytes
tests/data/acpi/pc/DSDT.hpbridge | Bin 6323 -> 6323 bytes
tests/data/acpi/pc/DSDT.ipmikcs | Bin 6432 -> 6432 bytes
tests/data/acpi/pc/DSDT.memhp | Bin 7719 -> 7719 bytes
tests/data/acpi/pc/DSDT.nohpet | Bin 6218 -> 6218 bytes
tests/data/acpi/pc/DSDT.numamem | Bin 6366 -> 6366 bytes
tests/data/acpi/pc/DSDT.roothp | Bin 9745 -> 9745 bytes
tests/data/acpi/q35/DSDT | Bin 8252 -> 8252 bytes
tests/data/acpi/q35/DSDT.acpierst | Bin 8269 -> 8269 bytes
tests/data/acpi/q35/DSDT.acpihmat | Bin 9577 -> 9577 bytes
tests/data/acpi/q35/DSDT.acpihmat-noinitiator | Bin 8531 -> 8531 bytes
tests/data/acpi/q35/DSDT.applesmc | Bin 8298 -> 8298 bytes
tests/data/acpi/q35/DSDT.bridge | Bin 11481 -> 11481 bytes
tests/data/acpi/q35/DSDT.core-count2 | Bin 32392 -> 32392 bytes
tests/data/acpi/q35/DSDT.cphp | Bin 8716 -> 8716 bytes
tests/data/acpi/q35/DSDT.cxl | Bin 9564 -> 9564 bytes
tests/data/acpi/q35/DSDT.dimmpxm | Bin 9906 -> 9906 bytes
tests/data/acpi/q35/DSDT.ipmibt | Bin 8327 -> 8327 bytes
tests/data/acpi/q35/DSDT.ipmismbus | Bin 8340 -> 8340 bytes
tests/data/acpi/q35/DSDT.ivrs | Bin 8269 -> 8269 bytes
tests/data/acpi/q35/DSDT.memhp | Bin 9611 -> 9611 bytes
tests/data/acpi/q35/DSDT.mmio64 | Bin 9382 -> 9382 bytes
tests/data/acpi/q35/DSDT.multi-bridge | Bin 12545 -> 12545 bytes
tests/data/acpi/q35/DSDT.nohpet | Bin 8110 -> 8110 bytes
tests/data/acpi/q35/DSDT.numamem | Bin 8258 -> 8258 bytes
tests/data/acpi/q35/DSDT.pvpanic-isa | Bin 8353 -> 8353 bytes
tests/data/acpi/q35/DSDT.tis.tpm12 | Bin 8858 -> 8858 bytes
tests/data/acpi/q35/DSDT.tis.tpm2 | Bin 8884 -> 8884 bytes
tests/data/acpi/q35/DSDT.viot | Bin 9361 -> 9361 bytes
tests/data/acpi/q35/DSDT.xapic | Bin 35615 -> 35615 bytes
36 files changed, 35 deletions(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index 7e7745db39..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,36 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/pc/DSDT",
-"tests/data/acpi/pc/DSDT.acpierst",
-"tests/data/acpi/pc/DSDT.acpihmat",
-"tests/data/acpi/pc/DSDT.bridge",
-"tests/data/acpi/pc/DSDT.cphp",
-"tests/data/acpi/pc/DSDT.dimmpxm",
-"tests/data/acpi/pc/DSDT.hpbridge",
-"tests/data/acpi/pc/DSDT.ipmikcs",
-"tests/data/acpi/pc/DSDT.memhp",
-"tests/data/acpi/pc/DSDT.nohpet",
-"tests/data/acpi/pc/DSDT.numamem",
-"tests/data/acpi/pc/DSDT.roothp",
-"tests/data/acpi/q35/DSDT",
-"tests/data/acpi/q35/DSDT.acpierst",
-"tests/data/acpi/q35/DSDT.acpihmat",
-"tests/data/acpi/q35/DSDT.acpihmat-noinitiator",
-"tests/data/acpi/q35/DSDT.applesmc",
-"tests/data/acpi/q35/DSDT.bridge",
-"tests/data/acpi/q35/DSDT.core-count2",
-"tests/data/acpi/q35/DSDT.cphp",
-"tests/data/acpi/q35/DSDT.cxl",
-"tests/data/acpi/q35/DSDT.dimmpxm",
-"tests/data/acpi/q35/DSDT.ipmibt",
-"tests/data/acpi/q35/DSDT.ipmismbus",
-"tests/data/acpi/q35/DSDT.ivrs",
-"tests/data/acpi/q35/DSDT.memhp",
-"tests/data/acpi/q35/DSDT.mmio64",
-"tests/data/acpi/q35/DSDT.multi-bridge",
-"tests/data/acpi/q35/DSDT.nohpet",
-"tests/data/acpi/q35/DSDT.numamem",
-"tests/data/acpi/q35/DSDT.pvpanic-isa",
-"tests/data/acpi/q35/DSDT.tis.tpm12",
-"tests/data/acpi/q35/DSDT.tis.tpm2",
-"tests/data/acpi/q35/DSDT.viot",
-"tests/data/acpi/q35/DSDT.xapic",
diff --git a/tests/data/acpi/pc/DSDT b/tests/data/acpi/pc/DSDT
index 0b475fb5a966543fef2cd7672a0b198838a63151..ec133a6d3aabcfd22b7b46019338db2de255da70 100644
GIT binary patch
delta 19
acmca%c*Af*JmcgfMinN8#LcaY!Quc(l?Foq
delta 20
bcmca%c*Af*JR@@fL*nFkMwQKNj6vc6P%j3t
diff --git a/tests/data/acpi/pc/DSDT.acpierst b/tests/data/acpi/pc/DSDT.acpierst
index 17ef7caeb6fe4445f1234ff060c3db6809184ef6..2b4b7f31919f360e038e37de713639da753f13aa 100644
GIT binary patch
delta 19
acmeA+>^9sG&p0`WQH6;iadRspn>YYICk0#p
delta 20
bcmeA+>^9sG&&XWBkT^M>QDt)*Bda(7L?;Ex
diff --git a/tests/data/acpi/pc/DSDT.acpihmat b/tests/data/acpi/pc/DSDT.acpihmat
index 675b674eaa92d99513ac243a97064d369791ee53..714a123e7a500cf0f862ff6c4e9a3f50a96af056 100644
GIT binary patch
delta 19
acmZp*X|>r9&p0`WQH6;iadRtUgA4#az6Ip~
delta 20
bcmZp*X|>r9&&XWBkT^M>QDt)*W4#OjMaTwI
diff --git a/tests/data/acpi/pc/DSDT.bridge b/tests/data/acpi/pc/DSDT.bridge
index c1ce06136619f55c084a34c51997c059c29cb06a..6c0543cf75ad3e02468ed4925fd3369a183e9b45 100644
GIT binary patch
delta 19
acmX?}csy}KJmcgfMinN8#LcaYPWk{%hX#lM
delta 20
bcmX?}csy}KJR@@fL*nFkMwQKNjE?#MR9^=6
diff --git a/tests/data/acpi/pc/DSDT.cphp b/tests/data/acpi/pc/DSDT.cphp
index 754ab854dc48fc1af2d335e7269c23a056e66eb8..e1bcb0a4f3ee1269bdd5e949206b40d0e3c076e6 100644
GIT binary patch
delta 19
acmZ2sy25lrJmcgfMinN8#LcaY%8~#={{_7O
delta 20
bcmZ2sy25lrJR@@fL*nFkMwQKNj7pLKNkIlH
diff --git a/tests/data/acpi/pc/DSDT.dimmpxm b/tests/data/acpi/pc/DSDT.dimmpxm
index 170503336b3fd94cc7a4356003fa080f0ef57b01..1c90e119c5d3dc7e86d04942114e5cfe40de6039 100644
GIT binary patch
delta 19
acmX?Scg}7@JmcgfMinN8#LcaYCuIRj*#^Y`
delta 20
bcmX?Scg}7@JR@@fL*nFkMwQKNj3;CPQF#Y5
diff --git a/tests/data/acpi/pc/DSDT.hpbridge b/tests/data/acpi/pc/DSDT.hpbridge
index 5dea100bc9492bb2367aac8660522201785c1efb..04e1c20f63be7c6c574e72590332707ca410852a 100644
GIT binary patch
delta 19
acmdmNxY=++JmcgfMinN8#LcaYdg1^?7X{P+
delta 20
bcmdmNxY=++JR@@fL*nFkMwQKNjJo0gN@oT_
diff --git a/tests/data/acpi/pc/DSDT.ipmikcs b/tests/data/acpi/pc/DSDT.ipmikcs
index dd7135602709fc4a361930c74f9bebc6b32e6916..3c2aba132f10b5e4a9931877533a9d8f260b7381 100644
GIT binary patch
delta 19
acmZ2rw7_UXJmcgfMinN8#LcaYv&8{IX9gVr
delta 20
bcmZ2rw7_UXJR@@fL*nFkMwQKNjI+c6NRtMO
diff --git a/tests/data/acpi/pc/DSDT.memhp b/tests/data/acpi/pc/DSDT.memhp
index 2f895e9b385c1ae2f58c7ade4de02328b1be7356..811965f42d97adadde6e9ec6d6153e767041bc6d 100644
GIT binary patch
delta 19
acmZ2(v)pDwJmcgfMinN8#LcaYi(~*q$_7gS
delta 20
bcmZ2(v)pDwJR@@fL*nFkMwQKNj0<G|OBe>Z
diff --git a/tests/data/acpi/pc/DSDT.nohpet b/tests/data/acpi/pc/DSDT.nohpet
index c012b63ace2f359eec0368ed22ef507ee3905c78..bbf73023ade329770ff9f9ac5c897218764182b5 100644
GIT binary patch
delta 19
acmX?QaLQmqJmcgfMinN8#LcaYN5ue0UIvx`
delta 20
bcmX?QaLQmqJR@@fL*nFkMwQKNj7P)(PTB_q
diff --git a/tests/data/acpi/pc/DSDT.numamem b/tests/data/acpi/pc/DSDT.numamem
index f2ef4b97290cc58c514c3ce7fd45cb08214d7138..c5d93366a417ad1a92c01659f1db9c159caa7132 100644
GIT binary patch
delta 19
acmca-c+YS{JmcgfMinN8#LcaYk>UVKc?MMg
delta 20
bcmca-c+YS{JR@@fL*nFkMwQKNj1l4hQ6C1w
diff --git a/tests/data/acpi/pc/DSDT.roothp b/tests/data/acpi/pc/DSDT.roothp
index 657c8263f0c649abc806a67576fd74cb32af60c3..9e3d482366bd800cf987044801eebc814629b15b 100644
GIT binary patch
delta 19
acmbQ}Gtp;5JmcgfMinN8#LcaYJt_c0t_Cpx
delta 20
bcmbQ}Gtp;5JR@@fL*nFkMwQKNjNK{#N$>`r
diff --git a/tests/data/acpi/q35/DSDT b/tests/data/acpi/q35/DSDT
index d68c472b460e4609a64ea67de3c4cebfca76164d..c304e15e366d7317fd0e9db0a144f02e0437d7a1 100644
GIT binary patch
delta 19
acmdnvu*YG864PW=CKV=z#LXT|Ut|G790nW!
delta 20
bcmdnvu*YG85)*R)L*is5CY8;eOrK=|NfZW(
diff --git a/tests/data/acpi/q35/DSDT.acpierst b/tests/data/acpi/q35/DSDT.acpierst
index de7ae27125f9667d7aa7a7cc0e8210773b61a2e2..3aa5c4b3193d32bb8263a1fe06c05b714541c532 100644
GIT binary patch
delta 19
acmX@>aModi64PW=CKV=z#LXT|ta1QCqXkd^
delta 20
bcmX@>aModi5)*R)L*is5CY8;eOe}H$NxcQW
diff --git a/tests/data/acpi/q35/DSDT.acpihmat b/tests/data/acpi/q35/DSDT.acpihmat
index 48e2862257ac614b5fd6391c4ec425106c48afb1..3ffbf8f83f64144ace17ff5f06bcb4fec9df33d9 100644
GIT binary patch
delta 19
acmaFq_0nsD64PW=CKV=z#LXT|ipl^;Bn7<y
delta 20
bcmaFq_0nsD5)*R)L*is5CY8;eObW^XPl^UB
diff --git a/tests/data/acpi/q35/DSDT.acpihmat-noinitiator b/tests/data/acpi/q35/DSDT.acpihmat-noinitiator
index 30a4aa2ec8feb6012a64d476ff37b14717d20eaf..ebec32b575d310f98937fe9208f0c60349ca753d 100644
GIT binary patch
delta 19
acmccYblGWx64PW=CKV=z#LXT|-0}cJ%mrrv
delta 20
bcmccYblGWx5)*R)L*is5CY8;eOkDB+O7;cS
diff --git a/tests/data/acpi/q35/DSDT.applesmc b/tests/data/acpi/q35/DSDT.applesmc
index 84e2b5cbc4483ae93634f223160253231dcc4932..b0994644ec811b962e80f49e36e122967f5af1d1 100644
GIT binary patch
delta 19
acmaFm@XBF>64PW=CKV=z#LXT|N^$^3@dc*<
delta 20
bcmaFm@XBF>5)*R)L*is5CY8;eOp0;<PDKV4
diff --git a/tests/data/acpi/q35/DSDT.bridge b/tests/data/acpi/q35/DSDT.bridge
index e411d40fd1e297879d78dcf15486dd465ab54568..8e11b8ea4862c8ec27376703c9c43e9895ca60eb 100644
GIT binary patch
delta 19
acmcZ^c{6f@64PW=CKV=z#LXT|6SV+H$p$h2
delta 20
bcmcZ^c{6f@5)*R)L*is5CY8;eOcS&KP%Q?a
diff --git a/tests/data/acpi/q35/DSDT.core-count2 b/tests/data/acpi/q35/DSDT.core-count2
index 0603db8cc63cfc562f83e55eaf5162e7c29bf4d1..a895599c3c53c0cd0888ec166a30d6c036d26b93 100644
GIT binary patch
delta 21
ccmeD9%h>Ukaf1@mWK|{=CWge#9!w5309TO)+W-In
delta 22
dcmeD9%h>Ukaf1>Qa{)u*WF;n*&7Ms5H2`0o2T1?`
diff --git a/tests/data/acpi/q35/DSDT.cphp b/tests/data/acpi/q35/DSDT.cphp
index beeb83c33b385fc8b41d44f299b8d9ba7203d935..725998cb587c02ac963f290bac5c14d665bc85e9 100644
GIT binary patch
delta 19
acmeBi>2cYh#57rzNrj0aakB^05qSVRh6R=Y
delta 20
bcmeBi>2cYh#Kc^{kT_Y1NoBJq(_wi4LM8?T
diff --git a/tests/data/acpi/q35/DSDT.cxl b/tests/data/acpi/q35/DSDT.cxl
index 4586b9a18b24acd946cd32c7e3e3a70891a246d2..d87736dccf18631bbaf0a4505d0f5d83d7501a15 100644
GIT binary patch
delta 19
acmccPb;oOi64PW=CKV=z#LXT|BFX?pHU*Xd
delta 20
bcmccPb;oOi5)*R)L*is5CY8;eOv1_lO@aml
diff --git a/tests/data/acpi/q35/DSDT.dimmpxm b/tests/data/acpi/q35/DSDT.dimmpxm
index 99a93e12a7faac78e9524ad6758f42c5c0df18eb..ef643b4ee02cacb9a55f89b8e7f05524125515a1 100644
GIT binary patch
delta 19
acmdnwyUBNh64PW=CKV=z#LXT|St<ZQVFjN6
delta 20
bcmdnwyUBNh5)*R)L*is5CY8;eOqnVGNM8mG
diff --git a/tests/data/acpi/q35/DSDT.ipmibt b/tests/data/acpi/q35/DSDT.ipmibt
index 7f7601dbff820044aa646048c0bfe0e6324b9d0d..b136aea961c89a97db09db9b68809979564d8faf 100644
GIT binary patch
delta 19
acmZp7Y<JwC#57rzNrj0aakB@Ly&M2JVFdsH
delta 20
bcmZp7Y<JwC#Kc^{kT_Y1NoBJqlbsv@Kk)@_
diff --git a/tests/data/acpi/q35/DSDT.ipmismbus b/tests/data/acpi/q35/DSDT.ipmismbus
index 6c5d1afe443d9261d3b93801711f8d5b267696f3..0970dbd5896fc0038b1369dbbcc982ead7736ae6 100644
GIT binary patch
delta 19
acmbQ@IK^>;64PW=CKV=z#LXT|K5_s%PX#9c
delta 20
bcmbQ@IK^>;5)*R)L*is5CY8;eOx|(;LHPxh
diff --git a/tests/data/acpi/q35/DSDT.ivrs b/tests/data/acpi/q35/DSDT.ivrs
index de7ae27125f9667d7aa7a7cc0e8210773b61a2e2..3aa5c4b3193d32bb8263a1fe06c05b714541c532 100644
GIT binary patch
delta 19
acmX@>aModi64PW=CKV=z#LXT|ta1QCqXkd^
delta 20
bcmX@>aModi5)*R)L*is5CY8;eOe}H$NxcQW
diff --git a/tests/data/acpi/q35/DSDT.memhp b/tests/data/acpi/q35/DSDT.memhp
index 79bce5c8f0132e72b8e700488ea56c7593737810..9709e5a7a7edcb7509954b553f7bf29a424033db 100644
GIT binary patch
delta 19
acmeD7?)KiG#57rzNrj0aakB@LvoZiXQUxUd
delta 20
bcmeD7?)KiG#Kc^{kT_Y1NoBJqlan$4LH-4k
diff --git a/tests/data/acpi/q35/DSDT.mmio64 b/tests/data/acpi/q35/DSDT.mmio64
index c249929add97439ceb9f891d44c425311517ad18..e1cd01f2349bb8c2f7f8badad11441ffe6d57acc 100644
GIT binary patch
delta 19
acmZ4Hxy*Be64PW=CKV=z#LXT|aY_I`4+U`m
delta 20
bcmZ4Hxy*Be5)*R)L*is5CY8;eOtDG;MePOO
diff --git a/tests/data/acpi/q35/DSDT.multi-bridge b/tests/data/acpi/q35/DSDT.multi-bridge
index f2f60fdbb3b44ab9adb69bb36e4a80978536af9b..3b9dffb565833cc87bbf08dadfc1f31ac858e93b 100644
GIT binary patch
delta 19
acmZonYE0Uo#57rzNrj0aakB^0PCWoU?*+gB
delta 20
bcmZonYE0Uo#Kc^{kT_Y1NoBJq(+)iVM70Jk
diff --git a/tests/data/acpi/q35/DSDT.nohpet b/tests/data/acpi/q35/DSDT.nohpet
index 9ff9983a80a7487470ccd02ce587200444675816..2cf7f6db0fd8de357278f942a4082e714804dca9 100644
GIT binary patch
delta 19
acmZ2yzs`Px64PW=CKV=z#LXT|X|e!5<^^y7
delta 20
bcmZ2yzs`Px5)*R)L*is5CY8;eOsTQ}MZg8#
diff --git a/tests/data/acpi/q35/DSDT.numamem b/tests/data/acpi/q35/DSDT.numamem
index 1e7c45ef3ccb000a06f64152622b4bd27916d181..310e3d5053b90863f96c29dd69a514b4999b4a19 100644
GIT binary patch
delta 19
acmX@)aL8eU64PW=CKV=z#LXT|zhnVJ00u4q
delta 20
bcmX@)aL8eU5)*R)L*is5CY8;eOh07-N(2U+
diff --git a/tests/data/acpi/q35/DSDT.pvpanic-isa b/tests/data/acpi/q35/DSDT.pvpanic-isa
index ed47451c44e3041e5b7fed55de7b6ef1aca54350..6672b6fa05c8ee30a8ea4ab0931d59c1315a4e9c 100644
GIT binary patch
delta 19
acmZ4JxX^Kf64PW=CKV=z#LXT|k#Yb%Jq1nx
delta 20
bcmZ4JxX^Kf5)*R)L*is5CY8;eOc8PbL;(f7
diff --git a/tests/data/acpi/q35/DSDT.tis.tpm12 b/tests/data/acpi/q35/DSDT.tis.tpm12
index efc2efc19f00ca7564467756616da44f5fd71cfe..eae2dc599331516e11632356f05d7831d1fa1e6a 100644
GIT binary patch
delta 19
acmbQ`I?Hu~64PW=CKV=z#LXT|K?(poy#+%6
delta 20
bcmbQ`I?Hu~5)*R)L*is5CY8;eOo0jjLwg0W
diff --git a/tests/data/acpi/q35/DSDT.tis.tpm2 b/tests/data/acpi/q35/DSDT.tis.tpm2
index 675339715f72b4400445ce8c0dd12f416aa0efb0..68c6a7d244cfc78efa6b9cd1385f2134ca149ad7 100644
GIT binary patch
delta 19
acmdnuy2W*a64PW=CKV=z#LXT|ISK$knFWym
delta 20
bcmdnuy2W*a5)*R)L*is5CY8;eOxX$mM~emj
diff --git a/tests/data/acpi/q35/DSDT.viot b/tests/data/acpi/q35/DSDT.viot
index eeb40b360f7c1de93501e1ddcd7dab306a51113b..4f93d46859b6c0a69afc41d5aa7585ebd686c1d2 100644
GIT binary patch
delta 19
acmbQ}Ini^264PW=CKV=z#LXT|o=N~a@dYvf
delta 20
bcmbQ}Ini^25)*R)L*is5CY8;eOdd)ALZt<u
diff --git a/tests/data/acpi/q35/DSDT.xapic b/tests/data/acpi/q35/DSDT.xapic
index 3aa86f07243f0449c7dc245650715d729744e3ee..e9b4881bdc72eb7c59dcf258c1a98363b46bfbcd 100644
GIT binary patch
delta 21
dcmbO~jcNWgrVUC=lU12im>3c_doW$^002#l2H*ey
delta 22
ecmbO~jcNWgrVUC=%moaIla-iMHhVH%>i_^$`Ug$`
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 42/73] tests: acpi: whitelist DSDT before adding EDSM method
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (40 preceding siblings ...)
2023-03-08 1:12 ` [PULL 41/73] tests: acpi: update expected blobs Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:12 ` [PULL 43/73] acpi: pci: add EDSM method to DSDT Michael S. Tsirkin
` (31 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-17-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 37 +++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..8911b10650 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,38 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/pc/DSDT",
+"tests/data/acpi/pc/DSDT.acpierst",
+"tests/data/acpi/pc/DSDT.acpihmat",
+"tests/data/acpi/pc/DSDT.bridge",
+"tests/data/acpi/pc/DSDT.cphp",
+"tests/data/acpi/pc/DSDT.dimmpxm",
+"tests/data/acpi/pc/DSDT.hpbridge",
+"tests/data/acpi/pc/DSDT.hpbrroot",
+"tests/data/acpi/pc/DSDT.ipmikcs",
+"tests/data/acpi/pc/DSDT.memhp",
+"tests/data/acpi/pc/DSDT.nohpet",
+"tests/data/acpi/pc/DSDT.numamem",
+"tests/data/acpi/pc/DSDT.roothp",
+"tests/data/acpi/q35/DSDT",
+"tests/data/acpi/q35/DSDT.acpierst",
+"tests/data/acpi/q35/DSDT.acpihmat",
+"tests/data/acpi/q35/DSDT.acpihmat-noinitiator",
+"tests/data/acpi/q35/DSDT.applesmc",
+"tests/data/acpi/q35/DSDT.bridge",
+"tests/data/acpi/q35/DSDT.core-count2",
+"tests/data/acpi/q35/DSDT.cphp",
+"tests/data/acpi/q35/DSDT.cxl",
+"tests/data/acpi/q35/DSDT.dimmpxm",
+"tests/data/acpi/q35/DSDT.ipmibt",
+"tests/data/acpi/q35/DSDT.ipmismbus",
+"tests/data/acpi/q35/DSDT.ivrs",
+"tests/data/acpi/q35/DSDT.memhp",
+"tests/data/acpi/q35/DSDT.mmio64",
+"tests/data/acpi/q35/DSDT.multi-bridge",
+"tests/data/acpi/q35/DSDT.noacpihp",
+"tests/data/acpi/q35/DSDT.nohpet",
+"tests/data/acpi/q35/DSDT.numamem",
+"tests/data/acpi/q35/DSDT.pvpanic-isa",
+"tests/data/acpi/q35/DSDT.tis.tpm12",
+"tests/data/acpi/q35/DSDT.tis.tpm2",
+"tests/data/acpi/q35/DSDT.viot",
+"tests/data/acpi/q35/DSDT.xapic",
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 43/73] acpi: pci: add EDSM method to DSDT
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (41 preceding siblings ...)
2023-03-08 1:12 ` [PULL 42/73] tests: acpi: whitelist DSDT before adding EDSM method Michael S. Tsirkin
@ 2023-03-08 1:12 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 44/73] tests: acpi: update expected blobs Michael S. Tsirkin
` (30 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:12 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Igor Mammedov, Ani Sinha, Paolo Bonzini,
Richard Henderson, Eduardo Habkost, Marcel Apfelbaum
From: Igor Mammedov <imammedo@redhat.com>
it's a helper method for acpi-index support on PCI buses
that do no support or have disabled ACPI PCI hotplug
or for non-hotpluggble endpoint devices.
(like non-hotpluggble NICs, integrated endpoints and
later for machines that do not support ACPI PCI hotplug)
no functional change, commit adds only EDSM method in DSDT
without any users. (the follow up patches will use it)
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-18-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/i386/acpi-build.c | 54 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index d8ec91b8e3..6f5501fb74 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -399,6 +399,58 @@ static void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar)
aml_append(ctx, ifctx1);
}
+static Aml *aml_pci_edsm(void)
+{
+ Aml *method, *ifctx;
+ Aml *zero = aml_int(0);
+ Aml *func = aml_arg(2);
+ Aml *ret = aml_local(0);
+ Aml *aidx = aml_local(1);
+ Aml *params = aml_arg(4);
+
+ method = aml_method("EDSM", 5, AML_SERIALIZED);
+
+ /* get supported functions */
+ ifctx = aml_if(aml_equal(func, zero));
+ {
+ /* 1: have supported functions */
+ /* 7: support for function 7 */
+ const uint8_t caps = 1 | BIT(7);
+ build_append_pci_dsm_func0_common(ifctx, ret);
+ aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
+ aml_append(ifctx, aml_return(ret));
+ }
+ aml_append(method, ifctx);
+
+ /* handle specific functions requests */
+ /*
+ * PCI Firmware Specification 3.1
+ * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
+ * Operating Systems
+ */
+ ifctx = aml_if(aml_equal(func, aml_int(7)));
+ {
+ Aml *pkg = aml_package(2);
+ aml_append(pkg, zero);
+ /* optional, if not impl. should return null string */
+ aml_append(pkg, aml_string("%s", ""));
+ aml_append(ifctx, aml_store(pkg, ret));
+
+ /*
+ * IASL is fine when initializing Package with computational data,
+ * however it makes guest unhappy /it fails to process such AML/.
+ * So use runtime assignment to set acpi-index after initializer
+ * to make OSPM happy.
+ */
+ aml_append(ifctx,
+ aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
+ aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
+ aml_append(ifctx, aml_return(ret));
+ }
+ aml_append(method, ifctx);
+
+ return method;
+}
static void build_append_pcihp_notify_entry(Aml *method, int slot)
{
@@ -1398,6 +1450,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid)));
+ aml_append(dev, aml_pci_edsm());
aml_append(sb_scope, dev);
aml_append(dsdt, sb_scope);
@@ -1413,6 +1466,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid)));
aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en));
+ aml_append(dev, aml_pci_edsm());
aml_append(sb_scope, dev);
if (mcfg_valid) {
aml_append(sb_scope, build_q35_dram_controller(&mcfg));
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 44/73] tests: acpi: update expected blobs
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (42 preceding siblings ...)
2023-03-08 1:12 ` [PULL 43/73] acpi: pci: add EDSM method to DSDT Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 45/73] tests: acpi: whitelist DSDT before adding device with acpi-index to testcases Michael S. Tsirkin
` (29 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-19-imammedo@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 37 ------------------
tests/data/acpi/pc/DSDT | Bin 6360 -> 6454 bytes
tests/data/acpi/pc/DSDT.acpierst | Bin 6283 -> 6377 bytes
tests/data/acpi/pc/DSDT.acpihmat | Bin 7685 -> 7779 bytes
tests/data/acpi/pc/DSDT.bridge | Bin 12487 -> 12581 bytes
tests/data/acpi/pc/DSDT.cphp | Bin 6824 -> 6918 bytes
tests/data/acpi/pc/DSDT.dimmpxm | Bin 8014 -> 8108 bytes
tests/data/acpi/pc/DSDT.hpbridge | Bin 6323 -> 6417 bytes
tests/data/acpi/pc/DSDT.hpbrroot | Bin 3166 -> 3260 bytes
tests/data/acpi/pc/DSDT.ipmikcs | Bin 6432 -> 6526 bytes
tests/data/acpi/pc/DSDT.memhp | Bin 7719 -> 7813 bytes
tests/data/acpi/pc/DSDT.nohpet | Bin 6218 -> 6312 bytes
tests/data/acpi/pc/DSDT.numamem | Bin 6366 -> 6460 bytes
tests/data/acpi/pc/DSDT.roothp | Bin 9745 -> 9839 bytes
tests/data/acpi/q35/DSDT | Bin 8252 -> 8344 bytes
tests/data/acpi/q35/DSDT.acpierst | Bin 8269 -> 8361 bytes
tests/data/acpi/q35/DSDT.acpihmat | Bin 9577 -> 9669 bytes
tests/data/acpi/q35/DSDT.acpihmat-noinitiator | Bin 8531 -> 8623 bytes
tests/data/acpi/q35/DSDT.applesmc | Bin 8298 -> 8390 bytes
tests/data/acpi/q35/DSDT.bridge | Bin 11481 -> 11573 bytes
tests/data/acpi/q35/DSDT.core-count2 | Bin 32392 -> 32484 bytes
tests/data/acpi/q35/DSDT.cphp | Bin 8716 -> 8808 bytes
tests/data/acpi/q35/DSDT.cxl | Bin 9564 -> 9656 bytes
tests/data/acpi/q35/DSDT.dimmpxm | Bin 9906 -> 9998 bytes
tests/data/acpi/q35/DSDT.ipmibt | Bin 8327 -> 8419 bytes
tests/data/acpi/q35/DSDT.ipmismbus | Bin 8340 -> 8432 bytes
tests/data/acpi/q35/DSDT.ivrs | Bin 8269 -> 8361 bytes
tests/data/acpi/q35/DSDT.memhp | Bin 9611 -> 9703 bytes
tests/data/acpi/q35/DSDT.mmio64 | Bin 9382 -> 9474 bytes
tests/data/acpi/q35/DSDT.multi-bridge | Bin 12545 -> 12637 bytes
tests/data/acpi/q35/DSDT.noacpihp | Bin 8022 -> 8114 bytes
tests/data/acpi/q35/DSDT.nohpet | Bin 8110 -> 8202 bytes
tests/data/acpi/q35/DSDT.numamem | Bin 8258 -> 8350 bytes
tests/data/acpi/q35/DSDT.pvpanic-isa | Bin 8353 -> 8445 bytes
tests/data/acpi/q35/DSDT.tis.tpm12 | Bin 8858 -> 8950 bytes
tests/data/acpi/q35/DSDT.tis.tpm2 | Bin 8884 -> 8976 bytes
tests/data/acpi/q35/DSDT.viot | Bin 9361 -> 9453 bytes
tests/data/acpi/q35/DSDT.xapic | Bin 35615 -> 35707 bytes
38 files changed, 37 deletions(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index 8911b10650..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,38 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/pc/DSDT",
-"tests/data/acpi/pc/DSDT.acpierst",
-"tests/data/acpi/pc/DSDT.acpihmat",
-"tests/data/acpi/pc/DSDT.bridge",
-"tests/data/acpi/pc/DSDT.cphp",
-"tests/data/acpi/pc/DSDT.dimmpxm",
-"tests/data/acpi/pc/DSDT.hpbridge",
-"tests/data/acpi/pc/DSDT.hpbrroot",
-"tests/data/acpi/pc/DSDT.ipmikcs",
-"tests/data/acpi/pc/DSDT.memhp",
-"tests/data/acpi/pc/DSDT.nohpet",
-"tests/data/acpi/pc/DSDT.numamem",
-"tests/data/acpi/pc/DSDT.roothp",
-"tests/data/acpi/q35/DSDT",
-"tests/data/acpi/q35/DSDT.acpierst",
-"tests/data/acpi/q35/DSDT.acpihmat",
-"tests/data/acpi/q35/DSDT.acpihmat-noinitiator",
-"tests/data/acpi/q35/DSDT.applesmc",
-"tests/data/acpi/q35/DSDT.bridge",
-"tests/data/acpi/q35/DSDT.core-count2",
-"tests/data/acpi/q35/DSDT.cphp",
-"tests/data/acpi/q35/DSDT.cxl",
-"tests/data/acpi/q35/DSDT.dimmpxm",
-"tests/data/acpi/q35/DSDT.ipmibt",
-"tests/data/acpi/q35/DSDT.ipmismbus",
-"tests/data/acpi/q35/DSDT.ivrs",
-"tests/data/acpi/q35/DSDT.memhp",
-"tests/data/acpi/q35/DSDT.mmio64",
-"tests/data/acpi/q35/DSDT.multi-bridge",
-"tests/data/acpi/q35/DSDT.noacpihp",
-"tests/data/acpi/q35/DSDT.nohpet",
-"tests/data/acpi/q35/DSDT.numamem",
-"tests/data/acpi/q35/DSDT.pvpanic-isa",
-"tests/data/acpi/q35/DSDT.tis.tpm12",
-"tests/data/acpi/q35/DSDT.tis.tpm2",
-"tests/data/acpi/q35/DSDT.viot",
-"tests/data/acpi/q35/DSDT.xapic",
diff --git a/tests/data/acpi/pc/DSDT b/tests/data/acpi/pc/DSDT
index ec133a6d3aabcfd22b7b46019338db2de255da70..521062a756d1fcd5939683e41071d29407a45b22 100644
GIT binary patch
delta 111
zcmca%xXp;mCD<jzOp<|tv1=k%s-6Q!e6Uk|bdv{rfU~CoN4$rp3y<RkE@qB+N0%T5
zj`&bd7X}e;R#%r`U)}{~lfxKwRk<2F5*QekBrK4boW;dnAjHbVz{`+O(A<&3z>rvw
L2$9@4(Om)nP{SR3
delta 57
zcmdmHbi<I#CD<k8h6Dox<GG1ksY*)m!A|kfP0|6*o(3H89-b~dju*I?IpQ5%f*3gB
NLp@y>HokY4008b%5ODwi
diff --git a/tests/data/acpi/pc/DSDT.acpierst b/tests/data/acpi/pc/DSDT.acpierst
index 2b4b7f31919f360e038e37de713639da753f13aa..12b9e94bf1449995d460edffd40d1ff7b9f292cc 100644
GIT binary patch
delta 111
zcmeA+d}+w#66_N4Qi6ejk!vDXs-6Q!e6Uk|bdv{rfU~CoN4$rp3y<RkE@qB+N0%T5
zj`&bd7X}e;R#%r`U)}{~lfxKwRk<2F5*QekBrK4boW;dnAjHbVz{`+O(A<&3z>rvw
L2$9@4@s~INTzwuz
delta 57
zcmaE9*loz=66_MvEy2LR=sS@sRY@s6*eO1`NjkvU(|{x1!_$Sw@d6h!N4%p;5Ccbi
MsHY3V#`nL(0md{CIsgCw
diff --git a/tests/data/acpi/pc/DSDT.acpihmat b/tests/data/acpi/pc/DSDT.acpihmat
index 714a123e7a500cf0f862ff6c4e9a3f50a96af056..876d0184d8d56cc2fc9d4c0a619d5d449ba81687 100644
GIT binary patch
delta 111
zcmZp*d2GYw66_L^EXTmW=suAvRnLJVKG-Qfy2*n*z}eG)Bi_T)g~#y%7c)n^qe~D2
zM|`NK3xkL^tE)?}FYf}g$zhDTs$7j72@DKN5*Elz&f;P(5MpIw;AKcCXzs{iU`Q-T
Lgh+0jSRxAmL&P17
delta 57
zcmaEC(`v)z66_MfD#yUU*fo(WRY@s6*eO1`NjkvU(|{x1!_$Sw@d6h!N4%p;5Ccbi
MsHY3V#`h(%0J(t=fdBvi
diff --git a/tests/data/acpi/pc/DSDT.bridge b/tests/data/acpi/pc/DSDT.bridge
index 6c0543cf75ad3e02468ed4925fd3369a183e9b45..219ddba2713015616e41c19f66d891c63b05e4ab 100644
GIT binary patch
delta 111
zcmX?}xHO5&CD<iI)sTUK@zO-DR6Pfd_+Y2_=q3;L0B27Fj(87G7aqq8T+AHtjxIqA
z9Py!^E({{xtgbG>zPt;}CWkTVs&X}UBrq^6Nmw8=Ig5+EK!}xzftMknpt&Q5fg!OV
L5hA&9qL~2zi1!{4
delta 57
zcmZ3QbUcyECD<k8xB&wLqu4~QR3)YOV5j)#Cg}iYPXms44^I~!#|vD{9Py4WK@1%6
Np`I=b8{eB5007;{5Cs4L
diff --git a/tests/data/acpi/pc/DSDT.cphp b/tests/data/acpi/pc/DSDT.cphp
index e1bcb0a4f3ee1269bdd5e949206b40d0e3c076e6..5b5b352a13947a48f98e46409b9ad9664b4de9bc 100644
GIT binary patch
delta 111
zcmZ2s+GfV(66_MfCe6UW_--Oss-6Q!e6Uk|bdv{rfU~CoN4$rp3y<RkE@qB+N0%T5
zj`&bd7X}e;R#%r`U)}{~lfxKwRk<2F5*QekBrK4boW;dnAjHbVz{`+O(A<&3z>rvw
L2$9@4QCtcDJ{uh@
delta 57
zcmZoOTVcxO66_MPLW+Tb(P$!9s*+NCuv2_=lXQTyrvXR2ho=jV;{`5ej(A6xAO?>3
MP)`?zjqk;!0Jqi;ApigX
diff --git a/tests/data/acpi/pc/DSDT.dimmpxm b/tests/data/acpi/pc/DSDT.dimmpxm
index 1c90e119c5d3dc7e86d04942114e5cfe40de6039..fbe755975d94e5e607820bb7acb2fb189b1105ee 100644
GIT binary patch
delta 111
zcmX?Sx5l2!CD<iojXVPb<F1KZsd^3^@xe~<(M=xg0nVNV9Pu8WE<BDGxR^QO9bJML
zIO0P+T^K~XSzTR%eR&s{O%7w!Rpn~zNMK-ClCVH#auyeRfe<Sb1202DL32kA14Cj#
LB1CfI#JzF=m%$#Y
delta 57
zcmZ2uf6k7}CD<jzPo9B+@$W>gR3)YOV5j)#Cg}iYPXms44^I~!#|vD{9Py4WK@1%6
Np`I=b8{hAh0|4L15T5`5
diff --git a/tests/data/acpi/pc/DSDT.hpbridge b/tests/data/acpi/pc/DSDT.hpbridge
index 04e1c20f63be7c6c574e72590332707ca410852a..12d7daf950ba93deaeb67655d303df3960569a64 100644
GIT binary patch
delta 111
zcmdmNIMIm9CD<iIP?CXx@#{pcR6Pfd_+Y2_=q3;L0B27Fj(87G7aqq8T+AHtjxIqA
z9Py!^E({{xtgbG>zPt;}CWkTVs&X}UBrq^6Nmw8=Ig5+EK!}xzftMknpt&Q5fg!OV
L5hA&9qLKsvN_rhr
delta 57
zcmbPewAql$CD<iovjhVJqvb@dR3)YOV5j)#Cg}iYPXms44^I~!#|vD{9Py4WK@1%6
Np`I=b8{aEQ006z=4@dw2
diff --git a/tests/data/acpi/pc/DSDT.hpbrroot b/tests/data/acpi/pc/DSDT.hpbrroot
index 893ab221c2cca1829937a4c26152680313633df4..bfe0bf37180c0f0521d264d3e35b5f51feff2630 100644
GIT binary patch
delta 152
zcmca7u}6~2CD<io4-W$aqyI#%)OrVw_+Y2_=q3;L0B27Fj(87G7aqq8T+AHtjxIqA
z9Py!^E({{xtgbG>zPt;}CTB4e2r@G=BrK4cG&w_1m`mV-`N^ljrd7TZ#b5bK9(ML!
zlCXe%Y9<%cl7s@T#*PFA2B3h<<SZ`s0wGo=2404Qg657K28P6fM6e`d!p4bbxdG~5
BEdl@l
delta 57
zcmdlZc~64NCD<h-j)#GPaneMtR3)YOV5j)#Cg}iYPXms44^I~!#|vD{9Py4WK@1%6
Np`I=b8{ePh1^~nh5CQ-I
diff --git a/tests/data/acpi/pc/DSDT.ipmikcs b/tests/data/acpi/pc/DSDT.ipmikcs
index 3c2aba132f10b5e4a9931877533a9d8f260b7381..3a19ce439825c2aa97adee3a965ac050dec6f2d0 100644
GIT binary patch
delta 111
zcmZ2r^v{UPCD<jTPLhFvk!>PZs-6Q!e6Uk|bdv{rfU~CoN4$rp3y<RkE@qB+N0%T5
zj`&bd7X}e;R#%r`U)}{~lfxKwRk<2F5*QekBrK4boW;dnAjHbVz{`+O(A<&3z>rvw
L2$9@4v0nlJLd_kS
delta 57
zcmexow7`hVCD<iIL6U)i(Q_hKs*+NCuv2_=lXQTyrvXR2ho=jV;{`5ej(A6xAO?>3
MP)`?zjqm#<0J?AwjsO4v
diff --git a/tests/data/acpi/pc/DSDT.memhp b/tests/data/acpi/pc/DSDT.memhp
index 811965f42d97adadde6e9ec6d6153e767041bc6d..8ad5c523fdf76b90286a145f797454dff6da050c 100644
GIT binary patch
delta 111
zcmZ2((`w7*66_MvD#yUUSTm6;RnLJVKG-Qfy2*n*z}eG)Bi_T)g~#y%7c)n^qe~D2
zM|`NK3xkL^tE)?}FYf}g$zhDTs$7j72@DKN5*Elz&f;P(5MpIw;AKcCXzs{iU`Q-T
Lgh+0jI87D+OwAq2
delta 57
zcmZp*U2enW66_M9F2}&YxPKy7s*+NCuv2_=lXQTyrvXR2ho=jV;{`5ej(A6xAO?>3
NP)`?zjqj()0sy<D55E8a
diff --git a/tests/data/acpi/pc/DSDT.nohpet b/tests/data/acpi/pc/DSDT.nohpet
index bbf73023ade329770ff9f9ac5c897218764182b5..4fd4d38e5ffe889fed812b67d3d7b1825325e909 100644
GIT binary patch
delta 111
zcmX?Qu)>hbCD<iog#-fwW5`6VR6Pfd_+Y2_=q3;L0B27Fj(87G7aqq8T+AHtjxIqA
z9Py!^E({{xtgbG>zPt;}CWkTVs&X}UBrq^6Nmw8=Ig5+EK!}xzftMknpt&Q5fg!OV
L5hA&9;!be@T~!_m
delta 57
zcmZ2sc*=mwCD<jzOM-!car#8AR3)YOV5j)#Cg}iYPXms44^I~!#|vD{9Py4WK@1%6
Np`I=b8{h8~2LQy%5B~rF
diff --git a/tests/data/acpi/pc/DSDT.numamem b/tests/data/acpi/pc/DSDT.numamem
index c5d93366a417ad1a92c01659f1db9c159caa7132..4cfb3765c5c5c7cf73732f2d3fd5bf9932399c14 100644
GIT binary patch
delta 111
zcmca-xW|agCD<jzMv{Sn(PSc5s-6Q!e6Uk|bdv{rfU~CoN4$rp3y<RkE@qB+N0%T5
zj`&bd7X}e;R#%r`U)}{~lfxKwRk<2F5*QekBrK4boW;dnAjHbVz{`+O(A<&3z>rvw
L2$9@4(N_WhH^m)3
delta 57
zcmdmEbkC5>CD<k8o&*B}W5q<SR3)YOV5j)#Cg}iYPXms44^I~!#|vD{9Py4WK@1%6
Np`I=b8{hj%0085x5HkP(
diff --git a/tests/data/acpi/pc/DSDT.roothp b/tests/data/acpi/pc/DSDT.roothp
index 9e3d482366bd800cf987044801eebc814629b15b..8b695cca83c04b4123986e1334d0c57ddb22687d 100644
GIT binary patch
delta 111
zcmbQ}^WKNcCD<h-UyXr*QFS6$s-6Q!e6Uk|bdv{rfU~CoN4$rp3y<RkE@qB+N0%T5
zj`&bd7X}e;R#%r`U)}{~lfxKwRk<2F5*QekBrK4boW;dnAjHbVz{`+O(A<&3z>rvw
L2$9@4u|X98R^lDX
delta 57
zcmaFwGtr03CD<iIP>q3sF=HZEs*+NCuv2_=lXQTyrvXR2ho=jV;{`5ej(A6xAO?>3
MP)`?zjqe*&0mH)&zW@LL
diff --git a/tests/data/acpi/q35/DSDT b/tests/data/acpi/q35/DSDT
index c304e15e366d7317fd0e9db0a144f02e0437d7a1..3dadeba912d9133f0ccb6e9b89a22ca7dc43f18f 100644
GIT binary patch
delta 90
zcmdnvFvF3{CD<ioh5`cv<LrrCsa%dC@xe~<(M|sR6Dt>TiFmWRx&-_3E-;%c$)u~w
q)!321z_27?fz0GAF7^T;Rwf2shJ=FVjvNMt#DYYK<Yp;GC3ygdD;U54
delta 37
tcmbQ?xW|FZCD<jzMuCBWaq2{_R4!M(_+Y2_=q6{biIodCmoX~I0|3iS3h@8{
diff --git a/tests/data/acpi/q35/DSDT.acpierst b/tests/data/acpi/q35/DSDT.acpierst
index 3aa5c4b3193d32bb8263a1fe06c05b714541c532..7e43fa88c39737198427744ddb8d902edd517794 100644
GIT binary patch
delta 90
zcmX@>u+ovsCD<ior2+#3qxD3tR4zx6_+Y2_=q7*uiIoevM7&vDU4ngi7nn_!WYSgT
qYV1g0U|5o{KxT3l7khyaD-#1RLqb7wM-Br+VnHHAa<depu{;2M02rhI
delta 37
scmZ4Kc-Dc-CD<jzSAl_n(R3nLDwiu?e6Uk|bdxjJ#L9)6%NUL20m*X;)c^nh
diff --git a/tests/data/acpi/q35/DSDT.acpihmat b/tests/data/acpi/q35/DSDT.acpihmat
index 3ffbf8f83f64144ace17ff5f06bcb4fec9df33d9..7c626642ba1ef231ee4e1353330ca9ae2955f37f 100644
GIT binary patch
delta 90
zcmaFqb<~^7CD<k8s44>kW5h(RR4zx6_+Y2_=q7*uiIoevM7&vDU4ngi7nn_!WYSgT
qYV1g0U|5o{KxT3l7khyaD-#1RLqb7wM-Br+VnHHAa<depzX|}Vof%I6
delta 37
scmX@={nCreCD<h-Q<Z^%F=!%JDwiu?e6Uk|bdxjJ#L9)6%NYGt0NQ>FfB*mh
diff --git a/tests/data/acpi/q35/DSDT.acpihmat-noinitiator b/tests/data/acpi/q35/DSDT.acpihmat-noinitiator
index ebec32b575d310f98937fe9208f0c60349ca753d..631a1048fc01a3c84aadfdea8e0eccc36c68d8a4 100644
GIT binary patch
delta 90
zcmccYwBDJ^CD<ioy&?kxqvAxaR4zx6_+Y2_=q7*uiIoevM7&vDU4ngi7nn_!WYSgT
qYV1g0U|5o{KxT3l7khyaD-#1RLqb7wM-Br+VnHHAa<depr2+tb7Z|7j
delta 37
scmZ4QeA$W1CD<h-SdoE&QF<a*Dwiu?e6Uk|bdxjJ#L9)6%NQ*c0Lm!}*#H0l
diff --git a/tests/data/acpi/q35/DSDT.applesmc b/tests/data/acpi/q35/DSDT.applesmc
index b0994644ec811b962e80f49e36e122967f5af1d1..cb117fd671effe2557a41115015b57df87d7936b 100644
GIT binary patch
delta 90
zcmaFmaLkd*CD<k8m;wU>WA{X^R4zx6_+Y2_=q7*uiIoevM7&vDU4ngi7nn_!WYSgT
qYV1g0U|5o{KxT3l7khyaD-#1RLqb7wM-Br+VnHHAa<dd;fII-QQ5k3e
delta 37
scmX@+_{xFHCD<h-OM!ubv2`L>Dwiu?e6Uk|bdxjJ#L9)6%NPUX0o*YQnE(I)
diff --git a/tests/data/acpi/q35/DSDT.bridge b/tests/data/acpi/q35/DSDT.bridge
index 8e11b8ea4862c8ec27376703c9c43e9895ca60eb..cdfd51ce70d7201fa827bfabfd23e413596b1094 100644
GIT binary patch
delta 90
zcmcZ^xiyN*CD<jzRF{E)k$)mrDwm^3e6Uk|bdx{-#L9(SBHpa7F2TOM3(O`<GU=*v
qHFhL0Ff2(}ATv3Oi@iXIm5G6uA)%nTBZq+@u^<s5xmk*Fzcv7A_!#p5
delta 37
tcmdlQbu*I7CD<k8rVaxGBiBT(R4!M(_+Y2_=q6{biIodCmoe_w1_0rN3?u*m
diff --git a/tests/data/acpi/q35/DSDT.core-count2 b/tests/data/acpi/q35/DSDT.core-count2
index a895599c3c53c0cd0888ec166a30d6c036d26b93..2bf77bb4e1a433eab66d0fdd175344d4f8d6e168 100644
GIT binary patch
delta 92
zcmeD9%lPCkBbQ6COURQt1_s7$6S-2k97W=To#LaL{P`zVF60vNW_5K5_T^n*Hd&HM
sSCy-=BY}ZoNx}k|$yr?N1wyP$47>~p1<f5f3=D|{i4e)nQjB@E09CIW!T<mO
delta 39
vcmaFzm$Bn7BbQ6COGrl@0|VoRiCn2%u6*&qPVv!A&Ri2K7j7<N%&P?e9rF$I
diff --git a/tests/data/acpi/q35/DSDT.cphp b/tests/data/acpi/q35/DSDT.cphp
index 725998cb587c02ac963f290bac5c14d665bc85e9..1837442bd39f1249fb753530ea508d05e8d177f4 100644
GIT binary patch
delta 90
zcmeBidEvt466_L^p~S$z_<tf-Dwm^3e6Uk|bdx{-#L9(SBHpa7F2TOM3(O`<GU=*v
qHFhL0Ff2(}ATv3Oi@iXIm5G6uA)%nTBZq+@u^<s5xmk+wlL7#x^%?E}
delta 37
tcmaFi(&NJA66_Mfqr||#_;VsxDwiu?e6Uk|bdxjJ#L9)6%NRc?007q13?Bdh
diff --git a/tests/data/acpi/q35/DSDT.cxl b/tests/data/acpi/q35/DSDT.cxl
index d87736dccf18631bbaf0a4505d0f5d83d7501a15..029a48ed4a25f5af3e96991243a5eb1064243002 100644
GIT binary patch
delta 90
zcmccPwZogsCD<iohbjXDqrpV3R4zx6_+Y2_=q7*uiIoevM7&vDU4ngi7nn_!WYSgT
qYV1g0U|5o{KxT3l7khyaD-#1RLqb7wM-Br+VnHHAa<deplL`Qld>Hcp
delta 37
scmdnteaDN-CD<h-MwNkqQEMVsDwiu?e6Uk|bdxjJ#L9)6%NU(h0MWP$Bme*a
diff --git a/tests/data/acpi/q35/DSDT.dimmpxm b/tests/data/acpi/q35/DSDT.dimmpxm
index ef643b4ee02cacb9a55f89b8e7f05524125515a1..2ad9b1c30e9a583cc43e8efbc1e276b4f221ff28 100644
GIT binary patch
delta 90
zcmdnw+vmsS66_Mfr_R8@cxob7Dwm^3e6Uk|bdx{-#L9(SBHpa7F2TOM3(O`<GU=*v
qHFhL0Ff2(}ATv3Oi@iXIm5G6uA)%nTBZq+@u^<s5xmk*FhAIGWlNjy*
delta 37
tcmeD4+vLmT66_MPNsWPl@#sXZR4!M(_+Y2_=q6{biIodCmod&z1pwaH3?Bdh
diff --git a/tests/data/acpi/q35/DSDT.ipmibt b/tests/data/acpi/q35/DSDT.ipmibt
index b136aea961c89a97db09db9b68809979564d8faf..c552e668983198d077348a57a5b22065d01b40f1 100644
GIT binary patch
delta 90
zcmZp7eC){O66_N4Sb>3o@xVl`R4zx6_+Y2_=q7*uiIoevM7&vDU4ngi7nn_!WYSgT
qYV1g0U|5o{KxT3l7khyaD-#1RLqb7wM-Br+VnHHAa<dd;t~>y;_ZgA^
delta 37
scmaFt*zU;X66_MvuE4;+xN9O;Dwiu?e6Uk|bdxjJ#L9)6%NTRz0ox=C!vFvP
diff --git a/tests/data/acpi/q35/DSDT.ipmismbus b/tests/data/acpi/q35/DSDT.ipmismbus
index 0970dbd5896fc0038b1369dbbcc982ead7736ae6..9fe6d1686a777ffddc2953420cd4838832226bad 100644
GIT binary patch
delta 90
zcmbQ@_`#9OCD<k8g8~Bsqr*h5R4zx6_+Y2_=q7*uiIoevM7&vDU4ngi7nn_!WYSgT
qYV1g0U|5o{KxT3l7khyaD-#1RLqb7wM-Br+VnHHAa<dd;l{^5NI2lF&
delta 37
tcmez1IK`36CD<ioiUI=zqt!&NR4!M(_+Y2_=q6{biIodCmoZk!0|3<03wHnj
diff --git a/tests/data/acpi/q35/DSDT.ivrs b/tests/data/acpi/q35/DSDT.ivrs
index 3aa5c4b3193d32bb8263a1fe06c05b714541c532..7e43fa88c39737198427744ddb8d902edd517794 100644
GIT binary patch
delta 90
zcmX@>u+ovsCD<ior2+#3qxD3tR4zx6_+Y2_=q7*uiIoevM7&vDU4ngi7nn_!WYSgT
qYV1g0U|5o{KxT3l7khyaD-#1RLqb7wM-Br+VnHHAa<depu{;2M02rhI
delta 37
scmZ4Kc-Dc-CD<jzSAl_n(R3nLDwiu?e6Uk|bdxjJ#L9)6%NUL20m*X;)c^nh
diff --git a/tests/data/acpi/q35/DSDT.memhp b/tests/data/acpi/q35/DSDT.memhp
index 9709e5a7a7edcb7509954b553f7bf29a424033db..a98ee8c7731c8aaf383e84fd48b90633e53ef240 100644
GIT binary patch
delta 90
zcmeD7e(ufX66_N4T$O==v3DX@Dwm^3e6Uk|bdx{-#L9(SBHpa7F2TOM3(O`<GU=*v
qHFhL0Ff2(}ATv3Oi@iXIm5G6uA)%nTBZq+@u^<s5xmk*_Pz3<6Tp5i3
delta 37
scmaFv-R;fg66_Mvt;)c_*glafmCKbcKG-Qfy2+VqV&%fkWsHR?0NZa1z5oCK
diff --git a/tests/data/acpi/q35/DSDT.mmio64 b/tests/data/acpi/q35/DSDT.mmio64
index e1cd01f2349bb8c2f7f8badad11441ffe6d57acc..61e994d2651e15e232d9b5930bca32a33fd0b090 100644
GIT binary patch
delta 90
zcmZ4H+2qCL66_Mfq{_g+=rNHimCI2iKG-Qfy2+n^V&y_E5pPykmtbGs1!j{anRHdT
q8aomg7?va~keQst#a<x9%EZ9SkWkRvk;A}{Sda*j+$_b|qYMB!T^KL`
delta 37
scmZqjTIR{+66_MPOof4g(Rm_QDwiu?e6Uk|bdxjJ#L9)6%NTo<0nHH$VE_OC
diff --git a/tests/data/acpi/q35/DSDT.multi-bridge b/tests/data/acpi/q35/DSDT.multi-bridge
index 3b9dffb565833cc87bbf08dadfc1f31ac858e93b..1240cede1a2fedc902b9dc71687880b73170e81b 100644
GIT binary patch
delta 90
zcmZonx|_u166_KZYskRBxM(6*Dwm^3e6Uk|bdx{-#L9(SBHpa7F2TOM3(O`<GU=*v
qHFhL0Ff2(}ATv3Oi@iXIm5G6uA)%nTBZq+@u^<s5xmk+wxjq1xff>I5
delta 37
tcmcbc)R@HO66_MfXvo08IA<bPDwiu?e6Uk|bdxjJ#L9)6%NU>Q0|3+S3-AB{
diff --git a/tests/data/acpi/q35/DSDT.noacpihp b/tests/data/acpi/q35/DSDT.noacpihp
index 4ea982de2df3cf7cd89cb3b4467a350eaf8f5d29..44ee5e74c533f2c7554885b73adb947ed74b421f 100644
GIT binary patch
delta 130
zcmca+x5=K%CD<iolRN_hW86fpR4zx6_+Y2_=q7*uiIoduM7&vDU4ngi7nn`XVki(~
zW@JcMAT?=nhM+K)zy<S@PlHXXd?$*(@|8U7?7Jjk0sGWUE~X_31ze3C2@DKC0h!5J
eT<irxtV|5N3<(9z9XSjPi3N!e$<0!XHgW)B)hHGK
delta 37
scmdmFf6b1|CD<h-OrC*(F=8TDDwiu?e6Uk|bdxjJ#L9)6%NT9s0MCXC761SM
diff --git a/tests/data/acpi/q35/DSDT.nohpet b/tests/data/acpi/q35/DSDT.nohpet
index 2cf7f6db0fd8de357278f942a4082e714804dca9..be3060aa51d67c0f02c70bd0a7d5c028016641a1 100644
GIT binary patch
delta 90
zcmZ2y-{rvN66_MfrNF?zm@<(omCI2iKG-Qfy2+n^V&y_E5pPykmtbGs1!j{anRHdT
q8aomg7?va~keQst#a<x9%EZ9SkWkRvk;A}{Sda*j+$_a7MGgQ#U>HsS
delta 37
tcmeBjSZB}W66_MPPM(2*F@7RfDwiu?e6Uk|bdxjJ#L9)6%NVD~0RYc^3x5Cr
diff --git a/tests/data/acpi/q35/DSDT.numamem b/tests/data/acpi/q35/DSDT.numamem
index 310e3d5053b90863f96c29dd69a514b4999b4a19..5e94a2b61f840c68d27257831cf608d41ee7c154 100644
GIT binary patch
delta 90
zcmX@)Fwc?8CD<ioo&o~{qw7SjR4zx6_+Y2_=q7*uiIoevM7&vDU4ngi7nn_!WYSgT
qYV1g0U|5o{KxT3l7khyaD-#1RLqb7wM-Br+VnHHAa<dephCBdt!5D%7
delta 37
scmbQ|c*udvCD<jzNr8cZ(S9OVDwiu?e6Uk|bdxjJ#L9)6%NRA}0mb(Uvj6}9
diff --git a/tests/data/acpi/q35/DSDT.pvpanic-isa b/tests/data/acpi/q35/DSDT.pvpanic-isa
index 6672b6fa05c8ee30a8ea4ab0931d59c1315a4e9c..0e609a0c48fef371f935f239ebb9620fa116b049 100644
GIT binary patch
delta 90
zcmZ4J_}7ukCD<k8uL1)Dqu)fXR4zx6_+Y2_=q7*uiIoevM7&vDU4ngi7nn_!WYSgT
qYV1g0U|5o{KxT3l7khyaD-#1RLqb7wM-Br+VnHHAa<dd;yF37^p&5t(
delta 37
tcmezCxX_WyCD<iop#lQ~qsK(9R4!M(_+Y2_=q6{biIodCmoc`>0|47X3%LLQ
diff --git a/tests/data/acpi/q35/DSDT.tis.tpm12 b/tests/data/acpi/q35/DSDT.tis.tpm12
index eae2dc599331516e11632356f05d7831d1fa1e6a..fc6cc4585a6b1d955bc80700ec2dc2720b7e4a89 100644
GIT binary patch
delta 90
zcmbQ``puQgCD<k8n-T*9<C%$Esa%dC@xe~<(M|sR6Dt>TiFmWRx&-_3E-;%c$)u~w
q)!321z_27?fz0GAF7^T;Rwf2shJ=FVjvNMt#DYYK<Yp<x21NkPNE!A3
delta 37
tcmez7I?I*ICD<iomJ$O4<FSccsa&pn@xe~<(M`@=6Dt>PE@Ny^1OVk43?~2p
diff --git a/tests/data/acpi/q35/DSDT.tis.tpm2 b/tests/data/acpi/q35/DSDT.tis.tpm2
index 68c6a7d244cfc78efa6b9cd1385f2134ca149ad7..815006e445d0ec44c2f4a7c8d30ead6616a32b32 100644
GIT binary patch
delta 90
zcmdnuI>C+0CD<iIK$(Gov2`L>Dwm^3e6Uk|bdx{-#L9(SBHpa7F2TOM3(O`<GU=*v
qHFhL0Ff2(}ATv3Oi@iXIm5G6uA)%nTBZq+@u^<s5xmk*FmLdRFT^N}F
delta 37
tcmbQ>w#AjpCD<ioixL9^W5YzQR4!M(_+Y2_=q6{biIodCmodOV313(5ch
diff --git a/tests/data/acpi/q35/DSDT.viot b/tests/data/acpi/q35/DSDT.viot
index 4f93d46859b6c0a69afc41d5aa7585ebd686c1d2..6d06777fc5ed21c8aa377b3088d02bfb202f51ad 100644
GIT binary patch
delta 90
zcmbQ}`PP%mCD<k8tqKDJqsK(9R4zx6_+Y2_=q7*uiIoevM7&vDU4ngi7nn_!WYSgT
qYV1g0U|5o{KxT3l7khyaD-#1RLqb7wM-Br+VnHHAa<dd;xiSEtO&MAM
delta 44
zcmaFsInk5LCD<ioq6z~8qtisLR9;uU_+Y2_=q6{b0B6t1_OhZACw6WwV=Pw&04KN&
AZU6uP
diff --git a/tests/data/acpi/q35/DSDT.xapic b/tests/data/acpi/q35/DSDT.xapic
index e9b4881bdc72eb7c59dcf258c1a98363b46bfbcd..8cf5b9703d617d0a0b16d41cd713f7883c80fcfe 100644
GIT binary patch
delta 92
zcmbO~jp_F^CN7s?myqgi1_s8!iCn2%jw12FPVv!A{`?aw7jlVsv%0zj`|>U@n=Hws
stIE~bk-)&PBw>Nf<SZ`s0wGo=2404Qg657K28P6fM2O^ODMr>V0OF+@2LJ#7
delta 39
vcmex8jcNWgCN7s?mk{}G1_nm&iCn2%u6*&qPVv!A&Ri2K7j7<NWbFa~^OOuY
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 45/73] tests: acpi: whitelist DSDT before adding device with acpi-index to testcases
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (43 preceding siblings ...)
2023-03-08 1:13 ` [PULL 44/73] tests: acpi: update expected blobs Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 46/73] tests: acpi: add device with acpi-index on non-hotpluggble bus Michael S. Tsirkin
` (28 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-20-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..70244976c9 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,4 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/pc/DSDT.hpbrroot",
+"tests/data/acpi/q35/DSDT.multi-bridge",
+"tests/data/acpi/q35/DSDT.noacpihp",
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 46/73] tests: acpi: add device with acpi-index on non-hotpluggble bus
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (44 preceding siblings ...)
2023-03-08 1:13 ` [PULL 45/73] tests: acpi: whitelist DSDT before adding device with acpi-index to testcases Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 47/73] acpi: pci: support acpi-index for non-hotpluggable devices Michael S. Tsirkin
` (27 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-21-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 295d80740e..d7c34ba504 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -1054,6 +1054,7 @@ static void test_acpi_q35_multif_bridge(void)
" -device pcie-root-port,id=rphptgt3,port=0x0,chassis=7,addr=2.3"
" -device pci-testdev,bus=pcie.0,addr=2.4"
" -device pci-testdev,bus=pcie.0,addr=5.0"
+ " -device pci-testdev,bus=pcie.0,addr=0xf.0,acpi-index=101"
" -device pci-testdev,bus=rp0,addr=0.0"
" -device pci-testdev,bus=br1"
" -device pcie-root-port,id=rpnohp,chassis=8,addr=0xA.0,hotplug=off"
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 47/73] acpi: pci: support acpi-index for non-hotpluggable devices
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (45 preceding siblings ...)
2023-03-08 1:13 ` [PULL 46/73] tests: acpi: add device with acpi-index on non-hotpluggble bus Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 48/73] tests: acpi: update expected blobs Michael S. Tsirkin
` (26 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Igor Mammedov, Ani Sinha, Paolo Bonzini,
Richard Henderson, Eduardo Habkost, Marcel Apfelbaum
From: Igor Mammedov <imammedo@redhat.com>
Inject static _DSM (EDSM) if non-hotpluggable device has
acpi-index configured on it.
It lets use acpi-index non-hotpluggable devices / devices
attached to non-hotpluggable bus.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-22-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/i386/acpi-build.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 6f5501fb74..46f78e9338 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -452,6 +452,25 @@ static Aml *aml_pci_edsm(void)
return method;
}
+static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
+{
+ Aml *method;
+
+ g_assert(pdev->acpi_index != 0);
+ method = aml_method("_DSM", 4, AML_SERIALIZED);
+ {
+ Aml *params = aml_local(0);
+ Aml *pkg = aml_package(1);
+ aml_append(pkg, aml_int(pdev->acpi_index));
+ aml_append(method, aml_store(pkg, params));
+ aml_append(method,
+ aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
+ aml_arg(2), aml_arg(3), params))
+ );
+ }
+ return method;
+}
+
static void build_append_pcihp_notify_entry(Aml *method, int slot)
{
Aml *if_ctx;
@@ -577,6 +596,12 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
+ /* add _DSM if device has acpi-index set */
+ if (pdev->acpi_index && !bsel &&
+ !object_property_get_bool(OBJECT(pdev), "hotpluggable",
+ &error_abort)) {
+ aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
+ }
/* device descriptor has been composed, add it into parent context */
aml_append(parent_scope, dev);
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 48/73] tests: acpi: update expected blobs
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (46 preceding siblings ...)
2023-03-08 1:13 ` [PULL 47/73] acpi: pci: support acpi-index for non-hotpluggable devices Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 49/73] tests: acpi: whitelist DSDT before exposing non zero functions Michael S. Tsirkin
` (25 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
the only chenge is addition of _DSM- > EDSM method
on non-hotpluggable devices with configured acpi-index.
Something like:
+ Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
+ {
+ Local0 = Package (0x01)
+ {
+ 0x65
+ }
+ Return (EDSM (Arg0, Arg1, Arg2, Arg3, Local0))
+ }
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-23-imammedo@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 3 ---
tests/data/acpi/pc/DSDT.hpbrroot | Bin 3260 -> 3309 bytes
tests/data/acpi/q35/DSDT.multi-bridge | Bin 12637 -> 12678 bytes
tests/data/acpi/q35/DSDT.noacpihp | Bin 8114 -> 8188 bytes
4 files changed, 3 deletions(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index 70244976c9..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,4 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/pc/DSDT.hpbrroot",
-"tests/data/acpi/q35/DSDT.multi-bridge",
-"tests/data/acpi/q35/DSDT.noacpihp",
diff --git a/tests/data/acpi/pc/DSDT.hpbrroot b/tests/data/acpi/pc/DSDT.hpbrroot
index bfe0bf37180c0f0521d264d3e35b5f51feff2630..bee88c5ee815f0acf022b278876f0a212b1da84a 100644
GIT binary patch
delta 134
zcmdlZ`Bsw4CD<k8Ee`_&<F1WdHe6ipS~2m#PVoZ%nwtZ-teKM3gN+U1IpQ5%f`Dq+
z7(~S5U4ngi3WQh~xl$9BxB@vDnOWHh(M^`Y#ujje><rOO8o>q#0Y(N938+q1Ms8h3
GB&`7G*&wt4
delta 85
zcmaDWxkr-ACD<io4-W$aqyI)O8!j$4^_cizr+5KBwao!s)=Y-{!Nvyh9Py4WK|nQZ
X4AD&r!NwMF0d}AOf3N{UfRO<Jc*7Ed
diff --git a/tests/data/acpi/q35/DSDT.multi-bridge b/tests/data/acpi/q35/DSDT.multi-bridge
index 1240cede1a2fedc902b9dc71687880b73170e81b..595ab64601ae3deb12bbf18ca463e39ba0a86195 100644
GIT binary patch
delta 81
zcmcbc)RxTU66_MvX2`(67`Tz^t{ita7h_C(uv5H16W8WXax(nt>cQp~@f`7vE<rpD
j4Ezit;_)uQzB~m&ER0;K2}@jooQ%w@?1arcdV$OUo6Hrb
delta 41
xcmZomzMI7566_KZYskRBxM(BST{-S14#t@HV5fM2PWH{8<Yf3ao9p>A0{{}H42A#z
diff --git a/tests/data/acpi/q35/DSDT.noacpihp b/tests/data/acpi/q35/DSDT.noacpihp
index 44ee5e74c533f2c7554885b73adb947ed74b421f..c292c2369b011b779af44d0fa6fd2f7994098b2e 100644
GIT binary patch
delta 199
zcmdmF|Hq!oCD<k8k30hdqtiw%7g;Vpt(f>=r+5K3t;rFx_Uh`vh8FQ0@s2J*JPZuX
z3?kz3F2TM$1wt&0T&W35T!Ea7%&hE$$;)I_EG>hL5NcT&qMI~=4G;p13?dRx&8&>v
lx{S!WU&$(%ng$yq6te?$s{|VuK&(d5`4w5`W;MAUMgVo#G5-Jn
delta 125
zcmexkzsa7<CD<iolRN_hW86kA7g;VBwV3!|r+5J$)yWaE_Wb<8h8FQ0@s2J*JPZuX
z43qcCswgM~8zID48KRr`gAEV@j0}^d<rHLOf{hVk>_A1_!3G8plNdG^$n`J+09-yC
ANdN!<
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 49/73] tests: acpi: whitelist DSDT before exposing non zero functions
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (47 preceding siblings ...)
2023-03-08 1:13 ` [PULL 48/73] tests: acpi: update expected blobs Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 50/73] acpi: pci: describe all functions on populated slots Michael S. Tsirkin
` (24 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-24-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 37 +++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..8911b10650 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,38 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/pc/DSDT",
+"tests/data/acpi/pc/DSDT.acpierst",
+"tests/data/acpi/pc/DSDT.acpihmat",
+"tests/data/acpi/pc/DSDT.bridge",
+"tests/data/acpi/pc/DSDT.cphp",
+"tests/data/acpi/pc/DSDT.dimmpxm",
+"tests/data/acpi/pc/DSDT.hpbridge",
+"tests/data/acpi/pc/DSDT.hpbrroot",
+"tests/data/acpi/pc/DSDT.ipmikcs",
+"tests/data/acpi/pc/DSDT.memhp",
+"tests/data/acpi/pc/DSDT.nohpet",
+"tests/data/acpi/pc/DSDT.numamem",
+"tests/data/acpi/pc/DSDT.roothp",
+"tests/data/acpi/q35/DSDT",
+"tests/data/acpi/q35/DSDT.acpierst",
+"tests/data/acpi/q35/DSDT.acpihmat",
+"tests/data/acpi/q35/DSDT.acpihmat-noinitiator",
+"tests/data/acpi/q35/DSDT.applesmc",
+"tests/data/acpi/q35/DSDT.bridge",
+"tests/data/acpi/q35/DSDT.core-count2",
+"tests/data/acpi/q35/DSDT.cphp",
+"tests/data/acpi/q35/DSDT.cxl",
+"tests/data/acpi/q35/DSDT.dimmpxm",
+"tests/data/acpi/q35/DSDT.ipmibt",
+"tests/data/acpi/q35/DSDT.ipmismbus",
+"tests/data/acpi/q35/DSDT.ivrs",
+"tests/data/acpi/q35/DSDT.memhp",
+"tests/data/acpi/q35/DSDT.mmio64",
+"tests/data/acpi/q35/DSDT.multi-bridge",
+"tests/data/acpi/q35/DSDT.noacpihp",
+"tests/data/acpi/q35/DSDT.nohpet",
+"tests/data/acpi/q35/DSDT.numamem",
+"tests/data/acpi/q35/DSDT.pvpanic-isa",
+"tests/data/acpi/q35/DSDT.tis.tpm12",
+"tests/data/acpi/q35/DSDT.tis.tpm2",
+"tests/data/acpi/q35/DSDT.viot",
+"tests/data/acpi/q35/DSDT.xapic",
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 50/73] acpi: pci: describe all functions on populated slots
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (48 preceding siblings ...)
2023-03-08 1:13 ` [PULL 49/73] tests: acpi: whitelist DSDT before exposing non zero functions Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 51/73] tests: acpi: update expected blobs Michael S. Tsirkin
` (23 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Igor Mammedov, Ani Sinha, Paolo Bonzini,
Richard Henderson, Eduardo Habkost, Marcel Apfelbaum
From: Igor Mammedov <imammedo@redhat.com>
describing all present devices on functions other than
0 was complicated when non hotplug and hotplug code
was intermixed. So QEMU has been excluding non zero
functions since they are not supported by hotplug code,
then a condition to whitelist coldplugged bridges was
added and later whitelisting of devices that advertise
presence of their own AML description.
With non hotplug and hotplug code separated, it is
possible to relax rules and allow describing all
non-hotpluggble functions and hence simplify
conditions whether PCI device should be enumerated by
generic (non-hotplug) code.
Price of that simplification is an extra few Device()
descriptors in DSDT exposing built-in chipset functions,
which has no functional effect on guest side.
Apart from that, the enumeration of non zero functions,
allows to attach more NICs with acpi-index enabled
directly on hostbridge (if hotplug is not required).
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-25-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/i386/acpi-build.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 46f78e9338..8e2481fe5e 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -494,12 +494,6 @@ static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
if (DEVICE(pdev)->hotplugged) {
return true;
}
- } else if (!get_dev_aml_func(DEVICE(pdev))) {
- /*
- * Ignore all other devices on !0 functions unless they
- * have AML description (i.e have get_dev_aml_func() != 0)
- */
- return true;
}
}
return false;
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 51/73] tests: acpi: update expected blobs
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (49 preceding siblings ...)
2023-03-08 1:13 ` [PULL 50/73] acpi: pci: describe all functions on populated slots Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 52/73] tests: acpi: whitelist DSDT before adding non-0 function device with acpi-index to testcases Michael S. Tsirkin
` (22 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
in PC machine case piix3-ide and PIIX4_PM get exposed
+ Device (S09)
+ {
+ Name (_ADR, 0x00010001) // _ADR: Address
+ }
+
+ Device (S0B)
+ {
+ Name (_ADR, 0x00010003) // _ADR: Address
+ }
in q35 machine case ich9-ahci gets exposed
+ Device (SFA)
+ {
+ Name (_ADR, 0x001F0002) // _ADR: Address
+ }
and addtional pci-testdev, virtio-balloon exposed in q35 multi-bridge test case
+ Device (S14)
+ {
+ Name (_ADR, 0x00020004) // _ADR: Address
+ }
+
...
+ Device (S22)
+ {
+ Name (_ADR, 0x00040002) // _ADR: Address
+ }
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-26-imammedo@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 37 ------------------
tests/data/acpi/pc/DSDT | Bin 6454 -> 6488 bytes
tests/data/acpi/pc/DSDT.acpierst | Bin 6377 -> 6411 bytes
tests/data/acpi/pc/DSDT.acpihmat | Bin 7779 -> 7813 bytes
tests/data/acpi/pc/DSDT.bridge | Bin 12581 -> 12615 bytes
tests/data/acpi/pc/DSDT.cphp | Bin 6918 -> 6952 bytes
tests/data/acpi/pc/DSDT.dimmpxm | Bin 8108 -> 8142 bytes
tests/data/acpi/pc/DSDT.hpbridge | Bin 6417 -> 6451 bytes
tests/data/acpi/pc/DSDT.hpbrroot | Bin 3309 -> 3343 bytes
tests/data/acpi/pc/DSDT.ipmikcs | Bin 6526 -> 6560 bytes
tests/data/acpi/pc/DSDT.memhp | Bin 7813 -> 7847 bytes
tests/data/acpi/pc/DSDT.nohpet | Bin 6312 -> 6346 bytes
tests/data/acpi/pc/DSDT.numamem | Bin 6460 -> 6494 bytes
tests/data/acpi/pc/DSDT.roothp | Bin 9839 -> 9873 bytes
tests/data/acpi/q35/DSDT | Bin 8344 -> 8361 bytes
tests/data/acpi/q35/DSDT.acpierst | Bin 8361 -> 8378 bytes
tests/data/acpi/q35/DSDT.acpihmat | Bin 9669 -> 9686 bytes
tests/data/acpi/q35/DSDT.acpihmat-noinitiator | Bin 8623 -> 8640 bytes
tests/data/acpi/q35/DSDT.applesmc | Bin 8390 -> 8407 bytes
tests/data/acpi/q35/DSDT.bridge | Bin 11573 -> 11590 bytes
tests/data/acpi/q35/DSDT.core-count2 | Bin 32484 -> 32501 bytes
tests/data/acpi/q35/DSDT.cphp | Bin 8808 -> 8825 bytes
tests/data/acpi/q35/DSDT.cxl | Bin 9656 -> 9673 bytes
tests/data/acpi/q35/DSDT.dimmpxm | Bin 9998 -> 10015 bytes
tests/data/acpi/q35/DSDT.ipmibt | Bin 8419 -> 8436 bytes
tests/data/acpi/q35/DSDT.ipmismbus | Bin 8432 -> 8449 bytes
tests/data/acpi/q35/DSDT.ivrs | Bin 8361 -> 8378 bytes
tests/data/acpi/q35/DSDT.memhp | Bin 9703 -> 9720 bytes
tests/data/acpi/q35/DSDT.mmio64 | Bin 9474 -> 9491 bytes
tests/data/acpi/q35/DSDT.multi-bridge | Bin 12678 -> 12729 bytes
tests/data/acpi/q35/DSDT.noacpihp | Bin 8188 -> 8205 bytes
tests/data/acpi/q35/DSDT.nohpet | Bin 8202 -> 8219 bytes
tests/data/acpi/q35/DSDT.numamem | Bin 8350 -> 8367 bytes
tests/data/acpi/q35/DSDT.pvpanic-isa | Bin 8445 -> 8462 bytes
tests/data/acpi/q35/DSDT.tis.tpm12 | Bin 8950 -> 8967 bytes
tests/data/acpi/q35/DSDT.tis.tpm2 | Bin 8976 -> 8993 bytes
tests/data/acpi/q35/DSDT.viot | Bin 9453 -> 9470 bytes
tests/data/acpi/q35/DSDT.xapic | Bin 35707 -> 35724 bytes
38 files changed, 37 deletions(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index 8911b10650..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,38 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/pc/DSDT",
-"tests/data/acpi/pc/DSDT.acpierst",
-"tests/data/acpi/pc/DSDT.acpihmat",
-"tests/data/acpi/pc/DSDT.bridge",
-"tests/data/acpi/pc/DSDT.cphp",
-"tests/data/acpi/pc/DSDT.dimmpxm",
-"tests/data/acpi/pc/DSDT.hpbridge",
-"tests/data/acpi/pc/DSDT.hpbrroot",
-"tests/data/acpi/pc/DSDT.ipmikcs",
-"tests/data/acpi/pc/DSDT.memhp",
-"tests/data/acpi/pc/DSDT.nohpet",
-"tests/data/acpi/pc/DSDT.numamem",
-"tests/data/acpi/pc/DSDT.roothp",
-"tests/data/acpi/q35/DSDT",
-"tests/data/acpi/q35/DSDT.acpierst",
-"tests/data/acpi/q35/DSDT.acpihmat",
-"tests/data/acpi/q35/DSDT.acpihmat-noinitiator",
-"tests/data/acpi/q35/DSDT.applesmc",
-"tests/data/acpi/q35/DSDT.bridge",
-"tests/data/acpi/q35/DSDT.core-count2",
-"tests/data/acpi/q35/DSDT.cphp",
-"tests/data/acpi/q35/DSDT.cxl",
-"tests/data/acpi/q35/DSDT.dimmpxm",
-"tests/data/acpi/q35/DSDT.ipmibt",
-"tests/data/acpi/q35/DSDT.ipmismbus",
-"tests/data/acpi/q35/DSDT.ivrs",
-"tests/data/acpi/q35/DSDT.memhp",
-"tests/data/acpi/q35/DSDT.mmio64",
-"tests/data/acpi/q35/DSDT.multi-bridge",
-"tests/data/acpi/q35/DSDT.noacpihp",
-"tests/data/acpi/q35/DSDT.nohpet",
-"tests/data/acpi/q35/DSDT.numamem",
-"tests/data/acpi/q35/DSDT.pvpanic-isa",
-"tests/data/acpi/q35/DSDT.tis.tpm12",
-"tests/data/acpi/q35/DSDT.tis.tpm2",
-"tests/data/acpi/q35/DSDT.viot",
-"tests/data/acpi/q35/DSDT.xapic",
diff --git a/tests/data/acpi/pc/DSDT b/tests/data/acpi/pc/DSDT
index 521062a756d1fcd5939683e41071d29407a45b22..32d255cfc0a207c89bf8459edaca11fad12979e9 100644
GIT binary patch
delta 72
zcmdmHbi;_tCD<h-LXv@jas5WFtK3|^7h>Xro#F*tFKm9veVS38KiI%Bo+IATC5VTS
WfsrA)2`JzM6<}sy+`N&ul^Xyg{1i$6
delta 40
wcmca%w9SaiCD<jzOp<|tv1=pORc<ctb20J3PVoZH=Qh9OKFzrK8gCOf01c`RDgXcg
diff --git a/tests/data/acpi/pc/DSDT.acpierst b/tests/data/acpi/pc/DSDT.acpierst
index 12b9e94bf1449995d460edffd40d1ff7b9f292cc..33e872b2fae3d974a3dc4ec0401b1f1734db313b 100644
GIT binary patch
delta 72
zcmaE9*lon+66_MfEy=*ZXuFZ?DmRzInV9%sr+5L6)0<y%pJtTj4>quj=ZJT73F2X7
WU}T7H0tz@m1(+EaH*e&%;06Hf%o7j*
delta 40
wcmeA+dTGez66_N4Qi6ejk!vH@Rc<c7lQHqZPVoY6CpW+3KFzrK8m}og01(a%@Bjb+
diff --git a/tests/data/acpi/pc/DSDT.acpihmat b/tests/data/acpi/pc/DSDT.acpihmat
index 876d0184d8d56cc2fc9d4c0a619d5d449ba81687..cd84abc1b1d026e6055057f4c6170146e1921ea6 100644
GIT binary patch
delta 72
zcmaEC(`w7*66_MvD#yUUn6r_KNs!C;LQH(HQ@nudh0S7ury1q>gAFX>IpQ5%f_NAi
V7#X6QfC5fX0cHlq&G&>_xdG9V62Jfe
delta 40
wcmZp*eQd+!66_L^EXTmW=)RGQNs!C?TugkhQ@nulxy@pNrx`ah3pa5C0PMvJp#T5?
diff --git a/tests/data/acpi/pc/DSDT.bridge b/tests/data/acpi/pc/DSDT.bridge
index 219ddba2713015616e41c19f66d891c63b05e4ab..69a73ea2a691de387b82bf85a7ba1a2279c01a0c 100644
GIT binary patch
delta 73
zcmZ3QbUca6CD<jz-H?HSk!>T_Rc`K1Po|joV5fM22G7l}xX&=k^9LJP#&g6wx&-ks
XGB7ekHvt8lpaRScjGH&}7AXS&{T>rr
delta 41
xcmX?}v^0s!CD<iI)sTUK@zO@FtK8h}?o2W9!A|i4eQujyai3w_e1kV%82}z|4m$t<
diff --git a/tests/data/acpi/pc/DSDT.cphp b/tests/data/acpi/pc/DSDT.cphp
index 5b5b352a13947a48f98e46409b9ad9664b4de9bc..20379056b399bf1ad8b8316453eac344f604d3b6 100644
GIT binary patch
delta 72
zcmZoOTVclK66_M9A<e+RD7=wtDKD4rg_!tYr+5L^3!8WHo@SKi4>quj=ZJT73F2X7
WU}T7H0tz@m1(+EaH#hRPasvR%(-NKl
delta 40
wcmZ2s)@H`#66_MfCe6UW_--TDQeH0ab20J3PVoZH=Qi);J<Ygz8GjQu0RBM@egFUf
diff --git a/tests/data/acpi/pc/DSDT.dimmpxm b/tests/data/acpi/pc/DSDT.dimmpxm
index fbe755975d94e5e607820bb7acb2fb189b1105ee..435496e836939eeb767f1a524dc1471740ad917e 100644
GIT binary patch
delta 72
zcmZ2uf6kuECD<k8oIC>q<Nb|X-a=fy7h>Xro#F*tFKmt%I?X80A8cS5&k^tF62!yE
Wz{n8Y1Qc+B3NSM;ZdMm*<puy8sS|Sm
delta 40
wcmX?Szs8=+CD<iojXVPb<F1Wd-a=g7=VIc6o#F+Y&uxwuI?cG*N2G}x01wv<Qvd(}
diff --git a/tests/data/acpi/pc/DSDT.hpbridge b/tests/data/acpi/pc/DSDT.hpbridge
index 12d7daf950ba93deaeb67655d303df3960569a64..b6eafab250d508e1358ea09f81eb1b2a6d96ce32 100644
GIT binary patch
delta 72
zcmbPewAqNuCD<jzSdxK(QF9~LRc<bib20J3PVoW`=Qh9OKFui4A8cS5&k^tF62!yE
Wz{n8Y1Qc+B3NSM;Zr;e7zzqQA3KJp#
delta 40
wcmdmNG|`C5CD<iIP?CXx@#{vetK3{}XJX=mo#F-jPH%q6eVTFeHQrcm00>qN0ssI2
diff --git a/tests/data/acpi/pc/DSDT.hpbrroot b/tests/data/acpi/pc/DSDT.hpbrroot
index bee88c5ee815f0acf022b278876f0a212b1da84a..a4073f36d686201296455e142e3bcbb2f368bbd2 100644
GIT binary patch
delta 71
zcmaDW*)PTA66_Mf&&$BT_;w?g4HuWEPE35TQ@ntq&gKBF(~R=`!3LJ`9Py4WK|G8M
Uj119DKmjMH05b#QWC@<D0D)Ez_W%F@
delta 39
vcmeB|dMnB066_N4mWP3Xao0vJ8!j$)t(f>=r+5K>&CLN^rx_>P@>~J{=n)Io
diff --git a/tests/data/acpi/pc/DSDT.ipmikcs b/tests/data/acpi/pc/DSDT.ipmikcs
index 3a19ce439825c2aa97adee3a965ac050dec6f2d0..06aa7bfdeca40e10ee8411eeda08486599b90e39 100644
GIT binary patch
delta 72
zcmexow7{6lCD<iofg}S1qxMFwtK3|!S7YLXo#F+2uWWwFEzBg(A8cS5&k^tF62!yE
Wz{n8Y1Qc+B3NSM;ZvM&J$_)SnsuQ^Y
delta 40
wcmZ2r{LhHXCD<jTPLhFvk!>T_Rc<cl%Q5l6PVoZXmo~rT7G~Nk$JfLS00Vstng9R*
diff --git a/tests/data/acpi/pc/DSDT.memhp b/tests/data/acpi/pc/DSDT.memhp
index 8ad5c523fdf76b90286a145f797454dff6da050c..10a0e44d610976cd5f08d53ec32c7d5eda064e1c 100644
GIT binary patch
delta 71
zcmZp*U2e<e66_MPT#kW(ap6WT6+tfF3o-G*PVoY+7dBf6o@SKi4>quj=ZJT73F2X7
VU}T7H0tz@m1(+EaHwm|L0|3mt5<&m~
delta 40
wcmZ2(+iJ_@66_MvD#yUUShJB!MUcz;TugkhQ@nulxy=@Wrx`b^3O8{B0P>CuBLDyZ
diff --git a/tests/data/acpi/pc/DSDT.nohpet b/tests/data/acpi/pc/DSDT.nohpet
index 4fd4d38e5ffe889fed812b67d3d7b1825325e909..6905312d827502e8bb5852418cf58290eda8d86b 100644
GIT binary patch
delta 72
zcmZ2sc*>B=CD<k8lmr6<W93FJcWy4<3o-G*PVoY+7dA(8pJtTj4>quj=ZJT73F2X7
WU}T7H0tz@m1(+EaH!JhDasvSLxe~nq
delta 40
wcmX?QxWbUjCD<iog#-fwW5`A>cWy54b20J3PVoZH=Qc-kpJv?b!P~?Q0R2Y{od5s;
diff --git a/tests/data/acpi/pc/DSDT.numamem b/tests/data/acpi/pc/DSDT.numamem
index 4cfb3765c5c5c7cf73732f2d3fd5bf9932399c14..59e31338eeb3a84c39ed3ae63105226ce2ad1125 100644
GIT binary patch
delta 72
zcmdmEbkB&(CD<h-PLhFvF>)i<ZEh~#3o-G*PVoY+7dF4=KFui4A8cS5&k^tF62!yE
Wz{n8Y1Qc+B3NSM;Zr;w@$_)S*rW6<e
delta 40
wcmca-w8x0cCD<jzMv{Sn(PSgnZEh~_b20J3PVoZH=Qh9RKFzrK4sR1T00>kK_y7O^
diff --git a/tests/data/acpi/pc/DSDT.roothp b/tests/data/acpi/pc/DSDT.roothp
index 8b695cca83c04b4123986e1334d0c57ddb22687d..448d596cf413d7e487af114e5c80bc73311d17f9 100644
GIT binary patch
delta 73
zcmaFwGtrmJCD<ioq8bAOqt`~RtK8hZ^BH5}gPr09TIO$l#eIfRo<G>YGM*#e(Itq7
Xk%5sRx(O)Y1QlRrVBEZ!caH=BIGPl>
delta 41
xcmbQ}``(AkCD<h-UyXr*QFSBNRc`L?xr{OK!A|i4O>;ND;y%N;`3CP!2>=@34w(P|
diff --git a/tests/data/acpi/q35/DSDT b/tests/data/acpi/q35/DSDT
index 3dadeba912d9133f0ccb6e9b89a22ca7dc43f18f..720e8cbbbb10d86a458027b5cb47884bf8c5ee78 100644
GIT binary patch
delta 51
zcmbQ?xYCi!CD<ior2+#3<F}1mcjdTTrDNiQo#F+2r8a+*>tp10jOU1VbP3{NVvwI)
HsUQykodFKD
delta 39
vcmZ4KIKz?4CD<ioh5`cv<Lr%GcjdTTq+;TOo#F+2BsYJQ>tmceK|vA#@?8u-
diff --git a/tests/data/acpi/q35/DSDT.acpierst b/tests/data/acpi/q35/DSDT.acpierst
index 7e43fa88c39737198427744ddb8d902edd517794..f26b1f2a19529c508d53ed3f434be0083c18dbab 100644
GIT binary patch
delta 51
zcmZ4KxXY2tCD<iomjVL=<Ft)jcjdU;WMbljo#F-jq&I(*o6pGY7|#*!=n}-k#2`Pp
HOF<q0nqCgB
delta 39
vcmdnxxYCi!CD<ior2+#3qxD9vyK-Ev(lPPDPVoZ1Qky@@&1amvP(cy^@Y)PH
diff --git a/tests/data/acpi/q35/DSDT.acpihmat b/tests/data/acpi/q35/DSDT.acpihmat
index 7c626642ba1ef231ee4e1353330ca9ae2955f37f..86771f17466a85e3c938e86d1a5c6cee7c0ec4b6 100644
GIT binary patch
delta 51
zcmX@=ea)N8CD<k8nkoYW<K~TATq<0y(lPPDPVoZ1Qk&&e`WU$#<2m9TU4nR+8004}
HQ<Vn*hA<7P
delta 39
vcmccSebk%FCD<k8s44>kW5h--E)^~pshId+r+5J$$<1;qeT<X$s!9R?>Szl!
diff --git a/tests/data/acpi/q35/DSDT.acpihmat-noinitiator b/tests/data/acpi/q35/DSDT.acpihmat-noinitiator
index 631a1048fc01a3c84aadfdea8e0eccc36c68d8a4..a894a2d16c81fff8ade2c5ddb20858a03169fd47 100644
GIT binary patch
delta 51
zcmZ4Qe88E@CD<k8fFc6}W6egcFY;Wj(lPPDPVoZ1Qkyvx`WU$#<2m9TU4nR+8005U
HP?QG%igpdo
delta 39
vcmX@$yxy71CD<ioy&?kxqvA%cFY;V2QZeztPVoXhlAAdc`WPoKSCj+*>&6RN
diff --git a/tests/data/acpi/q35/DSDT.applesmc b/tests/data/acpi/q35/DSDT.applesmc
index cb117fd671effe2557a41115015b57df87d7936b..276ae1df511346ccd286216c6de03cd56db410fd 100644
GIT binary patch
delta 51
zcmX@+c-@i9CD<k8x&i|O<Fk!icjdU8<znK4o#F+&WjBA6+r!B17|#*!=n}-k#2`O;
Hxq>_ZxGN8h
delta 39
vcmccac+8Q@CD<k8m;wU>WA{d`yK-DkvN7?&PVoX>GMhij?O~j}PeBp@1)dEU
diff --git a/tests/data/acpi/q35/DSDT.bridge b/tests/data/acpi/q35/DSDT.bridge
index cdfd51ce70d7201fa827bfabfd23e413596b1094..9f8a208aaadc167135e59839eefcd5b594c2f28a 100644
GIT binary patch
delta 51
zcmdlQbu5a@CD<jzO_zazF>52&T{$lAyD{;>PVoZHcQ=2O+rrE37|#*!=n}-k#2`O;
HzRolNyG;<A
delta 39
vcmX>WwKa;%CD<jzRF{E)k$)rCT{$kVJ2COWPVoXxcQ${N+rm3}o6ZCP0o)EI
diff --git a/tests/data/acpi/q35/DSDT.core-count2 b/tests/data/acpi/q35/DSDT.core-count2
index 2bf77bb4e1a433eab66d0fdd175344d4f8d6e168..2ec11fe3c36d635080af05afa32852fcc1bf10be 100644
GIT binary patch
delta 53
zcmaFzm+|XgMlP3NmyoY@3=E8d8@V)Vxm=}V;)9*y1$?D8+t&6may!Oz#5=kK@h~yS
JPd-{F4*>Eb5R3o-
delta 41
xcmezRm+{G8MlP3NmyjoQ3=E9hHgaj!a=A#w#0NXY3;0NGwyo`BoP4KF5&%+z4;KIc
diff --git a/tests/data/acpi/q35/DSDT.cphp b/tests/data/acpi/q35/DSDT.cphp
index 1837442bd39f1249fb753530ea508d05e8d177f4..612c85b1b4c8e4cc642734b1d52f5d5e1e2ec4eb 100644
GIT binary patch
delta 51
zcmaFi^3#ROCD<jTQi*|qF=`{%S_Ljw>6rLnr+5Khsm%u!`WU$#<2m9TU4nR+8005=
HD#-%?l?e_9
delta 39
vcmezA^1_A7CD<h-Ly3Wb@&87ywF+D=QZeztPVoXhlA8}I^f69OP?7`y33LpS
diff --git a/tests/data/acpi/q35/DSDT.cxl b/tests/data/acpi/q35/DSDT.cxl
index 029a48ed4a25f5af3e96991243a5eb1064243002..f049f414f0e789324e82916cfd0aa955211408c4 100644
GIT binary patch
delta 51
zcmdntebSrDCD<k8q$&dgWA{d`+sa(-vN7?&PVoZ%GMnEkZ(!thjOU1VbP3{NVvwIa
HQ&k=Ss3i{=
delta 39
vcmX@<y~CT!CD<iohbjXDqrpb5+sa&SGBNSNPVoYM(wpBaZ(y9fK~)j}`k4%)
diff --git a/tests/data/acpi/q35/DSDT.dimmpxm b/tests/data/acpi/q35/DSDT.dimmpxm
index 2ad9b1c30e9a583cc43e8efbc1e276b4f221ff28..23dabeacb06b3ad4360c1ca142c06a173f82ff51 100644
GIT binary patch
delta 51
zcmeD4oA1Zv66_Kpug<{0sJf9WSe46FIwn5YDPF)=YIC}3A0xM8JV(5vOArqegZ$+8
GYVrV37YyA1
delta 39
ucmbR5*XPIO66_Mfr_R8@cxoe8uqu~}R7`xZQ@ntW<mPnMKE}yx>XHE0WeRBk
diff --git a/tests/data/acpi/q35/DSDT.ipmibt b/tests/data/acpi/q35/DSDT.ipmibt
index c552e668983198d077348a57a5b22065d01b40f1..541bb70522e72dd477f72cba2f71a336f6978de4 100644
GIT binary patch
delta 78
zcmaFt_{EXSCD<k8ivj}!qt-^QyK-C(3Ni7)PVoXB@|!=(-DK2qjOU1VbP3{NVvuKu
bZsHGibAk#m0|f+l;@tyWMcCq94Gb9ojA9e<
delta 39
vcmez3_}G!lCD<k8u>u1F<AIG_cjdVJ<znK4o#F-D<u-qmyU95Dwt^%87|spr
diff --git a/tests/data/acpi/q35/DSDT.ipmismbus b/tests/data/acpi/q35/DSDT.ipmismbus
index 9fe6d1686a777ffddc2953420cd4838832226bad..e2d57a331873ada2fcbcdc1f0f7a244f235d7447 100644
GIT binary patch
delta 54
zcmez1*yzON66_MfsK~&;IBO%<T{$jag_!tYr+5KZh0P!3x*7TSgWVkCIpQ5%f_Ru1
K<R@1ulmh^&!w&8M
delta 39
vcmZp4`rydr66_N4L4kpR(P1OkT{$iv`Iz`%r+5Ju`OP2Yx)~?;DwF^K`=$)e
diff --git a/tests/data/acpi/q35/DSDT.ivrs b/tests/data/acpi/q35/DSDT.ivrs
index 7e43fa88c39737198427744ddb8d902edd517794..f26b1f2a19529c508d53ed3f434be0083c18dbab 100644
GIT binary patch
delta 51
zcmZ4KxXY2tCD<iomjVL=<Ft)jcjdU;WMbljo#F-jq&I(*o6pGY7|#*!=n}-k#2`Pp
HOF<q0nqCgB
delta 39
vcmdnxxYCi!CD<ior2+#3qxD9vyK-Ev(lPPDPVoZ1Qky@@&1amvP(cy^@Y)PH
diff --git a/tests/data/acpi/q35/DSDT.memhp b/tests/data/acpi/q35/DSDT.memhp
index a98ee8c7731c8aaf383e84fd48b90633e53ef240..809d7e2f0fc15351abc99031a118b4012822deea 100644
GIT binary patch
delta 51
zcmaFv{llBfCD<k8hbjXD<BN@4Ix1YQ(lPPDPVoZ1QkxxA`WU$#<2m9TU4nR+8006P
HP?ZM&s7DT~
delta 39
vcmez2{oI?&CD<k8xhew#WA8>T9ThGYshId+r+5J$$;}QbeT<Xut4aa@0vZf9
diff --git a/tests/data/acpi/q35/DSDT.mmio64 b/tests/data/acpi/q35/DSDT.mmio64
index 61e994d2651e15e232d9b5930bca32a33fd0b090..ab3fe3c1b56a35d1312779412978cc1d51f05d33 100644
GIT binary patch
delta 78
zcmZqjn(W2p66_KptjfT^xOgL%nKGA~OiX;RQ@ntm^ky&R`HWhQ@f`7vE<rp@4Dt-o
bP5i-bPEY}6pnw2RynBGF2wS|Xfgu9`?2Hj)
delta 61
zcmbR2)#SzH66_Mfq{_g+=&_N@Oqt77Iwn5YDPF)=YO|N}d`3y9c#e2SmmnTy26+Yn
Qo_O~FR}r>&R|7)^0KR|?Qvd(}
diff --git a/tests/data/acpi/q35/DSDT.multi-bridge b/tests/data/acpi/q35/DSDT.multi-bridge
index 595ab64601ae3deb12bbf18ca463e39ba0a86195..4e4b5229502000550f169948393ba8cbc7a793d5 100644
GIT binary patch
delta 92
zcmZom-kHqh66_MP(~yCI@$N>hyK>xpyo@pN!A|i4t-PB*$r&^8^9LK6#B;<ux&-mC
kFfcJ}R#uGU;W2`WFfp(&Y%bU3XX18*i^y+o&}U-;0Gh`ZV*mgE
delta 50
zcmdm)+?LGc66_MvX2`(67`Tz^t{ita7h_C(uv5H16W8WXa>h)X%@o6VHqX=LVp_aY
Gp9uhq*bim^
diff --git a/tests/data/acpi/q35/DSDT.noacpihp b/tests/data/acpi/q35/DSDT.noacpihp
index c292c2369b011b779af44d0fa6fd2f7994098b2e..1c17aa30f7f0155a81988aa43c56e2f71530b4e4 100644
GIT binary patch
delta 65
zcmexk-|N8T66_MftH8j(IA<f5i!7JFc1(P*Q@nt?_T~uL8BDT{@f`7vE<rp@4Dt-o
OP5i-bPEY}6pa1|e`43qD
delta 48
zcmeBm_+!uI66_N4N1lO!(P<->i!7I)R!n@bQ@nti*5(M=8B9D*@f`7vE<rrZ4Dt*B
DSgj05
diff --git a/tests/data/acpi/q35/DSDT.nohpet b/tests/data/acpi/q35/DSDT.nohpet
index be3060aa51d67c0f02c70bd0a7d5c028016641a1..becb5f7cad68361463b30be80095ab10966d7c88 100644
GIT binary patch
delta 51
zcmeBjnC-yj66_Kpt-!#*xPK#;zZ{pVbWD7(Q@nt$)aGQlK1OcGc#e2SmmnS{2KmXa
G<>dieNDU_d
delta 39
ucmbR3(B;7866_MfrNF?zn6i<}UyjQ~DkeVIDPF)wa&xj=ALC>u1xWzKnhCQ2
diff --git a/tests/data/acpi/q35/DSDT.numamem b/tests/data/acpi/q35/DSDT.numamem
index 5e94a2b61f840c68d27257831cf608d41ee7c154..0cdec0b4c53b2b0e38cd019caab552f66f7728e7 100644
GIT binary patch
delta 51
zcmbQ|xZaV=CD<ioy#fOR<ARM`kL9>rrDNiQo#F+2r8a+;>tp10jOU1VbP3{NVvwI)
HuOJTql|2rF
delta 39
vcmZ4QIM0#GCD<ioo&o~{qw7Yl$8uaQQZeztPVoXhlAFKF^)XJKrXUFb?Kun%
diff --git a/tests/data/acpi/q35/DSDT.pvpanic-isa b/tests/data/acpi/q35/DSDT.pvpanic-isa
index 0e609a0c48fef371f935f239ebb9620fa116b049..6a9904ec947e373520e0135a89c559cb4f57fa7d 100644
GIT binary patch
delta 51
zcmezC*yqIM66_Mfr^vv-xMCyMT{$i<#hCbDr+5J;#myh(J~MJV#&g6wx&-ksG00E8
Hryvgikk1b3
delta 39
vcmeBk`s>K$66_N4SAl_n(QhNyT{$jKg_!tYr+5KJh0P!3J~K}Ksvrpf1%wTB
diff --git a/tests/data/acpi/q35/DSDT.tis.tpm12 b/tests/data/acpi/q35/DSDT.tis.tpm12
index fc6cc4585a6b1d955bc80700ec2dc2720b7e4a89..628bf628f6891f906bf872f8916692ba0ccb6877 100644
GIT binary patch
delta 51
zcmez7+U~~X66_MfuFSx|sJ4;or5u;LLri?IQ@nt`{pP=N516?f<2m9TU4nR+8005k
HSCR(+ghURd
delta 39
vcmZp7`{v5!66_N4O^Jbl@ytf9mvUTg_A&9nPVoYMcANjoJz$>vPDv5~6zvW$
diff --git a/tests/data/acpi/q35/DSDT.tis.tpm2 b/tests/data/acpi/q35/DSDT.tis.tpm2
index 815006e445d0ec44c2f4a7c8d30ead6616a32b32..35c6b08068d4d2fb0353802dc2460cc2912c129c 100644
GIT binary patch
delta 51
zcmbQ>w$P2sCD<iIQJH~(@xex}mvUT=PBHPpPVoYsj+_6={bJ^JjOU1VbP3{NVvwKw
HQAr*Em5L8q
delta 61
zcmZ4JHo=X{CD<iIK$(Gov2`QYOF1qF$C&tFr+5Jmhs}TGelbfr#dE|vx&-ksGsrUt
R@Wi_ZxQejFyBZiW000)M532wG
diff --git a/tests/data/acpi/q35/DSDT.viot b/tests/data/acpi/q35/DSDT.viot
index 6d06777fc5ed21c8aa377b3088d02bfb202f51ad..3ad4d26b7f5c183fd3e146b67ebb23662b5108eb 100644
GIT binary patch
delta 51
zcmaFs`OlNfCD<k8p9%v5<Km56@07Sa<zwQ5o#F)?<u@}aUt;8TjOU1VbP3{NVvwJF
HPDLI7x^fRb
delta 39
vcmez8`PP%mCD<k8tqKDJqsK<BcS>9yaxwA2PVoW`a+{fyFELJjsv-#h4V?_h
diff --git a/tests/data/acpi/q35/DSDT.xapic b/tests/data/acpi/q35/DSDT.xapic
index 8cf5b9703d617d0a0b16d41cd713f7883c80fcfe..d4a34e23512c295f73abbe5ef1370fac7a1a06cd 100644
GIT binary patch
delta 53
zcmex8jj3lk6PHV{OGr;Q0|Volja&yhxm=}V;)9*y1$?D8U+L^)<aUhbh<9`e;$dQt
JpB&RI4*=r85SRb}
delta 41
xcmeB~&h&d46PHV{OGtG$0|R5=My>;$TrN^E@xe~<0zQ(PuXOe?PA=}21OOw$4kG{n
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 52/73] tests: acpi: whitelist DSDT before adding non-0 function device with acpi-index to testcases
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (50 preceding siblings ...)
2023-03-08 1:13 ` [PULL 51/73] tests: acpi: update expected blobs Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 53/73] tests: acpi: add non zero function device with acpi-index on non-hotpluggble bus Michael S. Tsirkin
` (21 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-27-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..ad2b429de8 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,3 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/q35/DSDT.multi-bridge",
+"tests/data/acpi/q35/DSDT.noacpihp",
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 53/73] tests: acpi: add non zero function device with acpi-index on non-hotpluggble bus
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (51 preceding siblings ...)
2023-03-08 1:13 ` [PULL 52/73] tests: acpi: whitelist DSDT before adding non-0 function device with acpi-index to testcases Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 54/73] tests: acpi: update expected blobs Michael S. Tsirkin
` (20 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-28-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index d7c34ba504..76d5100911 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -1028,10 +1028,11 @@ static void test_acpi_q35_tcg_no_acpi_hotplug(void)
"addr=7.0"
" -device pci-testdev,bus=nohprp,acpi-index=501"
" -device pcie-root-port,id=nohprpint,port=0x0,chassis=3,hotplug=off,"
- "addr=8.0"
+ "multifunction=on,addr=8.0"
+ " -device pci-testdev,bus=nohprpint,acpi-index=601,addr=8.1"
" -device pcie-root-port,id=hprp2,port=0x0,chassis=4,bus=nohprpint,"
"addr=9.0"
- " -device pci-testdev,bus=hprp2,acpi-index=601"
+ " -device pci-testdev,bus=hprp2,acpi-index=602"
, &data);
free_test_data(&data);
}
@@ -1053,6 +1054,7 @@ static void test_acpi_q35_multif_bridge(void)
" -device pcie-root-port,id=rphptgt2,port=0x0,chassis=6,addr=2.2"
" -device pcie-root-port,id=rphptgt3,port=0x0,chassis=7,addr=2.3"
" -device pci-testdev,bus=pcie.0,addr=2.4"
+ " -device pci-testdev,bus=pcie.0,addr=2.5,acpi-index=102"
" -device pci-testdev,bus=pcie.0,addr=5.0"
" -device pci-testdev,bus=pcie.0,addr=0xf.0,acpi-index=101"
" -device pci-testdev,bus=rp0,addr=0.0"
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 54/73] tests: acpi: update expected blobs
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (52 preceding siblings ...)
2023-03-08 1:13 ` [PULL 53/73] tests: acpi: add non zero function device with acpi-index on non-hotpluggble bus Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 55/73] pci: move acpi-index uniqueness check to generic PCI device code Michael S. Tsirkin
` (19 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha
From: Igor Mammedov <imammedo@redhat.com>
an extra devices at non-zero function address with static
_DSM method get exposed, ex:
+ Device (S15)
+ {
+ Name (_ADR, 0x00020005) // _ADR: Address
+ Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
+ {
+ Local0 = Package (0x01)
+ {
+ 0x66
+ }
+ Return (EDSM (Arg0, Arg1, Arg2, Arg3, Local0))
+ }
+ }
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-29-imammedo@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 2 --
tests/data/acpi/q35/DSDT.multi-bridge | Bin 12729 -> 12770 bytes
tests/data/acpi/q35/DSDT.noacpihp | Bin 8205 -> 8248 bytes
3 files changed, 2 deletions(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index ad2b429de8..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,3 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/q35/DSDT.multi-bridge",
-"tests/data/acpi/q35/DSDT.noacpihp",
diff --git a/tests/data/acpi/q35/DSDT.multi-bridge b/tests/data/acpi/q35/DSDT.multi-bridge
index 4e4b5229502000550f169948393ba8cbc7a793d5..9ae8ee0b41738bd8951b9449abcfc67c293fdce1 100644
GIT binary patch
delta 81
zcmdm){3w~rCD<k8ks$*E<D89LcjdU-1sG%EgPr09`uI10l5=5FR}VHcjpvAWbP3{N
kWnf|u5s!BX_T?!MVqxS;OIYFx<YZ)KWhZPlQEU|e0OA}M0RR91
delta 41
xcmaEqyfc~0CD<iory&Ca<K2y1cjdVIco}2jgPr09T6s5rl5=6&9Ix0c001!W4d4I(
diff --git a/tests/data/acpi/q35/DSDT.noacpihp b/tests/data/acpi/q35/DSDT.noacpihp
index 1c17aa30f7f0155a81988aa43c56e2f71530b4e4..6ab1f0e52543fcb7f84a7fd1327fe5aa42010565 100644
GIT binary patch
delta 99
zcmeBm*x|tC66_LUp}@ev=(Ul{MV8A;FD5?NDPF)yZ*zpK6r+^~Yp{tyJV(5vOArqO
v0|!HNlSZ(KAyj}7C?Fyc?-K0GQy|33$Q{X)u*4O}%gD^iPT1Ti*TV<^dqx+F
delta 56
zcmdnt(CfhE66_MftH8j(IA<f5i!7JFc1(P*Q@nt?_T~s#DMo(XU=xFQj(A6xARYz=
L4u;KZ<a!tZl4uQ!
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 55/73] pci: move acpi-index uniqueness check to generic PCI device code
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (53 preceding siblings ...)
2023-03-08 1:13 ` [PULL 54/73] tests: acpi: update expected blobs Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 56/73] acpi: pci: drop BSEL usage when deciding that device isn't hotpluggable Michael S. Tsirkin
` (18 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Ani Sinha, Marcel Apfelbaum
From: Igor Mammedov <imammedo@redhat.com>
acpi-index is now working with non-hotpluggable buses
(pci/q35 machine hostbridge), it can be used even if
ACPI PCI hotplug is disabled and as result acpi-index
uniqueness check will be omitted (since the check is
done by ACPI PCI hotplug handler, which isn't wired
when ACPI PCI hotplug is disabled).
Move check and related code to generic PCIDevice so it
would be independent of ACPI PCI hotplug.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-30-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/acpi/pcihp.c | 56 ------------------------------------------------
hw/pci/pci.c | 57 +++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 57 insertions(+), 56 deletions(-)
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 5dc7377411..adf45e8443 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -54,21 +54,6 @@ typedef struct AcpiPciHpFind {
PCIBus *bus;
} AcpiPciHpFind;
-static gint g_cmp_uint32(gconstpointer a, gconstpointer b, gpointer user_data)
-{
- return a - b;
-}
-
-static GSequence *pci_acpi_index_list(void)
-{
- static GSequence *used_acpi_index_list;
-
- if (!used_acpi_index_list) {
- used_acpi_index_list = g_sequence_new(NULL);
- }
- return used_acpi_index_list;
-}
-
static int acpi_pcihp_get_bsel(PCIBus *bus)
{
Error *local_err = NULL;
@@ -300,8 +285,6 @@ void acpi_pcihp_reset(AcpiPciHpState *s, bool acpihp_root_off)
acpi_pcihp_update(s);
}
-#define ONBOARD_INDEX_MAX (16 * 1024 - 1)
-
void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp)
{
@@ -314,34 +297,6 @@ void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
ACPI_PCIHP_PROP_BSEL "' set");
return;
}
-
- /*
- * capped by systemd (see: udev-builtin-net_id.c)
- * as it's the only known user honor it to avoid users
- * misconfigure QEMU and then wonder why acpi-index doesn't work
- */
- if (pdev->acpi_index > ONBOARD_INDEX_MAX) {
- error_setg(errp, "acpi-index should be less or equal to %u",
- ONBOARD_INDEX_MAX);
- return;
- }
-
- /*
- * make sure that acpi-index is unique across all present PCI devices
- */
- if (pdev->acpi_index) {
- GSequence *used_indexes = pci_acpi_index_list();
-
- if (g_sequence_lookup(used_indexes, GINT_TO_POINTER(pdev->acpi_index),
- g_cmp_uint32, NULL)) {
- error_setg(errp, "a PCI device with acpi-index = %" PRIu32
- " already exist", pdev->acpi_index);
- return;
- }
- g_sequence_insert_sorted(used_indexes,
- GINT_TO_POINTER(pdev->acpi_index),
- g_cmp_uint32, NULL);
- }
}
void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
@@ -401,17 +356,6 @@ void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
trace_acpi_pci_unplug(PCI_SLOT(pdev->devfn),
acpi_pcihp_get_bsel(pci_get_bus(pdev)));
- /*
- * clean up acpi-index so it could reused by another device
- */
- if (pdev->acpi_index) {
- GSequence *used_indexes = pci_acpi_index_list();
-
- g_sequence_remove(g_sequence_lookup(used_indexes,
- GINT_TO_POINTER(pdev->acpi_index),
- g_cmp_uint32, NULL));
- }
-
qdev_unrealize(dev);
}
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 034fe49e9a..def5000e7b 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -95,6 +95,21 @@ static const VMStateDescription vmstate_pcibus = {
}
};
+static gint g_cmp_uint32(gconstpointer a, gconstpointer b, gpointer user_data)
+{
+ return a - b;
+}
+
+static GSequence *pci_acpi_index_list(void)
+{
+ static GSequence *used_acpi_index_list;
+
+ if (!used_acpi_index_list) {
+ used_acpi_index_list = g_sequence_new(NULL);
+ }
+ return used_acpi_index_list;
+}
+
static void pci_init_bus_master(PCIDevice *pci_dev)
{
AddressSpace *dma_as = pci_device_iommu_address_space(pci_dev);
@@ -1246,6 +1261,17 @@ static void pci_qdev_unrealize(DeviceState *dev)
do_pci_unregister_device(pci_dev);
pci_dev->msi_trigger = NULL;
+
+ /*
+ * clean up acpi-index so it could reused by another device
+ */
+ if (pci_dev->acpi_index) {
+ GSequence *used_indexes = pci_acpi_index_list();
+
+ g_sequence_remove(g_sequence_lookup(used_indexes,
+ GINT_TO_POINTER(pci_dev->acpi_index),
+ g_cmp_uint32, NULL));
+ }
}
void pci_register_bar(PCIDevice *pci_dev, int region_num,
@@ -2005,6 +2031,8 @@ PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn)
return bus->devices[devfn];
}
+#define ONBOARD_INDEX_MAX (16 * 1024 - 1)
+
static void pci_qdev_realize(DeviceState *qdev, Error **errp)
{
PCIDevice *pci_dev = (PCIDevice *)qdev;
@@ -2014,6 +2042,35 @@ static void pci_qdev_realize(DeviceState *qdev, Error **errp)
bool is_default_rom;
uint16_t class_id;
+ /*
+ * capped by systemd (see: udev-builtin-net_id.c)
+ * as it's the only known user honor it to avoid users
+ * misconfigure QEMU and then wonder why acpi-index doesn't work
+ */
+ if (pci_dev->acpi_index > ONBOARD_INDEX_MAX) {
+ error_setg(errp, "acpi-index should be less or equal to %u",
+ ONBOARD_INDEX_MAX);
+ return;
+ }
+
+ /*
+ * make sure that acpi-index is unique across all present PCI devices
+ */
+ if (pci_dev->acpi_index) {
+ GSequence *used_indexes = pci_acpi_index_list();
+
+ if (g_sequence_lookup(used_indexes,
+ GINT_TO_POINTER(pci_dev->acpi_index),
+ g_cmp_uint32, NULL)) {
+ error_setg(errp, "a PCI device with acpi-index = %" PRIu32
+ " already exist", pci_dev->acpi_index);
+ return;
+ }
+ g_sequence_insert_sorted(used_indexes,
+ GINT_TO_POINTER(pci_dev->acpi_index),
+ g_cmp_uint32, NULL);
+ }
+
if (pci_dev->romsize != -1 && !is_power_of_2(pci_dev->romsize)) {
error_setg(errp, "ROM size %u is not a power of two", pci_dev->romsize);
return;
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 56/73] acpi: pci: drop BSEL usage when deciding that device isn't hotpluggable
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (54 preceding siblings ...)
2023-03-08 1:13 ` [PULL 55/73] pci: move acpi-index uniqueness check to generic PCI device code Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 57/73] acpi: pci: move BSEL into build_append_pcihp_slots() Michael S. Tsirkin
` (17 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Igor Mammedov, Ani Sinha, Paolo Bonzini,
Richard Henderson, Eduardo Habkost, Marcel Apfelbaum
From: Igor Mammedov <imammedo@redhat.com>
previous commit ("pci: fix 'hotplugglable' property behavior") fixed
pcie root port's 'hotpluggable' property to behave consistently.
So we don't need a BSEL crutch anymore to see of device is not
hotpluggable, drop it from 'generic' PCI slots description handling.
BSEL is still used to decide if hotplug part should be called
but that will be moved out of generic code to hotplug one by
followup patches.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-31-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/i386/acpi-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 8e2481fe5e..ce14866eda 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -591,7 +591,7 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
/* add _DSM if device has acpi-index set */
- if (pdev->acpi_index && !bsel &&
+ if (pdev->acpi_index &&
!object_property_get_bool(OBJECT(pdev), "hotpluggable",
&error_abort)) {
aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 57/73] acpi: pci: move BSEL into build_append_pcihp_slots()
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (55 preceding siblings ...)
2023-03-08 1:13 ` [PULL 56/73] acpi: pci: drop BSEL usage when deciding that device isn't hotpluggable Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 58/73] acpi: pci: move out ACPI PCI hotplug generator from generic slot generator build_append_pci_bus_devices() Michael S. Tsirkin
` (16 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Igor Mammedov, Ani Sinha, Marcel Apfelbaum,
Paolo Bonzini, Richard Henderson, Eduardo Habkost
From: Igor Mammedov <imammedo@redhat.com>
Generic PCI enumeration code doesn't really need access to
BSEL value, it is only used as means to decide if hotplug
enumerator should be called.
Use stateless object_property_find() to do that, and move
the rest of BSEL handling into build_append_pcihp_slots()
where it belongs.
This cleans up generic code a bit from hotplug stuff
and follow up patch will remove remaining call to
build_append_pcihp_slots() from generic code, making
it possible to use without ACPI PCI hotplug dependencies.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-32-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/i386/acpi-build.c | 15 ++++++---------
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index ce14866eda..0459acfbb4 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -520,12 +520,14 @@ static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
return false;
}
-static void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus,
- QObject *bsel)
+static void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
{
int devfn;
Aml *dev, *notify_method = NULL, *method;
+ QObject *bsel = object_property_get_qobject(OBJECT(bus),
+ ACPI_PCIHP_PROP_BSEL, NULL);
uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
+ qobject_unref(bsel);
aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
@@ -570,12 +572,9 @@ static void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus,
void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
{
- QObject *bsel;
int devfn;
Aml *dev;
- bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL);
-
for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
/* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
@@ -601,11 +600,9 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
aml_append(parent_scope, dev);
}
- if (bsel) {
- build_append_pcihp_slots(parent_scope, bus, bsel);
+ if (object_property_find(OBJECT(bus), ACPI_PCIHP_PROP_BSEL)) {
+ build_append_pcihp_slots(parent_scope, bus);
}
-
- qobject_unref(bsel);
}
static bool build_append_notfication_callback(Aml *parent_scope,
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 58/73] acpi: pci: move out ACPI PCI hotplug generator from generic slot generator build_append_pci_bus_devices()
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (56 preceding siblings ...)
2023-03-08 1:13 ` [PULL 57/73] acpi: pci: move BSEL into build_append_pcihp_slots() Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 59/73] pcihp: move fields enabling hotplug into AcpiPciHpState Michael S. Tsirkin
` (15 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Igor Mammedov, Ani Sinha, Marcel Apfelbaum,
Paolo Bonzini, Richard Henderson, Eduardo Habkost
From: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-33-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/acpi/pcihp.h | 2 ++
hw/acpi/pci-bridge.c | 12 +++++++++++-
hw/i386/acpi-build.c | 9 ++++-----
3 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index 7e268c2c9c..cd18ebdcdc 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -71,6 +71,8 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
/* Called on reset */
void acpi_pcihp_reset(AcpiPciHpState *s, bool acpihp_root_off);
+void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus);
+
extern const VMStateDescription vmstate_acpi_pcihp_pci_status;
#define VMSTATE_PCI_HOTPLUG(pcihp, state, test_pcihp, test_acpi_index) \
diff --git a/hw/acpi/pci-bridge.c b/hw/acpi/pci-bridge.c
index 4fbf6da6ad..7baa7034a1 100644
--- a/hw/acpi/pci-bridge.c
+++ b/hw/acpi/pci-bridge.c
@@ -22,6 +22,16 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope)
PCIBridge *br = PCI_BRIDGE(adev);
if (!DEVICE(br)->hotplugged) {
- build_append_pci_bus_devices(scope, pci_bridge_get_sec_bus(br));
+ PCIBus *sec_bus = pci_bridge_get_sec_bus(br);
+
+ build_append_pci_bus_devices(scope, sec_bus);
+
+ /*
+ * generate hotplug slots descriptors if
+ * bridge has ACPI PCI hotplug attached,
+ */
+ if (object_property_find(OBJECT(sec_bus), ACPI_PCIHP_PROP_BSEL)) {
+ build_append_pcihp_slots(scope, sec_bus);
+ }
}
}
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 0459acfbb4..ec857a117e 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -520,7 +520,7 @@ static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
return false;
}
-static void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
+void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
{
int devfn;
Aml *dev, *notify_method = NULL, *method;
@@ -599,10 +599,6 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
/* device descriptor has been composed, add it into parent context */
aml_append(parent_scope, dev);
}
-
- if (object_property_find(OBJECT(bus), ACPI_PCIHP_PROP_BSEL)) {
- build_append_pcihp_slots(parent_scope, bus);
- }
}
static bool build_append_notfication_callback(Aml *parent_scope,
@@ -1790,6 +1786,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
Aml *scope = aml_scope("PCI0");
/* Scan all PCI buses. Generate tables to support hotplug. */
build_append_pci_bus_devices(scope, bus);
+ if (object_property_find(OBJECT(bus), ACPI_PCIHP_PROP_BSEL)) {
+ build_append_pcihp_slots(scope, bus);
+ }
aml_append(sb_scope, scope);
}
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 59/73] pcihp: move fields enabling hotplug into AcpiPciHpState
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (57 preceding siblings ...)
2023-03-08 1:13 ` [PULL 58/73] acpi: pci: move out ACPI PCI hotplug generator from generic slot generator build_append_pci_bus_devices() Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 60/73] pcihp: add ACPI PCI hotplug specific is_hotpluggable_bus() callback Michael S. Tsirkin
` (14 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Igor Mammedov, Ani Sinha, Marcel Apfelbaum,
Philippe Mathieu-Daudé,
Aurelien Jarno
From: Igor Mammedov <imammedo@redhat.com>
... instead of duplicating them in piix4 and lpc and then
trying to pass them to pcihp routines as arguments.
it simplifies call sites and places pcihp specific in
its own structure.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-34-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/acpi/pcihp.h | 8 ++++----
include/hw/acpi/piix4.h | 2 --
hw/acpi/acpi-pci-hotplug-stub.c | 5 ++---
hw/acpi/ich9.c | 15 +++++++--------
hw/acpi/pcihp.c | 16 ++++++++--------
hw/acpi/piix4.c | 23 +++++++++++++----------
6 files changed, 34 insertions(+), 35 deletions(-)
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index cd18ebdcdc..04c98511a4 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -49,14 +49,14 @@ typedef struct AcpiPciHpState {
uint32_t acpi_index;
PCIBus *root;
MemoryRegion io;
- bool legacy_piix;
uint16_t io_base;
uint16_t io_len;
+ bool use_acpi_hotplug_bridge;
+ bool use_acpi_root_pci_hotplug;
} AcpiPciHpState;
void acpi_pcihp_init(Object *owner, AcpiPciHpState *, PCIBus *root,
- MemoryRegion *address_space_io, bool bridges_enabled,
- uint16_t io_base);
+ MemoryRegion *address_space_io, uint16_t io_base);
void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp);
@@ -69,7 +69,7 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
Error **errp);
/* Called on reset */
-void acpi_pcihp_reset(AcpiPciHpState *s, bool acpihp_root_off);
+void acpi_pcihp_reset(AcpiPciHpState *s);
void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus);
diff --git a/include/hw/acpi/piix4.h b/include/hw/acpi/piix4.h
index be1f8ea80e..eb1c122d80 100644
--- a/include/hw/acpi/piix4.h
+++ b/include/hw/acpi/piix4.h
@@ -57,8 +57,6 @@ struct PIIX4PMState {
Notifier powerdown_notifier;
AcpiPciHpState acpi_pci_hotplug;
- bool use_acpi_hotplug_bridge;
- bool use_acpi_root_pci_hotplug;
bool not_migrate_acpi_index;
uint8_t disable_s3;
diff --git a/hw/acpi/acpi-pci-hotplug-stub.c b/hw/acpi/acpi-pci-hotplug-stub.c
index a43f6dafc9..d1794399f7 100644
--- a/hw/acpi/acpi-pci-hotplug-stub.c
+++ b/hw/acpi/acpi-pci-hotplug-stub.c
@@ -5,8 +5,7 @@
const VMStateDescription vmstate_acpi_pcihp_pci_status;
void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
- MemoryRegion *address_space_io, bool bridges_enabled,
- uint16_t io_base)
+ MemoryRegion *address_space_io, uint16_t io_base)
{
return;
}
@@ -36,7 +35,7 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
return;
}
-void acpi_pcihp_reset(AcpiPciHpState *s, bool acpihp_root_off)
+void acpi_pcihp_reset(AcpiPciHpState *s)
{
return;
}
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index d23bfcaa6b..f778ade7ea 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -218,7 +218,7 @@ static bool vmstate_test_use_pcihp(void *opaque)
{
ICH9LPCPMRegs *s = opaque;
- return s->use_acpi_hotplug_bridge;
+ return s->acpi_pci_hotplug.use_acpi_hotplug_bridge;
}
static const VMStateDescription vmstate_pcihp_state = {
@@ -277,8 +277,8 @@ static void pm_reset(void *opaque)
}
pm->smi_en_wmask = ~0;
- if (pm->use_acpi_hotplug_bridge) {
- acpi_pcihp_reset(&pm->acpi_pci_hotplug, true);
+ if (pm->acpi_pci_hotplug.use_acpi_hotplug_bridge) {
+ acpi_pcihp_reset(&pm->acpi_pci_hotplug);
}
acpi_update_sci(&pm->acpi_regs, pm->irq);
@@ -316,12 +316,11 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, qemu_irq sci_irq)
acpi_pm_tco_init(&pm->tco_regs, &pm->io);
}
- if (pm->use_acpi_hotplug_bridge) {
+ if (pm->acpi_pci_hotplug.use_acpi_hotplug_bridge) {
acpi_pcihp_init(OBJECT(lpc_pci),
&pm->acpi_pci_hotplug,
pci_get_bus(lpc_pci),
pci_address_space_io(lpc_pci),
- true,
ACPI_PCIHP_ADDR_ICH9);
qbus_set_hotplug_handler(BUS(pci_get_bus(lpc_pci)),
@@ -403,14 +402,14 @@ static bool ich9_pm_get_acpi_pci_hotplug(Object *obj, Error **errp)
{
ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
- return s->pm.use_acpi_hotplug_bridge;
+ return s->pm.acpi_pci_hotplug.use_acpi_hotplug_bridge;
}
static void ich9_pm_set_acpi_pci_hotplug(Object *obj, bool value, Error **errp)
{
ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
- s->pm.use_acpi_hotplug_bridge = value;
+ s->pm.acpi_pci_hotplug.use_acpi_hotplug_bridge = value;
}
static bool ich9_pm_get_keep_pci_slot_hpc(Object *obj, Error **errp)
@@ -435,7 +434,7 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
pm->disable_s3 = 0;
pm->disable_s4 = 0;
pm->s4_val = 2;
- pm->use_acpi_hotplug_bridge = true;
+ pm->acpi_pci_hotplug.use_acpi_hotplug_bridge = true;
pm->keep_pci_slot_hpc = true;
pm->enable_tco = true;
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index adf45e8443..34cad061a8 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -276,12 +276,12 @@ static void acpi_pcihp_update(AcpiPciHpState *s)
}
}
-void acpi_pcihp_reset(AcpiPciHpState *s, bool acpihp_root_off)
+void acpi_pcihp_reset(AcpiPciHpState *s)
{
- if (acpihp_root_off) {
+ if (!s->use_acpi_root_pci_hotplug) {
acpi_pcihp_disable_root_bus();
}
- acpi_set_pci_info(!s->legacy_piix);
+ acpi_set_pci_info(s->use_acpi_hotplug_bridge);
acpi_pcihp_update(s);
}
@@ -316,7 +316,7 @@ void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
* Overwrite the default hotplug handler with the ACPI PCI one
* for cold plugged bridges only.
*/
- if (!s->legacy_piix &&
+ if (s->use_acpi_hotplug_bridge &&
object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
@@ -398,7 +398,7 @@ static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
switch (addr) {
case PCI_UP_BASE:
val = s->acpi_pcihp_pci_status[bsel].up;
- if (!s->legacy_piix) {
+ if (s->use_acpi_hotplug_bridge) {
s->acpi_pcihp_pci_status[bsel].up = 0;
}
trace_acpi_pci_up_read(val);
@@ -473,7 +473,8 @@ static void pci_write(void *opaque, hwaddr addr, uint64_t data,
trace_acpi_pci_ej_write(addr, data);
break;
case PCI_SEL_BASE:
- s->hotplug_select = s->legacy_piix ? ACPI_PCIHP_BSEL_DEFAULT : data;
+ s->hotplug_select = s->use_acpi_hotplug_bridge ? data :
+ ACPI_PCIHP_BSEL_DEFAULT;
trace_acpi_pci_sel_write(addr, data);
default:
break;
@@ -491,14 +492,13 @@ static const MemoryRegionOps acpi_pcihp_io_ops = {
};
void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
- MemoryRegion *address_space_io, bool bridges_enabled,
+ MemoryRegion *address_space_io,
uint16_t io_base)
{
s->io_len = ACPI_PCIHP_SIZE;
s->io_base = io_base;
s->root = root_bus;
- s->legacy_piix = !bridges_enabled;
memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s,
"acpi-pci-hotplug", s->io_len);
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 8fc422829a..0a233fa95d 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -170,14 +170,14 @@ static const VMStateDescription vmstate_pci_status = {
static bool vmstate_test_use_acpi_hotplug_bridge(void *opaque, int version_id)
{
PIIX4PMState *s = opaque;
- return s->use_acpi_hotplug_bridge;
+ return s->acpi_pci_hotplug.use_acpi_hotplug_bridge;
}
static bool vmstate_test_no_use_acpi_hotplug_bridge(void *opaque,
int version_id)
{
PIIX4PMState *s = opaque;
- return !s->use_acpi_hotplug_bridge;
+ return !s->acpi_pci_hotplug.use_acpi_hotplug_bridge;
}
static bool vmstate_test_use_memhp(void *opaque)
@@ -234,7 +234,8 @@ static bool piix4_vmstate_need_smbus(void *opaque, int version_id)
static bool vmstate_test_migrate_acpi_index(void *opaque, int version_id)
{
PIIX4PMState *s = PIIX4_PM(opaque);
- return s->use_acpi_hotplug_bridge && !s->not_migrate_acpi_index;
+ return s->acpi_pci_hotplug.use_acpi_hotplug_bridge &&
+ !s->not_migrate_acpi_index;
}
/* qemu-kvm 1.2 uses version 3 but advertised as 2
@@ -303,8 +304,9 @@ static void piix4_pm_reset(DeviceState *dev)
acpi_update_sci(&s->ar, s->irq);
pm_io_space_update(s);
- if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) {
- acpi_pcihp_reset(&s->acpi_pci_hotplug, !s->use_acpi_root_pci_hotplug);
+ if (s->acpi_pci_hotplug.use_acpi_hotplug_bridge ||
+ s->acpi_pci_hotplug.use_acpi_root_pci_hotplug) {
+ acpi_pcihp_reset(&s->acpi_pci_hotplug);
}
}
@@ -487,7 +489,7 @@ static void piix4_pm_realize(PCIDevice *dev, Error **errp)
qemu_add_machine_init_done_notifier(&s->machine_ready);
if (xen_enabled()) {
- s->use_acpi_hotplug_bridge = false;
+ s->acpi_pci_hotplug.use_acpi_hotplug_bridge = false;
}
piix4_acpi_system_hot_add_init(pci_address_space_io(dev),
@@ -560,9 +562,10 @@ static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
"acpi-gpe0", GPE_LEN);
memory_region_add_subregion(parent, GPE_BASE, &s->io_gpe);
- if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) {
+ if (s->acpi_pci_hotplug.use_acpi_hotplug_bridge ||
+ s->acpi_pci_hotplug.use_acpi_root_pci_hotplug) {
acpi_pcihp_init(OBJECT(s), &s->acpi_pci_hotplug, bus, parent,
- s->use_acpi_hotplug_bridge, ACPI_PCIHP_ADDR_PIIX4);
+ ACPI_PCIHP_ADDR_PIIX4);
qbus_set_hotplug_handler(BUS(pci_get_bus(PCI_DEVICE(s))), OBJECT(s));
}
@@ -602,9 +605,9 @@ static Property piix4_pm_properties[] = {
DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_DISABLED, PIIX4PMState, disable_s4, 0),
DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_VAL, PIIX4PMState, s4_val, 2),
DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCIHP_BRIDGE, PIIX4PMState,
- use_acpi_hotplug_bridge, true),
+ acpi_pci_hotplug.use_acpi_hotplug_bridge, true),
DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCI_ROOTHP, PIIX4PMState,
- use_acpi_root_pci_hotplug, true),
+ acpi_pci_hotplug.use_acpi_root_pci_hotplug, true),
DEFINE_PROP_BOOL("memory-hotplug-support", PIIX4PMState,
acpi_memory_hotplug.is_enabled, true),
DEFINE_PROP_BOOL("smm-compat", PIIX4PMState, smm_compat, false),
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 60/73] pcihp: add ACPI PCI hotplug specific is_hotpluggable_bus() callback
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (58 preceding siblings ...)
2023-03-08 1:13 ` [PULL 59/73] pcihp: move fields enabling hotplug into AcpiPciHpState Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 61/73] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register Michael S. Tsirkin
` (13 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Igor Mammedov, Ani Sinha, Marcel Apfelbaum,
Philippe Mathieu-Daudé,
Aurelien Jarno
From: Igor Mammedov <imammedo@redhat.com>
Provide pcihp specific callback to check if bus is hotpluggable
and consolidate its scattered hotplug criteria there.
While at it clean up no longer needed
qbus_set_hotplug_handler(BUS(bus), NULL)
workarounds since callback makes qbus_is_hotpluggable() return
correct answer even if hotplug_handler is set on bus.
PS:
see ("pci: fix 'hotplugglable' property behavior") for details
why callback was introduced.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230302161543.286002-35-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/acpi/ich9.h | 1 +
include/hw/acpi/pcihp.h | 1 +
hw/acpi/acpi-pci-hotplug-stub.c | 4 ++++
hw/acpi/ich9.c | 6 +++++
hw/acpi/pcihp.c | 42 ++++++++++++++-------------------
hw/acpi/piix4.c | 8 +++++++
hw/isa/lpc_ich9.c | 1 +
7 files changed, 39 insertions(+), 24 deletions(-)
diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h
index 57a542c4b8..2faf7f0cae 100644
--- a/include/hw/acpi/ich9.h
+++ b/include/hw/acpi/ich9.h
@@ -87,6 +87,7 @@ void ich9_pm_device_unplug_request_cb(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp);
void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
Error **errp);
+bool ich9_pm_is_hotpluggable_bus(HotplugHandler *hotplug_dev, BusState *bus);
void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list);
#endif /* HW_ACPI_ICH9_H */
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index 04c98511a4..ef59810c17 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -58,6 +58,7 @@ typedef struct AcpiPciHpState {
void acpi_pcihp_init(Object *owner, AcpiPciHpState *, PCIBus *root,
MemoryRegion *address_space_io, uint16_t io_base);
+bool acpi_pcihp_is_hotpluggbale_bus(AcpiPciHpState *s, BusState *bus);
void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp);
void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
diff --git a/hw/acpi/acpi-pci-hotplug-stub.c b/hw/acpi/acpi-pci-hotplug-stub.c
index d1794399f7..dcee3ad7a1 100644
--- a/hw/acpi/acpi-pci-hotplug-stub.c
+++ b/hw/acpi/acpi-pci-hotplug-stub.c
@@ -40,3 +40,7 @@ void acpi_pcihp_reset(AcpiPciHpState *s)
return;
}
+bool acpi_pcihp_is_hotpluggbale_bus(AcpiPciHpState *s, BusState *bus)
+{
+ return true;
+}
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index f778ade7ea..25e2c7243e 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -578,6 +578,12 @@ void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
}
}
+bool ich9_pm_is_hotpluggable_bus(HotplugHandler *hotplug_dev, BusState *bus)
+{
+ ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
+ return acpi_pcihp_is_hotpluggbale_bus(&lpc->pm.acpi_pci_hotplug, bus);
+}
+
void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)
{
ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 34cad061a8..dcfb779a7a 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -121,20 +121,6 @@ static void acpi_set_pci_info(bool has_bridge_hotplug)
}
}
-static void acpi_pcihp_disable_root_bus(void)
-{
- Object *host = acpi_get_i386_pci_host();
- PCIBus *bus;
-
- bus = PCI_HOST_BRIDGE(host)->bus;
- if (bus && qbus_is_hotpluggable(BUS(bus))) {
- /* setting the hotplug handler to NULL makes the bus non-hotpluggable */
- qbus_set_hotplug_handler(BUS(bus), NULL);
- }
-
- return;
-}
-
static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque)
{
AcpiPciHpFind *find = opaque;
@@ -278,9 +264,6 @@ static void acpi_pcihp_update(AcpiPciHpState *s)
void acpi_pcihp_reset(AcpiPciHpState *s)
{
- if (!s->use_acpi_root_pci_hotplug) {
- acpi_pcihp_disable_root_bus();
- }
acpi_set_pci_info(s->use_acpi_hotplug_bridge);
acpi_pcihp_update(s);
}
@@ -320,13 +303,6 @@ void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
- /* Remove all hot-plug handlers if hot-plug is disabled on slot */
- if (object_dynamic_cast(OBJECT(dev), TYPE_PCIE_SLOT) &&
- !PCIE_SLOT(pdev)->hotplug) {
- qbus_set_hotplug_handler(BUS(sec), NULL);
- return;
- }
-
qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev));
/* We don't have to overwrite any other hotplug handler yet */
assert(QLIST_EMPTY(&sec->child));
@@ -385,6 +361,24 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
}
+bool acpi_pcihp_is_hotpluggbale_bus(AcpiPciHpState *s, BusState *bus)
+{
+ Object *o = OBJECT(bus->parent);
+
+ if (s->use_acpi_hotplug_bridge &&
+ object_dynamic_cast(o, TYPE_PCI_BRIDGE)) {
+ if (object_dynamic_cast(o, TYPE_PCIE_SLOT) && !PCIE_SLOT(o)->hotplug) {
+ return false;
+ }
+ return true;
+ }
+
+ if (s->use_acpi_root_pci_hotplug) {
+ return true;
+ }
+ return false;
+}
+
static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
{
AcpiPciHpState *s = opaque;
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 0a233fa95d..63d2113b86 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -404,6 +404,13 @@ static void piix4_device_unplug_cb(HotplugHandler *hotplug_dev,
}
}
+static bool piix4_is_hotpluggable_bus(HotplugHandler *hotplug_dev,
+ BusState *bus)
+{
+ PIIX4PMState *s = PIIX4_PM(hotplug_dev);
+ return acpi_pcihp_is_hotpluggbale_bus(&s->acpi_pci_hotplug, bus);
+}
+
static void piix4_pm_machine_ready(Notifier *n, void *opaque)
{
PIIX4PMState *s = container_of(n, PIIX4PMState, machine_ready);
@@ -644,6 +651,7 @@ static void piix4_pm_class_init(ObjectClass *klass, void *data)
hc->plug = piix4_device_plug_cb;
hc->unplug_request = piix4_device_unplug_request_cb;
hc->unplug = piix4_device_unplug_cb;
+ hc->is_hotpluggable_bus = piix4_is_hotpluggable_bus;
adevc->ospm_status = piix4_ospm_status;
adevc->send_event = piix4_send_gpe;
adevc->madt_cpu = pc_madt_cpu_entry;
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index d8303d0322..9714b0001e 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -865,6 +865,7 @@ static void ich9_lpc_class_init(ObjectClass *klass, void *data)
hc->plug = ich9_pm_device_plug_cb;
hc->unplug_request = ich9_pm_device_unplug_request_cb;
hc->unplug = ich9_pm_device_unplug_cb;
+ hc->is_hotpluggable_bus = ich9_pm_is_hotpluggable_bus;
adevc->ospm_status = ich9_pm_ospm_status;
adevc->send_event = ich9_send_gpe;
adevc->madt_cpu = pc_madt_cpu_entry;
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 61/73] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (59 preceding siblings ...)
2023-03-08 1:13 ` [PULL 60/73] pcihp: add ACPI PCI hotplug specific is_hotpluggable_bus() callback Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-04-26 0:42 ` Peter Xu
2023-03-08 1:13 ` [PULL 62/73] hw/pci/aer: Add missing routing for AER errors Michael S. Tsirkin
` (12 subsequent siblings)
73 siblings, 1 reply; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Jonathan Cameron, Dave Jiang, Fan Ni, Marcel Apfelbaum
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This register in AER should be both writeable and should
have a default value with a couple of the errors masked
including the Uncorrectable Internal Error used by CXL for
it's error reporting.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Message-Id: <20230302133709.30373-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
---
include/hw/pci/pcie_regs.h | 3 +++
hw/pci/pcie_aer.c | 4 ++++
2 files changed, 7 insertions(+)
diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h
index 1fe0bdd25b..4972106c42 100644
--- a/include/hw/pci/pcie_regs.h
+++ b/include/hw/pci/pcie_regs.h
@@ -141,6 +141,9 @@ typedef enum PCIExpLinkWidth {
PCI_ERR_UNC_ATOP_EBLOCKED | \
PCI_ERR_UNC_TLP_PRF_BLOCKED)
+#define PCI_ERR_UNC_MASK_DEFAULT (PCI_ERR_UNC_INTN | \
+ PCI_ERR_UNC_TLP_PRF_BLOCKED)
+
#define PCI_ERR_UNC_SEVERITY_DEFAULT (PCI_ERR_UNC_DLP | \
PCI_ERR_UNC_SDN | \
PCI_ERR_UNC_FCP | \
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 9a19be44ae..909e027d99 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -112,6 +112,10 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset,
pci_set_long(dev->w1cmask + offset + PCI_ERR_UNCOR_STATUS,
PCI_ERR_UNC_SUPPORTED);
+ pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
+ PCI_ERR_UNC_MASK_DEFAULT);
+ pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
+ PCI_ERR_UNC_SUPPORTED);
pci_set_long(dev->config + offset + PCI_ERR_UNCOR_SEVER,
PCI_ERR_UNC_SEVERITY_DEFAULT);
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PULL 61/73] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register
2023-03-08 1:13 ` [PULL 61/73] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register Michael S. Tsirkin
@ 2023-04-26 0:42 ` Peter Xu
2023-04-26 6:12 ` Michael S. Tsirkin
0 siblings, 1 reply; 99+ messages in thread
From: Peter Xu @ 2023-04-26 0:42 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: qemu-devel, Peter Maydell, Jonathan Cameron, Dave Jiang, Fan Ni,
Marcel Apfelbaum, Juan Quintela, Leonardo Bras Soares Passos
Hi, Michael, Jonathan,
On Tue, Mar 07, 2023 at 08:13:53PM -0500, Michael S. Tsirkin wrote:
> From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
> This register in AER should be both writeable and should
> have a default value with a couple of the errors masked
> including the Uncorrectable Internal Error used by CXL for
> it's error reporting.
>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> Message-Id: <20230302133709.30373-2-Jonathan.Cameron@huawei.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> Reviewed-by: Fan Ni <fan.ni@samsung.com>
> ---
> include/hw/pci/pcie_regs.h | 3 +++
> hw/pci/pcie_aer.c | 4 ++++
> 2 files changed, 7 insertions(+)
>
> diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h
> index 1fe0bdd25b..4972106c42 100644
> --- a/include/hw/pci/pcie_regs.h
> +++ b/include/hw/pci/pcie_regs.h
> @@ -141,6 +141,9 @@ typedef enum PCIExpLinkWidth {
> PCI_ERR_UNC_ATOP_EBLOCKED | \
> PCI_ERR_UNC_TLP_PRF_BLOCKED)
>
> +#define PCI_ERR_UNC_MASK_DEFAULT (PCI_ERR_UNC_INTN | \
> + PCI_ERR_UNC_TLP_PRF_BLOCKED)
> +
> #define PCI_ERR_UNC_SEVERITY_DEFAULT (PCI_ERR_UNC_DLP | \
> PCI_ERR_UNC_SDN | \
> PCI_ERR_UNC_FCP | \
> diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
> index 9a19be44ae..909e027d99 100644
> --- a/hw/pci/pcie_aer.c
> +++ b/hw/pci/pcie_aer.c
> @@ -112,6 +112,10 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset,
>
> pci_set_long(dev->w1cmask + offset + PCI_ERR_UNCOR_STATUS,
> PCI_ERR_UNC_SUPPORTED);
> + pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
> + PCI_ERR_UNC_MASK_DEFAULT);
> + pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
> + PCI_ERR_UNC_SUPPORTED);
This breaks the simplest migration from QEMU 8.0->7.2 binaries on all
machine types I think as long as the cap is present, e.g. the default
e1000e provided by the default q35 machine can already hit it with all
default cmdline:
./qemu-system-x86_64 -M pc-q35-7.2 [-incoming XXX]
7.2 binary will have empty wmask for PCI_ERR_UNCOR_MASK, meanwhile I think
it can also see a non-zero value, then the migration will fail at:
vmstate_load 0000:00:02.0/e1000e, e1000e
qemu-7.2: get_pci_config_device: Bad config data: i=0x10a read: 40 device: 0 cmask: ff wmask: 0 w1cmask:0
qemu-7.2: Failed to load PCIDevice:config
qemu-7.2: Failed to load e1000e:parent_obj
qemu-7.2: error while loading state for instance 0x0 of device '0000:00:02.0/e1000e'
qemu-7.2: load of migration failed: Invalid argument
We probably at least want to have the default value to be still zero, and
we'd need to make sure it'll not be modified by the guest, iiuc.
Below oneliner works for me and makes the migration work again:
===8<===
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 103667c368..563a37b79c 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -113,7 +113,7 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset,
pci_set_long(dev->w1cmask + offset + PCI_ERR_UNCOR_STATUS,
PCI_ERR_UNC_SUPPORTED);
pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
- PCI_ERR_UNC_MASK_DEFAULT);
+ 0/*PCI_ERR_UNC_MASK_DEFAULT*/);
pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
PCI_ERR_UNC_SUPPORTED);
===8<===
Anyone could have a look on a solid solution from PCI side?
Copy Juan and Leonardo.
Thanks,
--
Peter Xu
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PULL 61/73] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register
2023-04-26 0:42 ` Peter Xu
@ 2023-04-26 6:12 ` Michael S. Tsirkin
2023-04-26 7:19 ` Juan Quintela
0 siblings, 1 reply; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-04-26 6:12 UTC (permalink / raw)
To: Peter Xu
Cc: qemu-devel, Peter Maydell, Jonathan Cameron, Dave Jiang, Fan Ni,
Marcel Apfelbaum, Juan Quintela, Leonardo Bras Soares Passos
On Tue, Apr 25, 2023 at 08:42:17PM -0400, Peter Xu wrote:
> Hi, Michael, Jonathan,
>
> On Tue, Mar 07, 2023 at 08:13:53PM -0500, Michael S. Tsirkin wrote:
> > From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> >
> > This register in AER should be both writeable and should
> > have a default value with a couple of the errors masked
> > including the Uncorrectable Internal Error used by CXL for
> > it's error reporting.
> >
> > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> > Message-Id: <20230302133709.30373-2-Jonathan.Cameron@huawei.com>
> > Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> > Reviewed-by: Fan Ni <fan.ni@samsung.com>
> > ---
> > include/hw/pci/pcie_regs.h | 3 +++
> > hw/pci/pcie_aer.c | 4 ++++
> > 2 files changed, 7 insertions(+)
> >
> > diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h
> > index 1fe0bdd25b..4972106c42 100644
> > --- a/include/hw/pci/pcie_regs.h
> > +++ b/include/hw/pci/pcie_regs.h
> > @@ -141,6 +141,9 @@ typedef enum PCIExpLinkWidth {
> > PCI_ERR_UNC_ATOP_EBLOCKED | \
> > PCI_ERR_UNC_TLP_PRF_BLOCKED)
> >
> > +#define PCI_ERR_UNC_MASK_DEFAULT (PCI_ERR_UNC_INTN | \
> > + PCI_ERR_UNC_TLP_PRF_BLOCKED)
> > +
> > #define PCI_ERR_UNC_SEVERITY_DEFAULT (PCI_ERR_UNC_DLP | \
> > PCI_ERR_UNC_SDN | \
> > PCI_ERR_UNC_FCP | \
> > diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
> > index 9a19be44ae..909e027d99 100644
> > --- a/hw/pci/pcie_aer.c
> > +++ b/hw/pci/pcie_aer.c
> > @@ -112,6 +112,10 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset,
> >
> > pci_set_long(dev->w1cmask + offset + PCI_ERR_UNCOR_STATUS,
> > PCI_ERR_UNC_SUPPORTED);
> > + pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
> > + PCI_ERR_UNC_MASK_DEFAULT);
> > + pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
> > + PCI_ERR_UNC_SUPPORTED);
>
> This breaks the simplest migration from QEMU 8.0->7.2 binaries on all
> machine types I think as long as the cap is present, e.g. the default
> e1000e provided by the default q35 machine can already hit it with all
> default cmdline:
>
> ./qemu-system-x86_64 -M pc-q35-7.2 [-incoming XXX]
>
> 7.2 binary will have empty wmask for PCI_ERR_UNCOR_MASK, meanwhile I think
> it can also see a non-zero value, then the migration will fail at:
>
> vmstate_load 0000:00:02.0/e1000e, e1000e
> qemu-7.2: get_pci_config_device: Bad config data: i=0x10a read: 40 device: 0 cmask: ff wmask: 0 w1cmask:0
> qemu-7.2: Failed to load PCIDevice:config
> qemu-7.2: Failed to load e1000e:parent_obj
> qemu-7.2: error while loading state for instance 0x0 of device '0000:00:02.0/e1000e'
> qemu-7.2: load of migration failed: Invalid argument
>
> We probably at least want to have the default value to be still zero, and
> we'd need to make sure it'll not be modified by the guest, iiuc.
>
> Below oneliner works for me and makes the migration work again:
>
> ===8<===
> diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
> index 103667c368..563a37b79c 100644
> --- a/hw/pci/pcie_aer.c
> +++ b/hw/pci/pcie_aer.c
> @@ -113,7 +113,7 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset,
> pci_set_long(dev->w1cmask + offset + PCI_ERR_UNCOR_STATUS,
> PCI_ERR_UNC_SUPPORTED);
> pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
> - PCI_ERR_UNC_MASK_DEFAULT);
> + 0/*PCI_ERR_UNC_MASK_DEFAULT*/);
> pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
> PCI_ERR_UNC_SUPPORTED);
> ===8<===
>
> Anyone could have a look on a solid solution from PCI side?
>
> Copy Juan and Leonardo.
>
> Thanks,
My bad, I forgot about this 🤦.
So we need a property and tweak it with compat machinery depending on
machine type. Jonathan, can you work on this pls?
Or I can revert for now to relieve the time pressure,
redo the patch at your leasure.
> --
> Peter Xu
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PULL 61/73] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register
2023-04-26 6:12 ` Michael S. Tsirkin
@ 2023-04-26 7:19 ` Juan Quintela
2023-05-03 0:32 ` Leonardo Brás
0 siblings, 1 reply; 99+ messages in thread
From: Juan Quintela @ 2023-04-26 7:19 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Peter Xu, qemu-devel, Peter Maydell, Jonathan Cameron,
Dave Jiang, Fan Ni, Marcel Apfelbaum,
Leonardo Bras Soares Passos
"Michael S. Tsirkin" <mst@redhat.com> wrote:
> On Tue, Apr 25, 2023 at 08:42:17PM -0400, Peter Xu wrote:
>> Hi, Michael, Jonathan,
>>
>> On Tue, Mar 07, 2023 at 08:13:53PM -0500, Michael S. Tsirkin wrote:
>> This breaks the simplest migration from QEMU 8.0->7.2 binaries on all
>> machine types I think as long as the cap is present, e.g. the default
>> e1000e provided by the default q35 machine can already hit it with all
>> default cmdline:
>>
>> ./qemu-system-x86_64 -M pc-q35-7.2 [-incoming XXX]
>>
>> 7.2 binary will have empty wmask for PCI_ERR_UNCOR_MASK, meanwhile I think
>> it can also see a non-zero value, then the migration will fail at:
>>
>> vmstate_load 0000:00:02.0/e1000e, e1000e
>> qemu-7.2: get_pci_config_device: Bad config data: i=0x10a read: 40 device: 0 cmask: ff wmask: 0 w1cmask:0
>> qemu-7.2: Failed to load PCIDevice:config
>> qemu-7.2: Failed to load e1000e:parent_obj
>> qemu-7.2: error while loading state for instance 0x0 of device '0000:00:02.0/e1000e'
>> qemu-7.2: load of migration failed: Invalid argument
>>
>> We probably at least want to have the default value to be still zero, and
>> we'd need to make sure it'll not be modified by the guest, iiuc.
>>
>> Below oneliner works for me and makes the migration work again:
>>
>> ===8<===
>> diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
>> index 103667c368..563a37b79c 100644
>> --- a/hw/pci/pcie_aer.c
>> +++ b/hw/pci/pcie_aer.c
>> @@ -113,7 +113,7 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset,
>> pci_set_long(dev->w1cmask + offset + PCI_ERR_UNCOR_STATUS,
>> PCI_ERR_UNC_SUPPORTED);
>> pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
>> - PCI_ERR_UNC_MASK_DEFAULT);
>> + 0/*PCI_ERR_UNC_MASK_DEFAULT*/);
>> pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
>> PCI_ERR_UNC_SUPPORTED);
>> ===8<===
>>
>> Anyone could have a look on a solid solution from PCI side?
>>
>> Copy Juan and Leonardo.
>>
>> Thanks,
>
> My bad, I forgot about this 🤦.
> So we need a property and tweak it with compat machinery depending on
> machine type. Jonathan, can you work on this pls?
> Or I can revert for now to relieve the time pressure,
> redo the patch at your leasure.
I agree with Michael here, the best option is adding a new property.
Later, Juan.
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PULL 61/73] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register
2023-04-26 7:19 ` Juan Quintela
@ 2023-05-03 0:32 ` Leonardo Brás
2023-05-03 4:08 ` Michael S. Tsirkin
0 siblings, 1 reply; 99+ messages in thread
From: Leonardo Brás @ 2023-05-03 0:32 UTC (permalink / raw)
To: quintela, Michael S. Tsirkin
Cc: Peter Xu, qemu-devel, Peter Maydell, Jonathan Cameron,
Dave Jiang, Fan Ni, Marcel Apfelbaum,
Leonardo Bras Soares Passos
Hello Michael, Juan, Peter,
On Wed, 2023-04-26 at 09:19 +0200, Juan Quintela wrote:
> "Michael S. Tsirkin" <mst@redhat.com> wrote:
> > On Tue, Apr 25, 2023 at 08:42:17PM -0400, Peter Xu wrote:
> > > Hi, Michael, Jonathan,
> > >
> > > On Tue, Mar 07, 2023 at 08:13:53PM -0500, Michael S. Tsirkin wrote:
> > > This breaks the simplest migration from QEMU 8.0->7.2 binaries on all
> > > machine types I think as long as the cap is present, e.g. the default
> > > e1000e provided by the default q35 machine can already hit it with all
> > > default cmdline:
> > >
> > > ./qemu-system-x86_64 -M pc-q35-7.2 [-incoming XXX]
> > >
> > > 7.2 binary will have empty wmask for PCI_ERR_UNCOR_MASK, meanwhile I think
> > > it can also see a non-zero value, then the migration will fail at:
> > >
> > > vmstate_load 0000:00:02.0/e1000e, e1000e
> > > qemu-7.2: get_pci_config_device: Bad config data: i=0x10a read: 40 device: 0 cmask: ff wmask: 0 w1cmask:0
> > > qemu-7.2: Failed to load PCIDevice:config
> > > qemu-7.2: Failed to load e1000e:parent_obj
> > > qemu-7.2: error while loading state for instance 0x0 of device '0000:00:02.0/e1000e'
> > > qemu-7.2: load of migration failed: Invalid argument
> > >
> > > We probably at least want to have the default value to be still zero, and
> > > we'd need to make sure it'll not be modified by the guest, iiuc.
> > >
> > > Below oneliner works for me and makes the migration work again:
> > >
> > > ===8<===
> > > diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
> > > index 103667c368..563a37b79c 100644
> > > --- a/hw/pci/pcie_aer.c
> > > +++ b/hw/pci/pcie_aer.c
> > > @@ -113,7 +113,7 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset,
> > > pci_set_long(dev->w1cmask + offset + PCI_ERR_UNCOR_STATUS,
> > > PCI_ERR_UNC_SUPPORTED);
> > > pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
> > > - PCI_ERR_UNC_MASK_DEFAULT);
> > > + 0/*PCI_ERR_UNC_MASK_DEFAULT*/);
> > > pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
> > > PCI_ERR_UNC_SUPPORTED);
> > > ===8<===
> > >
> > > Anyone could have a look on a solid solution from PCI side?
> > >
> > > Copy Juan and Leonardo.
> > >
> > > Thanks,
> >
> > My bad, I forgot about this 🤦.
> > So we need a property and tweak it with compat machinery depending on
> > machine type. Jonathan, can you work on this pls?
> > Or I can revert for now to relieve the time pressure,
> > redo the patch at your leasure.
>
> I agree with Michael here, the best option is adding a new property.
>
> Later, Juan.
>
I sent a patch implementing the suggested fix:
https://lore.kernel.org/qemu-devel/20230503002701.854329-1-leobras@redhat.com/T/#u
Please let me know of anything to improve.
Best regards,
Leo
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PULL 61/73] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register
2023-05-03 0:32 ` Leonardo Brás
@ 2023-05-03 4:08 ` Michael S. Tsirkin
2023-05-03 9:31 ` Jonathan Cameron via
0 siblings, 1 reply; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-05-03 4:08 UTC (permalink / raw)
To: Leonardo Brás
Cc: quintela, Peter Xu, qemu-devel, Peter Maydell, Jonathan Cameron,
Dave Jiang, Fan Ni, Marcel Apfelbaum,
Leonardo Bras Soares Passos
On Tue, May 02, 2023 at 09:32:34PM -0300, Leonardo Brás wrote:
> Hello Michael, Juan, Peter,
>
> On Wed, 2023-04-26 at 09:19 +0200, Juan Quintela wrote:
> > "Michael S. Tsirkin" <mst@redhat.com> wrote:
> > > On Tue, Apr 25, 2023 at 08:42:17PM -0400, Peter Xu wrote:
> > > > Hi, Michael, Jonathan,
> > > >
> > > > On Tue, Mar 07, 2023 at 08:13:53PM -0500, Michael S. Tsirkin wrote:
> > > > This breaks the simplest migration from QEMU 8.0->7.2 binaries on all
> > > > machine types I think as long as the cap is present, e.g. the default
> > > > e1000e provided by the default q35 machine can already hit it with all
> > > > default cmdline:
> > > >
> > > > ./qemu-system-x86_64 -M pc-q35-7.2 [-incoming XXX]
> > > >
> > > > 7.2 binary will have empty wmask for PCI_ERR_UNCOR_MASK, meanwhile I think
> > > > it can also see a non-zero value, then the migration will fail at:
> > > >
> > > > vmstate_load 0000:00:02.0/e1000e, e1000e
> > > > qemu-7.2: get_pci_config_device: Bad config data: i=0x10a read: 40 device: 0 cmask: ff wmask: 0 w1cmask:0
> > > > qemu-7.2: Failed to load PCIDevice:config
> > > > qemu-7.2: Failed to load e1000e:parent_obj
> > > > qemu-7.2: error while loading state for instance 0x0 of device '0000:00:02.0/e1000e'
> > > > qemu-7.2: load of migration failed: Invalid argument
> > > >
> > > > We probably at least want to have the default value to be still zero, and
> > > > we'd need to make sure it'll not be modified by the guest, iiuc.
> > > >
> > > > Below oneliner works for me and makes the migration work again:
> > > >
> > > > ===8<===
> > > > diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
> > > > index 103667c368..563a37b79c 100644
> > > > --- a/hw/pci/pcie_aer.c
> > > > +++ b/hw/pci/pcie_aer.c
> > > > @@ -113,7 +113,7 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset,
> > > > pci_set_long(dev->w1cmask + offset + PCI_ERR_UNCOR_STATUS,
> > > > PCI_ERR_UNC_SUPPORTED);
> > > > pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
> > > > - PCI_ERR_UNC_MASK_DEFAULT);
> > > > + 0/*PCI_ERR_UNC_MASK_DEFAULT*/);
> > > > pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
> > > > PCI_ERR_UNC_SUPPORTED);
> > > > ===8<===
> > > >
> > > > Anyone could have a look on a solid solution from PCI side?
> > > >
> > > > Copy Juan and Leonardo.
> > > >
> > > > Thanks,
> > >
> > > My bad, I forgot about this 🤦.
> > > So we need a property and tweak it with compat machinery depending on
> > > machine type. Jonathan, can you work on this pls?
> > > Or I can revert for now to relieve the time pressure,
> > > redo the patch at your leasure.
> >
> > I agree with Michael here, the best option is adding a new property.
> >
> > Later, Juan.
> >
>
> I sent a patch implementing the suggested fix:
> https://lore.kernel.org/qemu-devel/20230503002701.854329-1-leobras@redhat.com/T/#u
>
> Please let me know of anything to improve.
>
> Best regards,
> Leo
Weird, didn't get it for some reason. Pulled it from lore now, thanks!
--
MST
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PULL 61/73] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register
2023-05-03 4:08 ` Michael S. Tsirkin
@ 2023-05-03 9:31 ` Jonathan Cameron via
0 siblings, 0 replies; 99+ messages in thread
From: Jonathan Cameron via @ 2023-05-03 9:31 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Leonardo Brás, quintela, Peter Xu, qemu-devel,
Peter Maydell, Dave Jiang, Fan Ni, Marcel Apfelbaum,
Leonardo Bras Soares Passos
On Wed, 3 May 2023 00:08:55 -0400
"Michael S. Tsirkin" <mst@redhat.com> wrote:
> On Tue, May 02, 2023 at 09:32:34PM -0300, Leonardo Brás wrote:
> > Hello Michael, Juan, Peter,
> >
> > On Wed, 2023-04-26 at 09:19 +0200, Juan Quintela wrote:
> > > "Michael S. Tsirkin" <mst@redhat.com> wrote:
> > > > On Tue, Apr 25, 2023 at 08:42:17PM -0400, Peter Xu wrote:
> > > > > Hi, Michael, Jonathan,
> > > > >
> > > > > On Tue, Mar 07, 2023 at 08:13:53PM -0500, Michael S. Tsirkin wrote:
> > > > > This breaks the simplest migration from QEMU 8.0->7.2 binaries on all
> > > > > machine types I think as long as the cap is present, e.g. the default
> > > > > e1000e provided by the default q35 machine can already hit it with all
> > > > > default cmdline:
> > > > >
> > > > > ./qemu-system-x86_64 -M pc-q35-7.2 [-incoming XXX]
> > > > >
> > > > > 7.2 binary will have empty wmask for PCI_ERR_UNCOR_MASK, meanwhile I think
> > > > > it can also see a non-zero value, then the migration will fail at:
> > > > >
> > > > > vmstate_load 0000:00:02.0/e1000e, e1000e
> > > > > qemu-7.2: get_pci_config_device: Bad config data: i=0x10a read: 40 device: 0 cmask: ff wmask: 0 w1cmask:0
> > > > > qemu-7.2: Failed to load PCIDevice:config
> > > > > qemu-7.2: Failed to load e1000e:parent_obj
> > > > > qemu-7.2: error while loading state for instance 0x0 of device '0000:00:02.0/e1000e'
> > > > > qemu-7.2: load of migration failed: Invalid argument
> > > > >
> > > > > We probably at least want to have the default value to be still zero, and
> > > > > we'd need to make sure it'll not be modified by the guest, iiuc.
> > > > >
> > > > > Below oneliner works for me and makes the migration work again:
> > > > >
> > > > > ===8<===
> > > > > diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
> > > > > index 103667c368..563a37b79c 100644
> > > > > --- a/hw/pci/pcie_aer.c
> > > > > +++ b/hw/pci/pcie_aer.c
> > > > > @@ -113,7 +113,7 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset,
> > > > > pci_set_long(dev->w1cmask + offset + PCI_ERR_UNCOR_STATUS,
> > > > > PCI_ERR_UNC_SUPPORTED);
> > > > > pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
> > > > > - PCI_ERR_UNC_MASK_DEFAULT);
> > > > > + 0/*PCI_ERR_UNC_MASK_DEFAULT*/);
> > > > > pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
> > > > > PCI_ERR_UNC_SUPPORTED);
> > > > > ===8<===
> > > > >
> > > > > Anyone could have a look on a solid solution from PCI side?
> > > > >
> > > > > Copy Juan and Leonardo.
> > > > >
> > > > > Thanks,
> > > >
> > > > My bad, I forgot about this 🤦.
> > > > So we need a property and tweak it with compat machinery depending on
> > > > machine type. Jonathan, can you work on this pls?
> > > > Or I can revert for now to relieve the time pressure,
> > > > redo the patch at your leasure.
> > >
> > > I agree with Michael here, the best option is adding a new property.
> > >
> > > Later, Juan.
> > >
> >
> > I sent a patch implementing the suggested fix:
> > https://lore.kernel.org/qemu-devel/20230503002701.854329-1-leobras@redhat.com/T/#u
> >
> > Please let me know of anything to improve.
> >
> > Best regards,
> > Leo
>
> Weird, didn't get it for some reason. Pulled it from lore now, thanks!
>
Thanks all. Sorry for lack of reply, crazy week at a conference, so I wasn't
successfully keeping up with email and still working through backlog.
Obviously I forgot about migration across versions. Sorry!
The fix Leo posted looks good to me. Given in theory a previously loaded
driver /firmware could have set these all to 0, any driver code should not
be assuming they take the defaults in the PCI spec. Might make a difference
to any testing using errors injected very early (e.g. before drivers load)
but meh, that's a corner case no one has hit previously so I doubt they ever will.
Thanks to all involved.
Jonathan
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PULL 62/73] hw/pci/aer: Add missing routing for AER errors
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (60 preceding siblings ...)
2023-03-08 1:13 ` [PULL 61/73] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:13 ` [PULL 63/73] hw/pci-bridge/cxl_root_port: Wire up AER Michael S. Tsirkin
` (11 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Jonathan Cameron, Dave Jiang, Fan Ni, Marcel Apfelbaum
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
PCIe r6.0 Figure 6-3 "Pseudo Logic Diagram for Selected Error Message Control
and Status Bits" includes a right hand branch under "All PCI Express devices"
that allows for messages to be generated or sent onwards without SERR#
being set as long as the appropriate per error class bit in the PCIe
Device Control Register is set.
Implement that branch thus enabling routing of ERR_COR, ERR_NONFATAL
and ERR_FATAL under OSes that set these bits appropriately (e.g. Linux)
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Message-Id: <20230302133709.30373-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
---
hw/pci/pcie_aer.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 909e027d99..103667c368 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -192,8 +192,16 @@ static void pcie_aer_update_uncor_status(PCIDevice *dev)
static bool
pcie_aer_msg_alldev(PCIDevice *dev, const PCIEAERMsg *msg)
{
+ uint16_t devctl = pci_get_word(dev->config + dev->exp.exp_cap +
+ PCI_EXP_DEVCTL);
if (!(pcie_aer_msg_is_uncor(msg) &&
- (pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_SERR))) {
+ (pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_SERR)) &&
+ !((msg->severity == PCI_ERR_ROOT_CMD_NONFATAL_EN) &&
+ (devctl & PCI_EXP_DEVCTL_NFERE)) &&
+ !((msg->severity == PCI_ERR_ROOT_CMD_COR_EN) &&
+ (devctl & PCI_EXP_DEVCTL_CERE)) &&
+ !((msg->severity == PCI_ERR_ROOT_CMD_FATAL_EN) &&
+ (devctl & PCI_EXP_DEVCTL_FERE))) {
return false;
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 63/73] hw/pci-bridge/cxl_root_port: Wire up AER
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (61 preceding siblings ...)
2023-03-08 1:13 ` [PULL 62/73] hw/pci/aer: Add missing routing for AER errors Michael S. Tsirkin
@ 2023-03-08 1:13 ` Michael S. Tsirkin
2023-03-08 1:14 ` [PULL 64/73] hw/pci-bridge/cxl_root_port: Wire up MSI Michael S. Tsirkin
` (10 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:13 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Jonathan Cameron, Dave Jiang, Fan Ni, Marcel Apfelbaum
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
We are missing necessary config write handling for AER emulation in
the CXL root port. Add it based on pcie_root_port.c
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Message-Id: <20230302133709.30373-4-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
---
hw/pci-bridge/cxl_root_port.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/pci-bridge/cxl_root_port.c b/hw/pci-bridge/cxl_root_port.c
index 6664783974..00195257f7 100644
--- a/hw/pci-bridge/cxl_root_port.c
+++ b/hw/pci-bridge/cxl_root_port.c
@@ -187,12 +187,15 @@ static void cxl_rp_write_config(PCIDevice *d, uint32_t address, uint32_t val,
int len)
{
uint16_t slt_ctl, slt_sta;
+ uint32_t root_cmd =
+ pci_get_long(d->config + d->exp.aer_cap + PCI_ERR_ROOT_COMMAND);
pcie_cap_slot_get(d, &slt_ctl, &slt_sta);
pci_bridge_write_config(d, address, val, len);
pcie_cap_flr_write_config(d, address, val, len);
pcie_cap_slot_write_config(d, slt_ctl, slt_sta, address, val, len);
pcie_aer_write_config(d, address, val, len);
+ pcie_aer_root_write_config(d, address, val, len, root_cmd);
cxl_rp_dvsec_write_config(d, address, val, len);
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 64/73] hw/pci-bridge/cxl_root_port: Wire up MSI
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (62 preceding siblings ...)
2023-03-08 1:13 ` [PULL 63/73] hw/pci-bridge/cxl_root_port: Wire up AER Michael S. Tsirkin
@ 2023-03-08 1:14 ` Michael S. Tsirkin
2023-03-08 1:14 ` [PULL 65/73] hw/mem/cxl-type3: Add AER extended capability Michael S. Tsirkin
` (9 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Jonathan Cameron, Dave Jiang, Fan Ni, Marcel Apfelbaum
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Done to avoid fixing ACPI route description of traditional PCI interrupts on q35
and because we should probably move with the times anyway.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Message-Id: <20230302133709.30373-5-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
---
hw/pci-bridge/cxl_root_port.c | 61 +++++++++++++++++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/hw/pci-bridge/cxl_root_port.c b/hw/pci-bridge/cxl_root_port.c
index 00195257f7..7dfd20aa67 100644
--- a/hw/pci-bridge/cxl_root_port.c
+++ b/hw/pci-bridge/cxl_root_port.c
@@ -22,6 +22,7 @@
#include "qemu/range.h"
#include "hw/pci/pci_bridge.h"
#include "hw/pci/pcie_port.h"
+#include "hw/pci/msi.h"
#include "hw/qdev-properties.h"
#include "hw/sysbus.h"
#include "qapi/error.h"
@@ -29,6 +30,10 @@
#define CXL_ROOT_PORT_DID 0x7075
+#define CXL_RP_MSI_OFFSET 0x60
+#define CXL_RP_MSI_SUPPORTED_FLAGS PCI_MSI_FLAGS_MASKBIT
+#define CXL_RP_MSI_NR_VECTOR 2
+
/* Copied from the gen root port which we derive */
#define GEN_PCIE_ROOT_PORT_AER_OFFSET 0x100
#define GEN_PCIE_ROOT_PORT_ACS_OFFSET \
@@ -47,6 +52,49 @@ typedef struct CXLRootPort {
#define TYPE_CXL_ROOT_PORT "cxl-rp"
DECLARE_INSTANCE_CHECKER(CXLRootPort, CXL_ROOT_PORT, TYPE_CXL_ROOT_PORT)
+/*
+ * If two MSI vector are allocated, Advanced Error Interrupt Message Number
+ * is 1. otherwise 0.
+ * 17.12.5.10 RPERRSTS, 32:27 bit Advanced Error Interrupt Message Number.
+ */
+static uint8_t cxl_rp_aer_vector(const PCIDevice *d)
+{
+ switch (msi_nr_vectors_allocated(d)) {
+ case 1:
+ return 0;
+ case 2:
+ return 1;
+ case 4:
+ case 8:
+ case 16:
+ case 32:
+ default:
+ break;
+ }
+ abort();
+ return 0;
+}
+
+static int cxl_rp_interrupts_init(PCIDevice *d, Error **errp)
+{
+ int rc;
+
+ rc = msi_init(d, CXL_RP_MSI_OFFSET, CXL_RP_MSI_NR_VECTOR,
+ CXL_RP_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_64BIT,
+ CXL_RP_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_MASKBIT,
+ errp);
+ if (rc < 0) {
+ assert(rc == -ENOTSUP);
+ }
+
+ return rc;
+}
+
+static void cxl_rp_interrupts_uninit(PCIDevice *d)
+{
+ msi_uninit(d);
+}
+
static void latch_registers(CXLRootPort *crp)
{
uint32_t *reg_state = crp->cxl_cstate.crb.cache_mem_registers;
@@ -183,6 +231,15 @@ static void cxl_rp_dvsec_write_config(PCIDevice *dev, uint32_t addr,
}
}
+static void cxl_rp_aer_vector_update(PCIDevice *d)
+{
+ PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(d);
+
+ if (rpc->aer_vector) {
+ pcie_aer_root_set_vector(d, rpc->aer_vector(d));
+ }
+}
+
static void cxl_rp_write_config(PCIDevice *d, uint32_t address, uint32_t val,
int len)
{
@@ -192,6 +249,7 @@ static void cxl_rp_write_config(PCIDevice *d, uint32_t address, uint32_t val,
pcie_cap_slot_get(d, &slt_ctl, &slt_sta);
pci_bridge_write_config(d, address, val, len);
+ cxl_rp_aer_vector_update(d);
pcie_cap_flr_write_config(d, address, val, len);
pcie_cap_slot_write_config(d, slt_ctl, slt_sta, address, val, len);
pcie_aer_write_config(d, address, val, len);
@@ -220,6 +278,9 @@ static void cxl_root_port_class_init(ObjectClass *oc, void *data)
rpc->aer_offset = GEN_PCIE_ROOT_PORT_AER_OFFSET;
rpc->acs_offset = GEN_PCIE_ROOT_PORT_ACS_OFFSET;
+ rpc->aer_vector = cxl_rp_aer_vector;
+ rpc->interrupts_init = cxl_rp_interrupts_init;
+ rpc->interrupts_uninit = cxl_rp_interrupts_uninit;
dc->hotpluggable = false;
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 65/73] hw/mem/cxl-type3: Add AER extended capability
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (63 preceding siblings ...)
2023-03-08 1:14 ` [PULL 64/73] hw/pci-bridge/cxl_root_port: Wire up MSI Michael S. Tsirkin
@ 2023-03-08 1:14 ` Michael S. Tsirkin
2023-03-08 1:14 ` [PULL 66/73] hw/cxl: Fix endian issues in CXL RAS capability defaults / masks Michael S. Tsirkin
` (8 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Jonathan Cameron, Dave Jiang, Fan Ni, Ben Widawsky
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This enables AER error injection to function as expected.
It is intended as a building block in enabling CXL RAS error injection
in the following patches.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Message-Id: <20230302133709.30373-6-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
---
hw/mem/cxl_type3.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 217a5e639b..6cdd988d1d 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -250,6 +250,7 @@ static void ct3d_config_write(PCIDevice *pci_dev, uint32_t addr, uint32_t val,
pcie_doe_write_config(&ct3d->doe_cdat, addr, val, size);
pci_default_write_config(pci_dev, addr, val, size);
+ pcie_aer_write_config(pci_dev, addr, val, size);
}
/*
@@ -452,8 +453,19 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp)
cxl_cstate->cdat.free_cdat_table = ct3_free_cdat_table;
cxl_cstate->cdat.private = ct3d;
cxl_doe_cdat_init(cxl_cstate, errp);
+
+ pcie_cap_deverr_init(pci_dev);
+ /* Leave a bit of room for expansion */
+ rc = pcie_aer_init(pci_dev, PCI_ERR_VER, 0x200, PCI_ERR_SIZEOF, NULL);
+ if (rc) {
+ goto err_release_cdat;
+ }
+
return;
+err_release_cdat:
+ cxl_doe_cdat_release(cxl_cstate);
+ g_free(regs->special_ops);
err_address_space_free:
address_space_destroy(&ct3d->hostmem_as);
return;
@@ -465,6 +477,7 @@ static void ct3_exit(PCIDevice *pci_dev)
CXLComponentState *cxl_cstate = &ct3d->cxl_cstate;
ComponentRegisters *regs = &cxl_cstate->crb;
+ pcie_aer_exit(pci_dev);
cxl_doe_cdat_release(cxl_cstate);
g_free(regs->special_ops);
address_space_destroy(&ct3d->hostmem_as);
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 66/73] hw/cxl: Fix endian issues in CXL RAS capability defaults / masks
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (64 preceding siblings ...)
2023-03-08 1:14 ` [PULL 65/73] hw/mem/cxl-type3: Add AER extended capability Michael S. Tsirkin
@ 2023-03-08 1:14 ` Michael S. Tsirkin
2023-03-08 1:14 ` [PULL 67/73] hw/pci/aer: Make PCIE AER error injection facility available for other emulation to use Michael S. Tsirkin
` (7 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Jonathan Cameron, Dave Jiang,
Philippe Mathieu-Daudé,
Fan Ni, Ben Widawsky
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
As these are about to be modified, fix the endian handle for
this set of registers rather than making it worse.
Note that CXL is currently only supported in QEMU on
x86 (arm64 patches out of tree) so we aren't going to yet hit
an problems with big endian. However it is good to avoid making
things worse for that support in the future.
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230302133709.30373-7-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
---
hw/cxl/cxl-component-utils.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c
index 3edd303a33..737b4764b9 100644
--- a/hw/cxl/cxl-component-utils.c
+++ b/hw/cxl/cxl-component-utils.c
@@ -141,17 +141,17 @@ static void ras_init_common(uint32_t *reg_state, uint32_t *write_msk)
* Error status is RW1C but given bits are not yet set, it can
* be handled as RO.
*/
- reg_state[R_CXL_RAS_UNC_ERR_STATUS] = 0;
+ stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_STATUS, 0);
/* Bits 12-13 and 17-31 reserved in CXL 2.0 */
- reg_state[R_CXL_RAS_UNC_ERR_MASK] = 0x1cfff;
- write_msk[R_CXL_RAS_UNC_ERR_MASK] = 0x1cfff;
- reg_state[R_CXL_RAS_UNC_ERR_SEVERITY] = 0x1cfff;
- write_msk[R_CXL_RAS_UNC_ERR_SEVERITY] = 0x1cfff;
- reg_state[R_CXL_RAS_COR_ERR_STATUS] = 0;
- reg_state[R_CXL_RAS_COR_ERR_MASK] = 0x7f;
- write_msk[R_CXL_RAS_COR_ERR_MASK] = 0x7f;
+ stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_MASK, 0x1cfff);
+ stl_le_p(write_msk + R_CXL_RAS_UNC_ERR_MASK, 0x1cfff);
+ stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_SEVERITY, 0x1cfff);
+ stl_le_p(write_msk + R_CXL_RAS_UNC_ERR_SEVERITY, 0x1cfff);
+ stl_le_p(reg_state + R_CXL_RAS_COR_ERR_STATUS, 0);
+ stl_le_p(reg_state + R_CXL_RAS_COR_ERR_MASK, 0x7f);
+ stl_le_p(write_msk + R_CXL_RAS_COR_ERR_MASK, 0x7f);
/* CXL switches and devices must set */
- reg_state[R_CXL_RAS_ERR_CAP_CTRL] = 0x00;
+ stl_le_p(reg_state + R_CXL_RAS_ERR_CAP_CTRL, 0x00);
}
static void hdm_init_common(uint32_t *reg_state, uint32_t *write_msk,
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 67/73] hw/pci/aer: Make PCIE AER error injection facility available for other emulation to use.
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (65 preceding siblings ...)
2023-03-08 1:14 ` [PULL 66/73] hw/cxl: Fix endian issues in CXL RAS capability defaults / masks Michael S. Tsirkin
@ 2023-03-08 1:14 ` Michael S. Tsirkin
2023-03-08 1:14 ` [PULL 68/73] hw/mem/cxl_type3: Add CXL RAS Error Injection Support Michael S. Tsirkin
` (6 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Jonathan Cameron, Dave Jiang,
Philippe Mathieu-Daudé,
Fan Ni, Marcel Apfelbaum
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This infrastructure will be reused for CXL RAS error injection
in patches that follow.
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230302133709.30373-8-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
---
hw/pci/pci-internal.h | 1 -
include/hw/pci/pcie_aer.h | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci/pci-internal.h b/hw/pci/pci-internal.h
index 2ea356bdf5..a7d6d8a732 100644
--- a/hw/pci/pci-internal.h
+++ b/hw/pci/pci-internal.h
@@ -20,6 +20,5 @@ void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent);
int pcie_aer_parse_error_string(const char *error_name,
uint32_t *status, bool *correctable);
-int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err);
#endif
diff --git a/include/hw/pci/pcie_aer.h b/include/hw/pci/pcie_aer.h
index 65e71d98fe..1234fdc4e2 100644
--- a/include/hw/pci/pcie_aer.h
+++ b/include/hw/pci/pcie_aer.h
@@ -100,4 +100,5 @@ void pcie_aer_root_write_config(PCIDevice *dev,
uint32_t addr, uint32_t val, int len,
uint32_t root_cmd_prev);
+int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err);
#endif /* QEMU_PCIE_AER_H */
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 68/73] hw/mem/cxl_type3: Add CXL RAS Error Injection Support.
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (66 preceding siblings ...)
2023-03-08 1:14 ` [PULL 67/73] hw/pci/aer: Make PCIE AER error injection facility available for other emulation to use Michael S. Tsirkin
@ 2023-03-08 1:14 ` Michael S. Tsirkin
2023-03-08 1:14 ` [PULL 69/73] hw/pci: Add pcie_count_ds_port() and pcie_find_port_first() helpers Michael S. Tsirkin
` (5 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Jonathan Cameron, Ben Widawsky, Fan Ni,
Eric Blake, Markus Armbruster, Michael Roth
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
CXL uses PCI AER Internal errors to signal to the host that an error has
occurred. The host can then read more detailed status from the CXL RAS
capability.
For uncorrectable errors: support multiple injection in one operation
as this is needed to reliably test multiple header logging support in an
OS. The equivalent feature doesn't exist for correctable errors, so only
one error need be injected at a time.
Note:
- Header content needs to be manually specified in a fashion that
matches the specification for what can be in the header for each
error type.
Injection via QMP:
{ "execute": "qmp_capabilities" }
...
{ "execute": "cxl-inject-uncorrectable-errors",
"arguments": {
"path": "/machine/peripheral/cxl-pmem0",
"errors": [
{
"type": "cache-address-parity",
"header": [ 3, 4]
},
{
"type": "cache-data-parity",
"header": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
},
{
"type": "internal",
"header": [ 1, 2, 4]
}
]
}}
...
{ "execute": "cxl-inject-correctable-error",
"arguments": {
"path": "/machine/peripheral/cxl-pmem0",
"type": "physical"
} }
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230302133709.30373-9-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
qapi/cxl.json | 128 +++++++++++++++
qapi/qapi-schema.json | 1 +
include/hw/cxl/cxl_component.h | 26 +++
include/hw/cxl/cxl_device.h | 11 ++
hw/cxl/cxl-component-utils.c | 4 +-
hw/mem/cxl_type3.c | 281 +++++++++++++++++++++++++++++++++
hw/mem/cxl_type3_stubs.c | 17 ++
hw/mem/meson.build | 2 +
qapi/meson.build | 1 +
9 files changed, 470 insertions(+), 1 deletion(-)
create mode 100644 qapi/cxl.json
create mode 100644 hw/mem/cxl_type3_stubs.c
diff --git a/qapi/cxl.json b/qapi/cxl.json
new file mode 100644
index 0000000000..4be7d46041
--- /dev/null
+++ b/qapi/cxl.json
@@ -0,0 +1,128 @@
+# -*- Mode: Python -*-
+# vim: filetype=python
+
+##
+# = CXL devices
+##
+
+##
+# @CxlUncorErrorType:
+#
+# Type of uncorrectable CXL error to inject. These errors are reported via
+# an AER uncorrectable internal error with additional information logged at
+# the CXL device.
+#
+# @cache-data-parity: Data error such as data parity or data ECC error CXL.cache
+# @cache-address-parity: Address parity or other errors associated with the
+# address field on CXL.cache
+# @cache-be-parity: Byte enable parity or other byte enable errors on CXL.cache
+# @cache-data-ecc: ECC error on CXL.cache
+# @mem-data-parity: Data error such as data parity or data ECC error on CXL.mem
+# @mem-address-parity: Address parity or other errors associated with the
+# address field on CXL.mem
+# @mem-be-parity: Byte enable parity or other byte enable errors on CXL.mem.
+# @mem-data-ecc: Data ECC error on CXL.mem.
+# @reinit-threshold: REINIT threshold hit.
+# @rsvd-encoding: Received unrecognized encoding.
+# @poison-received: Received poison from the peer.
+# @receiver-overflow: Buffer overflows (first 3 bits of header log indicate which)
+# @internal: Component specific error
+# @cxl-ide-tx: Integrity and data encryption tx error.
+# @cxl-ide-rx: Integrity and data encryption rx error.
+#
+# Since: 8.0
+##
+
+{ 'enum': 'CxlUncorErrorType',
+ 'data': ['cache-data-parity',
+ 'cache-address-parity',
+ 'cache-be-parity',
+ 'cache-data-ecc',
+ 'mem-data-parity',
+ 'mem-address-parity',
+ 'mem-be-parity',
+ 'mem-data-ecc',
+ 'reinit-threshold',
+ 'rsvd-encoding',
+ 'poison-received',
+ 'receiver-overflow',
+ 'internal',
+ 'cxl-ide-tx',
+ 'cxl-ide-rx'
+ ]
+ }
+
+##
+# @CXLUncorErrorRecord:
+#
+# Record of a single error including header log.
+#
+# @type: Type of error
+# @header: 16 DWORD of header.
+#
+# Since: 8.0
+##
+{ 'struct': 'CXLUncorErrorRecord',
+ 'data': {
+ 'type': 'CxlUncorErrorType',
+ 'header': [ 'uint32' ]
+ }
+}
+
+##
+# @cxl-inject-uncorrectable-errors:
+#
+# Command to allow injection of multiple errors in one go. This allows testing
+# of multiple header log handling in the OS.
+#
+# @path: CXL Type 3 device canonical QOM path
+# @errors: Errors to inject
+#
+# Since: 8.0
+##
+{ 'command': 'cxl-inject-uncorrectable-errors',
+ 'data': { 'path': 'str',
+ 'errors': [ 'CXLUncorErrorRecord' ] }}
+
+##
+# @CxlCorErrorType:
+#
+# Type of CXL correctable error to inject
+#
+# @cache-data-ecc: Data ECC error on CXL.cache
+# @mem-data-ecc: Data ECC error on CXL.mem
+# @crc-threshold: Component specific and applicable to 68 byte Flit mode only.
+# @cache-poison-received: Received poison from a peer on CXL.cache.
+# @mem-poison-received: Received poison from a peer on CXL.mem
+# @physical: Received error indication from the physical layer.
+#
+# Since: 8.0
+##
+{ 'enum': 'CxlCorErrorType',
+ 'data': ['cache-data-ecc',
+ 'mem-data-ecc',
+ 'crc-threshold',
+ 'retry-threshold',
+ 'cache-poison-received',
+ 'mem-poison-received',
+ 'physical']
+}
+
+##
+# @cxl-inject-correctable-error:
+#
+# Command to inject a single correctable error. Multiple error injection
+# of this error type is not interesting as there is no associated header log.
+# These errors are reported via AER as a correctable internal error, with
+# additional detail available from the CXL device.
+#
+# @path: CXL Type 3 device canonical QOM path
+# @type: Type of error.
+#
+# Since: 8.0
+##
+{ 'command': 'cxl-inject-correctable-error',
+ 'data': { 'path': 'str',
+ 'type': 'CxlCorErrorType'
+ }
+}
diff --git a/qapi/qapi-schema.json b/qapi/qapi-schema.json
index 1e923945db..7c09af5cc8 100644
--- a/qapi/qapi-schema.json
+++ b/qapi/qapi-schema.json
@@ -96,3 +96,4 @@
{ 'include': 'stats.json' }
{ 'include': 'virtio.json' }
{ 'include': 'cryptodev.json' }
+{ 'include': 'cxl.json' }
diff --git a/include/hw/cxl/cxl_component.h b/include/hw/cxl/cxl_component.h
index 692d7a5507..ec4203b83f 100644
--- a/include/hw/cxl/cxl_component.h
+++ b/include/hw/cxl/cxl_component.h
@@ -65,11 +65,37 @@ CXLx_CAPABILITY_HEADER(SNOOP, 0x14)
#define CXL_RAS_REGISTERS_OFFSET 0x80
#define CXL_RAS_REGISTERS_SIZE 0x58
REG32(CXL_RAS_UNC_ERR_STATUS, CXL_RAS_REGISTERS_OFFSET)
+#define CXL_RAS_UNC_ERR_CACHE_DATA_PARITY 0
+#define CXL_RAS_UNC_ERR_CACHE_ADDRESS_PARITY 1
+#define CXL_RAS_UNC_ERR_CACHE_BE_PARITY 2
+#define CXL_RAS_UNC_ERR_CACHE_DATA_ECC 3
+#define CXL_RAS_UNC_ERR_MEM_DATA_PARITY 4
+#define CXL_RAS_UNC_ERR_MEM_ADDRESS_PARITY 5
+#define CXL_RAS_UNC_ERR_MEM_BE_PARITY 6
+#define CXL_RAS_UNC_ERR_MEM_DATA_ECC 7
+#define CXL_RAS_UNC_ERR_REINIT_THRESHOLD 8
+#define CXL_RAS_UNC_ERR_RSVD_ENCODING 9
+#define CXL_RAS_UNC_ERR_POISON_RECEIVED 10
+#define CXL_RAS_UNC_ERR_RECEIVER_OVERFLOW 11
+#define CXL_RAS_UNC_ERR_INTERNAL 14
+#define CXL_RAS_UNC_ERR_CXL_IDE_TX 15
+#define CXL_RAS_UNC_ERR_CXL_IDE_RX 16
+#define CXL_RAS_UNC_ERR_CXL_UNUSED 63 /* Magic value */
REG32(CXL_RAS_UNC_ERR_MASK, CXL_RAS_REGISTERS_OFFSET + 0x4)
REG32(CXL_RAS_UNC_ERR_SEVERITY, CXL_RAS_REGISTERS_OFFSET + 0x8)
REG32(CXL_RAS_COR_ERR_STATUS, CXL_RAS_REGISTERS_OFFSET + 0xc)
+#define CXL_RAS_COR_ERR_CACHE_DATA_ECC 0
+#define CXL_RAS_COR_ERR_MEM_DATA_ECC 1
+#define CXL_RAS_COR_ERR_CRC_THRESHOLD 2
+#define CXL_RAS_COR_ERR_RETRY_THRESHOLD 3
+#define CXL_RAS_COR_ERR_CACHE_POISON_RECEIVED 4
+#define CXL_RAS_COR_ERR_MEM_POISON_RECEIVED 5
+#define CXL_RAS_COR_ERR_PHYSICAL 6
REG32(CXL_RAS_COR_ERR_MASK, CXL_RAS_REGISTERS_OFFSET + 0x10)
REG32(CXL_RAS_ERR_CAP_CTRL, CXL_RAS_REGISTERS_OFFSET + 0x14)
+ FIELD(CXL_RAS_ERR_CAP_CTRL, FIRST_ERROR_POINTER, 0, 6)
+REG32(CXL_RAS_ERR_HEADER0, CXL_RAS_REGISTERS_OFFSET + 0x18)
+#define CXL_RAS_ERR_HEADER_NUM 32
/* Offset 0x18 - 0x58 reserved for RAS logs */
/* 8.2.5.10 - CXL Security Capability Structure */
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index 7e5ad65c1d..d589f78202 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -232,6 +232,14 @@ REG64(CXL_MEM_DEV_STS, 0)
FIELD(CXL_MEM_DEV_STS, MBOX_READY, 4, 1)
FIELD(CXL_MEM_DEV_STS, RESET_NEEDED, 5, 3)
+typedef struct CXLError {
+ QTAILQ_ENTRY(CXLError) node;
+ int type; /* Error code as per FE definition */
+ uint32_t header[32];
+} CXLError;
+
+typedef QTAILQ_HEAD(, CXLError) CXLErrorList;
+
struct CXLType3Dev {
/* Private */
PCIDevice parent_obj;
@@ -248,6 +256,9 @@ struct CXLType3Dev {
/* DOE */
DOECap doe_cdat;
+
+ /* Error injection */
+ CXLErrorList error_list;
};
#define TYPE_CXL_TYPE3 "cxl-type3"
diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c
index 737b4764b9..b665d4f565 100644
--- a/hw/cxl/cxl-component-utils.c
+++ b/hw/cxl/cxl-component-utils.c
@@ -142,16 +142,18 @@ static void ras_init_common(uint32_t *reg_state, uint32_t *write_msk)
* be handled as RO.
*/
stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_STATUS, 0);
+ stl_le_p(write_msk + R_CXL_RAS_UNC_ERR_STATUS, 0x1cfff);
/* Bits 12-13 and 17-31 reserved in CXL 2.0 */
stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_MASK, 0x1cfff);
stl_le_p(write_msk + R_CXL_RAS_UNC_ERR_MASK, 0x1cfff);
stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_SEVERITY, 0x1cfff);
stl_le_p(write_msk + R_CXL_RAS_UNC_ERR_SEVERITY, 0x1cfff);
stl_le_p(reg_state + R_CXL_RAS_COR_ERR_STATUS, 0);
+ stl_le_p(write_msk + R_CXL_RAS_COR_ERR_STATUS, 0x7f);
stl_le_p(reg_state + R_CXL_RAS_COR_ERR_MASK, 0x7f);
stl_le_p(write_msk + R_CXL_RAS_COR_ERR_MASK, 0x7f);
/* CXL switches and devices must set */
- stl_le_p(reg_state + R_CXL_RAS_ERR_CAP_CTRL, 0x00);
+ stl_le_p(reg_state + R_CXL_RAS_ERR_CAP_CTRL, 0x200);
}
static void hdm_init_common(uint32_t *reg_state, uint32_t *write_msk,
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 6cdd988d1d..abe60b362c 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1,6 +1,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qemu/error-report.h"
+#include "qapi/qapi-commands-cxl.h"
#include "hw/mem/memory-device.h"
#include "hw/mem/pc-dimm.h"
#include "hw/pci/pci.h"
@@ -323,6 +324,66 @@ static void hdm_decoder_commit(CXLType3Dev *ct3d, int which)
ARRAY_FIELD_DP32(cache_mem, CXL_HDM_DECODER0_CTRL, COMMITTED, 1);
}
+static int ct3d_qmp_uncor_err_to_cxl(CxlUncorErrorType qmp_err)
+{
+ switch (qmp_err) {
+ case CXL_UNCOR_ERROR_TYPE_CACHE_DATA_PARITY:
+ return CXL_RAS_UNC_ERR_CACHE_DATA_PARITY;
+ case CXL_UNCOR_ERROR_TYPE_CACHE_ADDRESS_PARITY:
+ return CXL_RAS_UNC_ERR_CACHE_ADDRESS_PARITY;
+ case CXL_UNCOR_ERROR_TYPE_CACHE_BE_PARITY:
+ return CXL_RAS_UNC_ERR_CACHE_BE_PARITY;
+ case CXL_UNCOR_ERROR_TYPE_CACHE_DATA_ECC:
+ return CXL_RAS_UNC_ERR_CACHE_DATA_ECC;
+ case CXL_UNCOR_ERROR_TYPE_MEM_DATA_PARITY:
+ return CXL_RAS_UNC_ERR_MEM_DATA_PARITY;
+ case CXL_UNCOR_ERROR_TYPE_MEM_ADDRESS_PARITY:
+ return CXL_RAS_UNC_ERR_MEM_ADDRESS_PARITY;
+ case CXL_UNCOR_ERROR_TYPE_MEM_BE_PARITY:
+ return CXL_RAS_UNC_ERR_MEM_BE_PARITY;
+ case CXL_UNCOR_ERROR_TYPE_MEM_DATA_ECC:
+ return CXL_RAS_UNC_ERR_MEM_DATA_ECC;
+ case CXL_UNCOR_ERROR_TYPE_REINIT_THRESHOLD:
+ return CXL_RAS_UNC_ERR_REINIT_THRESHOLD;
+ case CXL_UNCOR_ERROR_TYPE_RSVD_ENCODING:
+ return CXL_RAS_UNC_ERR_RSVD_ENCODING;
+ case CXL_UNCOR_ERROR_TYPE_POISON_RECEIVED:
+ return CXL_RAS_UNC_ERR_POISON_RECEIVED;
+ case CXL_UNCOR_ERROR_TYPE_RECEIVER_OVERFLOW:
+ return CXL_RAS_UNC_ERR_RECEIVER_OVERFLOW;
+ case CXL_UNCOR_ERROR_TYPE_INTERNAL:
+ return CXL_RAS_UNC_ERR_INTERNAL;
+ case CXL_UNCOR_ERROR_TYPE_CXL_IDE_TX:
+ return CXL_RAS_UNC_ERR_CXL_IDE_TX;
+ case CXL_UNCOR_ERROR_TYPE_CXL_IDE_RX:
+ return CXL_RAS_UNC_ERR_CXL_IDE_RX;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int ct3d_qmp_cor_err_to_cxl(CxlCorErrorType qmp_err)
+{
+ switch (qmp_err) {
+ case CXL_COR_ERROR_TYPE_CACHE_DATA_ECC:
+ return CXL_RAS_COR_ERR_CACHE_DATA_ECC;
+ case CXL_COR_ERROR_TYPE_MEM_DATA_ECC:
+ return CXL_RAS_COR_ERR_MEM_DATA_ECC;
+ case CXL_COR_ERROR_TYPE_CRC_THRESHOLD:
+ return CXL_RAS_COR_ERR_CRC_THRESHOLD;
+ case CXL_COR_ERROR_TYPE_RETRY_THRESHOLD:
+ return CXL_RAS_COR_ERR_RETRY_THRESHOLD;
+ case CXL_COR_ERROR_TYPE_CACHE_POISON_RECEIVED:
+ return CXL_RAS_COR_ERR_CACHE_POISON_RECEIVED;
+ case CXL_COR_ERROR_TYPE_MEM_POISON_RECEIVED:
+ return CXL_RAS_COR_ERR_MEM_POISON_RECEIVED;
+ case CXL_COR_ERROR_TYPE_PHYSICAL:
+ return CXL_RAS_COR_ERR_PHYSICAL;
+ default:
+ return -EINVAL;
+ }
+}
+
static void ct3d_reg_write(void *opaque, hwaddr offset, uint64_t value,
unsigned size)
{
@@ -341,6 +402,83 @@ static void ct3d_reg_write(void *opaque, hwaddr offset, uint64_t value,
should_commit = FIELD_EX32(value, CXL_HDM_DECODER0_CTRL, COMMIT);
which_hdm = 0;
break;
+ case A_CXL_RAS_UNC_ERR_STATUS:
+ {
+ uint32_t capctrl = ldl_le_p(cache_mem + R_CXL_RAS_ERR_CAP_CTRL);
+ uint32_t fe = FIELD_EX32(capctrl, CXL_RAS_ERR_CAP_CTRL, FIRST_ERROR_POINTER);
+ CXLError *cxl_err;
+ uint32_t unc_err;
+
+ /*
+ * If single bit written that corresponds to the first error
+ * pointer being cleared, update the status and header log.
+ */
+ if (!QTAILQ_EMPTY(&ct3d->error_list)) {
+ if ((1 << fe) ^ value) {
+ CXLError *cxl_next;
+ /*
+ * Software is using wrong flow for multiple header recording
+ * Following behavior in PCIe r6.0 and assuming multiple
+ * header support. Implementation defined choice to clear all
+ * matching records if more than one bit set - which corresponds
+ * closest to behavior of hardware not capable of multiple
+ * header recording.
+ */
+ QTAILQ_FOREACH_SAFE(cxl_err, &ct3d->error_list, node, cxl_next) {
+ if ((1 << cxl_err->type) & value) {
+ QTAILQ_REMOVE(&ct3d->error_list, cxl_err, node);
+ g_free(cxl_err);
+ }
+ }
+ } else {
+ /* Done with previous FE, so drop from list */
+ cxl_err = QTAILQ_FIRST(&ct3d->error_list);
+ QTAILQ_REMOVE(&ct3d->error_list, cxl_err, node);
+ g_free(cxl_err);
+ }
+
+ /*
+ * If there is another FE, then put that in place and update
+ * the header log
+ */
+ if (!QTAILQ_EMPTY(&ct3d->error_list)) {
+ uint32_t *header_log = &cache_mem[R_CXL_RAS_ERR_HEADER0];
+ int i;
+
+ cxl_err = QTAILQ_FIRST(&ct3d->error_list);
+ for (i = 0; i < CXL_RAS_ERR_HEADER_NUM; i++) {
+ stl_le_p(header_log + i, cxl_err->header[i]);
+ }
+ capctrl = FIELD_DP32(capctrl, CXL_RAS_ERR_CAP_CTRL,
+ FIRST_ERROR_POINTER, cxl_err->type);
+ } else {
+ /*
+ * If no more errors, then follow recomendation of PCI spec
+ * r6.0 6.2.4.2 to set the first error pointer to a status
+ * bit that will never be used.
+ */
+ capctrl = FIELD_DP32(capctrl, CXL_RAS_ERR_CAP_CTRL,
+ FIRST_ERROR_POINTER,
+ CXL_RAS_UNC_ERR_CXL_UNUSED);
+ }
+ stl_le_p((uint8_t *)cache_mem + A_CXL_RAS_ERR_CAP_CTRL, capctrl);
+ }
+ unc_err = 0;
+ QTAILQ_FOREACH(cxl_err, &ct3d->error_list, node) {
+ unc_err |= 1 << cxl_err->type;
+ }
+ stl_le_p((uint8_t *)cache_mem + offset, unc_err);
+
+ return;
+ }
+ case A_CXL_RAS_COR_ERR_STATUS:
+ {
+ uint32_t rw1c = value;
+ uint32_t temp = ldl_le_p((uint8_t *)cache_mem + offset);
+ temp &= ~rw1c;
+ stl_le_p((uint8_t *)cache_mem + offset, temp);
+ return;
+ }
default:
break;
}
@@ -404,6 +542,8 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp)
unsigned short msix_num = 1;
int i, rc;
+ QTAILQ_INIT(&ct3d->error_list);
+
if (!cxl_setup_memory(ct3d, errp)) {
return;
}
@@ -631,6 +771,147 @@ static void set_lsa(CXLType3Dev *ct3d, const void *buf, uint64_t size,
*/
}
+/* For uncorrectable errors include support for multiple header recording */
+void qmp_cxl_inject_uncorrectable_errors(const char *path,
+ CXLUncorErrorRecordList *errors,
+ Error **errp)
+{
+ Object *obj = object_resolve_path(path, NULL);
+ static PCIEAERErr err = {};
+ CXLType3Dev *ct3d;
+ CXLError *cxl_err;
+ uint32_t *reg_state;
+ uint32_t unc_err;
+ bool first;
+
+ if (!obj) {
+ error_setg(errp, "Unable to resolve path");
+ return;
+ }
+
+ if (!object_dynamic_cast(obj, TYPE_CXL_TYPE3)) {
+ error_setg(errp, "Path does not point to a CXL type 3 device");
+ return;
+ }
+
+ err.status = PCI_ERR_UNC_INTN;
+ err.source_id = pci_requester_id(PCI_DEVICE(obj));
+ err.flags = 0;
+
+ ct3d = CXL_TYPE3(obj);
+
+ first = QTAILQ_EMPTY(&ct3d->error_list);
+ reg_state = ct3d->cxl_cstate.crb.cache_mem_registers;
+ while (errors) {
+ uint32List *header = errors->value->header;
+ uint8_t header_count = 0;
+ int cxl_err_code;
+
+ cxl_err_code = ct3d_qmp_uncor_err_to_cxl(errors->value->type);
+ if (cxl_err_code < 0) {
+ error_setg(errp, "Unknown error code");
+ return;
+ }
+
+ /* If the error is masked, nothing to do here */
+ if (!((1 << cxl_err_code) &
+ ~ldl_le_p(reg_state + R_CXL_RAS_UNC_ERR_MASK))) {
+ errors = errors->next;
+ continue;
+ }
+
+ cxl_err = g_malloc0(sizeof(*cxl_err));
+ if (!cxl_err) {
+ return;
+ }
+
+ cxl_err->type = cxl_err_code;
+ while (header && header_count < 32) {
+ cxl_err->header[header_count++] = header->value;
+ header = header->next;
+ }
+ if (header_count > 32) {
+ error_setg(errp, "Header must be 32 DWORD or less");
+ return;
+ }
+ QTAILQ_INSERT_TAIL(&ct3d->error_list, cxl_err, node);
+
+ errors = errors->next;
+ }
+
+ if (first && !QTAILQ_EMPTY(&ct3d->error_list)) {
+ uint32_t *cache_mem = ct3d->cxl_cstate.crb.cache_mem_registers;
+ uint32_t capctrl = ldl_le_p(cache_mem + R_CXL_RAS_ERR_CAP_CTRL);
+ uint32_t *header_log = &cache_mem[R_CXL_RAS_ERR_HEADER0];
+ int i;
+
+ cxl_err = QTAILQ_FIRST(&ct3d->error_list);
+ for (i = 0; i < CXL_RAS_ERR_HEADER_NUM; i++) {
+ stl_le_p(header_log + i, cxl_err->header[i]);
+ }
+
+ capctrl = FIELD_DP32(capctrl, CXL_RAS_ERR_CAP_CTRL,
+ FIRST_ERROR_POINTER, cxl_err->type);
+ stl_le_p(cache_mem + R_CXL_RAS_ERR_CAP_CTRL, capctrl);
+ }
+
+ unc_err = 0;
+ QTAILQ_FOREACH(cxl_err, &ct3d->error_list, node) {
+ unc_err |= (1 << cxl_err->type);
+ }
+ if (!unc_err) {
+ return;
+ }
+
+ stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_STATUS, unc_err);
+ pcie_aer_inject_error(PCI_DEVICE(obj), &err);
+
+ return;
+}
+
+void qmp_cxl_inject_correctable_error(const char *path, CxlCorErrorType type,
+ Error **errp)
+{
+ static PCIEAERErr err = {};
+ Object *obj = object_resolve_path(path, NULL);
+ CXLType3Dev *ct3d;
+ uint32_t *reg_state;
+ uint32_t cor_err;
+ int cxl_err_type;
+
+ if (!obj) {
+ error_setg(errp, "Unable to resolve path");
+ return;
+ }
+ if (!object_dynamic_cast(obj, TYPE_CXL_TYPE3)) {
+ error_setg(errp, "Path does not point to a CXL type 3 device");
+ return;
+ }
+
+ err.status = PCI_ERR_COR_INTERNAL;
+ err.source_id = pci_requester_id(PCI_DEVICE(obj));
+ err.flags = PCIE_AER_ERR_IS_CORRECTABLE;
+
+ ct3d = CXL_TYPE3(obj);
+ reg_state = ct3d->cxl_cstate.crb.cache_mem_registers;
+ cor_err = ldl_le_p(reg_state + R_CXL_RAS_COR_ERR_STATUS);
+
+ cxl_err_type = ct3d_qmp_cor_err_to_cxl(type);
+ if (cxl_err_type < 0) {
+ error_setg(errp, "Invalid COR error");
+ return;
+ }
+ /* If the error is masked, nothting to do here */
+ if (!((1 << cxl_err_type) & ~ldl_le_p(reg_state + R_CXL_RAS_COR_ERR_MASK))) {
+ return;
+ }
+
+ cor_err |= (1 << cxl_err_type);
+ stl_le_p(reg_state + R_CXL_RAS_COR_ERR_STATUS, cor_err);
+
+ pcie_aer_inject_error(PCI_DEVICE(obj), &err);
+}
+
static void ct3_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
diff --git a/hw/mem/cxl_type3_stubs.c b/hw/mem/cxl_type3_stubs.c
new file mode 100644
index 0000000000..d574c58f9a
--- /dev/null
+++ b/hw/mem/cxl_type3_stubs.c
@@ -0,0 +1,17 @@
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qapi/qapi-commands-cxl.h"
+
+void qmp_cxl_inject_uncorrectable_errors(const char *path,
+ CXLUncorErrorRecordList *errors,
+ Error **errp)
+{
+ error_setg(errp, "CXL Type 3 support is not compiled in");
+}
+
+void qmp_cxl_inject_correctable_error(const char *path, CxlCorErrorType type,
+ Error **errp)
+{
+ error_setg(errp, "CXL Type 3 support is not compiled in");
+}
diff --git a/hw/mem/meson.build b/hw/mem/meson.build
index 609b2b36fc..56c2618b84 100644
--- a/hw/mem/meson.build
+++ b/hw/mem/meson.build
@@ -4,6 +4,8 @@ mem_ss.add(when: 'CONFIG_DIMM', if_true: files('pc-dimm.c'))
mem_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_mc.c'))
mem_ss.add(when: 'CONFIG_NVDIMM', if_true: files('nvdimm.c'))
mem_ss.add(when: 'CONFIG_CXL_MEM_DEVICE', if_true: files('cxl_type3.c'))
+softmmu_ss.add(when: 'CONFIG_CXL_MEM_DEVICE', if_false: files('cxl_type3_stubs.c'))
+softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('cxl_type3_stubs.c'))
softmmu_ss.add_all(when: 'CONFIG_MEM_DEVICE', if_true: mem_ss)
diff --git a/qapi/meson.build b/qapi/meson.build
index 1c37ae7491..9fd480c4d8 100644
--- a/qapi/meson.build
+++ b/qapi/meson.build
@@ -31,6 +31,7 @@ qapi_all_modules = [
'compat',
'control',
'crypto',
+ 'cxl',
'dump',
'error',
'introspect',
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 69/73] hw/pci: Add pcie_count_ds_port() and pcie_find_port_first() helpers
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (67 preceding siblings ...)
2023-03-08 1:14 ` [PULL 68/73] hw/mem/cxl_type3: Add CXL RAS Error Injection Support Michael S. Tsirkin
@ 2023-03-08 1:14 ` Michael S. Tsirkin
2023-03-08 1:14 ` [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden Michael S. Tsirkin
` (4 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:14 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Jonathan Cameron, Marcel Apfelbaum
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
These two helpers enable host bridges to operate differently depending on
the number of downstream ports, in particular if there is only a single
port.
Useful for CXL where HDM address decoders are allowed to be implicit in
the host bridge if there is only a single root port.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230227153128.8164-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/pci/pcie_port.h | 2 ++
hw/pci/pcie_port.c | 38 ++++++++++++++++++++++++++++++++++++++
2 files changed, 40 insertions(+)
diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
index 6c40e3733f..90e6cf45b8 100644
--- a/include/hw/pci/pcie_port.h
+++ b/include/hw/pci/pcie_port.h
@@ -41,6 +41,8 @@ struct PCIEPort {
void pcie_port_init_reg(PCIDevice *d);
PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn);
+PCIDevice *pcie_find_port_first(PCIBus *bus);
+int pcie_count_ds_ports(PCIBus *bus);
#define TYPE_PCIE_SLOT "pcie-slot"
OBJECT_DECLARE_SIMPLE_TYPE(PCIESlot, PCIE_SLOT)
diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c
index 000633fec1..20ff2b39e8 100644
--- a/hw/pci/pcie_port.c
+++ b/hw/pci/pcie_port.c
@@ -161,6 +161,44 @@ PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn)
return NULL;
}
+/* Find first port in devfn number order */
+PCIDevice *pcie_find_port_first(PCIBus *bus)
+{
+ int devfn;
+
+ for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
+ PCIDevice *d = bus->devices[devfn];
+
+ if (!d || !pci_is_express(d) || !d->exp.exp_cap) {
+ continue;
+ }
+
+ if (object_dynamic_cast(OBJECT(d), TYPE_PCIE_PORT)) {
+ return d;
+ }
+ }
+
+ return NULL;
+}
+
+int pcie_count_ds_ports(PCIBus *bus)
+{
+ int dsp_count = 0;
+ int devfn;
+
+ for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
+ PCIDevice *d = bus->devices[devfn];
+
+ if (!d || !pci_is_express(d) || !d->exp.exp_cap) {
+ continue;
+ }
+ if (object_dynamic_cast(OBJECT(d), TYPE_PCIE_PORT)) {
+ dsp_count++;
+ }
+ }
+ return dsp_count;
+}
+
static bool pcie_slot_is_hotpluggbale_bus(HotplugHandler *plug_handler,
BusState *bus)
{
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (68 preceding siblings ...)
2023-03-08 1:14 ` [PULL 69/73] hw/pci: Add pcie_count_ds_port() and pcie_find_port_first() helpers Michael S. Tsirkin
@ 2023-03-08 1:14 ` Michael S. Tsirkin
2023-04-11 10:26 ` Peter Maydell
2023-03-08 1:14 ` [PULL 71/73] hw/virtio/vhost-user: avoid using unitialized errp Michael S. Tsirkin
` (3 subsequent siblings)
73 siblings, 1 reply; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Jonathan Cameron, Fan Ni, Ben Widawsky, Marcel Apfelbaum
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The CXL r3.0 specification allows for there to be no HDM decoders on CXL
Host Bridges if they have only a single root port. Instead, all accesses
directed to the host bridge (as specified in CXL Fixed Memory Windows)
are assumed to be routed to the single root port.
Linux currently assumes this implementation choice. So to simplify testing,
make QEMU emulation also default to no HDM decoders under these particular
circumstances, but provide a hdm_for_passthrough boolean option to have
HDM decoders as previously.
Technically this is breaking backwards compatibility, but given the only
known software stack used with the QEMU emulation is the Linux kernel
and this configuration did not work before this change, there are
unlikely to be any complaints that it now works. The option is retained
to allow testing of software that does allow for these HDM decoders to exist,
once someone writes it.
Reported-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Tested-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
--
v2: Pick up and fix typo in tag from Fan Ni
Message-Id: <20230227153128.8164-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/cxl/cxl.h | 1 +
include/hw/cxl/cxl_component.h | 1 +
include/hw/pci/pci_bridge.h | 1 +
hw/cxl/cxl-host.c | 31 ++++++++++++--------
hw/pci-bridge/pci_expander_bridge.c | 44 +++++++++++++++++++++++++----
5 files changed, 61 insertions(+), 17 deletions(-)
diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h
index b161be59b7..b2cffbb364 100644
--- a/include/hw/cxl/cxl.h
+++ b/include/hw/cxl/cxl.h
@@ -49,6 +49,7 @@ struct CXLHost {
PCIHostState parent_obj;
CXLComponentState cxl_cstate;
+ bool passthrough;
};
#define TYPE_PXB_CXL_HOST "pxb-cxl-host"
diff --git a/include/hw/cxl/cxl_component.h b/include/hw/cxl/cxl_component.h
index ec4203b83f..42c7e581a7 100644
--- a/include/hw/cxl/cxl_component.h
+++ b/include/hw/cxl/cxl_component.h
@@ -247,6 +247,7 @@ static inline hwaddr cxl_decode_ig(int ig)
}
CXLComponentState *cxl_get_hb_cstate(PCIHostState *hb);
+bool cxl_get_hb_passthrough(PCIHostState *hb);
void cxl_doe_cdat_init(CXLComponentState *cxl_cstate, Error **errp);
void cxl_doe_cdat_release(CXLComponentState *cxl_cstate);
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
index 63a7521567..81a058bb2c 100644
--- a/include/hw/pci/pci_bridge.h
+++ b/include/hw/pci/pci_bridge.h
@@ -92,6 +92,7 @@ struct PXBDev {
uint8_t bus_nr;
uint16_t numa_node;
bool bypass_iommu;
+ bool hdm_for_passthrough;
struct cxl_dev {
CXLHost *cxl_host_bridge; /* Pointer to a CXLHost */
} cxl;
diff --git a/hw/cxl/cxl-host.c b/hw/cxl/cxl-host.c
index 3c1ec8732a..6e923ceeaf 100644
--- a/hw/cxl/cxl-host.c
+++ b/hw/cxl/cxl-host.c
@@ -146,21 +146,28 @@ static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow *fw, hwaddr addr)
return NULL;
}
- hb_cstate = cxl_get_hb_cstate(hb);
- if (!hb_cstate) {
- return NULL;
- }
+ if (cxl_get_hb_passthrough(hb)) {
+ rp = pcie_find_port_first(hb->bus);
+ if (!rp) {
+ return NULL;
+ }
+ } else {
+ hb_cstate = cxl_get_hb_cstate(hb);
+ if (!hb_cstate) {
+ return NULL;
+ }
- cache_mem = hb_cstate->crb.cache_mem_registers;
+ cache_mem = hb_cstate->crb.cache_mem_registers;
- target_found = cxl_hdm_find_target(cache_mem, addr, &target);
- if (!target_found) {
- return NULL;
- }
+ target_found = cxl_hdm_find_target(cache_mem, addr, &target);
+ if (!target_found) {
+ return NULL;
+ }
- rp = pcie_find_port_by_pn(hb->bus, target);
- if (!rp) {
- return NULL;
+ rp = pcie_find_port_by_pn(hb->bus, target);
+ if (!rp) {
+ return NULL;
+ }
}
d = pci_bridge_get_sec_bus(PCI_BRIDGE(rp))->devices[0];
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index e752a21292..ead33f0c05 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -15,6 +15,7 @@
#include "hw/pci/pci.h"
#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_host.h"
+#include "hw/pci/pcie_port.h"
#include "hw/qdev-properties.h"
#include "hw/pci/pci_bridge.h"
#include "hw/pci-bridge/pci_expander_bridge.h"
@@ -79,6 +80,13 @@ CXLComponentState *cxl_get_hb_cstate(PCIHostState *hb)
return &host->cxl_cstate;
}
+bool cxl_get_hb_passthrough(PCIHostState *hb)
+{
+ CXLHost *host = PXB_CXL_HOST(hb);
+
+ return host->passthrough;
+}
+
static int pxb_bus_num(PCIBus *bus)
{
PXBDev *pxb = convert_to_pxb(bus->parent_dev);
@@ -289,15 +297,32 @@ static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin)
return pin - PCI_SLOT(pxb->devfn);
}
-static void pxb_dev_reset(DeviceState *dev)
+static void pxb_cxl_dev_reset(DeviceState *dev)
{
CXLHost *cxl = PXB_CXL_DEV(dev)->cxl.cxl_host_bridge;
CXLComponentState *cxl_cstate = &cxl->cxl_cstate;
+ PCIHostState *hb = PCI_HOST_BRIDGE(cxl);
uint32_t *reg_state = cxl_cstate->crb.cache_mem_registers;
uint32_t *write_msk = cxl_cstate->crb.cache_mem_regs_write_mask;
+ int dsp_count = 0;
cxl_component_register_init_common(reg_state, write_msk, CXL2_ROOT_PORT);
- ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT, 8);
+ /*
+ * The CXL specification allows for host bridges with no HDM decoders
+ * if they only have a single root port.
+ */
+ if (!PXB_DEV(dev)->hdm_for_passthrough) {
+ dsp_count = pcie_count_ds_ports(hb->bus);
+ }
+ /* Initial reset will have 0 dsp so wait until > 0 */
+ if (dsp_count == 1) {
+ cxl->passthrough = true;
+ /* Set Capability ID in header to NONE */
+ ARRAY_FIELD_DP32(reg_state, CXL_HDM_CAPABILITY_HEADER, ID, 0);
+ } else {
+ ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT,
+ 8);
+ }
}
static gint pxb_compare(gconstpointer a, gconstpointer b)
@@ -481,9 +506,18 @@ static void pxb_cxl_dev_realize(PCIDevice *dev, Error **errp)
}
pxb_dev_realize_common(dev, CXL, errp);
- pxb_dev_reset(DEVICE(dev));
+ pxb_cxl_dev_reset(DEVICE(dev));
}
+static Property pxb_cxl_dev_properties[] = {
+ /* Note: 0 is not a legal PXB bus number. */
+ DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0),
+ DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED),
+ DEFINE_PROP_BOOL("bypass_iommu", PXBDev, bypass_iommu, false),
+ DEFINE_PROP_BOOL("hdm_for_passthrough", PXBDev, hdm_for_passthrough, false),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void pxb_cxl_dev_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -497,12 +531,12 @@ static void pxb_cxl_dev_class_init(ObjectClass *klass, void *data)
*/
dc->desc = "CXL Host Bridge";
- device_class_set_props(dc, pxb_dev_properties);
+ device_class_set_props(dc, pxb_cxl_dev_properties);
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
/* Host bridges aren't hotpluggable. FIXME: spec reference */
dc->hotpluggable = false;
- dc->reset = pxb_dev_reset;
+ dc->reset = pxb_cxl_dev_reset;
}
static const TypeInfo pxb_cxl_dev_info = {
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
2023-03-08 1:14 ` [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden Michael S. Tsirkin
@ 2023-04-11 10:26 ` Peter Maydell
2023-04-17 11:22 ` Thomas Huth
2023-04-19 13:57 ` Jonathan Cameron via
0 siblings, 2 replies; 99+ messages in thread
From: Peter Maydell @ 2023-04-11 10:26 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: qemu-devel, Jonathan Cameron, Fan Ni, Ben Widawsky, Marcel Apfelbaum
On Wed, 8 Mar 2023 at 01:14, Michael S. Tsirkin <mst@redhat.com> wrote:
>
> From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
> The CXL r3.0 specification allows for there to be no HDM decoders on CXL
> Host Bridges if they have only a single root port. Instead, all accesses
> directed to the host bridge (as specified in CXL Fixed Memory Windows)
> are assumed to be routed to the single root port.
Hi; in issue https://gitlab.com/qemu-project/qemu/-/issues/1586
it's been pointed out that this commit causes an assertion
failure during 'make check' if you configure with
--enable-qom-cast-debug. You can repro by doing that and running:
qemu-system-i386 -display none -machine q35,cxl=on -device pxb-cxl,bus=pcie.0
Here's a backtrace:
Thread 1 "qemu-system-i38" received signal SIGABRT, Aborted.
__pthread_kill_implementation (no_tid=0, signo=6,
threadid=140737217810816) at ./nptl/pthread_kill.c:44
44 ./nptl/pthread_kill.c: No such file or directory.
(gdb) bt
#0 __pthread_kill_implementation (no_tid=0, signo=6,
threadid=140737217810816) at ./nptl/pthread_kill.c:44
#1 __pthread_kill_internal (signo=6, threadid=140737217810816) at
./nptl/pthread_kill.c:78
#2 __GI___pthread_kill (threadid=140737217810816,
signo=signo@entry=6) at ./nptl/pthread_kill.c:89
#3 0x00007ffff4b1c476 in __GI_raise (sig=sig@entry=6) at
../sysdeps/posix/raise.c:26
#4 0x00007ffff4b027f3 in __GI_abort () at ./stdlib/abort.c:79
#5 0x0000555555cecfab in object_dynamic_cast_assert
(obj=obj@entry=0x555557a70b60, typename=0x555555f80406 "pxb",
file=0x555555f80357 "../../hw/pci-bridge/pci_expander_bridge.c",
line=line@entry=55, func=0x555555f8040a "PXB_DEV") at
../../qom/object.c:890
#6 0x00005555559c7bbd in PXB_DEV (obj=0x555557a70b60) at
../../hw/pci-bridge/pci_expander_bridge.c:54
#7 pxb_cxl_dev_reset (dev=0x555557a70b60) at
../../hw/pci-bridge/pci_expander_bridge.c:314
#8 0x00005555559bd624 in pci_qdev_realize (qdev=0x555557a70b60,
errp=0x7fffffffdd28) at ../../hw/pci/pci.c:2098
#9 0x0000555555ce8ada in device_set_realized (obj=<optimised out>,
value=true, errp=0x7fffffffdea8) at ../../hw/core/qdev.c:510
#10 0x0000555555cf0219 in property_set_bool
(obj=obj@entry=0x555557a70b60, v=v@entry=0x555557a727b0,
name=name@entry=0x55555601db04 "realized", opaque=0x55555687b780,
errp=errp@entry=0x7fffffffdea8) at ../../qom/object.c:2285
#11 0x0000555555cee4e5 in object_property_set
(obj=obj@entry=0x555557a70b60, name=name@entry=0x55555601db04
"realized", v=0x555557a727b0, errp=errp@entry=0x7fffffffdea8) at
../../qom/object.c:1420
#12 0x0000555555cf23cd in object_property_set_qobject
(obj=obj@entry=0x555557a70b60, name=name@entry=0x55555601db04
"realized", value=<optimised out>, errp=errp@entry=0x7fffffffdea8) at
../../qom/qom-qobject.c:28
#13 0x0000555555cee93b in object_property_set_bool
(obj=0x555557a70b60, name=0x55555601db04 "realized", value=<optimised
out>, errp=0x7fffffffdea8)
at ../../qom/object.c:1489
#14 0x0000555555a6ae42 in qdev_device_add_from_qdict
(opts=0x555557a6fb40, from_json=false, errp=0x7fffffffdea8,
errp@entry=0x555556765830 <error_fatal>)
at ../../softmmu/qdev-monitor.c:714
#15 0x0000555555a6b202 in qdev_device_add
(opts=opts@entry=0x5555568776f0, errp=errp@entry=0x555556765830
<error_fatal>) at ../../softmmu/qdev-monitor.c:733
#16 0x0000555555a7367f in device_init_func (opaque=opaque@entry=0x0,
opts=0x3cd16a, opts@entry=0x5555568776f0, errp=0x6,
errp@entry=0x555556765830 <error_fatal>)
at ../../softmmu/vl.c:1140
#17 0x0000555555e78331 in qemu_opts_foreach
(list=<optimised out>, func=0x555555a73670 <device_init_func>,
opaque=opaque@entry=0x0, errp=0x555556765830 <error_fatal>) at
../../util/qemu-option.c:1135
#18 0x0000555555a6dd61 in qemu_create_cli_devices () at ../../softmmu/vl.c:2542
#19 qmp_x_exit_preconfig (errp=<optimised out>) at ../../softmmu/vl.c:2610
#20 0x0000555555a7177b in qemu_init (argc=<optimised out>,
argv=<optimised out>) at ../../softmmu/vl.c:3612
#21 0x000055555587b656 in main (argc=3985770, argv=0x3cd16a) at
../../softmmu/main.c:47
The problem is here:
> -static void pxb_dev_reset(DeviceState *dev)
> +static void pxb_cxl_dev_reset(DeviceState *dev)
This function is called from pxb_cxl_dev_realize(),
which is the realize function for TYPE_PXB_CXL_DEVICE.
That type's parent is TYPE_PCI_DEVICE.
> {
> CXLHost *cxl = PXB_CXL_DEV(dev)->cxl.cxl_host_bridge;
> CXLComponentState *cxl_cstate = &cxl->cxl_cstate;
> + PCIHostState *hb = PCI_HOST_BRIDGE(cxl);
> uint32_t *reg_state = cxl_cstate->crb.cache_mem_registers;
> uint32_t *write_msk = cxl_cstate->crb.cache_mem_regs_write_mask;
> + int dsp_count = 0;
>
> cxl_component_register_init_common(reg_state, write_msk, CXL2_ROOT_PORT);
> - ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT, 8);
> + /*
> + * The CXL specification allows for host bridges with no HDM decoders
> + * if they only have a single root port.
> + */
> + if (!PXB_DEV(dev)->hdm_for_passthrough) {
However, here we try to cast the device pointer to PXB_DEV.
That is not permitted because dev is not of type TYPE_PXB_DEVICE
(either directly or as a parent class). So if you have the QOM
debugging enabled then the attempt to cast causes an assertion
failure.
> + dsp_count = pcie_count_ds_ports(hb->bus);
> + }
> + /* Initial reset will have 0 dsp so wait until > 0 */
> + if (dsp_count == 1) {
> + cxl->passthrough = true;
> + /* Set Capability ID in header to NONE */
> + ARRAY_FIELD_DP32(reg_state, CXL_HDM_CAPABILITY_HEADER, ID, 0);
> + } else {
> + ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT,
> + 8);
> + }
> }
What was the intention here with the type hierarchy?
Should TYPE_PXB_CXL_DEVICE be a subclass of TYPE_PXB_DEVICE,
or should the cxl-related functions not be trying to treat
it as a PXB device ?
thanks
-- PMM
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
2023-04-11 10:26 ` Peter Maydell
@ 2023-04-17 11:22 ` Thomas Huth
2023-04-17 11:29 ` Michael S. Tsirkin
2023-04-19 13:57 ` Jonathan Cameron via
1 sibling, 1 reply; 99+ messages in thread
From: Thomas Huth @ 2023-04-17 11:22 UTC (permalink / raw)
To: Peter Maydell, Michael S. Tsirkin, Jonathan Cameron
Cc: qemu-devel, Fan Ni, Ben Widawsky, Marcel Apfelbaum
On 11/04/2023 12.26, Peter Maydell wrote:
> On Wed, 8 Mar 2023 at 01:14, Michael S. Tsirkin <mst@redhat.com> wrote:
>>
>> From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>>
>> The CXL r3.0 specification allows for there to be no HDM decoders on CXL
>> Host Bridges if they have only a single root port. Instead, all accesses
>> directed to the host bridge (as specified in CXL Fixed Memory Windows)
>> are assumed to be routed to the single root port.
>
> Hi; in issue https://gitlab.com/qemu-project/qemu/-/issues/1586
> it's been pointed out that this commit causes an assertion
> failure during 'make check' if you configure with
> --enable-qom-cast-debug. You can repro by doing that and running:
>
> qemu-system-i386 -display none -machine q35,cxl=on -device pxb-cxl,bus=pcie.0
>
> Here's a backtrace:
>
> Thread 1 "qemu-system-i38" received signal SIGABRT, Aborted.
> __pthread_kill_implementation (no_tid=0, signo=6,
> threadid=140737217810816) at ./nptl/pthread_kill.c:44
> 44 ./nptl/pthread_kill.c: No such file or directory.
> (gdb) bt
> #0 __pthread_kill_implementation (no_tid=0, signo=6,
> threadid=140737217810816) at ./nptl/pthread_kill.c:44
> #1 __pthread_kill_internal (signo=6, threadid=140737217810816) at
> ./nptl/pthread_kill.c:78
> #2 __GI___pthread_kill (threadid=140737217810816,
> signo=signo@entry=6) at ./nptl/pthread_kill.c:89
> #3 0x00007ffff4b1c476 in __GI_raise (sig=sig@entry=6) at
> ../sysdeps/posix/raise.c:26
> #4 0x00007ffff4b027f3 in __GI_abort () at ./stdlib/abort.c:79
> #5 0x0000555555cecfab in object_dynamic_cast_assert
> (obj=obj@entry=0x555557a70b60, typename=0x555555f80406 "pxb",
> file=0x555555f80357 "../../hw/pci-bridge/pci_expander_bridge.c",
> line=line@entry=55, func=0x555555f8040a "PXB_DEV") at
> ../../qom/object.c:890
> #6 0x00005555559c7bbd in PXB_DEV (obj=0x555557a70b60) at
> ../../hw/pci-bridge/pci_expander_bridge.c:54
> #7 pxb_cxl_dev_reset (dev=0x555557a70b60) at
> ../../hw/pci-bridge/pci_expander_bridge.c:314
> #8 0x00005555559bd624 in pci_qdev_realize (qdev=0x555557a70b60,
> errp=0x7fffffffdd28) at ../../hw/pci/pci.c:2098
> #9 0x0000555555ce8ada in device_set_realized (obj=<optimised out>,
> value=true, errp=0x7fffffffdea8) at ../../hw/core/qdev.c:510
> #10 0x0000555555cf0219 in property_set_bool
> (obj=obj@entry=0x555557a70b60, v=v@entry=0x555557a727b0,
> name=name@entry=0x55555601db04 "realized", opaque=0x55555687b780,
> errp=errp@entry=0x7fffffffdea8) at ../../qom/object.c:2285
> #11 0x0000555555cee4e5 in object_property_set
> (obj=obj@entry=0x555557a70b60, name=name@entry=0x55555601db04
> "realized", v=0x555557a727b0, errp=errp@entry=0x7fffffffdea8) at
> ../../qom/object.c:1420
> #12 0x0000555555cf23cd in object_property_set_qobject
> (obj=obj@entry=0x555557a70b60, name=name@entry=0x55555601db04
> "realized", value=<optimised out>, errp=errp@entry=0x7fffffffdea8) at
> ../../qom/qom-qobject.c:28
> #13 0x0000555555cee93b in object_property_set_bool
> (obj=0x555557a70b60, name=0x55555601db04 "realized", value=<optimised
> out>, errp=0x7fffffffdea8)
> at ../../qom/object.c:1489
> #14 0x0000555555a6ae42 in qdev_device_add_from_qdict
> (opts=0x555557a6fb40, from_json=false, errp=0x7fffffffdea8,
> errp@entry=0x555556765830 <error_fatal>)
> at ../../softmmu/qdev-monitor.c:714
> #15 0x0000555555a6b202 in qdev_device_add
> (opts=opts@entry=0x5555568776f0, errp=errp@entry=0x555556765830
> <error_fatal>) at ../../softmmu/qdev-monitor.c:733
> #16 0x0000555555a7367f in device_init_func (opaque=opaque@entry=0x0,
> opts=0x3cd16a, opts@entry=0x5555568776f0, errp=0x6,
> errp@entry=0x555556765830 <error_fatal>)
> at ../../softmmu/vl.c:1140
> #17 0x0000555555e78331 in qemu_opts_foreach
> (list=<optimised out>, func=0x555555a73670 <device_init_func>,
> opaque=opaque@entry=0x0, errp=0x555556765830 <error_fatal>) at
> ../../util/qemu-option.c:1135
> #18 0x0000555555a6dd61 in qemu_create_cli_devices () at ../../softmmu/vl.c:2542
> #19 qmp_x_exit_preconfig (errp=<optimised out>) at ../../softmmu/vl.c:2610
> #20 0x0000555555a7177b in qemu_init (argc=<optimised out>,
> argv=<optimised out>) at ../../softmmu/vl.c:3612
> #21 0x000055555587b656 in main (argc=3985770, argv=0x3cd16a) at
> ../../softmmu/main.c:47
>
> The problem is here:
>
>> -static void pxb_dev_reset(DeviceState *dev)
>> +static void pxb_cxl_dev_reset(DeviceState *dev)
>
> This function is called from pxb_cxl_dev_realize(),
> which is the realize function for TYPE_PXB_CXL_DEVICE.
> That type's parent is TYPE_PCI_DEVICE.
>
>> {
>> CXLHost *cxl = PXB_CXL_DEV(dev)->cxl.cxl_host_bridge;
>> CXLComponentState *cxl_cstate = &cxl->cxl_cstate;
>> + PCIHostState *hb = PCI_HOST_BRIDGE(cxl);
>> uint32_t *reg_state = cxl_cstate->crb.cache_mem_registers;
>> uint32_t *write_msk = cxl_cstate->crb.cache_mem_regs_write_mask;
>> + int dsp_count = 0;
>>
>> cxl_component_register_init_common(reg_state, write_msk, CXL2_ROOT_PORT);
>> - ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT, 8);
>> + /*
>> + * The CXL specification allows for host bridges with no HDM decoders
>> + * if they only have a single root port.
>> + */
>> + if (!PXB_DEV(dev)->hdm_for_passthrough) {
>
> However, here we try to cast the device pointer to PXB_DEV.
> That is not permitted because dev is not of type TYPE_PXB_DEVICE
> (either directly or as a parent class). So if you have the QOM
> debugging enabled then the attempt to cast causes an assertion
> failure.
>
>> + dsp_count = pcie_count_ds_ports(hb->bus);
>> + }
>> + /* Initial reset will have 0 dsp so wait until > 0 */
>> + if (dsp_count == 1) {
>> + cxl->passthrough = true;
>> + /* Set Capability ID in header to NONE */
>> + ARRAY_FIELD_DP32(reg_state, CXL_HDM_CAPABILITY_HEADER, ID, 0);
>> + } else {
>> + ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT,
>> + 8);
>> + }
>> }
>
> What was the intention here with the type hierarchy?
> Should TYPE_PXB_CXL_DEVICE be a subclass of TYPE_PXB_DEVICE,
> or should the cxl-related functions not be trying to treat
> it as a PXB device ?
Maybe we should simply revert the commit for the time being (once the 8.1
cycle begins), 'til this has properly been solved, so we can enable
qom-debug by default again?
Thomas
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
2023-04-17 11:22 ` Thomas Huth
@ 2023-04-17 11:29 ` Michael S. Tsirkin
2023-04-17 13:04 ` Thomas Huth
0 siblings, 1 reply; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-04-17 11:29 UTC (permalink / raw)
To: Thomas Huth
Cc: Peter Maydell, Jonathan Cameron, qemu-devel, Fan Ni,
Ben Widawsky, Marcel Apfelbaum
On Mon, Apr 17, 2023 at 01:22:51PM +0200, Thomas Huth wrote:
> On 11/04/2023 12.26, Peter Maydell wrote:
> > On Wed, 8 Mar 2023 at 01:14, Michael S. Tsirkin <mst@redhat.com> wrote:
> > >
> > > From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > >
> > > The CXL r3.0 specification allows for there to be no HDM decoders on CXL
> > > Host Bridges if they have only a single root port. Instead, all accesses
> > > directed to the host bridge (as specified in CXL Fixed Memory Windows)
> > > are assumed to be routed to the single root port.
> >
> > Hi; in issue https://gitlab.com/qemu-project/qemu/-/issues/1586
> > it's been pointed out that this commit causes an assertion
> > failure during 'make check' if you configure with
> > --enable-qom-cast-debug. You can repro by doing that and running:
> >
> > qemu-system-i386 -display none -machine q35,cxl=on -device pxb-cxl,bus=pcie.0
> >
> > Here's a backtrace:
> >
> > Thread 1 "qemu-system-i38" received signal SIGABRT, Aborted.
> > __pthread_kill_implementation (no_tid=0, signo=6,
> > threadid=140737217810816) at ./nptl/pthread_kill.c:44
> > 44 ./nptl/pthread_kill.c: No such file or directory.
> > (gdb) bt
> > #0 __pthread_kill_implementation (no_tid=0, signo=6,
> > threadid=140737217810816) at ./nptl/pthread_kill.c:44
> > #1 __pthread_kill_internal (signo=6, threadid=140737217810816) at
> > ./nptl/pthread_kill.c:78
> > #2 __GI___pthread_kill (threadid=140737217810816,
> > signo=signo@entry=6) at ./nptl/pthread_kill.c:89
> > #3 0x00007ffff4b1c476 in __GI_raise (sig=sig@entry=6) at
> > ../sysdeps/posix/raise.c:26
> > #4 0x00007ffff4b027f3 in __GI_abort () at ./stdlib/abort.c:79
> > #5 0x0000555555cecfab in object_dynamic_cast_assert
> > (obj=obj@entry=0x555557a70b60, typename=0x555555f80406 "pxb",
> > file=0x555555f80357 "../../hw/pci-bridge/pci_expander_bridge.c",
> > line=line@entry=55, func=0x555555f8040a "PXB_DEV") at
> > ../../qom/object.c:890
> > #6 0x00005555559c7bbd in PXB_DEV (obj=0x555557a70b60) at
> > ../../hw/pci-bridge/pci_expander_bridge.c:54
> > #7 pxb_cxl_dev_reset (dev=0x555557a70b60) at
> > ../../hw/pci-bridge/pci_expander_bridge.c:314
> > #8 0x00005555559bd624 in pci_qdev_realize (qdev=0x555557a70b60,
> > errp=0x7fffffffdd28) at ../../hw/pci/pci.c:2098
> > #9 0x0000555555ce8ada in device_set_realized (obj=<optimised out>,
> > value=true, errp=0x7fffffffdea8) at ../../hw/core/qdev.c:510
> > #10 0x0000555555cf0219 in property_set_bool
> > (obj=obj@entry=0x555557a70b60, v=v@entry=0x555557a727b0,
> > name=name@entry=0x55555601db04 "realized", opaque=0x55555687b780,
> > errp=errp@entry=0x7fffffffdea8) at ../../qom/object.c:2285
> > #11 0x0000555555cee4e5 in object_property_set
> > (obj=obj@entry=0x555557a70b60, name=name@entry=0x55555601db04
> > "realized", v=0x555557a727b0, errp=errp@entry=0x7fffffffdea8) at
> > ../../qom/object.c:1420
> > #12 0x0000555555cf23cd in object_property_set_qobject
> > (obj=obj@entry=0x555557a70b60, name=name@entry=0x55555601db04
> > "realized", value=<optimised out>, errp=errp@entry=0x7fffffffdea8) at
> > ../../qom/qom-qobject.c:28
> > #13 0x0000555555cee93b in object_property_set_bool
> > (obj=0x555557a70b60, name=0x55555601db04 "realized", value=<optimised
> > out>, errp=0x7fffffffdea8)
> > at ../../qom/object.c:1489
> > #14 0x0000555555a6ae42 in qdev_device_add_from_qdict
> > (opts=0x555557a6fb40, from_json=false, errp=0x7fffffffdea8,
> > errp@entry=0x555556765830 <error_fatal>)
> > at ../../softmmu/qdev-monitor.c:714
> > #15 0x0000555555a6b202 in qdev_device_add
> > (opts=opts@entry=0x5555568776f0, errp=errp@entry=0x555556765830
> > <error_fatal>) at ../../softmmu/qdev-monitor.c:733
> > #16 0x0000555555a7367f in device_init_func (opaque=opaque@entry=0x0,
> > opts=0x3cd16a, opts@entry=0x5555568776f0, errp=0x6,
> > errp@entry=0x555556765830 <error_fatal>)
> > at ../../softmmu/vl.c:1140
> > #17 0x0000555555e78331 in qemu_opts_foreach
> > (list=<optimised out>, func=0x555555a73670 <device_init_func>,
> > opaque=opaque@entry=0x0, errp=0x555556765830 <error_fatal>) at
> > ../../util/qemu-option.c:1135
> > #18 0x0000555555a6dd61 in qemu_create_cli_devices () at ../../softmmu/vl.c:2542
> > #19 qmp_x_exit_preconfig (errp=<optimised out>) at ../../softmmu/vl.c:2610
> > #20 0x0000555555a7177b in qemu_init (argc=<optimised out>,
> > argv=<optimised out>) at ../../softmmu/vl.c:3612
> > #21 0x000055555587b656 in main (argc=3985770, argv=0x3cd16a) at
> > ../../softmmu/main.c:47
> >
> > The problem is here:
> >
> > > -static void pxb_dev_reset(DeviceState *dev)
> > > +static void pxb_cxl_dev_reset(DeviceState *dev)
> >
> > This function is called from pxb_cxl_dev_realize(),
> > which is the realize function for TYPE_PXB_CXL_DEVICE.
> > That type's parent is TYPE_PCI_DEVICE.
> >
> > > {
> > > CXLHost *cxl = PXB_CXL_DEV(dev)->cxl.cxl_host_bridge;
> > > CXLComponentState *cxl_cstate = &cxl->cxl_cstate;
> > > + PCIHostState *hb = PCI_HOST_BRIDGE(cxl);
> > > uint32_t *reg_state = cxl_cstate->crb.cache_mem_registers;
> > > uint32_t *write_msk = cxl_cstate->crb.cache_mem_regs_write_mask;
> > > + int dsp_count = 0;
> > >
> > > cxl_component_register_init_common(reg_state, write_msk, CXL2_ROOT_PORT);
> > > - ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT, 8);
> > > + /*
> > > + * The CXL specification allows for host bridges with no HDM decoders
> > > + * if they only have a single root port.
> > > + */
> > > + if (!PXB_DEV(dev)->hdm_for_passthrough) {
> >
> > However, here we try to cast the device pointer to PXB_DEV.
> > That is not permitted because dev is not of type TYPE_PXB_DEVICE
> > (either directly or as a parent class). So if you have the QOM
> > debugging enabled then the attempt to cast causes an assertion
> > failure.
> >
> > > + dsp_count = pcie_count_ds_ports(hb->bus);
> > > + }
> > > + /* Initial reset will have 0 dsp so wait until > 0 */
> > > + if (dsp_count == 1) {
> > > + cxl->passthrough = true;
> > > + /* Set Capability ID in header to NONE */
> > > + ARRAY_FIELD_DP32(reg_state, CXL_HDM_CAPABILITY_HEADER, ID, 0);
> > > + } else {
> > > + ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT,
> > > + 8);
> > > + }
> > > }
> >
> > What was the intention here with the type hierarchy?
> > Should TYPE_PXB_CXL_DEVICE be a subclass of TYPE_PXB_DEVICE,
> > or should the cxl-related functions not be trying to treat
> > it as a PXB device ?
>
> Maybe we should simply revert the commit for the time being (once the 8.1
> cycle begins), 'til this has properly been solved, so we can enable
> qom-debug by default again?
>
> Thomas
Can you post a revert?
--
MST
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
2023-04-17 11:29 ` Michael S. Tsirkin
@ 2023-04-17 13:04 ` Thomas Huth
2023-04-19 13:43 ` Jonathan Cameron via
0 siblings, 1 reply; 99+ messages in thread
From: Thomas Huth @ 2023-04-17 13:04 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Peter Maydell, Jonathan Cameron, qemu-devel, Fan Ni,
Ben Widawsky, Marcel Apfelbaum
On 17/04/2023 13.29, Michael S. Tsirkin wrote:
> On Mon, Apr 17, 2023 at 01:22:51PM +0200, Thomas Huth wrote:
>> On 11/04/2023 12.26, Peter Maydell wrote:
>>> On Wed, 8 Mar 2023 at 01:14, Michael S. Tsirkin <mst@redhat.com> wrote:
>>>>
>>>> From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>>>>
>>>> The CXL r3.0 specification allows for there to be no HDM decoders on CXL
>>>> Host Bridges if they have only a single root port. Instead, all accesses
>>>> directed to the host bridge (as specified in CXL Fixed Memory Windows)
>>>> are assumed to be routed to the single root port.
>>>
>>> Hi; in issue https://gitlab.com/qemu-project/qemu/-/issues/1586
>>> it's been pointed out that this commit causes an assertion
>>> failure during 'make check' if you configure with
>>> --enable-qom-cast-debug. You can repro by doing that and running:
>>>
>>> qemu-system-i386 -display none -machine q35,cxl=on -device pxb-cxl,bus=pcie.0
...
>>> The problem is here:
>>>
>>>> -static void pxb_dev_reset(DeviceState *dev)
>>>> +static void pxb_cxl_dev_reset(DeviceState *dev)
>>>
>>> This function is called from pxb_cxl_dev_realize(),
>>> which is the realize function for TYPE_PXB_CXL_DEVICE.
>>> That type's parent is TYPE_PCI_DEVICE.
>>>
>>>> {
>>>> CXLHost *cxl = PXB_CXL_DEV(dev)->cxl.cxl_host_bridge;
>>>> CXLComponentState *cxl_cstate = &cxl->cxl_cstate;
>>>> + PCIHostState *hb = PCI_HOST_BRIDGE(cxl);
>>>> uint32_t *reg_state = cxl_cstate->crb.cache_mem_registers;
>>>> uint32_t *write_msk = cxl_cstate->crb.cache_mem_regs_write_mask;
>>>> + int dsp_count = 0;
>>>>
>>>> cxl_component_register_init_common(reg_state, write_msk, CXL2_ROOT_PORT);
>>>> - ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT, 8);
>>>> + /*
>>>> + * The CXL specification allows for host bridges with no HDM decoders
>>>> + * if they only have a single root port.
>>>> + */
>>>> + if (!PXB_DEV(dev)->hdm_for_passthrough) {
>>>
>>> However, here we try to cast the device pointer to PXB_DEV.
>>> That is not permitted because dev is not of type TYPE_PXB_DEVICE
>>> (either directly or as a parent class). So if you have the QOM
>>> debugging enabled then the attempt to cast causes an assertion
>>> failure.
>>>
>>>> + dsp_count = pcie_count_ds_ports(hb->bus);
>>>> + }
>>>> + /* Initial reset will have 0 dsp so wait until > 0 */
>>>> + if (dsp_count == 1) {
>>>> + cxl->passthrough = true;
>>>> + /* Set Capability ID in header to NONE */
>>>> + ARRAY_FIELD_DP32(reg_state, CXL_HDM_CAPABILITY_HEADER, ID, 0);
>>>> + } else {
>>>> + ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT,
>>>> + 8);
>>>> + }
>>>> }
>>>
>>> What was the intention here with the type hierarchy?
>>> Should TYPE_PXB_CXL_DEVICE be a subclass of TYPE_PXB_DEVICE,
>>> or should the cxl-related functions not be trying to treat
>>> it as a PXB device ?
>>
>> Maybe we should simply revert the commit for the time being (once the 8.1
>> cycle begins), 'til this has properly been solved, so we can enable
>> qom-debug by default again?
>
> Can you post a revert?
Sure, done here now:
https://lore.kernel.org/qemu-devel/20230417130037.236747-2-thuth@redhat.com/
Thomas
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
2023-04-17 13:04 ` Thomas Huth
@ 2023-04-19 13:43 ` Jonathan Cameron via
0 siblings, 0 replies; 99+ messages in thread
From: Jonathan Cameron via @ 2023-04-19 13:43 UTC (permalink / raw)
To: Thomas Huth
Cc: Michael S. Tsirkin, Peter Maydell, qemu-devel, Fan Ni,
Ben Widawsky, Marcel Apfelbaum
On Mon, 17 Apr 2023 15:04:41 +0200
Thomas Huth <thuth@redhat.com> wrote:
> On 17/04/2023 13.29, Michael S. Tsirkin wrote:
> > On Mon, Apr 17, 2023 at 01:22:51PM +0200, Thomas Huth wrote:
> >> On 11/04/2023 12.26, Peter Maydell wrote:
> >>> On Wed, 8 Mar 2023 at 01:14, Michael S. Tsirkin <mst@redhat.com> wrote:
> >>>>
> >>>> From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> >>>>
> >>>> The CXL r3.0 specification allows for there to be no HDM decoders on CXL
> >>>> Host Bridges if they have only a single root port. Instead, all accesses
> >>>> directed to the host bridge (as specified in CXL Fixed Memory Windows)
> >>>> are assumed to be routed to the single root port.
> >>>
> >>> Hi; in issue https://gitlab.com/qemu-project/qemu/-/issues/1586
> >>> it's been pointed out that this commit causes an assertion
> >>> failure during 'make check' if you configure with
> >>> --enable-qom-cast-debug. You can repro by doing that and running:
> >>>
> >>> qemu-system-i386 -display none -machine q35,cxl=on -device pxb-cxl,bus=pcie.0
> ...
> >>> The problem is here:
> >>>
> >>>> -static void pxb_dev_reset(DeviceState *dev)
> >>>> +static void pxb_cxl_dev_reset(DeviceState *dev)
> >>>
> >>> This function is called from pxb_cxl_dev_realize(),
> >>> which is the realize function for TYPE_PXB_CXL_DEVICE.
> >>> That type's parent is TYPE_PCI_DEVICE.
> >>>
> >>>> {
> >>>> CXLHost *cxl = PXB_CXL_DEV(dev)->cxl.cxl_host_bridge;
> >>>> CXLComponentState *cxl_cstate = &cxl->cxl_cstate;
> >>>> + PCIHostState *hb = PCI_HOST_BRIDGE(cxl);
> >>>> uint32_t *reg_state = cxl_cstate->crb.cache_mem_registers;
> >>>> uint32_t *write_msk = cxl_cstate->crb.cache_mem_regs_write_mask;
> >>>> + int dsp_count = 0;
> >>>>
> >>>> cxl_component_register_init_common(reg_state, write_msk, CXL2_ROOT_PORT);
> >>>> - ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT, 8);
> >>>> + /*
> >>>> + * The CXL specification allows for host bridges with no HDM decoders
> >>>> + * if they only have a single root port.
> >>>> + */
> >>>> + if (!PXB_DEV(dev)->hdm_for_passthrough) {
> >>>
> >>> However, here we try to cast the device pointer to PXB_DEV.
> >>> That is not permitted because dev is not of type TYPE_PXB_DEVICE
> >>> (either directly or as a parent class). So if you have the QOM
> >>> debugging enabled then the attempt to cast causes an assertion
> >>> failure.
> >>>
> >>>> + dsp_count = pcie_count_ds_ports(hb->bus);
> >>>> + }
> >>>> + /* Initial reset will have 0 dsp so wait until > 0 */
> >>>> + if (dsp_count == 1) {
> >>>> + cxl->passthrough = true;
> >>>> + /* Set Capability ID in header to NONE */
> >>>> + ARRAY_FIELD_DP32(reg_state, CXL_HDM_CAPABILITY_HEADER, ID, 0);
> >>>> + } else {
> >>>> + ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT,
> >>>> + 8);
> >>>> + }
> >>>> }
> >>>
> >>> What was the intention here with the type hierarchy?
> >>> Should TYPE_PXB_CXL_DEVICE be a subclass of TYPE_PXB_DEVICE,
> >>> or should the cxl-related functions not be trying to treat
> >>> it as a PXB device ?
> >>
> >> Maybe we should simply revert the commit for the time being (once the 8.1
> >> cycle begins), 'til this has properly been solved, so we can enable
> >> qom-debug by default again?
> >
> > Can you post a revert?
>
> Sure, done here now:
> https://lore.kernel.org/qemu-devel/20230417130037.236747-2-thuth@redhat.com/
>
Sorry - I missed this until today. Indeed revert makes sense. I'll chase this down
in the new cycle.
Jonathan
> Thomas
>
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
2023-04-11 10:26 ` Peter Maydell
2023-04-17 11:22 ` Thomas Huth
@ 2023-04-19 13:57 ` Jonathan Cameron via
2023-04-19 14:49 ` Jonathan Cameron via
1 sibling, 1 reply; 99+ messages in thread
From: Jonathan Cameron via @ 2023-04-19 13:57 UTC (permalink / raw)
To: Peter Maydell; +Cc: Michael S. Tsirkin, qemu-devel, Fan Ni, Marcel Apfelbaum
On Tue, 11 Apr 2023 11:26:16 +0100
Peter Maydell <peter.maydell@linaro.org> wrote:
> On Wed, 8 Mar 2023 at 01:14, Michael S. Tsirkin <mst@redhat.com> wrote:
> >
> > From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> >
> > The CXL r3.0 specification allows for there to be no HDM decoders on CXL
> > Host Bridges if they have only a single root port. Instead, all accesses
> > directed to the host bridge (as specified in CXL Fixed Memory Windows)
> > are assumed to be routed to the single root port.
>
> Hi; in issue https://gitlab.com/qemu-project/qemu/-/issues/1586
> it's been pointed out that this commit causes an assertion
> failure during 'make check' if you configure with
> --enable-qom-cast-debug. You can repro by doing that and running:
>
> qemu-system-i386 -display none -machine q35,cxl=on -device pxb-cxl,bus=pcie.0
>
> Here's a backtrace:
>
> Thread 1 "qemu-system-i38" received signal SIGABRT, Aborted.
> __pthread_kill_implementation (no_tid=0, signo=6,
> threadid=140737217810816) at ./nptl/pthread_kill.c:44
> 44 ./nptl/pthread_kill.c: No such file or directory.
> (gdb) bt
> #0 __pthread_kill_implementation (no_tid=0, signo=6,
> threadid=140737217810816) at ./nptl/pthread_kill.c:44
> #1 __pthread_kill_internal (signo=6, threadid=140737217810816) at
> ./nptl/pthread_kill.c:78
> #2 __GI___pthread_kill (threadid=140737217810816,
> signo=signo@entry=6) at ./nptl/pthread_kill.c:89
> #3 0x00007ffff4b1c476 in __GI_raise (sig=sig@entry=6) at
> ../sysdeps/posix/raise.c:26
> #4 0x00007ffff4b027f3 in __GI_abort () at ./stdlib/abort.c:79
> #5 0x0000555555cecfab in object_dynamic_cast_assert
> (obj=obj@entry=0x555557a70b60, typename=0x555555f80406 "pxb",
> file=0x555555f80357 "../../hw/pci-bridge/pci_expander_bridge.c",
> line=line@entry=55, func=0x555555f8040a "PXB_DEV") at
> ../../qom/object.c:890
> #6 0x00005555559c7bbd in PXB_DEV (obj=0x555557a70b60) at
> ../../hw/pci-bridge/pci_expander_bridge.c:54
> #7 pxb_cxl_dev_reset (dev=0x555557a70b60) at
> ../../hw/pci-bridge/pci_expander_bridge.c:314
> #8 0x00005555559bd624 in pci_qdev_realize (qdev=0x555557a70b60,
> errp=0x7fffffffdd28) at ../../hw/pci/pci.c:2098
> #9 0x0000555555ce8ada in device_set_realized (obj=<optimised out>,
> value=true, errp=0x7fffffffdea8) at ../../hw/core/qdev.c:510
> #10 0x0000555555cf0219 in property_set_bool
> (obj=obj@entry=0x555557a70b60, v=v@entry=0x555557a727b0,
> name=name@entry=0x55555601db04 "realized", opaque=0x55555687b780,
> errp=errp@entry=0x7fffffffdea8) at ../../qom/object.c:2285
> #11 0x0000555555cee4e5 in object_property_set
> (obj=obj@entry=0x555557a70b60, name=name@entry=0x55555601db04
> "realized", v=0x555557a727b0, errp=errp@entry=0x7fffffffdea8) at
> ../../qom/object.c:1420
> #12 0x0000555555cf23cd in object_property_set_qobject
> (obj=obj@entry=0x555557a70b60, name=name@entry=0x55555601db04
> "realized", value=<optimised out>, errp=errp@entry=0x7fffffffdea8) at
> ../../qom/qom-qobject.c:28
> #13 0x0000555555cee93b in object_property_set_bool
> (obj=0x555557a70b60, name=0x55555601db04 "realized", value=<optimised
> out>, errp=0x7fffffffdea8)
> at ../../qom/object.c:1489
> #14 0x0000555555a6ae42 in qdev_device_add_from_qdict
> (opts=0x555557a6fb40, from_json=false, errp=0x7fffffffdea8,
> errp@entry=0x555556765830 <error_fatal>)
> at ../../softmmu/qdev-monitor.c:714
> #15 0x0000555555a6b202 in qdev_device_add
> (opts=opts@entry=0x5555568776f0, errp=errp@entry=0x555556765830
> <error_fatal>) at ../../softmmu/qdev-monitor.c:733
> #16 0x0000555555a7367f in device_init_func (opaque=opaque@entry=0x0,
> opts=0x3cd16a, opts@entry=0x5555568776f0, errp=0x6,
> errp@entry=0x555556765830 <error_fatal>)
> at ../../softmmu/vl.c:1140
> #17 0x0000555555e78331 in qemu_opts_foreach
> (list=<optimised out>, func=0x555555a73670 <device_init_func>,
> opaque=opaque@entry=0x0, errp=0x555556765830 <error_fatal>) at
> ../../util/qemu-option.c:1135
> #18 0x0000555555a6dd61 in qemu_create_cli_devices () at ../../softmmu/vl.c:2542
> #19 qmp_x_exit_preconfig (errp=<optimised out>) at ../../softmmu/vl.c:2610
> #20 0x0000555555a7177b in qemu_init (argc=<optimised out>,
> argv=<optimised out>) at ../../softmmu/vl.c:3612
> #21 0x000055555587b656 in main (argc=3985770, argv=0x3cd16a) at
> ../../softmmu/main.c:47
>
> The problem is here:
>
> > -static void pxb_dev_reset(DeviceState *dev)
> > +static void pxb_cxl_dev_reset(DeviceState *dev)
>
> This function is called from pxb_cxl_dev_realize(),
> which is the realize function for TYPE_PXB_CXL_DEVICE.
> That type's parent is TYPE_PCI_DEVICE.
>
> > {
> > CXLHost *cxl = PXB_CXL_DEV(dev)->cxl.cxl_host_bridge;
> > CXLComponentState *cxl_cstate = &cxl->cxl_cstate;
> > + PCIHostState *hb = PCI_HOST_BRIDGE(cxl);
> > uint32_t *reg_state = cxl_cstate->crb.cache_mem_registers;
> > uint32_t *write_msk = cxl_cstate->crb.cache_mem_regs_write_mask;
> > + int dsp_count = 0;
> >
> > cxl_component_register_init_common(reg_state, write_msk, CXL2_ROOT_PORT);
> > - ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT, 8);
> > + /*
> > + * The CXL specification allows for host bridges with no HDM decoders
> > + * if they only have a single root port.
> > + */
> > + if (!PXB_DEV(dev)->hdm_for_passthrough) {
>
> However, here we try to cast the device pointer to PXB_DEV.
> That is not permitted because dev is not of type TYPE_PXB_DEVICE
> (either directly or as a parent class). So if you have the QOM
> debugging enabled then the attempt to cast causes an assertion
> failure.
>
> > + dsp_count = pcie_count_ds_ports(hb->bus);
> > + }
> > + /* Initial reset will have 0 dsp so wait until > 0 */
> > + if (dsp_count == 1) {
> > + cxl->passthrough = true;
> > + /* Set Capability ID in header to NONE */
> > + ARRAY_FIELD_DP32(reg_state, CXL_HDM_CAPABILITY_HEADER, ID, 0);
> > + } else {
> > + ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT,
> > + 8);
> > + }
> > }
>
> What was the intention here with the type hierarchy?
> Should TYPE_PXB_CXL_DEVICE be a subclass of TYPE_PXB_DEVICE,
> or should the cxl-related functions not be trying to treat
> it as a PXB device ?
I can't immediately recall why, but PXB_DEV and PXB_CXL_DEV use the
same struct PXBDev so here switching to PXB_CXL_DEV(dev)->hdm_for_passthrough
looks to be the minimum fix.
I'll dig into why / if there is a good reason for why PXB_CXL_DEV doesn't
simply inherit from PXB_DEV then use runtime type checking in the few places it
will matter.
Jonathan
>
> thanks
> -- PMM
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
2023-04-19 13:57 ` Jonathan Cameron via
@ 2023-04-19 14:49 ` Jonathan Cameron via
2023-04-19 16:25 ` Peter Maydell
0 siblings, 1 reply; 99+ messages in thread
From: Jonathan Cameron via @ 2023-04-19 14:49 UTC (permalink / raw)
To: Jonathan Cameron via
Cc: Jonathan Cameron, Peter Maydell, Michael S. Tsirkin, Fan Ni,
Marcel Apfelbaum, linuxarm
On Wed, 19 Apr 2023 14:57:54 +0100
Jonathan Cameron via <qemu-devel@nongnu.org> wrote:
> On Tue, 11 Apr 2023 11:26:16 +0100
> Peter Maydell <peter.maydell@linaro.org> wrote:
>
> > On Wed, 8 Mar 2023 at 01:14, Michael S. Tsirkin <mst@redhat.com> wrote:
> > >
> > > From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > >
> > > The CXL r3.0 specification allows for there to be no HDM decoders on CXL
> > > Host Bridges if they have only a single root port. Instead, all accesses
> > > directed to the host bridge (as specified in CXL Fixed Memory Windows)
> > > are assumed to be routed to the single root port.
> >
> > Hi; in issue https://gitlab.com/qemu-project/qemu/-/issues/1586
> > it's been pointed out that this commit causes an assertion
> > failure during 'make check' if you configure with
> > --enable-qom-cast-debug. You can repro by doing that and running:
> >
> > qemu-system-i386 -display none -machine q35,cxl=on -device pxb-cxl,bus=pcie.0
> >
> > Here's a backtrace:
> >
> > Thread 1 "qemu-system-i38" received signal SIGABRT, Aborted.
> > __pthread_kill_implementation (no_tid=0, signo=6,
> > threadid=140737217810816) at ./nptl/pthread_kill.c:44
> > 44 ./nptl/pthread_kill.c: No such file or directory.
> > (gdb) bt
> > #0 __pthread_kill_implementation (no_tid=0, signo=6,
> > threadid=140737217810816) at ./nptl/pthread_kill.c:44
> > #1 __pthread_kill_internal (signo=6, threadid=140737217810816) at
> > ./nptl/pthread_kill.c:78
> > #2 __GI___pthread_kill (threadid=140737217810816,
> > signo=signo@entry=6) at ./nptl/pthread_kill.c:89
> > #3 0x00007ffff4b1c476 in __GI_raise (sig=sig@entry=6) at
> > ../sysdeps/posix/raise.c:26
> > #4 0x00007ffff4b027f3 in __GI_abort () at ./stdlib/abort.c:79
> > #5 0x0000555555cecfab in object_dynamic_cast_assert
> > (obj=obj@entry=0x555557a70b60, typename=0x555555f80406 "pxb",
> > file=0x555555f80357 "../../hw/pci-bridge/pci_expander_bridge.c",
> > line=line@entry=55, func=0x555555f8040a "PXB_DEV") at
> > ../../qom/object.c:890
> > #6 0x00005555559c7bbd in PXB_DEV (obj=0x555557a70b60) at
> > ../../hw/pci-bridge/pci_expander_bridge.c:54
> > #7 pxb_cxl_dev_reset (dev=0x555557a70b60) at
> > ../../hw/pci-bridge/pci_expander_bridge.c:314
> > #8 0x00005555559bd624 in pci_qdev_realize (qdev=0x555557a70b60,
> > errp=0x7fffffffdd28) at ../../hw/pci/pci.c:2098
> > #9 0x0000555555ce8ada in device_set_realized (obj=<optimised out>,
> > value=true, errp=0x7fffffffdea8) at ../../hw/core/qdev.c:510
> > #10 0x0000555555cf0219 in property_set_bool
> > (obj=obj@entry=0x555557a70b60, v=v@entry=0x555557a727b0,
> > name=name@entry=0x55555601db04 "realized", opaque=0x55555687b780,
> > errp=errp@entry=0x7fffffffdea8) at ../../qom/object.c:2285
> > #11 0x0000555555cee4e5 in object_property_set
> > (obj=obj@entry=0x555557a70b60, name=name@entry=0x55555601db04
> > "realized", v=0x555557a727b0, errp=errp@entry=0x7fffffffdea8) at
> > ../../qom/object.c:1420
> > #12 0x0000555555cf23cd in object_property_set_qobject
> > (obj=obj@entry=0x555557a70b60, name=name@entry=0x55555601db04
> > "realized", value=<optimised out>, errp=errp@entry=0x7fffffffdea8) at
> > ../../qom/qom-qobject.c:28
> > #13 0x0000555555cee93b in object_property_set_bool
> > (obj=0x555557a70b60, name=0x55555601db04 "realized", value=<optimised
> > out>, errp=0x7fffffffdea8)
> > at ../../qom/object.c:1489
> > #14 0x0000555555a6ae42 in qdev_device_add_from_qdict
> > (opts=0x555557a6fb40, from_json=false, errp=0x7fffffffdea8,
> > errp@entry=0x555556765830 <error_fatal>)
> > at ../../softmmu/qdev-monitor.c:714
> > #15 0x0000555555a6b202 in qdev_device_add
> > (opts=opts@entry=0x5555568776f0, errp=errp@entry=0x555556765830
> > <error_fatal>) at ../../softmmu/qdev-monitor.c:733
> > #16 0x0000555555a7367f in device_init_func (opaque=opaque@entry=0x0,
> > opts=0x3cd16a, opts@entry=0x5555568776f0, errp=0x6,
> > errp@entry=0x555556765830 <error_fatal>)
> > at ../../softmmu/vl.c:1140
> > #17 0x0000555555e78331 in qemu_opts_foreach
> > (list=<optimised out>, func=0x555555a73670 <device_init_func>,
> > opaque=opaque@entry=0x0, errp=0x555556765830 <error_fatal>) at
> > ../../util/qemu-option.c:1135
> > #18 0x0000555555a6dd61 in qemu_create_cli_devices () at ../../softmmu/vl.c:2542
> > #19 qmp_x_exit_preconfig (errp=<optimised out>) at ../../softmmu/vl.c:2610
> > #20 0x0000555555a7177b in qemu_init (argc=<optimised out>,
> > argv=<optimised out>) at ../../softmmu/vl.c:3612
> > #21 0x000055555587b656 in main (argc=3985770, argv=0x3cd16a) at
> > ../../softmmu/main.c:47
> >
> > The problem is here:
> >
> > > -static void pxb_dev_reset(DeviceState *dev)
> > > +static void pxb_cxl_dev_reset(DeviceState *dev)
> >
> > This function is called from pxb_cxl_dev_realize(),
> > which is the realize function for TYPE_PXB_CXL_DEVICE.
> > That type's parent is TYPE_PCI_DEVICE.
> >
> > > {
> > > CXLHost *cxl = PXB_CXL_DEV(dev)->cxl.cxl_host_bridge;
> > > CXLComponentState *cxl_cstate = &cxl->cxl_cstate;
> > > + PCIHostState *hb = PCI_HOST_BRIDGE(cxl);
> > > uint32_t *reg_state = cxl_cstate->crb.cache_mem_registers;
> > > uint32_t *write_msk = cxl_cstate->crb.cache_mem_regs_write_mask;
> > > + int dsp_count = 0;
> > >
> > > cxl_component_register_init_common(reg_state, write_msk, CXL2_ROOT_PORT);
> > > - ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT, 8);
> > > + /*
> > > + * The CXL specification allows for host bridges with no HDM decoders
> > > + * if they only have a single root port.
> > > + */
> > > + if (!PXB_DEV(dev)->hdm_for_passthrough) {
> >
> > However, here we try to cast the device pointer to PXB_DEV.
> > That is not permitted because dev is not of type TYPE_PXB_DEVICE
> > (either directly or as a parent class). So if you have the QOM
> > debugging enabled then the attempt to cast causes an assertion
> > failure.
> >
> > > + dsp_count = pcie_count_ds_ports(hb->bus);
> > > + }
> > > + /* Initial reset will have 0 dsp so wait until > 0 */
> > > + if (dsp_count == 1) {
> > > + cxl->passthrough = true;
> > > + /* Set Capability ID in header to NONE */
> > > + ARRAY_FIELD_DP32(reg_state, CXL_HDM_CAPABILITY_HEADER, ID, 0);
> > > + } else {
> > > + ARRAY_FIELD_DP32(reg_state, CXL_HDM_DECODER_CAPABILITY, TARGET_COUNT,
> > > + 8);
> > > + }
> > > }
> >
> > What was the intention here with the type hierarchy?
> > Should TYPE_PXB_CXL_DEVICE be a subclass of TYPE_PXB_DEVICE,
> > or should the cxl-related functions not be trying to treat
> > it as a PXB device ?
>
> I can't immediately recall why, but PXB_DEV and PXB_CXL_DEV use the
> same struct PXBDev so here switching to PXB_CXL_DEV(dev)->hdm_for_passthrough
> looks to be the minimum fix.
>
> I'll dig into why / if there is a good reason for why PXB_CXL_DEV doesn't
> simply inherit from PXB_DEV then use runtime type checking in the few places it
> will matter.
Ah. Looks to be cut and paste from what TYPE_PXB_PCIE_DEV was doing.
We probably never considered if that was a good path to take or not.
Not clear why they can't both just inherit from TYPE_PXB_DEV.
At least superficially it seems to work + is cleaner.
Following only lightly tested... May eat babies etc.
From 995226fcdfe196e010c5a3850bfca2f97a384307 Mon Sep 17 00:00:00 2001
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Date: Wed, 19 Apr 2023 15:41:44 +0100
Subject: [PATCH] hw/pci-bridge: Make PCIe and CXL PXB Devices inherit from
PXB_DEVICE
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
hw/acpi/cxl.c | 9 +++---
hw/cxl/cxl-host.c | 2 +-
hw/pci-bridge/pci_expander_bridge.c | 50 +++++++++--------------------
include/hw/cxl/cxl.h | 4 +--
include/hw/pci/pci_bridge.h | 26 +++++++++++----
5 files changed, 43 insertions(+), 48 deletions(-)
diff --git a/hw/acpi/cxl.c b/hw/acpi/cxl.c
index 17dc0bdc9c..ad8faef48b 100644
--- a/hw/acpi/cxl.c
+++ b/hw/acpi/cxl.c
@@ -87,9 +87,10 @@ void build_cxl_dsm_method(Aml *dev)
aml_append(dev, method);
}
-static void cedt_build_chbs(GArray *table_data, PXBDev *cxl)
+static void cedt_build_chbs(GArray *table_data, PXBCXLDev *cxl)
{
- SysBusDevice *sbd = SYS_BUS_DEVICE(cxl->cxl.cxl_host_bridge);
+ PXBDev *pxb = PXB_DEV(cxl);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(cxl->cxl_host_bridge);
struct MemoryRegion *mr = sbd->mmio[0].memory;
/* Type */
@@ -102,7 +103,7 @@ static void cedt_build_chbs(GArray *table_data, PXBDev *cxl)
build_append_int_noprefix(table_data, 32, 2);
/* UID - currently equal to bus number */
- build_append_int_noprefix(table_data, cxl->bus_nr, 4);
+ build_append_int_noprefix(table_data, pxb->bus_nr, 4);
/* Version */
build_append_int_noprefix(table_data, 1, 4);
@@ -169,7 +170,7 @@ static void cedt_build_cfmws(GArray *table_data, CXLState *cxls)
/* Host Bridge List (list of UIDs - currently bus_nr) */
for (i = 0; i < fw->num_targets; i++) {
g_assert(fw->target_hbs[i]);
- build_append_int_noprefix(table_data, fw->target_hbs[i]->bus_nr, 4);
+ build_append_int_noprefix(table_data, PXB_DEV(fw->target_hbs[i])->bus_nr, 4);
}
}
}
diff --git a/hw/cxl/cxl-host.c b/hw/cxl/cxl-host.c
index d75f673e6d..d6d510803f 100644
--- a/hw/cxl/cxl-host.c
+++ b/hw/cxl/cxl-host.c
@@ -167,7 +167,7 @@ static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow *fw, hwaddr addr)
addr += fw->base;
rb_index = (addr / cxl_decode_ig(fw->enc_int_gran)) % fw->num_targets;
- hb = PCI_HOST_BRIDGE(fw->target_hbs[rb_index]->cxl.cxl_host_bridge);
+ hb = PCI_HOST_BRIDGE(fw->target_hbs[rb_index]->cxl_host_bridge);
if (!hb || !hb->bus || !pci_bus_is_cxl(hb->bus)) {
return NULL;
}
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index ead33f0c05..2af942dc10 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -50,25 +50,10 @@ struct PXBBus {
char bus_path[8];
};
-#define TYPE_PXB_DEVICE "pxb"
-DECLARE_INSTANCE_CHECKER(PXBDev, PXB_DEV,
- TYPE_PXB_DEVICE)
-
#define TYPE_PXB_PCIE_DEVICE "pxb-pcie"
DECLARE_INSTANCE_CHECKER(PXBDev, PXB_PCIE_DEV,
TYPE_PXB_PCIE_DEVICE)
-static PXBDev *convert_to_pxb(PCIDevice *dev)
-{
- /* A CXL PXB's parent bus is PCIe, so the normal check won't work */
- if (object_dynamic_cast(OBJECT(dev), TYPE_PXB_CXL_DEVICE)) {
- return PXB_CXL_DEV(dev);
- }
-
- return pci_bus_is_express(pci_get_bus(dev))
- ? PXB_PCIE_DEV(dev) : PXB_DEV(dev);
-}
-
static GList *pxb_dev_list;
#define TYPE_PXB_HOST "pxb-host"
@@ -89,14 +74,14 @@ bool cxl_get_hb_passthrough(PCIHostState *hb)
static int pxb_bus_num(PCIBus *bus)
{
- PXBDev *pxb = convert_to_pxb(bus->parent_dev);
+ PXBDev *pxb = PXB_DEV(bus->parent_dev);
return pxb->bus_nr;
}
static uint16_t pxb_bus_numa_node(PCIBus *bus)
{
- PXBDev *pxb = convert_to_pxb(bus->parent_dev);
+ PXBDev *pxb = PXB_DEV(bus->parent_dev);
return pxb->numa_node;
}
@@ -154,7 +139,7 @@ static char *pxb_host_ofw_unit_address(const SysBusDevice *dev)
pxb_host = PCI_HOST_BRIDGE(dev);
pxb_bus = pxb_host->bus;
- pxb_dev = convert_to_pxb(pxb_bus->parent_dev);
+ pxb_dev = PXB_DEV(pxb_bus->parent_dev);
position = g_list_index(pxb_dev_list, pxb_dev);
assert(position >= 0);
@@ -212,8 +197,8 @@ static void pxb_cxl_realize(DeviceState *dev, Error **errp)
*/
void pxb_cxl_hook_up_registers(CXLState *cxl_state, PCIBus *bus, Error **errp)
{
- PXBDev *pxb = PXB_CXL_DEV(pci_bridge_get_device(bus));
- CXLHost *cxl = pxb->cxl.cxl_host_bridge;
+ PXBCXLDev *pxb = PXB_CXL_DEV(pci_bridge_get_device(bus));
+ CXLHost *cxl = pxb->cxl_host_bridge;
CXLComponentState *cxl_cstate = &cxl->cxl_cstate;
struct MemoryRegion *mr = &cxl_cstate->crb.component_registers;
hwaddr offset;
@@ -299,7 +284,7 @@ static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin)
static void pxb_cxl_dev_reset(DeviceState *dev)
{
- CXLHost *cxl = PXB_CXL_DEV(dev)->cxl.cxl_host_bridge;
+ CXLHost *cxl = PXB_CXL_DEV(dev)->cxl_host_bridge;
CXLComponentState *cxl_cstate = &cxl->cxl_cstate;
PCIHostState *hb = PCI_HOST_BRIDGE(cxl);
uint32_t *reg_state = cxl_cstate->crb.cache_mem_registers;
@@ -311,7 +296,7 @@ static void pxb_cxl_dev_reset(DeviceState *dev)
* The CXL specification allows for host bridges with no HDM decoders
* if they only have a single root port.
*/
- if (!PXB_DEV(dev)->hdm_for_passthrough) {
+ if (!PXB_CXL_DEV(dev)->hdm_for_passthrough) {
dsp_count = pcie_count_ds_ports(hb->bus);
}
/* Initial reset will have 0 dsp so wait until > 0 */
@@ -337,7 +322,7 @@ static gint pxb_compare(gconstpointer a, gconstpointer b)
static void pxb_dev_realize_common(PCIDevice *dev, enum BusType type,
Error **errp)
{
- PXBDev *pxb = convert_to_pxb(dev);
+ PXBDev *pxb = PXB_DEV(dev);
DeviceState *ds, *bds = NULL;
PCIBus *bus;
const char *dev_name = NULL;
@@ -365,7 +350,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, enum BusType type,
} else if (type == CXL) {
bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_CXL_BUS);
bus->flags |= PCI_BUS_CXL;
- PXB_CXL_DEV(dev)->cxl.cxl_host_bridge = PXB_CXL_HOST(ds);
+ PXB_CXL_DEV(dev)->cxl_host_bridge = PXB_CXL_HOST(ds);
} else {
bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
bds = qdev_new("pci-bridge");
@@ -418,7 +403,7 @@ static void pxb_dev_realize(PCIDevice *dev, Error **errp)
static void pxb_dev_exitfn(PCIDevice *pci_dev)
{
- PXBDev *pxb = convert_to_pxb(pci_dev);
+ PXBDev *pxb = PXB_DEV(pci_dev);
pxb_dev_list = g_list_remove(pxb_dev_list, pxb);
}
@@ -481,15 +466,14 @@ static void pxb_pcie_dev_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_BRIDGE_HOST;
dc->desc = "PCI Express Expander Bridge";
- device_class_set_props(dc, pxb_dev_properties);
dc->hotpluggable = false;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
static const TypeInfo pxb_pcie_dev_info = {
.name = TYPE_PXB_PCIE_DEVICE,
- .parent = TYPE_PCI_DEVICE,
- .instance_size = sizeof(PXBDev),
+ .parent = TYPE_PXB_DEVICE,
+ .instance_size = sizeof(PXBPCIEDev),
.class_init = pxb_pcie_dev_class_init,
.interfaces = (InterfaceInfo[]) {
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
@@ -510,11 +494,7 @@ static void pxb_cxl_dev_realize(PCIDevice *dev, Error **errp)
}
static Property pxb_cxl_dev_properties[] = {
- /* Note: 0 is not a legal PXB bus number. */
- DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0),
- DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED),
- DEFINE_PROP_BOOL("bypass_iommu", PXBDev, bypass_iommu, false),
- DEFINE_PROP_BOOL("hdm_for_passthrough", PXBDev, hdm_for_passthrough, false),
+ DEFINE_PROP_BOOL("hdm_for_passthrough", PXBCXLDev, hdm_for_passthrough, false),
DEFINE_PROP_END_OF_LIST(),
};
@@ -541,8 +521,8 @@ static void pxb_cxl_dev_class_init(ObjectClass *klass, void *data)
static const TypeInfo pxb_cxl_dev_info = {
.name = TYPE_PXB_CXL_DEVICE,
- .parent = TYPE_PCI_DEVICE,
- .instance_size = sizeof(PXBDev),
+ .parent = TYPE_PXB_PCIE_DEVICE,
+ .instance_size = sizeof(PXBCXLDev),
.class_init = pxb_cxl_dev_class_init,
.interfaces =
(InterfaceInfo[]){
diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h
index 97c1bc2c8a..028e78a40d 100644
--- a/include/hw/cxl/cxl.h
+++ b/include/hw/cxl/cxl.h
@@ -26,12 +26,12 @@
#define CXL_WINDOW_MAX 10
-typedef struct PXBDev PXBDev;
+typedef struct PXBCXLDev PXBCXLDev;
typedef struct CXLFixedWindow {
uint64_t size;
char **targets;
- PXBDev *target_hbs[8];
+ PXBCXLDev *target_hbs[8];
uint8_t num_targets;
uint8_t enc_int_ways;
uint8_t enc_int_gran;
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
index 0aac8e9db0..57f66da5bd 100644
--- a/include/hw/pci/pci_bridge.h
+++ b/include/hw/pci/pci_bridge.h
@@ -85,7 +85,7 @@ struct PCIBridge {
#define PCI_BRIDGE_DEV_PROP_SHPC "shpc"
typedef struct CXLHost CXLHost;
-struct PXBDev {
+typedef struct PXBDev {
/*< private >*/
PCIDevice parent_obj;
/*< public >*/
@@ -93,14 +93,28 @@ struct PXBDev {
uint8_t bus_nr;
uint16_t numa_node;
bool bypass_iommu;
+} PXBDev;
+
+typedef struct PXBPCIEDev {
+ /*< private >*/
+ PXBDev parent_obj;
+} PXBPCIEDev;
+
+#define TYPE_PXB_DEVICE "pxb"
+DECLARE_INSTANCE_CHECKER(PXBDev, PXB_DEV,
+ TYPE_PXB_DEVICE)
+
+typedef struct PXBCXLDev {
+ /*< private >*/
+ PXBPCIEDev parent_obj;
+ /*< public >*/
+
bool hdm_for_passthrough;
- struct cxl_dev {
- CXLHost *cxl_host_bridge; /* Pointer to a CXLHost */
- } cxl;
-};
+ CXLHost *cxl_host_bridge; /* Pointer to a CXLHost */
+} PXBCXLDev;
#define TYPE_PXB_CXL_DEVICE "pxb-cxl"
-DECLARE_INSTANCE_CHECKER(PXBDev, PXB_CXL_DEV,
+DECLARE_INSTANCE_CHECKER(PXBCXLDev, PXB_CXL_DEV,
TYPE_PXB_CXL_DEVICE)
int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset,
--
2.37.2
>
> Jonathan
>
> >
> > thanks
> > -- PMM
>
>
>
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
2023-04-19 14:49 ` Jonathan Cameron via
@ 2023-04-19 16:25 ` Peter Maydell
2023-04-19 17:18 ` Jonathan Cameron via
0 siblings, 1 reply; 99+ messages in thread
From: Peter Maydell @ 2023-04-19 16:25 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Jonathan Cameron via, Michael S. Tsirkin, Fan Ni,
Marcel Apfelbaum, linuxarm
On Wed, 19 Apr 2023 at 15:50, Jonathan Cameron
<Jonathan.Cameron@huawei.com> wrote:
>
> On Wed, 19 Apr 2023 14:57:54 +0100
> Jonathan Cameron via <qemu-devel@nongnu.org> wrote:
>
> > On Tue, 11 Apr 2023 11:26:16 +0100
> > Peter Maydell <peter.maydell@linaro.org> wrote:
> > > What was the intention here with the type hierarchy?
> > > Should TYPE_PXB_CXL_DEVICE be a subclass of TYPE_PXB_DEVICE,
> > > or should the cxl-related functions not be trying to treat
> > > it as a PXB device ?
> >
> > I can't immediately recall why, but PXB_DEV and PXB_CXL_DEV use the
> > same struct PXBDev so here switching to PXB_CXL_DEV(dev)->hdm_for_passthrough
> > looks to be the minimum fix.
> >
> > I'll dig into why / if there is a good reason for why PXB_CXL_DEV doesn't
> > simply inherit from PXB_DEV then use runtime type checking in the few places it
> > will matter.
>
> Ah. Looks to be cut and paste from what TYPE_PXB_PCIE_DEV was doing.
> We probably never considered if that was a good path to take or not.
> Not clear why they can't both just inherit from TYPE_PXB_DEV.
> At least superficially it seems to work + is cleaner.
>
> Following only lightly tested... May eat babies etc.
>
> From 995226fcdfe196e010c5a3850bfca2f97a384307 Mon Sep 17 00:00:00 2001
> From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Date: Wed, 19 Apr 2023 15:41:44 +0100
> Subject: [PATCH] hw/pci-bridge: Make PCIe and CXL PXB Devices inherit from
> PXB_DEVICE
>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
You probably want to send this out as a proper top-level patch:
both humans and automated tooling tend to not notice patches
buried inside other list threads.
> -static PXBDev *convert_to_pxb(PCIDevice *dev)
> -{
> - /* A CXL PXB's parent bus is PCIe, so the normal check won't work */
> - if (object_dynamic_cast(OBJECT(dev), TYPE_PXB_CXL_DEVICE)) {
> - return PXB_CXL_DEV(dev);
> - }
> -
> - return pci_bus_is_express(pci_get_bus(dev))
> - ? PXB_PCIE_DEV(dev) : PXB_DEV(dev);
> -}
This function looks super-dubious, so the fact that it
goes away in this patch is a good sign :-)
> diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
> index 0aac8e9db0..57f66da5bd 100644
> --- a/include/hw/pci/pci_bridge.h
> +++ b/include/hw/pci/pci_bridge.h
> @@ -85,7 +85,7 @@ struct PCIBridge {
> #define PCI_BRIDGE_DEV_PROP_SHPC "shpc"
> typedef struct CXLHost CXLHost;
>
> -struct PXBDev {
> +typedef struct PXBDev {
> /*< private >*/
> PCIDevice parent_obj;
> /*< public >*/
> @@ -93,14 +93,28 @@ struct PXBDev {
> uint8_t bus_nr;
> uint16_t numa_node;
> bool bypass_iommu;
> +} PXBDev;
> +
> +typedef struct PXBPCIEDev {
> + /*< private >*/
> + PXBDev parent_obj;
> +} PXBPCIEDev;
> +
> +#define TYPE_PXB_DEVICE "pxb"
> +DECLARE_INSTANCE_CHECKER(PXBDev, PXB_DEV,
> + TYPE_PXB_DEVICE)
The documentation for DECLARE_INSTANCE_CHECKER()
says "Direct usage of this macro should be avoided, and
the complete OBJECT_DECLARE_TYPE() macro is recommended
instead. So we should do that. (That will also mean you don't
need the explicit "typedef"s on your struct declarations,
because OBJECT_DECLARE_TYPE() will define typedefs for you.)
> +
> +typedef struct PXBCXLDev {
> + /*< private >*/
> + PXBPCIEDev parent_obj;
> + /*< public >*/
> +
> bool hdm_for_passthrough;
> - struct cxl_dev {
> - CXLHost *cxl_host_bridge; /* Pointer to a CXLHost */
> - } cxl;
> -};
> + CXLHost *cxl_host_bridge; /* Pointer to a CXLHost */
> +} PXBCXLDev;
>
> #define TYPE_PXB_CXL_DEVICE "pxb-cxl"
> -DECLARE_INSTANCE_CHECKER(PXBDev, PXB_CXL_DEV,
> +DECLARE_INSTANCE_CHECKER(PXBCXLDev, PXB_CXL_DEV,
> TYPE_PXB_CXL_DEVICE)
>
> int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset,
thanks
-- PMM
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
2023-04-19 16:25 ` Peter Maydell
@ 2023-04-19 17:18 ` Jonathan Cameron via
0 siblings, 0 replies; 99+ messages in thread
From: Jonathan Cameron via @ 2023-04-19 17:18 UTC (permalink / raw)
To: Peter Maydell
Cc: Jonathan Cameron via, Michael S. Tsirkin, Fan Ni,
Marcel Apfelbaum, linuxarm
On Wed, 19 Apr 2023 17:25:17 +0100
Peter Maydell <peter.maydell@linaro.org> wrote:
> On Wed, 19 Apr 2023 at 15:50, Jonathan Cameron
> <Jonathan.Cameron@huawei.com> wrote:
> >
> > On Wed, 19 Apr 2023 14:57:54 +0100
> > Jonathan Cameron via <qemu-devel@nongnu.org> wrote:
> >
> > > On Tue, 11 Apr 2023 11:26:16 +0100
> > > Peter Maydell <peter.maydell@linaro.org> wrote:
> > > > What was the intention here with the type hierarchy?
> > > > Should TYPE_PXB_CXL_DEVICE be a subclass of TYPE_PXB_DEVICE,
> > > > or should the cxl-related functions not be trying to treat
> > > > it as a PXB device ?
> > >
> > > I can't immediately recall why, but PXB_DEV and PXB_CXL_DEV use the
> > > same struct PXBDev so here switching to PXB_CXL_DEV(dev)->hdm_for_passthrough
> > > looks to be the minimum fix.
> > >
> > > I'll dig into why / if there is a good reason for why PXB_CXL_DEV doesn't
> > > simply inherit from PXB_DEV then use runtime type checking in the few places it
> > > will matter.
> >
> > Ah. Looks to be cut and paste from what TYPE_PXB_PCIE_DEV was doing.
> > We probably never considered if that was a good path to take or not.
> > Not clear why they can't both just inherit from TYPE_PXB_DEV.
> > At least superficially it seems to work + is cleaner.
> >
> > Following only lightly tested... May eat babies etc.
> >
> > From 995226fcdfe196e010c5a3850bfca2f97a384307 Mon Sep 17 00:00:00 2001
> > From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > Date: Wed, 19 Apr 2023 15:41:44 +0100
> > Subject: [PATCH] hw/pci-bridge: Make PCIe and CXL PXB Devices inherit from
> > PXB_DEVICE
> >
> > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
> You probably want to send this out as a proper top-level patch:
> both humans and automated tooling tend to not notice patches
> buried inside other list threads.
Absolutely. Was a case of lazily throwing it over the wall before running out
the door.
>
> > -static PXBDev *convert_to_pxb(PCIDevice *dev)
> > -{
> > - /* A CXL PXB's parent bus is PCIe, so the normal check won't work */
> > - if (object_dynamic_cast(OBJECT(dev), TYPE_PXB_CXL_DEVICE)) {
> > - return PXB_CXL_DEV(dev);
> > - }
> > -
> > - return pci_bus_is_express(pci_get_bus(dev))
> > - ? PXB_PCIE_DEV(dev) : PXB_DEV(dev);
> > -}
>
> This function looks super-dubious, so the fact that it
> goes away in this patch is a good sign :-)
>
> > diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
> > index 0aac8e9db0..57f66da5bd 100644
> > --- a/include/hw/pci/pci_bridge.h
> > +++ b/include/hw/pci/pci_bridge.h
> > @@ -85,7 +85,7 @@ struct PCIBridge {
> > #define PCI_BRIDGE_DEV_PROP_SHPC "shpc"
> > typedef struct CXLHost CXLHost;
> >
> > -struct PXBDev {
> > +typedef struct PXBDev {
> > /*< private >*/
> > PCIDevice parent_obj;
> > /*< public >*/
> > @@ -93,14 +93,28 @@ struct PXBDev {
> > uint8_t bus_nr;
> > uint16_t numa_node;
> > bool bypass_iommu;
> > +} PXBDev;
> > +
> > +typedef struct PXBPCIEDev {
> > + /*< private >*/
> > + PXBDev parent_obj;
> > +} PXBPCIEDev;
> > +
> > +#define TYPE_PXB_DEVICE "pxb"
> > +DECLARE_INSTANCE_CHECKER(PXBDev, PXB_DEV,
> > + TYPE_PXB_DEVICE)
>
> The documentation for DECLARE_INSTANCE_CHECKER()
> says "Direct usage of this macro should be avoided, and
> the complete OBJECT_DECLARE_TYPE() macro is recommended
> instead. So we should do that. (That will also mean you don't
> need the explicit "typedef"s on your struct declarations,
> because OBJECT_DECLARE_TYPE() will define typedefs for you.)
I'll fix that up and send out properly. Thanks for the
quick feedback.
Jonathan
>
> > +
> > +typedef struct PXBCXLDev {
> > + /*< private >*/
> > + PXBPCIEDev parent_obj;
> > + /*< public >*/
> > +
> > bool hdm_for_passthrough;
> > - struct cxl_dev {
> > - CXLHost *cxl_host_bridge; /* Pointer to a CXLHost */
> > - } cxl;
> > -};
> > + CXLHost *cxl_host_bridge; /* Pointer to a CXLHost */
> > +} PXBCXLDev;
> >
> > #define TYPE_PXB_CXL_DEVICE "pxb-cxl"
> > -DECLARE_INSTANCE_CHECKER(PXBDev, PXB_CXL_DEV,
> > +DECLARE_INSTANCE_CHECKER(PXBCXLDev, PXB_CXL_DEV,
> > TYPE_PXB_CXL_DEVICE)
> >
> > int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset,
>
> thanks
> -- PMM
^ permalink raw reply [flat|nested] 99+ messages in thread
* [PULL 71/73] hw/virtio/vhost-user: avoid using unitialized errp
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (69 preceding siblings ...)
2023-03-08 1:14 ` [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden Michael S. Tsirkin
@ 2023-03-08 1:14 ` Michael S. Tsirkin
2023-03-08 1:14 ` [PULL 72/73] virtio: fix reachable assertion due to stale value of cached region size Michael S. Tsirkin
` (2 subsequent siblings)
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:14 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Albert Esteve
From: Albert Esteve <aesteve@redhat.com>
During protocol negotiation, when we the QEMU
stub does not support a backend with F_CONFIG,
it throws a warning and supresses the
VHOST_USER_PROTOCOL_F_CONFIG bit.
However, the warning uses warn_reportf_err macro
and passes an unitialized errp pointer. However,
the macro tries to edit the 'msg' member of the
unitialized Error and segfaults.
Instead, just use warn_report, which prints a
warning message directly to the output.
Fixes: 5653493 ("hw/virtio/vhost-user: don't suppress F_CONFIG when supported")
Signed-off-by: Albert Esteve <aesteve@redhat.com>
Message-Id: <20230302121719.9390-1-aesteve@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/virtio/vhost-user.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index 8968541514..e5285df4ba 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -2031,8 +2031,8 @@ static int vhost_user_backend_init(struct vhost_dev *dev, void *opaque,
} else {
if (virtio_has_feature(protocol_features,
VHOST_USER_PROTOCOL_F_CONFIG)) {
- warn_reportf_err(*errp, "vhost-user backend supports "
- "VHOST_USER_PROTOCOL_F_CONFIG but QEMU does not.");
+ warn_report("vhost-user backend supports "
+ "VHOST_USER_PROTOCOL_F_CONFIG but QEMU does not.");
protocol_features &= ~(1ULL << VHOST_USER_PROTOCOL_F_CONFIG);
}
}
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 72/73] virtio: fix reachable assertion due to stale value of cached region size
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (70 preceding siblings ...)
2023-03-08 1:14 ` [PULL 71/73] hw/virtio/vhost-user: avoid using unitialized errp Michael S. Tsirkin
@ 2023-03-08 1:14 ` Michael S. Tsirkin
2023-03-08 1:14 ` [PULL 73/73] virtio: refresh vring region cache after updating a virtqueue size Michael S. Tsirkin
2023-03-09 14:47 ` [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
73 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:14 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Carlos López
From: Carlos López <clopez@suse.de>
In virtqueue_{split,packed}_get_avail_bytes() descriptors are read
in a loop via MemoryRegionCache regions and calls to
vring_{split,packed}_desc_read() - these take a region cache and the
index of the descriptor to be read.
For direct descriptors we use a cache provided by the caller, whose
size matches that of the virtqueue vring. We limit the number of
descriptors we can read by the size of that vring:
max = vq->vring.num;
...
MemoryRegionCache *desc_cache = &caches->desc;
For indirect descriptors, we initialize a new cache and limit the
number of descriptors by the size of the intermediate descriptor:
len = address_space_cache_init(&indirect_desc_cache,
vdev->dma_as,
desc.addr, desc.len, false);
desc_cache = &indirect_desc_cache;
...
max = desc.len / sizeof(VRingDesc);
However, the first initialization of `max` is done outside the loop
where we process guest descriptors, while the second one is done
inside. This means that a sequence of an indirect descriptor followed
by a direct one will leave a stale value in `max`. If the second
descriptor's `next` field is smaller than the stale value, but
greater than the size of the virtqueue ring (and thus the cached
region), a failed assertion will be triggered in
address_space_read_cached() down the call chain.
Fix this by initializing `max` inside the loop in both functions.
Fixes: 9796d0ac8fb0 ("virtio: use address_space_map/unmap to access descriptors")
Signed-off-by: Carlos López <clopez@suse.de>
Message-Id: <20230302100358.3613-1-clopez@suse.de>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/virtio/virtio.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
index f35178f5fc..98c4819fcc 100644
--- a/hw/virtio/virtio.c
+++ b/hw/virtio/virtio.c
@@ -1069,7 +1069,7 @@ static void virtqueue_split_get_avail_bytes(VirtQueue *vq,
VRingMemoryRegionCaches *caches)
{
VirtIODevice *vdev = vq->vdev;
- unsigned int max, idx;
+ unsigned int idx;
unsigned int total_bufs, in_total, out_total;
MemoryRegionCache indirect_desc_cache = MEMORY_REGION_CACHE_INVALID;
int64_t len = 0;
@@ -1078,13 +1078,12 @@ static void virtqueue_split_get_avail_bytes(VirtQueue *vq,
idx = vq->last_avail_idx;
total_bufs = in_total = out_total = 0;
- max = vq->vring.num;
-
while ((rc = virtqueue_num_heads(vq, idx)) > 0) {
MemoryRegionCache *desc_cache = &caches->desc;
unsigned int num_bufs;
VRingDesc desc;
unsigned int i;
+ unsigned int max = vq->vring.num;
num_bufs = total_bufs;
@@ -1206,7 +1205,7 @@ static void virtqueue_packed_get_avail_bytes(VirtQueue *vq,
VRingMemoryRegionCaches *caches)
{
VirtIODevice *vdev = vq->vdev;
- unsigned int max, idx;
+ unsigned int idx;
unsigned int total_bufs, in_total, out_total;
MemoryRegionCache *desc_cache;
MemoryRegionCache indirect_desc_cache = MEMORY_REGION_CACHE_INVALID;
@@ -1218,14 +1217,14 @@ static void virtqueue_packed_get_avail_bytes(VirtQueue *vq,
wrap_counter = vq->last_avail_wrap_counter;
total_bufs = in_total = out_total = 0;
- max = vq->vring.num;
-
for (;;) {
unsigned int num_bufs = total_bufs;
unsigned int i = idx;
int rc;
+ unsigned int max = vq->vring.num;
desc_cache = &caches->desc;
+
vring_packed_desc_read(vdev, &desc, desc_cache, idx, true);
if (!is_desc_avail(desc.flags, wrap_counter)) {
break;
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* [PULL 73/73] virtio: refresh vring region cache after updating a virtqueue size
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (71 preceding siblings ...)
2023-03-08 1:14 ` [PULL 72/73] virtio: fix reachable assertion due to stale value of cached region size Michael S. Tsirkin
@ 2023-03-08 1:14 ` Michael S. Tsirkin
2023-03-09 14:48 ` Michael S. Tsirkin
2023-03-09 14:47 ` [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
73 siblings, 1 reply; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-08 1:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Carlos López, Thomas Huth, Cornelia Huck,
Halil Pasic, Eric Farman, Christian Borntraeger,
Richard Henderson, David Hildenbrand, Ilya Leoshkevich,
qemu-s390x
From: Carlos López <clopez@suse.de>
When a virtqueue size is changed by the guest via
virtio_queue_set_num(), its region cache is not automatically updated.
If the size was increased, this could lead to accessing the cache out
of bounds. For example, in vring_get_used_event():
static inline uint16_t vring_get_used_event(VirtQueue *vq)
{
return vring_avail_ring(vq, vq->vring.num);
}
static inline uint16_t vring_avail_ring(VirtQueue *vq, int i)
{
VRingMemoryRegionCaches *caches = vring_get_region_caches(vq);
hwaddr pa = offsetof(VRingAvail, ring[i]);
if (!caches) {
return 0;
}
return virtio_lduw_phys_cached(vq->vdev, &caches->avail, pa);
}
vq->vring.num will be greater than caches->avail.len, which will
trigger a failed assertion down the call path of
virtio_lduw_phys_cached().
Fix this by calling virtio_queue_update_rings() after
virtio_queue_set_num() if we are not already calling
virtio_queue_set_rings().
Signed-off-by: Carlos López <clopez@suse.de>
Message-Id: <20230302101447.4499-1-clopez@suse.de>
Acked-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/s390x/virtio-ccw.c | 1 +
hw/virtio/virtio-mmio.c | 5 ++---
hw/virtio/virtio-pci.c | 1 +
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c
index e33e5207ab..89891ac58a 100644
--- a/hw/s390x/virtio-ccw.c
+++ b/hw/s390x/virtio-ccw.c
@@ -237,6 +237,7 @@ static int virtio_ccw_set_vqs(SubchDev *sch, VqInfoBlock *info,
return -EINVAL;
}
virtio_queue_set_num(vdev, index, num);
+ virtio_queue_update_rings(vdev, index);
} else if (virtio_queue_get_num(vdev, index) > num) {
/* Fail if we don't have a big enough queue. */
return -EINVAL;
diff --git a/hw/virtio/virtio-mmio.c b/hw/virtio/virtio-mmio.c
index 23ba625eb6..c74822308f 100644
--- a/hw/virtio/virtio-mmio.c
+++ b/hw/virtio/virtio-mmio.c
@@ -350,10 +350,9 @@ static void virtio_mmio_write(void *opaque, hwaddr offset, uint64_t value,
case VIRTIO_MMIO_QUEUE_NUM:
trace_virtio_mmio_queue_write(value, VIRTQUEUE_MAX_SIZE);
virtio_queue_set_num(vdev, vdev->queue_sel, value);
+ virtio_queue_update_rings(vdev, vdev->queue_sel);
- if (proxy->legacy) {
- virtio_queue_update_rings(vdev, vdev->queue_sel);
- } else {
+ if (!proxy->legacy) {
proxy->vqs[vdev->queue_sel].num = value;
}
break;
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 247325c193..a0a2f2c965 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -1554,6 +1554,7 @@ static void virtio_pci_common_write(void *opaque, hwaddr addr,
proxy->vqs[vdev->queue_sel].num = val;
virtio_queue_set_num(vdev, vdev->queue_sel,
proxy->vqs[vdev->queue_sel].num);
+ virtio_queue_update_rings(vdev, vdev->queue_sel);
break;
case VIRTIO_PCI_COMMON_Q_MSIX:
vector = virtio_queue_vector(vdev, vdev->queue_sel);
--
MST
^ permalink raw reply related [flat|nested] 99+ messages in thread* Re: [PULL 73/73] virtio: refresh vring region cache after updating a virtqueue size
2023-03-08 1:14 ` [PULL 73/73] virtio: refresh vring region cache after updating a virtqueue size Michael S. Tsirkin
@ 2023-03-09 14:48 ` Michael S. Tsirkin
0 siblings, 0 replies; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-09 14:48 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Carlos López, Thomas Huth, Cornelia Huck,
Halil Pasic, Eric Farman, Christian Borntraeger,
Richard Henderson, David Hildenbrand, Ilya Leoshkevich,
qemu-s390x
On Tue, Mar 07, 2023 at 08:14:31PM -0500, Michael S. Tsirkin wrote:
> From: Carlos López <clopez@suse.de>
>
> When a virtqueue size is changed by the guest via
> virtio_queue_set_num(), its region cache is not automatically updated.
> If the size was increased, this could lead to accessing the cache out
> of bounds. For example, in vring_get_used_event():
>
> static inline uint16_t vring_get_used_event(VirtQueue *vq)
> {
> return vring_avail_ring(vq, vq->vring.num);
> }
>
> static inline uint16_t vring_avail_ring(VirtQueue *vq, int i)
> {
> VRingMemoryRegionCaches *caches = vring_get_region_caches(vq);
> hwaddr pa = offsetof(VRingAvail, ring[i]);
>
> if (!caches) {
> return 0;
> }
>
> return virtio_lduw_phys_cached(vq->vdev, &caches->avail, pa);
> }
>
> vq->vring.num will be greater than caches->avail.len, which will
> trigger a failed assertion down the call path of
> virtio_lduw_phys_cached().
>
> Fix this by calling virtio_queue_update_rings() after
> virtio_queue_set_num() if we are not already calling
> virtio_queue_set_rings().
>
> Signed-off-by: Carlos López <clopez@suse.de>
> Message-Id: <20230302101447.4499-1-clopez@suse.de>
> Acked-by: Thomas Huth <thuth@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
I just dropped this from the pull. No other changes so
not reposting, hope it's not too late.
> ---
> hw/s390x/virtio-ccw.c | 1 +
> hw/virtio/virtio-mmio.c | 5 ++---
> hw/virtio/virtio-pci.c | 1 +
> 3 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c
> index e33e5207ab..89891ac58a 100644
> --- a/hw/s390x/virtio-ccw.c
> +++ b/hw/s390x/virtio-ccw.c
> @@ -237,6 +237,7 @@ static int virtio_ccw_set_vqs(SubchDev *sch, VqInfoBlock *info,
> return -EINVAL;
> }
> virtio_queue_set_num(vdev, index, num);
> + virtio_queue_update_rings(vdev, index);
> } else if (virtio_queue_get_num(vdev, index) > num) {
> /* Fail if we don't have a big enough queue. */
> return -EINVAL;
> diff --git a/hw/virtio/virtio-mmio.c b/hw/virtio/virtio-mmio.c
> index 23ba625eb6..c74822308f 100644
> --- a/hw/virtio/virtio-mmio.c
> +++ b/hw/virtio/virtio-mmio.c
> @@ -350,10 +350,9 @@ static void virtio_mmio_write(void *opaque, hwaddr offset, uint64_t value,
> case VIRTIO_MMIO_QUEUE_NUM:
> trace_virtio_mmio_queue_write(value, VIRTQUEUE_MAX_SIZE);
> virtio_queue_set_num(vdev, vdev->queue_sel, value);
> + virtio_queue_update_rings(vdev, vdev->queue_sel);
>
> - if (proxy->legacy) {
> - virtio_queue_update_rings(vdev, vdev->queue_sel);
> - } else {
> + if (!proxy->legacy) {
> proxy->vqs[vdev->queue_sel].num = value;
> }
> break;
> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
> index 247325c193..a0a2f2c965 100644
> --- a/hw/virtio/virtio-pci.c
> +++ b/hw/virtio/virtio-pci.c
> @@ -1554,6 +1554,7 @@ static void virtio_pci_common_write(void *opaque, hwaddr addr,
> proxy->vqs[vdev->queue_sel].num = val;
> virtio_queue_set_num(vdev, vdev->queue_sel,
> proxy->vqs[vdev->queue_sel].num);
> + virtio_queue_update_rings(vdev, vdev->queue_sel);
> break;
> case VIRTIO_PCI_COMMON_Q_MSIX:
> vector = virtio_queue_vector(vdev, vdev->queue_sel);
> --
> MST
>
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PULL 00/73] virtio,pc,pci: features, fixes
2023-03-08 1:10 [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
` (72 preceding siblings ...)
2023-03-08 1:14 ` [PULL 73/73] virtio: refresh vring region cache after updating a virtqueue size Michael S. Tsirkin
@ 2023-03-09 14:47 ` Michael S. Tsirkin
2023-03-10 17:32 ` Peter Maydell
73 siblings, 1 reply; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-09 14:47 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell
On Tue, Mar 07, 2023 at 08:10:51PM -0500, Michael S. Tsirkin wrote:
> The following changes since commit 9832009d9dd2386664c15cc70f6e6bfe062be8bd:
>
> Merge tag 'pull-riscv-to-apply-20230306' of https://gitlab.com/palmer-dabbelt/qemu into staging (2023-03-07 12:53:00 +0000)
>
> are available in the Git repository at:
>
> https://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
>
> for you to fetch changes up to 52062b213c13bd7fff966d36b554c04609c925d6:
>
> virtio: refresh vring region cache after updating a virtqueue size (2023-03-07 19:51:07 -0500)
I moved it one commit back, now at (96cb085897)
Cornelia posted some concerns about the last commit.
> ----------------------------------------------------------------
> virtio,pc,pci: features, fixes
>
> Several features that landed at the last possible moment:
>
> Passthrough HDM decoder emulation
> Refactor cryptodev
> RAS error emulation and injection
> acpi-index support on non-hotpluggable slots
> Dynamically switch to vhost shadow virtqueues at vdpa net migration
>
> Plus a couple of bugfixes that look important to have in the release.
>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
>
> ----------------------------------------------------------------
> Albert Esteve (1):
> hw/virtio/vhost-user: avoid using unitialized errp
>
> Carlos López (2):
> virtio: fix reachable assertion due to stale value of cached region size
> virtio: refresh vring region cache after updating a virtqueue size
>
> Eugenio Pérez (14):
> vdpa net: move iova tree creation from init to start
> vdpa: Remember last call fd set
> vdpa: Negotiate _F_SUSPEND feature
> vdpa: rewind at get_base, not set_base
> vdpa: add vhost_vdpa->suspended parameter
> vdpa: add vhost_vdpa_suspend
> vdpa: move vhost reset after get vring base
> vdpa: add vdpa net migration state notifier
> vdpa: disable RAM block discard only for the first device
> vdpa net: block migration if the device has CVQ
> vdpa: block migration if device has unsupported features
> vdpa: block migration if SVQ does not admit a feature
> vdpa net: allow VHOST_F_LOG_ALL
> vdpa: return VHOST_F_LOG_ALL in vhost-vdpa devices
>
> Igor Mammedov (34):
> Revert "tests/qtest: Check for devices in bios-tables-test"
> tests: acpi: whitelist new q35.noacpihp test and pc.hpbrroot
> tests: acpi: add test_acpi_q35_tcg_no_acpi_hotplug test and extend test_acpi_piix4_no_acpi_pci_hotplug
> tests: acpi: update expected blobs
> tests: acpi: whitelist q35/DSDT.multi-bridge before extending testcase
> tests: acpi: extend multi-bridge case with case 'root-port,id=HOHP,hotplug=off root-port,bus=NOHP'
> x86: pcihp: fix missing PCNT callchain when intermediate root-port has 'hotplug=off' set
> tests: acpi: whitelist pc/DSDT.hpbrroot and pc/DSDT.hpbridge tests
> x86: pcihp: fix missing bridge AML when intermediate root-port has 'hotplug=off' set
> tests: acpi: update expected blobs
> pcihp: piix4: do not redirect hotplug controller to piix4 when ACPI hotplug is disabled
> pci: fix 'hotplugglable' property behavior
> tests: acpi: whitelist DSDT blobs before isolating PCI _DSM func 0 prolog
> pcihp: move PCI _DSM function 0 prolog into separate function
> tests: acpi: update expected blobs
> tests: acpi: whitelist DSDT before adding EDSM method
> acpi: pci: add EDSM method to DSDT
> tests: acpi: update expected blobs
> tests: acpi: whitelist DSDT before adding device with acpi-index to testcases
> tests: acpi: add device with acpi-index on non-hotpluggble bus
> acpi: pci: support acpi-index for non-hotpluggable devices
> tests: acpi: update expected blobs
> tests: acpi: whitelist DSDT before exposing non zero functions
> acpi: pci: describe all functions on populated slots
> tests: acpi: update expected blobs
> tests: acpi: whitelist DSDT before adding non-0 function device with acpi-index to testcases
> tests: acpi: add non zero function device with acpi-index on non-hotpluggble bus
> tests: acpi: update expected blobs
> pci: move acpi-index uniqueness check to generic PCI device code
> acpi: pci: drop BSEL usage when deciding that device isn't hotpluggable
> acpi: pci: move BSEL into build_append_pcihp_slots()
> acpi: pci: move out ACPI PCI hotplug generator from generic slot generator build_append_pci_bus_devices()
> pcihp: move fields enabling hotplug into AcpiPciHpState
> pcihp: add ACPI PCI hotplug specific is_hotpluggable_bus() callback
>
> Jonathan Cameron (10):
> hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register
> hw/pci/aer: Add missing routing for AER errors
> hw/pci-bridge/cxl_root_port: Wire up AER
> hw/pci-bridge/cxl_root_port: Wire up MSI
> hw/mem/cxl-type3: Add AER extended capability
> hw/cxl: Fix endian issues in CXL RAS capability defaults / masks
> hw/pci/aer: Make PCIE AER error injection facility available for other emulation to use.
> hw/mem/cxl_type3: Add CXL RAS Error Injection Support.
> hw/pci: Add pcie_count_ds_port() and pcie_find_port_first() helpers
> hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
>
> Zhenwei Pi (12):
> cryptodev: Introduce cryptodev.json
> cryptodev: Remove 'name' & 'model' fields
> cryptodev: Introduce cryptodev alg type in QAPI
> cryptodev: Introduce server type in QAPI
> cryptodev: Introduce 'query-cryptodev' QMP command
> cryptodev-builtin: Detect akcipher capability
> hmp: add cryptodev info command
> cryptodev: Use CryptoDevBackendOpInfo for operation
> cryptodev: Account statistics
> cryptodev: support QoS
> cryptodev: Support query-stats QMP command
> MAINTAINERS: add myself as the maintainer for cryptodev
>
> qapi/cryptodev.json | 89 ++++++
> qapi/cxl.json | 128 ++++++++
> qapi/qapi-schema.json | 2 +
> qapi/qom.json | 8 +-
> qapi/stats.json | 10 +-
> hw/pci/pci-internal.h | 1 -
> include/hw/acpi/ich9.h | 1 +
> include/hw/acpi/pcihp.h | 11 +-
> include/hw/acpi/piix4.h | 2 -
> include/hw/cxl/cxl.h | 1 +
> include/hw/cxl/cxl_component.h | 27 ++
> include/hw/cxl/cxl_device.h | 11 +
> include/hw/hotplug.h | 2 +
> include/hw/pci/pci_bridge.h | 1 +
> include/hw/pci/pcie_aer.h | 1 +
> include/hw/pci/pcie_port.h | 2 +
> include/hw/pci/pcie_regs.h | 3 +
> include/hw/qdev-core.h | 13 +-
> include/hw/virtio/vhost-backend.h | 4 +
> include/hw/virtio/vhost-vdpa.h | 3 +
> include/monitor/hmp.h | 1 +
> include/sysemu/cryptodev.h | 113 ++++---
> backends/cryptodev-builtin.c | 42 ++-
> backends/cryptodev-hmp-cmds.c | 54 ++++
> backends/cryptodev-lkcf.c | 19 +-
> backends/cryptodev-vhost-user.c | 13 +-
> backends/cryptodev-vhost.c | 4 +-
> backends/cryptodev.c | 433 ++++++++++++++++++++++++--
> hw/acpi/acpi-pci-hotplug-stub.c | 9 +-
> hw/acpi/ich9.c | 21 +-
> hw/acpi/pci-bridge.c | 14 +-
> hw/acpi/pcihp.c | 112 ++-----
> hw/acpi/piix4.c | 33 +-
> hw/cxl/cxl-component-utils.c | 20 +-
> hw/cxl/cxl-host.c | 31 +-
> hw/i386/acpi-build.c | 179 ++++++++---
> hw/isa/lpc_ich9.c | 1 +
> hw/mem/cxl_type3.c | 294 +++++++++++++++++
> hw/mem/cxl_type3_stubs.c | 17 +
> hw/pci-bridge/cxl_root_port.c | 64 ++++
> hw/pci-bridge/pci_expander_bridge.c | 44 ++-
> hw/pci/pci.c | 57 ++++
> hw/pci/pcie_aer.c | 14 +-
> hw/pci/pcie_port.c | 46 +++
> hw/s390x/virtio-ccw.c | 1 +
> hw/virtio/vhost-shadow-virtqueue.c | 8 +-
> hw/virtio/vhost-user.c | 4 +-
> hw/virtio/vhost-vdpa.c | 130 +++++---
> hw/virtio/vhost.c | 3 +
> hw/virtio/virtio-crypto.c | 48 ++-
> hw/virtio/virtio-mmio.c | 5 +-
> hw/virtio/virtio-pci.c | 1 +
> hw/virtio/virtio.c | 11 +-
> net/vhost-vdpa.c | 198 ++++++++++--
> stats/stats-hmp-cmds.c | 5 +
> stats/stats-qmp-cmds.c | 2 +
> tests/qtest/bios-tables-test.c | 125 +++-----
> MAINTAINERS | 2 +
> backends/meson.build | 1 +
> hmp-commands-info.hx | 14 +
> hw/mem/meson.build | 2 +
> hw/virtio/trace-events | 1 +
> qapi/meson.build | 2 +
> tests/data/acpi/pc/DSDT | Bin 6360 -> 6488 bytes
> tests/data/acpi/pc/DSDT.acpierst | Bin 6283 -> 6411 bytes
> tests/data/acpi/pc/DSDT.acpihmat | Bin 7685 -> 7813 bytes
> tests/data/acpi/pc/DSDT.bridge | Bin 12487 -> 12615 bytes
> tests/data/acpi/pc/DSDT.cphp | Bin 6824 -> 6952 bytes
> tests/data/acpi/pc/DSDT.dimmpxm | Bin 8014 -> 8142 bytes
> tests/data/acpi/pc/DSDT.hpbridge | Bin 6289 -> 6451 bytes
> tests/data/acpi/pc/DSDT.hpbrroot | Bin 3081 -> 3343 bytes
> tests/data/acpi/pc/DSDT.ipmikcs | Bin 6432 -> 6560 bytes
> tests/data/acpi/pc/DSDT.memhp | Bin 7719 -> 7847 bytes
> tests/data/acpi/pc/DSDT.nohpet | Bin 6218 -> 6346 bytes
> tests/data/acpi/pc/DSDT.numamem | Bin 6366 -> 6494 bytes
> tests/data/acpi/pc/DSDT.roothp | Bin 9745 -> 9873 bytes
> tests/data/acpi/q35/DSDT | Bin 8252 -> 8361 bytes
> tests/data/acpi/q35/DSDT.acpierst | Bin 8269 -> 8378 bytes
> tests/data/acpi/q35/DSDT.acpihmat | Bin 9577 -> 9686 bytes
> tests/data/acpi/q35/DSDT.acpihmat-noinitiator | Bin 8531 -> 8640 bytes
> tests/data/acpi/q35/DSDT.applesmc | Bin 8298 -> 8407 bytes
> tests/data/acpi/q35/DSDT.bridge | Bin 11481 -> 11590 bytes
> tests/data/acpi/q35/DSDT.core-count2 | Bin 32392 -> 32501 bytes
> tests/data/acpi/q35/DSDT.cphp | Bin 8716 -> 8825 bytes
> tests/data/acpi/q35/DSDT.cxl | Bin 9564 -> 9673 bytes
> tests/data/acpi/q35/DSDT.dimmpxm | Bin 9906 -> 10015 bytes
> tests/data/acpi/q35/DSDT.ipmibt | Bin 8327 -> 8436 bytes
> tests/data/acpi/q35/DSDT.ipmismbus | Bin 8340 -> 8449 bytes
> tests/data/acpi/q35/DSDT.ivrs | Bin 8269 -> 8378 bytes
> tests/data/acpi/q35/DSDT.memhp | Bin 9611 -> 9720 bytes
> tests/data/acpi/q35/DSDT.mmio64 | Bin 9382 -> 9491 bytes
> tests/data/acpi/q35/DSDT.multi-bridge | Bin 12337 -> 12770 bytes
> tests/data/acpi/q35/DSDT.noacpihp | Bin 0 -> 8248 bytes
> tests/data/acpi/q35/DSDT.nohpet | Bin 8110 -> 8219 bytes
> tests/data/acpi/q35/DSDT.numamem | Bin 8258 -> 8367 bytes
> tests/data/acpi/q35/DSDT.pvpanic-isa | Bin 8353 -> 8462 bytes
> tests/data/acpi/q35/DSDT.tis.tpm12 | Bin 8858 -> 8967 bytes
> tests/data/acpi/q35/DSDT.tis.tpm2 | Bin 8884 -> 8993 bytes
> tests/data/acpi/q35/DSDT.viot | Bin 9361 -> 9470 bytes
> tests/data/acpi/q35/DSDT.xapic | Bin 35615 -> 35724 bytes
> 100 files changed, 2043 insertions(+), 475 deletions(-)
> create mode 100644 qapi/cryptodev.json
> create mode 100644 qapi/cxl.json
> create mode 100644 backends/cryptodev-hmp-cmds.c
> create mode 100644 hw/mem/cxl_type3_stubs.c
> create mode 100644 tests/data/acpi/q35/DSDT.noacpihp
>
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PULL 00/73] virtio,pc,pci: features, fixes
2023-03-09 14:47 ` [PULL 00/73] virtio,pc,pci: features, fixes Michael S. Tsirkin
@ 2023-03-10 17:32 ` Peter Maydell
2023-03-10 22:20 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 99+ messages in thread
From: Peter Maydell @ 2023-03-10 17:32 UTC (permalink / raw)
To: Michael S. Tsirkin; +Cc: qemu-devel
On Thu, 9 Mar 2023 at 14:47, Michael S. Tsirkin <mst@redhat.com> wrote:
>
> On Tue, Mar 07, 2023 at 08:10:51PM -0500, Michael S. Tsirkin wrote:
> > The following changes since commit 9832009d9dd2386664c15cc70f6e6bfe062be8bd:
> >
> > Merge tag 'pull-riscv-to-apply-20230306' of https://gitlab.com/palmer-dabbelt/qemu into staging (2023-03-07 12:53:00 +0000)
> >
> > are available in the Git repository at:
> >
> > https://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
> >
> > for you to fetch changes up to 52062b213c13bd7fff966d36b554c04609c925d6:
> >
> > virtio: refresh vring region cache after updating a virtqueue size (2023-03-07 19:51:07 -0500)
>
>
> I moved it one commit back, now at (96cb085897)
> Cornelia posted some concerns about the last commit.
>
> > ----------------------------------------------------------------
> > virtio,pc,pci: features, fixes
> >
> > Several features that landed at the last possible moment:
> >
> > Passthrough HDM decoder emulation
> > Refactor cryptodev
> > RAS error emulation and injection
> > acpi-index support on non-hotpluggable slots
> > Dynamically switch to vhost shadow virtqueues at vdpa net migration
> >
> > Plus a couple of bugfixes that look important to have in the release.
> >
> > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> >
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.0
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 99+ messages in thread
* Re: [PULL 00/73] virtio,pc,pci: features, fixes
2023-03-10 17:32 ` Peter Maydell
@ 2023-03-10 22:20 ` Philippe Mathieu-Daudé
2023-03-11 19:22 ` Michael S. Tsirkin
0 siblings, 1 reply; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-03-10 22:20 UTC (permalink / raw)
To: Michael S. Tsirkin, Igor Mammedov; +Cc: qemu-devel, Peter Maydell
Hi,
On 10/3/23 18:32, Peter Maydell wrote:
> On Thu, 9 Mar 2023 at 14:47, Michael S. Tsirkin <mst@redhat.com> wrote:
>> I moved it one commit back, now at (96cb085897)
>> Cornelia posted some concerns about the last commit.
>>
>>> ----------------------------------------------------------------
>>> virtio,pc,pci: features, fixes
>>>
>>> Several features that landed at the last possible moment:
>>>
>>> Passthrough HDM decoder emulation
>>> Refactor cryptodev
>>> RAS error emulation and injection
>>> acpi-index support on non-hotpluggable slots
>>> Dynamically switch to vhost shadow virtqueues at vdpa net migration
>>>
>>> Plus a couple of bugfixes that look important to have in the release.
>>>
>>> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
>>>
>
>
> Applied, thanks.
I'm getting this failure on Darwin (m1):
C compiler for the host machine: clang (clang 14.0.0 "Apple clang
version 14.0.0 (clang-1400.0.29.202)")
Program iasl found: YES (/opt/homebrew/bin/iasl)
$ make check-qtest-i386 V=1
...
3/61 qemu:qtest+qtest-i386 / qtest-i386/bios-tables-test
ERROR 17.52s killed by signal 6 SIGABRT
―――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――
✀
――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――
stderr:
acpi-test: Warning! DSDT binary file mismatch. Actual
[aml:/var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/aml-HANQ11],
Expected [aml:tests/data/acpi/pc/DSDT.nosmm].
See source file tests/qtest/bios-tables-test.c for instructions on how
to update expected files.
acpi-test: Warning! DSDT mismatch. Actual
[asl:/var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/asl-1CNQ11.dsl,
aml:/var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/aml-HANQ11],
Expected
[asl:/var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/asl-XXGQ11.dsl,
aml:tests/data/acpi/pc/DSDT.nosmm].
--- /var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/asl-XXGQ11.dsl
2023-03-10 23:16:19
+++ /var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/asl-1CNQ11.dsl
2023-03-10 23:16:19
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20221020 (64-bit version)
* Copyright (c) 2000 - 2022 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/pc/DSDT.nosmm, Fri Mar 10 23:16:19 2023
+ * Disassembly of
/var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/aml-HANQ11, Fri Mar 10
23:16:19 2023
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x000018D8 (6360)
+ * Length 0x00001958 (6488)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math
support
- * Checksum 0xCE
+ * Checksum 0xAF
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -38,32 +38,66 @@
{
DBGB = DerefOf (Local0 [Local2])
Local2++
}
DBGB = 0x0A
}
}
Scope (_SB)
{
Device (PCI0)
{
Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID:
Hardware ID
Name (_ADR, Zero) // _ADR: Address
Name (_UID, Zero) // _UID: Unique ID
+ Method (EDSM, 5, Serialized)
+ {
+ If ((Arg2 == Zero))
+ {
+ Local0 = Buffer (One)
+ {
+ 0x00
// .
+ }
+ If ((Arg0 != ToUUID
("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
+ {
+ Return (Local0)
+ }
+
+ If ((Arg1 < 0x02))
+ {
+ Return (Local0)
+ }
+
+ Local0 [Zero] = 0x81
+ Return (Local0)
+ }
+
+ If ((Arg2 == 0x07))
+ {
+ Local0 = Package (0x02)
+ {
+ Zero,
+ ""
+ }
+ Local1 = DerefOf (Arg4 [Zero])
+ Local0 [Zero] = Local1
+ Return (Local0)
+ }
+ }
}
}
Scope (_SB.PCI0)
{
OperationRegion (PCST, SystemIO, 0xAE00, 0x08)
Field (PCST, DWordAcc, NoLock, WriteAsZeros)
{
PCIU, 32,
PCID, 32
}
OperationRegion (SEJ, SystemIO, 0xAE08, 0x04)
Field (SEJ, DWordAcc, NoLock, WriteAsZeros)
{
B0EJ, 32
@@ -91,43 +125,43 @@
Acquire (BLCK, 0xFFFF)
BNUM = Arg0
PIDX = (One << Arg1)
Local0 = PIDX /* \_SB_.PCI0.PIDX */
Release (BLCK)
Return (Local0)
}
Method (PDSM, 5, Serialized)
{
If ((Arg2 == Zero))
{
Local0 = Buffer (One)
{
0x00
// .
}
- Local1 = Zero
If ((Arg0 != ToUUID
("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
{
Return (Local0)
}
If ((Arg1 < 0x02))
{
Return (Local0)
}
+ Local1 = Zero
Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One]
))
If (!((Local2 == Zero) | (Local2 == 0xFFFFFFFF)))
{
Local1 |= One
Local1 |= (One << 0x07)
}
Local0 [Zero] = Local1
Return (Local0)
}
If ((Arg2 == 0x07))
{
Local0 = Package (0x02)
{
@@ -915,32 +949,42 @@
Device (RTC)
{
Name (_HID, EisaId ("PNP0B00") /* AT Real-Time
Clock */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current
Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{8}
})
}
+ }
+
+ Device (S09)
+ {
+ Name (_ADR, 0x00010001) // _ADR: Address
+ }
+
+ Device (S0B)
+ {
+ Name (_ADR, 0x00010003) // _ADR: Address
}
Device (S10)
{
Name (_ADR, 0x00020000) // _ADR: Address
Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State
{
Return (Zero)
}
Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
{
Return (Zero)
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
**
ERROR:../../tests/qtest/bios-tables-test.c:536:test_acpi_asl: assertion
failed: (all_tables_match)
(test program exited with status code -6)
FYI:
$ iasl -v
Intel ACPI Component Architecture
ASL+ Optimizing Compiler/Disassembler version 20221020
Copyright (c) 2000 - 2022 Intel Corporation
Regards,
Phil.
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PULL 00/73] virtio,pc,pci: features, fixes
2023-03-10 22:20 ` Philippe Mathieu-Daudé
@ 2023-03-11 19:22 ` Michael S. Tsirkin
2023-03-13 8:03 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 99+ messages in thread
From: Michael S. Tsirkin @ 2023-03-11 19:22 UTC (permalink / raw)
To: Philippe Mathieu-Daudé; +Cc: Igor Mammedov, qemu-devel, Peter Maydell
On Fri, Mar 10, 2023 at 11:20:36PM +0100, Philippe Mathieu-Daudé wrote:
> Hi,
>
> On 10/3/23 18:32, Peter Maydell wrote:
> > On Thu, 9 Mar 2023 at 14:47, Michael S. Tsirkin <mst@redhat.com> wrote:
>
> > > I moved it one commit back, now at (96cb085897)
> > > Cornelia posted some concerns about the last commit.
> > >
> > > > ----------------------------------------------------------------
> > > > virtio,pc,pci: features, fixes
> > > >
> > > > Several features that landed at the last possible moment:
> > > >
> > > > Passthrough HDM decoder emulation
> > > > Refactor cryptodev
> > > > RAS error emulation and injection
> > > > acpi-index support on non-hotpluggable slots
> > > > Dynamically switch to vhost shadow virtqueues at vdpa net migration
> > > >
> > > > Plus a couple of bugfixes that look important to have in the release.
> > > >
> > > > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> > > >
> >
> >
> > Applied, thanks.
>
> I'm getting this failure on Darwin (m1):
>
> C compiler for the host machine: clang (clang 14.0.0 "Apple clang version
> 14.0.0 (clang-1400.0.29.202)")
> Program iasl found: YES (/opt/homebrew/bin/iasl)
>
> $ make check-qtest-i386 V=1
> ...
> 3/61 qemu:qtest+qtest-i386 / qtest-i386/bios-tables-test ERROR
> 17.52s killed by signal 6 SIGABRT
> ―――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――
> ✀ ――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――
> stderr:
> acpi-test: Warning! DSDT binary file mismatch. Actual
> [aml:/var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/aml-HANQ11], Expected
> [aml:tests/data/acpi/pc/DSDT.nosmm].
Philippe, is tests/data/acpi/DSDT.nosmm in your tree for some reason?
Because it's not in mine:
$ git log -- tests/data/acpi/DSDT.nosmm
It's a side effect of how our tests work ATM that a presence of
a corrupted file in the source directory will confuse the test
and make it fail, and git reset will not be enough since some
of these can be untracked - you need git clean.
> See source file tests/qtest/bios-tables-test.c for instructions on how to
> update expected files.
> acpi-test: Warning! DSDT mismatch. Actual
> [asl:/var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/asl-1CNQ11.dsl,
> aml:/var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/aml-HANQ11], Expected
> [asl:/var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/asl-XXGQ11.dsl,
> aml:tests/data/acpi/pc/DSDT.nosmm].
> --- /var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/asl-XXGQ11.dsl
> 2023-03-10 23:16:19
> +++ /var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/asl-1CNQ11.dsl
> 2023-03-10 23:16:19
> @@ -1,30 +1,30 @@
> /*
> * Intel ACPI Component Architecture
> * AML/ASL+ Disassembler version 20221020 (64-bit version)
> * Copyright (c) 2000 - 2022 Intel Corporation
> *
> * Disassembling to symbolic ASL+ operators
> *
> - * Disassembly of tests/data/acpi/pc/DSDT.nosmm, Fri Mar 10 23:16:19 2023
> + * Disassembly of
> /var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/aml-HANQ11, Fri Mar 10
> 23:16:19 2023
> *
> * Original Table Header:
> * Signature "DSDT"
> - * Length 0x000018D8 (6360)
> + * Length 0x00001958 (6488)
> * Revision 0x01 **** 32-bit table (V1), no 64-bit math support
> - * Checksum 0xCE
> + * Checksum 0xAF
> * OEM ID "BOCHS "
> * OEM Table ID "BXPC "
> * OEM Revision 0x00000001 (1)
> * Compiler ID "BXPC"
> * Compiler Version 0x00000001 (1)
> */
> DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
> {
> Scope (\)
> {
> OperationRegion (DBG, SystemIO, 0x0402, One)
> Field (DBG, ByteAcc, NoLock, Preserve)
> {
> DBGB, 8
> }
>
> @@ -38,32 +38,66 @@
> {
> DBGB = DerefOf (Local0 [Local2])
> Local2++
> }
>
> DBGB = 0x0A
> }
> }
>
> Scope (_SB)
> {
> Device (PCI0)
> {
> Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID:
> Hardware ID
> Name (_ADR, Zero) // _ADR: Address
> Name (_UID, Zero) // _UID: Unique ID
> + Method (EDSM, 5, Serialized)
> + {
> + If ((Arg2 == Zero))
> + {
> + Local0 = Buffer (One)
> + {
> + 0x00 // .
> + }
> + If ((Arg0 != ToUUID
> ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
> + {
> + Return (Local0)
> + }
> +
> + If ((Arg1 < 0x02))
> + {
> + Return (Local0)
> + }
> +
> + Local0 [Zero] = 0x81
> + Return (Local0)
> + }
> +
> + If ((Arg2 == 0x07))
> + {
> + Local0 = Package (0x02)
> + {
> + Zero,
> + ""
> + }
> + Local1 = DerefOf (Arg4 [Zero])
> + Local0 [Zero] = Local1
> + Return (Local0)
> + }
> + }
> }
> }
>
> Scope (_SB.PCI0)
> {
> OperationRegion (PCST, SystemIO, 0xAE00, 0x08)
> Field (PCST, DWordAcc, NoLock, WriteAsZeros)
> {
> PCIU, 32,
> PCID, 32
> }
>
> OperationRegion (SEJ, SystemIO, 0xAE08, 0x04)
> Field (SEJ, DWordAcc, NoLock, WriteAsZeros)
> {
> B0EJ, 32
> @@ -91,43 +125,43 @@
> Acquire (BLCK, 0xFFFF)
> BNUM = Arg0
> PIDX = (One << Arg1)
> Local0 = PIDX /* \_SB_.PCI0.PIDX */
> Release (BLCK)
> Return (Local0)
> }
>
> Method (PDSM, 5, Serialized)
> {
> If ((Arg2 == Zero))
> {
> Local0 = Buffer (One)
> {
> 0x00 // .
> }
> - Local1 = Zero
> If ((Arg0 != ToUUID
> ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
> {
> Return (Local0)
> }
>
> If ((Arg1 < 0x02))
> {
> Return (Local0)
> }
>
> + Local1 = Zero
> Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One]
> ))
> If (!((Local2 == Zero) | (Local2 == 0xFFFFFFFF)))
> {
> Local1 |= One
> Local1 |= (One << 0x07)
> }
>
> Local0 [Zero] = Local1
> Return (Local0)
> }
>
> If ((Arg2 == 0x07))
> {
> Local0 = Package (0x02)
> {
> @@ -915,32 +949,42 @@
>
> Device (RTC)
> {
> Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock
> */) // _HID: Hardware ID
> Name (_CRS, ResourceTemplate () // _CRS: Current
> Resource Settings
> {
> IO (Decode16,
> 0x0070, // Range Minimum
> 0x0070, // Range Maximum
> 0x01, // Alignment
> 0x08, // Length
> )
> IRQNoFlags ()
> {8}
> })
> }
> + }
> +
> + Device (S09)
> + {
> + Name (_ADR, 0x00010001) // _ADR: Address
> + }
> +
> + Device (S0B)
> + {
> + Name (_ADR, 0x00010003) // _ADR: Address
> }
>
> Device (S10)
> {
> Name (_ADR, 0x00020000) // _ADR: Address
> Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State
> {
> Return (Zero)
> }
>
> Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
> {
> Return (Zero)
> }
>
> Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
> **
> ERROR:../../tests/qtest/bios-tables-test.c:536:test_acpi_asl: assertion
> failed: (all_tables_match)
>
> (test program exited with status code -6)
>
> FYI:
>
> $ iasl -v
>
> Intel ACPI Component Architecture
> ASL+ Optimizing Compiler/Disassembler version 20221020
> Copyright (c) 2000 - 2022 Intel Corporation
>
> Regards,
>
> Phil.
>
^ permalink raw reply [flat|nested] 99+ messages in thread* Re: [PULL 00/73] virtio,pc,pci: features, fixes
2023-03-11 19:22 ` Michael S. Tsirkin
@ 2023-03-13 8:03 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 99+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-03-13 8:03 UTC (permalink / raw)
To: Michael S. Tsirkin; +Cc: Igor Mammedov, qemu-devel, Peter Maydell
On 11/3/23 20:22, Michael S. Tsirkin wrote:
> On Fri, Mar 10, 2023 at 11:20:36PM +0100, Philippe Mathieu-Daudé wrote:
>> Hi,
>>
>> On 10/3/23 18:32, Peter Maydell wrote:
>>> On Thu, 9 Mar 2023 at 14:47, Michael S. Tsirkin <mst@redhat.com> wrote:
>>
>>>> I moved it one commit back, now at (96cb085897)
>>>> Cornelia posted some concerns about the last commit.
>>>>
>>>>> ----------------------------------------------------------------
>>>>> virtio,pc,pci: features, fixes
>>>>>
>>>>> Several features that landed at the last possible moment:
>>>>>
>>>>> Passthrough HDM decoder emulation
>>>>> Refactor cryptodev
>>>>> RAS error emulation and injection
>>>>> acpi-index support on non-hotpluggable slots
>>>>> Dynamically switch to vhost shadow virtqueues at vdpa net migration
>>>>>
>>>>> Plus a couple of bugfixes that look important to have in the release.
>>>>>
>>>>> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
>>>>>
>>>
>>>
>>> Applied, thanks.
>>
>> I'm getting this failure on Darwin (m1):
>>
>> C compiler for the host machine: clang (clang 14.0.0 "Apple clang version
>> 14.0.0 (clang-1400.0.29.202)")
>> Program iasl found: YES (/opt/homebrew/bin/iasl)
>>
>> $ make check-qtest-i386 V=1
>> ...
>> 3/61 qemu:qtest+qtest-i386 / qtest-i386/bios-tables-test ERROR
>> 17.52s killed by signal 6 SIGABRT
>> ―――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――
>> ✀ ――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――
>> stderr:
>> acpi-test: Warning! DSDT binary file mismatch. Actual
>> [aml:/var/folders/yj/r7khncsj4d77k04ybz9lw4tm0000gn/T/aml-HANQ11], Expected
>> [aml:tests/data/acpi/pc/DSDT.nosmm].
>
> Philippe, is tests/data/acpi/DSDT.nosmm in your tree for some reason?
> Because it's not in mine:
> $ git log -- tests/data/acpi/DSDT.nosmm
>
>
> It's a side effect of how our tests work ATM that a presence of
> a corrupted file in the source directory will confuse the test
> and make it fail, and git reset will not be enough since some
> of these can be untracked - you need git clean.
Indeed 'git status' shows:
tests/data/acpi/microvm/APIC.rtc
tests/data/acpi/microvm/APIC.usb
tests/data/acpi/microvm/FACP.ioapic2
tests/data/acpi/microvm/FACP.pcie
tests/data/acpi/microvm/FACP.rtc
tests/data/acpi/microvm/FACP.usb
tests/data/acpi/pc/APIC.acpierst
tests/data/acpi/pc/APIC.bridge
tests/data/acpi/pc/APIC.hpbridge
tests/data/acpi/pc/APIC.hpbrroot
tests/data/acpi/pc/APIC.ipmikcs
tests/data/acpi/pc/APIC.memhp
tests/data/acpi/pc/APIC.nohpet
tests/data/acpi/pc/APIC.nosmm
tests/data/acpi/pc/APIC.numamem
tests/data/acpi/pc/APIC.roothp
tests/data/acpi/pc/APIC.smm-compat
tests/data/acpi/pc/APIC.smm-compat-nosmm
tests/data/acpi/pc/DSDT.nosmm
tests/data/acpi/pc/DSDT.smm-compat
tests/data/acpi/pc/DSDT.smm-compat-nosmm
tests/data/acpi/pc/FACP.acpierst
tests/data/acpi/pc/FACP.acpihmat
tests/data/acpi/pc/FACP.bridge
tests/data/acpi/pc/FACP.cphp
tests/data/acpi/pc/FACP.dimmpxm
tests/data/acpi/pc/FACP.hpbridge
tests/data/acpi/pc/FACP.hpbrroot
tests/data/acpi/pc/FACP.ipmikcs
tests/data/acpi/pc/FACP.memhp
tests/data/acpi/pc/FACP.nohpet
tests/data/acpi/pc/FACP.numamem
tests/data/acpi/pc/FACP.roothp
tests/data/acpi/pc/FACP.smm-compat
tests/data/acpi/pc/FACP.smm-compat-nosmm
tests/data/acpi/pc/FACS.acpierst
tests/data/acpi/pc/FACS.acpihmat
tests/data/acpi/pc/FACS.bridge
tests/data/acpi/pc/FACS.cphp
tests/data/acpi/pc/FACS.dimmpxm
tests/data/acpi/pc/FACS.hpbridge
tests/data/acpi/pc/FACS.hpbrroot
tests/data/acpi/pc/FACS.ipmikcs
tests/data/acpi/pc/FACS.memhp
tests/data/acpi/pc/FACS.nohpet
tests/data/acpi/pc/FACS.nosmm
tests/data/acpi/pc/FACS.numamem
tests/data/acpi/pc/FACS.roothp
tests/data/acpi/pc/FACS.smm-compat
tests/data/acpi/pc/FACS.smm-compat-nosmm
tests/data/acpi/pc/HPET.acpierst
tests/data/acpi/pc/HPET.acpihmat
tests/data/acpi/pc/HPET.bridge
tests/data/acpi/pc/HPET.cphp
tests/data/acpi/pc/HPET.dimmpxm
tests/data/acpi/pc/HPET.hpbridge
tests/data/acpi/pc/HPET.hpbrroot
tests/data/acpi/pc/HPET.ipmikcs
tests/data/acpi/pc/HPET.memhp
tests/data/acpi/pc/HPET.nosmm
tests/data/acpi/pc/HPET.numamem
tests/data/acpi/pc/HPET.roothp
tests/data/acpi/pc/HPET.smm-compat
tests/data/acpi/pc/HPET.smm-compat-nosmm
tests/data/acpi/pc/WAET.acpierst
tests/data/acpi/pc/WAET.acpihmat
tests/data/acpi/pc/WAET.bridge
tests/data/acpi/pc/WAET.cphp
tests/data/acpi/pc/WAET.dimmpxm
tests/data/acpi/pc/WAET.hpbridge
tests/data/acpi/pc/WAET.hpbrroot
tests/data/acpi/pc/WAET.ipmikcs
tests/data/acpi/pc/WAET.memhp
tests/data/acpi/pc/WAET.nohpet
tests/data/acpi/pc/WAET.nosmm
tests/data/acpi/pc/WAET.numamem
tests/data/acpi/pc/WAET.roothp
tests/data/acpi/pc/WAET.smm-compat
tests/data/acpi/pc/WAET.smm-compat-nosmm
tests/data/acpi/q35/APIC.acpierst
tests/data/acpi/q35/APIC.applesmc
tests/data/acpi/q35/APIC.bridge
tests/data/acpi/q35/APIC.cxl
tests/data/acpi/q35/APIC.ipmibt
tests/data/acpi/q35/APIC.ipmismbus
tests/data/acpi/q35/APIC.ivrs
tests/data/acpi/q35/APIC.memhp
tests/data/acpi/q35/APIC.mmio64
tests/data/acpi/q35/APIC.multi-bridge
tests/data/acpi/q35/APIC.noacpihp
tests/data/acpi/q35/APIC.nohpet
tests/data/acpi/q35/APIC.nosmm
tests/data/acpi/q35/APIC.numamem
tests/data/acpi/q35/APIC.pvpanic-isa
tests/data/acpi/q35/APIC.slic
tests/data/acpi/q35/APIC.smm-compat
tests/data/acpi/q35/APIC.smm-compat-nosmm
tests/data/acpi/q35/APIC.tis.tpm12
tests/data/acpi/q35/APIC.tis.tpm2
tests/data/acpi/q35/APIC.viot
tests/data/acpi/q35/DSDT.dsl
tests/data/acpi/q35/DSDT.nosmm
tests/data/acpi/q35/DSDT.slic
tests/data/acpi/q35/DSDT.smm-compat
tests/data/acpi/q35/DSDT.smm-compat-nosmm
tests/data/acpi/q35/FACP.acpierst
tests/data/acpi/q35/FACP.acpihmat
tests/data/acpi/q35/FACP.acpihmat-noinitiator
tests/data/acpi/q35/FACP.applesmc
tests/data/acpi/q35/FACP.bridge
tests/data/acpi/q35/FACP.cphp
tests/data/acpi/q35/FACP.cxl
tests/data/acpi/q35/FACP.dimmpxm
tests/data/acpi/q35/FACP.ipmibt
tests/data/acpi/q35/FACP.ipmismbus
tests/data/acpi/q35/FACP.ivrs
tests/data/acpi/q35/FACP.memhp
tests/data/acpi/q35/FACP.mmio64
tests/data/acpi/q35/FACP.multi-bridge
tests/data/acpi/q35/FACP.noacpihp
tests/data/acpi/q35/FACP.nohpet
tests/data/acpi/q35/FACP.numamem
tests/data/acpi/q35/FACP.pvpanic-isa
tests/data/acpi/q35/FACP.smm-compat
tests/data/acpi/q35/FACP.smm-compat-nosmm
tests/data/acpi/q35/FACP.tis.tpm12
tests/data/acpi/q35/FACP.tis.tpm2
tests/data/acpi/q35/FACP.viot
tests/data/acpi/q35/FACS.acpierst
tests/data/acpi/q35/FACS.acpihmat
tests/data/acpi/q35/FACS.acpihmat-noinitiator
tests/data/acpi/q35/FACS.applesmc
tests/data/acpi/q35/FACS.bridge
tests/data/acpi/q35/FACS.cphp
tests/data/acpi/q35/FACS.cxl
tests/data/acpi/q35/FACS.dimmpxm
tests/data/acpi/q35/FACS.ipmibt
tests/data/acpi/q35/FACS.ipmismbus
tests/data/acpi/q35/FACS.ivrs
tests/data/acpi/q35/FACS.memhp
tests/data/acpi/q35/FACS.mmio64
tests/data/acpi/q35/FACS.multi-bridge
tests/data/acpi/q35/FACS.noacpihp
tests/data/acpi/q35/FACS.nohpet
tests/data/acpi/q35/FACS.nosmm
tests/data/acpi/q35/FACS.numamem
tests/data/acpi/q35/FACS.pvpanic-isa
tests/data/acpi/q35/FACS.slic
tests/data/acpi/q35/FACS.smm-compat
tests/data/acpi/q35/FACS.smm-compat-nosmm
tests/data/acpi/q35/FACS.tis.tpm12
tests/data/acpi/q35/FACS.tis.tpm2
tests/data/acpi/q35/FACS.viot
tests/data/acpi/q35/HPET.acpierst
tests/data/acpi/q35/HPET.acpihmat
tests/data/acpi/q35/HPET.acpihmat-noinitiator
tests/data/acpi/q35/HPET.applesmc
tests/data/acpi/q35/HPET.bridge
tests/data/acpi/q35/HPET.cphp
tests/data/acpi/q35/HPET.cxl
tests/data/acpi/q35/HPET.dimmpxm
tests/data/acpi/q35/HPET.ipmibt
tests/data/acpi/q35/HPET.ipmismbus
tests/data/acpi/q35/HPET.ivrs
tests/data/acpi/q35/HPET.memhp
tests/data/acpi/q35/HPET.mmio64
tests/data/acpi/q35/HPET.multi-bridge
tests/data/acpi/q35/HPET.noacpihp
tests/data/acpi/q35/HPET.nosmm
tests/data/acpi/q35/HPET.numamem
tests/data/acpi/q35/HPET.pvpanic-isa
tests/data/acpi/q35/HPET.slic
tests/data/acpi/q35/HPET.smm-compat
tests/data/acpi/q35/HPET.smm-compat-nosmm
tests/data/acpi/q35/HPET.tis.tpm12
tests/data/acpi/q35/HPET.tis.tpm2
tests/data/acpi/q35/HPET.viot
tests/data/acpi/q35/MCFG.acpierst
tests/data/acpi/q35/MCFG.acpihmat
tests/data/acpi/q35/MCFG.acpihmat-noinitiator
tests/data/acpi/q35/MCFG.applesmc
tests/data/acpi/q35/MCFG.bridge
tests/data/acpi/q35/MCFG.cphp
tests/data/acpi/q35/MCFG.cxl
tests/data/acpi/q35/MCFG.dimmpxm
tests/data/acpi/q35/MCFG.ipmibt
tests/data/acpi/q35/MCFG.ipmismbus
tests/data/acpi/q35/MCFG.ivrs
tests/data/acpi/q35/MCFG.memhp
tests/data/acpi/q35/MCFG.mmio64
tests/data/acpi/q35/MCFG.multi-bridge
tests/data/acpi/q35/MCFG.noacpihp
tests/data/acpi/q35/MCFG.nohpet
tests/data/acpi/q35/MCFG.nosmm
tests/data/acpi/q35/MCFG.numamem
tests/data/acpi/q35/MCFG.pvpanic-isa
tests/data/acpi/q35/MCFG.slic
tests/data/acpi/q35/MCFG.smm-compat
tests/data/acpi/q35/MCFG.smm-compat-nosmm
tests/data/acpi/q35/MCFG.tis.tpm12
tests/data/acpi/q35/MCFG.tis.tpm2
tests/data/acpi/q35/MCFG.viot
tests/data/acpi/q35/WAET.acpierst
tests/data/acpi/q35/WAET.acpihmat
tests/data/acpi/q35/WAET.acpihmat-noinitiator
tests/data/acpi/q35/WAET.applesmc
tests/data/acpi/q35/WAET.bridge
tests/data/acpi/q35/WAET.cphp
tests/data/acpi/q35/WAET.cxl
tests/data/acpi/q35/WAET.dimmpxm
tests/data/acpi/q35/WAET.ipmibt
tests/data/acpi/q35/WAET.ipmismbus
tests/data/acpi/q35/WAET.ivrs
tests/data/acpi/q35/WAET.memhp
tests/data/acpi/q35/WAET.mmio64
tests/data/acpi/q35/WAET.multi-bridge
tests/data/acpi/q35/WAET.noacpihp
tests/data/acpi/q35/WAET.nohpet
tests/data/acpi/q35/WAET.nosmm
tests/data/acpi/q35/WAET.numamem
tests/data/acpi/q35/WAET.pvpanic-isa
tests/data/acpi/q35/WAET.slic
tests/data/acpi/q35/WAET.smm-compat
tests/data/acpi/q35/WAET.smm-compat-nosmm
tests/data/acpi/q35/WAET.tis.tpm12
tests/data/acpi/q35/WAET.tis.tpm2
tests/data/acpi/q35/WAET.viot
tests/data/acpi/virt/APIC.memhp
tests/data/acpi/virt/APIC.numamem
tests/data/acpi/virt/APIC.pxb
tests/data/acpi/virt/DBG2.acpihmatvirt
tests/data/acpi/virt/DBG2.memhp
tests/data/acpi/virt/DBG2.numamem
tests/data/acpi/virt/DBG2.pxb
tests/data/acpi/virt/DBG2.topology
tests/data/acpi/virt/DSDT.numamem
tests/data/acpi/virt/FACP.acpihmatvirt
tests/data/acpi/virt/FACP.memhp
tests/data/acpi/virt/FACP.numamem
tests/data/acpi/virt/FACP.pxb
tests/data/acpi/virt/FACP.topology
tests/data/acpi/virt/GTDT.acpihmatvirt
tests/data/acpi/virt/GTDT.memhp
tests/data/acpi/virt/GTDT.numamem
tests/data/acpi/virt/GTDT.pxb
tests/data/acpi/virt/GTDT.topology
tests/data/acpi/virt/IORT.acpihmatvirt
tests/data/acpi/virt/IORT.memhp
tests/data/acpi/virt/IORT.numamem
tests/data/acpi/virt/IORT.pxb
tests/data/acpi/virt/IORT.topology
tests/data/acpi/virt/MCFG.acpihmatvirt
tests/data/acpi/virt/MCFG.memhp
tests/data/acpi/virt/MCFG.numamem
tests/data/acpi/virt/MCFG.pxb
tests/data/acpi/virt/MCFG.topology
tests/data/acpi/virt/PPTT.memhp
tests/data/acpi/virt/PPTT.numamem
tests/data/acpi/virt/PPTT.pxb
tests/data/acpi/virt/SPCR.acpihmatvirt
tests/data/acpi/virt/SPCR.memhp
tests/data/acpi/virt/SPCR.numamem
tests/data/acpi/virt/SPCR.pxb
tests/data/acpi/virt/SPCR.topology
Tests pass after removing all of them. I forgot to check their
timestamp before removing, so I don't know how/when they appeared
in my source directory...
^ permalink raw reply [flat|nested] 99+ messages in thread