[PATCH 0/2] arm: mach-k3: j721s2: Add main_uart5 device and clock data

[PATCH 0/2] arm: mach-k3: j721s2: Add main_uart5 device and clock data

[Bhavya Kapoor]

Add device data and clock data for main_uart5 for J721S2 SoC so that
main_uart5 will be powered on and its clock will be set up while
booting the J721S2 SoC.

Bhavya Kapoor (2):
  arm: mach-k3: j721s2: dev-data.c: Add main_uart5 device  data
  arm: mach-k3: j721s2: clk-data.c: Add main_uart5 clock  data

 arch/arm/mach-k3/j721s2/clk-data.c | 7 +++++--
 arch/arm/mach-k3/j721s2/dev-data.c | 3 ++-
 2 files changed, 7 insertions(+), 3 deletions(-)

-- 
2.34.1

[PATCH 1/2] arm: mach-k3: j721s2: dev-data.c: Add main_uart5 device data

[Bhavya Kapoor]

Add device data for main_uart5 in dev-data.c for J721S2. Now,
main_uart5 will be powered on while booting the J721S2 SoC.

Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
---
 arch/arm/mach-k3/j721s2/dev-data.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-k3/j721s2/dev-data.c b/arch/arm/mach-k3/j721s2/dev-data.c
index e36f1edb78..35e8b17eb1 100644
--- a/arch/arm/mach-k3/j721s2/dev-data.c
+++ b/arch/arm/mach-k3/j721s2/dev-data.c
@@ -67,6 +67,7 @@ static struct ti_dev soc_dev_list[] = {
 	PSC_DEV(99, &soc_lpsc_list[12]),
 	PSC_DEV(98, &soc_lpsc_list[13]),
 	PSC_DEV(146, &soc_lpsc_list[14]),
+	PSC_DEV(354, &soc_lpsc_list[15]),
 	PSC_DEV(357, &soc_lpsc_list[15]),
 	PSC_DEV(4, &soc_lpsc_list[16]),
 	PSC_DEV(202, &soc_lpsc_list[17]),
@@ -81,5 +82,5 @@ const struct ti_k3_pd_platdata j721s2_pd_platdata = {
 	.num_psc = 2,
 	.num_pd = 6,
 	.num_lpsc = 19,
-	.num_devs = 24,
+	.num_devs = 25,
 };
-- 
2.34.1

[PATCH 2/2] arm: mach-k3: j721s2: clk-data.c: Add main_uart5 clock data

[Bhavya Kapoor]

Add main_uart5 clocks in clk-data.c for J721S2. Now,
main_uart5 clocks will be set up while booting the J721S2 SoC.

Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
---
 arch/arm/mach-k3/j721s2/clk-data.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-k3/j721s2/clk-data.c b/arch/arm/mach-k3/j721s2/clk-data.c
index ad6bd991b7..0c5c321c1e 100644
--- a/arch/arm/mach-k3/j721s2/clk-data.c
+++ b/arch/arm/mach-k3/j721s2/clk-data.c
@@ -247,6 +247,7 @@ static const struct clk_data clk_list[] = {
 	CLK_MUX("emmcsd1_lb_clksel_out0", emmcsd1_lb_clksel_out0_parents, 2, 0x1080b4, 16, 1, 0),
 	CLK_MUX("mcu_clkout_mux_out0", mcu_clkout_mux_out0_parents, 2, 0x40f08010, 0, 1, 0),
 	CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out0", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081c0, 0, 2, 0, 0, 48000000),
+	CLK_DIV("usart_programmable_clock_divider_out5", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081d4, 0, 2, 0, 0),
 	CLK_DIV("usart_programmable_clock_divider_out8", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081e0, 0, 2, 0, 0),
 	CLK_DIV("hsdiv0_16fft_main_12_hsdivout0_clk", "pllfracf2_ssmod_16fft_main_12_foutvcop_clk", 0x68c080, 0, 7, 0, 0),
 	CLK_DIV("hsdiv0_16fft_main_26_hsdivout0_clk", "pllfracf2_ssmod_16fft_main_26_foutvcop_clk", 0x69a080, 0, 7, 0, 0),
@@ -383,6 +384,8 @@ static const struct dev_clk soc_dev_clk_data[] = {
 	DEV_CLK(223, 3, "gluelogic_hfosc0_clkout"),
 	DEV_CLK(223, 4, "k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk"),
 	DEV_CLK(223, 5, "board_0_wkup_i2c0_scl_out"),
+	DEV_CLK(354, 2, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
+	DEV_CLK(354, 3, "usart_programmable_clock_divider_out5"),
 	DEV_CLK(357, 2, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
 	DEV_CLK(357, 3, "usart_programmable_clock_divider_out8"),
 	DEV_CLK(360, 4, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
@@ -397,7 +400,7 @@ static const struct dev_clk soc_dev_clk_data[] = {
 
 const struct ti_k3_clk_platdata j721s2_clk_platdata = {
 	.clk_list = clk_list,
-	.clk_list_cnt = 104,
+	.clk_list_cnt = 105,
 	.soc_dev_clk_data = soc_dev_clk_data,
-	.soc_dev_clk_data_cnt = 122,
+	.soc_dev_clk_data_cnt = 124,
 };
-- 
2.34.1

Re: [PATCH 2/2] arm: mach-k3: j721s2: clk-data.c: Add main_uart5 clock data

[Bryan Brattlof]

Hi Bhavya!

On May 11, 2023 thus sayeth Bhavya Kapoor:
> Add main_uart5 clocks in clk-data.c for J721S2. Now,
> main_uart5 clocks will be set up while booting the J721S2 SoC.
> 
> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
> ---
>  arch/arm/mach-k3/j721s2/clk-data.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-k3/j721s2/clk-data.c b/arch/arm/mach-k3/j721s2/clk-data.c
> index ad6bd991b7..0c5c321c1e 100644
> --- a/arch/arm/mach-k3/j721s2/clk-data.c
> +++ b/arch/arm/mach-k3/j721s2/clk-data.c
> @@ -247,6 +247,7 @@ static const struct clk_data clk_list[] = {
>  	CLK_MUX("emmcsd1_lb_clksel_out0", emmcsd1_lb_clksel_out0_parents, 2, 0x1080b4, 16, 1, 0),
>  	CLK_MUX("mcu_clkout_mux_out0", mcu_clkout_mux_out0_parents, 2, 0x40f08010, 0, 1, 0),
>  	CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out0", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081c0, 0, 2, 0, 0, 48000000),
> +	CLK_DIV("usart_programmable_clock_divider_out5", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081d4, 0, 2, 0, 0),

Is this being used as an alternate console? idk if it would be 
appropriate to use CLK_DIV_DEFFREQ macro here to setup the uart's 
divider here.

~Bryan

Re: [PATCH 2/2] arm: mach-k3: j721s2: clk-data.c: Add main_uart5 clock data

[Bhavya Kapoor]

On 12/05/23 23:12, Bryan Brattlof wrote:
> Hi Bhavya!
>
> On May 11, 2023 thus sayeth Bhavya Kapoor:
>> Add main_uart5 clocks in clk-data.c for J721S2. Now,
>> main_uart5 clocks will be set up while booting the J721S2 SoC.
>>
>> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
>> ---
>>  arch/arm/mach-k3/j721s2/clk-data.c | 7 +++++--
>>  1 file changed, 5 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/mach-k3/j721s2/clk-data.c b/arch/arm/mach-k3/j721s2/clk-data.c
>> index ad6bd991b7..0c5c321c1e 100644
>> --- a/arch/arm/mach-k3/j721s2/clk-data.c
>> +++ b/arch/arm/mach-k3/j721s2/clk-data.c
>> @@ -247,6 +247,7 @@ static const struct clk_data clk_list[] = {
>>  	CLK_MUX("emmcsd1_lb_clksel_out0", emmcsd1_lb_clksel_out0_parents, 2, 0x1080b4, 16, 1, 0),
>>  	CLK_MUX("mcu_clkout_mux_out0", mcu_clkout_mux_out0_parents, 2, 0x40f08010, 0, 1, 0),
>>  	CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out0", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081c0, 0, 2, 0, 0, 48000000),
>> +	CLK_DIV("usart_programmable_clock_divider_out5", "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081d4, 0, 2, 0, 0),
> Is this being used as an alternate console? idk if it would be 
> appropriate to use CLK_DIV_DEFFREQ macro here to setup the uart's 
> divider here.
>
> ~Bryan

Hi Bryan, yes we will be using this as alternative console.

And CLK-DIV macro is appropriate here and tested and working fine as well

~B-Kapoor

Re: [PATCH 1/2] arm: mach-k3: j721s2: dev-data.c: Add main_uart5 device data

[Tom Rini]

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On Thu, May 11, 2023 at 02:42:51PM +0530, Bhavya Kapoor wrote:

> Add device data for main_uart5 in dev-data.c for J721S2. Now,
> main_uart5 will be powered on while booting the J721S2 SoC.
> 
> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
> Reviewed-by: Bryan Brattlof <bb@ti.com>

Applied to u-boot/next, thanks!

-- 
Tom

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Re: [PATCH 2/2] arm: mach-k3: j721s2: clk-data.c: Add main_uart5 clock data

[Tom Rini]

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On Thu, May 11, 2023 at 02:42:52PM +0530, Bhavya Kapoor wrote:

> Add main_uart5 clocks in clk-data.c for J721S2. Now,
> main_uart5 clocks will be set up while booting the J721S2 SoC.
> 
> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
> Reviewed-by: Bryan Brattlof <bb@ti.com>

Applied to u-boot/next, thanks!

-- 
Tom

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