Re: [PATCH 1/2] dt-bindings: iio: adc: adding MCP3564 ADC

From: Conor Dooley <conor@kernel.org>
To: marius.cristea@microchip.com
Cc: jic23@kernel.org, lars@metafoo.de, robh+dt@kernel.org,
	linux-iio@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: iio: adc: adding MCP3564 ADC
Date: Fri, 19 May 2023 19:29:15 +0100	[thread overview]
Message-ID: <20230519-variably-direction-cfa9a034e844@spud> (raw)
In-Reply-To: <20230519160145.44208-2-marius.cristea@microchip.com>

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Hey Marius,

On Fri, May 19, 2023 at 07:01:44PM +0300, marius.cristea@microchip.com wrote:
> From: Marius Cristea <marius.cristea@microchip.com>
> 
> This is the device tree schema for iio driver for
> Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
> Delta-Sigma ADCs with an SPI interface.

Just one quick process bit, please try to CC all of the maintainers
listed by get_maintainer.pl - you unfortunately managed to miss 2 of the
3 dt-binding maintainers :/ Perhaps you ran get_maintainer.pl using our
vendor tree?

> Signed-off-by: Marius Cristea <marius.cristea@microchip.com>
> ---

> +  vref-supply:
> +    description:
> +      Some devices have a specific reference voltage supplied on a different
> +      pin to the other supplies. Needed to be able to establish channel scaling
> +      unless there is also an internal reference available (e.g. mcp3564r)

Should this be marked as a required property for the non-r devices that
do not have an internal reference?

> +  microchip,hw-device-address:

Hopefully Rob or Jonathan etc can chime in as to whether a common
property exists for this type of thing...

> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0
> +    maximum: 3
> +    description:
> +      The address is set on a per-device basis by fuses in the factory,
> +      configured on request. If not requested, the fuses are set for 0x1.
> +      The device address is part of the device markings to avoid
> +      potential confusion. This address is coded on two bits, so four possible
> +      addresses are available when multiple devices are present on the same
> +      SPI bus with only one Chip Select line for all devices.

..although if it doesn't, it'd be good, I think, to add here where the
property crops up in spi transfers. And if not in the description, in
the commit message instead?

Thanks,
Conor.

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