* [PATCH RFC 0/2] Clock fixes for qcom-snps-femto-v2 PHY driver @ 2023-05-29 18:56 ` Adrien Thierry 0 siblings, 0 replies; 20+ messages in thread From: Adrien Thierry @ 2023-05-29 18:56 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Kishon Vijay Abraham I, Konrad Dybcio, Vinod Koul Cc: Adrien Thierry, linux-arm-msm, linux-phy This series attempts to fix a few weird clock usages in the qcom-snps-femto-v2 PHY driver: - ref_clk is never properly enabled - cfg_ahb_clk is never assigned Adrien Thierry (2): phy: qcom-snps-femto-v2: properly enable ref clock phy: qcom-snps-femto-v2: Remove AHB2PHY interface clock drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 22 +++++++++---------- 1 file changed, 10 insertions(+), 12 deletions(-) -- 2.40.1 ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH RFC 0/2] Clock fixes for qcom-snps-femto-v2 PHY driver @ 2023-05-29 18:56 ` Adrien Thierry 0 siblings, 0 replies; 20+ messages in thread From: Adrien Thierry @ 2023-05-29 18:56 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Kishon Vijay Abraham I, Konrad Dybcio, Vinod Koul Cc: Adrien Thierry, linux-arm-msm, linux-phy This series attempts to fix a few weird clock usages in the qcom-snps-femto-v2 PHY driver: - ref_clk is never properly enabled - cfg_ahb_clk is never assigned Adrien Thierry (2): phy: qcom-snps-femto-v2: properly enable ref clock phy: qcom-snps-femto-v2: Remove AHB2PHY interface clock drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 22 +++++++++---------- 1 file changed, 10 insertions(+), 12 deletions(-) -- 2.40.1 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH RFC 1/2] phy: qcom-snps-femto-v2: properly enable ref clock 2023-05-29 18:56 ` Adrien Thierry @ 2023-05-29 18:56 ` Adrien Thierry -1 siblings, 0 replies; 20+ messages in thread From: Adrien Thierry @ 2023-05-29 18:56 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I Cc: Adrien Thierry, linux-arm-msm, linux-phy The driver is not enabling the ref clock, which thus gets disabled by the clk_disable_unused initcall. This leads to the dwc3 controller failing to initialize if probed after clk_disable_unused is called, for instance when the driver is built as a module. To fix this, add calls to clk_prepare_enable/clk_disable_unprepare at the proper places. Signed-off-by: Adrien Thierry <athierry@redhat.com> --- drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c index 6c237f3cc66d..8abf482e81a8 100644 --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c @@ -166,6 +166,7 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) } clk_disable_unprepare(hsphy->cfg_ahb_clk); + clk_disable_unprepare(hsphy->ref_clk); return 0; } @@ -181,6 +182,12 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) return ret; } + ret = clk_prepare_enable(hsphy->ref_clk); + if (ret) { + dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); + return ret; + } + return 0; } @@ -380,10 +387,16 @@ static int qcom_snps_hsphy_init(struct phy *phy) goto poweroff_phy; } + ret = clk_prepare_enable(hsphy->ref_clk); + if (ret) { + dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); + goto disable_ahb_clk; + } + ret = reset_control_assert(hsphy->phy_reset); if (ret) { dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret); - goto disable_ahb_clk; + goto disable_ref_clk; } usleep_range(100, 150); @@ -391,7 +404,7 @@ static int qcom_snps_hsphy_init(struct phy *phy) ret = reset_control_deassert(hsphy->phy_reset); if (ret) { dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret); - goto disable_ahb_clk; + goto disable_ref_clk; } qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0, @@ -448,6 +461,8 @@ static int qcom_snps_hsphy_init(struct phy *phy) return 0; +disable_ref_clk: + clk_disable_unprepare(hsphy->ref_clk); disable_ahb_clk: clk_disable_unprepare(hsphy->cfg_ahb_clk); poweroff_phy: @@ -462,6 +477,7 @@ static int qcom_snps_hsphy_exit(struct phy *phy) reset_control_assert(hsphy->phy_reset); clk_disable_unprepare(hsphy->cfg_ahb_clk); + clk_disable_unprepare(hsphy->ref_clk); regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); hsphy->phy_initialized = false; -- 2.40.1 ^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH RFC 1/2] phy: qcom-snps-femto-v2: properly enable ref clock @ 2023-05-29 18:56 ` Adrien Thierry 0 siblings, 0 replies; 20+ messages in thread From: Adrien Thierry @ 2023-05-29 18:56 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I Cc: Adrien Thierry, linux-arm-msm, linux-phy The driver is not enabling the ref clock, which thus gets disabled by the clk_disable_unused initcall. This leads to the dwc3 controller failing to initialize if probed after clk_disable_unused is called, for instance when the driver is built as a module. To fix this, add calls to clk_prepare_enable/clk_disable_unprepare at the proper places. Signed-off-by: Adrien Thierry <athierry@redhat.com> --- drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c index 6c237f3cc66d..8abf482e81a8 100644 --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c @@ -166,6 +166,7 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) } clk_disable_unprepare(hsphy->cfg_ahb_clk); + clk_disable_unprepare(hsphy->ref_clk); return 0; } @@ -181,6 +182,12 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) return ret; } + ret = clk_prepare_enable(hsphy->ref_clk); + if (ret) { + dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); + return ret; + } + return 0; } @@ -380,10 +387,16 @@ static int qcom_snps_hsphy_init(struct phy *phy) goto poweroff_phy; } + ret = clk_prepare_enable(hsphy->ref_clk); + if (ret) { + dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); + goto disable_ahb_clk; + } + ret = reset_control_assert(hsphy->phy_reset); if (ret) { dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret); - goto disable_ahb_clk; + goto disable_ref_clk; } usleep_range(100, 150); @@ -391,7 +404,7 @@ static int qcom_snps_hsphy_init(struct phy *phy) ret = reset_control_deassert(hsphy->phy_reset); if (ret) { dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret); - goto disable_ahb_clk; + goto disable_ref_clk; } qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0, @@ -448,6 +461,8 @@ static int qcom_snps_hsphy_init(struct phy *phy) return 0; +disable_ref_clk: + clk_disable_unprepare(hsphy->ref_clk); disable_ahb_clk: clk_disable_unprepare(hsphy->cfg_ahb_clk); poweroff_phy: @@ -462,6 +477,7 @@ static int qcom_snps_hsphy_exit(struct phy *phy) reset_control_assert(hsphy->phy_reset); clk_disable_unprepare(hsphy->cfg_ahb_clk); + clk_disable_unprepare(hsphy->ref_clk); regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); hsphy->phy_initialized = false; -- 2.40.1 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 1/2] phy: qcom-snps-femto-v2: properly enable ref clock 2023-05-29 18:56 ` Adrien Thierry @ 2023-05-29 21:16 ` Bjorn Andersson -1 siblings, 0 replies; 20+ messages in thread From: Bjorn Andersson @ 2023-05-29 21:16 UTC (permalink / raw) To: Adrien Thierry Cc: Andy Gross, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy On Mon, May 29, 2023 at 02:56:36PM -0400, Adrien Thierry wrote: > The driver is not enabling the ref clock, which thus gets disabled by > the clk_disable_unused initcall. This leads to the dwc3 controller > failing to initialize if probed after clk_disable_unused is called, for > instance when the driver is built as a module. > Good catch! A side note though, clk_disable_unused() has no way to take kernel modules into consideration today, and it doesn't handle the case where clock drivers are built as modules appropriately. Work has started to address this, but as of todaybooting the system without clk_ignore_unused is not recommended... > To fix this, add calls to clk_prepare_enable/clk_disable_unprepare at > the proper places. > If I parse the downstream kernel correctly the refclock should be turned off across runtime and system suspend as well. Regards, Bjorn > Signed-off-by: Adrien Thierry <athierry@redhat.com> > --- > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +++++++++++++++++-- > 1 file changed, 18 insertions(+), 2 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > index 6c237f3cc66d..8abf482e81a8 100644 > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > @@ -166,6 +166,7 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > } > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > + clk_disable_unprepare(hsphy->ref_clk); > return 0; > } > > @@ -181,6 +182,12 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > return ret; > } > > + ret = clk_prepare_enable(hsphy->ref_clk); > + if (ret) { > + dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > + return ret; > + } > + > return 0; > } > > @@ -380,10 +387,16 @@ static int qcom_snps_hsphy_init(struct phy *phy) > goto poweroff_phy; > } > > + ret = clk_prepare_enable(hsphy->ref_clk); > + if (ret) { > + dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > + goto disable_ahb_clk; > + } > + > ret = reset_control_assert(hsphy->phy_reset); > if (ret) { > dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret); > - goto disable_ahb_clk; > + goto disable_ref_clk; > } > > usleep_range(100, 150); > @@ -391,7 +404,7 @@ static int qcom_snps_hsphy_init(struct phy *phy) > ret = reset_control_deassert(hsphy->phy_reset); > if (ret) { > dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret); > - goto disable_ahb_clk; > + goto disable_ref_clk; > } > > qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0, > @@ -448,6 +461,8 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > return 0; > > +disable_ref_clk: > + clk_disable_unprepare(hsphy->ref_clk); > disable_ahb_clk: > clk_disable_unprepare(hsphy->cfg_ahb_clk); > poweroff_phy: > @@ -462,6 +477,7 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > > reset_control_assert(hsphy->phy_reset); > clk_disable_unprepare(hsphy->cfg_ahb_clk); > + clk_disable_unprepare(hsphy->ref_clk); > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > hsphy->phy_initialized = false; > > -- > 2.40.1 > ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 1/2] phy: qcom-snps-femto-v2: properly enable ref clock @ 2023-05-29 21:16 ` Bjorn Andersson 0 siblings, 0 replies; 20+ messages in thread From: Bjorn Andersson @ 2023-05-29 21:16 UTC (permalink / raw) To: Adrien Thierry Cc: Andy Gross, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy On Mon, May 29, 2023 at 02:56:36PM -0400, Adrien Thierry wrote: > The driver is not enabling the ref clock, which thus gets disabled by > the clk_disable_unused initcall. This leads to the dwc3 controller > failing to initialize if probed after clk_disable_unused is called, for > instance when the driver is built as a module. > Good catch! A side note though, clk_disable_unused() has no way to take kernel modules into consideration today, and it doesn't handle the case where clock drivers are built as modules appropriately. Work has started to address this, but as of todaybooting the system without clk_ignore_unused is not recommended... > To fix this, add calls to clk_prepare_enable/clk_disable_unprepare at > the proper places. > If I parse the downstream kernel correctly the refclock should be turned off across runtime and system suspend as well. Regards, Bjorn > Signed-off-by: Adrien Thierry <athierry@redhat.com> > --- > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +++++++++++++++++-- > 1 file changed, 18 insertions(+), 2 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > index 6c237f3cc66d..8abf482e81a8 100644 > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > @@ -166,6 +166,7 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > } > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > + clk_disable_unprepare(hsphy->ref_clk); > return 0; > } > > @@ -181,6 +182,12 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > return ret; > } > > + ret = clk_prepare_enable(hsphy->ref_clk); > + if (ret) { > + dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > + return ret; > + } > + > return 0; > } > > @@ -380,10 +387,16 @@ static int qcom_snps_hsphy_init(struct phy *phy) > goto poweroff_phy; > } > > + ret = clk_prepare_enable(hsphy->ref_clk); > + if (ret) { > + dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > + goto disable_ahb_clk; > + } > + > ret = reset_control_assert(hsphy->phy_reset); > if (ret) { > dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret); > - goto disable_ahb_clk; > + goto disable_ref_clk; > } > > usleep_range(100, 150); > @@ -391,7 +404,7 @@ static int qcom_snps_hsphy_init(struct phy *phy) > ret = reset_control_deassert(hsphy->phy_reset); > if (ret) { > dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret); > - goto disable_ahb_clk; > + goto disable_ref_clk; > } > > qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0, > @@ -448,6 +461,8 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > return 0; > > +disable_ref_clk: > + clk_disable_unprepare(hsphy->ref_clk); > disable_ahb_clk: > clk_disable_unprepare(hsphy->cfg_ahb_clk); > poweroff_phy: > @@ -462,6 +477,7 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > > reset_control_assert(hsphy->phy_reset); > clk_disable_unprepare(hsphy->cfg_ahb_clk); > + clk_disable_unprepare(hsphy->ref_clk); > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > hsphy->phy_initialized = false; > > -- > 2.40.1 > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 1/2] phy: qcom-snps-femto-v2: properly enable ref clock 2023-05-29 21:16 ` Bjorn Andersson @ 2023-05-30 18:46 ` Adrien Thierry -1 siblings, 0 replies; 20+ messages in thread From: Adrien Thierry @ 2023-05-30 18:46 UTC (permalink / raw) To: Bjorn Andersson Cc: Andy Gross, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy Hi Bjorn, thanks for your reply! On Mon, May 29, 2023 at 02:16:29PM -0700, Bjorn Andersson wrote: > On Mon, May 29, 2023 at 02:56:36PM -0400, Adrien Thierry wrote: > > The driver is not enabling the ref clock, which thus gets disabled by > > the clk_disable_unused initcall. This leads to the dwc3 controller > > failing to initialize if probed after clk_disable_unused is called, for > > instance when the driver is built as a module. > > > > Good catch! > > A side note though, clk_disable_unused() has no way to take kernel > modules into consideration today, and it doesn't handle the case where > clock drivers are built as modules appropriately. > Work has started to address this, but as of todaybooting the system > without clk_ignore_unused is not recommended... > For my understanding, do you have an example of a situation that would fail with modules when not using clk_ignore_unused? > > To fix this, add calls to clk_prepare_enable/clk_disable_unprepare at > > the proper places. > > > > If I parse the downstream kernel correctly the refclock should be > turned off across runtime and system suspend as well. > Which downstream kernel are you using? I'm not seing a system suspend callback in mine [1]. refclock should be turned off on runtime suspend in my patch, in qcom_snps_hsphy_suspend, which is called by qcom_snps_hsphy_runtime_suspend. [1] https://git.codelinaro.org/clo/la/kernel/ark-5.14/-/blob/kernel.lnx.5.14.r2-rel/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > Regards, > Bjorn > > > Signed-off-by: Adrien Thierry <athierry@redhat.com> > > --- > > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +++++++++++++++++-- > > 1 file changed, 18 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > index 6c237f3cc66d..8abf482e81a8 100644 > > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > @@ -166,6 +166,7 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > > } > > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > + clk_disable_unprepare(hsphy->ref_clk); > > return 0; > > } > > > > @@ -181,6 +182,12 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > > return ret; > > } > > > > + ret = clk_prepare_enable(hsphy->ref_clk); > > + if (ret) { > > + dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > > + return ret; > > + } > > + > > return 0; > > } > > > > @@ -380,10 +387,16 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > goto poweroff_phy; > > } > > > > + ret = clk_prepare_enable(hsphy->ref_clk); > > + if (ret) { > > + dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > > + goto disable_ahb_clk; > > + } > > + > > ret = reset_control_assert(hsphy->phy_reset); > > if (ret) { > > dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret); > > - goto disable_ahb_clk; > > + goto disable_ref_clk; > > } > > > > usleep_range(100, 150); > > @@ -391,7 +404,7 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > ret = reset_control_deassert(hsphy->phy_reset); > > if (ret) { > > dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret); > > - goto disable_ahb_clk; > > + goto disable_ref_clk; > > } > > > > qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0, > > @@ -448,6 +461,8 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > > return 0; > > > > +disable_ref_clk: > > + clk_disable_unprepare(hsphy->ref_clk); > > disable_ahb_clk: > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > poweroff_phy: > > @@ -462,6 +477,7 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > > > > reset_control_assert(hsphy->phy_reset); > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > + clk_disable_unprepare(hsphy->ref_clk); > > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > > hsphy->phy_initialized = false; > > > > -- > > 2.40.1 > > Best, Adrien ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 1/2] phy: qcom-snps-femto-v2: properly enable ref clock @ 2023-05-30 18:46 ` Adrien Thierry 0 siblings, 0 replies; 20+ messages in thread From: Adrien Thierry @ 2023-05-30 18:46 UTC (permalink / raw) To: Bjorn Andersson Cc: Andy Gross, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy Hi Bjorn, thanks for your reply! On Mon, May 29, 2023 at 02:16:29PM -0700, Bjorn Andersson wrote: > On Mon, May 29, 2023 at 02:56:36PM -0400, Adrien Thierry wrote: > > The driver is not enabling the ref clock, which thus gets disabled by > > the clk_disable_unused initcall. This leads to the dwc3 controller > > failing to initialize if probed after clk_disable_unused is called, for > > instance when the driver is built as a module. > > > > Good catch! > > A side note though, clk_disable_unused() has no way to take kernel > modules into consideration today, and it doesn't handle the case where > clock drivers are built as modules appropriately. > Work has started to address this, but as of todaybooting the system > without clk_ignore_unused is not recommended... > For my understanding, do you have an example of a situation that would fail with modules when not using clk_ignore_unused? > > To fix this, add calls to clk_prepare_enable/clk_disable_unprepare at > > the proper places. > > > > If I parse the downstream kernel correctly the refclock should be > turned off across runtime and system suspend as well. > Which downstream kernel are you using? I'm not seing a system suspend callback in mine [1]. refclock should be turned off on runtime suspend in my patch, in qcom_snps_hsphy_suspend, which is called by qcom_snps_hsphy_runtime_suspend. [1] https://git.codelinaro.org/clo/la/kernel/ark-5.14/-/blob/kernel.lnx.5.14.r2-rel/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > Regards, > Bjorn > > > Signed-off-by: Adrien Thierry <athierry@redhat.com> > > --- > > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +++++++++++++++++-- > > 1 file changed, 18 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > index 6c237f3cc66d..8abf482e81a8 100644 > > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > @@ -166,6 +166,7 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > > } > > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > + clk_disable_unprepare(hsphy->ref_clk); > > return 0; > > } > > > > @@ -181,6 +182,12 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > > return ret; > > } > > > > + ret = clk_prepare_enable(hsphy->ref_clk); > > + if (ret) { > > + dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > > + return ret; > > + } > > + > > return 0; > > } > > > > @@ -380,10 +387,16 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > goto poweroff_phy; > > } > > > > + ret = clk_prepare_enable(hsphy->ref_clk); > > + if (ret) { > > + dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > > + goto disable_ahb_clk; > > + } > > + > > ret = reset_control_assert(hsphy->phy_reset); > > if (ret) { > > dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret); > > - goto disable_ahb_clk; > > + goto disable_ref_clk; > > } > > > > usleep_range(100, 150); > > @@ -391,7 +404,7 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > ret = reset_control_deassert(hsphy->phy_reset); > > if (ret) { > > dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret); > > - goto disable_ahb_clk; > > + goto disable_ref_clk; > > } > > > > qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0, > > @@ -448,6 +461,8 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > > return 0; > > > > +disable_ref_clk: > > + clk_disable_unprepare(hsphy->ref_clk); > > disable_ahb_clk: > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > poweroff_phy: > > @@ -462,6 +477,7 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > > > > reset_control_assert(hsphy->phy_reset); > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > + clk_disable_unprepare(hsphy->ref_clk); > > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > > hsphy->phy_initialized = false; > > > > -- > > 2.40.1 > > Best, Adrien -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 1/2] phy: qcom-snps-femto-v2: properly enable ref clock 2023-05-30 18:46 ` Adrien Thierry @ 2023-05-31 2:34 ` Bjorn Andersson -1 siblings, 0 replies; 20+ messages in thread From: Bjorn Andersson @ 2023-05-31 2:34 UTC (permalink / raw) To: Adrien Thierry Cc: Andy Gross, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy On Tue, May 30, 2023 at 02:46:05PM -0400, Adrien Thierry wrote: > Hi Bjorn, thanks for your reply! > > On Mon, May 29, 2023 at 02:16:29PM -0700, Bjorn Andersson wrote: > > On Mon, May 29, 2023 at 02:56:36PM -0400, Adrien Thierry wrote: > > > The driver is not enabling the ref clock, which thus gets disabled by > > > the clk_disable_unused initcall. This leads to the dwc3 controller > > > failing to initialize if probed after clk_disable_unused is called, for > > > instance when the driver is built as a module. > > > > > > > Good catch! > > > > A side note though, clk_disable_unused() has no way to take kernel > > modules into consideration today, and it doesn't handle the case where > > clock drivers are built as modules appropriately. > > Work has started to address this, but as of todaybooting the system > > without clk_ignore_unused is not recommended... > > > > For my understanding, do you have an example of a situation that would > fail with modules when not using clk_ignore_unused? > The prime example relates to the display clocks, where the bootloader typically leave clocks on and at lateinit we haven't yet loaded enough modules to bring up the display. And to make matters worse, the code ends up disabling the PLL feeding the clock tree without first disabling some of the muxes - which has side effects... Another case, although much less concerning in the short run, is when you have any of the clock drivers built as modules. clk_disable_unused() will be invoked before they are loaded, so your expectation that unused clocks are turned off is just not fulfilled. > > > To fix this, add calls to clk_prepare_enable/clk_disable_unprepare at > > > the proper places. > > > > > > > If I parse the downstream kernel correctly the refclock should be > > turned off across runtime and system suspend as well. > > > > Which downstream kernel are you using? I'm not seing a system suspend > callback in mine [1]. refclock should be turned off on runtime suspend in > my patch, in qcom_snps_hsphy_suspend, which is called by > qcom_snps_hsphy_runtime_suspend. > Forgive me, but isn't [1] the driver you're modifying? I'm looking at [2], with set_suspend() being invoked from the runtime and system suspend/resume handlers. > [1] https://git.codelinaro.org/clo/la/kernel/ark-5.14/-/blob/kernel.lnx.5.14.r2-rel/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c [2] https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blob/LV.AU.1.2.1.r2-05300-gen3meta.0/drivers/usb/phy/phy-msm-snps-hs.c#L908 Regards, Bjorn > > > Regards, > > Bjorn > > > > > Signed-off-by: Adrien Thierry <athierry@redhat.com> > > > --- > > > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +++++++++++++++++-- > > > 1 file changed, 18 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > > index 6c237f3cc66d..8abf482e81a8 100644 > > > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > > @@ -166,6 +166,7 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > > > } > > > > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > > + clk_disable_unprepare(hsphy->ref_clk); > > > return 0; > > > } > > > > > > @@ -181,6 +182,12 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > > > return ret; > > > } > > > > > > + ret = clk_prepare_enable(hsphy->ref_clk); > > > + if (ret) { > > > + dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > > > + return ret; > > > + } > > > + > > > return 0; > > > } > > > > > > @@ -380,10 +387,16 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > goto poweroff_phy; > > > } > > > > > > + ret = clk_prepare_enable(hsphy->ref_clk); > > > + if (ret) { > > > + dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > > > + goto disable_ahb_clk; > > > + } > > > + > > > ret = reset_control_assert(hsphy->phy_reset); > > > if (ret) { > > > dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret); > > > - goto disable_ahb_clk; > > > + goto disable_ref_clk; > > > } > > > > > > usleep_range(100, 150); > > > @@ -391,7 +404,7 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > ret = reset_control_deassert(hsphy->phy_reset); > > > if (ret) { > > > dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret); > > > - goto disable_ahb_clk; > > > + goto disable_ref_clk; > > > } > > > > > > qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0, > > > @@ -448,6 +461,8 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > > > > return 0; > > > > > > +disable_ref_clk: > > > + clk_disable_unprepare(hsphy->ref_clk); > > > disable_ahb_clk: > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > > poweroff_phy: > > > @@ -462,6 +477,7 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > > > > > > reset_control_assert(hsphy->phy_reset); > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > > + clk_disable_unprepare(hsphy->ref_clk); > > > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > > > hsphy->phy_initialized = false; > > > > > > -- > > > 2.40.1 > > > > > Best, > Adrien > ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 1/2] phy: qcom-snps-femto-v2: properly enable ref clock @ 2023-05-31 2:34 ` Bjorn Andersson 0 siblings, 0 replies; 20+ messages in thread From: Bjorn Andersson @ 2023-05-31 2:34 UTC (permalink / raw) To: Adrien Thierry Cc: Andy Gross, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy On Tue, May 30, 2023 at 02:46:05PM -0400, Adrien Thierry wrote: > Hi Bjorn, thanks for your reply! > > On Mon, May 29, 2023 at 02:16:29PM -0700, Bjorn Andersson wrote: > > On Mon, May 29, 2023 at 02:56:36PM -0400, Adrien Thierry wrote: > > > The driver is not enabling the ref clock, which thus gets disabled by > > > the clk_disable_unused initcall. This leads to the dwc3 controller > > > failing to initialize if probed after clk_disable_unused is called, for > > > instance when the driver is built as a module. > > > > > > > Good catch! > > > > A side note though, clk_disable_unused() has no way to take kernel > > modules into consideration today, and it doesn't handle the case where > > clock drivers are built as modules appropriately. > > Work has started to address this, but as of todaybooting the system > > without clk_ignore_unused is not recommended... > > > > For my understanding, do you have an example of a situation that would > fail with modules when not using clk_ignore_unused? > The prime example relates to the display clocks, where the bootloader typically leave clocks on and at lateinit we haven't yet loaded enough modules to bring up the display. And to make matters worse, the code ends up disabling the PLL feeding the clock tree without first disabling some of the muxes - which has side effects... Another case, although much less concerning in the short run, is when you have any of the clock drivers built as modules. clk_disable_unused() will be invoked before they are loaded, so your expectation that unused clocks are turned off is just not fulfilled. > > > To fix this, add calls to clk_prepare_enable/clk_disable_unprepare at > > > the proper places. > > > > > > > If I parse the downstream kernel correctly the refclock should be > > turned off across runtime and system suspend as well. > > > > Which downstream kernel are you using? I'm not seing a system suspend > callback in mine [1]. refclock should be turned off on runtime suspend in > my patch, in qcom_snps_hsphy_suspend, which is called by > qcom_snps_hsphy_runtime_suspend. > Forgive me, but isn't [1] the driver you're modifying? I'm looking at [2], with set_suspend() being invoked from the runtime and system suspend/resume handlers. > [1] https://git.codelinaro.org/clo/la/kernel/ark-5.14/-/blob/kernel.lnx.5.14.r2-rel/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c [2] https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blob/LV.AU.1.2.1.r2-05300-gen3meta.0/drivers/usb/phy/phy-msm-snps-hs.c#L908 Regards, Bjorn > > > Regards, > > Bjorn > > > > > Signed-off-by: Adrien Thierry <athierry@redhat.com> > > > --- > > > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +++++++++++++++++-- > > > 1 file changed, 18 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > > index 6c237f3cc66d..8abf482e81a8 100644 > > > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > > @@ -166,6 +166,7 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > > > } > > > > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > > + clk_disable_unprepare(hsphy->ref_clk); > > > return 0; > > > } > > > > > > @@ -181,6 +182,12 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > > > return ret; > > > } > > > > > > + ret = clk_prepare_enable(hsphy->ref_clk); > > > + if (ret) { > > > + dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > > > + return ret; > > > + } > > > + > > > return 0; > > > } > > > > > > @@ -380,10 +387,16 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > goto poweroff_phy; > > > } > > > > > > + ret = clk_prepare_enable(hsphy->ref_clk); > > > + if (ret) { > > > + dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > > > + goto disable_ahb_clk; > > > + } > > > + > > > ret = reset_control_assert(hsphy->phy_reset); > > > if (ret) { > > > dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret); > > > - goto disable_ahb_clk; > > > + goto disable_ref_clk; > > > } > > > > > > usleep_range(100, 150); > > > @@ -391,7 +404,7 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > ret = reset_control_deassert(hsphy->phy_reset); > > > if (ret) { > > > dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret); > > > - goto disable_ahb_clk; > > > + goto disable_ref_clk; > > > } > > > > > > qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0, > > > @@ -448,6 +461,8 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > > > > return 0; > > > > > > +disable_ref_clk: > > > + clk_disable_unprepare(hsphy->ref_clk); > > > disable_ahb_clk: > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > > poweroff_phy: > > > @@ -462,6 +477,7 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > > > > > > reset_control_assert(hsphy->phy_reset); > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > > + clk_disable_unprepare(hsphy->ref_clk); > > > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > > > hsphy->phy_initialized = false; > > > > > > -- > > > 2.40.1 > > > > > Best, > Adrien > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 1/2] phy: qcom-snps-femto-v2: properly enable ref clock 2023-05-31 2:34 ` Bjorn Andersson @ 2023-06-01 17:09 ` Adrien Thierry -1 siblings, 0 replies; 20+ messages in thread From: Adrien Thierry @ 2023-06-01 17:09 UTC (permalink / raw) To: Bjorn Andersson Cc: Andy Gross, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy On Tue, May 30, 2023 at 07:34:41PM -0700, Bjorn Andersson wrote: > On Tue, May 30, 2023 at 02:46:05PM -0400, Adrien Thierry wrote: > > Hi Bjorn, thanks for your reply! > > > > On Mon, May 29, 2023 at 02:16:29PM -0700, Bjorn Andersson wrote: > > > On Mon, May 29, 2023 at 02:56:36PM -0400, Adrien Thierry wrote: > > > > The driver is not enabling the ref clock, which thus gets disabled by > > > > the clk_disable_unused initcall. This leads to the dwc3 controller > > > > failing to initialize if probed after clk_disable_unused is called, for > > > > instance when the driver is built as a module. > > > > > > > > > > Good catch! > > > > > > A side note though, clk_disable_unused() has no way to take kernel > > > modules into consideration today, and it doesn't handle the case where > > > clock drivers are built as modules appropriately. > > > Work has started to address this, but as of todaybooting the system > > > without clk_ignore_unused is not recommended... > > > > > > > For my understanding, do you have an example of a situation that would > > fail with modules when not using clk_ignore_unused? > > > > The prime example relates to the display clocks, where the bootloader > typically leave clocks on and at lateinit we haven't yet loaded enough > modules to bring up the display. And to make matters worse, the code > ends up disabling the PLL feeding the clock tree without first disabling > some of the muxes - which has side effects... > > Another case, although much less concerning in the short run, is when > you have any of the clock drivers built as modules. clk_disable_unused() > will be invoked before they are loaded, so your expectation that unused > clocks are turned off is just not fulfilled. > Thanks for the explanation! > > > > To fix this, add calls to clk_prepare_enable/clk_disable_unprepare at > > > > the proper places. > > > > > > > > > > If I parse the downstream kernel correctly the refclock should be > > > turned off across runtime and system suspend as well. > > > > > > > Which downstream kernel are you using? I'm not seing a system suspend > > callback in mine [1]. refclock should be turned off on runtime suspend in > > my patch, in qcom_snps_hsphy_suspend, which is called by > > qcom_snps_hsphy_runtime_suspend. > > > > Forgive me, but isn't [1] the driver you're modifying? > > I'm looking at [2], with set_suspend() being invoked from the runtime > and system suspend/resume handlers. > > > [1] https://git.codelinaro.org/clo/la/kernel/ark-5.14/-/blob/kernel.lnx.5.14.r2-rel/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > [2] https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blob/LV.AU.1.2.1.r2-05300-gen3meta.0/drivers/usb/phy/phy-msm-snps-hs.c#L908 > Thank you. The femto PHY driver is not using set_suspend(), but has runtime PM ops. Is it ok if I add the system sleep PM ops as well with SET_SYSTEM_SLEEP_PM_OPS() ? > Regards, > Bjorn > > > > > > Regards, > > > Bjorn > > > > > > > Signed-off-by: Adrien Thierry <athierry@redhat.com> > > > > --- > > > > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +++++++++++++++++-- > > > > 1 file changed, 18 insertions(+), 2 deletions(-) > > > > > > > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > > > index 6c237f3cc66d..8abf482e81a8 100644 > > > > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > > > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > > > @@ -166,6 +166,7 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > > > > } > > > > > > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > > > + clk_disable_unprepare(hsphy->ref_clk); > > > > return 0; > > > > } > > > > > > > > @@ -181,6 +182,12 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > > > > return ret; > > > > } > > > > > > > > + ret = clk_prepare_enable(hsphy->ref_clk); > > > > + if (ret) { > > > > + dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > > > > + return ret; > > > > + } > > > > + > > > > return 0; > > > > } > > > > > > > > @@ -380,10 +387,16 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > > goto poweroff_phy; > > > > } > > > > > > > > + ret = clk_prepare_enable(hsphy->ref_clk); > > > > + if (ret) { > > > > + dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > > > > + goto disable_ahb_clk; > > > > + } > > > > + > > > > ret = reset_control_assert(hsphy->phy_reset); > > > > if (ret) { > > > > dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret); > > > > - goto disable_ahb_clk; > > > > + goto disable_ref_clk; > > > > } > > > > > > > > usleep_range(100, 150); > > > > @@ -391,7 +404,7 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > > ret = reset_control_deassert(hsphy->phy_reset); > > > > if (ret) { > > > > dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret); > > > > - goto disable_ahb_clk; > > > > + goto disable_ref_clk; > > > > } > > > > > > > > qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0, > > > > @@ -448,6 +461,8 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > > > > > > return 0; > > > > > > > > +disable_ref_clk: > > > > + clk_disable_unprepare(hsphy->ref_clk); > > > > disable_ahb_clk: > > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > > > poweroff_phy: > > > > @@ -462,6 +477,7 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > > > > > > > > reset_control_assert(hsphy->phy_reset); > > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > > > + clk_disable_unprepare(hsphy->ref_clk); > > > > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > > > > hsphy->phy_initialized = false; > > > > > > > > -- > > > > 2.40.1 > > > > > > > > Best, > > Adrien > > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 1/2] phy: qcom-snps-femto-v2: properly enable ref clock @ 2023-06-01 17:09 ` Adrien Thierry 0 siblings, 0 replies; 20+ messages in thread From: Adrien Thierry @ 2023-06-01 17:09 UTC (permalink / raw) To: Bjorn Andersson Cc: Andy Gross, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy On Tue, May 30, 2023 at 07:34:41PM -0700, Bjorn Andersson wrote: > On Tue, May 30, 2023 at 02:46:05PM -0400, Adrien Thierry wrote: > > Hi Bjorn, thanks for your reply! > > > > On Mon, May 29, 2023 at 02:16:29PM -0700, Bjorn Andersson wrote: > > > On Mon, May 29, 2023 at 02:56:36PM -0400, Adrien Thierry wrote: > > > > The driver is not enabling the ref clock, which thus gets disabled by > > > > the clk_disable_unused initcall. This leads to the dwc3 controller > > > > failing to initialize if probed after clk_disable_unused is called, for > > > > instance when the driver is built as a module. > > > > > > > > > > Good catch! > > > > > > A side note though, clk_disable_unused() has no way to take kernel > > > modules into consideration today, and it doesn't handle the case where > > > clock drivers are built as modules appropriately. > > > Work has started to address this, but as of todaybooting the system > > > without clk_ignore_unused is not recommended... > > > > > > > For my understanding, do you have an example of a situation that would > > fail with modules when not using clk_ignore_unused? > > > > The prime example relates to the display clocks, where the bootloader > typically leave clocks on and at lateinit we haven't yet loaded enough > modules to bring up the display. And to make matters worse, the code > ends up disabling the PLL feeding the clock tree without first disabling > some of the muxes - which has side effects... > > Another case, although much less concerning in the short run, is when > you have any of the clock drivers built as modules. clk_disable_unused() > will be invoked before they are loaded, so your expectation that unused > clocks are turned off is just not fulfilled. > Thanks for the explanation! > > > > To fix this, add calls to clk_prepare_enable/clk_disable_unprepare at > > > > the proper places. > > > > > > > > > > If I parse the downstream kernel correctly the refclock should be > > > turned off across runtime and system suspend as well. > > > > > > > Which downstream kernel are you using? I'm not seing a system suspend > > callback in mine [1]. refclock should be turned off on runtime suspend in > > my patch, in qcom_snps_hsphy_suspend, which is called by > > qcom_snps_hsphy_runtime_suspend. > > > > Forgive me, but isn't [1] the driver you're modifying? > > I'm looking at [2], with set_suspend() being invoked from the runtime > and system suspend/resume handlers. > > > [1] https://git.codelinaro.org/clo/la/kernel/ark-5.14/-/blob/kernel.lnx.5.14.r2-rel/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > [2] https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blob/LV.AU.1.2.1.r2-05300-gen3meta.0/drivers/usb/phy/phy-msm-snps-hs.c#L908 > Thank you. The femto PHY driver is not using set_suspend(), but has runtime PM ops. Is it ok if I add the system sleep PM ops as well with SET_SYSTEM_SLEEP_PM_OPS() ? > Regards, > Bjorn > > > > > > Regards, > > > Bjorn > > > > > > > Signed-off-by: Adrien Thierry <athierry@redhat.com> > > > > --- > > > > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +++++++++++++++++-- > > > > 1 file changed, 18 insertions(+), 2 deletions(-) > > > > > > > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > > > index 6c237f3cc66d..8abf482e81a8 100644 > > > > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > > > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > > > @@ -166,6 +166,7 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > > > > } > > > > > > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > > > + clk_disable_unprepare(hsphy->ref_clk); > > > > return 0; > > > > } > > > > > > > > @@ -181,6 +182,12 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > > > > return ret; > > > > } > > > > > > > > + ret = clk_prepare_enable(hsphy->ref_clk); > > > > + if (ret) { > > > > + dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > > > > + return ret; > > > > + } > > > > + > > > > return 0; > > > > } > > > > > > > > @@ -380,10 +387,16 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > > goto poweroff_phy; > > > > } > > > > > > > > + ret = clk_prepare_enable(hsphy->ref_clk); > > > > + if (ret) { > > > > + dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > > > > + goto disable_ahb_clk; > > > > + } > > > > + > > > > ret = reset_control_assert(hsphy->phy_reset); > > > > if (ret) { > > > > dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret); > > > > - goto disable_ahb_clk; > > > > + goto disable_ref_clk; > > > > } > > > > > > > > usleep_range(100, 150); > > > > @@ -391,7 +404,7 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > > ret = reset_control_deassert(hsphy->phy_reset); > > > > if (ret) { > > > > dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret); > > > > - goto disable_ahb_clk; > > > > + goto disable_ref_clk; > > > > } > > > > > > > > qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0, > > > > @@ -448,6 +461,8 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > > > > > > return 0; > > > > > > > > +disable_ref_clk: > > > > + clk_disable_unprepare(hsphy->ref_clk); > > > > disable_ahb_clk: > > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > > > poweroff_phy: > > > > @@ -462,6 +477,7 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > > > > > > > > reset_control_assert(hsphy->phy_reset); > > > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > > > > + clk_disable_unprepare(hsphy->ref_clk); > > > > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > > > > hsphy->phy_initialized = false; > > > > > > > > -- > > > > 2.40.1 > > > > > > > > Best, > > Adrien > > ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 1/2] phy: qcom-snps-femto-v2: properly enable ref clock 2023-05-29 18:56 ` Adrien Thierry @ 2023-05-30 13:22 ` Andrew Halaney -1 siblings, 0 replies; 20+ messages in thread From: Andrew Halaney @ 2023-05-30 13:22 UTC (permalink / raw) To: Adrien Thierry Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy On Mon, May 29, 2023 at 02:56:36PM -0400, Adrien Thierry wrote: > The driver is not enabling the ref clock, which thus gets disabled by > the clk_disable_unused initcall. This leads to the dwc3 controller > failing to initialize if probed after clk_disable_unused is called, for > instance when the driver is built as a module. > > To fix this, add calls to clk_prepare_enable/clk_disable_unprepare at > the proper places. > I'm a sucker for a good paper trail, maybe add: Link: https://lore.kernel.org/linux-arm-msm/ZEqvy+khHeTkC2hf@fedora/ Fixes: 51e8114f80d0 ("phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs") good work! > Signed-off-by: Adrien Thierry <athierry@redhat.com> > --- > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +++++++++++++++++-- > 1 file changed, 18 insertions(+), 2 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > index 6c237f3cc66d..8abf482e81a8 100644 > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > @@ -166,6 +166,7 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > } > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > + clk_disable_unprepare(hsphy->ref_clk); > return 0; > } > > @@ -181,6 +182,12 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > return ret; > } > > + ret = clk_prepare_enable(hsphy->ref_clk); > + if (ret) { > + dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > + return ret; > + } > + > return 0; > } > > @@ -380,10 +387,16 @@ static int qcom_snps_hsphy_init(struct phy *phy) > goto poweroff_phy; > } > > + ret = clk_prepare_enable(hsphy->ref_clk); > + if (ret) { > + dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > + goto disable_ahb_clk; > + } > + > ret = reset_control_assert(hsphy->phy_reset); > if (ret) { > dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret); > - goto disable_ahb_clk; > + goto disable_ref_clk; > } > > usleep_range(100, 150); > @@ -391,7 +404,7 @@ static int qcom_snps_hsphy_init(struct phy *phy) > ret = reset_control_deassert(hsphy->phy_reset); > if (ret) { > dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret); > - goto disable_ahb_clk; > + goto disable_ref_clk; > } > > qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0, > @@ -448,6 +461,8 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > return 0; > > +disable_ref_clk: > + clk_disable_unprepare(hsphy->ref_clk); > disable_ahb_clk: > clk_disable_unprepare(hsphy->cfg_ahb_clk); > poweroff_phy: > @@ -462,6 +477,7 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > > reset_control_assert(hsphy->phy_reset); > clk_disable_unprepare(hsphy->cfg_ahb_clk); > + clk_disable_unprepare(hsphy->ref_clk); > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > hsphy->phy_initialized = false; > > -- > 2.40.1 > ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 1/2] phy: qcom-snps-femto-v2: properly enable ref clock @ 2023-05-30 13:22 ` Andrew Halaney 0 siblings, 0 replies; 20+ messages in thread From: Andrew Halaney @ 2023-05-30 13:22 UTC (permalink / raw) To: Adrien Thierry Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy On Mon, May 29, 2023 at 02:56:36PM -0400, Adrien Thierry wrote: > The driver is not enabling the ref clock, which thus gets disabled by > the clk_disable_unused initcall. This leads to the dwc3 controller > failing to initialize if probed after clk_disable_unused is called, for > instance when the driver is built as a module. > > To fix this, add calls to clk_prepare_enable/clk_disable_unprepare at > the proper places. > I'm a sucker for a good paper trail, maybe add: Link: https://lore.kernel.org/linux-arm-msm/ZEqvy+khHeTkC2hf@fedora/ Fixes: 51e8114f80d0 ("phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs") good work! > Signed-off-by: Adrien Thierry <athierry@redhat.com> > --- > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +++++++++++++++++-- > 1 file changed, 18 insertions(+), 2 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > index 6c237f3cc66d..8abf482e81a8 100644 > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > @@ -166,6 +166,7 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > } > > clk_disable_unprepare(hsphy->cfg_ahb_clk); > + clk_disable_unprepare(hsphy->ref_clk); > return 0; > } > > @@ -181,6 +182,12 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > return ret; > } > > + ret = clk_prepare_enable(hsphy->ref_clk); > + if (ret) { > + dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > + return ret; > + } > + > return 0; > } > > @@ -380,10 +387,16 @@ static int qcom_snps_hsphy_init(struct phy *phy) > goto poweroff_phy; > } > > + ret = clk_prepare_enable(hsphy->ref_clk); > + if (ret) { > + dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > + goto disable_ahb_clk; > + } > + > ret = reset_control_assert(hsphy->phy_reset); > if (ret) { > dev_err(&phy->dev, "failed to assert phy_reset, %d\n", ret); > - goto disable_ahb_clk; > + goto disable_ref_clk; > } > > usleep_range(100, 150); > @@ -391,7 +404,7 @@ static int qcom_snps_hsphy_init(struct phy *phy) > ret = reset_control_deassert(hsphy->phy_reset); > if (ret) { > dev_err(&phy->dev, "failed to de-assert phy_reset, %d\n", ret); > - goto disable_ahb_clk; > + goto disable_ref_clk; > } > > qcom_snps_hsphy_write_mask(hsphy->base, USB2_PHY_USB_PHY_CFG0, > @@ -448,6 +461,8 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > return 0; > > +disable_ref_clk: > + clk_disable_unprepare(hsphy->ref_clk); > disable_ahb_clk: > clk_disable_unprepare(hsphy->cfg_ahb_clk); > poweroff_phy: > @@ -462,6 +477,7 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > > reset_control_assert(hsphy->phy_reset); > clk_disable_unprepare(hsphy->cfg_ahb_clk); > + clk_disable_unprepare(hsphy->ref_clk); > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > hsphy->phy_initialized = false; > > -- > 2.40.1 > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH RFC 2/2] phy: qcom-snps-femto-v2: Remove AHB2PHY interface clock 2023-05-29 18:56 ` Adrien Thierry @ 2023-05-29 18:56 ` Adrien Thierry -1 siblings, 0 replies; 20+ messages in thread From: Adrien Thierry @ 2023-05-29 18:56 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I Cc: Adrien Thierry, linux-arm-msm, linux-phy The AHB2PHY interface clock cfg_ahb_clk is not assigned anywhere in the driver. Moreover, it's not used by any device tree, nor is present in the qcom,usb-snps-femto-v2 bindings. Remove it. Signed-off-by: Adrien Thierry <athierry@redhat.com> --- I'm not 100% sure if the clock should be removed, or if it should be added to bindings and device trees that use this PHY. Better informed opinions on the topic are highly welcome. drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +------------------ 1 file changed, 1 insertion(+), 19 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c index 8abf482e81a8..2d9c1105e28c 100644 --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c @@ -113,7 +113,6 @@ struct phy_override_seq { * @phy: generic phy * @base: iomapped memory space for snps hs phy * - * @cfg_ahb_clk: AHB2PHY interface clock * @ref_clk: phy reference clock * @phy_reset: phy reset control * @vregs: regulator supplies bulk data @@ -125,7 +124,6 @@ struct qcom_snps_hsphy { struct phy *phy; void __iomem *base; - struct clk *cfg_ahb_clk; struct clk *ref_clk; struct reset_control *phy_reset; struct regulator_bulk_data vregs[SNPS_HS_NUM_VREGS]; @@ -165,7 +163,6 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) 0, USB2_AUTO_RESUME); } - clk_disable_unprepare(hsphy->cfg_ahb_clk); clk_disable_unprepare(hsphy->ref_clk); return 0; } @@ -176,12 +173,6 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) dev_dbg(&hsphy->phy->dev, "Resume QCOM SNPS PHY, mode\n"); - ret = clk_prepare_enable(hsphy->cfg_ahb_clk); - if (ret) { - dev_err(&hsphy->phy->dev, "failed to enable cfg ahb clock\n"); - return ret; - } - ret = clk_prepare_enable(hsphy->ref_clk); if (ret) { dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); @@ -381,16 +372,10 @@ static int qcom_snps_hsphy_init(struct phy *phy) if (ret) return ret; - ret = clk_prepare_enable(hsphy->cfg_ahb_clk); - if (ret) { - dev_err(&phy->dev, "failed to enable cfg ahb clock, %d\n", ret); - goto poweroff_phy; - } - ret = clk_prepare_enable(hsphy->ref_clk); if (ret) { dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); - goto disable_ahb_clk; + goto poweroff_phy; } ret = reset_control_assert(hsphy->phy_reset); @@ -463,8 +448,6 @@ static int qcom_snps_hsphy_init(struct phy *phy) disable_ref_clk: clk_disable_unprepare(hsphy->ref_clk); -disable_ahb_clk: - clk_disable_unprepare(hsphy->cfg_ahb_clk); poweroff_phy: regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); @@ -476,7 +459,6 @@ static int qcom_snps_hsphy_exit(struct phy *phy) struct qcom_snps_hsphy *hsphy = phy_get_drvdata(phy); reset_control_assert(hsphy->phy_reset); - clk_disable_unprepare(hsphy->cfg_ahb_clk); clk_disable_unprepare(hsphy->ref_clk); regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); hsphy->phy_initialized = false; -- 2.40.1 ^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH RFC 2/2] phy: qcom-snps-femto-v2: Remove AHB2PHY interface clock @ 2023-05-29 18:56 ` Adrien Thierry 0 siblings, 0 replies; 20+ messages in thread From: Adrien Thierry @ 2023-05-29 18:56 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I Cc: Adrien Thierry, linux-arm-msm, linux-phy The AHB2PHY interface clock cfg_ahb_clk is not assigned anywhere in the driver. Moreover, it's not used by any device tree, nor is present in the qcom,usb-snps-femto-v2 bindings. Remove it. Signed-off-by: Adrien Thierry <athierry@redhat.com> --- I'm not 100% sure if the clock should be removed, or if it should be added to bindings and device trees that use this PHY. Better informed opinions on the topic are highly welcome. drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +------------------ 1 file changed, 1 insertion(+), 19 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c index 8abf482e81a8..2d9c1105e28c 100644 --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c @@ -113,7 +113,6 @@ struct phy_override_seq { * @phy: generic phy * @base: iomapped memory space for snps hs phy * - * @cfg_ahb_clk: AHB2PHY interface clock * @ref_clk: phy reference clock * @phy_reset: phy reset control * @vregs: regulator supplies bulk data @@ -125,7 +124,6 @@ struct qcom_snps_hsphy { struct phy *phy; void __iomem *base; - struct clk *cfg_ahb_clk; struct clk *ref_clk; struct reset_control *phy_reset; struct regulator_bulk_data vregs[SNPS_HS_NUM_VREGS]; @@ -165,7 +163,6 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) 0, USB2_AUTO_RESUME); } - clk_disable_unprepare(hsphy->cfg_ahb_clk); clk_disable_unprepare(hsphy->ref_clk); return 0; } @@ -176,12 +173,6 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) dev_dbg(&hsphy->phy->dev, "Resume QCOM SNPS PHY, mode\n"); - ret = clk_prepare_enable(hsphy->cfg_ahb_clk); - if (ret) { - dev_err(&hsphy->phy->dev, "failed to enable cfg ahb clock\n"); - return ret; - } - ret = clk_prepare_enable(hsphy->ref_clk); if (ret) { dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); @@ -381,16 +372,10 @@ static int qcom_snps_hsphy_init(struct phy *phy) if (ret) return ret; - ret = clk_prepare_enable(hsphy->cfg_ahb_clk); - if (ret) { - dev_err(&phy->dev, "failed to enable cfg ahb clock, %d\n", ret); - goto poweroff_phy; - } - ret = clk_prepare_enable(hsphy->ref_clk); if (ret) { dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); - goto disable_ahb_clk; + goto poweroff_phy; } ret = reset_control_assert(hsphy->phy_reset); @@ -463,8 +448,6 @@ static int qcom_snps_hsphy_init(struct phy *phy) disable_ref_clk: clk_disable_unprepare(hsphy->ref_clk); -disable_ahb_clk: - clk_disable_unprepare(hsphy->cfg_ahb_clk); poweroff_phy: regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); @@ -476,7 +459,6 @@ static int qcom_snps_hsphy_exit(struct phy *phy) struct qcom_snps_hsphy *hsphy = phy_get_drvdata(phy); reset_control_assert(hsphy->phy_reset); - clk_disable_unprepare(hsphy->cfg_ahb_clk); clk_disable_unprepare(hsphy->ref_clk); regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); hsphy->phy_initialized = false; -- 2.40.1 -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 2/2] phy: qcom-snps-femto-v2: Remove AHB2PHY interface clock 2023-05-29 18:56 ` Adrien Thierry @ 2023-05-29 21:19 ` Bjorn Andersson -1 siblings, 0 replies; 20+ messages in thread From: Bjorn Andersson @ 2023-05-29 21:19 UTC (permalink / raw) To: Adrien Thierry Cc: Andy Gross, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy On Mon, May 29, 2023 at 02:56:37PM -0400, Adrien Thierry wrote: > The AHB2PHY interface clock cfg_ahb_clk is not assigned anywhere in the > driver. Moreover, it's not used by any device tree, nor is present in > the qcom,usb-snps-femto-v2 bindings. Remove it. > The downstream driver deals with cfg_ahb as well, so I think it would be more appropriate to ensure that it's actually wired up. And in that case, I would find it preferable to switch to use the clk_bulk API for the introduction of the ref clk - to clean up the error paths if nothing else. Regards, Bjorn > Signed-off-by: Adrien Thierry <athierry@redhat.com> > --- > I'm not 100% sure if the clock should be removed, or if it should be added > to bindings and device trees that use this PHY. Better informed opinions > on the topic are highly welcome. > > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +------------------ > 1 file changed, 1 insertion(+), 19 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > index 8abf482e81a8..2d9c1105e28c 100644 > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > @@ -113,7 +113,6 @@ struct phy_override_seq { > * @phy: generic phy > * @base: iomapped memory space for snps hs phy > * > - * @cfg_ahb_clk: AHB2PHY interface clock > * @ref_clk: phy reference clock > * @phy_reset: phy reset control > * @vregs: regulator supplies bulk data > @@ -125,7 +124,6 @@ struct qcom_snps_hsphy { > struct phy *phy; > void __iomem *base; > > - struct clk *cfg_ahb_clk; > struct clk *ref_clk; > struct reset_control *phy_reset; > struct regulator_bulk_data vregs[SNPS_HS_NUM_VREGS]; > @@ -165,7 +163,6 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > 0, USB2_AUTO_RESUME); > } > > - clk_disable_unprepare(hsphy->cfg_ahb_clk); > clk_disable_unprepare(hsphy->ref_clk); > return 0; > } > @@ -176,12 +173,6 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > > dev_dbg(&hsphy->phy->dev, "Resume QCOM SNPS PHY, mode\n"); > > - ret = clk_prepare_enable(hsphy->cfg_ahb_clk); > - if (ret) { > - dev_err(&hsphy->phy->dev, "failed to enable cfg ahb clock\n"); > - return ret; > - } > - > ret = clk_prepare_enable(hsphy->ref_clk); > if (ret) { > dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > @@ -381,16 +372,10 @@ static int qcom_snps_hsphy_init(struct phy *phy) > if (ret) > return ret; > > - ret = clk_prepare_enable(hsphy->cfg_ahb_clk); > - if (ret) { > - dev_err(&phy->dev, "failed to enable cfg ahb clock, %d\n", ret); > - goto poweroff_phy; > - } > - > ret = clk_prepare_enable(hsphy->ref_clk); > if (ret) { > dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > - goto disable_ahb_clk; > + goto poweroff_phy; > } > > ret = reset_control_assert(hsphy->phy_reset); > @@ -463,8 +448,6 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > disable_ref_clk: > clk_disable_unprepare(hsphy->ref_clk); > -disable_ahb_clk: > - clk_disable_unprepare(hsphy->cfg_ahb_clk); > poweroff_phy: > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > > @@ -476,7 +459,6 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > struct qcom_snps_hsphy *hsphy = phy_get_drvdata(phy); > > reset_control_assert(hsphy->phy_reset); > - clk_disable_unprepare(hsphy->cfg_ahb_clk); > clk_disable_unprepare(hsphy->ref_clk); > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > hsphy->phy_initialized = false; > -- > 2.40.1 > ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 2/2] phy: qcom-snps-femto-v2: Remove AHB2PHY interface clock @ 2023-05-29 21:19 ` Bjorn Andersson 0 siblings, 0 replies; 20+ messages in thread From: Bjorn Andersson @ 2023-05-29 21:19 UTC (permalink / raw) To: Adrien Thierry Cc: Andy Gross, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy On Mon, May 29, 2023 at 02:56:37PM -0400, Adrien Thierry wrote: > The AHB2PHY interface clock cfg_ahb_clk is not assigned anywhere in the > driver. Moreover, it's not used by any device tree, nor is present in > the qcom,usb-snps-femto-v2 bindings. Remove it. > The downstream driver deals with cfg_ahb as well, so I think it would be more appropriate to ensure that it's actually wired up. And in that case, I would find it preferable to switch to use the clk_bulk API for the introduction of the ref clk - to clean up the error paths if nothing else. Regards, Bjorn > Signed-off-by: Adrien Thierry <athierry@redhat.com> > --- > I'm not 100% sure if the clock should be removed, or if it should be added > to bindings and device trees that use this PHY. Better informed opinions > on the topic are highly welcome. > > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +------------------ > 1 file changed, 1 insertion(+), 19 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > index 8abf482e81a8..2d9c1105e28c 100644 > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > @@ -113,7 +113,6 @@ struct phy_override_seq { > * @phy: generic phy > * @base: iomapped memory space for snps hs phy > * > - * @cfg_ahb_clk: AHB2PHY interface clock > * @ref_clk: phy reference clock > * @phy_reset: phy reset control > * @vregs: regulator supplies bulk data > @@ -125,7 +124,6 @@ struct qcom_snps_hsphy { > struct phy *phy; > void __iomem *base; > > - struct clk *cfg_ahb_clk; > struct clk *ref_clk; > struct reset_control *phy_reset; > struct regulator_bulk_data vregs[SNPS_HS_NUM_VREGS]; > @@ -165,7 +163,6 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > 0, USB2_AUTO_RESUME); > } > > - clk_disable_unprepare(hsphy->cfg_ahb_clk); > clk_disable_unprepare(hsphy->ref_clk); > return 0; > } > @@ -176,12 +173,6 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > > dev_dbg(&hsphy->phy->dev, "Resume QCOM SNPS PHY, mode\n"); > > - ret = clk_prepare_enable(hsphy->cfg_ahb_clk); > - if (ret) { > - dev_err(&hsphy->phy->dev, "failed to enable cfg ahb clock\n"); > - return ret; > - } > - > ret = clk_prepare_enable(hsphy->ref_clk); > if (ret) { > dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > @@ -381,16 +372,10 @@ static int qcom_snps_hsphy_init(struct phy *phy) > if (ret) > return ret; > > - ret = clk_prepare_enable(hsphy->cfg_ahb_clk); > - if (ret) { > - dev_err(&phy->dev, "failed to enable cfg ahb clock, %d\n", ret); > - goto poweroff_phy; > - } > - > ret = clk_prepare_enable(hsphy->ref_clk); > if (ret) { > dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > - goto disable_ahb_clk; > + goto poweroff_phy; > } > > ret = reset_control_assert(hsphy->phy_reset); > @@ -463,8 +448,6 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > disable_ref_clk: > clk_disable_unprepare(hsphy->ref_clk); > -disable_ahb_clk: > - clk_disable_unprepare(hsphy->cfg_ahb_clk); > poweroff_phy: > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > > @@ -476,7 +459,6 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > struct qcom_snps_hsphy *hsphy = phy_get_drvdata(phy); > > reset_control_assert(hsphy->phy_reset); > - clk_disable_unprepare(hsphy->cfg_ahb_clk); > clk_disable_unprepare(hsphy->ref_clk); > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > hsphy->phy_initialized = false; > -- > 2.40.1 > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 2/2] phy: qcom-snps-femto-v2: Remove AHB2PHY interface clock 2023-05-29 21:19 ` Bjorn Andersson @ 2023-06-01 17:12 ` Adrien Thierry -1 siblings, 0 replies; 20+ messages in thread From: Adrien Thierry @ 2023-06-01 17:12 UTC (permalink / raw) To: Bjorn Andersson Cc: Andy Gross, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy Hi Bjorn, On Mon, May 29, 2023 at 02:19:21PM -0700, Bjorn Andersson wrote: > On Mon, May 29, 2023 at 02:56:37PM -0400, Adrien Thierry wrote: > > The AHB2PHY interface clock cfg_ahb_clk is not assigned anywhere in the > > driver. Moreover, it's not used by any device tree, nor is present in > > the qcom,usb-snps-femto-v2 bindings. Remove it. > > > > The downstream driver deals with cfg_ahb as well, so I think it would be > more appropriate to ensure that it's actually wired up. > > And in that case, I would find it preferable to switch to use the > clk_bulk API for the introduction of the ref clk - to clean up the error > paths if nothing else. > I won't be able to properly wire the cfg_ahb clock in the device trees because I've got no way of knowing which clock to use for cfg_ahb in the various SoCs, but I can at least try to clean the code by using the clk_bulk API. > Regards, > Bjorn > > > Signed-off-by: Adrien Thierry <athierry@redhat.com> > > --- > > I'm not 100% sure if the clock should be removed, or if it should be added > > to bindings and device trees that use this PHY. Better informed opinions > > on the topic are highly welcome. > > > > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +------------------ > > 1 file changed, 1 insertion(+), 19 deletions(-) > > > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > index 8abf482e81a8..2d9c1105e28c 100644 > > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > @@ -113,7 +113,6 @@ struct phy_override_seq { > > * @phy: generic phy > > * @base: iomapped memory space for snps hs phy > > * > > - * @cfg_ahb_clk: AHB2PHY interface clock > > * @ref_clk: phy reference clock > > * @phy_reset: phy reset control > > * @vregs: regulator supplies bulk data > > @@ -125,7 +124,6 @@ struct qcom_snps_hsphy { > > struct phy *phy; > > void __iomem *base; > > > > - struct clk *cfg_ahb_clk; > > struct clk *ref_clk; > > struct reset_control *phy_reset; > > struct regulator_bulk_data vregs[SNPS_HS_NUM_VREGS]; > > @@ -165,7 +163,6 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > > 0, USB2_AUTO_RESUME); > > } > > > > - clk_disable_unprepare(hsphy->cfg_ahb_clk); > > clk_disable_unprepare(hsphy->ref_clk); > > return 0; > > } > > @@ -176,12 +173,6 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > > > > dev_dbg(&hsphy->phy->dev, "Resume QCOM SNPS PHY, mode\n"); > > > > - ret = clk_prepare_enable(hsphy->cfg_ahb_clk); > > - if (ret) { > > - dev_err(&hsphy->phy->dev, "failed to enable cfg ahb clock\n"); > > - return ret; > > - } > > - > > ret = clk_prepare_enable(hsphy->ref_clk); > > if (ret) { > > dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > > @@ -381,16 +372,10 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > if (ret) > > return ret; > > > > - ret = clk_prepare_enable(hsphy->cfg_ahb_clk); > > - if (ret) { > > - dev_err(&phy->dev, "failed to enable cfg ahb clock, %d\n", ret); > > - goto poweroff_phy; > > - } > > - > > ret = clk_prepare_enable(hsphy->ref_clk); > > if (ret) { > > dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > > - goto disable_ahb_clk; > > + goto poweroff_phy; > > } > > > > ret = reset_control_assert(hsphy->phy_reset); > > @@ -463,8 +448,6 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > > disable_ref_clk: > > clk_disable_unprepare(hsphy->ref_clk); > > -disable_ahb_clk: > > - clk_disable_unprepare(hsphy->cfg_ahb_clk); > > poweroff_phy: > > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > > > > @@ -476,7 +459,6 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > > struct qcom_snps_hsphy *hsphy = phy_get_drvdata(phy); > > > > reset_control_assert(hsphy->phy_reset); > > - clk_disable_unprepare(hsphy->cfg_ahb_clk); > > clk_disable_unprepare(hsphy->ref_clk); > > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > > hsphy->phy_initialized = false; > > -- > > 2.40.1 > > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy ^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH RFC 2/2] phy: qcom-snps-femto-v2: Remove AHB2PHY interface clock @ 2023-06-01 17:12 ` Adrien Thierry 0 siblings, 0 replies; 20+ messages in thread From: Adrien Thierry @ 2023-06-01 17:12 UTC (permalink / raw) To: Bjorn Andersson Cc: Andy Gross, Konrad Dybcio, Vinod Koul, Kishon Vijay Abraham I, linux-arm-msm, linux-phy Hi Bjorn, On Mon, May 29, 2023 at 02:19:21PM -0700, Bjorn Andersson wrote: > On Mon, May 29, 2023 at 02:56:37PM -0400, Adrien Thierry wrote: > > The AHB2PHY interface clock cfg_ahb_clk is not assigned anywhere in the > > driver. Moreover, it's not used by any device tree, nor is present in > > the qcom,usb-snps-femto-v2 bindings. Remove it. > > > > The downstream driver deals with cfg_ahb as well, so I think it would be > more appropriate to ensure that it's actually wired up. > > And in that case, I would find it preferable to switch to use the > clk_bulk API for the introduction of the ref clk - to clean up the error > paths if nothing else. > I won't be able to properly wire the cfg_ahb clock in the device trees because I've got no way of knowing which clock to use for cfg_ahb in the various SoCs, but I can at least try to clean the code by using the clk_bulk API. > Regards, > Bjorn > > > Signed-off-by: Adrien Thierry <athierry@redhat.com> > > --- > > I'm not 100% sure if the clock should be removed, or if it should be added > > to bindings and device trees that use this PHY. Better informed opinions > > on the topic are highly welcome. > > > > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 20 +------------------ > > 1 file changed, 1 insertion(+), 19 deletions(-) > > > > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > index 8abf482e81a8..2d9c1105e28c 100644 > > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c > > @@ -113,7 +113,6 @@ struct phy_override_seq { > > * @phy: generic phy > > * @base: iomapped memory space for snps hs phy > > * > > - * @cfg_ahb_clk: AHB2PHY interface clock > > * @ref_clk: phy reference clock > > * @phy_reset: phy reset control > > * @vregs: regulator supplies bulk data > > @@ -125,7 +124,6 @@ struct qcom_snps_hsphy { > > struct phy *phy; > > void __iomem *base; > > > > - struct clk *cfg_ahb_clk; > > struct clk *ref_clk; > > struct reset_control *phy_reset; > > struct regulator_bulk_data vregs[SNPS_HS_NUM_VREGS]; > > @@ -165,7 +163,6 @@ static int qcom_snps_hsphy_suspend(struct qcom_snps_hsphy *hsphy) > > 0, USB2_AUTO_RESUME); > > } > > > > - clk_disable_unprepare(hsphy->cfg_ahb_clk); > > clk_disable_unprepare(hsphy->ref_clk); > > return 0; > > } > > @@ -176,12 +173,6 @@ static int qcom_snps_hsphy_resume(struct qcom_snps_hsphy *hsphy) > > > > dev_dbg(&hsphy->phy->dev, "Resume QCOM SNPS PHY, mode\n"); > > > > - ret = clk_prepare_enable(hsphy->cfg_ahb_clk); > > - if (ret) { > > - dev_err(&hsphy->phy->dev, "failed to enable cfg ahb clock\n"); > > - return ret; > > - } > > - > > ret = clk_prepare_enable(hsphy->ref_clk); > > if (ret) { > > dev_err(&hsphy->phy->dev, "failed to enable ref clock\n"); > > @@ -381,16 +372,10 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > if (ret) > > return ret; > > > > - ret = clk_prepare_enable(hsphy->cfg_ahb_clk); > > - if (ret) { > > - dev_err(&phy->dev, "failed to enable cfg ahb clock, %d\n", ret); > > - goto poweroff_phy; > > - } > > - > > ret = clk_prepare_enable(hsphy->ref_clk); > > if (ret) { > > dev_err(&phy->dev, "failed to enable ref clock, %d\n", ret); > > - goto disable_ahb_clk; > > + goto poweroff_phy; > > } > > > > ret = reset_control_assert(hsphy->phy_reset); > > @@ -463,8 +448,6 @@ static int qcom_snps_hsphy_init(struct phy *phy) > > > > disable_ref_clk: > > clk_disable_unprepare(hsphy->ref_clk); > > -disable_ahb_clk: > > - clk_disable_unprepare(hsphy->cfg_ahb_clk); > > poweroff_phy: > > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > > > > @@ -476,7 +459,6 @@ static int qcom_snps_hsphy_exit(struct phy *phy) > > struct qcom_snps_hsphy *hsphy = phy_get_drvdata(phy); > > > > reset_control_assert(hsphy->phy_reset); > > - clk_disable_unprepare(hsphy->cfg_ahb_clk); > > clk_disable_unprepare(hsphy->ref_clk); > > regulator_bulk_disable(ARRAY_SIZE(hsphy->vregs), hsphy->vregs); > > hsphy->phy_initialized = false; > > -- > > 2.40.1 > > ^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2023-06-01 17:12 UTC | newest] Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2023-05-29 18:56 [PATCH RFC 0/2] Clock fixes for qcom-snps-femto-v2 PHY driver Adrien Thierry 2023-05-29 18:56 ` Adrien Thierry 2023-05-29 18:56 ` [PATCH RFC 1/2] phy: qcom-snps-femto-v2: properly enable ref clock Adrien Thierry 2023-05-29 18:56 ` Adrien Thierry 2023-05-29 21:16 ` Bjorn Andersson 2023-05-29 21:16 ` Bjorn Andersson 2023-05-30 18:46 ` Adrien Thierry 2023-05-30 18:46 ` Adrien Thierry 2023-05-31 2:34 ` Bjorn Andersson 2023-05-31 2:34 ` Bjorn Andersson 2023-06-01 17:09 ` Adrien Thierry 2023-06-01 17:09 ` Adrien Thierry 2023-05-30 13:22 ` Andrew Halaney 2023-05-30 13:22 ` Andrew Halaney 2023-05-29 18:56 ` [PATCH RFC 2/2] phy: qcom-snps-femto-v2: Remove AHB2PHY interface clock Adrien Thierry 2023-05-29 18:56 ` Adrien Thierry 2023-05-29 21:19 ` Bjorn Andersson 2023-05-29 21:19 ` Bjorn Andersson 2023-06-01 17:12 ` Adrien Thierry 2023-06-01 17:12 ` Adrien Thierry
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