* [PATCH v5 00/11] MediaTek DDP GAMMA - 12-bit LUT support
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel
Changes in v5:
- Removed incorrect comment on default LUT size and bits
- Removed useless check for num_lut_banks
- Added comment about CMDQ implementation on patch 5
- Evaluated passing lut size/bits from AAL, idea discarded as
the implementation would be rather tricky while bringing no
benefits.
Changes in v4:
- Fixed assignment typo appeared in v3
Changes in v3:
- Fixed issues due to variables renaming during cleanup (oops)
- This is actually the right series, since v2 was taken from the
wrong kernel tree.... :-)
Changes in v2:
- Added explicit inclusion of linux/bitfield.h in patch [06/11]
This series adds support for GAMMA IP requiring and/or supporting
a 12-bits LUT using a slightly different register layout and programming
sequence for multiple LUT banks: this IP version is currently found
on a number of SoCs, not only including the Chromebook/IoT oriented
Kompanio 1200/1380 MT8195/MT8195T, but also Smartphone chips such as
the Dimensity 9200 (MT6985) and others.
This series was tested on MT8195, MT8192, MT8173, MT6795:
* MT6795, MT8192, MT8173: No regression, works fine.
* MT8195: Color correction is finally working!
AngeloGioacchino Del Regno (10):
drm/mediatek: gamma: Reduce indentation in mtk_gamma_set_common()
drm/mediatek: gamma: Support SoC specific LUT size
drm/mediatek: gamma: Improve and simplify HW LUT calculation
drm/mediatek: gamma: Enable the Gamma LUT table only after programming
drm/mediatek: gamma: Use bitfield macros
drm/mediatek: gamma: Support specifying number of bits per LUT
component
drm/mediatek: gamma: Support multi-bank gamma LUT
drm/mediatek: gamma: Add support for 12-bit LUT and MT8195
drm/mediatek: gamma: Make sure relay mode is disabled
drm/mediatek: gamma: Program gamma LUT type for descending or rising
Jason-JH.Lin (1):
drm/mediatek: gamma: Adjust mtk_drm_gamma_set_common parameters
drivers/gpu/drm/mediatek/mtk_disp_aal.c | 2 +-
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 +-
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 193 ++++++++++++++++----
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 +-
drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 1 -
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 9 +
7 files changed, 177 insertions(+), 36 deletions(-)
--
2.40.1
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v5 00/11] MediaTek DDP GAMMA - 12-bit LUT support
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: linux-kernel, dri-devel, linux-mediatek, wenst, matthias.bgg,
kernel, linux-arm-kernel, angelogioacchino.delregno
Changes in v5:
- Removed incorrect comment on default LUT size and bits
- Removed useless check for num_lut_banks
- Added comment about CMDQ implementation on patch 5
- Evaluated passing lut size/bits from AAL, idea discarded as
the implementation would be rather tricky while bringing no
benefits.
Changes in v4:
- Fixed assignment typo appeared in v3
Changes in v3:
- Fixed issues due to variables renaming during cleanup (oops)
- This is actually the right series, since v2 was taken from the
wrong kernel tree.... :-)
Changes in v2:
- Added explicit inclusion of linux/bitfield.h in patch [06/11]
This series adds support for GAMMA IP requiring and/or supporting
a 12-bits LUT using a slightly different register layout and programming
sequence for multiple LUT banks: this IP version is currently found
on a number of SoCs, not only including the Chromebook/IoT oriented
Kompanio 1200/1380 MT8195/MT8195T, but also Smartphone chips such as
the Dimensity 9200 (MT6985) and others.
This series was tested on MT8195, MT8192, MT8173, MT6795:
* MT6795, MT8192, MT8173: No regression, works fine.
* MT8195: Color correction is finally working!
AngeloGioacchino Del Regno (10):
drm/mediatek: gamma: Reduce indentation in mtk_gamma_set_common()
drm/mediatek: gamma: Support SoC specific LUT size
drm/mediatek: gamma: Improve and simplify HW LUT calculation
drm/mediatek: gamma: Enable the Gamma LUT table only after programming
drm/mediatek: gamma: Use bitfield macros
drm/mediatek: gamma: Support specifying number of bits per LUT
component
drm/mediatek: gamma: Support multi-bank gamma LUT
drm/mediatek: gamma: Add support for 12-bit LUT and MT8195
drm/mediatek: gamma: Make sure relay mode is disabled
drm/mediatek: gamma: Program gamma LUT type for descending or rising
Jason-JH.Lin (1):
drm/mediatek: gamma: Adjust mtk_drm_gamma_set_common parameters
drivers/gpu/drm/mediatek/mtk_disp_aal.c | 2 +-
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 +-
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 193 ++++++++++++++++----
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 +-
drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 1 -
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 9 +
7 files changed, 177 insertions(+), 36 deletions(-)
--
2.40.1
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v5 00/11] MediaTek DDP GAMMA - 12-bit LUT support
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel
Changes in v5:
- Removed incorrect comment on default LUT size and bits
- Removed useless check for num_lut_banks
- Added comment about CMDQ implementation on patch 5
- Evaluated passing lut size/bits from AAL, idea discarded as
the implementation would be rather tricky while bringing no
benefits.
Changes in v4:
- Fixed assignment typo appeared in v3
Changes in v3:
- Fixed issues due to variables renaming during cleanup (oops)
- This is actually the right series, since v2 was taken from the
wrong kernel tree.... :-)
Changes in v2:
- Added explicit inclusion of linux/bitfield.h in patch [06/11]
This series adds support for GAMMA IP requiring and/or supporting
a 12-bits LUT using a slightly different register layout and programming
sequence for multiple LUT banks: this IP version is currently found
on a number of SoCs, not only including the Chromebook/IoT oriented
Kompanio 1200/1380 MT8195/MT8195T, but also Smartphone chips such as
the Dimensity 9200 (MT6985) and others.
This series was tested on MT8195, MT8192, MT8173, MT6795:
* MT6795, MT8192, MT8173: No regression, works fine.
* MT8195: Color correction is finally working!
AngeloGioacchino Del Regno (10):
drm/mediatek: gamma: Reduce indentation in mtk_gamma_set_common()
drm/mediatek: gamma: Support SoC specific LUT size
drm/mediatek: gamma: Improve and simplify HW LUT calculation
drm/mediatek: gamma: Enable the Gamma LUT table only after programming
drm/mediatek: gamma: Use bitfield macros
drm/mediatek: gamma: Support specifying number of bits per LUT
component
drm/mediatek: gamma: Support multi-bank gamma LUT
drm/mediatek: gamma: Add support for 12-bit LUT and MT8195
drm/mediatek: gamma: Make sure relay mode is disabled
drm/mediatek: gamma: Program gamma LUT type for descending or rising
Jason-JH.Lin (1):
drm/mediatek: gamma: Adjust mtk_drm_gamma_set_common parameters
drivers/gpu/drm/mediatek/mtk_disp_aal.c | 2 +-
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 +-
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 193 ++++++++++++++++----
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 +-
drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 1 -
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 9 +
7 files changed, 177 insertions(+), 36 deletions(-)
--
2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH v5 01/11] drm/mediatek: gamma: Adjust mtk_drm_gamma_set_common parameters
2023-06-01 12:10 ` AngeloGioacchino Del Regno
(?)
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH.Lin
From: "Jason-JH.Lin" <jason-jh.lin@mediatek.com>
Adjust the parameters in mtk_drm_gamma_set_common()
- add (struct device *dev) to get lut_diff from gamma's driver data
- remove (bool lut_diff) and use false as default value in the function
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/gpu/drm/mediatek/mtk_disp_aal.c | 2 +-
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 2 +-
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 15 +++++++++------
3 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_aal.c b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
index 434e8a9ce8ab..8ddf7a97e583 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_aal.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
@@ -67,7 +67,7 @@ void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state)
struct mtk_disp_aal *aal = dev_get_drvdata(dev);
if (aal->data && aal->data->has_gamma)
- mtk_gamma_set_common(aal->regs, state, false);
+ mtk_gamma_set_common(NULL, aal->regs, state);
}
void mtk_aal_start(struct device *dev)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
index 2254038519e1..75045932353e 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
@@ -54,7 +54,7 @@ void mtk_gamma_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state);
-void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state, bool lut_diff);
+void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state);
void mtk_gamma_start(struct device *dev);
void mtk_gamma_stop(struct device *dev);
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index c844942603f7..99be515a941b 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -55,14 +55,21 @@ void mtk_gamma_clk_disable(struct device *dev)
clk_disable_unprepare(gamma->clk);
}
-void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state, bool lut_diff)
+void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
+ struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
unsigned int i, reg;
struct drm_color_lut *lut;
void __iomem *lut_base;
+ bool lut_diff;
u32 word;
u32 diff[3] = {0};
+ if (gamma && gamma->data)
+ lut_diff = gamma->data->lut_diff;
+ else
+ lut_diff = false;
+
if (state->gamma_lut) {
reg = readl(regs + DISP_GAMMA_CFG);
reg = reg | GAMMA_LUT_EN;
@@ -92,12 +99,8 @@ void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state, bool
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
- bool lut_diff = false;
-
- if (gamma->data)
- lut_diff = gamma->data->lut_diff;
- mtk_gamma_set_common(gamma->regs, state, lut_diff);
+ mtk_gamma_set_common(dev, gamma->regs, state);
}
void mtk_gamma_config(struct device *dev, unsigned int w,
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 01/11] drm/mediatek: gamma: Adjust mtk_drm_gamma_set_common parameters
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: Jason-JH.Lin, linux-kernel, dri-devel, linux-mediatek, wenst,
matthias.bgg, kernel, linux-arm-kernel,
angelogioacchino.delregno
From: "Jason-JH.Lin" <jason-jh.lin@mediatek.com>
Adjust the parameters in mtk_drm_gamma_set_common()
- add (struct device *dev) to get lut_diff from gamma's driver data
- remove (bool lut_diff) and use false as default value in the function
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/gpu/drm/mediatek/mtk_disp_aal.c | 2 +-
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 2 +-
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 15 +++++++++------
3 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_aal.c b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
index 434e8a9ce8ab..8ddf7a97e583 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_aal.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
@@ -67,7 +67,7 @@ void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state)
struct mtk_disp_aal *aal = dev_get_drvdata(dev);
if (aal->data && aal->data->has_gamma)
- mtk_gamma_set_common(aal->regs, state, false);
+ mtk_gamma_set_common(NULL, aal->regs, state);
}
void mtk_aal_start(struct device *dev)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
index 2254038519e1..75045932353e 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
@@ -54,7 +54,7 @@ void mtk_gamma_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state);
-void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state, bool lut_diff);
+void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state);
void mtk_gamma_start(struct device *dev);
void mtk_gamma_stop(struct device *dev);
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index c844942603f7..99be515a941b 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -55,14 +55,21 @@ void mtk_gamma_clk_disable(struct device *dev)
clk_disable_unprepare(gamma->clk);
}
-void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state, bool lut_diff)
+void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
+ struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
unsigned int i, reg;
struct drm_color_lut *lut;
void __iomem *lut_base;
+ bool lut_diff;
u32 word;
u32 diff[3] = {0};
+ if (gamma && gamma->data)
+ lut_diff = gamma->data->lut_diff;
+ else
+ lut_diff = false;
+
if (state->gamma_lut) {
reg = readl(regs + DISP_GAMMA_CFG);
reg = reg | GAMMA_LUT_EN;
@@ -92,12 +99,8 @@ void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state, bool
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
- bool lut_diff = false;
-
- if (gamma->data)
- lut_diff = gamma->data->lut_diff;
- mtk_gamma_set_common(gamma->regs, state, lut_diff);
+ mtk_gamma_set_common(dev, gamma->regs, state);
}
void mtk_gamma_config(struct device *dev, unsigned int w,
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 01/11] drm/mediatek: gamma: Adjust mtk_drm_gamma_set_common parameters
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH.Lin
From: "Jason-JH.Lin" <jason-jh.lin@mediatek.com>
Adjust the parameters in mtk_drm_gamma_set_common()
- add (struct device *dev) to get lut_diff from gamma's driver data
- remove (bool lut_diff) and use false as default value in the function
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/gpu/drm/mediatek/mtk_disp_aal.c | 2 +-
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 2 +-
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 15 +++++++++------
3 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_aal.c b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
index 434e8a9ce8ab..8ddf7a97e583 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_aal.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
@@ -67,7 +67,7 @@ void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state)
struct mtk_disp_aal *aal = dev_get_drvdata(dev);
if (aal->data && aal->data->has_gamma)
- mtk_gamma_set_common(aal->regs, state, false);
+ mtk_gamma_set_common(NULL, aal->regs, state);
}
void mtk_aal_start(struct device *dev)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
index 2254038519e1..75045932353e 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
@@ -54,7 +54,7 @@ void mtk_gamma_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state);
-void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state, bool lut_diff);
+void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state);
void mtk_gamma_start(struct device *dev);
void mtk_gamma_stop(struct device *dev);
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index c844942603f7..99be515a941b 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -55,14 +55,21 @@ void mtk_gamma_clk_disable(struct device *dev)
clk_disable_unprepare(gamma->clk);
}
-void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state, bool lut_diff)
+void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
+ struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
unsigned int i, reg;
struct drm_color_lut *lut;
void __iomem *lut_base;
+ bool lut_diff;
u32 word;
u32 diff[3] = {0};
+ if (gamma && gamma->data)
+ lut_diff = gamma->data->lut_diff;
+ else
+ lut_diff = false;
+
if (state->gamma_lut) {
reg = readl(regs + DISP_GAMMA_CFG);
reg = reg | GAMMA_LUT_EN;
@@ -92,12 +99,8 @@ void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state, bool
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
- bool lut_diff = false;
-
- if (gamma->data)
- lut_diff = gamma->data->lut_diff;
- mtk_gamma_set_common(gamma->regs, state, lut_diff);
+ mtk_gamma_set_common(dev, gamma->regs, state);
}
void mtk_gamma_config(struct device *dev, unsigned int w,
--
2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 02/11] drm/mediatek: gamma: Reduce indentation in mtk_gamma_set_common()
2023-06-01 12:10 ` AngeloGioacchino Del Regno
(?)
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Invert the check for state->gamma_lut and move it at the beginning
of the function to reduce indentation: this prepares the code for
keeping readability on later additions.
This commit brings no functional changes.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 45 ++++++++++++-----------
1 file changed, 23 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 99be515a941b..ce6f2499b891 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -65,34 +65,35 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
u32 word;
u32 diff[3] = {0};
+ /* If there's no gamma lut there's nothing to do here. */
+ if (!state->gamma_lut)
+ return;
+
if (gamma && gamma->data)
lut_diff = gamma->data->lut_diff;
else
lut_diff = false;
- if (state->gamma_lut) {
- reg = readl(regs + DISP_GAMMA_CFG);
- reg = reg | GAMMA_LUT_EN;
- writel(reg, regs + DISP_GAMMA_CFG);
- lut_base = regs + DISP_GAMMA_LUT;
- lut = (struct drm_color_lut *)state->gamma_lut->data;
- for (i = 0; i < MTK_LUT_SIZE; i++) {
-
- if (!lut_diff || (i % 2 == 0)) {
- word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
- (((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
- ((lut[i].blue >> 6) & LUT_10BIT_MASK);
- } else {
- diff[0] = (lut[i].red >> 6) - (lut[i - 1].red >> 6);
- diff[1] = (lut[i].green >> 6) - (lut[i - 1].green >> 6);
- diff[2] = (lut[i].blue >> 6) - (lut[i - 1].blue >> 6);
-
- word = ((diff[0] & LUT_10BIT_MASK) << 20) +
- ((diff[1] & LUT_10BIT_MASK) << 10) +
- (diff[2] & LUT_10BIT_MASK);
- }
- writel(word, (lut_base + i * 4));
+ reg = readl(regs + DISP_GAMMA_CFG);
+ reg = reg | GAMMA_LUT_EN;
+ writel(reg, regs + DISP_GAMMA_CFG);
+ lut_base = regs + DISP_GAMMA_LUT;
+ lut = (struct drm_color_lut *)state->gamma_lut->data;
+ for (i = 0; i < MTK_LUT_SIZE; i++) {
+ if (!lut_diff || (i % 2 == 0)) {
+ word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
+ (((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
+ ((lut[i].blue >> 6) & LUT_10BIT_MASK);
+ } else {
+ diff[0] = (lut[i].red >> 6) - (lut[i - 1].red >> 6);
+ diff[1] = (lut[i].green >> 6) - (lut[i - 1].green >> 6);
+ diff[2] = (lut[i].blue >> 6) - (lut[i - 1].blue >> 6);
+
+ word = ((diff[0] & LUT_10BIT_MASK) << 20) +
+ ((diff[1] & LUT_10BIT_MASK) << 10) +
+ (diff[2] & LUT_10BIT_MASK);
}
+ writel(word, (lut_base + i * 4));
}
}
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 02/11] drm/mediatek: gamma: Reduce indentation in mtk_gamma_set_common()
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: Jason-JH . Lin, linux-kernel, dri-devel, linux-mediatek, wenst,
matthias.bgg, kernel, linux-arm-kernel,
angelogioacchino.delregno
Invert the check for state->gamma_lut and move it at the beginning
of the function to reduce indentation: this prepares the code for
keeping readability on later additions.
This commit brings no functional changes.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 45 ++++++++++++-----------
1 file changed, 23 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 99be515a941b..ce6f2499b891 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -65,34 +65,35 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
u32 word;
u32 diff[3] = {0};
+ /* If there's no gamma lut there's nothing to do here. */
+ if (!state->gamma_lut)
+ return;
+
if (gamma && gamma->data)
lut_diff = gamma->data->lut_diff;
else
lut_diff = false;
- if (state->gamma_lut) {
- reg = readl(regs + DISP_GAMMA_CFG);
- reg = reg | GAMMA_LUT_EN;
- writel(reg, regs + DISP_GAMMA_CFG);
- lut_base = regs + DISP_GAMMA_LUT;
- lut = (struct drm_color_lut *)state->gamma_lut->data;
- for (i = 0; i < MTK_LUT_SIZE; i++) {
-
- if (!lut_diff || (i % 2 == 0)) {
- word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
- (((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
- ((lut[i].blue >> 6) & LUT_10BIT_MASK);
- } else {
- diff[0] = (lut[i].red >> 6) - (lut[i - 1].red >> 6);
- diff[1] = (lut[i].green >> 6) - (lut[i - 1].green >> 6);
- diff[2] = (lut[i].blue >> 6) - (lut[i - 1].blue >> 6);
-
- word = ((diff[0] & LUT_10BIT_MASK) << 20) +
- ((diff[1] & LUT_10BIT_MASK) << 10) +
- (diff[2] & LUT_10BIT_MASK);
- }
- writel(word, (lut_base + i * 4));
+ reg = readl(regs + DISP_GAMMA_CFG);
+ reg = reg | GAMMA_LUT_EN;
+ writel(reg, regs + DISP_GAMMA_CFG);
+ lut_base = regs + DISP_GAMMA_LUT;
+ lut = (struct drm_color_lut *)state->gamma_lut->data;
+ for (i = 0; i < MTK_LUT_SIZE; i++) {
+ if (!lut_diff || (i % 2 == 0)) {
+ word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
+ (((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
+ ((lut[i].blue >> 6) & LUT_10BIT_MASK);
+ } else {
+ diff[0] = (lut[i].red >> 6) - (lut[i - 1].red >> 6);
+ diff[1] = (lut[i].green >> 6) - (lut[i - 1].green >> 6);
+ diff[2] = (lut[i].blue >> 6) - (lut[i - 1].blue >> 6);
+
+ word = ((diff[0] & LUT_10BIT_MASK) << 20) +
+ ((diff[1] & LUT_10BIT_MASK) << 10) +
+ (diff[2] & LUT_10BIT_MASK);
}
+ writel(word, (lut_base + i * 4));
}
}
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 02/11] drm/mediatek: gamma: Reduce indentation in mtk_gamma_set_common()
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Invert the check for state->gamma_lut and move it at the beginning
of the function to reduce indentation: this prepares the code for
keeping readability on later additions.
This commit brings no functional changes.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 45 ++++++++++++-----------
1 file changed, 23 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 99be515a941b..ce6f2499b891 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -65,34 +65,35 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
u32 word;
u32 diff[3] = {0};
+ /* If there's no gamma lut there's nothing to do here. */
+ if (!state->gamma_lut)
+ return;
+
if (gamma && gamma->data)
lut_diff = gamma->data->lut_diff;
else
lut_diff = false;
- if (state->gamma_lut) {
- reg = readl(regs + DISP_GAMMA_CFG);
- reg = reg | GAMMA_LUT_EN;
- writel(reg, regs + DISP_GAMMA_CFG);
- lut_base = regs + DISP_GAMMA_LUT;
- lut = (struct drm_color_lut *)state->gamma_lut->data;
- for (i = 0; i < MTK_LUT_SIZE; i++) {
-
- if (!lut_diff || (i % 2 == 0)) {
- word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
- (((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
- ((lut[i].blue >> 6) & LUT_10BIT_MASK);
- } else {
- diff[0] = (lut[i].red >> 6) - (lut[i - 1].red >> 6);
- diff[1] = (lut[i].green >> 6) - (lut[i - 1].green >> 6);
- diff[2] = (lut[i].blue >> 6) - (lut[i - 1].blue >> 6);
-
- word = ((diff[0] & LUT_10BIT_MASK) << 20) +
- ((diff[1] & LUT_10BIT_MASK) << 10) +
- (diff[2] & LUT_10BIT_MASK);
- }
- writel(word, (lut_base + i * 4));
+ reg = readl(regs + DISP_GAMMA_CFG);
+ reg = reg | GAMMA_LUT_EN;
+ writel(reg, regs + DISP_GAMMA_CFG);
+ lut_base = regs + DISP_GAMMA_LUT;
+ lut = (struct drm_color_lut *)state->gamma_lut->data;
+ for (i = 0; i < MTK_LUT_SIZE; i++) {
+ if (!lut_diff || (i % 2 == 0)) {
+ word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
+ (((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
+ ((lut[i].blue >> 6) & LUT_10BIT_MASK);
+ } else {
+ diff[0] = (lut[i].red >> 6) - (lut[i - 1].red >> 6);
+ diff[1] = (lut[i].green >> 6) - (lut[i - 1].green >> 6);
+ diff[2] = (lut[i].blue >> 6) - (lut[i - 1].blue >> 6);
+
+ word = ((diff[0] & LUT_10BIT_MASK) << 20) +
+ ((diff[1] & LUT_10BIT_MASK) << 10) +
+ (diff[2] & LUT_10BIT_MASK);
}
+ writel(word, (lut_base + i * 4));
}
}
--
2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 03/11] drm/mediatek: gamma: Support SoC specific LUT size
2023-06-01 12:10 ` AngeloGioacchino Del Regno
(?)
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Newer SoCs support a bigger Gamma LUT table: wire up a callback
to retrieve the correct LUT size for each different Gamma IP.
Co-developed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
[Angelo: Rewritten commit message/description + porting]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 25 ++++++++++++++++++---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 ++--
drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 1 -
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 9 ++++++++
6 files changed, 35 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
index 75045932353e..e554b19f4830 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
@@ -53,6 +53,7 @@ void mtk_gamma_clk_disable(struct device *dev);
void mtk_gamma_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
+unsigned int mtk_gamma_get_lut_size(struct device *dev);
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state);
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state);
void mtk_gamma_start(struct device *dev);
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index ce6f2499b891..b25ba209e7a4 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -25,10 +25,12 @@
#define DISP_GAMMA_LUT 0x0700
#define LUT_10BIT_MASK 0x03ff
+#define LUT_SIZE_DEFAULT 512
struct mtk_disp_gamma_data {
bool has_dither;
bool lut_diff;
+ u16 lut_size;
};
/*
@@ -55,6 +57,17 @@ void mtk_gamma_clk_disable(struct device *dev)
clk_disable_unprepare(gamma->clk);
}
+unsigned int mtk_gamma_get_lut_size(struct device *dev)
+{
+ struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
+ unsigned int lut_size = LUT_SIZE_DEFAULT;
+
+ if (gamma && gamma->data)
+ lut_size = gamma->data->lut_size;
+
+ return lut_size;
+}
+
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
@@ -62,6 +75,7 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
struct drm_color_lut *lut;
void __iomem *lut_base;
bool lut_diff;
+ u16 lut_size;
u32 word;
u32 diff[3] = {0};
@@ -69,17 +83,20 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
if (!state->gamma_lut)
return;
- if (gamma && gamma->data)
+ if (gamma && gamma->data) {
lut_diff = gamma->data->lut_diff;
- else
+ lut_size = gamma->data->lut_size;
+ } else {
lut_diff = false;
+ lut_size = LUT_SIZE_DEFAULT;
+ }
reg = readl(regs + DISP_GAMMA_CFG);
reg = reg | GAMMA_LUT_EN;
writel(reg, regs + DISP_GAMMA_CFG);
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
- for (i = 0; i < MTK_LUT_SIZE; i++) {
+ for (i = 0; i < lut_size; i++) {
if (!lut_diff || (i % 2 == 0)) {
word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
(((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
@@ -196,10 +213,12 @@ static int mtk_disp_gamma_remove(struct platform_device *pdev)
static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
.has_dither = true,
+ .lut_size = 512,
};
static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
.lut_diff = true,
+ .lut_size = 512,
};
static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = {
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
index d40142842f85..0df62b076f49 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
@@ -958,8 +958,8 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
mtk_crtc->ddp_comp[i] = comp;
if (comp->funcs) {
- if (comp->funcs->gamma_set)
- gamma_lut_size = MTK_LUT_SIZE;
+ if (comp->funcs->gamma_set && comp->funcs->gamma_get_lut_size)
+ gamma_lut_size = mtk_ddp_gamma_get_lut_size(comp);
if (comp->funcs->ctm_set)
has_ctm = true;
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
index 3e9046993d09..b2e50292e57d 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
@@ -10,7 +10,6 @@
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_plane.h"
-#define MTK_LUT_SIZE 512
#define MTK_MAX_BPC 10
#define MTK_MIN_BPC 3
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index f114da4d36a9..c77af2e4000f 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -322,6 +322,7 @@ static const struct mtk_ddp_comp_funcs ddp_dsi = {
static const struct mtk_ddp_comp_funcs ddp_gamma = {
.clk_enable = mtk_gamma_clk_enable,
.clk_disable = mtk_gamma_clk_disable,
+ .gamma_get_lut_size = mtk_gamma_get_lut_size,
.gamma_set = mtk_gamma_set,
.config = mtk_gamma_config,
.start = mtk_gamma_start,
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
index febcaeef16a1..c1355960e195 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
@@ -67,6 +67,7 @@ struct mtk_ddp_comp_funcs {
void (*layer_config)(struct device *dev, unsigned int idx,
struct mtk_plane_state *state,
struct cmdq_pkt *cmdq_pkt);
+ unsigned int (*gamma_get_lut_size)(struct device *dev);
void (*gamma_set)(struct device *dev,
struct drm_crtc_state *state);
void (*bgclr_in_on)(struct device *dev);
@@ -186,6 +187,14 @@ static inline void mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp,
comp->funcs->layer_config(comp->dev, idx, state, cmdq_pkt);
}
+static inline unsigned int mtk_ddp_gamma_get_lut_size(struct mtk_ddp_comp *comp)
+{
+ if (comp->funcs && comp->funcs->gamma_get_lut_size)
+ return comp->funcs->gamma_get_lut_size(comp->dev);
+
+ return 0;
+}
+
static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp,
struct drm_crtc_state *state)
{
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 03/11] drm/mediatek: gamma: Support SoC specific LUT size
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: Jason-JH . Lin, linux-kernel, dri-devel, linux-mediatek, wenst,
matthias.bgg, kernel, linux-arm-kernel,
angelogioacchino.delregno
Newer SoCs support a bigger Gamma LUT table: wire up a callback
to retrieve the correct LUT size for each different Gamma IP.
Co-developed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
[Angelo: Rewritten commit message/description + porting]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 25 ++++++++++++++++++---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 ++--
drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 1 -
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 9 ++++++++
6 files changed, 35 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
index 75045932353e..e554b19f4830 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
@@ -53,6 +53,7 @@ void mtk_gamma_clk_disable(struct device *dev);
void mtk_gamma_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
+unsigned int mtk_gamma_get_lut_size(struct device *dev);
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state);
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state);
void mtk_gamma_start(struct device *dev);
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index ce6f2499b891..b25ba209e7a4 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -25,10 +25,12 @@
#define DISP_GAMMA_LUT 0x0700
#define LUT_10BIT_MASK 0x03ff
+#define LUT_SIZE_DEFAULT 512
struct mtk_disp_gamma_data {
bool has_dither;
bool lut_diff;
+ u16 lut_size;
};
/*
@@ -55,6 +57,17 @@ void mtk_gamma_clk_disable(struct device *dev)
clk_disable_unprepare(gamma->clk);
}
+unsigned int mtk_gamma_get_lut_size(struct device *dev)
+{
+ struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
+ unsigned int lut_size = LUT_SIZE_DEFAULT;
+
+ if (gamma && gamma->data)
+ lut_size = gamma->data->lut_size;
+
+ return lut_size;
+}
+
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
@@ -62,6 +75,7 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
struct drm_color_lut *lut;
void __iomem *lut_base;
bool lut_diff;
+ u16 lut_size;
u32 word;
u32 diff[3] = {0};
@@ -69,17 +83,20 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
if (!state->gamma_lut)
return;
- if (gamma && gamma->data)
+ if (gamma && gamma->data) {
lut_diff = gamma->data->lut_diff;
- else
+ lut_size = gamma->data->lut_size;
+ } else {
lut_diff = false;
+ lut_size = LUT_SIZE_DEFAULT;
+ }
reg = readl(regs + DISP_GAMMA_CFG);
reg = reg | GAMMA_LUT_EN;
writel(reg, regs + DISP_GAMMA_CFG);
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
- for (i = 0; i < MTK_LUT_SIZE; i++) {
+ for (i = 0; i < lut_size; i++) {
if (!lut_diff || (i % 2 == 0)) {
word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
(((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
@@ -196,10 +213,12 @@ static int mtk_disp_gamma_remove(struct platform_device *pdev)
static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
.has_dither = true,
+ .lut_size = 512,
};
static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
.lut_diff = true,
+ .lut_size = 512,
};
static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = {
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
index d40142842f85..0df62b076f49 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
@@ -958,8 +958,8 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
mtk_crtc->ddp_comp[i] = comp;
if (comp->funcs) {
- if (comp->funcs->gamma_set)
- gamma_lut_size = MTK_LUT_SIZE;
+ if (comp->funcs->gamma_set && comp->funcs->gamma_get_lut_size)
+ gamma_lut_size = mtk_ddp_gamma_get_lut_size(comp);
if (comp->funcs->ctm_set)
has_ctm = true;
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
index 3e9046993d09..b2e50292e57d 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
@@ -10,7 +10,6 @@
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_plane.h"
-#define MTK_LUT_SIZE 512
#define MTK_MAX_BPC 10
#define MTK_MIN_BPC 3
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index f114da4d36a9..c77af2e4000f 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -322,6 +322,7 @@ static const struct mtk_ddp_comp_funcs ddp_dsi = {
static const struct mtk_ddp_comp_funcs ddp_gamma = {
.clk_enable = mtk_gamma_clk_enable,
.clk_disable = mtk_gamma_clk_disable,
+ .gamma_get_lut_size = mtk_gamma_get_lut_size,
.gamma_set = mtk_gamma_set,
.config = mtk_gamma_config,
.start = mtk_gamma_start,
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
index febcaeef16a1..c1355960e195 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
@@ -67,6 +67,7 @@ struct mtk_ddp_comp_funcs {
void (*layer_config)(struct device *dev, unsigned int idx,
struct mtk_plane_state *state,
struct cmdq_pkt *cmdq_pkt);
+ unsigned int (*gamma_get_lut_size)(struct device *dev);
void (*gamma_set)(struct device *dev,
struct drm_crtc_state *state);
void (*bgclr_in_on)(struct device *dev);
@@ -186,6 +187,14 @@ static inline void mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp,
comp->funcs->layer_config(comp->dev, idx, state, cmdq_pkt);
}
+static inline unsigned int mtk_ddp_gamma_get_lut_size(struct mtk_ddp_comp *comp)
+{
+ if (comp->funcs && comp->funcs->gamma_get_lut_size)
+ return comp->funcs->gamma_get_lut_size(comp->dev);
+
+ return 0;
+}
+
static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp,
struct drm_crtc_state *state)
{
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 03/11] drm/mediatek: gamma: Support SoC specific LUT size
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Newer SoCs support a bigger Gamma LUT table: wire up a callback
to retrieve the correct LUT size for each different Gamma IP.
Co-developed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
[Angelo: Rewritten commit message/description + porting]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 25 ++++++++++++++++++---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 ++--
drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 1 -
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 9 ++++++++
6 files changed, 35 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
index 75045932353e..e554b19f4830 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
@@ -53,6 +53,7 @@ void mtk_gamma_clk_disable(struct device *dev);
void mtk_gamma_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
+unsigned int mtk_gamma_get_lut_size(struct device *dev);
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state);
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state);
void mtk_gamma_start(struct device *dev);
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index ce6f2499b891..b25ba209e7a4 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -25,10 +25,12 @@
#define DISP_GAMMA_LUT 0x0700
#define LUT_10BIT_MASK 0x03ff
+#define LUT_SIZE_DEFAULT 512
struct mtk_disp_gamma_data {
bool has_dither;
bool lut_diff;
+ u16 lut_size;
};
/*
@@ -55,6 +57,17 @@ void mtk_gamma_clk_disable(struct device *dev)
clk_disable_unprepare(gamma->clk);
}
+unsigned int mtk_gamma_get_lut_size(struct device *dev)
+{
+ struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
+ unsigned int lut_size = LUT_SIZE_DEFAULT;
+
+ if (gamma && gamma->data)
+ lut_size = gamma->data->lut_size;
+
+ return lut_size;
+}
+
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
@@ -62,6 +75,7 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
struct drm_color_lut *lut;
void __iomem *lut_base;
bool lut_diff;
+ u16 lut_size;
u32 word;
u32 diff[3] = {0};
@@ -69,17 +83,20 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
if (!state->gamma_lut)
return;
- if (gamma && gamma->data)
+ if (gamma && gamma->data) {
lut_diff = gamma->data->lut_diff;
- else
+ lut_size = gamma->data->lut_size;
+ } else {
lut_diff = false;
+ lut_size = LUT_SIZE_DEFAULT;
+ }
reg = readl(regs + DISP_GAMMA_CFG);
reg = reg | GAMMA_LUT_EN;
writel(reg, regs + DISP_GAMMA_CFG);
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
- for (i = 0; i < MTK_LUT_SIZE; i++) {
+ for (i = 0; i < lut_size; i++) {
if (!lut_diff || (i % 2 == 0)) {
word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
(((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
@@ -196,10 +213,12 @@ static int mtk_disp_gamma_remove(struct platform_device *pdev)
static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
.has_dither = true,
+ .lut_size = 512,
};
static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
.lut_diff = true,
+ .lut_size = 512,
};
static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = {
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
index d40142842f85..0df62b076f49 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
@@ -958,8 +958,8 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
mtk_crtc->ddp_comp[i] = comp;
if (comp->funcs) {
- if (comp->funcs->gamma_set)
- gamma_lut_size = MTK_LUT_SIZE;
+ if (comp->funcs->gamma_set && comp->funcs->gamma_get_lut_size)
+ gamma_lut_size = mtk_ddp_gamma_get_lut_size(comp);
if (comp->funcs->ctm_set)
has_ctm = true;
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
index 3e9046993d09..b2e50292e57d 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
@@ -10,7 +10,6 @@
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_plane.h"
-#define MTK_LUT_SIZE 512
#define MTK_MAX_BPC 10
#define MTK_MIN_BPC 3
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index f114da4d36a9..c77af2e4000f 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -322,6 +322,7 @@ static const struct mtk_ddp_comp_funcs ddp_dsi = {
static const struct mtk_ddp_comp_funcs ddp_gamma = {
.clk_enable = mtk_gamma_clk_enable,
.clk_disable = mtk_gamma_clk_disable,
+ .gamma_get_lut_size = mtk_gamma_get_lut_size,
.gamma_set = mtk_gamma_set,
.config = mtk_gamma_config,
.start = mtk_gamma_start,
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
index febcaeef16a1..c1355960e195 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
@@ -67,6 +67,7 @@ struct mtk_ddp_comp_funcs {
void (*layer_config)(struct device *dev, unsigned int idx,
struct mtk_plane_state *state,
struct cmdq_pkt *cmdq_pkt);
+ unsigned int (*gamma_get_lut_size)(struct device *dev);
void (*gamma_set)(struct device *dev,
struct drm_crtc_state *state);
void (*bgclr_in_on)(struct device *dev);
@@ -186,6 +187,14 @@ static inline void mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp,
comp->funcs->layer_config(comp->dev, idx, state, cmdq_pkt);
}
+static inline unsigned int mtk_ddp_gamma_get_lut_size(struct mtk_ddp_comp *comp)
+{
+ if (comp->funcs && comp->funcs->gamma_get_lut_size)
+ return comp->funcs->gamma_get_lut_size(comp->dev);
+
+ return 0;
+}
+
static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp,
struct drm_crtc_state *state)
{
--
2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 04/11] drm/mediatek: gamma: Improve and simplify HW LUT calculation
2023-06-01 12:10 ` AngeloGioacchino Del Regno
(?)
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Use drm_color_lut_extract() to avoid open-coding the bits reduction
calculations for each color channel and use a struct drm_color_lut
to temporarily store the information instead of an array of u32.
Also, slightly improve the precision of the HW LUT calculation in the
LUT DIFF case by performing the subtractions on the 16-bits values and
doing the 10 bits conversion later.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 30 +++++++++++++++--------
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index b25ba209e7a4..204a1aa7bfc9 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -77,7 +77,6 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
bool lut_diff;
u16 lut_size;
u32 word;
- u32 diff[3] = {0};
/* If there's no gamma lut there's nothing to do here. */
if (!state->gamma_lut)
@@ -97,18 +96,29 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
for (i = 0; i < lut_size; i++) {
+ struct drm_color_lut diff, hwlut;
+
+ hwlut.red = drm_color_lut_extract(lut[i].red, 10);
+ hwlut.green = drm_color_lut_extract(lut[i].green, 10);
+ hwlut.blue = drm_color_lut_extract(lut[i].blue, 10);
+
if (!lut_diff || (i % 2 == 0)) {
- word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
- (((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
- ((lut[i].blue >> 6) & LUT_10BIT_MASK);
+ word = hwlut.red << 20 +
+ hwlut.green << 10 +
+ hwlut.red;
} else {
- diff[0] = (lut[i].red >> 6) - (lut[i - 1].red >> 6);
- diff[1] = (lut[i].green >> 6) - (lut[i - 1].green >> 6);
- diff[2] = (lut[i].blue >> 6) - (lut[i - 1].blue >> 6);
+ diff.red = lut[i].red - lut[i - 1].red;
+ diff.red = drm_color_lut_extract(diff.red, 10);
+
+ diff.green = lut[i].green - lut[i - 1].green;
+ diff.green = drm_color_lut_extract(diff.green, 10);
+
+ diff.blue = lut[i].blue - lut[i - 1].blue;
+ diff.blue = drm_color_lut_extract(diff.blue, 10);
- word = ((diff[0] & LUT_10BIT_MASK) << 20) +
- ((diff[1] & LUT_10BIT_MASK) << 10) +
- (diff[2] & LUT_10BIT_MASK);
+ word = diff.blue << 20 +
+ diff.green << 10 +
+ diff.red;
}
writel(word, (lut_base + i * 4));
}
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 04/11] drm/mediatek: gamma: Improve and simplify HW LUT calculation
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: Jason-JH . Lin, linux-kernel, dri-devel, linux-mediatek, wenst,
matthias.bgg, kernel, linux-arm-kernel,
angelogioacchino.delregno
Use drm_color_lut_extract() to avoid open-coding the bits reduction
calculations for each color channel and use a struct drm_color_lut
to temporarily store the information instead of an array of u32.
Also, slightly improve the precision of the HW LUT calculation in the
LUT DIFF case by performing the subtractions on the 16-bits values and
doing the 10 bits conversion later.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 30 +++++++++++++++--------
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index b25ba209e7a4..204a1aa7bfc9 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -77,7 +77,6 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
bool lut_diff;
u16 lut_size;
u32 word;
- u32 diff[3] = {0};
/* If there's no gamma lut there's nothing to do here. */
if (!state->gamma_lut)
@@ -97,18 +96,29 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
for (i = 0; i < lut_size; i++) {
+ struct drm_color_lut diff, hwlut;
+
+ hwlut.red = drm_color_lut_extract(lut[i].red, 10);
+ hwlut.green = drm_color_lut_extract(lut[i].green, 10);
+ hwlut.blue = drm_color_lut_extract(lut[i].blue, 10);
+
if (!lut_diff || (i % 2 == 0)) {
- word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
- (((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
- ((lut[i].blue >> 6) & LUT_10BIT_MASK);
+ word = hwlut.red << 20 +
+ hwlut.green << 10 +
+ hwlut.red;
} else {
- diff[0] = (lut[i].red >> 6) - (lut[i - 1].red >> 6);
- diff[1] = (lut[i].green >> 6) - (lut[i - 1].green >> 6);
- diff[2] = (lut[i].blue >> 6) - (lut[i - 1].blue >> 6);
+ diff.red = lut[i].red - lut[i - 1].red;
+ diff.red = drm_color_lut_extract(diff.red, 10);
+
+ diff.green = lut[i].green - lut[i - 1].green;
+ diff.green = drm_color_lut_extract(diff.green, 10);
+
+ diff.blue = lut[i].blue - lut[i - 1].blue;
+ diff.blue = drm_color_lut_extract(diff.blue, 10);
- word = ((diff[0] & LUT_10BIT_MASK) << 20) +
- ((diff[1] & LUT_10BIT_MASK) << 10) +
- (diff[2] & LUT_10BIT_MASK);
+ word = diff.blue << 20 +
+ diff.green << 10 +
+ diff.red;
}
writel(word, (lut_base + i * 4));
}
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 04/11] drm/mediatek: gamma: Improve and simplify HW LUT calculation
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Use drm_color_lut_extract() to avoid open-coding the bits reduction
calculations for each color channel and use a struct drm_color_lut
to temporarily store the information instead of an array of u32.
Also, slightly improve the precision of the HW LUT calculation in the
LUT DIFF case by performing the subtractions on the 16-bits values and
doing the 10 bits conversion later.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 30 +++++++++++++++--------
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index b25ba209e7a4..204a1aa7bfc9 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -77,7 +77,6 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
bool lut_diff;
u16 lut_size;
u32 word;
- u32 diff[3] = {0};
/* If there's no gamma lut there's nothing to do here. */
if (!state->gamma_lut)
@@ -97,18 +96,29 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
for (i = 0; i < lut_size; i++) {
+ struct drm_color_lut diff, hwlut;
+
+ hwlut.red = drm_color_lut_extract(lut[i].red, 10);
+ hwlut.green = drm_color_lut_extract(lut[i].green, 10);
+ hwlut.blue = drm_color_lut_extract(lut[i].blue, 10);
+
if (!lut_diff || (i % 2 == 0)) {
- word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
- (((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
- ((lut[i].blue >> 6) & LUT_10BIT_MASK);
+ word = hwlut.red << 20 +
+ hwlut.green << 10 +
+ hwlut.red;
} else {
- diff[0] = (lut[i].red >> 6) - (lut[i - 1].red >> 6);
- diff[1] = (lut[i].green >> 6) - (lut[i - 1].green >> 6);
- diff[2] = (lut[i].blue >> 6) - (lut[i - 1].blue >> 6);
+ diff.red = lut[i].red - lut[i - 1].red;
+ diff.red = drm_color_lut_extract(diff.red, 10);
+
+ diff.green = lut[i].green - lut[i - 1].green;
+ diff.green = drm_color_lut_extract(diff.green, 10);
+
+ diff.blue = lut[i].blue - lut[i - 1].blue;
+ diff.blue = drm_color_lut_extract(diff.blue, 10);
- word = ((diff[0] & LUT_10BIT_MASK) << 20) +
- ((diff[1] & LUT_10BIT_MASK) << 10) +
- (diff[2] & LUT_10BIT_MASK);
+ word = diff.blue << 20 +
+ diff.green << 10 +
+ diff.red;
}
writel(word, (lut_base + i * 4));
}
--
2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 05/11] drm/mediatek: gamma: Enable the Gamma LUT table only after programming
2023-06-01 12:10 ` AngeloGioacchino Del Regno
(?)
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after
programming the actual table to avoid potential visual glitches during
table modification.
Note:
GAMMA should get enabled in between vblanks, but this requires many
efforts in order to make this happen, as that requires migrating all
of the writes to make use of CMDQ instead of cpu writes and that's
not trivial. For this reason, this patch only moves the LUT enable.
The CMDQ rework will come at a later time.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 204a1aa7bfc9..b75a77af5205 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -71,12 +71,12 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
- unsigned int i, reg;
+ unsigned int i;
struct drm_color_lut *lut;
void __iomem *lut_base;
bool lut_diff;
u16 lut_size;
- u32 word;
+ u32 cfg_val, word;
/* If there's no gamma lut there's nothing to do here. */
if (!state->gamma_lut)
@@ -90,9 +90,7 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
lut_size = LUT_SIZE_DEFAULT;
}
- reg = readl(regs + DISP_GAMMA_CFG);
- reg = reg | GAMMA_LUT_EN;
- writel(reg, regs + DISP_GAMMA_CFG);
+ cfg_val = readl(regs + DISP_GAMMA_CFG);
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
for (i = 0; i < lut_size; i++) {
@@ -122,6 +120,11 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
}
writel(word, (lut_base + i * 4));
}
+
+ /* Enable the gamma table */
+ cfg_val = cfg_val | GAMMA_LUT_EN;
+
+ writel(cfg_val, regs + DISP_GAMMA_CFG);
}
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 05/11] drm/mediatek: gamma: Enable the Gamma LUT table only after programming
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: Jason-JH . Lin, linux-kernel, dri-devel, linux-mediatek, wenst,
matthias.bgg, kernel, linux-arm-kernel,
angelogioacchino.delregno
Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after
programming the actual table to avoid potential visual glitches during
table modification.
Note:
GAMMA should get enabled in between vblanks, but this requires many
efforts in order to make this happen, as that requires migrating all
of the writes to make use of CMDQ instead of cpu writes and that's
not trivial. For this reason, this patch only moves the LUT enable.
The CMDQ rework will come at a later time.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 204a1aa7bfc9..b75a77af5205 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -71,12 +71,12 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
- unsigned int i, reg;
+ unsigned int i;
struct drm_color_lut *lut;
void __iomem *lut_base;
bool lut_diff;
u16 lut_size;
- u32 word;
+ u32 cfg_val, word;
/* If there's no gamma lut there's nothing to do here. */
if (!state->gamma_lut)
@@ -90,9 +90,7 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
lut_size = LUT_SIZE_DEFAULT;
}
- reg = readl(regs + DISP_GAMMA_CFG);
- reg = reg | GAMMA_LUT_EN;
- writel(reg, regs + DISP_GAMMA_CFG);
+ cfg_val = readl(regs + DISP_GAMMA_CFG);
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
for (i = 0; i < lut_size; i++) {
@@ -122,6 +120,11 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
}
writel(word, (lut_base + i * 4));
}
+
+ /* Enable the gamma table */
+ cfg_val = cfg_val | GAMMA_LUT_EN;
+
+ writel(cfg_val, regs + DISP_GAMMA_CFG);
}
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 05/11] drm/mediatek: gamma: Enable the Gamma LUT table only after programming
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after
programming the actual table to avoid potential visual glitches during
table modification.
Note:
GAMMA should get enabled in between vblanks, but this requires many
efforts in order to make this happen, as that requires migrating all
of the writes to make use of CMDQ instead of cpu writes and that's
not trivial. For this reason, this patch only moves the LUT enable.
The CMDQ rework will come at a later time.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 204a1aa7bfc9..b75a77af5205 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -71,12 +71,12 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
- unsigned int i, reg;
+ unsigned int i;
struct drm_color_lut *lut;
void __iomem *lut_base;
bool lut_diff;
u16 lut_size;
- u32 word;
+ u32 cfg_val, word;
/* If there's no gamma lut there's nothing to do here. */
if (!state->gamma_lut)
@@ -90,9 +90,7 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
lut_size = LUT_SIZE_DEFAULT;
}
- reg = readl(regs + DISP_GAMMA_CFG);
- reg = reg | GAMMA_LUT_EN;
- writel(reg, regs + DISP_GAMMA_CFG);
+ cfg_val = readl(regs + DISP_GAMMA_CFG);
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
for (i = 0; i < lut_size; i++) {
@@ -122,6 +120,11 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
}
writel(word, (lut_base + i * 4));
}
+
+ /* Enable the gamma table */
+ cfg_val = cfg_val | GAMMA_LUT_EN;
+
+ writel(cfg_val, regs + DISP_GAMMA_CFG);
}
void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
--
2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 06/11] drm/mediatek: gamma: Use bitfield macros
2023-06-01 12:10 ` AngeloGioacchino Del Regno
(?)
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Make the code more robust and improve readability by using bitfield
macros instead of open coding bit operations.
While at it, also add a definition for LUT_BITS_DEFAULT.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 41 ++++++++++++++---------
1 file changed, 26 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index b75a77af5205..f4bf5b37992c 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -3,6 +3,7 @@
* Copyright (c) 2021 MediaTek Inc.
*/
+#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/component.h>
#include <linux/module.h>
@@ -22,9 +23,16 @@
#define GAMMA_LUT_EN BIT(1)
#define GAMMA_DITHERING BIT(2)
#define DISP_GAMMA_SIZE 0x0030
+#define DISP_GAMMA_SIZE_HSIZE GENMASK(28, 16)
+#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
#define DISP_GAMMA_LUT 0x0700
+#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20)
+#define DISP_GAMMA_LUT_10BIT_G GENMASK(19, 10)
+#define DISP_GAMMA_LUT_10BIT_B GENMASK(9, 0)
+
#define LUT_10BIT_MASK 0x03ff
+#define LUT_BITS_DEFAULT 10
#define LUT_SIZE_DEFAULT 512
struct mtk_disp_gamma_data {
@@ -96,33 +104,33 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
for (i = 0; i < lut_size; i++) {
struct drm_color_lut diff, hwlut;
- hwlut.red = drm_color_lut_extract(lut[i].red, 10);
- hwlut.green = drm_color_lut_extract(lut[i].green, 10);
- hwlut.blue = drm_color_lut_extract(lut[i].blue, 10);
+ hwlut.red = drm_color_lut_extract(lut[i].red, LUT_BITS_DEFAULT);
+ hwlut.green = drm_color_lut_extract(lut[i].green, LUT_BITS_DEFAULT);
+ hwlut.blue = drm_color_lut_extract(lut[i].blue, LUT_BITS_DEFAULT);
if (!lut_diff || (i % 2 == 0)) {
- word = hwlut.red << 20 +
- hwlut.green << 10 +
- hwlut.red;
+ word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
} else {
diff.red = lut[i].red - lut[i - 1].red;
- diff.red = drm_color_lut_extract(diff.red, 10);
+ diff.red = drm_color_lut_extract(diff.red, LUT_BITS_DEFAULT);
diff.green = lut[i].green - lut[i - 1].green;
- diff.green = drm_color_lut_extract(diff.green, 10);
+ diff.green = drm_color_lut_extract(diff.green, LUT_BITS_DEFAULT);
diff.blue = lut[i].blue - lut[i - 1].blue;
- diff.blue = drm_color_lut_extract(diff.blue, 10);
+ diff.blue = drm_color_lut_extract(diff.blue, LUT_BITS_DEFAULT);
- word = diff.blue << 20 +
- diff.green << 10 +
- diff.red;
+ word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
}
writel(word, (lut_base + i * 4));
}
/* Enable the gamma table */
- cfg_val = cfg_val | GAMMA_LUT_EN;
+ cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);
writel(cfg_val, regs + DISP_GAMMA_CFG);
}
@@ -139,9 +147,12 @@ void mtk_gamma_config(struct device *dev, unsigned int w,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
+ u32 sz;
+
+ sz = FIELD_PREP(DISP_GAMMA_SIZE_HSIZE, w);
+ sz |= FIELD_PREP(DISP_GAMMA_SIZE_VSIZE, h);
- mtk_ddp_write(cmdq_pkt, h << 16 | w, &gamma->cmdq_reg, gamma->regs,
- DISP_GAMMA_SIZE);
+ mtk_ddp_write(cmdq_pkt, sz, &gamma->cmdq_reg, gamma->regs, DISP_GAMMA_SIZE);
if (gamma->data && gamma->data->has_dither)
mtk_dither_set_common(gamma->regs, &gamma->cmdq_reg, bpc,
DISP_GAMMA_CFG, GAMMA_DITHERING, cmdq_pkt);
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 06/11] drm/mediatek: gamma: Use bitfield macros
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: Jason-JH . Lin, linux-kernel, dri-devel, linux-mediatek, wenst,
matthias.bgg, kernel, linux-arm-kernel,
angelogioacchino.delregno
Make the code more robust and improve readability by using bitfield
macros instead of open coding bit operations.
While at it, also add a definition for LUT_BITS_DEFAULT.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 41 ++++++++++++++---------
1 file changed, 26 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index b75a77af5205..f4bf5b37992c 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -3,6 +3,7 @@
* Copyright (c) 2021 MediaTek Inc.
*/
+#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/component.h>
#include <linux/module.h>
@@ -22,9 +23,16 @@
#define GAMMA_LUT_EN BIT(1)
#define GAMMA_DITHERING BIT(2)
#define DISP_GAMMA_SIZE 0x0030
+#define DISP_GAMMA_SIZE_HSIZE GENMASK(28, 16)
+#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
#define DISP_GAMMA_LUT 0x0700
+#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20)
+#define DISP_GAMMA_LUT_10BIT_G GENMASK(19, 10)
+#define DISP_GAMMA_LUT_10BIT_B GENMASK(9, 0)
+
#define LUT_10BIT_MASK 0x03ff
+#define LUT_BITS_DEFAULT 10
#define LUT_SIZE_DEFAULT 512
struct mtk_disp_gamma_data {
@@ -96,33 +104,33 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
for (i = 0; i < lut_size; i++) {
struct drm_color_lut diff, hwlut;
- hwlut.red = drm_color_lut_extract(lut[i].red, 10);
- hwlut.green = drm_color_lut_extract(lut[i].green, 10);
- hwlut.blue = drm_color_lut_extract(lut[i].blue, 10);
+ hwlut.red = drm_color_lut_extract(lut[i].red, LUT_BITS_DEFAULT);
+ hwlut.green = drm_color_lut_extract(lut[i].green, LUT_BITS_DEFAULT);
+ hwlut.blue = drm_color_lut_extract(lut[i].blue, LUT_BITS_DEFAULT);
if (!lut_diff || (i % 2 == 0)) {
- word = hwlut.red << 20 +
- hwlut.green << 10 +
- hwlut.red;
+ word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
} else {
diff.red = lut[i].red - lut[i - 1].red;
- diff.red = drm_color_lut_extract(diff.red, 10);
+ diff.red = drm_color_lut_extract(diff.red, LUT_BITS_DEFAULT);
diff.green = lut[i].green - lut[i - 1].green;
- diff.green = drm_color_lut_extract(diff.green, 10);
+ diff.green = drm_color_lut_extract(diff.green, LUT_BITS_DEFAULT);
diff.blue = lut[i].blue - lut[i - 1].blue;
- diff.blue = drm_color_lut_extract(diff.blue, 10);
+ diff.blue = drm_color_lut_extract(diff.blue, LUT_BITS_DEFAULT);
- word = diff.blue << 20 +
- diff.green << 10 +
- diff.red;
+ word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
}
writel(word, (lut_base + i * 4));
}
/* Enable the gamma table */
- cfg_val = cfg_val | GAMMA_LUT_EN;
+ cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);
writel(cfg_val, regs + DISP_GAMMA_CFG);
}
@@ -139,9 +147,12 @@ void mtk_gamma_config(struct device *dev, unsigned int w,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
+ u32 sz;
+
+ sz = FIELD_PREP(DISP_GAMMA_SIZE_HSIZE, w);
+ sz |= FIELD_PREP(DISP_GAMMA_SIZE_VSIZE, h);
- mtk_ddp_write(cmdq_pkt, h << 16 | w, &gamma->cmdq_reg, gamma->regs,
- DISP_GAMMA_SIZE);
+ mtk_ddp_write(cmdq_pkt, sz, &gamma->cmdq_reg, gamma->regs, DISP_GAMMA_SIZE);
if (gamma->data && gamma->data->has_dither)
mtk_dither_set_common(gamma->regs, &gamma->cmdq_reg, bpc,
DISP_GAMMA_CFG, GAMMA_DITHERING, cmdq_pkt);
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 06/11] drm/mediatek: gamma: Use bitfield macros
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Make the code more robust and improve readability by using bitfield
macros instead of open coding bit operations.
While at it, also add a definition for LUT_BITS_DEFAULT.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 41 ++++++++++++++---------
1 file changed, 26 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index b75a77af5205..f4bf5b37992c 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -3,6 +3,7 @@
* Copyright (c) 2021 MediaTek Inc.
*/
+#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/component.h>
#include <linux/module.h>
@@ -22,9 +23,16 @@
#define GAMMA_LUT_EN BIT(1)
#define GAMMA_DITHERING BIT(2)
#define DISP_GAMMA_SIZE 0x0030
+#define DISP_GAMMA_SIZE_HSIZE GENMASK(28, 16)
+#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
#define DISP_GAMMA_LUT 0x0700
+#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20)
+#define DISP_GAMMA_LUT_10BIT_G GENMASK(19, 10)
+#define DISP_GAMMA_LUT_10BIT_B GENMASK(9, 0)
+
#define LUT_10BIT_MASK 0x03ff
+#define LUT_BITS_DEFAULT 10
#define LUT_SIZE_DEFAULT 512
struct mtk_disp_gamma_data {
@@ -96,33 +104,33 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
for (i = 0; i < lut_size; i++) {
struct drm_color_lut diff, hwlut;
- hwlut.red = drm_color_lut_extract(lut[i].red, 10);
- hwlut.green = drm_color_lut_extract(lut[i].green, 10);
- hwlut.blue = drm_color_lut_extract(lut[i].blue, 10);
+ hwlut.red = drm_color_lut_extract(lut[i].red, LUT_BITS_DEFAULT);
+ hwlut.green = drm_color_lut_extract(lut[i].green, LUT_BITS_DEFAULT);
+ hwlut.blue = drm_color_lut_extract(lut[i].blue, LUT_BITS_DEFAULT);
if (!lut_diff || (i % 2 == 0)) {
- word = hwlut.red << 20 +
- hwlut.green << 10 +
- hwlut.red;
+ word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
} else {
diff.red = lut[i].red - lut[i - 1].red;
- diff.red = drm_color_lut_extract(diff.red, 10);
+ diff.red = drm_color_lut_extract(diff.red, LUT_BITS_DEFAULT);
diff.green = lut[i].green - lut[i - 1].green;
- diff.green = drm_color_lut_extract(diff.green, 10);
+ diff.green = drm_color_lut_extract(diff.green, LUT_BITS_DEFAULT);
diff.blue = lut[i].blue - lut[i - 1].blue;
- diff.blue = drm_color_lut_extract(diff.blue, 10);
+ diff.blue = drm_color_lut_extract(diff.blue, LUT_BITS_DEFAULT);
- word = diff.blue << 20 +
- diff.green << 10 +
- diff.red;
+ word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
}
writel(word, (lut_base + i * 4));
}
/* Enable the gamma table */
- cfg_val = cfg_val | GAMMA_LUT_EN;
+ cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);
writel(cfg_val, regs + DISP_GAMMA_CFG);
}
@@ -139,9 +147,12 @@ void mtk_gamma_config(struct device *dev, unsigned int w,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
+ u32 sz;
+
+ sz = FIELD_PREP(DISP_GAMMA_SIZE_HSIZE, w);
+ sz |= FIELD_PREP(DISP_GAMMA_SIZE_VSIZE, h);
- mtk_ddp_write(cmdq_pkt, h << 16 | w, &gamma->cmdq_reg, gamma->regs,
- DISP_GAMMA_SIZE);
+ mtk_ddp_write(cmdq_pkt, sz, &gamma->cmdq_reg, gamma->regs, DISP_GAMMA_SIZE);
if (gamma->data && gamma->data->has_dither)
mtk_dither_set_common(gamma->regs, &gamma->cmdq_reg, bpc,
DISP_GAMMA_CFG, GAMMA_DITHERING, cmdq_pkt);
--
2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 07/11] drm/mediatek: gamma: Support specifying number of bits per LUT component
2023-06-01 12:10 ` AngeloGioacchino Del Regno
(?)
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
New SoCs, like MT8195, not only may support bigger lookup tables, but
have got a different register layout to support bigger precision:
support specifying the number of `lut_bits` for each SoC and use it
in mtk_gamma_set_common() to perform the right calculation.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index f4bf5b37992c..407fb0264b80 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -39,6 +39,7 @@ struct mtk_disp_gamma_data {
bool has_dither;
bool lut_diff;
u16 lut_size;
+ u8 lut_bits;
};
/*
@@ -84,6 +85,7 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
void __iomem *lut_base;
bool lut_diff;
u16 lut_size;
+ u8 lut_bits;
u32 cfg_val, word;
/* If there's no gamma lut there's nothing to do here. */
@@ -92,9 +94,11 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
if (gamma && gamma->data) {
lut_diff = gamma->data->lut_diff;
+ lut_bits = gamma->data->lut_bits;
lut_size = gamma->data->lut_size;
} else {
lut_diff = false;
+ lut_bits = LUT_BITS_DEFAULT;
lut_size = LUT_SIZE_DEFAULT;
}
@@ -104,9 +108,9 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
for (i = 0; i < lut_size; i++) {
struct drm_color_lut diff, hwlut;
- hwlut.red = drm_color_lut_extract(lut[i].red, LUT_BITS_DEFAULT);
- hwlut.green = drm_color_lut_extract(lut[i].green, LUT_BITS_DEFAULT);
- hwlut.blue = drm_color_lut_extract(lut[i].blue, LUT_BITS_DEFAULT);
+ hwlut.red = drm_color_lut_extract(lut[i].red, lut_bits);
+ hwlut.green = drm_color_lut_extract(lut[i].green, lut_bits);
+ hwlut.blue = drm_color_lut_extract(lut[i].blue, lut_bits);
if (!lut_diff || (i % 2 == 0)) {
word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
@@ -114,13 +118,13 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
} else {
diff.red = lut[i].red - lut[i - 1].red;
- diff.red = drm_color_lut_extract(diff.red, LUT_BITS_DEFAULT);
+ diff.red = drm_color_lut_extract(diff.red, lut_bits);
diff.green = lut[i].green - lut[i - 1].green;
- diff.green = drm_color_lut_extract(diff.green, LUT_BITS_DEFAULT);
+ diff.green = drm_color_lut_extract(diff.green, lut_bits);
diff.blue = lut[i].blue - lut[i - 1].blue;
- diff.blue = drm_color_lut_extract(diff.blue, LUT_BITS_DEFAULT);
+ diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
@@ -237,10 +241,12 @@ static int mtk_disp_gamma_remove(struct platform_device *pdev)
static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
.has_dither = true,
+ .lut_bits = 10,
.lut_size = 512,
};
static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
+ .lut_bits = 10,
.lut_diff = true,
.lut_size = 512,
};
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 07/11] drm/mediatek: gamma: Support specifying number of bits per LUT component
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: Jason-JH . Lin, linux-kernel, dri-devel, linux-mediatek, wenst,
matthias.bgg, kernel, linux-arm-kernel,
angelogioacchino.delregno
New SoCs, like MT8195, not only may support bigger lookup tables, but
have got a different register layout to support bigger precision:
support specifying the number of `lut_bits` for each SoC and use it
in mtk_gamma_set_common() to perform the right calculation.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index f4bf5b37992c..407fb0264b80 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -39,6 +39,7 @@ struct mtk_disp_gamma_data {
bool has_dither;
bool lut_diff;
u16 lut_size;
+ u8 lut_bits;
};
/*
@@ -84,6 +85,7 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
void __iomem *lut_base;
bool lut_diff;
u16 lut_size;
+ u8 lut_bits;
u32 cfg_val, word;
/* If there's no gamma lut there's nothing to do here. */
@@ -92,9 +94,11 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
if (gamma && gamma->data) {
lut_diff = gamma->data->lut_diff;
+ lut_bits = gamma->data->lut_bits;
lut_size = gamma->data->lut_size;
} else {
lut_diff = false;
+ lut_bits = LUT_BITS_DEFAULT;
lut_size = LUT_SIZE_DEFAULT;
}
@@ -104,9 +108,9 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
for (i = 0; i < lut_size; i++) {
struct drm_color_lut diff, hwlut;
- hwlut.red = drm_color_lut_extract(lut[i].red, LUT_BITS_DEFAULT);
- hwlut.green = drm_color_lut_extract(lut[i].green, LUT_BITS_DEFAULT);
- hwlut.blue = drm_color_lut_extract(lut[i].blue, LUT_BITS_DEFAULT);
+ hwlut.red = drm_color_lut_extract(lut[i].red, lut_bits);
+ hwlut.green = drm_color_lut_extract(lut[i].green, lut_bits);
+ hwlut.blue = drm_color_lut_extract(lut[i].blue, lut_bits);
if (!lut_diff || (i % 2 == 0)) {
word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
@@ -114,13 +118,13 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
} else {
diff.red = lut[i].red - lut[i - 1].red;
- diff.red = drm_color_lut_extract(diff.red, LUT_BITS_DEFAULT);
+ diff.red = drm_color_lut_extract(diff.red, lut_bits);
diff.green = lut[i].green - lut[i - 1].green;
- diff.green = drm_color_lut_extract(diff.green, LUT_BITS_DEFAULT);
+ diff.green = drm_color_lut_extract(diff.green, lut_bits);
diff.blue = lut[i].blue - lut[i - 1].blue;
- diff.blue = drm_color_lut_extract(diff.blue, LUT_BITS_DEFAULT);
+ diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
@@ -237,10 +241,12 @@ static int mtk_disp_gamma_remove(struct platform_device *pdev)
static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
.has_dither = true,
+ .lut_bits = 10,
.lut_size = 512,
};
static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
+ .lut_bits = 10,
.lut_diff = true,
.lut_size = 512,
};
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 07/11] drm/mediatek: gamma: Support specifying number of bits per LUT component
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
New SoCs, like MT8195, not only may support bigger lookup tables, but
have got a different register layout to support bigger precision:
support specifying the number of `lut_bits` for each SoC and use it
in mtk_gamma_set_common() to perform the right calculation.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index f4bf5b37992c..407fb0264b80 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -39,6 +39,7 @@ struct mtk_disp_gamma_data {
bool has_dither;
bool lut_diff;
u16 lut_size;
+ u8 lut_bits;
};
/*
@@ -84,6 +85,7 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
void __iomem *lut_base;
bool lut_diff;
u16 lut_size;
+ u8 lut_bits;
u32 cfg_val, word;
/* If there's no gamma lut there's nothing to do here. */
@@ -92,9 +94,11 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
if (gamma && gamma->data) {
lut_diff = gamma->data->lut_diff;
+ lut_bits = gamma->data->lut_bits;
lut_size = gamma->data->lut_size;
} else {
lut_diff = false;
+ lut_bits = LUT_BITS_DEFAULT;
lut_size = LUT_SIZE_DEFAULT;
}
@@ -104,9 +108,9 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
for (i = 0; i < lut_size; i++) {
struct drm_color_lut diff, hwlut;
- hwlut.red = drm_color_lut_extract(lut[i].red, LUT_BITS_DEFAULT);
- hwlut.green = drm_color_lut_extract(lut[i].green, LUT_BITS_DEFAULT);
- hwlut.blue = drm_color_lut_extract(lut[i].blue, LUT_BITS_DEFAULT);
+ hwlut.red = drm_color_lut_extract(lut[i].red, lut_bits);
+ hwlut.green = drm_color_lut_extract(lut[i].green, lut_bits);
+ hwlut.blue = drm_color_lut_extract(lut[i].blue, lut_bits);
if (!lut_diff || (i % 2 == 0)) {
word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
@@ -114,13 +118,13 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
} else {
diff.red = lut[i].red - lut[i - 1].red;
- diff.red = drm_color_lut_extract(diff.red, LUT_BITS_DEFAULT);
+ diff.red = drm_color_lut_extract(diff.red, lut_bits);
diff.green = lut[i].green - lut[i - 1].green;
- diff.green = drm_color_lut_extract(diff.green, LUT_BITS_DEFAULT);
+ diff.green = drm_color_lut_extract(diff.green, lut_bits);
diff.blue = lut[i].blue - lut[i - 1].blue;
- diff.blue = drm_color_lut_extract(diff.blue, LUT_BITS_DEFAULT);
+ diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
@@ -237,10 +241,12 @@ static int mtk_disp_gamma_remove(struct platform_device *pdev)
static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
.has_dither = true,
+ .lut_bits = 10,
.lut_size = 512,
};
static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
+ .lut_bits = 10,
.lut_diff = true,
.lut_size = 512,
};
--
2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 08/11] drm/mediatek: gamma: Support multi-bank gamma LUT
2023-06-01 12:10 ` AngeloGioacchino Del Regno
(?)
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Newer Gamma IP have got multiple LUT banks: support specifying the
size of the LUT banks and handle bank-switching before programming
the LUT in mtk_gamma_set_common() in preparation for adding support
for MT8195 and newer SoCs.
Suggested-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
[Angelo: Refactored original commit]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 74 ++++++++++++++---------
1 file changed, 47 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 407fb0264b80..f1a0b18b6c1a 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -25,6 +25,8 @@
#define DISP_GAMMA_SIZE 0x0030
#define DISP_GAMMA_SIZE_HSIZE GENMASK(28, 16)
#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
+#define DISP_GAMMA_BANK 0x0100
+#define DISP_GAMMA_BANK_BANK GENMASK(1, 0)
#define DISP_GAMMA_LUT 0x0700
#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20)
@@ -38,6 +40,7 @@
struct mtk_disp_gamma_data {
bool has_dither;
bool lut_diff;
+ u16 lut_bank_size;
u16 lut_size;
u8 lut_bits;
};
@@ -84,9 +87,10 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
struct drm_color_lut *lut;
void __iomem *lut_base;
bool lut_diff;
- u16 lut_size;
+ u16 lut_bank_size, lut_size;
u8 lut_bits;
- u32 cfg_val, word;
+ u32 cfg_val, lbank_val, word;
+ int cur_bank, num_lut_banks;
/* If there's no gamma lut there's nothing to do here. */
if (!state->gamma_lut)
@@ -94,43 +98,57 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
if (gamma && gamma->data) {
lut_diff = gamma->data->lut_diff;
+ lut_bank_size = gamma->data->lut_bank_size;
lut_bits = gamma->data->lut_bits;
lut_size = gamma->data->lut_size;
} else {
lut_diff = false;
+ lut_bank_size = LUT_SIZE_DEFAULT;
lut_bits = LUT_BITS_DEFAULT;
lut_size = LUT_SIZE_DEFAULT;
}
+ num_lut_banks = lut_size / lut_bank_size;
cfg_val = readl(regs + DISP_GAMMA_CFG);
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
- for (i = 0; i < lut_size; i++) {
- struct drm_color_lut diff, hwlut;
-
- hwlut.red = drm_color_lut_extract(lut[i].red, lut_bits);
- hwlut.green = drm_color_lut_extract(lut[i].green, lut_bits);
- hwlut.blue = drm_color_lut_extract(lut[i].blue, lut_bits);
-
- if (!lut_diff || (i % 2 == 0)) {
- word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
- } else {
- diff.red = lut[i].red - lut[i - 1].red;
- diff.red = drm_color_lut_extract(diff.red, lut_bits);
-
- diff.green = lut[i].green - lut[i - 1].green;
- diff.green = drm_color_lut_extract(diff.green, lut_bits);
-
- diff.blue = lut[i].blue - lut[i - 1].blue;
- diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
-
- word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
+
+ for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) {
+
+ /* Switch gamma bank and set data mode before writing LUT */
+ if (num_lut_banks > 1) {
+ lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank);
+ writel(lbank_val, regs + DISP_GAMMA_BANK);
+ }
+
+ for (i = 0; i < lut_bank_size; i++) {
+ int n = (cur_bank * lut_bank_size) + i;
+ struct drm_color_lut diff, hwlut;
+
+ hwlut.red = drm_color_lut_extract(lut[n].red, lut_bits);
+ hwlut.green = drm_color_lut_extract(lut[n].green, lut_bits);
+ hwlut.blue = drm_color_lut_extract(lut[n].blue, lut_bits);
+
+ if (!lut_diff || (i % 2 == 0)) {
+ word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
+ } else {
+ diff.red = lut[n].red - lut[n - 1].red;
+ diff.red = drm_color_lut_extract(diff.red, lut_bits);
+
+ diff.green = lut[n].green - lut[n - 1].green;
+ diff.green = drm_color_lut_extract(diff.green, lut_bits);
+
+ diff.blue = lut[n].blue - lut[n - 1].blue;
+ diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
+
+ word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
+ }
+ writel(word, (lut_base + i * 4));
}
- writel(word, (lut_base + i * 4));
}
/* Enable the gamma table */
@@ -241,11 +259,13 @@ static int mtk_disp_gamma_remove(struct platform_device *pdev)
static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
.has_dither = true,
+ .lut_bank_size = 512,
.lut_bits = 10,
.lut_size = 512,
};
static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
+ .lut_bank_size = 512,
.lut_bits = 10,
.lut_diff = true,
.lut_size = 512,
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 08/11] drm/mediatek: gamma: Support multi-bank gamma LUT
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: Jason-JH . Lin, linux-kernel, dri-devel, linux-mediatek, wenst,
matthias.bgg, kernel, linux-arm-kernel,
angelogioacchino.delregno
Newer Gamma IP have got multiple LUT banks: support specifying the
size of the LUT banks and handle bank-switching before programming
the LUT in mtk_gamma_set_common() in preparation for adding support
for MT8195 and newer SoCs.
Suggested-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
[Angelo: Refactored original commit]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 74 ++++++++++++++---------
1 file changed, 47 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 407fb0264b80..f1a0b18b6c1a 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -25,6 +25,8 @@
#define DISP_GAMMA_SIZE 0x0030
#define DISP_GAMMA_SIZE_HSIZE GENMASK(28, 16)
#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
+#define DISP_GAMMA_BANK 0x0100
+#define DISP_GAMMA_BANK_BANK GENMASK(1, 0)
#define DISP_GAMMA_LUT 0x0700
#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20)
@@ -38,6 +40,7 @@
struct mtk_disp_gamma_data {
bool has_dither;
bool lut_diff;
+ u16 lut_bank_size;
u16 lut_size;
u8 lut_bits;
};
@@ -84,9 +87,10 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
struct drm_color_lut *lut;
void __iomem *lut_base;
bool lut_diff;
- u16 lut_size;
+ u16 lut_bank_size, lut_size;
u8 lut_bits;
- u32 cfg_val, word;
+ u32 cfg_val, lbank_val, word;
+ int cur_bank, num_lut_banks;
/* If there's no gamma lut there's nothing to do here. */
if (!state->gamma_lut)
@@ -94,43 +98,57 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
if (gamma && gamma->data) {
lut_diff = gamma->data->lut_diff;
+ lut_bank_size = gamma->data->lut_bank_size;
lut_bits = gamma->data->lut_bits;
lut_size = gamma->data->lut_size;
} else {
lut_diff = false;
+ lut_bank_size = LUT_SIZE_DEFAULT;
lut_bits = LUT_BITS_DEFAULT;
lut_size = LUT_SIZE_DEFAULT;
}
+ num_lut_banks = lut_size / lut_bank_size;
cfg_val = readl(regs + DISP_GAMMA_CFG);
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
- for (i = 0; i < lut_size; i++) {
- struct drm_color_lut diff, hwlut;
-
- hwlut.red = drm_color_lut_extract(lut[i].red, lut_bits);
- hwlut.green = drm_color_lut_extract(lut[i].green, lut_bits);
- hwlut.blue = drm_color_lut_extract(lut[i].blue, lut_bits);
-
- if (!lut_diff || (i % 2 == 0)) {
- word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
- } else {
- diff.red = lut[i].red - lut[i - 1].red;
- diff.red = drm_color_lut_extract(diff.red, lut_bits);
-
- diff.green = lut[i].green - lut[i - 1].green;
- diff.green = drm_color_lut_extract(diff.green, lut_bits);
-
- diff.blue = lut[i].blue - lut[i - 1].blue;
- diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
-
- word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
+
+ for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) {
+
+ /* Switch gamma bank and set data mode before writing LUT */
+ if (num_lut_banks > 1) {
+ lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank);
+ writel(lbank_val, regs + DISP_GAMMA_BANK);
+ }
+
+ for (i = 0; i < lut_bank_size; i++) {
+ int n = (cur_bank * lut_bank_size) + i;
+ struct drm_color_lut diff, hwlut;
+
+ hwlut.red = drm_color_lut_extract(lut[n].red, lut_bits);
+ hwlut.green = drm_color_lut_extract(lut[n].green, lut_bits);
+ hwlut.blue = drm_color_lut_extract(lut[n].blue, lut_bits);
+
+ if (!lut_diff || (i % 2 == 0)) {
+ word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
+ } else {
+ diff.red = lut[n].red - lut[n - 1].red;
+ diff.red = drm_color_lut_extract(diff.red, lut_bits);
+
+ diff.green = lut[n].green - lut[n - 1].green;
+ diff.green = drm_color_lut_extract(diff.green, lut_bits);
+
+ diff.blue = lut[n].blue - lut[n - 1].blue;
+ diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
+
+ word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
+ }
+ writel(word, (lut_base + i * 4));
}
- writel(word, (lut_base + i * 4));
}
/* Enable the gamma table */
@@ -241,11 +259,13 @@ static int mtk_disp_gamma_remove(struct platform_device *pdev)
static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
.has_dither = true,
+ .lut_bank_size = 512,
.lut_bits = 10,
.lut_size = 512,
};
static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
+ .lut_bank_size = 512,
.lut_bits = 10,
.lut_diff = true,
.lut_size = 512,
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 08/11] drm/mediatek: gamma: Support multi-bank gamma LUT
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Newer Gamma IP have got multiple LUT banks: support specifying the
size of the LUT banks and handle bank-switching before programming
the LUT in mtk_gamma_set_common() in preparation for adding support
for MT8195 and newer SoCs.
Suggested-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
[Angelo: Refactored original commit]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 74 ++++++++++++++---------
1 file changed, 47 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 407fb0264b80..f1a0b18b6c1a 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -25,6 +25,8 @@
#define DISP_GAMMA_SIZE 0x0030
#define DISP_GAMMA_SIZE_HSIZE GENMASK(28, 16)
#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
+#define DISP_GAMMA_BANK 0x0100
+#define DISP_GAMMA_BANK_BANK GENMASK(1, 0)
#define DISP_GAMMA_LUT 0x0700
#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20)
@@ -38,6 +40,7 @@
struct mtk_disp_gamma_data {
bool has_dither;
bool lut_diff;
+ u16 lut_bank_size;
u16 lut_size;
u8 lut_bits;
};
@@ -84,9 +87,10 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
struct drm_color_lut *lut;
void __iomem *lut_base;
bool lut_diff;
- u16 lut_size;
+ u16 lut_bank_size, lut_size;
u8 lut_bits;
- u32 cfg_val, word;
+ u32 cfg_val, lbank_val, word;
+ int cur_bank, num_lut_banks;
/* If there's no gamma lut there's nothing to do here. */
if (!state->gamma_lut)
@@ -94,43 +98,57 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
if (gamma && gamma->data) {
lut_diff = gamma->data->lut_diff;
+ lut_bank_size = gamma->data->lut_bank_size;
lut_bits = gamma->data->lut_bits;
lut_size = gamma->data->lut_size;
} else {
lut_diff = false;
+ lut_bank_size = LUT_SIZE_DEFAULT;
lut_bits = LUT_BITS_DEFAULT;
lut_size = LUT_SIZE_DEFAULT;
}
+ num_lut_banks = lut_size / lut_bank_size;
cfg_val = readl(regs + DISP_GAMMA_CFG);
lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
- for (i = 0; i < lut_size; i++) {
- struct drm_color_lut diff, hwlut;
-
- hwlut.red = drm_color_lut_extract(lut[i].red, lut_bits);
- hwlut.green = drm_color_lut_extract(lut[i].green, lut_bits);
- hwlut.blue = drm_color_lut_extract(lut[i].blue, lut_bits);
-
- if (!lut_diff || (i % 2 == 0)) {
- word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
- } else {
- diff.red = lut[i].red - lut[i - 1].red;
- diff.red = drm_color_lut_extract(diff.red, lut_bits);
-
- diff.green = lut[i].green - lut[i - 1].green;
- diff.green = drm_color_lut_extract(diff.green, lut_bits);
-
- diff.blue = lut[i].blue - lut[i - 1].blue;
- diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
-
- word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
+
+ for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) {
+
+ /* Switch gamma bank and set data mode before writing LUT */
+ if (num_lut_banks > 1) {
+ lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank);
+ writel(lbank_val, regs + DISP_GAMMA_BANK);
+ }
+
+ for (i = 0; i < lut_bank_size; i++) {
+ int n = (cur_bank * lut_bank_size) + i;
+ struct drm_color_lut diff, hwlut;
+
+ hwlut.red = drm_color_lut_extract(lut[n].red, lut_bits);
+ hwlut.green = drm_color_lut_extract(lut[n].green, lut_bits);
+ hwlut.blue = drm_color_lut_extract(lut[n].blue, lut_bits);
+
+ if (!lut_diff || (i % 2 == 0)) {
+ word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
+ } else {
+ diff.red = lut[n].red - lut[n - 1].red;
+ diff.red = drm_color_lut_extract(diff.red, lut_bits);
+
+ diff.green = lut[n].green - lut[n - 1].green;
+ diff.green = drm_color_lut_extract(diff.green, lut_bits);
+
+ diff.blue = lut[n].blue - lut[n - 1].blue;
+ diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
+
+ word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
+ word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
+ }
+ writel(word, (lut_base + i * 4));
}
- writel(word, (lut_base + i * 4));
}
/* Enable the gamma table */
@@ -241,11 +259,13 @@ static int mtk_disp_gamma_remove(struct platform_device *pdev)
static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
.has_dither = true,
+ .lut_bank_size = 512,
.lut_bits = 10,
.lut_size = 512,
};
static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
+ .lut_bank_size = 512,
.lut_bits = 10,
.lut_diff = true,
.lut_size = 512,
--
2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 09/11] drm/mediatek: gamma: Add support for 12-bit LUT and MT8195
2023-06-01 12:10 ` AngeloGioacchino Del Regno
(?)
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Add support for 12-bit gamma lookup tables and introduce the first
user for it: MT8195.
While at it, also reorder the variables in mtk_gamma_set_common()
and rename `lut_base` to `lut0_base` to improve readability.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 61 ++++++++++++++++++-----
1 file changed, 48 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index f1a0b18b6c1a..e0e2d2bdbf59 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -27,12 +27,20 @@
#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
#define DISP_GAMMA_BANK 0x0100
#define DISP_GAMMA_BANK_BANK GENMASK(1, 0)
+#define DISP_GAMMA_BANK_DATA_MODE BIT(2)
#define DISP_GAMMA_LUT 0x0700
+#define DISP_GAMMA_LUT1 0x0b00
+/* For 10 bit LUT layout, R/G/B are in the same register */
#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20)
#define DISP_GAMMA_LUT_10BIT_G GENMASK(19, 10)
#define DISP_GAMMA_LUT_10BIT_B GENMASK(9, 0)
+/* For 12 bit LUT layout, R/G are in LUT, B is in LUT1 */
+#define DISP_GAMMA_LUT_12BIT_R GENMASK(11, 0)
+#define DISP_GAMMA_LUT_12BIT_G GENMASK(23, 12)
+#define DISP_GAMMA_LUT_12BIT_B GENMASK(11, 0)
+
#define LUT_10BIT_MASK 0x03ff
#define LUT_BITS_DEFAULT 10
#define LUT_SIZE_DEFAULT 512
@@ -83,14 +91,15 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
- unsigned int i;
+ void __iomem *lut0_base = regs + DISP_GAMMA_LUT;
+ void __iomem *lut1_base = regs + DISP_GAMMA_LUT1;
+ u32 cfg_val, data_mode, lbank_val, word[2];
+ int cur_bank, num_lut_banks;
+ u16 lut_bank_size, lut_size;
struct drm_color_lut *lut;
- void __iomem *lut_base;
+ unsigned int i;
bool lut_diff;
- u16 lut_bank_size, lut_size;
u8 lut_bits;
- u32 cfg_val, lbank_val, word;
- int cur_bank, num_lut_banks;
/* If there's no gamma lut there's nothing to do here. */
if (!state->gamma_lut)
@@ -110,14 +119,17 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
num_lut_banks = lut_size / lut_bank_size;
cfg_val = readl(regs + DISP_GAMMA_CFG);
- lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
+ /* Switch to 12 bits data mode if supported */
+ data_mode = FIELD_PREP(DISP_GAMMA_BANK_DATA_MODE, !!(lut_bits == 12));
+
for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) {
/* Switch gamma bank and set data mode before writing LUT */
if (num_lut_banks > 1) {
lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank);
+ lbank_val |= data_mode;
writel(lbank_val, regs + DISP_GAMMA_BANK);
}
@@ -130,9 +142,15 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
hwlut.blue = drm_color_lut_extract(lut[n].blue, lut_bits);
if (!lut_diff || (i % 2 == 0)) {
- word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
+ if (lut_bits == 12) {
+ word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, hwlut.red);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, hwlut.green);
+ word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, hwlut.blue);
+ } else {
+ word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
+ }
} else {
diff.red = lut[n].red - lut[n - 1].red;
diff.red = drm_color_lut_extract(diff.red, lut_bits);
@@ -143,11 +161,19 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
diff.blue = lut[n].blue - lut[n - 1].blue;
diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
- word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
+ if (lut_bits == 12) {
+ word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, diff.red);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, diff.green);
+ word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, diff.blue);
+ } else {
+ word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
+ }
}
- writel(word, (lut_base + i * 4));
+ writel(word[0], (lut0_base + i * 4));
+ if (lut_bits == 12)
+ writel(word[1], (lut1_base + i * 4));
}
}
@@ -271,11 +297,20 @@ static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
.lut_size = 512,
};
+static const struct mtk_disp_gamma_data mt8195_gamma_driver_data = {
+ .lut_bank_size = 256,
+ .lut_bits = 12,
+ .lut_diff = true,
+ .lut_size = 1024,
+};
+
static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = {
{ .compatible = "mediatek,mt8173-disp-gamma",
.data = &mt8173_gamma_driver_data},
{ .compatible = "mediatek,mt8183-disp-gamma",
.data = &mt8183_gamma_driver_data},
+ { .compatible = "mediatek,mt8195-disp-gamma",
+ .data = &mt8195_gamma_driver_data},
{},
};
MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match);
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 09/11] drm/mediatek: gamma: Add support for 12-bit LUT and MT8195
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: Jason-JH . Lin, linux-kernel, dri-devel, linux-mediatek, wenst,
matthias.bgg, kernel, linux-arm-kernel,
angelogioacchino.delregno
Add support for 12-bit gamma lookup tables and introduce the first
user for it: MT8195.
While at it, also reorder the variables in mtk_gamma_set_common()
and rename `lut_base` to `lut0_base` to improve readability.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 61 ++++++++++++++++++-----
1 file changed, 48 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index f1a0b18b6c1a..e0e2d2bdbf59 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -27,12 +27,20 @@
#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
#define DISP_GAMMA_BANK 0x0100
#define DISP_GAMMA_BANK_BANK GENMASK(1, 0)
+#define DISP_GAMMA_BANK_DATA_MODE BIT(2)
#define DISP_GAMMA_LUT 0x0700
+#define DISP_GAMMA_LUT1 0x0b00
+/* For 10 bit LUT layout, R/G/B are in the same register */
#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20)
#define DISP_GAMMA_LUT_10BIT_G GENMASK(19, 10)
#define DISP_GAMMA_LUT_10BIT_B GENMASK(9, 0)
+/* For 12 bit LUT layout, R/G are in LUT, B is in LUT1 */
+#define DISP_GAMMA_LUT_12BIT_R GENMASK(11, 0)
+#define DISP_GAMMA_LUT_12BIT_G GENMASK(23, 12)
+#define DISP_GAMMA_LUT_12BIT_B GENMASK(11, 0)
+
#define LUT_10BIT_MASK 0x03ff
#define LUT_BITS_DEFAULT 10
#define LUT_SIZE_DEFAULT 512
@@ -83,14 +91,15 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
- unsigned int i;
+ void __iomem *lut0_base = regs + DISP_GAMMA_LUT;
+ void __iomem *lut1_base = regs + DISP_GAMMA_LUT1;
+ u32 cfg_val, data_mode, lbank_val, word[2];
+ int cur_bank, num_lut_banks;
+ u16 lut_bank_size, lut_size;
struct drm_color_lut *lut;
- void __iomem *lut_base;
+ unsigned int i;
bool lut_diff;
- u16 lut_bank_size, lut_size;
u8 lut_bits;
- u32 cfg_val, lbank_val, word;
- int cur_bank, num_lut_banks;
/* If there's no gamma lut there's nothing to do here. */
if (!state->gamma_lut)
@@ -110,14 +119,17 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
num_lut_banks = lut_size / lut_bank_size;
cfg_val = readl(regs + DISP_GAMMA_CFG);
- lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
+ /* Switch to 12 bits data mode if supported */
+ data_mode = FIELD_PREP(DISP_GAMMA_BANK_DATA_MODE, !!(lut_bits == 12));
+
for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) {
/* Switch gamma bank and set data mode before writing LUT */
if (num_lut_banks > 1) {
lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank);
+ lbank_val |= data_mode;
writel(lbank_val, regs + DISP_GAMMA_BANK);
}
@@ -130,9 +142,15 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
hwlut.blue = drm_color_lut_extract(lut[n].blue, lut_bits);
if (!lut_diff || (i % 2 == 0)) {
- word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
+ if (lut_bits == 12) {
+ word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, hwlut.red);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, hwlut.green);
+ word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, hwlut.blue);
+ } else {
+ word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
+ }
} else {
diff.red = lut[n].red - lut[n - 1].red;
diff.red = drm_color_lut_extract(diff.red, lut_bits);
@@ -143,11 +161,19 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
diff.blue = lut[n].blue - lut[n - 1].blue;
diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
- word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
+ if (lut_bits == 12) {
+ word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, diff.red);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, diff.green);
+ word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, diff.blue);
+ } else {
+ word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
+ }
}
- writel(word, (lut_base + i * 4));
+ writel(word[0], (lut0_base + i * 4));
+ if (lut_bits == 12)
+ writel(word[1], (lut1_base + i * 4));
}
}
@@ -271,11 +297,20 @@ static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
.lut_size = 512,
};
+static const struct mtk_disp_gamma_data mt8195_gamma_driver_data = {
+ .lut_bank_size = 256,
+ .lut_bits = 12,
+ .lut_diff = true,
+ .lut_size = 1024,
+};
+
static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = {
{ .compatible = "mediatek,mt8173-disp-gamma",
.data = &mt8173_gamma_driver_data},
{ .compatible = "mediatek,mt8183-disp-gamma",
.data = &mt8183_gamma_driver_data},
+ { .compatible = "mediatek,mt8195-disp-gamma",
+ .data = &mt8195_gamma_driver_data},
{},
};
MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match);
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 09/11] drm/mediatek: gamma: Add support for 12-bit LUT and MT8195
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Add support for 12-bit gamma lookup tables and introduce the first
user for it: MT8195.
While at it, also reorder the variables in mtk_gamma_set_common()
and rename `lut_base` to `lut0_base` to improve readability.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 61 ++++++++++++++++++-----
1 file changed, 48 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index f1a0b18b6c1a..e0e2d2bdbf59 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -27,12 +27,20 @@
#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
#define DISP_GAMMA_BANK 0x0100
#define DISP_GAMMA_BANK_BANK GENMASK(1, 0)
+#define DISP_GAMMA_BANK_DATA_MODE BIT(2)
#define DISP_GAMMA_LUT 0x0700
+#define DISP_GAMMA_LUT1 0x0b00
+/* For 10 bit LUT layout, R/G/B are in the same register */
#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20)
#define DISP_GAMMA_LUT_10BIT_G GENMASK(19, 10)
#define DISP_GAMMA_LUT_10BIT_B GENMASK(9, 0)
+/* For 12 bit LUT layout, R/G are in LUT, B is in LUT1 */
+#define DISP_GAMMA_LUT_12BIT_R GENMASK(11, 0)
+#define DISP_GAMMA_LUT_12BIT_G GENMASK(23, 12)
+#define DISP_GAMMA_LUT_12BIT_B GENMASK(11, 0)
+
#define LUT_10BIT_MASK 0x03ff
#define LUT_BITS_DEFAULT 10
#define LUT_SIZE_DEFAULT 512
@@ -83,14 +91,15 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
- unsigned int i;
+ void __iomem *lut0_base = regs + DISP_GAMMA_LUT;
+ void __iomem *lut1_base = regs + DISP_GAMMA_LUT1;
+ u32 cfg_val, data_mode, lbank_val, word[2];
+ int cur_bank, num_lut_banks;
+ u16 lut_bank_size, lut_size;
struct drm_color_lut *lut;
- void __iomem *lut_base;
+ unsigned int i;
bool lut_diff;
- u16 lut_bank_size, lut_size;
u8 lut_bits;
- u32 cfg_val, lbank_val, word;
- int cur_bank, num_lut_banks;
/* If there's no gamma lut there's nothing to do here. */
if (!state->gamma_lut)
@@ -110,14 +119,17 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
num_lut_banks = lut_size / lut_bank_size;
cfg_val = readl(regs + DISP_GAMMA_CFG);
- lut_base = regs + DISP_GAMMA_LUT;
lut = (struct drm_color_lut *)state->gamma_lut->data;
+ /* Switch to 12 bits data mode if supported */
+ data_mode = FIELD_PREP(DISP_GAMMA_BANK_DATA_MODE, !!(lut_bits == 12));
+
for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) {
/* Switch gamma bank and set data mode before writing LUT */
if (num_lut_banks > 1) {
lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank);
+ lbank_val |= data_mode;
writel(lbank_val, regs + DISP_GAMMA_BANK);
}
@@ -130,9 +142,15 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
hwlut.blue = drm_color_lut_extract(lut[n].blue, lut_bits);
if (!lut_diff || (i % 2 == 0)) {
- word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
+ if (lut_bits == 12) {
+ word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, hwlut.red);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, hwlut.green);
+ word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, hwlut.blue);
+ } else {
+ word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
+ }
} else {
diff.red = lut[n].red - lut[n - 1].red;
diff.red = drm_color_lut_extract(diff.red, lut_bits);
@@ -143,11 +161,19 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
diff.blue = lut[n].blue - lut[n - 1].blue;
diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
- word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
- word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
+ if (lut_bits == 12) {
+ word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, diff.red);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, diff.green);
+ word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, diff.blue);
+ } else {
+ word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
+ word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
+ }
}
- writel(word, (lut_base + i * 4));
+ writel(word[0], (lut0_base + i * 4));
+ if (lut_bits == 12)
+ writel(word[1], (lut1_base + i * 4));
}
}
@@ -271,11 +297,20 @@ static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
.lut_size = 512,
};
+static const struct mtk_disp_gamma_data mt8195_gamma_driver_data = {
+ .lut_bank_size = 256,
+ .lut_bits = 12,
+ .lut_diff = true,
+ .lut_size = 1024,
+};
+
static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = {
{ .compatible = "mediatek,mt8173-disp-gamma",
.data = &mt8173_gamma_driver_data},
{ .compatible = "mediatek,mt8183-disp-gamma",
.data = &mt8183_gamma_driver_data},
+ { .compatible = "mediatek,mt8195-disp-gamma",
+ .data = &mt8195_gamma_driver_data},
{},
};
MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match);
--
2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 10/11] drm/mediatek: gamma: Make sure relay mode is disabled
2023-06-01 12:10 ` AngeloGioacchino Del Regno
(?)
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Disable relay mode at the end of LUT programming to make sure that the
processed image goes through.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index e0e2d2bdbf59..e9655b661364 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -20,6 +20,7 @@
#define DISP_GAMMA_EN 0x0000
#define GAMMA_EN BIT(0)
#define DISP_GAMMA_CFG 0x0020
+#define GAMMA_RELAY_MODE BIT(0)
#define GAMMA_LUT_EN BIT(1)
#define GAMMA_DITHERING BIT(2)
#define DISP_GAMMA_SIZE 0x0030
@@ -180,6 +181,9 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
/* Enable the gamma table */
cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);
+ /* Disable RELAY mode to pass the processed image */
+ cfg_val &= ~GAMMA_RELAY_MODE;
+
writel(cfg_val, regs + DISP_GAMMA_CFG);
}
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 10/11] drm/mediatek: gamma: Make sure relay mode is disabled
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: Jason-JH . Lin, linux-kernel, dri-devel, linux-mediatek, wenst,
matthias.bgg, kernel, linux-arm-kernel,
angelogioacchino.delregno
Disable relay mode at the end of LUT programming to make sure that the
processed image goes through.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index e0e2d2bdbf59..e9655b661364 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -20,6 +20,7 @@
#define DISP_GAMMA_EN 0x0000
#define GAMMA_EN BIT(0)
#define DISP_GAMMA_CFG 0x0020
+#define GAMMA_RELAY_MODE BIT(0)
#define GAMMA_LUT_EN BIT(1)
#define GAMMA_DITHERING BIT(2)
#define DISP_GAMMA_SIZE 0x0030
@@ -180,6 +181,9 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
/* Enable the gamma table */
cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);
+ /* Disable RELAY mode to pass the processed image */
+ cfg_val &= ~GAMMA_RELAY_MODE;
+
writel(cfg_val, regs + DISP_GAMMA_CFG);
}
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 10/11] drm/mediatek: gamma: Make sure relay mode is disabled
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
Disable relay mode at the end of LUT programming to make sure that the
processed image goes through.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index e0e2d2bdbf59..e9655b661364 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -20,6 +20,7 @@
#define DISP_GAMMA_EN 0x0000
#define GAMMA_EN BIT(0)
#define DISP_GAMMA_CFG 0x0020
+#define GAMMA_RELAY_MODE BIT(0)
#define GAMMA_LUT_EN BIT(1)
#define GAMMA_DITHERING BIT(2)
#define DISP_GAMMA_SIZE 0x0030
@@ -180,6 +181,9 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
/* Enable the gamma table */
cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);
+ /* Disable RELAY mode to pass the processed image */
+ cfg_val &= ~GAMMA_RELAY_MODE;
+
writel(cfg_val, regs + DISP_GAMMA_CFG);
}
--
2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 11/11] drm/mediatek: gamma: Program gamma LUT type for descending or rising
2023-06-01 12:10 ` AngeloGioacchino Del Regno
(?)
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: Jason-JH . Lin, linux-kernel, dri-devel, linux-mediatek, wenst,
matthias.bgg, kernel, linux-arm-kernel,
angelogioacchino.delregno
All of the SoCs that don't have dithering control in the gamma IP
have got a GAMMA_LUT_TYPE bit that tells to the IP if the LUT is
"descending" (bit set) or "rising" (bit cleared): make sure to set
it correctly after programming the LUT.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index e9655b661364..bd530e603264 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -23,6 +23,7 @@
#define GAMMA_RELAY_MODE BIT(0)
#define GAMMA_LUT_EN BIT(1)
#define GAMMA_DITHERING BIT(2)
+#define GAMMA_LUT_TYPE BIT(2)
#define DISP_GAMMA_SIZE 0x0030
#define DISP_GAMMA_SIZE_HSIZE GENMASK(28, 16)
#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
@@ -89,6 +90,16 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
return lut_size;
}
+static bool mtk_gamma_lut_is_descending(struct drm_color_lut *lut, u32 lut_size)
+{
+ u64 first, last;
+
+ first = lut[0].red + lut[0].green + lut[0].blue;
+ last = lut[lut_size].red + lut[lut_size].green + lut[lut_size].blue;
+
+ return !!(first > last);
+}
+
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
@@ -178,6 +189,14 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
}
}
+ if (gamma && !gamma->data->has_dither) {
+ /* Descending or Rising LUT */
+ if (mtk_gamma_lut_is_descending(lut, lut_size))
+ cfg_val |= FIELD_PREP(GAMMA_LUT_TYPE, 1);
+ else
+ cfg_val &= ~GAMMA_LUT_TYPE;
+ }
+
/* Enable the gamma table */
cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 11/11] drm/mediatek: gamma: Program gamma LUT type for descending or rising
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
All of the SoCs that don't have dithering control in the gamma IP
have got a GAMMA_LUT_TYPE bit that tells to the IP if the LUT is
"descending" (bit set) or "rising" (bit cleared): make sure to set
it correctly after programming the LUT.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index e9655b661364..bd530e603264 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -23,6 +23,7 @@
#define GAMMA_RELAY_MODE BIT(0)
#define GAMMA_LUT_EN BIT(1)
#define GAMMA_DITHERING BIT(2)
+#define GAMMA_LUT_TYPE BIT(2)
#define DISP_GAMMA_SIZE 0x0030
#define DISP_GAMMA_SIZE_HSIZE GENMASK(28, 16)
#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
@@ -89,6 +90,16 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
return lut_size;
}
+static bool mtk_gamma_lut_is_descending(struct drm_color_lut *lut, u32 lut_size)
+{
+ u64 first, last;
+
+ first = lut[0].red + lut[0].green + lut[0].blue;
+ last = lut[lut_size].red + lut[lut_size].green + lut[lut_size].blue;
+
+ return !!(first > last);
+}
+
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
@@ -178,6 +189,14 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
}
}
+ if (gamma && !gamma->data->has_dither) {
+ /* Descending or Rising LUT */
+ if (mtk_gamma_lut_is_descending(lut, lut_size))
+ cfg_val |= FIELD_PREP(GAMMA_LUT_TYPE, 1);
+ else
+ cfg_val &= ~GAMMA_LUT_TYPE;
+ }
+
/* Enable the gamma table */
cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);
--
2.40.1
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH v5 11/11] drm/mediatek: gamma: Program gamma LUT type for descending or rising
@ 2023-06-01 12:10 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 42+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-06-01 12:10 UTC (permalink / raw)
To: chunkuang.hu
Cc: p.zabel, airlied, daniel, matthias.bgg,
angelogioacchino.delregno, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, wenst, kernel, Jason-JH . Lin
All of the SoCs that don't have dithering control in the gamma IP
have got a GAMMA_LUT_TYPE bit that tells to the IP if the LUT is
"descending" (bit set) or "rising" (bit cleared): make sure to set
it correctly after programming the LUT.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index e9655b661364..bd530e603264 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -23,6 +23,7 @@
#define GAMMA_RELAY_MODE BIT(0)
#define GAMMA_LUT_EN BIT(1)
#define GAMMA_DITHERING BIT(2)
+#define GAMMA_LUT_TYPE BIT(2)
#define DISP_GAMMA_SIZE 0x0030
#define DISP_GAMMA_SIZE_HSIZE GENMASK(28, 16)
#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
@@ -89,6 +90,16 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
return lut_size;
}
+static bool mtk_gamma_lut_is_descending(struct drm_color_lut *lut, u32 lut_size)
+{
+ u64 first, last;
+
+ first = lut[0].red + lut[0].green + lut[0].blue;
+ last = lut[lut_size].red + lut[lut_size].green + lut[lut_size].blue;
+
+ return !!(first > last);
+}
+
void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
{
struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
@@ -178,6 +189,14 @@ void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crt
}
}
+ if (gamma && !gamma->data->has_dither) {
+ /* Descending or Rising LUT */
+ if (mtk_gamma_lut_is_descending(lut, lut_size))
+ cfg_val |= FIELD_PREP(GAMMA_LUT_TYPE, 1);
+ else
+ cfg_val &= ~GAMMA_LUT_TYPE;
+ }
+
/* Enable the gamma table */
cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);
--
2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 42+ messages in thread
* Re: [PATCH v5 11/11] drm/mediatek: gamma: Program gamma LUT type for descending or rising
2023-06-01 12:10 ` AngeloGioacchino Del Regno
(?)
@ 2023-06-10 6:58 ` Dan Carpenter
-1 siblings, 0 replies; 42+ messages in thread
From: Dan Carpenter @ 2023-06-10 6:58 UTC (permalink / raw)
To: oe-kbuild, AngeloGioacchino Del Regno, chunkuang.hu
Cc: lkp, oe-kbuild-all, Jason-JH . Lin, linux-kernel, dri-devel,
linux-mediatek, wenst, matthias.bgg, kernel, linux-arm-kernel,
angelogioacchino.delregno
Hi AngeloGioacchino,
kernel test robot noticed the following build warnings:
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/AngeloGioacchino-Del-Regno/drm-mediatek-gamma-Adjust-mtk_drm_gamma_set_common-parameters/20230601-222357
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link: https://lore.kernel.org/r/20230601121022.2401844-12-angelogioacchino.delregno%40collabora.com
patch subject: [PATCH v5 11/11] drm/mediatek: gamma: Program gamma LUT type for descending or rising
config: arm64-randconfig-m031-20230608 (https://download.01.org/0day-ci/archive/20230610/202306101458.lRXHEE0Z-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 12.3.0
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
| Closes: https://lore.kernel.org/r/202306101458.lRXHEE0Z-lkp@intel.com/
smatch warnings:
drivers/gpu/drm/mediatek/mtk_disp_gamma.c:192 mtk_gamma_set_common() error: we previously assumed 'gamma->data' could be null (see line 120)
vim +192 drivers/gpu/drm/mediatek/mtk_disp_gamma.c
4873468a82b553 Jason-JH.Lin 2023-06-01 103 void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
69a4237ab1d13a Yongqiang Niu 2021-01-29 104 {
4873468a82b553 Jason-JH.Lin 2023-06-01 105 struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 106 void __iomem *lut0_base = regs + DISP_GAMMA_LUT;
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 107 void __iomem *lut1_base = regs + DISP_GAMMA_LUT1;
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 108 u32 cfg_val, data_mode, lbank_val, word[2];
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 109 int cur_bank, num_lut_banks;
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 110 u16 lut_bank_size, lut_size;
69a4237ab1d13a Yongqiang Niu 2021-01-29 111 struct drm_color_lut *lut;
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 112 unsigned int i;
4873468a82b553 Jason-JH.Lin 2023-06-01 113 bool lut_diff;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 114 u8 lut_bits;
69a4237ab1d13a Yongqiang Niu 2021-01-29 115
e824bd353592b5 AngeloGioacchino Del Regno 2023-06-01 116 /* If there's no gamma lut there's nothing to do here. */
e824bd353592b5 AngeloGioacchino Del Regno 2023-06-01 117 if (!state->gamma_lut)
e824bd353592b5 AngeloGioacchino Del Regno 2023-06-01 118 return;
e824bd353592b5 AngeloGioacchino Del Regno 2023-06-01 119
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 @120 if (gamma && gamma->data) {
^^^^^^^^^^^
This code assumes "gamma->data" can be NULL
4873468a82b553 Jason-JH.Lin 2023-06-01 121 lut_diff = gamma->data->lut_diff;
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 122 lut_bank_size = gamma->data->lut_bank_size;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 123 lut_bits = gamma->data->lut_bits;
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 124 lut_size = gamma->data->lut_size;
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 125 } else {
4873468a82b553 Jason-JH.Lin 2023-06-01 126 lut_diff = false;
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 127 lut_bank_size = LUT_SIZE_DEFAULT;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 128 lut_bits = LUT_BITS_DEFAULT;
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 129 lut_size = LUT_SIZE_DEFAULT;
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 130 }
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 131 num_lut_banks = lut_size / lut_bank_size;
4873468a82b553 Jason-JH.Lin 2023-06-01 132
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 133 cfg_val = readl(regs + DISP_GAMMA_CFG);
69a4237ab1d13a Yongqiang Niu 2021-01-29 134 lut = (struct drm_color_lut *)state->gamma_lut->data;
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 135
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 136 /* Switch to 12 bits data mode if supported */
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 137 data_mode = FIELD_PREP(DISP_GAMMA_BANK_DATA_MODE, !!(lut_bits == 12));
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 138
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 139 for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) {
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 140
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 141 /* Switch gamma bank and set data mode before writing LUT */
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 142 if (num_lut_banks > 1) {
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 143 lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 144 lbank_val |= data_mode;
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 145 writel(lbank_val, regs + DISP_GAMMA_BANK);
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 146 }
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 147
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 148 for (i = 0; i < lut_bank_size; i++) {
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 149 int n = (cur_bank * lut_bank_size) + i;
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 150 struct drm_color_lut diff, hwlut;
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 151
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 152 hwlut.red = drm_color_lut_extract(lut[n].red, lut_bits);
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 153 hwlut.green = drm_color_lut_extract(lut[n].green, lut_bits);
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 154 hwlut.blue = drm_color_lut_extract(lut[n].blue, lut_bits);
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 155
ba99d08da6adec Yongqiang Niu 2022-04-28 156 if (!lut_diff || (i % 2 == 0)) {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 157 if (lut_bits == 12) {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 158 word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, hwlut.red);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 159 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, hwlut.green);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 160 word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, hwlut.blue);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 161 } else {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 162 word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 163 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 164 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 165 }
ba99d08da6adec Yongqiang Niu 2022-04-28 166 } else {
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 167 diff.red = lut[n].red - lut[n - 1].red;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 168 diff.red = drm_color_lut_extract(diff.red, lut_bits);
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 169
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 170 diff.green = lut[n].green - lut[n - 1].green;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 171 diff.green = drm_color_lut_extract(diff.green, lut_bits);
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 172
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 173 diff.blue = lut[n].blue - lut[n - 1].blue;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 174 diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
ba99d08da6adec Yongqiang Niu 2022-04-28 175
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 176 if (lut_bits == 12) {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 177 word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, diff.red);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 178 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, diff.green);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 179 word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, diff.blue);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 180 } else {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 181 word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 182 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 183 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 184 }
ba99d08da6adec Yongqiang Niu 2022-04-28 185 }
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 186 writel(word[0], (lut0_base + i * 4));
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 187 if (lut_bits == 12)
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 188 writel(word[1], (lut1_base + i * 4));
69a4237ab1d13a Yongqiang Niu 2021-01-29 189 }
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 190 }
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 191
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 @192 if (gamma && !gamma->data->has_dither) {
^^^^^^^^^^^^^
"gamma->data" is derefrenced without being checked.
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 193 /* Descending or Rising LUT */
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 194 if (mtk_gamma_lut_is_descending(lut, lut_size))
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 195 cfg_val |= FIELD_PREP(GAMMA_LUT_TYPE, 1);
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 196 else
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 197 cfg_val &= ~GAMMA_LUT_TYPE;
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 198 }
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 199
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 200 /* Enable the gamma table */
2979ceb320a4ed AngeloGioacchino Del Regno 2023-06-01 201 cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 202
e21d98027e50c8 AngeloGioacchino Del Regno 2023-06-01 203 /* Disable RELAY mode to pass the processed image */
e21d98027e50c8 AngeloGioacchino Del Regno 2023-06-01 204 cfg_val &= ~GAMMA_RELAY_MODE;
e21d98027e50c8 AngeloGioacchino Del Regno 2023-06-01 205
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 206 writel(cfg_val, regs + DISP_GAMMA_CFG);
69a4237ab1d13a Yongqiang Niu 2021-01-29 207 }
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v5 11/11] drm/mediatek: gamma: Program gamma LUT type for descending or rising
@ 2023-06-10 6:58 ` Dan Carpenter
0 siblings, 0 replies; 42+ messages in thread
From: Dan Carpenter @ 2023-06-10 6:58 UTC (permalink / raw)
To: oe-kbuild, AngeloGioacchino Del Regno, chunkuang.hu
Cc: lkp, Jason-JH . Lin, wenst, linux-kernel, dri-devel,
linux-mediatek, oe-kbuild-all, matthias.bgg, kernel,
linux-arm-kernel, angelogioacchino.delregno
Hi AngeloGioacchino,
kernel test robot noticed the following build warnings:
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/AngeloGioacchino-Del-Regno/drm-mediatek-gamma-Adjust-mtk_drm_gamma_set_common-parameters/20230601-222357
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link: https://lore.kernel.org/r/20230601121022.2401844-12-angelogioacchino.delregno%40collabora.com
patch subject: [PATCH v5 11/11] drm/mediatek: gamma: Program gamma LUT type for descending or rising
config: arm64-randconfig-m031-20230608 (https://download.01.org/0day-ci/archive/20230610/202306101458.lRXHEE0Z-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 12.3.0
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
| Closes: https://lore.kernel.org/r/202306101458.lRXHEE0Z-lkp@intel.com/
smatch warnings:
drivers/gpu/drm/mediatek/mtk_disp_gamma.c:192 mtk_gamma_set_common() error: we previously assumed 'gamma->data' could be null (see line 120)
vim +192 drivers/gpu/drm/mediatek/mtk_disp_gamma.c
4873468a82b553 Jason-JH.Lin 2023-06-01 103 void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
69a4237ab1d13a Yongqiang Niu 2021-01-29 104 {
4873468a82b553 Jason-JH.Lin 2023-06-01 105 struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 106 void __iomem *lut0_base = regs + DISP_GAMMA_LUT;
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 107 void __iomem *lut1_base = regs + DISP_GAMMA_LUT1;
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 108 u32 cfg_val, data_mode, lbank_val, word[2];
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 109 int cur_bank, num_lut_banks;
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 110 u16 lut_bank_size, lut_size;
69a4237ab1d13a Yongqiang Niu 2021-01-29 111 struct drm_color_lut *lut;
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 112 unsigned int i;
4873468a82b553 Jason-JH.Lin 2023-06-01 113 bool lut_diff;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 114 u8 lut_bits;
69a4237ab1d13a Yongqiang Niu 2021-01-29 115
e824bd353592b5 AngeloGioacchino Del Regno 2023-06-01 116 /* If there's no gamma lut there's nothing to do here. */
e824bd353592b5 AngeloGioacchino Del Regno 2023-06-01 117 if (!state->gamma_lut)
e824bd353592b5 AngeloGioacchino Del Regno 2023-06-01 118 return;
e824bd353592b5 AngeloGioacchino Del Regno 2023-06-01 119
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 @120 if (gamma && gamma->data) {
^^^^^^^^^^^
This code assumes "gamma->data" can be NULL
4873468a82b553 Jason-JH.Lin 2023-06-01 121 lut_diff = gamma->data->lut_diff;
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 122 lut_bank_size = gamma->data->lut_bank_size;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 123 lut_bits = gamma->data->lut_bits;
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 124 lut_size = gamma->data->lut_size;
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 125 } else {
4873468a82b553 Jason-JH.Lin 2023-06-01 126 lut_diff = false;
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 127 lut_bank_size = LUT_SIZE_DEFAULT;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 128 lut_bits = LUT_BITS_DEFAULT;
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 129 lut_size = LUT_SIZE_DEFAULT;
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 130 }
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 131 num_lut_banks = lut_size / lut_bank_size;
4873468a82b553 Jason-JH.Lin 2023-06-01 132
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 133 cfg_val = readl(regs + DISP_GAMMA_CFG);
69a4237ab1d13a Yongqiang Niu 2021-01-29 134 lut = (struct drm_color_lut *)state->gamma_lut->data;
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 135
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 136 /* Switch to 12 bits data mode if supported */
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 137 data_mode = FIELD_PREP(DISP_GAMMA_BANK_DATA_MODE, !!(lut_bits == 12));
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 138
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 139 for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) {
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 140
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 141 /* Switch gamma bank and set data mode before writing LUT */
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 142 if (num_lut_banks > 1) {
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 143 lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 144 lbank_val |= data_mode;
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 145 writel(lbank_val, regs + DISP_GAMMA_BANK);
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 146 }
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 147
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 148 for (i = 0; i < lut_bank_size; i++) {
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 149 int n = (cur_bank * lut_bank_size) + i;
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 150 struct drm_color_lut diff, hwlut;
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 151
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 152 hwlut.red = drm_color_lut_extract(lut[n].red, lut_bits);
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 153 hwlut.green = drm_color_lut_extract(lut[n].green, lut_bits);
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 154 hwlut.blue = drm_color_lut_extract(lut[n].blue, lut_bits);
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 155
ba99d08da6adec Yongqiang Niu 2022-04-28 156 if (!lut_diff || (i % 2 == 0)) {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 157 if (lut_bits == 12) {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 158 word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, hwlut.red);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 159 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, hwlut.green);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 160 word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, hwlut.blue);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 161 } else {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 162 word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 163 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 164 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 165 }
ba99d08da6adec Yongqiang Niu 2022-04-28 166 } else {
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 167 diff.red = lut[n].red - lut[n - 1].red;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 168 diff.red = drm_color_lut_extract(diff.red, lut_bits);
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 169
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 170 diff.green = lut[n].green - lut[n - 1].green;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 171 diff.green = drm_color_lut_extract(diff.green, lut_bits);
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 172
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 173 diff.blue = lut[n].blue - lut[n - 1].blue;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 174 diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
ba99d08da6adec Yongqiang Niu 2022-04-28 175
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 176 if (lut_bits == 12) {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 177 word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, diff.red);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 178 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, diff.green);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 179 word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, diff.blue);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 180 } else {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 181 word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 182 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 183 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 184 }
ba99d08da6adec Yongqiang Niu 2022-04-28 185 }
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 186 writel(word[0], (lut0_base + i * 4));
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 187 if (lut_bits == 12)
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 188 writel(word[1], (lut1_base + i * 4));
69a4237ab1d13a Yongqiang Niu 2021-01-29 189 }
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 190 }
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 191
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 @192 if (gamma && !gamma->data->has_dither) {
^^^^^^^^^^^^^
"gamma->data" is derefrenced without being checked.
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 193 /* Descending or Rising LUT */
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 194 if (mtk_gamma_lut_is_descending(lut, lut_size))
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 195 cfg_val |= FIELD_PREP(GAMMA_LUT_TYPE, 1);
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 196 else
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 197 cfg_val &= ~GAMMA_LUT_TYPE;
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 198 }
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 199
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 200 /* Enable the gamma table */
2979ceb320a4ed AngeloGioacchino Del Regno 2023-06-01 201 cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 202
e21d98027e50c8 AngeloGioacchino Del Regno 2023-06-01 203 /* Disable RELAY mode to pass the processed image */
e21d98027e50c8 AngeloGioacchino Del Regno 2023-06-01 204 cfg_val &= ~GAMMA_RELAY_MODE;
e21d98027e50c8 AngeloGioacchino Del Regno 2023-06-01 205
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 206 writel(cfg_val, regs + DISP_GAMMA_CFG);
69a4237ab1d13a Yongqiang Niu 2021-01-29 207 }
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v5 11/11] drm/mediatek: gamma: Program gamma LUT type for descending or rising
@ 2023-06-10 6:58 ` Dan Carpenter
0 siblings, 0 replies; 42+ messages in thread
From: Dan Carpenter @ 2023-06-10 6:58 UTC (permalink / raw)
To: oe-kbuild, AngeloGioacchino Del Regno, chunkuang.hu
Cc: lkp, oe-kbuild-all, Jason-JH . Lin, linux-kernel, dri-devel,
linux-mediatek, wenst, matthias.bgg, kernel, linux-arm-kernel,
angelogioacchino.delregno
Hi AngeloGioacchino,
kernel test robot noticed the following build warnings:
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/AngeloGioacchino-Del-Regno/drm-mediatek-gamma-Adjust-mtk_drm_gamma_set_common-parameters/20230601-222357
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link: https://lore.kernel.org/r/20230601121022.2401844-12-angelogioacchino.delregno%40collabora.com
patch subject: [PATCH v5 11/11] drm/mediatek: gamma: Program gamma LUT type for descending or rising
config: arm64-randconfig-m031-20230608 (https://download.01.org/0day-ci/archive/20230610/202306101458.lRXHEE0Z-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 12.3.0
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
| Closes: https://lore.kernel.org/r/202306101458.lRXHEE0Z-lkp@intel.com/
smatch warnings:
drivers/gpu/drm/mediatek/mtk_disp_gamma.c:192 mtk_gamma_set_common() error: we previously assumed 'gamma->data' could be null (see line 120)
vim +192 drivers/gpu/drm/mediatek/mtk_disp_gamma.c
4873468a82b553 Jason-JH.Lin 2023-06-01 103 void mtk_gamma_set_common(struct device *dev, void __iomem *regs, struct drm_crtc_state *state)
69a4237ab1d13a Yongqiang Niu 2021-01-29 104 {
4873468a82b553 Jason-JH.Lin 2023-06-01 105 struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 106 void __iomem *lut0_base = regs + DISP_GAMMA_LUT;
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 107 void __iomem *lut1_base = regs + DISP_GAMMA_LUT1;
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 108 u32 cfg_val, data_mode, lbank_val, word[2];
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 109 int cur_bank, num_lut_banks;
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 110 u16 lut_bank_size, lut_size;
69a4237ab1d13a Yongqiang Niu 2021-01-29 111 struct drm_color_lut *lut;
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 112 unsigned int i;
4873468a82b553 Jason-JH.Lin 2023-06-01 113 bool lut_diff;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 114 u8 lut_bits;
69a4237ab1d13a Yongqiang Niu 2021-01-29 115
e824bd353592b5 AngeloGioacchino Del Regno 2023-06-01 116 /* If there's no gamma lut there's nothing to do here. */
e824bd353592b5 AngeloGioacchino Del Regno 2023-06-01 117 if (!state->gamma_lut)
e824bd353592b5 AngeloGioacchino Del Regno 2023-06-01 118 return;
e824bd353592b5 AngeloGioacchino Del Regno 2023-06-01 119
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 @120 if (gamma && gamma->data) {
^^^^^^^^^^^
This code assumes "gamma->data" can be NULL
4873468a82b553 Jason-JH.Lin 2023-06-01 121 lut_diff = gamma->data->lut_diff;
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 122 lut_bank_size = gamma->data->lut_bank_size;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 123 lut_bits = gamma->data->lut_bits;
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 124 lut_size = gamma->data->lut_size;
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 125 } else {
4873468a82b553 Jason-JH.Lin 2023-06-01 126 lut_diff = false;
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 127 lut_bank_size = LUT_SIZE_DEFAULT;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 128 lut_bits = LUT_BITS_DEFAULT;
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 129 lut_size = LUT_SIZE_DEFAULT;
ca340e013e3733 AngeloGioacchino Del Regno 2023-06-01 130 }
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 131 num_lut_banks = lut_size / lut_bank_size;
4873468a82b553 Jason-JH.Lin 2023-06-01 132
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 133 cfg_val = readl(regs + DISP_GAMMA_CFG);
69a4237ab1d13a Yongqiang Niu 2021-01-29 134 lut = (struct drm_color_lut *)state->gamma_lut->data;
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 135
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 136 /* Switch to 12 bits data mode if supported */
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 137 data_mode = FIELD_PREP(DISP_GAMMA_BANK_DATA_MODE, !!(lut_bits == 12));
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 138
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 139 for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) {
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 140
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 141 /* Switch gamma bank and set data mode before writing LUT */
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 142 if (num_lut_banks > 1) {
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 143 lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 144 lbank_val |= data_mode;
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 145 writel(lbank_val, regs + DISP_GAMMA_BANK);
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 146 }
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 147
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 148 for (i = 0; i < lut_bank_size; i++) {
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 149 int n = (cur_bank * lut_bank_size) + i;
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 150 struct drm_color_lut diff, hwlut;
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 151
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 152 hwlut.red = drm_color_lut_extract(lut[n].red, lut_bits);
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 153 hwlut.green = drm_color_lut_extract(lut[n].green, lut_bits);
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 154 hwlut.blue = drm_color_lut_extract(lut[n].blue, lut_bits);
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 155
ba99d08da6adec Yongqiang Niu 2022-04-28 156 if (!lut_diff || (i % 2 == 0)) {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 157 if (lut_bits == 12) {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 158 word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, hwlut.red);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 159 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, hwlut.green);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 160 word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, hwlut.blue);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 161 } else {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 162 word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 163 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 164 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 165 }
ba99d08da6adec Yongqiang Niu 2022-04-28 166 } else {
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 167 diff.red = lut[n].red - lut[n - 1].red;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 168 diff.red = drm_color_lut_extract(diff.red, lut_bits);
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 169
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 170 diff.green = lut[n].green - lut[n - 1].green;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 171 diff.green = drm_color_lut_extract(diff.green, lut_bits);
77eb9fd1f1ff7c AngeloGioacchino Del Regno 2023-06-01 172
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 173 diff.blue = lut[n].blue - lut[n - 1].blue;
1829ae02cf6bb6 AngeloGioacchino Del Regno 2023-06-01 174 diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
ba99d08da6adec Yongqiang Niu 2022-04-28 175
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 176 if (lut_bits == 12) {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 177 word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, diff.red);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 178 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, diff.green);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 179 word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, diff.blue);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 180 } else {
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 181 word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 182 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 183 word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 184 }
ba99d08da6adec Yongqiang Niu 2022-04-28 185 }
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 186 writel(word[0], (lut0_base + i * 4));
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 187 if (lut_bits == 12)
b13cb453a8db5d AngeloGioacchino Del Regno 2023-06-01 188 writel(word[1], (lut1_base + i * 4));
69a4237ab1d13a Yongqiang Niu 2021-01-29 189 }
a26000d47a579c AngeloGioacchino Del Regno 2023-06-01 190 }
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 191
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 @192 if (gamma && !gamma->data->has_dither) {
^^^^^^^^^^^^^
"gamma->data" is derefrenced without being checked.
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 193 /* Descending or Rising LUT */
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 194 if (mtk_gamma_lut_is_descending(lut, lut_size))
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 195 cfg_val |= FIELD_PREP(GAMMA_LUT_TYPE, 1);
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 196 else
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 197 cfg_val &= ~GAMMA_LUT_TYPE;
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 198 }
3d61ac6c44ce4d AngeloGioacchino Del Regno 2023-06-01 199
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 200 /* Enable the gamma table */
2979ceb320a4ed AngeloGioacchino Del Regno 2023-06-01 201 cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 202
e21d98027e50c8 AngeloGioacchino Del Regno 2023-06-01 203 /* Disable RELAY mode to pass the processed image */
e21d98027e50c8 AngeloGioacchino Del Regno 2023-06-01 204 cfg_val &= ~GAMMA_RELAY_MODE;
e21d98027e50c8 AngeloGioacchino Del Regno 2023-06-01 205
ee2cb37b9ac9e2 AngeloGioacchino Del Regno 2023-06-01 206 writel(cfg_val, regs + DISP_GAMMA_CFG);
69a4237ab1d13a Yongqiang Niu 2021-01-29 207 }
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v5 03/11] drm/mediatek: gamma: Support SoC specific LUT size
2023-06-01 12:10 ` AngeloGioacchino Del Regno
(?)
@ 2023-06-27 3:37 ` CK Hu (胡俊光)
-1 siblings, 0 replies; 42+ messages in thread
From: CK Hu (胡俊光) @ 2023-06-27 3:37 UTC (permalink / raw)
To: angelogioacchino.delregno, chunkuang.hu
Cc: Jason-JH Lin (林睿祥),
linux-kernel, dri-devel, linux-mediatek, wenst, matthias.bgg,
kernel, linux-arm-kernel
[-- Attachment #1: Type: text/html, Size: 12371 bytes --]
[-- Attachment #2: Type: text/plain, Size: 7468 bytes --]
Hi, Angelo:
On Thu, 2023-06-01 at 14:10 +0200, AngeloGioacchino Del Regno wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> Newer SoCs support a bigger Gamma LUT table: wire up a callback
> to retrieve the correct LUT size for each different Gamma IP.
>
> Co-developed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> [Angelo: Rewritten commit message/description + porting]
> Signed-off-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
> drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 25 ++++++++++++++++++-
> --
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 ++--
> drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 1 -
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 9 ++++++++
> 6 files changed, 35 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> index 75045932353e..e554b19f4830 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> @@ -53,6 +53,7 @@ void mtk_gamma_clk_disable(struct device *dev);
> void mtk_gamma_config(struct device *dev, unsigned int w,
> unsigned int h, unsigned int vrefresh,
> unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> +unsigned int mtk_gamma_get_lut_size(struct device *dev);
> void mtk_gamma_set(struct device *dev, struct drm_crtc_state
> *state);
> void mtk_gamma_set_common(struct device *dev, void __iomem *regs,
> struct drm_crtc_state *state);
> void mtk_gamma_start(struct device *dev);
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> index ce6f2499b891..b25ba209e7a4 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> @@ -25,10 +25,12 @@
> #define DISP_GAMMA_LUT 0x0700
>
> #define LUT_10BIT_MASK 0x03ff
> +#define LUT_SIZE_DEFAULT 512
Only AAL driver use this definition, so move this to AAL driver.
Regards,
CK
>
> struct mtk_disp_gamma_data {
> bool has_dither;
> bool lut_diff;
> + u16 lut_size;
> };
>
> /*
> @@ -55,6 +57,17 @@ void mtk_gamma_clk_disable(struct device *dev)
> clk_disable_unprepare(gamma->clk);
> }
>
> +unsigned int mtk_gamma_get_lut_size(struct device *dev)
> +{
> + struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
> + unsigned int lut_size = LUT_SIZE_DEFAULT;
> +
> + if (gamma && gamma->data)
> + lut_size = gamma->data->lut_size;
> +
> + return lut_size;
> +}
> +
> void mtk_gamma_set_common(struct device *dev, void __iomem *regs,
> struct drm_crtc_state *state)
> {
> struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
> @@ -62,6 +75,7 @@ void mtk_gamma_set_common(struct device *dev, void
> __iomem *regs, struct drm_crt
> struct drm_color_lut *lut;
> void __iomem *lut_base;
> bool lut_diff;
> + u16 lut_size;
> u32 word;
> u32 diff[3] = {0};
>
> @@ -69,17 +83,20 @@ void mtk_gamma_set_common(struct device *dev,
> void __iomem *regs, struct drm_crt
> if (!state->gamma_lut)
> return;
>
> - if (gamma && gamma->data)
> + if (gamma && gamma->data) {
> lut_diff = gamma->data->lut_diff;
> - else
> + lut_size = gamma->data->lut_size;
> + } else {
> lut_diff = false;
> + lut_size = LUT_SIZE_DEFAULT;
> + }
>
> reg = readl(regs + DISP_GAMMA_CFG);
> reg = reg | GAMMA_LUT_EN;
> writel(reg, regs + DISP_GAMMA_CFG);
> lut_base = regs + DISP_GAMMA_LUT;
> lut = (struct drm_color_lut *)state->gamma_lut->data;
> - for (i = 0; i < MTK_LUT_SIZE; i++) {
> + for (i = 0; i < lut_size; i++) {
> if (!lut_diff || (i % 2 == 0)) {
> word = (((lut[i].red >> 6) & LUT_10BIT_MASK) <<
> 20) +
> (((lut[i].green >> 6) & LUT_10BIT_MASK)
> << 10) +
> @@ -196,10 +213,12 @@ static int mtk_disp_gamma_remove(struct
> platform_device *pdev)
>
> static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
> .has_dither = true,
> + .lut_size = 512,
> };
>
> static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
> .lut_diff = true,
> + .lut_size = 512,
> };
>
> static const struct of_device_id mtk_disp_gamma_driver_dt_match[] =
> {
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index d40142842f85..0df62b076f49 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -958,8 +958,8 @@ int mtk_drm_crtc_create(struct drm_device
> *drm_dev,
> mtk_crtc->ddp_comp[i] = comp;
>
> if (comp->funcs) {
> - if (comp->funcs->gamma_set)
> - gamma_lut_size = MTK_LUT_SIZE;
> + if (comp->funcs->gamma_set && comp->funcs-
> >gamma_get_lut_size)
> + gamma_lut_size =
> mtk_ddp_gamma_get_lut_size(comp);
>
> if (comp->funcs->ctm_set)
> has_ctm = true;
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> index 3e9046993d09..b2e50292e57d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> @@ -10,7 +10,6 @@
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_plane.h"
>
> -#define MTK_LUT_SIZE 512
> #define MTK_MAX_BPC 10
> #define MTK_MIN_BPC 3
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index f114da4d36a9..c77af2e4000f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -322,6 +322,7 @@ static const struct mtk_ddp_comp_funcs ddp_dsi =
> {
> static const struct mtk_ddp_comp_funcs ddp_gamma = {
> .clk_enable = mtk_gamma_clk_enable,
> .clk_disable = mtk_gamma_clk_disable,
> + .gamma_get_lut_size = mtk_gamma_get_lut_size,
> .gamma_set = mtk_gamma_set,
> .config = mtk_gamma_config,
> .start = mtk_gamma_start,
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> index febcaeef16a1..c1355960e195 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> @@ -67,6 +67,7 @@ struct mtk_ddp_comp_funcs {
> void (*layer_config)(struct device *dev, unsigned int idx,
> struct mtk_plane_state *state,
> struct cmdq_pkt *cmdq_pkt);
> + unsigned int (*gamma_get_lut_size)(struct device *dev);
> void (*gamma_set)(struct device *dev,
> struct drm_crtc_state *state);
> void (*bgclr_in_on)(struct device *dev);
> @@ -186,6 +187,14 @@ static inline void
> mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp,
> comp->funcs->layer_config(comp->dev, idx, state,
> cmdq_pkt);
> }
>
> +static inline unsigned int mtk_ddp_gamma_get_lut_size(struct
> mtk_ddp_comp *comp)
> +{
> + if (comp->funcs && comp->funcs->gamma_get_lut_size)
> + return comp->funcs->gamma_get_lut_size(comp->dev);
> +
> + return 0;
> +}
> +
> static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp,
> struct drm_crtc_state *state)
> {
> --
> 2.40.1
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v5 03/11] drm/mediatek: gamma: Support SoC specific LUT size
@ 2023-06-27 3:37 ` CK Hu (胡俊光)
0 siblings, 0 replies; 42+ messages in thread
From: CK Hu (胡俊光) @ 2023-06-27 3:37 UTC (permalink / raw)
To: angelogioacchino.delregno, chunkuang.hu
Cc: linux-kernel, linux-mediatek, wenst,
Jason-JH Lin (林睿祥),
kernel, dri-devel, linux-arm-kernel, matthias.bgg
Hi, Angelo:
On Thu, 2023-06-01 at 14:10 +0200, AngeloGioacchino Del Regno wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> Newer SoCs support a bigger Gamma LUT table: wire up a callback
> to retrieve the correct LUT size for each different Gamma IP.
>
> Co-developed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> [Angelo: Rewritten commit message/description + porting]
> Signed-off-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
> drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 25 ++++++++++++++++++-
> --
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 ++--
> drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 1 -
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 9 ++++++++
> 6 files changed, 35 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> index 75045932353e..e554b19f4830 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> @@ -53,6 +53,7 @@ void mtk_gamma_clk_disable(struct device *dev);
> void mtk_gamma_config(struct device *dev, unsigned int w,
> unsigned int h, unsigned int vrefresh,
> unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> +unsigned int mtk_gamma_get_lut_size(struct device *dev);
> void mtk_gamma_set(struct device *dev, struct drm_crtc_state
> *state);
> void mtk_gamma_set_common(struct device *dev, void __iomem *regs,
> struct drm_crtc_state *state);
> void mtk_gamma_start(struct device *dev);
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> index ce6f2499b891..b25ba209e7a4 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> @@ -25,10 +25,12 @@
> #define DISP_GAMMA_LUT 0x0700
>
> #define LUT_10BIT_MASK 0x03ff
> +#define LUT_SIZE_DEFAULT 512
Only AAL driver use this definition, so move this to AAL driver.
Regards,
CK
>
> struct mtk_disp_gamma_data {
> bool has_dither;
> bool lut_diff;
> + u16 lut_size;
> };
>
> /*
> @@ -55,6 +57,17 @@ void mtk_gamma_clk_disable(struct device *dev)
> clk_disable_unprepare(gamma->clk);
> }
>
> +unsigned int mtk_gamma_get_lut_size(struct device *dev)
> +{
> + struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
> + unsigned int lut_size = LUT_SIZE_DEFAULT;
> +
> + if (gamma && gamma->data)
> + lut_size = gamma->data->lut_size;
> +
> + return lut_size;
> +}
> +
> void mtk_gamma_set_common(struct device *dev, void __iomem *regs,
> struct drm_crtc_state *state)
> {
> struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
> @@ -62,6 +75,7 @@ void mtk_gamma_set_common(struct device *dev, void
> __iomem *regs, struct drm_crt
> struct drm_color_lut *lut;
> void __iomem *lut_base;
> bool lut_diff;
> + u16 lut_size;
> u32 word;
> u32 diff[3] = {0};
>
> @@ -69,17 +83,20 @@ void mtk_gamma_set_common(struct device *dev,
> void __iomem *regs, struct drm_crt
> if (!state->gamma_lut)
> return;
>
> - if (gamma && gamma->data)
> + if (gamma && gamma->data) {
> lut_diff = gamma->data->lut_diff;
> - else
> + lut_size = gamma->data->lut_size;
> + } else {
> lut_diff = false;
> + lut_size = LUT_SIZE_DEFAULT;
> + }
>
> reg = readl(regs + DISP_GAMMA_CFG);
> reg = reg | GAMMA_LUT_EN;
> writel(reg, regs + DISP_GAMMA_CFG);
> lut_base = regs + DISP_GAMMA_LUT;
> lut = (struct drm_color_lut *)state->gamma_lut->data;
> - for (i = 0; i < MTK_LUT_SIZE; i++) {
> + for (i = 0; i < lut_size; i++) {
> if (!lut_diff || (i % 2 == 0)) {
> word = (((lut[i].red >> 6) & LUT_10BIT_MASK) <<
> 20) +
> (((lut[i].green >> 6) & LUT_10BIT_MASK)
> << 10) +
> @@ -196,10 +213,12 @@ static int mtk_disp_gamma_remove(struct
> platform_device *pdev)
>
> static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
> .has_dither = true,
> + .lut_size = 512,
> };
>
> static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
> .lut_diff = true,
> + .lut_size = 512,
> };
>
> static const struct of_device_id mtk_disp_gamma_driver_dt_match[] =
> {
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index d40142842f85..0df62b076f49 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -958,8 +958,8 @@ int mtk_drm_crtc_create(struct drm_device
> *drm_dev,
> mtk_crtc->ddp_comp[i] = comp;
>
> if (comp->funcs) {
> - if (comp->funcs->gamma_set)
> - gamma_lut_size = MTK_LUT_SIZE;
> + if (comp->funcs->gamma_set && comp->funcs-
> >gamma_get_lut_size)
> + gamma_lut_size =
> mtk_ddp_gamma_get_lut_size(comp);
>
> if (comp->funcs->ctm_set)
> has_ctm = true;
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> index 3e9046993d09..b2e50292e57d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> @@ -10,7 +10,6 @@
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_plane.h"
>
> -#define MTK_LUT_SIZE 512
> #define MTK_MAX_BPC 10
> #define MTK_MIN_BPC 3
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index f114da4d36a9..c77af2e4000f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -322,6 +322,7 @@ static const struct mtk_ddp_comp_funcs ddp_dsi =
> {
> static const struct mtk_ddp_comp_funcs ddp_gamma = {
> .clk_enable = mtk_gamma_clk_enable,
> .clk_disable = mtk_gamma_clk_disable,
> + .gamma_get_lut_size = mtk_gamma_get_lut_size,
> .gamma_set = mtk_gamma_set,
> .config = mtk_gamma_config,
> .start = mtk_gamma_start,
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> index febcaeef16a1..c1355960e195 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> @@ -67,6 +67,7 @@ struct mtk_ddp_comp_funcs {
> void (*layer_config)(struct device *dev, unsigned int idx,
> struct mtk_plane_state *state,
> struct cmdq_pkt *cmdq_pkt);
> + unsigned int (*gamma_get_lut_size)(struct device *dev);
> void (*gamma_set)(struct device *dev,
> struct drm_crtc_state *state);
> void (*bgclr_in_on)(struct device *dev);
> @@ -186,6 +187,14 @@ static inline void
> mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp,
> comp->funcs->layer_config(comp->dev, idx, state,
> cmdq_pkt);
> }
>
> +static inline unsigned int mtk_ddp_gamma_get_lut_size(struct
> mtk_ddp_comp *comp)
> +{
> + if (comp->funcs && comp->funcs->gamma_get_lut_size)
> + return comp->funcs->gamma_get_lut_size(comp->dev);
> +
> + return 0;
> +}
> +
> static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp,
> struct drm_crtc_state *state)
> {
> --
> 2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH v5 03/11] drm/mediatek: gamma: Support SoC specific LUT size
@ 2023-06-27 3:37 ` CK Hu (胡俊光)
0 siblings, 0 replies; 42+ messages in thread
From: CK Hu (胡俊光) @ 2023-06-27 3:37 UTC (permalink / raw)
To: angelogioacchino.delregno, chunkuang.hu
Cc: linux-kernel, linux-mediatek, wenst,
Jason-JH Lin (林睿祥),
kernel, dri-devel, linux-arm-kernel, matthias.bgg
Hi, Angelo:
On Thu, 2023-06-01 at 14:10 +0200, AngeloGioacchino Del Regno wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> Newer SoCs support a bigger Gamma LUT table: wire up a callback
> to retrieve the correct LUT size for each different Gamma IP.
>
> Co-developed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> [Angelo: Rewritten commit message/description + porting]
> Signed-off-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
> drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 25 ++++++++++++++++++-
> --
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 ++--
> drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 1 -
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 9 ++++++++
> 6 files changed, 35 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> index 75045932353e..e554b19f4830 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> @@ -53,6 +53,7 @@ void mtk_gamma_clk_disable(struct device *dev);
> void mtk_gamma_config(struct device *dev, unsigned int w,
> unsigned int h, unsigned int vrefresh,
> unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> +unsigned int mtk_gamma_get_lut_size(struct device *dev);
> void mtk_gamma_set(struct device *dev, struct drm_crtc_state
> *state);
> void mtk_gamma_set_common(struct device *dev, void __iomem *regs,
> struct drm_crtc_state *state);
> void mtk_gamma_start(struct device *dev);
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> index ce6f2499b891..b25ba209e7a4 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> @@ -25,10 +25,12 @@
> #define DISP_GAMMA_LUT 0x0700
>
> #define LUT_10BIT_MASK 0x03ff
> +#define LUT_SIZE_DEFAULT 512
Only AAL driver use this definition, so move this to AAL driver.
Regards,
CK
>
> struct mtk_disp_gamma_data {
> bool has_dither;
> bool lut_diff;
> + u16 lut_size;
> };
>
> /*
> @@ -55,6 +57,17 @@ void mtk_gamma_clk_disable(struct device *dev)
> clk_disable_unprepare(gamma->clk);
> }
>
> +unsigned int mtk_gamma_get_lut_size(struct device *dev)
> +{
> + struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
> + unsigned int lut_size = LUT_SIZE_DEFAULT;
> +
> + if (gamma && gamma->data)
> + lut_size = gamma->data->lut_size;
> +
> + return lut_size;
> +}
> +
> void mtk_gamma_set_common(struct device *dev, void __iomem *regs,
> struct drm_crtc_state *state)
> {
> struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
> @@ -62,6 +75,7 @@ void mtk_gamma_set_common(struct device *dev, void
> __iomem *regs, struct drm_crt
> struct drm_color_lut *lut;
> void __iomem *lut_base;
> bool lut_diff;
> + u16 lut_size;
> u32 word;
> u32 diff[3] = {0};
>
> @@ -69,17 +83,20 @@ void mtk_gamma_set_common(struct device *dev,
> void __iomem *regs, struct drm_crt
> if (!state->gamma_lut)
> return;
>
> - if (gamma && gamma->data)
> + if (gamma && gamma->data) {
> lut_diff = gamma->data->lut_diff;
> - else
> + lut_size = gamma->data->lut_size;
> + } else {
> lut_diff = false;
> + lut_size = LUT_SIZE_DEFAULT;
> + }
>
> reg = readl(regs + DISP_GAMMA_CFG);
> reg = reg | GAMMA_LUT_EN;
> writel(reg, regs + DISP_GAMMA_CFG);
> lut_base = regs + DISP_GAMMA_LUT;
> lut = (struct drm_color_lut *)state->gamma_lut->data;
> - for (i = 0; i < MTK_LUT_SIZE; i++) {
> + for (i = 0; i < lut_size; i++) {
> if (!lut_diff || (i % 2 == 0)) {
> word = (((lut[i].red >> 6) & LUT_10BIT_MASK) <<
> 20) +
> (((lut[i].green >> 6) & LUT_10BIT_MASK)
> << 10) +
> @@ -196,10 +213,12 @@ static int mtk_disp_gamma_remove(struct
> platform_device *pdev)
>
> static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
> .has_dither = true,
> + .lut_size = 512,
> };
>
> static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
> .lut_diff = true,
> + .lut_size = 512,
> };
>
> static const struct of_device_id mtk_disp_gamma_driver_dt_match[] =
> {
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index d40142842f85..0df62b076f49 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -958,8 +958,8 @@ int mtk_drm_crtc_create(struct drm_device
> *drm_dev,
> mtk_crtc->ddp_comp[i] = comp;
>
> if (comp->funcs) {
> - if (comp->funcs->gamma_set)
> - gamma_lut_size = MTK_LUT_SIZE;
> + if (comp->funcs->gamma_set && comp->funcs-
> >gamma_get_lut_size)
> + gamma_lut_size =
> mtk_ddp_gamma_get_lut_size(comp);
>
> if (comp->funcs->ctm_set)
> has_ctm = true;
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> index 3e9046993d09..b2e50292e57d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> @@ -10,7 +10,6 @@
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_plane.h"
>
> -#define MTK_LUT_SIZE 512
> #define MTK_MAX_BPC 10
> #define MTK_MIN_BPC 3
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index f114da4d36a9..c77af2e4000f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -322,6 +322,7 @@ static const struct mtk_ddp_comp_funcs ddp_dsi =
> {
> static const struct mtk_ddp_comp_funcs ddp_gamma = {
> .clk_enable = mtk_gamma_clk_enable,
> .clk_disable = mtk_gamma_clk_disable,
> + .gamma_get_lut_size = mtk_gamma_get_lut_size,
> .gamma_set = mtk_gamma_set,
> .config = mtk_gamma_config,
> .start = mtk_gamma_start,
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> index febcaeef16a1..c1355960e195 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> @@ -67,6 +67,7 @@ struct mtk_ddp_comp_funcs {
> void (*layer_config)(struct device *dev, unsigned int idx,
> struct mtk_plane_state *state,
> struct cmdq_pkt *cmdq_pkt);
> + unsigned int (*gamma_get_lut_size)(struct device *dev);
> void (*gamma_set)(struct device *dev,
> struct drm_crtc_state *state);
> void (*bgclr_in_on)(struct device *dev);
> @@ -186,6 +187,14 @@ static inline void
> mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp,
> comp->funcs->layer_config(comp->dev, idx, state,
> cmdq_pkt);
> }
>
> +static inline unsigned int mtk_ddp_gamma_get_lut_size(struct
> mtk_ddp_comp *comp)
> +{
> + if (comp->funcs && comp->funcs->gamma_get_lut_size)
> + return comp->funcs->gamma_get_lut_size(comp->dev);
> +
> + return 0;
> +}
> +
> static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp,
> struct drm_crtc_state *state)
> {
> --
> 2.40.1
^ permalink raw reply [flat|nested] 42+ messages in thread
end of thread, other threads:[~2023-06-27 3:42 UTC | newest]
Thread overview: 42+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-06-01 12:10 [PATCH v5 00/11] MediaTek DDP GAMMA - 12-bit LUT support AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 01/11] drm/mediatek: gamma: Adjust mtk_drm_gamma_set_common parameters AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 02/11] drm/mediatek: gamma: Reduce indentation in mtk_gamma_set_common() AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 03/11] drm/mediatek: gamma: Support SoC specific LUT size AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-27 3:37 ` CK Hu (胡俊光)
2023-06-27 3:37 ` CK Hu (胡俊光)
2023-06-27 3:37 ` CK Hu (胡俊光)
2023-06-01 12:10 ` [PATCH v5 04/11] drm/mediatek: gamma: Improve and simplify HW LUT calculation AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 05/11] drm/mediatek: gamma: Enable the Gamma LUT table only after programming AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 06/11] drm/mediatek: gamma: Use bitfield macros AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 07/11] drm/mediatek: gamma: Support specifying number of bits per LUT component AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 08/11] drm/mediatek: gamma: Support multi-bank gamma LUT AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 09/11] drm/mediatek: gamma: Add support for 12-bit LUT and MT8195 AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 10/11] drm/mediatek: gamma: Make sure relay mode is disabled AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` [PATCH v5 11/11] drm/mediatek: gamma: Program gamma LUT type for descending or rising AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-01 12:10 ` AngeloGioacchino Del Regno
2023-06-10 6:58 ` Dan Carpenter
2023-06-10 6:58 ` Dan Carpenter
2023-06-10 6:58 ` Dan Carpenter
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.