All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH 0/3] Fix a couple of missing unevaluated properties
@ 2023-06-06 10:30 ` Miquel Raynal
  0 siblings, 0 replies; 10+ messages in thread
From: Miquel Raynal @ 2023-06-06 10:30 UTC (permalink / raw)
  To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus,
	Pratyush Yadav, Michael Walle, linux-mtd
  Cc: Rob Herring, Krzysztof Kozlowski, devicetree, Chris Packham,
	Manivannan Sadhasivam, Andy Gross, Bjorn Andersson,
	Konrad Dybcio, Christian Marangi, Thomas Petazzoni,
	Miquel Raynal

As discussed with Krzysztof and Chris, it seems like each NAND
controller binding should actually explicitely list all the allowed
properties in a schema and use "unevaluatedProperties: false" in both
the NAND controller and the NAND chip sections. While this restriction
always applied on the controller side, this was not enforced on the
chips side AFAIR.

Link: https://lore.kernel.org/all/a23dd485-a3d9-e31f-be3e-0ab293fcfc4a@linaro.org/

While converting Marvell controller bindings, Chris explicitely pointed
similar bindings which would also trigger errors when using
"unevaluatedProperties: false" because of the reg/partitions/etc
properties not being described. Here is an attempt at making these more
precise and robust.

These change made me realize the qcom,boot-partition property
description was broken, so here is a fix for it.

Thanks,
Miquèl

Miquel Raynal (3):
  dt-bindings: mtd: qcom: Fix a property position
  dt-bindings: mtd: qcom: Prevent NAND chip unevaluated properties
  dt-bindings: mtd: ingenic: Prevent NAND chip unevaluated properties

 .../devicetree/bindings/mtd/ingenic,nand.yaml | 11 +++++
 .../devicetree/bindings/mtd/qcom,nandc.yaml   | 47 ++++++++++++-------
 2 files changed, 42 insertions(+), 16 deletions(-)

-- 
2.34.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH 0/3] Fix a couple of missing unevaluated properties
@ 2023-06-06 10:30 ` Miquel Raynal
  0 siblings, 0 replies; 10+ messages in thread
From: Miquel Raynal @ 2023-06-06 10:30 UTC (permalink / raw)
  To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus,
	Pratyush Yadav, Michael Walle, linux-mtd
  Cc: Rob Herring, Krzysztof Kozlowski, devicetree, Chris Packham,
	Manivannan Sadhasivam, Andy Gross, Bjorn Andersson,
	Konrad Dybcio, Christian Marangi, Thomas Petazzoni,
	Miquel Raynal

As discussed with Krzysztof and Chris, it seems like each NAND
controller binding should actually explicitely list all the allowed
properties in a schema and use "unevaluatedProperties: false" in both
the NAND controller and the NAND chip sections. While this restriction
always applied on the controller side, this was not enforced on the
chips side AFAIR.

Link: https://lore.kernel.org/all/a23dd485-a3d9-e31f-be3e-0ab293fcfc4a@linaro.org/

While converting Marvell controller bindings, Chris explicitely pointed
similar bindings which would also trigger errors when using
"unevaluatedProperties: false" because of the reg/partitions/etc
properties not being described. Here is an attempt at making these more
precise and robust.

These change made me realize the qcom,boot-partition property
description was broken, so here is a fix for it.

Thanks,
Miquèl

Miquel Raynal (3):
  dt-bindings: mtd: qcom: Fix a property position
  dt-bindings: mtd: qcom: Prevent NAND chip unevaluated properties
  dt-bindings: mtd: ingenic: Prevent NAND chip unevaluated properties

 .../devicetree/bindings/mtd/ingenic,nand.yaml | 11 +++++
 .../devicetree/bindings/mtd/qcom,nandc.yaml   | 47 ++++++++++++-------
 2 files changed, 42 insertions(+), 16 deletions(-)

-- 
2.34.1


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH 1/3] dt-bindings: mtd: qcom: Fix a property position
  2023-06-06 10:30 ` Miquel Raynal
@ 2023-06-06 10:30   ` Miquel Raynal
  -1 siblings, 0 replies; 10+ messages in thread
From: Miquel Raynal @ 2023-06-06 10:30 UTC (permalink / raw)
  To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus,
	Pratyush Yadav, Michael Walle, linux-mtd
  Cc: Rob Herring, Krzysztof Kozlowski, devicetree, Chris Packham,
	Manivannan Sadhasivam, Andy Gross, Bjorn Andersson,
	Konrad Dybcio, Christian Marangi, Thomas Petazzoni,
	Miquel Raynal

qcom,boot-partitions is a NAND chip property, not a NAND controller
property. Move the description of the property into the NAND chip
section and just enable the property in the if/else block.

Fixes: 5278cc93a97f ("dt-bindings: mtd: qcom_nandc: document qcom,boot-partitions binding")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 .../devicetree/bindings/mtd/qcom,nandc.yaml   | 41 +++++++++++--------
 1 file changed, 25 insertions(+), 16 deletions(-)

diff --git a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
index 07024ee45951..7217d8a64d14 100644
--- a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
+++ b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
@@ -45,6 +45,22 @@ patternProperties:
         enum:
           - 512
 
+      qcom,boot-partitions:
+        $ref: /schemas/types.yaml#/definitions/uint32-matrix
+        items:
+          items:
+            - description: offset
+            - description: size
+        description:
+          Boot partition use a different layout where the 4 bytes of spare
+          data are not protected by ECC. Use this to declare these special
+          partitions by defining first the offset and then the size.
+
+          It's in the form of <offset1 size1 offset2 size2 offset3 ...>
+          and should be declared in ascending order.
+
+          Refer to the ipq8064 example on how to use this special binding.
+
 allOf:
   - $ref: "nand-controller.yaml#"
 
@@ -107,22 +123,15 @@ allOf:
               - qcom,ipq806x-nand
 
     then:
-      properties:
-        qcom,boot-partitions:
-          $ref: /schemas/types.yaml#/definitions/uint32-matrix
-          items:
-            items:
-              - description: offset
-              - description: size
-          description:
-            Boot partition use a different layout where the 4 bytes of spare
-            data are not protected by ECC. Use this to declare these special
-            partitions by defining first the offset and then the size.
-
-            It's in the form of <offset1 size1 offset2 size2 offset3 ...>
-            and should be declared in ascending order.
-
-            Refer to the ipq8064 example on how to use this special binding.
+      patternProperties:
+        "^nand@[a-f0-9]$":
+          properties:
+            qcom,boot-partitions: true
+    else:
+      patternProperties:
+        "^nand@[a-f0-9]$":
+          properties:
+            qcom,boot-partitions: false
 
 required:
   - compatible
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 1/3] dt-bindings: mtd: qcom: Fix a property position
@ 2023-06-06 10:30   ` Miquel Raynal
  0 siblings, 0 replies; 10+ messages in thread
From: Miquel Raynal @ 2023-06-06 10:30 UTC (permalink / raw)
  To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus,
	Pratyush Yadav, Michael Walle, linux-mtd
  Cc: Rob Herring, Krzysztof Kozlowski, devicetree, Chris Packham,
	Manivannan Sadhasivam, Andy Gross, Bjorn Andersson,
	Konrad Dybcio, Christian Marangi, Thomas Petazzoni,
	Miquel Raynal

qcom,boot-partitions is a NAND chip property, not a NAND controller
property. Move the description of the property into the NAND chip
section and just enable the property in the if/else block.

Fixes: 5278cc93a97f ("dt-bindings: mtd: qcom_nandc: document qcom,boot-partitions binding")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 .../devicetree/bindings/mtd/qcom,nandc.yaml   | 41 +++++++++++--------
 1 file changed, 25 insertions(+), 16 deletions(-)

diff --git a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
index 07024ee45951..7217d8a64d14 100644
--- a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
+++ b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
@@ -45,6 +45,22 @@ patternProperties:
         enum:
           - 512
 
+      qcom,boot-partitions:
+        $ref: /schemas/types.yaml#/definitions/uint32-matrix
+        items:
+          items:
+            - description: offset
+            - description: size
+        description:
+          Boot partition use a different layout where the 4 bytes of spare
+          data are not protected by ECC. Use this to declare these special
+          partitions by defining first the offset and then the size.
+
+          It's in the form of <offset1 size1 offset2 size2 offset3 ...>
+          and should be declared in ascending order.
+
+          Refer to the ipq8064 example on how to use this special binding.
+
 allOf:
   - $ref: "nand-controller.yaml#"
 
@@ -107,22 +123,15 @@ allOf:
               - qcom,ipq806x-nand
 
     then:
-      properties:
-        qcom,boot-partitions:
-          $ref: /schemas/types.yaml#/definitions/uint32-matrix
-          items:
-            items:
-              - description: offset
-              - description: size
-          description:
-            Boot partition use a different layout where the 4 bytes of spare
-            data are not protected by ECC. Use this to declare these special
-            partitions by defining first the offset and then the size.
-
-            It's in the form of <offset1 size1 offset2 size2 offset3 ...>
-            and should be declared in ascending order.
-
-            Refer to the ipq8064 example on how to use this special binding.
+      patternProperties:
+        "^nand@[a-f0-9]$":
+          properties:
+            qcom,boot-partitions: true
+    else:
+      patternProperties:
+        "^nand@[a-f0-9]$":
+          properties:
+            qcom,boot-partitions: false
 
 required:
   - compatible
-- 
2.34.1


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 2/3] dt-bindings: mtd: qcom: Prevent NAND chip unevaluated properties
  2023-06-06 10:30 ` Miquel Raynal
@ 2023-06-06 10:30   ` Miquel Raynal
  -1 siblings, 0 replies; 10+ messages in thread
From: Miquel Raynal @ 2023-06-06 10:30 UTC (permalink / raw)
  To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus,
	Pratyush Yadav, Michael Walle, linux-mtd
  Cc: Rob Herring, Krzysztof Kozlowski, devicetree, Chris Packham,
	Manivannan Sadhasivam, Andy Gross, Bjorn Andersson,
	Konrad Dybcio, Christian Marangi, Thomas Petazzoni,
	Miquel Raynal

List all the possible properties in the NAND chip as per the example and
set unevaluatedProperties to false in the NAND chip section.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 Documentation/devicetree/bindings/mtd/qcom,nandc.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
index 7217d8a64d14..4ed14cd97cb8 100644
--- a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
+++ b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
@@ -35,6 +35,8 @@ patternProperties:
   "^nand@[a-f0-9]$":
     type: object
     properties:
+      reg: true
+
       nand-bus-width:
         const: 8
 
@@ -61,6 +63,10 @@ patternProperties:
 
           Refer to the ipq8064 example on how to use this special binding.
 
+      partitions: true
+
+    unevaluatedProperties: false
+
 allOf:
   - $ref: "nand-controller.yaml#"
 
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 2/3] dt-bindings: mtd: qcom: Prevent NAND chip unevaluated properties
@ 2023-06-06 10:30   ` Miquel Raynal
  0 siblings, 0 replies; 10+ messages in thread
From: Miquel Raynal @ 2023-06-06 10:30 UTC (permalink / raw)
  To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus,
	Pratyush Yadav, Michael Walle, linux-mtd
  Cc: Rob Herring, Krzysztof Kozlowski, devicetree, Chris Packham,
	Manivannan Sadhasivam, Andy Gross, Bjorn Andersson,
	Konrad Dybcio, Christian Marangi, Thomas Petazzoni,
	Miquel Raynal

List all the possible properties in the NAND chip as per the example and
set unevaluatedProperties to false in the NAND chip section.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 Documentation/devicetree/bindings/mtd/qcom,nandc.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
index 7217d8a64d14..4ed14cd97cb8 100644
--- a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
+++ b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
@@ -35,6 +35,8 @@ patternProperties:
   "^nand@[a-f0-9]$":
     type: object
     properties:
+      reg: true
+
       nand-bus-width:
         const: 8
 
@@ -61,6 +63,10 @@ patternProperties:
 
           Refer to the ipq8064 example on how to use this special binding.
 
+      partitions: true
+
+    unevaluatedProperties: false
+
 allOf:
   - $ref: "nand-controller.yaml#"
 
-- 
2.34.1


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 3/3] dt-bindings: mtd: ingenic: Prevent NAND chip unevaluated properties
  2023-06-06 10:30 ` Miquel Raynal
@ 2023-06-06 10:30   ` Miquel Raynal
  -1 siblings, 0 replies; 10+ messages in thread
From: Miquel Raynal @ 2023-06-06 10:30 UTC (permalink / raw)
  To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus,
	Pratyush Yadav, Michael Walle, linux-mtd
  Cc: Rob Herring, Krzysztof Kozlowski, devicetree, Chris Packham,
	Manivannan Sadhasivam, Andy Gross, Bjorn Andersson,
	Konrad Dybcio, Christian Marangi, Thomas Petazzoni,
	Miquel Raynal

List all the possible properties in the NAND chip as per the example and
set unevaluatedProperties to false in the NAND chip section.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 .../devicetree/bindings/mtd/ingenic,nand.yaml         | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
index a7bdb5d3675c..facb44ebcaa6 100644
--- a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
+++ b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
@@ -40,6 +40,8 @@ patternProperties:
   "^nand@[a-f0-9]$":
     type: object
     properties:
+      reg: true
+
       rb-gpios:
         description: GPIO specifier for the busy pin.
         maxItems: 1
@@ -48,6 +50,15 @@ patternProperties:
         description: GPIO specifier for the write-protect pin.
         maxItems: 1
 
+      nand-ecc-step-size: true
+      nand-ecc-strength: true
+      nand-ecc-mode: true
+      nand-on-flash-bbt: true
+
+      partitions: true
+
+    unevaluatedProperties: false
+
 required:
   - compatible
   - reg
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 3/3] dt-bindings: mtd: ingenic: Prevent NAND chip unevaluated properties
@ 2023-06-06 10:30   ` Miquel Raynal
  0 siblings, 0 replies; 10+ messages in thread
From: Miquel Raynal @ 2023-06-06 10:30 UTC (permalink / raw)
  To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus,
	Pratyush Yadav, Michael Walle, linux-mtd
  Cc: Rob Herring, Krzysztof Kozlowski, devicetree, Chris Packham,
	Manivannan Sadhasivam, Andy Gross, Bjorn Andersson,
	Konrad Dybcio, Christian Marangi, Thomas Petazzoni,
	Miquel Raynal

List all the possible properties in the NAND chip as per the example and
set unevaluatedProperties to false in the NAND chip section.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 .../devicetree/bindings/mtd/ingenic,nand.yaml         | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
index a7bdb5d3675c..facb44ebcaa6 100644
--- a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
+++ b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
@@ -40,6 +40,8 @@ patternProperties:
   "^nand@[a-f0-9]$":
     type: object
     properties:
+      reg: true
+
       rb-gpios:
         description: GPIO specifier for the busy pin.
         maxItems: 1
@@ -48,6 +50,15 @@ patternProperties:
         description: GPIO specifier for the write-protect pin.
         maxItems: 1
 
+      nand-ecc-step-size: true
+      nand-ecc-strength: true
+      nand-ecc-mode: true
+      nand-on-flash-bbt: true
+
+      partitions: true
+
+    unevaluatedProperties: false
+
 required:
   - compatible
   - reg
-- 
2.34.1


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH 0/3] Fix a couple of missing unevaluated properties
  2023-06-06 10:30 ` Miquel Raynal
@ 2023-06-06 16:23   ` Miquel Raynal
  -1 siblings, 0 replies; 10+ messages in thread
From: Miquel Raynal @ 2023-06-06 16:23 UTC (permalink / raw)
  To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus,
	Pratyush Yadav, Michael Walle, linux-mtd
  Cc: Rob Herring, Krzysztof Kozlowski, devicetree, Chris Packham,
	Manivannan Sadhasivam, Andy Gross, Bjorn Andersson,
	Konrad Dybcio, Christian Marangi, Thomas Petazzoni

Hello,

miquel.raynal@bootlin.com wrote on Tue,  6 Jun 2023 12:30:54 +0200:

> As discussed with Krzysztof and Chris, it seems like each NAND
> controller binding should actually explicitely list all the allowed
> properties in a schema and use "unevaluatedProperties: false" in both
> the NAND controller and the NAND chip sections. While this restriction
> always applied on the controller side, this was not enforced on the
> chips side AFAIR.
> 
> Link: https://lore.kernel.org/all/a23dd485-a3d9-e31f-be3e-0ab293fcfc4a@linaro.org/

The discussion pointed above has lead to another observation which also
needs to be fixed in this series. A v2 is coming soon.

> While converting Marvell controller bindings, Chris explicitely pointed
> similar bindings which would also trigger errors when using
> "unevaluatedProperties: false" because of the reg/partitions/etc
> properties not being described. Here is an attempt at making these more
> precise and robust.
> 
> These change made me realize the qcom,boot-partition property
> description was broken, so here is a fix for it.
> 
> Thanks,
> Miquèl
> 
> Miquel Raynal (3):
>   dt-bindings: mtd: qcom: Fix a property position
>   dt-bindings: mtd: qcom: Prevent NAND chip unevaluated properties
>   dt-bindings: mtd: ingenic: Prevent NAND chip unevaluated properties
> 
>  .../devicetree/bindings/mtd/ingenic,nand.yaml | 11 +++++
>  .../devicetree/bindings/mtd/qcom,nandc.yaml   | 47 ++++++++++++-------
>  2 files changed, 42 insertions(+), 16 deletions(-)
> 


Thanks,
Miquèl

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH 0/3] Fix a couple of missing unevaluated properties
@ 2023-06-06 16:23   ` Miquel Raynal
  0 siblings, 0 replies; 10+ messages in thread
From: Miquel Raynal @ 2023-06-06 16:23 UTC (permalink / raw)
  To: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus,
	Pratyush Yadav, Michael Walle, linux-mtd
  Cc: Rob Herring, Krzysztof Kozlowski, devicetree, Chris Packham,
	Manivannan Sadhasivam, Andy Gross, Bjorn Andersson,
	Konrad Dybcio, Christian Marangi, Thomas Petazzoni

Hello,

miquel.raynal@bootlin.com wrote on Tue,  6 Jun 2023 12:30:54 +0200:

> As discussed with Krzysztof and Chris, it seems like each NAND
> controller binding should actually explicitely list all the allowed
> properties in a schema and use "unevaluatedProperties: false" in both
> the NAND controller and the NAND chip sections. While this restriction
> always applied on the controller side, this was not enforced on the
> chips side AFAIR.
> 
> Link: https://lore.kernel.org/all/a23dd485-a3d9-e31f-be3e-0ab293fcfc4a@linaro.org/

The discussion pointed above has lead to another observation which also
needs to be fixed in this series. A v2 is coming soon.

> While converting Marvell controller bindings, Chris explicitely pointed
> similar bindings which would also trigger errors when using
> "unevaluatedProperties: false" because of the reg/partitions/etc
> properties not being described. Here is an attempt at making these more
> precise and robust.
> 
> These change made me realize the qcom,boot-partition property
> description was broken, so here is a fix for it.
> 
> Thanks,
> Miquèl
> 
> Miquel Raynal (3):
>   dt-bindings: mtd: qcom: Fix a property position
>   dt-bindings: mtd: qcom: Prevent NAND chip unevaluated properties
>   dt-bindings: mtd: ingenic: Prevent NAND chip unevaluated properties
> 
>  .../devicetree/bindings/mtd/ingenic,nand.yaml | 11 +++++
>  .../devicetree/bindings/mtd/qcom,nandc.yaml   | 47 ++++++++++++-------
>  2 files changed, 42 insertions(+), 16 deletions(-)
> 


Thanks,
Miquèl

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2023-06-06 16:24 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-06-06 10:30 [PATCH 0/3] Fix a couple of missing unevaluated properties Miquel Raynal
2023-06-06 10:30 ` Miquel Raynal
2023-06-06 10:30 ` [PATCH 1/3] dt-bindings: mtd: qcom: Fix a property position Miquel Raynal
2023-06-06 10:30   ` Miquel Raynal
2023-06-06 10:30 ` [PATCH 2/3] dt-bindings: mtd: qcom: Prevent NAND chip unevaluated properties Miquel Raynal
2023-06-06 10:30   ` Miquel Raynal
2023-06-06 10:30 ` [PATCH 3/3] dt-bindings: mtd: ingenic: " Miquel Raynal
2023-06-06 10:30   ` Miquel Raynal
2023-06-06 16:23 ` [PATCH 0/3] Fix a couple of missing " Miquel Raynal
2023-06-06 16:23   ` Miquel Raynal

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.