* [Intel-gfx] [PATCH v3 0/3] Add rc_range_params for YUV420
@ 2023-07-03 10:12 Suraj Kandpal
2023-07-03 10:12 ` [Intel-gfx] [PATCH v3 1/3] drm/i915/dsc: Move rc param calculation for native_420 Suraj Kandpal
` (5 more replies)
0 siblings, 6 replies; 10+ messages in thread
From: Suraj Kandpal @ 2023-07-03 10:12 UTC (permalink / raw)
To: intel-gfx
Calculations for YUV420 were missing from calculate_rc_param,
add them be in line with DSC 1.2a specs.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Suraj Kandpal (3):
drm/i915/dsc: Move rc param calculation for native_420
drm/i915/drm: Fix comment for YUV420 qp table declaration
drm/i915/dsc: Add rc_range_parameter calculation for YCBCR420
.../gpu/drm/i915/display/intel_qp_tables.c | 10 +-
drivers/gpu/drm/i915/display/intel_vdsc.c | 187 ++++++++++++------
2 files changed, 135 insertions(+), 62 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v3 1/3] drm/i915/dsc: Move rc param calculation for native_420
2023-07-03 10:12 [Intel-gfx] [PATCH v3 0/3] Add rc_range_params for YUV420 Suraj Kandpal
@ 2023-07-03 10:12 ` Suraj Kandpal
2023-07-04 8:25 ` Nautiyal, Ankit K
2023-07-03 10:12 ` [Intel-gfx] [PATCH v3 2/3] drm/i915/drm: Fix comment for YUV420 qp table declaration Suraj Kandpal
` (4 subsequent siblings)
5 siblings, 1 reply; 10+ messages in thread
From: Suraj Kandpal @ 2023-07-03 10:12 UTC (permalink / raw)
To: intel-gfx
Move rc_param calculation for native_420 into calculate_rc_parameter.
second_line_bpg_offset and second_line_offset_adj are both rc params
and it would be better to have these calculated where all the other
rc parameters are calculated.
--v2
-Add the reason for commit in commit message [Jani]
--v3
-Move nsl_second_line_bpg_offset with the other 420 calculation
in calculate_rc_param [Ankit]
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vdsc.c | 45 ++++++++++++-----------
1 file changed, 24 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index bd9116d2cd76..7d0edb440ca6 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -78,6 +78,27 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
else
vdsc_cfg->first_line_bpg_offset = 2 * (vdsc_cfg->slice_height - 1);
+ /* According to DSC 1.2 specs in Section 4.1 if native_420 is set:
+ * -second_line_bpg_offset is 12 in general and equal to 2*(slice_height-1) if slice
+ * height < 8.
+ * -second_line_offset_adj is 512 as shown by emperical values to yield best chroma
+ * preservation in second line.
+ * -nsl_bpg_offset is calculated as second_line_offset/slice_height -1 then rounded
+ * up to 16 fractional bits, we left shift second line offset by 11 to preserve 11
+ * fractional bits.
+ */
+ if (vdsc_cfg->native_420) {
+ if (vdsc_cfg->slice_height >= 8)
+ vdsc_cfg->second_line_bpg_offset = 12;
+ else
+ vdsc_cfg->second_line_bpg_offset =
+ 2 * (vdsc_cfg->slice_height - 1);
+
+ vdsc_cfg->second_line_offset_adj = 512;
+ vdsc_cfg->nsl_bpg_offset = DIV_ROUND_UP(vdsc_cfg->second_line_bpg_offset << 11,
+ vdsc_cfg->slice_height - 1);
+ }
+
/* Our hw supports only 444 modes as of today */
if (bpp >= 12)
vdsc_cfg->initial_offset = 2048;
@@ -190,30 +211,12 @@ int intel_dsc_compute_params(struct intel_crtc_state *pipe_config)
vdsc_cfg->bits_per_pixel = compressed_bpp << 4;
/*
- * According to DSC 1.2 specs in Section 4.1 if native_420 is set:
- * -We need to double the current bpp.
- * -second_line_bpg_offset is 12 in general and equal to 2*(slice_height-1) if slice
- * height < 8.
- * -second_line_offset_adj is 512 as shown by emperical values to yeild best chroma
- * preservation in second line.
- * -nsl_bpg_offset is calculated as second_line_offset/slice_height -1 then rounded
- * up to 16 fractional bits, we left shift second line offset by 11 to preserve 11
- * fractional bits.
+ * According to DSC 1.2 specs in Section 4.1 if native_420 is set
+ * we need to double the current bpp.
*/
- if (vdsc_cfg->native_420) {
+ if (vdsc_cfg->native_420)
vdsc_cfg->bits_per_pixel <<= 1;
- if (vdsc_cfg->slice_height >= 8)
- vdsc_cfg->second_line_bpg_offset = 12;
- else
- vdsc_cfg->second_line_bpg_offset =
- 2 * (vdsc_cfg->slice_height - 1);
-
- vdsc_cfg->second_line_offset_adj = 512;
- vdsc_cfg->nsl_bpg_offset = DIV_ROUND_UP(vdsc_cfg->second_line_bpg_offset << 11,
- vdsc_cfg->slice_height - 1);
- }
-
vdsc_cfg->bits_per_component = pipe_config->pipe_bpp / 3;
drm_dsc_set_rc_buf_thresh(vdsc_cfg);
--
2.25.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v3 2/3] drm/i915/drm: Fix comment for YUV420 qp table declaration
2023-07-03 10:12 [Intel-gfx] [PATCH v3 0/3] Add rc_range_params for YUV420 Suraj Kandpal
2023-07-03 10:12 ` [Intel-gfx] [PATCH v3 1/3] drm/i915/dsc: Move rc param calculation for native_420 Suraj Kandpal
@ 2023-07-03 10:12 ` Suraj Kandpal
2023-07-04 8:11 ` Nautiyal, Ankit K
2023-07-03 10:12 ` [Intel-gfx] [PATCH v3 3/3] drm/i915/dsc: Add rc_range_parameter calculation for YCBCR420 Suraj Kandpal
` (3 subsequent siblings)
5 siblings, 1 reply; 10+ messages in thread
From: Suraj Kandpal @ 2023-07-03 10:12 UTC (permalink / raw)
To: intel-gfx
Fix comment for YUV420 qp table declaration of max value
where the min value is 4 and the max value is 12/15/18
depending on bpc.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_qp_tables.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_qp_tables.c b/drivers/gpu/drm/i915/display/intel_qp_tables.c
index 6e86c0971d24..7997d673def7 100644
--- a/drivers/gpu/drm/i915/display/intel_qp_tables.c
+++ b/drivers/gpu/drm/i915/display/intel_qp_tables.c
@@ -17,13 +17,17 @@
/* from BPP 6 to 36 in steps of 0.5 */
#define RC_RANGE_QP444_12BPC_MAX_NUM_BPP 61
-/* from BPP 6 to 24 in steps of 0.5 */
+/* For YUV420 the bits_per_pixel sent in PPS params
+ * is double the target bpp. The below values represent
+ * the target bpp.
+ */
+/* from BPP 4 to 12 in steps of 0.5 */
#define RC_RANGE_QP420_8BPC_MAX_NUM_BPP 17
-/* from BPP 6 to 30 in steps of 0.5 */
+/* from BPP 4 to 15 in steps of 0.5 */
#define RC_RANGE_QP420_10BPC_MAX_NUM_BPP 23
-/* from BPP 6 to 36 in steps of 0.5 */
+/* from BPP 4 to 18 in steps of 0.5 */
#define RC_RANGE_QP420_12BPC_MAX_NUM_BPP 29
/*
--
2.25.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v3 3/3] drm/i915/dsc: Add rc_range_parameter calculation for YCBCR420
2023-07-03 10:12 [Intel-gfx] [PATCH v3 0/3] Add rc_range_params for YUV420 Suraj Kandpal
2023-07-03 10:12 ` [Intel-gfx] [PATCH v3 1/3] drm/i915/dsc: Move rc param calculation for native_420 Suraj Kandpal
2023-07-03 10:12 ` [Intel-gfx] [PATCH v3 2/3] drm/i915/drm: Fix comment for YUV420 qp table declaration Suraj Kandpal
@ 2023-07-03 10:12 ` Suraj Kandpal
2023-07-04 13:39 ` Nautiyal, Ankit K
2023-07-03 10:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add rc_range_params for YUV420 Patchwork
` (2 subsequent siblings)
5 siblings, 1 reply; 10+ messages in thread
From: Suraj Kandpal @ 2023-07-03 10:12 UTC (permalink / raw)
To: intel-gfx
Some rc_range_parameter calculations were missed for YCBCR420,
add them to calculate_rc_param()
--v2
-take into account the new formula to get bpp_i
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vdsc.c | 142 ++++++++++++++++------
1 file changed, 104 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 7d0edb440ca6..5c6151f716d5 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -52,23 +52,34 @@ static bool is_pipe_dsc(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
return true;
}
+static void
+intel_vdsc_set_min_max_qp(struct drm_dsc_config *vdsc_cfg, int buf,
+ int bpp)
+{
+ int bpc = vdsc_cfg->bits_per_component;
+
+ /* Read range_minqp and range_max_qp from qp tables */
+ vdsc_cfg->rc_range_params[buf].range_min_qp =
+ intel_lookup_range_min_qp(bpc, buf, bpp, vdsc_cfg->native_420);
+ vdsc_cfg->rc_range_params[buf].range_max_qp =
+ intel_lookup_range_max_qp(bpc, buf, bpp, vdsc_cfg->native_420);
+}
+
+/* Calculate RC Params using the below two methods:
+ * 1. DSCParameterValuesVESA V1-2 spreadsheet
+ * 2. VESA DSC 1.2a DSC Tools Application Note
+ * Above two methods use a common formula to derive values for any combination of DSC
+ * variables. The formula approach may yield slight differences in the derived PPS
+ * parameters from the original parameter sets. These differences are not consequential
+ * to the coding performance because all parameter sets have been shown to produce
+ * visually lossless quality (provides the same PPS values as
+ * DSCParameterValuesVESA V1-2 spreadsheet)
+ */
static void
calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
{
int bpc = vdsc_cfg->bits_per_component;
int bpp = vdsc_cfg->bits_per_pixel >> 4;
- static const s8 ofs_und6[] = {
- 0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12
- };
- static const s8 ofs_und8[] = {
- 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
- };
- static const s8 ofs_und12[] = {
- 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
- };
- static const s8 ofs_und15[] = {
- 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12
- };
int qp_bpc_modifier = (bpc - 8) * 2;
u32 res, buf_i, bpp_i;
@@ -118,33 +129,88 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
vdsc_cfg->rc_quant_incr_limit0 = 11 + qp_bpc_modifier;
vdsc_cfg->rc_quant_incr_limit1 = 11 + qp_bpc_modifier;
- bpp_i = (2 * (bpp - 6));
- for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) {
- u8 range_bpg_offset;
-
- /* Read range_minqp and range_max_qp from qp tables */
- vdsc_cfg->rc_range_params[buf_i].range_min_qp =
- intel_lookup_range_min_qp(bpc, buf_i, bpp_i, vdsc_cfg->native_420);
- vdsc_cfg->rc_range_params[buf_i].range_max_qp =
- intel_lookup_range_max_qp(bpc, buf_i, bpp_i, vdsc_cfg->native_420);
-
- /* Calculate range_bpg_offset */
- if (bpp <= 6) {
- range_bpg_offset = ofs_und6[buf_i];
- } else if (bpp <= 8) {
- res = DIV_ROUND_UP(((bpp - 6) * (ofs_und8[buf_i] - ofs_und6[buf_i])), 2);
- range_bpg_offset = ofs_und6[buf_i] + res;
- } else if (bpp <= 12) {
- range_bpg_offset = ofs_und8[buf_i];
- } else if (bpp <= 15) {
- res = DIV_ROUND_UP(((bpp - 12) * (ofs_und15[buf_i] - ofs_und12[buf_i])), 3);
- range_bpg_offset = ofs_und12[buf_i] + res;
- } else {
- range_bpg_offset = ofs_und15[buf_i];
+ if (vdsc_cfg->native_420) {
+ static const s8 ofs_und4[] = {
+ 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12
+ };
+ static const s8 ofs_und5[] = {
+ 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
+ };
+ static const s8 ofs_und6[] = {
+ 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
+ };
+ static const s8 ofs_und8[] = {
+ 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12
+ };
+
+ bpp_i = bpp - 8;
+ for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) {
+ u8 range_bpg_offset;
+
+ intel_vdsc_set_min_max_qp(vdsc_cfg, buf_i, bpp_i);
+
+ /* Calculate range_bpg_offset */
+ if (bpp <= 8) {
+ range_bpg_offset = ofs_und4[buf_i];
+ } else if (bpp <= 10) {
+ res = DIV_ROUND_UP(((bpp - 8) *
+ (ofs_und5[buf_i] - ofs_und4[buf_i])), 2);
+ range_bpg_offset = ofs_und4[buf_i] + res;
+ } else if (bpp <= 12) {
+ res = DIV_ROUND_UP(((bpp - 10) *
+ (ofs_und6[buf_i] - ofs_und5[buf_i])), 2);
+ range_bpg_offset = ofs_und5[buf_i] + res;
+ } else if (bpp <= 16) {
+ res = DIV_ROUND_UP(((bpp - 12) *
+ (ofs_und8[buf_i] - ofs_und6[buf_i])), 3);
+ range_bpg_offset = ofs_und6[buf_i] + res;
+ } else {
+ range_bpg_offset = ofs_und8[buf_i];
+ }
+
+ vdsc_cfg->rc_range_params[buf_i].range_bpg_offset =
+ range_bpg_offset & DSC_RANGE_BPG_OFFSET_MASK;
+ }
+ } else {
+ static const s8 ofs_und6[] = {
+ 0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12
+ };
+ static const s8 ofs_und8[] = {
+ 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
+ };
+ static const s8 ofs_und12[] = {
+ 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
+ };
+ static const s8 ofs_und15[] = {
+ 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12
+ };
+
+ bpp_i = (2 * (bpp - 6));
+ for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) {
+ u8 range_bpg_offset;
+
+ intel_vdsc_set_min_max_qp(vdsc_cfg, buf_i, bpp_i);
+
+ /* Calculate range_bpg_offset */
+ if (bpp <= 6) {
+ range_bpg_offset = ofs_und6[buf_i];
+ } else if (bpp <= 8) {
+ res = DIV_ROUND_UP(((bpp - 6) *
+ (ofs_und8[buf_i] - ofs_und6[buf_i])), 2);
+ range_bpg_offset = ofs_und6[buf_i] + res;
+ } else if (bpp <= 12) {
+ range_bpg_offset = ofs_und8[buf_i];
+ } else if (bpp <= 15) {
+ res = DIV_ROUND_UP(((bpp - 12) *
+ (ofs_und15[buf_i] - ofs_und12[buf_i])), 3);
+ range_bpg_offset = ofs_und12[buf_i] + res;
+ } else {
+ range_bpg_offset = ofs_und15[buf_i];
+ }
+
+ vdsc_cfg->rc_range_params[buf_i].range_bpg_offset =
+ range_bpg_offset & DSC_RANGE_BPG_OFFSET_MASK;
}
-
- vdsc_cfg->rc_range_params[buf_i].range_bpg_offset =
- range_bpg_offset & DSC_RANGE_BPG_OFFSET_MASK;
}
}
--
2.25.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add rc_range_params for YUV420
2023-07-03 10:12 [Intel-gfx] [PATCH v3 0/3] Add rc_range_params for YUV420 Suraj Kandpal
` (2 preceding siblings ...)
2023-07-03 10:12 ` [Intel-gfx] [PATCH v3 3/3] drm/i915/dsc: Add rc_range_parameter calculation for YCBCR420 Suraj Kandpal
@ 2023-07-03 10:38 ` Patchwork
2023-07-03 10:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-03 12:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2023-07-03 10:38 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-gfx
== Series Details ==
Series: Add rc_range_params for YUV420
URL : https://patchwork.freedesktop.org/series/120134/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:174:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:176:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:180:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:186:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:188:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:192:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:237:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:239:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:58:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:73:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:77:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:79:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:80:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:93:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:97:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:99:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Add rc_range_params for YUV420
2023-07-03 10:12 [Intel-gfx] [PATCH v3 0/3] Add rc_range_params for YUV420 Suraj Kandpal
` (3 preceding siblings ...)
2023-07-03 10:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add rc_range_params for YUV420 Patchwork
@ 2023-07-03 10:48 ` Patchwork
2023-07-03 12:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2023-07-03 10:48 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 5507 bytes --]
== Series Details ==
Series: Add rc_range_params for YUV420
URL : https://patchwork.freedesktop.org/series/120134/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13341 -> Patchwork_120134v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/index.html
Participating hosts (41 -> 38)
------------------------------
Missing (3): fi-kbl-soraka bat-rpls-2 fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_120134v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@basic-pci-d3-state:
- bat-mtlp-8: [PASS][1] -> [ABORT][2] ([i915#7077] / [i915#7977])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/bat-mtlp-8/igt@i915_pm_rpm@basic-pci-d3-state.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/bat-mtlp-8/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@i915_selftest@live@gt_lrc:
- bat-dg2-11: [PASS][3] -> [INCOMPLETE][4] ([i915#7609] / [i915#7913])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/bat-dg2-11/igt@i915_selftest@live@gt_lrc.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/bat-dg2-11/igt@i915_selftest@live@gt_lrc.html
* igt@i915_selftest@live@slpc:
- bat-rpls-1: NOTRUN -> [DMESG-WARN][5] ([i915#6367])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/bat-rpls-1/igt@i915_selftest@live@slpc.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-rpls-1: NOTRUN -> [ABORT][6] ([i915#6687] / [i915#7978] / [i915#8668])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/bat-rpls-1/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][7] ([i915#1845] / [i915#5354]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
#### Possible fixes ####
* igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [DMESG-FAIL][8] ([i915#5334]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@reset:
- bat-rpls-1: [ABORT][10] ([i915#4983] / [i915#7461] / [i915#8347] / [i915#8384]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/bat-rpls-1/igt@i915_selftest@live@reset.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/bat-rpls-1/igt@i915_selftest@live@reset.html
#### Warnings ####
* igt@kms_setmode@basic-clone-single-crtc:
- bat-mtlp-8: [SKIP][12] ([i915#8761]) -> [SKIP][13] ([i915#3555])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/bat-mtlp-8/igt@kms_setmode@basic-clone-single-crtc.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/bat-mtlp-8/igt@kms_setmode@basic-clone-single-crtc.html
- bat-mtlp-6: [SKIP][14] ([i915#8761]) -> [SKIP][15] ([i915#3555])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/bat-mtlp-6/igt@kms_setmode@basic-clone-single-crtc.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/bat-mtlp-6/igt@kms_setmode@basic-clone-single-crtc.html
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#7077]: https://gitlab.freedesktop.org/drm/intel/issues/7077
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7609]: https://gitlab.freedesktop.org/drm/intel/issues/7609
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7977]: https://gitlab.freedesktop.org/drm/intel/issues/7977
[i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978
[i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
[i915#8384]: https://gitlab.freedesktop.org/drm/intel/issues/8384
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#8761]: https://gitlab.freedesktop.org/drm/intel/issues/8761
Build changes
-------------
* Linux: CI_DRM_13341 -> Patchwork_120134v1
CI-20190529: 20190529
CI_DRM_13341: e72529f161cf81710f4a436e7abe0936630c5ea5 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7365: c5980a82c798f9003dc7b4df07aace01b8afde77 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_120134v1: e72529f161cf81710f4a436e7abe0936630c5ea5 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
c0c6109d7024 drm/i915/dsc: Add rc_range_parameter calculation for YCBCR420
ed4713ca568e drm/i915/drm: Fix comment for YUV420 qp table declaration
5c79c5c26f86 drm/i915/dsc: Move rc param calculation for native_420
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/index.html
[-- Attachment #2: Type: text/html, Size: 6452 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for Add rc_range_params for YUV420
2023-07-03 10:12 [Intel-gfx] [PATCH v3 0/3] Add rc_range_params for YUV420 Suraj Kandpal
` (4 preceding siblings ...)
2023-07-03 10:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-07-03 12:00 ` Patchwork
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2023-07-03 12:00 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 28327 bytes --]
== Series Details ==
Series: Add rc_range_params for YUV420
URL : https://patchwork.freedesktop.org/series/120134/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13341_full -> Patchwork_120134v1_full
====================================================
Summary
-------
**WARNING**
Minor unknown changes coming with Patchwork_120134v1_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_120134v1_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (9 -> 8)
------------------------------
Missing (1): shard-mtlp
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_120134v1_full:
### IGT changes ###
#### Warnings ####
* igt@kms_display_modes@extended-mode-basic:
- shard-tglu: [SKIP][1] ([i915#8765]) -> [SKIP][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-tglu-5/igt@kms_display_modes@extended-mode-basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-tglu-7/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-dg2: [SKIP][3] ([i915#8765]) -> [SKIP][4] +4 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-7/igt@kms_panel_fitting@atomic-fastset.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-6/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane_lowres@tiling-y:
- shard-dg2: [SKIP][5] ([i915#6953]) -> [SKIP][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-3/igt@kms_plane_lowres@tiling-y.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-8/igt@kms_plane_lowres@tiling-y.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_display_modes@extended-mode-basic:
- {shard-dg1}: NOTRUN -> [SKIP][7]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg1-12/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_draw_crc@draw-method-mmap-gtt:
- {shard-dg1}: [SKIP][8] ([i915#8765]) -> [SKIP][9] +1 similar issue
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg1-14/igt@kms_draw_crc@draw-method-mmap-gtt.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg1-15/igt@kms_draw_crc@draw-method-mmap-gtt.html
* igt@kms_hdr@invalid-metadata-sizes:
- {shard-dg1}: [SKIP][10] ([i915#6953]) -> [SKIP][11] +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg1-15/igt@kms_hdr@invalid-metadata-sizes.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg1-16/igt@kms_hdr@invalid-metadata-sizes.html
New tests
---------
New tests have been introduced between CI_DRM_13341_full and Patchwork_120134v1_full:
### New IGT tests (1) ###
* igt@kms_pipe_crc_basic@disable-crc-after-crtc@pipe-c-dp-2:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_120134v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@object-reloc-keep-cache:
- shard-dg2: NOTRUN -> [SKIP][12] ([i915#8411])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-10/igt@api_intel_bb@object-reloc-keep-cache.html
* igt@drm_fdinfo@most-busy-check-all@rcs0:
- shard-rkl: [PASS][13] -> [FAIL][14] ([i915#7742])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-rkl-2/igt@drm_fdinfo@most-busy-check-all@rcs0.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-rkl-7/igt@drm_fdinfo@most-busy-check-all@rcs0.html
* igt@gem_ctx_isolation@preservation-s3@vecs0:
- shard-apl: NOTRUN -> [ABORT][15] ([i915#180])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-apl6/igt@gem_ctx_isolation@preservation-s3@vecs0.html
* igt@gem_ctx_sseu@engines:
- shard-dg2: NOTRUN -> [SKIP][16] ([i915#280])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@gem_ctx_sseu@engines.html
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [PASS][17] -> [FAIL][18] ([i915#2846])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-glk6/igt@gem_exec_fair@basic-deadline.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-glk4/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-rkl: [PASS][19] -> [FAIL][20] ([i915#2842]) +3 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-rkl-2/igt@gem_exec_fair@basic-throttle@rcs0.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-rkl-7/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_reloc@basic-cpu-wc:
- shard-dg2: NOTRUN -> [SKIP][21] ([i915#3281]) +2 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@gem_exec_reloc@basic-cpu-wc.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-dg2: [PASS][22] -> [FAIL][23] ([fdo#103375] / [i915#6121]) +3 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-1/igt@gem_workarounds@suspend-resume-fd.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-5/igt@gem_workarounds@suspend-resume-fd.html
* igt@i915_pipe_stress@stress-xrgb8888-ytiled:
- shard-dg2: NOTRUN -> [SKIP][24] ([i915#7091])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@i915_pipe_stress@stress-xrgb8888-ytiled.html
* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
- shard-dg2: [PASS][25] -> [SKIP][26] ([i915#1937])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-12/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-11/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html
* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
- shard-rkl: [PASS][27] -> [SKIP][28] ([i915#1937])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-rkl-7/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-rkl-6/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html
* igt@i915_pm_rpm@dpms-lpsp:
- shard-rkl: [PASS][29] -> [SKIP][30] ([i915#1397]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-rkl-7/igt@i915_pm_rpm@dpms-lpsp.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-rkl-6/igt@i915_pm_rpm@dpms-lpsp.html
* igt@i915_pm_rpm@modeset-non-lpsp:
- shard-dg2: [PASS][31] -> [SKIP][32] ([i915#1397]) +2 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-6/igt@i915_pm_rpm@modeset-non-lpsp.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-10/igt@i915_pm_rpm@modeset-non-lpsp.html
* igt@kms_async_flips@crc@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [FAIL][33] ([i915#8247]) +1 similar issue
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-rkl-2/igt@kms_async_flips@crc@pipe-a-hdmi-a-2.html
* igt@kms_async_flips@crc@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [FAIL][34] ([i915#8247]) +3 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-3/igt@kms_async_flips@crc@pipe-a-hdmi-a-3.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][35] ([fdo#111614])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- shard-dg2: NOTRUN -> [SKIP][36] ([i915#4538] / [i915#5190])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
* igt@kms_ccs@pipe-a-missing-ccs-buffer-4_tiled_mtl_mc_ccs:
- shard-dg2: NOTRUN -> [SKIP][37] ([i915#5354]) +5 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@kms_ccs@pipe-a-missing-ccs-buffer-4_tiled_mtl_mc_ccs.html
* igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-dg2: NOTRUN -> [SKIP][38] ([i915#3689] / [i915#3886] / [i915#5354])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3886])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-apl6/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-crc-primary-basic-yf_tiled_ccs:
- shard-dg2: NOTRUN -> [SKIP][40] ([i915#3689] / [i915#5354]) +1 similar issue
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-10/igt@kms_ccs@pipe-c-crc-primary-basic-yf_tiled_ccs.html
* igt@kms_cdclk@plane-scaling@pipe-c-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][41] ([i915#4087]) +3 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-3/igt@kms_cdclk@plane-scaling@pipe-c-hdmi-a-3.html
* igt@kms_chamelium_hpd@hdmi-hpd:
- shard-dg2: NOTRUN -> [SKIP][42] ([i915#7828])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@kms_chamelium_hpd@hdmi-hpd.html
* igt@kms_content_protection@legacy:
- shard-dg2: NOTRUN -> [SKIP][43] ([i915#7118])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-8/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@lic@pipe-a-dp-4:
- shard-dg2: NOTRUN -> [TIMEOUT][44] ([i915#7173])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-11/igt@kms_content_protection@lic@pipe-a-dp-4.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][45] ([i915#3804])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-rkl-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1:
- shard-glk: [PASS][46] -> [FAIL][47] ([i915#79]) +1 similar issue
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-glk8/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1.html
* igt@kms_force_connector_basic@force-load-detect:
- shard-apl: NOTRUN -> [SKIP][48] ([fdo#109271]) +4 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-apl6/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][49] ([i915#8708])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-cpu:
- shard-dg2: NOTRUN -> [SKIP][50] ([i915#3458]) +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-cpu.html
* igt@kms_hdr@invalid-hdr:
- shard-rkl: NOTRUN -> [SKIP][51] ([i915#8228])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-rkl-6/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-dg2: NOTRUN -> [SKIP][52] ([i915#8228])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-3/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_plane_scaling@invalid-num-scalers@pipe-a-hdmi-a-1-invalid-num-scalers:
- shard-snb: NOTRUN -> [SKIP][53] ([fdo#109271]) +23 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-snb1/igt@kms_plane_scaling@invalid-num-scalers@pipe-a-hdmi-a-1-invalid-num-scalers.html
* igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][54] ([i915#5176]) +7 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-8/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-a-hdmi-a-3.html
* igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-75@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][55] ([i915#5176]) +5 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-rkl-6/igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-75@pipe-a-hdmi-a-2.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][56] ([i915#5235]) +3 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-rkl-7/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-hdmi-a-1.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][57] ([i915#5235]) +7 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-3/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-3.html
* igt@kms_psr@psr2_cursor_render:
- shard-dg2: NOTRUN -> [SKIP][58] ([i915#1072])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@kms_psr@psr2_cursor_render.html
* igt@v3d/v3d_submit_csd@multisync-out-syncs:
- shard-dg2: NOTRUN -> [SKIP][59] ([i915#2575])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@v3d/v3d_submit_csd@multisync-out-syncs.html
* igt@vc4/vc4_perfmon@create-single-perfmon:
- shard-dg2: NOTRUN -> [SKIP][60] ([i915#7711])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@vc4/vc4_perfmon@create-single-perfmon.html
#### Possible fixes ####
* igt@gem_create@hog-create@smem0:
- shard-dg2: [FAIL][61] ([i915#5892]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-3/igt@gem_create@hog-create@smem0.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-8/igt@gem_create@hog-create@smem0.html
* {igt@gem_ctx_freq@sysfs@gt0}:
- shard-dg2: [FAIL][63] ([i915#6786]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-11/igt@gem_ctx_freq@sysfs@gt0.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-3/igt@gem_ctx_freq@sysfs@gt0.html
* igt@gem_eio@kms:
- shard-glk: [FAIL][65] ([i915#8764]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-glk2/igt@gem_eio@kms.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-glk3/igt@gem_eio@kms.html
- shard-apl: [FAIL][67] ([i915#8764]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-apl6/igt@gem_eio@kms.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-apl1/igt@gem_eio@kms.html
* igt@gem_exec_suspend@basic-s4-devices@lmem0:
- {shard-dg1}: [ABORT][69] ([i915#7975] / [i915#8213]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg1-14/igt@gem_exec_suspend@basic-s4-devices@lmem0.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg1-12/igt@gem_exec_suspend@basic-s4-devices@lmem0.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- shard-dg2: [TIMEOUT][71] ([i915#5493]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-6/igt@gem_lmem_swapping@smem-oom@lmem0.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-10/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@gem_softpin@noreloc-interruptible:
- shard-dg2: [DMESG-WARN][73] ([i915#8585]) -> [PASS][74] +3 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-11/igt@gem_softpin@noreloc-interruptible.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@gem_softpin@noreloc-interruptible.html
* igt@gen9_exec_parse@allowed-single:
- shard-apl: [ABORT][75] ([i915#5566]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-apl6/igt@gen9_exec_parse@allowed-single.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-apl6/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_rpm@system-suspend-execbuf:
- shard-dg2: [FAIL][77] ([fdo#103375] / [i915#6121]) -> [PASS][78] +2 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-5/igt@i915_pm_rpm@system-suspend-execbuf.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-5/igt@i915_pm_rpm@system-suspend-execbuf.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-apl: [FAIL][79] ([i915#2346]) -> [PASS][80] +1 similar issue
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@syncobj_timeline@wait-all-delayed-signal:
- {shard-dg1}: [DMESG-WARN][81] ([i915#1982]) -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg1-15/igt@syncobj_timeline@wait-all-delayed-signal.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg1-14/igt@syncobj_timeline@wait-all-delayed-signal.html
#### Warnings ####
* igt@kms_async_flips@crc@pipe-a-hdmi-a-1:
- shard-tglu: [DMESG-FAIL][83] ([IGT#6]) -> [DMESG-FAIL][84] ([IGT#6] / [i915#8561])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-tglu-6/igt@kms_async_flips@crc@pipe-a-hdmi-a-1.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-tglu-5/igt@kms_async_flips@crc@pipe-a-hdmi-a-1.html
* igt@kms_content_protection@atomic@pipe-a-dp-1:
- shard-apl: [TIMEOUT][85] ([i915#7173]) -> [FAIL][86] ([i915#7173])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-apl4/igt@kms_content_protection@atomic@pipe-a-dp-1.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-apl3/igt@kms_content_protection@atomic@pipe-a-dp-1.html
* igt@kms_content_protection@mei_interface:
- shard-dg2: [SKIP][87] ([i915#7118]) -> [SKIP][88] ([i915#7118] / [i915#7162])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-7/igt@kms_content_protection@mei_interface.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@kms_content_protection@mei_interface.html
* igt@kms_dsc@dsc-basic:
- shard-dg2: [SKIP][89] ([i915#3840]) -> [SKIP][90] ([i915#3555] / [i915#3840]) +2 similar issues
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-11/igt@kms_dsc@dsc-basic.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-12/igt@kms_dsc@dsc-basic.html
- shard-rkl: [SKIP][91] ([i915#3840]) -> [SKIP][92] ([i915#3555] / [i915#3840]) +2 similar issues
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-rkl-2/igt@kms_dsc@dsc-basic.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-rkl-7/igt@kms_dsc@dsc-basic.html
- shard-tglu: [SKIP][93] ([i915#3840]) -> [SKIP][94] ([i915#3555] / [i915#3840]) +2 similar issues
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-tglu-5/igt@kms_dsc@dsc-basic.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-tglu-9/igt@kms_dsc@dsc-basic.html
* igt@kms_hdr@invalid-hdr:
- shard-dg2: [SKIP][95] ([i915#6953] / [i915#8228]) -> [SKIP][96] ([i915#8228])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-3/igt@kms_hdr@invalid-hdr.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-5/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-rkl: [SKIP][97] ([i915#6953] / [i915#8228]) -> [SKIP][98] ([i915#8228])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-rkl-7/igt@kms_hdr@invalid-metadata-sizes.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-rkl-2/igt@kms_hdr@invalid-metadata-sizes.html
- shard-tglu: [SKIP][99] ([i915#6953] / [i915#8228]) -> [SKIP][100] ([i915#8228]) +1 similar issue
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-tglu-6/igt@kms_hdr@invalid-metadata-sizes.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-tglu-5/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_plane_lowres@tiling-yf:
- shard-dg2: [SKIP][101] ([i915#8765]) -> [SKIP][102] ([i915#3555]) +1 similar issue
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-dg2-10/igt@kms_plane_lowres@tiling-yf.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-dg2-7/igt@kms_plane_lowres@tiling-yf.html
- shard-rkl: [SKIP][103] ([i915#8765]) -> [SKIP][104] ([i915#3555]) +2 similar issues
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-rkl-7/igt@kms_plane_lowres@tiling-yf.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-rkl-2/igt@kms_plane_lowres@tiling-yf.html
- shard-tglu: [SKIP][105] ([i915#8765]) -> [SKIP][106] ([i915#3555]) +2 similar issues
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13341/shard-tglu-4/igt@kms_plane_lowres@tiling-yf.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/shard-tglu-4/igt@kms_plane_lowres@tiling-yf.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5892]: https://gitlab.freedesktop.org/drm/intel/issues/5892
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6121]: https://gitlab.freedesktop.org/drm/intel/issues/6121
[i915#6786]: https://gitlab.freedesktop.org/drm/intel/issues/6786
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7091]: https://gitlab.freedesktop.org/drm/intel/issues/7091
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7162]: https://gitlab.freedesktop.org/drm/intel/issues/7162
[i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8247]: https://gitlab.freedesktop.org/drm/intel/issues/8247
[i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
[i915#8516]: https://gitlab.freedesktop.org/drm/intel/issues/8516
[i915#8561]: https://gitlab.freedesktop.org/drm/intel/issues/8561
[i915#8585]: https://gitlab.freedesktop.org/drm/intel/issues/8585
[i915#8661]: https://gitlab.freedesktop.org/drm/intel/issues/8661
[i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
[i915#8764]: https://gitlab.freedesktop.org/drm/intel/issues/8764
[i915#8765]: https://gitlab.freedesktop.org/drm/intel/issues/8765
Build changes
-------------
* Linux: CI_DRM_13341 -> Patchwork_120134v1
CI-20190529: 20190529
CI_DRM_13341: e72529f161cf81710f4a436e7abe0936630c5ea5 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7365: c5980a82c798f9003dc7b4df07aace01b8afde77 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_120134v1: e72529f161cf81710f4a436e7abe0936630c5ea5 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_120134v1/index.html
[-- Attachment #2: Type: text/html, Size: 32650 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/drm: Fix comment for YUV420 qp table declaration
2023-07-03 10:12 ` [Intel-gfx] [PATCH v3 2/3] drm/i915/drm: Fix comment for YUV420 qp table declaration Suraj Kandpal
@ 2023-07-04 8:11 ` Nautiyal, Ankit K
0 siblings, 0 replies; 10+ messages in thread
From: Nautiyal, Ankit K @ 2023-07-04 8:11 UTC (permalink / raw)
To: Suraj Kandpal, intel-gfx
On 7/3/2023 3:42 PM, Suraj Kandpal wrote:
> Fix comment for YUV420 qp table declaration of max value
YCbCr420 instead of YUV420, as used in other patches.
> where the min value is 4 and the max value is 12/15/18
> depending on bpc.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_qp_tables.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_qp_tables.c b/drivers/gpu/drm/i915/display/intel_qp_tables.c
> index 6e86c0971d24..7997d673def7 100644
> --- a/drivers/gpu/drm/i915/display/intel_qp_tables.c
> +++ b/drivers/gpu/drm/i915/display/intel_qp_tables.c
> @@ -17,13 +17,17 @@
> /* from BPP 6 to 36 in steps of 0.5 */
> #define RC_RANGE_QP444_12BPC_MAX_NUM_BPP 61
>
> -/* from BPP 6 to 24 in steps of 0.5 */
> +/* For YUV420 the bits_per_pixel sent in PPS params
Same as above.
With this fixed, this is:
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> + * is double the target bpp. The below values represent
> + * the target bpp.
> + */
> +/* from BPP 4 to 12 in steps of 0.5 */
> #define RC_RANGE_QP420_8BPC_MAX_NUM_BPP 17
>
> -/* from BPP 6 to 30 in steps of 0.5 */
> +/* from BPP 4 to 15 in steps of 0.5 */
> #define RC_RANGE_QP420_10BPC_MAX_NUM_BPP 23
>
> -/* from BPP 6 to 36 in steps of 0.5 */
> +/* from BPP 4 to 18 in steps of 0.5 */
> #define RC_RANGE_QP420_12BPC_MAX_NUM_BPP 29
>
> /*
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v3 1/3] drm/i915/dsc: Move rc param calculation for native_420
2023-07-03 10:12 ` [Intel-gfx] [PATCH v3 1/3] drm/i915/dsc: Move rc param calculation for native_420 Suraj Kandpal
@ 2023-07-04 8:25 ` Nautiyal, Ankit K
0 siblings, 0 replies; 10+ messages in thread
From: Nautiyal, Ankit K @ 2023-07-04 8:25 UTC (permalink / raw)
To: Suraj Kandpal, intel-gfx
On 7/3/2023 3:42 PM, Suraj Kandpal wrote:
> Move rc_param calculation for native_420 into calculate_rc_parameter.
> second_line_bpg_offset and second_line_offset_adj are both rc params
> and it would be better to have these calculated where all the other
> rc parameters are calculated.
>
> --v2
> -Add the reason for commit in commit message [Jani]
>
> --v3
> -Move nsl_second_line_bpg_offset with the other 420 calculation
> in calculate_rc_param [Ankit]
>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_vdsc.c | 45 ++++++++++++-----------
> 1 file changed, 24 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index bd9116d2cd76..7d0edb440ca6 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -78,6 +78,27 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
> else
> vdsc_cfg->first_line_bpg_offset = 2 * (vdsc_cfg->slice_height - 1);
>
> + /* According to DSC 1.2 specs in Section 4.1 if native_420 is set:
Start comment from next line, as per comment format.
Otherwise LGTM.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> + * -second_line_bpg_offset is 12 in general and equal to 2*(slice_height-1) if slice
> + * height < 8.
> + * -second_line_offset_adj is 512 as shown by emperical values to yield best chroma
> + * preservation in second line.
> + * -nsl_bpg_offset is calculated as second_line_offset/slice_height -1 then rounded
> + * up to 16 fractional bits, we left shift second line offset by 11 to preserve 11
> + * fractional bits.
> + */
> + if (vdsc_cfg->native_420) {
> + if (vdsc_cfg->slice_height >= 8)
> + vdsc_cfg->second_line_bpg_offset = 12;
> + else
> + vdsc_cfg->second_line_bpg_offset =
> + 2 * (vdsc_cfg->slice_height - 1);
> +
> + vdsc_cfg->second_line_offset_adj = 512;
> + vdsc_cfg->nsl_bpg_offset = DIV_ROUND_UP(vdsc_cfg->second_line_bpg_offset << 11,
> + vdsc_cfg->slice_height - 1);
> + }
> +
> /* Our hw supports only 444 modes as of today */
> if (bpp >= 12)
> vdsc_cfg->initial_offset = 2048;
> @@ -190,30 +211,12 @@ int intel_dsc_compute_params(struct intel_crtc_state *pipe_config)
> vdsc_cfg->bits_per_pixel = compressed_bpp << 4;
>
> /*
> - * According to DSC 1.2 specs in Section 4.1 if native_420 is set:
> - * -We need to double the current bpp.
> - * -second_line_bpg_offset is 12 in general and equal to 2*(slice_height-1) if slice
> - * height < 8.
> - * -second_line_offset_adj is 512 as shown by emperical values to yeild best chroma
> - * preservation in second line.
> - * -nsl_bpg_offset is calculated as second_line_offset/slice_height -1 then rounded
> - * up to 16 fractional bits, we left shift second line offset by 11 to preserve 11
> - * fractional bits.
> + * According to DSC 1.2 specs in Section 4.1 if native_420 is set
> + * we need to double the current bpp.
> */
> - if (vdsc_cfg->native_420) {
> + if (vdsc_cfg->native_420)
> vdsc_cfg->bits_per_pixel <<= 1;
>
> - if (vdsc_cfg->slice_height >= 8)
> - vdsc_cfg->second_line_bpg_offset = 12;
> - else
> - vdsc_cfg->second_line_bpg_offset =
> - 2 * (vdsc_cfg->slice_height - 1);
> -
> - vdsc_cfg->second_line_offset_adj = 512;
> - vdsc_cfg->nsl_bpg_offset = DIV_ROUND_UP(vdsc_cfg->second_line_bpg_offset << 11,
> - vdsc_cfg->slice_height - 1);
> - }
> -
> vdsc_cfg->bits_per_component = pipe_config->pipe_bpp / 3;
>
> drm_dsc_set_rc_buf_thresh(vdsc_cfg);
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v3 3/3] drm/i915/dsc: Add rc_range_parameter calculation for YCBCR420
2023-07-03 10:12 ` [Intel-gfx] [PATCH v3 3/3] drm/i915/dsc: Add rc_range_parameter calculation for YCBCR420 Suraj Kandpal
@ 2023-07-04 13:39 ` Nautiyal, Ankit K
0 siblings, 0 replies; 10+ messages in thread
From: Nautiyal, Ankit K @ 2023-07-04 13:39 UTC (permalink / raw)
To: Suraj Kandpal, intel-gfx
On 7/3/2023 3:42 PM, Suraj Kandpal wrote:
> Some rc_range_parameter calculations were missed for YCBCR420,
> add them to calculate_rc_param()
>
> --v2
> -take into account the new formula to get bpp_i
>
> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_vdsc.c | 142 ++++++++++++++++------
> 1 file changed, 104 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 7d0edb440ca6..5c6151f716d5 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -52,23 +52,34 @@ static bool is_pipe_dsc(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
> return true;
> }
>
> +static void
> +intel_vdsc_set_min_max_qp(struct drm_dsc_config *vdsc_cfg, int buf,
> + int bpp)
> +{
> + int bpc = vdsc_cfg->bits_per_component;
> +
> + /* Read range_minqp and range_max_qp from qp tables */
> + vdsc_cfg->rc_range_params[buf].range_min_qp =
> + intel_lookup_range_min_qp(bpc, buf, bpp, vdsc_cfg->native_420);
> + vdsc_cfg->rc_range_params[buf].range_max_qp =
> + intel_lookup_range_max_qp(bpc, buf, bpp, vdsc_cfg->native_420);
> +}
> +
> +/* Calculate RC Params using the below two methods:
Start comment from next line.
> + * 1. DSCParameterValuesVESA V1-2 spreadsheet
> + * 2. VESA DSC 1.2a DSC Tools Application Note
Typo: Note:
> + * Above two methods use a common formula to derive values for any combination of DSC
> + * variables. The formula approach may yield slight differences in the derived PPS
> + * parameters from the original parameter sets. These differences are not consequential
> + * to the coding performance because all parameter sets have been shown to produce
> + * visually lossless quality (provides the same PPS values as
> + * DSCParameterValuesVESA V1-2 spreadsheet)
> + */
> static void
> calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
> {
> int bpc = vdsc_cfg->bits_per_component;
> int bpp = vdsc_cfg->bits_per_pixel >> 4;
> - static const s8 ofs_und6[] = {
> - 0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12
> - };
> - static const s8 ofs_und8[] = {
> - 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
> - };
> - static const s8 ofs_und12[] = {
> - 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
> - };
> - static const s8 ofs_und15[] = {
> - 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12
> - };
> int qp_bpc_modifier = (bpc - 8) * 2;
> u32 res, buf_i, bpp_i;
>
> @@ -118,33 +129,88 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
> vdsc_cfg->rc_quant_incr_limit0 = 11 + qp_bpc_modifier;
> vdsc_cfg->rc_quant_incr_limit1 = 11 + qp_bpc_modifier;
>
> - bpp_i = (2 * (bpp - 6));
> - for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) {
> - u8 range_bpg_offset;
> -
> - /* Read range_minqp and range_max_qp from qp tables */
> - vdsc_cfg->rc_range_params[buf_i].range_min_qp =
> - intel_lookup_range_min_qp(bpc, buf_i, bpp_i, vdsc_cfg->native_420);
> - vdsc_cfg->rc_range_params[buf_i].range_max_qp =
> - intel_lookup_range_max_qp(bpc, buf_i, bpp_i, vdsc_cfg->native_420);
> -
> - /* Calculate range_bpg_offset */
> - if (bpp <= 6) {
> - range_bpg_offset = ofs_und6[buf_i];
> - } else if (bpp <= 8) {
> - res = DIV_ROUND_UP(((bpp - 6) * (ofs_und8[buf_i] - ofs_und6[buf_i])), 2);
> - range_bpg_offset = ofs_und6[buf_i] + res;
> - } else if (bpp <= 12) {
> - range_bpg_offset = ofs_und8[buf_i];
> - } else if (bpp <= 15) {
> - res = DIV_ROUND_UP(((bpp - 12) * (ofs_und15[buf_i] - ofs_und12[buf_i])), 3);
> - range_bpg_offset = ofs_und12[buf_i] + res;
> - } else {
> - range_bpg_offset = ofs_und15[buf_i];
> + if (vdsc_cfg->native_420) {
> + static const s8 ofs_und4[] = {
> + 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12
> + };
> + static const s8 ofs_und5[] = {
> + 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
> + };
> + static const s8 ofs_und6[] = {
> + 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
> + };
> + static const s8 ofs_und8[] = {
> + 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12
> + };
> +
> + bpp_i = bpp - 8;
> + for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) {
> + u8 range_bpg_offset;
> +
> + intel_vdsc_set_min_max_qp(vdsc_cfg, buf_i, bpp_i);
> +
> + /* Calculate range_bpg_offset */
> + if (bpp <= 8) {
> + range_bpg_offset = ofs_und4[buf_i];
> + } else if (bpp <= 10) {
> + res = DIV_ROUND_UP(((bpp - 8) *
> + (ofs_und5[buf_i] - ofs_und4[buf_i])), 2);
> + range_bpg_offset = ofs_und4[buf_i] + res;
> + } else if (bpp <= 12) {
> + res = DIV_ROUND_UP(((bpp - 10) *
> + (ofs_und6[buf_i] - ofs_und5[buf_i])), 2);
> + range_bpg_offset = ofs_und5[buf_i] + res;
> + } else if (bpp <= 16) {
> + res = DIV_ROUND_UP(((bpp - 12) *
> + (ofs_und8[buf_i] - ofs_und6[buf_i])), 3);
I think this is wrong. 16-12 so we should divide by 4 instead of 3.
Regards,
Ankit
> + range_bpg_offset = ofs_und6[buf_i] + res;
> + } else {
> + range_bpg_offset = ofs_und8[buf_i];
> + }
> +
> + vdsc_cfg->rc_range_params[buf_i].range_bpg_offset =
> + range_bpg_offset & DSC_RANGE_BPG_OFFSET_MASK;
> + }
> + } else {
> + static const s8 ofs_und6[] = {
> + 0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12
> + };
> + static const s8 ofs_und8[] = {
> + 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
> + };
> + static const s8 ofs_und12[] = {
> + 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12
> + };
> + static const s8 ofs_und15[] = {
> + 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12
> + };
> +
> + bpp_i = (2 * (bpp - 6));
> + for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) {
> + u8 range_bpg_offset;
> +
> + intel_vdsc_set_min_max_qp(vdsc_cfg, buf_i, bpp_i);
> +
> + /* Calculate range_bpg_offset */
> + if (bpp <= 6) {
> + range_bpg_offset = ofs_und6[buf_i];
> + } else if (bpp <= 8) {
> + res = DIV_ROUND_UP(((bpp - 6) *
> + (ofs_und8[buf_i] - ofs_und6[buf_i])), 2);
> + range_bpg_offset = ofs_und6[buf_i] + res;
> + } else if (bpp <= 12) {
> + range_bpg_offset = ofs_und8[buf_i];
> + } else if (bpp <= 15) {
> + res = DIV_ROUND_UP(((bpp - 12) *
> + (ofs_und15[buf_i] - ofs_und12[buf_i])), 3);
> + range_bpg_offset = ofs_und12[buf_i] + res;
> + } else {
> + range_bpg_offset = ofs_und15[buf_i];
> + }
> +
> + vdsc_cfg->rc_range_params[buf_i].range_bpg_offset =
> + range_bpg_offset & DSC_RANGE_BPG_OFFSET_MASK;
> }
> -
> - vdsc_cfg->rc_range_params[buf_i].range_bpg_offset =
> - range_bpg_offset & DSC_RANGE_BPG_OFFSET_MASK;
> }
> }
>
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2023-07-04 13:39 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-07-03 10:12 [Intel-gfx] [PATCH v3 0/3] Add rc_range_params for YUV420 Suraj Kandpal
2023-07-03 10:12 ` [Intel-gfx] [PATCH v3 1/3] drm/i915/dsc: Move rc param calculation for native_420 Suraj Kandpal
2023-07-04 8:25 ` Nautiyal, Ankit K
2023-07-03 10:12 ` [Intel-gfx] [PATCH v3 2/3] drm/i915/drm: Fix comment for YUV420 qp table declaration Suraj Kandpal
2023-07-04 8:11 ` Nautiyal, Ankit K
2023-07-03 10:12 ` [Intel-gfx] [PATCH v3 3/3] drm/i915/dsc: Add rc_range_parameter calculation for YCBCR420 Suraj Kandpal
2023-07-04 13:39 ` Nautiyal, Ankit K
2023-07-03 10:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add rc_range_params for YUV420 Patchwork
2023-07-03 10:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-03 12:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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