* [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux
@ 2023-07-31 12:27 Roger Quadros
2023-07-31 12:27 ` [PATCH v2 1/2] board: ti: am64x: Recognize AM64-HSEVM Roger Quadros
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: Roger Quadros @ 2023-07-31 12:27 UTC (permalink / raw)
To: trini
Cc: nm, vigneshr, srk, r-gunasekaran, s-vadapalli, u-boot, Roger Quadros
Hi,
This series syncs AM64 DT files from Linux v6.5-rc1.
NOTE: I have only boot tested this on AM64-GP-EVM.
I would appreciate a tested-by for AM64-sk EVM. Thanks.
cheers,
-roger
Changelog:
v2:
- Sync with v6.5-rc1
- Rebase on latest uboot/master
- CPSW node cleanup
- Timer node cleanup
Roger Quadros (2):
board: ti: am64x: Recognize AM64-HSEVM
arm: dts: k3-am64: Sync DT with Linux v6.5-rc1
arch/arm/dts/k3-am64-main.dtsi | 171 +++++++++++++++++++++++--
arch/arm/dts/k3-am64-mcu.dtsi | 53 +++++++-
arch/arm/dts/k3-am64-thermal.dtsi | 33 +++++
arch/arm/dts/k3-am64.dtsi | 22 +---
arch/arm/dts/k3-am642-evm-u-boot.dtsi | 42 ++-----
arch/arm/dts/k3-am642-evm.dts | 173 ++++++++++++++++++++------
arch/arm/dts/k3-am642-r5-evm.dts | 26 +++-
arch/arm/dts/k3-am642-r5-sk.dts | 31 ++++-
arch/arm/dts/k3-am642-sk-u-boot.dtsi | 43 ++-----
arch/arm/dts/k3-am642-sk.dts | 166 +++++++++++++++++-------
arch/arm/dts/k3-am642.dtsi | 1 +
board/ti/am64x/evm.c | 3 +-
12 files changed, 589 insertions(+), 175 deletions(-)
create mode 100644 arch/arm/dts/k3-am64-thermal.dtsi
--
2.34.1
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 1/2] board: ti: am64x: Recognize AM64-HSEVM
2023-07-31 12:27 [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux Roger Quadros
@ 2023-07-31 12:27 ` Roger Quadros
2023-07-31 14:20 ` Andrew Davis
2023-07-31 12:27 ` [PATCH v2 2/2] arm: dts: k3-am64: Sync DT with Linux v6.5-rc1 Roger Quadros
` (3 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Roger Quadros @ 2023-07-31 12:27 UTC (permalink / raw)
To: trini
Cc: nm, vigneshr, srk, r-gunasekaran, s-vadapalli, u-boot, Roger Quadros
AM64-HSEVM is AM64-GPEVM with High Security Device.
Gets rid of "Unidentified board claims AM64-HSEVM in eeprom header".
Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
board/ti/am64x/evm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/board/ti/am64x/evm.c b/board/ti/am64x/evm.c
index 96f4e3013a..a080b2b0d2 100644
--- a/board/ti/am64x/evm.c
+++ b/board/ti/am64x/evm.c
@@ -18,7 +18,8 @@
#include "../common/board_detect.h"
-#define board_is_am64x_gpevm() board_ti_k3_is("AM64-GPEVM")
+#define board_is_am64x_gpevm() (board_ti_k3_is("AM64-GPEVM") || \
+ board_ti_k3_is("AM64-HSEVM"))
#define board_is_am64x_skevm() (board_ti_k3_is("AM64-SKEVM") || \
board_ti_k3_is("AM64B-SKEVM"))
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 2/2] arm: dts: k3-am64: Sync DT with Linux v6.5-rc1
2023-07-31 12:27 [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux Roger Quadros
2023-07-31 12:27 ` [PATCH v2 1/2] board: ti: am64x: Recognize AM64-HSEVM Roger Quadros
@ 2023-07-31 12:27 ` Roger Quadros
2023-08-01 12:36 ` Nishanth Menon
2023-08-01 13:04 ` Nishanth Menon
2023-07-31 15:16 ` [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux Roger Quadros
` (2 subsequent siblings)
4 siblings, 2 replies; 10+ messages in thread
From: Roger Quadros @ 2023-07-31 12:27 UTC (permalink / raw)
To: trini
Cc: nm, vigneshr, srk, r-gunasekaran, s-vadapalli, u-boot, Roger Quadros
Sync all am642-evm/am642-sk related DT files
with Linux v6.5-rc1.
- drop timer1 in favor of main_timer0 in am64-main.dtsi.
Need to delete clock & power domain properties of
main_timer1 in -r5.dts else won't boot.
- drop cpsw3g custom DT property 'mac_efuse' and custom
DT node cpsw-phy-sel as driver picks these from standard
property/node.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
arch/arm/dts/k3-am64-main.dtsi | 171 +++++++++++++++++++++++--
arch/arm/dts/k3-am64-mcu.dtsi | 53 +++++++-
arch/arm/dts/k3-am64-thermal.dtsi | 33 +++++
arch/arm/dts/k3-am64.dtsi | 22 +---
arch/arm/dts/k3-am642-evm-u-boot.dtsi | 42 ++-----
arch/arm/dts/k3-am642-evm.dts | 173 ++++++++++++++++++++------
arch/arm/dts/k3-am642-r5-evm.dts | 26 +++-
arch/arm/dts/k3-am642-r5-sk.dts | 31 ++++-
arch/arm/dts/k3-am642-sk-u-boot.dtsi | 43 ++-----
arch/arm/dts/k3-am642-sk.dts | 166 +++++++++++++++++-------
arch/arm/dts/k3-am642.dtsi | 1 +
11 files changed, 587 insertions(+), 174 deletions(-)
create mode 100644 arch/arm/dts/k3-am64-thermal.dtsi
diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
index 5e8036f32d..1664d9f024 100644
--- a/arch/arm/dts/k3-am64-main.dtsi
+++ b/arch/arm/dts/k3-am64-main.dtsi
@@ -228,12 +228,161 @@
};
};
+ main_timer0: timer@2400000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2400000 0x00 0x400>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 36 1>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 36 1>;
+ assigned-clock-parents = <&k3_clks 36 2>;
+ power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer1: timer@2410000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2410000 0x00 0x400>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 37 1>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 37 1>;
+ assigned-clock-parents = <&k3_clks 37 2>;
+ power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer2: timer@2420000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2420000 0x00 0x400>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 38 1>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 38 1>;
+ assigned-clock-parents = <&k3_clks 38 2>;
+ power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer3: timer@2430000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2430000 0x00 0x400>;
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 39 1>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 39 1>;
+ assigned-clock-parents = <&k3_clks 39 2>;
+ power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer4: timer@2440000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2440000 0x00 0x400>;
+ interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 40 1>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 40 1>;
+ assigned-clock-parents = <&k3_clks 40 2>;
+ power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer5: timer@2450000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2450000 0x00 0x400>;
+ interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 41 1>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 41 1>;
+ assigned-clock-parents = <&k3_clks 41 2>;
+ power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer6: timer@2460000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2460000 0x00 0x400>;
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 42 1>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 42 1>;
+ assigned-clock-parents = <&k3_clks 42 2>;
+ power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer7: timer@2470000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2470000 0x00 0x400>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 43 1>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 43 1>;
+ assigned-clock-parents = <&k3_clks 43 2>;
+ power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer8: timer@2480000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2480000 0x00 0x400>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 44 1>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 44 1>;
+ assigned-clock-parents = <&k3_clks 44 2>;
+ power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer9: timer@2490000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2490000 0x00 0x400>;
+ interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 45 1>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 45 1>;
+ assigned-clock-parents = <&k3_clks 45 2>;
+ power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer10: timer@24a0000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x24a0000 0x00 0x400>;
+ interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 46 1>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 46 1>;
+ assigned-clock-parents = <&k3_clks 46 2>;
+ power-domains = <&k3_pds 46 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer11: timer@24b0000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x24b0000 0x00 0x400>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 47 1>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 47 1>;
+ assigned-clock-parents = <&k3_clks 47 2>;
+ power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_esm: esm@420000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x420000 0x00 0x1000>;
+ ti,esm-pins = <160>, <161>;
+ };
+
main_uart0: serial@2800000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x02800000 0x00 0x100>;
interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
- current-speed = <115200>;
power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 146 0>;
clock-names = "fclk";
@@ -245,7 +394,6 @@
reg = <0x00 0x02810000 0x00 0x100>;
interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
- current-speed = <115200>;
power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 152 0>;
clock-names = "fclk";
@@ -257,7 +405,6 @@
reg = <0x00 0x02820000 0x00 0x100>;
interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
- current-speed = <115200>;
power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 153 0>;
clock-names = "fclk";
@@ -269,7 +416,6 @@
reg = <0x00 0x02830000 0x00 0x100>;
interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
- current-speed = <115200>;
power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 154 0>;
clock-names = "fclk";
@@ -281,7 +427,6 @@
reg = <0x00 0x02840000 0x00 0x100>;
interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
- current-speed = <115200>;
power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 155 0>;
clock-names = "fclk";
@@ -293,7 +438,6 @@
reg = <0x00 0x02850000 0x00 0x100>;
interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
- current-speed = <115200>;
power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 156 0>;
clock-names = "fclk";
@@ -305,7 +449,6 @@
reg = <0x00 0x02860000 0x00 0x100>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
- current-speed = <115200>;
power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 158 0>;
clock-names = "fclk";
@@ -676,6 +819,7 @@
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
+ status = "disabled";
};
mailbox0_cluster3: mailbox@29030000 {
@@ -686,6 +830,7 @@
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
+ status = "disabled";
};
mailbox0_cluster4: mailbox@29040000 {
@@ -696,6 +841,7 @@
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
+ status = "disabled";
};
mailbox0_cluster5: mailbox@29050000 {
@@ -706,6 +852,7 @@
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
+ status = "disabled";
};
mailbox0_cluster6: mailbox@29060000 {
@@ -715,6 +862,7 @@
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
+ status = "disabled";
};
mailbox0_cluster7: mailbox@29070000 {
@@ -724,6 +872,7 @@
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
+ status = "disabled";
};
main_r5fss0: r5fss@78000000 {
@@ -1392,4 +1541,12 @@
clock-names = "fck";
status = "disabled";
};
+
+ main_vtm0: temperature-sensor@b00000 {
+ compatible = "ti,j7200-vtm";
+ reg = <0x00 0xb00000 0x00 0x400>,
+ <0x00 0xb01000 0x00 0x400>;
+ power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
+ #thermal-sensor-cells = <1>;
+ };
};
diff --git a/arch/arm/dts/k3-am64-mcu.dtsi b/arch/arm/dts/k3-am64-mcu.dtsi
index 38ddf0b3b8..686d497907 100644
--- a/arch/arm/dts/k3-am64-mcu.dtsi
+++ b/arch/arm/dts/k3-am64-mcu.dtsi
@@ -6,11 +6,55 @@
*/
&cbass_mcu {
+ /*
+ * The MCU domain timer interrupts are routed only to the ESM module,
+ * and not currently available for Linux. The MCU domain timers are
+ * of limited use without interrupts, and likely reserved by the ESM.
+ */
+ mcu_timer0: timer@4800000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x4800000 0x00 0x400>;
+ clocks = <&k3_clks 35 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ status = "reserved";
+ };
+
+ mcu_timer1: timer@4810000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x4810000 0x00 0x400>;
+ clocks = <&k3_clks 48 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ status = "reserved";
+ };
+
+ mcu_timer2: timer@4820000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x4820000 0x00 0x400>;
+ clocks = <&k3_clks 49 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ status = "reserved";
+ };
+
+ mcu_timer3: timer@4830000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x4830000 0x00 0x400>;
+ clocks = <&k3_clks 50 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ status = "reserved";
+ };
+
mcu_uart0: serial@4a00000 {
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x04a00000 0x00 0x100>;
interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
- current-speed = <115200>;
power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 149 0>;
clock-names = "fclk";
@@ -21,7 +65,6 @@
compatible = "ti,am64-uart", "ti,am654-uart";
reg = <0x00 0x04a10000 0x00 0x100>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- current-speed = <115200>;
power-domains = <&k3_pds 160 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 160 0>;
clock-names = "fclk";
@@ -109,4 +152,10 @@
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
};
+
+ mcu_esm: esm@4100000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x4100000 0x00 0x1000>;
+ ti,esm-pins = <0>, <1>;
+ };
};
diff --git a/arch/arm/dts/k3-am64-thermal.dtsi b/arch/arm/dts/k3-am64-thermal.dtsi
new file mode 100644
index 0000000000..036db56ba7
--- /dev/null
+++ b/arch/arm/dts/k3-am64-thermal.dtsi
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/thermal/thermal.h>
+
+thermal_zones: thermal-zones {
+ main0_thermal: main0-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&main_vtm0 0>;
+
+ trips {
+ main0_crit: main0-crit {
+ temperature = <105000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ main1_thermal: main1-thermal {
+ polling-delay-passive = <250>; /* milliSeconds */
+ polling-delay = <500>; /* milliSeconds */
+ thermal-sensors = <&main_vtm0 1>;
+
+ trips {
+ main1_crit: main1-crit {
+ temperature = <105000>; /* milliCelsius */
+ hysteresis = <2000>; /* milliCelsius */
+ type = "critical";
+ };
+ };
+ };
+};
diff --git a/arch/arm/dts/k3-am64.dtsi b/arch/arm/dts/k3-am64.dtsi
index c858725133..8e9c2bc70f 100644
--- a/arch/arm/dts/k3-am64.dtsi
+++ b/arch/arm/dts/k3-am64.dtsi
@@ -8,9 +8,10 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/pinctrl/k3.h>
#include <dt-bindings/soc/ti,sci_pm_domain.h>
+#include "k3-pinctrl.h"
+
/ {
model = "Texas Instruments K3 AM642 SoC";
compatible = "ti,am642";
@@ -18,22 +19,6 @@
#address-cells = <2>;
#size-cells = <2>;
- aliases {
- serial0 = &mcu_uart0;
- serial1 = &mcu_uart1;
- serial2 = &main_uart0;
- serial3 = &main_uart1;
- serial4 = &main_uart2;
- serial5 = &main_uart3;
- serial6 = &main_uart4;
- serial7 = &main_uart5;
- serial8 = &main_uart6;
- ethernet0 = &cpsw_port1;
- ethernet1 = &cpsw_port2;
- mmc0 = &sdhci0;
- mmc1 = &sdhci1;
- };
-
chosen { };
firmware {
@@ -69,6 +54,7 @@
<0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
<0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
<0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
+ <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
<0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
<0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
<0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
@@ -105,6 +91,8 @@
ranges = <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; /* Peripheral window */
};
};
+
+ #include "k3-am64-thermal.dtsi"
};
/* Now include the peripherals for each bus segments */
diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
index 73577e8cfd..686f26032d 100644
--- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
@@ -8,7 +8,7 @@
/ {
chosen {
stdout-path = "serial2:115200n8";
- tick-timer = &timer1;
+ tick-timer = &main_timer0;
};
memory@80000000 {
@@ -18,13 +18,11 @@
&cbass_main{
bootph-pre-ram;
- timer1: timer@2400000 {
- compatible = "ti,omap5430-timer";
- reg = <0x0 0x2400000 0x0 0x80>;
- ti,timer-alwon;
- clock-frequency = <200000000>;
- bootph-pre-ram;
- };
+};
+
+&main_timer0 {
+ bootph-pre-ram;
+ clock-frequency = <200000000>;
};
&main_conf {
@@ -36,21 +34,14 @@
&main_pmx0 {
bootph-pre-ram;
- main_i2c0_pins_default: main-i2c0-pins-default {
- bootph-pre-ram;
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
- AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
- >;
- };
+};
+
+&main_i2c0_pins_default {
+ bootph-pre-ram;
};
&main_i2c0 {
- status = "okay";
bootph-pre-ram;
- pinctrl-names = "default";
- pinctrl-0 = <&main_i2c0_pins_default>;
- clock-frequency = <400000>;
};
&main_uart0 {
@@ -111,18 +102,7 @@
};
&cpsw3g {
- reg = <0x0 0x8000000 0x0 0x200000>,
- <0x0 0x43000200 0x0 0x8>;
- reg-names = "cpsw_nuss", "mac_efuse";
- /delete-property/ ranges;
- pinctrl-0 = <&mdio1_pins_default /* HACK: as MDIO driver is not DM enabled */
- &rgmii1_pins_default
- &rgmii2_pins_default>;
-
- cpsw-phy-sel@04044 {
- compatible = "ti,am64-phy-gmii-sel";
- reg = <0x0 0x43004044 0x0 0x8>;
- };
+ bootph-pre-ram;
};
&cpsw_port2 {
diff --git a/arch/arm/dts/k3-am642-evm.dts b/arch/arm/dts/k3-am642-evm.dts
index 39feea78a0..15c282c934 100644
--- a/arch/arm/dts/k3-am642-evm.dts
+++ b/arch/arm/dts/k3-am642-evm.dts
@@ -17,15 +17,26 @@
model = "Texas Instruments AM642 EVM";
chosen {
- stdout-path = "serial2:115200n8";
- bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
+ stdout-path = &main_uart0;
+ };
+
+ aliases {
+ serial0 = &mcu_uart0;
+ serial1 = &main_uart1;
+ serial2 = &main_uart0;
+ serial3 = &main_uart3;
+ i2c0 = &main_i2c0;
+ i2c1 = &main_i2c1;
+ mmc0 = &sdhci0;
+ mmc1 = &sdhci1;
+ ethernet0 = &cpsw_port1;
+ ethernet1 = &cpsw_port2;
};
memory@80000000 {
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
-
};
reserved-memory {
@@ -94,7 +105,7 @@
};
};
- evm_12v0: fixedregulator-evm12v0 {
+ evm_12v0: regulator-0 {
/* main DC jack */
compatible = "regulator-fixed";
regulator-name = "evm_12v0";
@@ -104,7 +115,7 @@
regulator-boot-on;
};
- vsys_5v0: fixedregulator-vsys5v0 {
+ vsys_5v0: regulator-1 {
/* output of LM5140 */
compatible = "regulator-fixed";
regulator-name = "vsys_5v0";
@@ -115,7 +126,7 @@
regulator-boot-on;
};
- vsys_3v3: fixedregulator-vsys3v3 {
+ vsys_3v3: regulator-2 {
/* output of LM5140 */
compatible = "regulator-fixed";
regulator-name = "vsys_3v3";
@@ -126,7 +137,7 @@
regulator-boot-on;
};
- vdd_mmc1: fixed-regulator-sd {
+ vdd_mmc1: regulator-3 {
/* TPS2051BD */
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
@@ -138,7 +149,7 @@
gpio = <&exp1 6 GPIO_ACTIVE_HIGH>;
};
- vddb: fixedregulator-vddb {
+ vddb: regulator-4 {
compatible = "regulator-fixed";
regulator-name = "vddb_3v3_display";
regulator-min-microvolt = <3300000>;
@@ -148,6 +159,20 @@
regulator-boot-on;
};
+ vtt_supply: regulator-5 {
+ compatible = "regulator-fixed";
+ regulator-name = "vtt";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ddr_vtt_pins_default>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&vsys_3v3>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
leds {
compatible = "gpio-leds";
@@ -201,7 +226,7 @@
};
&main_pmx0 {
- main_mmc1_pins_default: main-mmc1-pins-default {
+ main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
@@ -215,7 +240,16 @@
>;
};
- main_uart0_pins_default: main-uart0-pins-default {
+ main_uart1_pins_default: main-uart1-default-pins {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */
+ AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */
+ AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */
+ AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */
+ >;
+ };
+
+ main_uart0_pins_default: main-uart0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
@@ -224,7 +258,7 @@
>;
};
- main_spi0_pins_default: main-spi0-pins-default {
+ main_spi0_pins_default: main-spi0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0210, PIN_INPUT, 0) /* (D13) SPI0_CLK */
AM64X_IOPAD(0x0208, PIN_OUTPUT, 0) /* (D12) SPI0_CS0 */
@@ -233,21 +267,28 @@
>;
};
- main_i2c1_pins_default: main-i2c1-pins-default {
+ main_i2c0_pins_default: main-i2c0-default-pins {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
+ AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
+ >;
+ };
+
+ main_i2c1_pins_default: main-i2c1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */
AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */
>;
};
- mdio1_pins_default: mdio1-pins-default {
+ mdio1_pins_default: mdio1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
>;
};
- rgmii1_pins_default: rgmii1-pins-default {
+ rgmii1_pins_default: rgmii1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */
AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */
@@ -264,7 +305,7 @@
>;
};
- rgmii2_pins_default: rgmii2-pins-default {
+ rgmii2_pins_default: rgmii2-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
@@ -281,13 +322,13 @@
>;
};
- main_usb0_pins_default: main-usb0-pins-default {
+ main_usb0_pins_default: main-usb0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
>;
};
- ospi0_pins_default: ospi0-pins-default {
+ ospi0_pins_default: ospi0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */
AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */
@@ -303,36 +344,58 @@
>;
};
- main_ecap0_pins_default: main-ecap0-pins-default {
+ main_ecap0_pins_default: main-ecap0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
>;
};
- main_mcan0_pins_default: main-mcan0-pins-default {
+ main_mcan0_pins_default: main-mcan0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* (B17) MCAN0_RX */
AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (A17) MCAN0_TX */
>;
};
- main_mcan1_pins_default: main-mcan1-pins-default {
+ main_mcan1_pins_default: main-mcan1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* (D17) MCAN1_RX */
AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */
>;
};
+
+ ddr_vtt_pins_default: ddr-vtt-default-pins {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */
+ >;
+ };
};
&main_uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
+ current-speed = <115200>;
};
/* main_uart1 is reserved for firmware usage */
&main_uart1 {
status = "reserved";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart1_pins_default>;
+};
+
+&main_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c0_pins_default>;
+ clock-frequency = <400000>;
+
+ eeprom@50 {
+ /* AT24CM01 */
+ compatible = "atmel,24c1024";
+ reg = <0x50>;
+ };
};
&main_i2c1 {
@@ -425,8 +488,7 @@
&cpsw3g {
pinctrl-names = "default";
- pinctrl-0 = <&rgmii1_pins_default
- &rgmii2_pins_default>;
+ pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>;
};
&cpsw_port1 {
@@ -471,10 +533,53 @@
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "ospi.tiboot3";
+ reg = <0x0 0x100000>;
+ };
+
+ partition@100000 {
+ label = "ospi.tispl";
+ reg = <0x100000 0x200000>;
+ };
+
+ partition@300000 {
+ label = "ospi.u-boot";
+ reg = <0x300000 0x400000>;
+ };
+
+ partition@700000 {
+ label = "ospi.env";
+ reg = <0x700000 0x40000>;
+ };
+
+ partition@740000 {
+ label = "ospi.env.backup";
+ reg = <0x740000 0x40000>;
+ };
+
+ partition@800000 {
+ label = "ospi.rootfs";
+ reg = <0x800000 0x37c0000>;
+ };
+
+ partition@3fc0000 {
+ label = "ospi.phypattern";
+ reg = <0x3fc0000 0x40000>;
+ };
+ };
};
};
&mailbox0_cluster2 {
+ status = "okay";
+
mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
ti,mbox-rx = <0 0 2>;
ti,mbox-tx = <1 0 2>;
@@ -486,11 +591,9 @@
};
};
-&mailbox0_cluster3 {
- status = "disabled";
-};
-
&mailbox0_cluster4 {
+ status = "okay";
+
mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
ti,mbox-rx = <0 0 2>;
ti,mbox-tx = <1 0 2>;
@@ -502,41 +605,35 @@
};
};
-&mailbox0_cluster5 {
- status = "disabled";
-};
-
&mailbox0_cluster6 {
+ status = "okay";
+
mbox_m4_0: mbox-m4-0 {
ti,mbox-rx = <0 0 2>;
ti,mbox-tx = <1 0 2>;
};
};
-&mailbox0_cluster7 {
- status = "disabled";
-};
-
&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
};
&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
};
&main_r5fss1_core0 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
+ mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
};
&main_r5fss1_core1 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
+ mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
};
diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts
index b49064181a..fd9e9a6489 100644
--- a/arch/arm/dts/k3-am642-r5-evm.dts
+++ b/arch/arm/dts/k3-am642-r5-evm.dts
@@ -13,12 +13,17 @@
/ {
chosen {
stdout-path = "serial2:115200n8";
- tick-timer = &timer1;
};
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
+ serial1 = &main_uart1;
+ serial2 = &main_uart0;
+ i2c0 = &main_i2c0;
+ mmc0 = &sdhci0;
+ mmc1 = &sdhci1;
+ ethernet0 = &cpsw_port1;
};
memory@80000000 {
@@ -210,6 +215,13 @@
AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
>;
};
+
+ main_i2c0_pins_default: main-i2c0-default-pins {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
+ AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
+ >;
+ };
};
&dmsc {
@@ -227,6 +239,7 @@
/delete-property/ clock-names;
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
+ current-speed = <115200>;
status = "okay";
};
@@ -267,6 +280,10 @@
/* EEPROM might be read before SYSFW is available */
&main_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c0_pins_default>;
+ clock-frequency = <400000>;
/delete-property/ power-domains;
};
@@ -282,4 +299,11 @@
pinctrl-0 = <&main_usb0_pins_default>;
};
+&main_timer0 {
+ /delete-property/ clocks;
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ power-domains;
+};
+
#include "k3-am642-evm-u-boot.dtsi"
diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts
index 32d4c31728..5487973e6e 100644
--- a/arch/arm/dts/k3-am642-r5-sk.dts
+++ b/arch/arm/dts/k3-am642-r5-sk.dts
@@ -15,12 +15,17 @@
/ {
chosen {
stdout-path = "serial2:115200n8";
- tick-timer = &timer1;
};
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
+ serial1 = &main_uart1;
+ serial2 = &main_uart0;
+ i2c0 = &main_i2c0;
+ mmc1 = &sdhci1;
+ ethernet0 = &cpsw_port1;
+ ethernet1 = &cpsw_port2;
};
memory@80000000 {
@@ -178,6 +183,13 @@
AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
>;
};
+
+ main_i2c0_pins_default: main-i2c0-default-pins {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
+ AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
+ >;
+ };
};
&dmsc {
@@ -189,12 +201,22 @@
ti,secure-host;
};
+/* EEPROM might be read before SYSFW is available */
+&main_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c0_pins_default>;
+ clock-frequency = <400000>;
+ /delete-property/ power-domains;
+};
+
&main_uart0 {
/delete-property/ power-domains;
/delete-property/ clocks;
/delete-property/ clock-names;
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
+ current-speed = <115200>;
status = "okay";
};
@@ -264,4 +286,11 @@
};
};
+&main_timer0 {
+ /delete-property/ clocks;
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ power-domains;
+};
+
#include "k3-am642-sk-u-boot.dtsi"
diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
index 3d6be025bd..a4ab26e5dc 100644
--- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
@@ -8,11 +8,7 @@
/ {
chosen {
stdout-path = "serial2:115200n8";
- tick-timer = &timer1;
- };
-
- aliases {
- mmc1 = &sdhci1;
+ tick-timer = &main_timer0;
};
memory@80000000 {
@@ -22,13 +18,11 @@
&cbass_main{
bootph-pre-ram;
- timer1: timer@2400000 {
- compatible = "ti,omap5430-timer";
- reg = <0x0 0x2400000 0x0 0x80>;
- ti,timer-alwon;
- clock-frequency = <200000000>;
- bootph-pre-ram;
- };
+};
+
+&main_timer0 {
+ bootph-pre-ram;
+ clock-frequency = <200000000>;
};
&main_conf {
@@ -40,21 +34,16 @@
&main_pmx0 {
bootph-pre-ram;
- main_i2c0_pins_default: main-i2c0-pins-default {
- bootph-pre-ram;
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
- AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
- >;
- };
+};
+
+&main_i2c0_pins_default {
+ bootph-pre-ram;
};
&main_i2c0 {
bootph-pre-ram;
- pinctrl-names = "default";
- pinctrl-0 = <&main_i2c0_pins_default>;
- clock-frequency = <400000>;
+ /* FIXME: Drop the PMIC node once in k3-am642-sk.dts */
tps65219: pmic@30 {
compatible = "ti,tps65219";
reg = <0x30>;
@@ -163,18 +152,8 @@
};
&cpsw3g {
- reg = <0x0 0x8000000 0x0 0x200000>,
- <0x0 0x43000200 0x0 0x8>;
- reg-names = "cpsw_nuss", "mac_efuse";
- /delete-property/ ranges;
bootph-pre-ram;
- cpsw-phy-sel@04044 {
- compatible = "ti,am64-phy-gmii-sel";
- reg = <0x0 0x43004044 0x0 0x8>;
- bootph-pre-ram;
- };
-
ethernet-ports {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/k3-am642-sk.dts b/arch/arm/dts/k3-am642-sk.dts
index 2e2d40da36..cbce43dbe3 100644
--- a/arch/arm/dts/k3-am642-sk.dts
+++ b/arch/arm/dts/k3-am642-sk.dts
@@ -17,15 +17,25 @@
model = "Texas Instruments AM642 SK";
chosen {
- stdout-path = "serial2:115200n8";
- bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
+ stdout-path = &main_uart0;
+ };
+
+ aliases {
+ serial0 = &mcu_uart0;
+ serial1 = &main_uart1;
+ serial2 = &main_uart0;
+ i2c0 = &main_i2c0;
+ i2c1 = &main_i2c1;
+ mmc0 = &sdhci0;
+ mmc1 = &sdhci1;
+ ethernet0 = &cpsw_port1;
+ ethernet1 = &cpsw_port2;
};
memory@80000000 {
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
-
};
reserved-memory {
@@ -94,7 +104,7 @@
};
};
- vusb_main: fixed-regulator-vusb-main5v0 {
+ vusb_main: regulator-0 {
/* USB MAIN INPUT 5V DC */
compatible = "regulator-fixed";
regulator-name = "vusb_main5v0";
@@ -104,7 +114,7 @@
regulator-boot-on;
};
- vcc_3v3_sys: fixedregulator-vcc-3v3-sys {
+ vcc_3v3_sys: regulator-1 {
/* output of LP8733xx */
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_sys";
@@ -115,7 +125,7 @@
regulator-boot-on;
};
- vdd_mmc1: fixed-regulator-sd {
+ vdd_mmc1: regulator-2 {
/* TPS2051BD */
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
@@ -127,7 +137,7 @@
gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
};
- com8_ls_en: regulator-1 {
+ com8_ls_en: regulator-3 {
compatible = "regulator-fixed";
regulator-name = "com8_ls_en";
regulator-min-microvolt = <3300000>;
@@ -139,7 +149,7 @@
gpio = <&main_gpio0 62 GPIO_ACTIVE_LOW>;
};
- wlan_en: regulator-2 {
+ wlan_en: regulator-4 {
/* output of SN74AVC4T245RSVR */
compatible = "regulator-fixed";
regulator-name = "wlan_en";
@@ -222,20 +232,21 @@
};
&main_pmx0 {
- main_mmc1_pins_default: main-mmc1-pins-default {
+ main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
- AM64X_IOPAD(0x0294, PIN_INPUT, 0) /* (J19) MMC1_CMD */
+ AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */
+ AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */
+ AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */
- AM64X_IOPAD(0x028c, PIN_INPUT, 0) /* (L20) MMC1_CLK */
- AM64X_IOPAD(0x0288, PIN_INPUT, 0) /* (K21) MMC1_DAT0 */
- AM64X_IOPAD(0x0284, PIN_INPUT, 0) /* (L21) MMC1_DAT1 */
- AM64X_IOPAD(0x0280, PIN_INPUT, 0) /* (K19) MMC1_DAT2 */
- AM64X_IOPAD(0x027c, PIN_INPUT, 0) /* (K18) MMC1_DAT3 */
- AM64X_IOPAD(0x0298, PIN_INPUT, 0) /* (D19) MMC1_SDCD */
+ AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
+ AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */
+ AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */
+ AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */
+ AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
>;
};
- main_uart0_pins_default: main-uart0-pins-default {
+ main_uart0_pins_default: main-uart0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
@@ -244,27 +255,43 @@
>;
};
- main_usb0_pins_default: main-usb0-pins-default {
+ main_uart1_pins_default: main-uart1-default-pins {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */
+ AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */
+ AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */
+ AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */
+ >;
+ };
+
+ main_usb0_pins_default: main-usb0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
>;
};
- main_i2c1_pins_default: main-i2c1-pins-default {
+ main_i2c0_pins_default: main-i2c0-default-pins {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
+ AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
+ >;
+ };
+
+ main_i2c1_pins_default: main-i2c1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */
AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */
>;
};
- mdio1_pins_default: mdio1-pins-default {
+ mdio1_pins_default: mdio1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
>;
};
- rgmii1_pins_default: rgmii1-pins-default {
+ rgmii1_pins_default: rgmii1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x011c, PIN_INPUT, 4) /* (AA13) PRG1_PRU1_GPO5.RGMII1_RD0 */
AM64X_IOPAD(0x0128, PIN_INPUT, 4) /* (U12) PRG1_PRU1_GPO8.RGMII1_RD1 */
@@ -281,7 +308,7 @@
>;
};
- rgmii2_pins_default: rgmii2-pins-default {
+ rgmii2_pins_default: rgmii2-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
@@ -298,7 +325,7 @@
>;
};
- ospi0_pins_default: ospi0-pins-default {
+ ospi0_pins_default: ospi0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */
AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */
@@ -314,24 +341,24 @@
>;
};
- main_ecap0_pins_default: main-ecap0-pins-default {
+ main_ecap0_pins_default: main-ecap0-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
>;
};
- main_wlan_en_pins_default: main-wlan-en-pins-default {
+ main_wlan_en_pins_default: main-wlan-en-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */
>;
};
- main_com8_ls_en_pins_default: main-com8-ls-en-pins-default {
+ main_com8_ls_en_pins_default: main-com8-ls-en-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x00fc, PIN_OUTPUT, 7) /* (U7) PRG1_PRU0_GPO17.GPIO0_62 */
>;
};
- main_wlan_pins_default: main-wlan-pins-default {
+ main_wlan_pins_default: main-wlan-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x00bc, PIN_INPUT, 7) /* (U8) GPIO0_46 */
>;
@@ -342,11 +369,26 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
+ current-speed = <115200>;
};
&main_uart1 {
/* main_uart1 is reserved for firmware usage */
status = "reserved";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart1_pins_default>;
+};
+
+&main_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c0_pins_default>;
+ clock-frequency = <400000>;
+
+ eeprom@51 {
+ compatible = "atmel,24c512";
+ reg = <0x51>;
+ };
};
&main_i2c1 {
@@ -439,8 +481,7 @@
&cpsw3g {
pinctrl-names = "default";
- pinctrl-0 = <&rgmii1_pins_default
- &rgmii2_pins_default>;
+ pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>;
};
&cpsw_port1 {
@@ -490,10 +531,53 @@
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "ospi.tiboot3";
+ reg = <0x0 0x100000>;
+ };
+
+ partition@100000 {
+ label = "ospi.tispl";
+ reg = <0x100000 0x200000>;
+ };
+
+ partition@300000 {
+ label = "ospi.u-boot";
+ reg = <0x300000 0x400000>;
+ };
+
+ partition@700000 {
+ label = "ospi.env";
+ reg = <0x700000 0x40000>;
+ };
+
+ partition@740000 {
+ label = "ospi.env.backup";
+ reg = <0x740000 0x40000>;
+ };
+
+ partition@800000 {
+ label = "ospi.rootfs";
+ reg = <0x800000 0x37c0000>;
+ };
+
+ partition@3fc0000 {
+ label = "ospi.phypattern";
+ reg = <0x3fc0000 0x40000>;
+ };
+ };
};
};
&mailbox0_cluster2 {
+ status = "okay";
+
mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
ti,mbox-rx = <0 0 2>;
ti,mbox-tx = <1 0 2>;
@@ -505,11 +589,9 @@
};
};
-&mailbox0_cluster3 {
- status = "disabled";
-};
-
&mailbox0_cluster4 {
+ status = "okay";
+
mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
ti,mbox-rx = <0 0 2>;
ti,mbox-tx = <1 0 2>;
@@ -521,41 +603,35 @@
};
};
-&mailbox0_cluster5 {
- status = "disabled";
-};
-
&mailbox0_cluster6 {
+ status = "okay";
+
mbox_m4_0: mbox-m4-0 {
ti,mbox-rx = <0 0 2>;
ti,mbox-tx = <1 0 2>;
};
};
-&mailbox0_cluster7 {
- status = "disabled";
-};
-
&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
};
&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
};
&main_r5fss1_core0 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
+ mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
};
&main_r5fss1_core1 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
+ mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
};
diff --git a/arch/arm/dts/k3-am642.dtsi b/arch/arm/dts/k3-am642.dtsi
index 8a76f4821b..7a6eedea3a 100644
--- a/arch/arm/dts/k3-am642.dtsi
+++ b/arch/arm/dts/k3-am642.dtsi
@@ -58,6 +58,7 @@
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
cache-size = <0x40000>;
cache-line-size = <64>;
cache-sets = <256>;
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v2 1/2] board: ti: am64x: Recognize AM64-HSEVM
2023-07-31 12:27 ` [PATCH v2 1/2] board: ti: am64x: Recognize AM64-HSEVM Roger Quadros
@ 2023-07-31 14:20 ` Andrew Davis
0 siblings, 0 replies; 10+ messages in thread
From: Andrew Davis @ 2023-07-31 14:20 UTC (permalink / raw)
To: Roger Quadros, trini
Cc: nm, vigneshr, srk, r-gunasekaran, s-vadapalli, u-boot
On 7/31/23 7:27 AM, Roger Quadros wrote:
> AM64-HSEVM is AM64-GPEVM with High Security Device.
>
> Gets rid of "Unidentified board claims AM64-HSEVM in eeprom header".
>
> Signed-off-by: Roger Quadros <rogerq@kernel.org>
> ---
Acked-by: Andrew Davis <afd@ti.com>
> board/ti/am64x/evm.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/board/ti/am64x/evm.c b/board/ti/am64x/evm.c
> index 96f4e3013a..a080b2b0d2 100644
> --- a/board/ti/am64x/evm.c
> +++ b/board/ti/am64x/evm.c
> @@ -18,7 +18,8 @@
>
> #include "../common/board_detect.h"
>
> -#define board_is_am64x_gpevm() board_ti_k3_is("AM64-GPEVM")
> +#define board_is_am64x_gpevm() (board_ti_k3_is("AM64-GPEVM") || \
> + board_ti_k3_is("AM64-HSEVM"))
>
> #define board_is_am64x_skevm() (board_ti_k3_is("AM64-SKEVM") || \
> board_ti_k3_is("AM64B-SKEVM"))
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux
2023-07-31 12:27 [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux Roger Quadros
2023-07-31 12:27 ` [PATCH v2 1/2] board: ti: am64x: Recognize AM64-HSEVM Roger Quadros
2023-07-31 12:27 ` [PATCH v2 2/2] arm: dts: k3-am64: Sync DT with Linux v6.5-rc1 Roger Quadros
@ 2023-07-31 15:16 ` Roger Quadros
2023-08-01 12:37 ` Nishanth Menon
2023-08-02 21:12 ` Nishanth Menon
4 siblings, 0 replies; 10+ messages in thread
From: Roger Quadros @ 2023-07-31 15:16 UTC (permalink / raw)
To: trini; +Cc: nm, vigneshr, srk, r-gunasekaran, s-vadapalli, u-boot
On 31/07/2023 15:27, Roger Quadros wrote:
> Hi,
>
> This series syncs AM64 DT files from Linux v6.5-rc1.
>
> NOTE: I have only boot tested this on AM64-GP-EVM.
> I would appreciate a tested-by for AM64-sk EVM. Thanks.
Also tested on AM64-SK SR2.0 HS-FS
>
> cheers,
> -roger
>
> Changelog:
>
> v2:
> - Sync with v6.5-rc1
> - Rebase on latest uboot/master
> - CPSW node cleanup
> - Timer node cleanup
>
> Roger Quadros (2):
> board: ti: am64x: Recognize AM64-HSEVM
> arm: dts: k3-am64: Sync DT with Linux v6.5-rc1
>
> arch/arm/dts/k3-am64-main.dtsi | 171 +++++++++++++++++++++++--
> arch/arm/dts/k3-am64-mcu.dtsi | 53 +++++++-
> arch/arm/dts/k3-am64-thermal.dtsi | 33 +++++
> arch/arm/dts/k3-am64.dtsi | 22 +---
> arch/arm/dts/k3-am642-evm-u-boot.dtsi | 42 ++-----
> arch/arm/dts/k3-am642-evm.dts | 173 ++++++++++++++++++++------
> arch/arm/dts/k3-am642-r5-evm.dts | 26 +++-
> arch/arm/dts/k3-am642-r5-sk.dts | 31 ++++-
> arch/arm/dts/k3-am642-sk-u-boot.dtsi | 43 ++-----
> arch/arm/dts/k3-am642-sk.dts | 166 +++++++++++++++++-------
> arch/arm/dts/k3-am642.dtsi | 1 +
> board/ti/am64x/evm.c | 3 +-
> 12 files changed, 589 insertions(+), 175 deletions(-)
> create mode 100644 arch/arm/dts/k3-am64-thermal.dtsi
>
--
cheers,
-roger
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 2/2] arm: dts: k3-am64: Sync DT with Linux v6.5-rc1
2023-07-31 12:27 ` [PATCH v2 2/2] arm: dts: k3-am64: Sync DT with Linux v6.5-rc1 Roger Quadros
@ 2023-08-01 12:36 ` Nishanth Menon
2023-08-01 13:04 ` Nishanth Menon
1 sibling, 0 replies; 10+ messages in thread
From: Nishanth Menon @ 2023-08-01 12:36 UTC (permalink / raw)
To: Roger Quadros; +Cc: trini, vigneshr, srk, r-gunasekaran, s-vadapalli, u-boot
On 15:27-20230731, Roger Quadros wrote:
> Sync all am642-evm/am642-sk related DT files
> with Linux v6.5-rc1.
>
> - drop timer1 in favor of main_timer0 in am64-main.dtsi.
> Need to delete clock & power domain properties of
> main_timer1 in -r5.dts else won't boot.
As we discussed in IRC, we should document the rationale
> - drop cpsw3g custom DT property 'mac_efuse' and custom
> DT node cpsw-phy-sel as driver picks these from standard
> property/node.
>
> Signed-off-by: Roger Quadros <rogerq@kernel.org>
> ---
[...]
> diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts
> index b49064181a..fd9e9a6489 100644
> --- a/arch/arm/dts/k3-am642-r5-evm.dts
> +++ b/arch/arm/dts/k3-am642-r5-evm.dts
Same with the evm and sk dts files.
> @@ -13,12 +13,17 @@
> / {
> chosen {
> stdout-path = "serial2:115200n8";
> - tick-timer = &timer1;
> };
>
> aliases {
> remoteproc0 = &sysctrler;
> remoteproc1 = &a53_0;
> + serial1 = &main_uart1;
> + serial2 = &main_uart0;
> + i2c0 = &main_i2c0;
> + mmc0 = &sdhci0;
> + mmc1 = &sdhci1;
> + ethernet0 = &cpsw_port1;
Why do we need any of these?
> };
>
> memory@80000000 {
We dont need this either.
> @@ -210,6 +215,13 @@
> AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
> >;
> };
> +
> + main_i2c0_pins_default: main-i2c0-default-pins {
> + pinctrl-single,pins = <
> + AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
> + AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
> + >;
> + };
we should drop all the pinmuxes - they come in from board.dts.
> };
>
> &dmsc {
> @@ -227,6 +239,7 @@
> /delete-property/ clock-names;
> pinctrl-names = "default";
> pinctrl-0 = <&main_uart0_pins_default>;
> + current-speed = <115200>;
> status = "okay";
> };
>
> @@ -267,6 +280,10 @@
>
> /* EEPROM might be read before SYSFW is available */
> &main_i2c0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_i2c0_pins_default>;
> + clock-frequency = <400000>;
> /delete-property/ power-domains;
> };
We should be inheriting stuff from board.dts.
>
> @@ -282,4 +299,11 @@
> pinctrl-0 = <&main_usb0_pins_default>;
> };
>
> +&main_timer0 {
> + /delete-property/ clocks;
> + /delete-property/ assigned-clocks;
> + /delete-property/ assigned-clock-parents;
> + /delete-property/ power-domains;
This needs documentation.
> +};
> +
> #include "k3-am642-evm-u-boot.dtsi"
> diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts
> index 32d4c31728..5487973e6e 100644
> --- a/arch/arm/dts/k3-am642-r5-sk.dts
> +++ b/arch/arm/dts/k3-am642-r5-sk.dts
> @@ -15,12 +15,17 @@
> / {
> chosen {
> stdout-path = "serial2:115200n8";
> - tick-timer = &timer1;
> };
>
> aliases {
> remoteproc0 = &sysctrler;
> remoteproc1 = &a53_0;
> + serial1 = &main_uart1;
> + serial2 = &main_uart0;
> + i2c0 = &main_i2c0;
> + mmc1 = &sdhci1;
> + ethernet0 = &cpsw_port1;
> + ethernet1 = &cpsw_port2;
> };
>
> memory@80000000 {
> @@ -178,6 +183,13 @@
> AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
> >;
> };
> +
> + main_i2c0_pins_default: main-i2c0-default-pins {
> + pinctrl-single,pins = <
> + AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
> + AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
> + >;
> + };
> };
>
> &dmsc {
> @@ -189,12 +201,22 @@
> ti,secure-host;
> };
>
> +/* EEPROM might be read before SYSFW is available */
> +&main_i2c0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_i2c0_pins_default>;
> + clock-frequency = <400000>;
> + /delete-property/ power-domains;
> +};
> +
> &main_uart0 {
> /delete-property/ power-domains;
> /delete-property/ clocks;
> /delete-property/ clock-names;
> pinctrl-names = "default";
> pinctrl-0 = <&main_uart0_pins_default>;
> + current-speed = <115200>;
> status = "okay";
> };
>
> @@ -264,4 +286,11 @@
> };
> };
>
> +&main_timer0 {
> + /delete-property/ clocks;
> + /delete-property/ assigned-clocks;
> + /delete-property/ assigned-clock-parents;
> + /delete-property/ power-domains;
> +};
> +
> #include "k3-am642-sk-u-boot.dtsi"
Move the u-boot.dtsi include to the very top after board.dts is
included. - Same with the evm dts.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux
2023-07-31 12:27 [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux Roger Quadros
` (2 preceding siblings ...)
2023-07-31 15:16 ` [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux Roger Quadros
@ 2023-08-01 12:37 ` Nishanth Menon
2023-08-01 13:20 ` Roger Quadros
2023-08-02 21:12 ` Nishanth Menon
4 siblings, 1 reply; 10+ messages in thread
From: Nishanth Menon @ 2023-08-01 12:37 UTC (permalink / raw)
To: Roger Quadros; +Cc: trini, vigneshr, srk, r-gunasekaran, s-vadapalli, u-boot
On 15:27-20230731, Roger Quadros wrote:
> Hi,
>
> This series syncs AM64 DT files from Linux v6.5-rc1.
>
> NOTE: I have only boot tested this on AM64-GP-EVM.
> I would appreciate a tested-by for AM64-sk EVM. Thanks.
>
> cheers,
> -roger
>
> Changelog:
>
> v2:
> - Sync with v6.5-rc1
> - Rebase on latest uboot/master
> - CPSW node cleanup
> - Timer node cleanup
>
> Roger Quadros (2):
> board: ti: am64x: Recognize AM64-HSEVM
> arm: dts: k3-am64: Sync DT with Linux v6.5-rc1
>
> arch/arm/dts/k3-am64-main.dtsi | 171 +++++++++++++++++++++++--
> arch/arm/dts/k3-am64-mcu.dtsi | 53 +++++++-
> arch/arm/dts/k3-am64-thermal.dtsi | 33 +++++
> arch/arm/dts/k3-am64.dtsi | 22 +---
> arch/arm/dts/k3-am642-evm-u-boot.dtsi | 42 ++-----
> arch/arm/dts/k3-am642-evm.dts | 173 ++++++++++++++++++++------
> arch/arm/dts/k3-am642-r5-evm.dts | 26 +++-
> arch/arm/dts/k3-am642-r5-sk.dts | 31 ++++-
> arch/arm/dts/k3-am642-sk-u-boot.dtsi | 43 ++-----
> arch/arm/dts/k3-am642-sk.dts | 166 +++++++++++++++++-------
> arch/arm/dts/k3-am642.dtsi | 1 +
> board/ti/am64x/evm.c | 3 +-
> 12 files changed, 589 insertions(+), 175 deletions(-)
> create mode 100644 arch/arm/dts/k3-am64-thermal.dtsi
>
> --
> 2.34.1
>
Could you also add documentation for u-boot (doc/board/ti/)
https://github.com/nmenon/fix-k3-dt-u-boot/commit/840ad0f07d6028e3758650f6d3d0d468438910ce
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 2/2] arm: dts: k3-am64: Sync DT with Linux v6.5-rc1
2023-07-31 12:27 ` [PATCH v2 2/2] arm: dts: k3-am64: Sync DT with Linux v6.5-rc1 Roger Quadros
2023-08-01 12:36 ` Nishanth Menon
@ 2023-08-01 13:04 ` Nishanth Menon
1 sibling, 0 replies; 10+ messages in thread
From: Nishanth Menon @ 2023-08-01 13:04 UTC (permalink / raw)
To: Roger Quadros; +Cc: trini, vigneshr, srk, r-gunasekaran, s-vadapalli, u-boot
On 15:27-20230731, Roger Quadros wrote:
> Sync all am642-evm/am642-sk related DT files
> with Linux v6.5-rc1.
>
> - drop timer1 in favor of main_timer0 in am64-main.dtsi.
> Need to delete clock & power domain properties of
> main_timer1 in -r5.dts else won't boot.
> - drop cpsw3g custom DT property 'mac_efuse' and custom
> DT node cpsw-phy-sel as driver picks these from standard
> property/node.
>
> Signed-off-by: Roger Quadros <rogerq@kernel.org>
> ---
> arch/arm/dts/k3-am64-main.dtsi | 171 +++++++++++++++++++++++--
> arch/arm/dts/k3-am64-mcu.dtsi | 53 +++++++-
> arch/arm/dts/k3-am64-thermal.dtsi | 33 +++++
> arch/arm/dts/k3-am64.dtsi | 22 +---
> arch/arm/dts/k3-am642-evm-u-boot.dtsi | 42 ++-----
> arch/arm/dts/k3-am642-evm.dts | 173 ++++++++++++++++++++------
> arch/arm/dts/k3-am642-r5-evm.dts | 26 +++-
> arch/arm/dts/k3-am642-r5-sk.dts | 31 ++++-
> arch/arm/dts/k3-am642-sk-u-boot.dtsi | 43 ++-----
> arch/arm/dts/k3-am642-sk.dts | 166 +++++++++++++++++-------
> arch/arm/dts/k3-am642.dtsi | 1 +
> 11 files changed, 587 insertions(+), 174 deletions(-)
> create mode 100644 arch/arm/dts/k3-am64-thermal.dtsi
>
> diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
> index 5e8036f32d..1664d9f024 100644
> --- a/arch/arm/dts/k3-am64-main.dtsi
> +++ b/arch/arm/dts/k3-am64-main.dtsi
> @@ -228,12 +228,161 @@
> };
> };
>
> + main_timer0: timer@2400000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2400000 0x00 0x400>;
> + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 36 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 36 1>;
> + assigned-clock-parents = <&k3_clks 36 2>;
> + power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer1: timer@2410000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2410000 0x00 0x400>;
> + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 37 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 37 1>;
> + assigned-clock-parents = <&k3_clks 37 2>;
> + power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer2: timer@2420000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2420000 0x00 0x400>;
> + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 38 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 38 1>;
> + assigned-clock-parents = <&k3_clks 38 2>;
> + power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer3: timer@2430000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2430000 0x00 0x400>;
> + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 39 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 39 1>;
> + assigned-clock-parents = <&k3_clks 39 2>;
> + power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer4: timer@2440000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2440000 0x00 0x400>;
> + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 40 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 40 1>;
> + assigned-clock-parents = <&k3_clks 40 2>;
> + power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer5: timer@2450000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2450000 0x00 0x400>;
> + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 41 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 41 1>;
> + assigned-clock-parents = <&k3_clks 41 2>;
> + power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer6: timer@2460000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2460000 0x00 0x400>;
> + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 42 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 42 1>;
> + assigned-clock-parents = <&k3_clks 42 2>;
> + power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer7: timer@2470000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2470000 0x00 0x400>;
> + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 43 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 43 1>;
> + assigned-clock-parents = <&k3_clks 43 2>;
> + power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer8: timer@2480000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2480000 0x00 0x400>;
> + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 44 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 44 1>;
> + assigned-clock-parents = <&k3_clks 44 2>;
> + power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer9: timer@2490000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x2490000 0x00 0x400>;
> + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 45 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 45 1>;
> + assigned-clock-parents = <&k3_clks 45 2>;
> + power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer10: timer@24a0000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x24a0000 0x00 0x400>;
> + interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 46 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 46 1>;
> + assigned-clock-parents = <&k3_clks 46 2>;
> + power-domains = <&k3_pds 46 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_timer11: timer@24b0000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x24b0000 0x00 0x400>;
> + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 47 1>;
> + clock-names = "fck";
> + assigned-clocks = <&k3_clks 47 1>;
> + assigned-clock-parents = <&k3_clks 47 2>;
> + power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + };
> +
> + main_esm: esm@420000 {
> + compatible = "ti,j721e-esm";
> + reg = <0x00 0x420000 0x00 0x1000>;
> + ti,esm-pins = <160>, <161>;
> + };
> +
> main_uart0: serial@2800000 {
> compatible = "ti,am64-uart", "ti,am654-uart";
> reg = <0x00 0x02800000 0x00 0x100>;
> interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
> clock-frequency = <48000000>;
> - current-speed = <115200>;
> power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
> clocks = <&k3_clks 146 0>;
> clock-names = "fclk";
> @@ -245,7 +394,6 @@
> reg = <0x00 0x02810000 0x00 0x100>;
> interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
> clock-frequency = <48000000>;
> - current-speed = <115200>;
> power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
> clocks = <&k3_clks 152 0>;
> clock-names = "fclk";
> @@ -257,7 +405,6 @@
> reg = <0x00 0x02820000 0x00 0x100>;
> interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
> clock-frequency = <48000000>;
> - current-speed = <115200>;
> power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
> clocks = <&k3_clks 153 0>;
> clock-names = "fclk";
> @@ -269,7 +416,6 @@
> reg = <0x00 0x02830000 0x00 0x100>;
> interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
> clock-frequency = <48000000>;
> - current-speed = <115200>;
> power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
> clocks = <&k3_clks 154 0>;
> clock-names = "fclk";
> @@ -281,7 +427,6 @@
> reg = <0x00 0x02840000 0x00 0x100>;
> interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
> clock-frequency = <48000000>;
> - current-speed = <115200>;
> power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
> clocks = <&k3_clks 155 0>;
> clock-names = "fclk";
> @@ -293,7 +438,6 @@
> reg = <0x00 0x02850000 0x00 0x100>;
> interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
> clock-frequency = <48000000>;
> - current-speed = <115200>;
> power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
> clocks = <&k3_clks 156 0>;
> clock-names = "fclk";
> @@ -305,7 +449,6 @@
> reg = <0x00 0x02860000 0x00 0x100>;
> interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> clock-frequency = <48000000>;
> - current-speed = <115200>;
> power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
> clocks = <&k3_clks 158 0>;
> clock-names = "fclk";
> @@ -676,6 +819,7 @@
> #mbox-cells = <1>;
> ti,mbox-num-users = <4>;
> ti,mbox-num-fifos = <16>;
> + status = "disabled";
> };
>
> mailbox0_cluster3: mailbox@29030000 {
> @@ -686,6 +830,7 @@
> #mbox-cells = <1>;
> ti,mbox-num-users = <4>;
> ti,mbox-num-fifos = <16>;
> + status = "disabled";
> };
>
> mailbox0_cluster4: mailbox@29040000 {
> @@ -696,6 +841,7 @@
> #mbox-cells = <1>;
> ti,mbox-num-users = <4>;
> ti,mbox-num-fifos = <16>;
> + status = "disabled";
> };
>
> mailbox0_cluster5: mailbox@29050000 {
> @@ -706,6 +852,7 @@
> #mbox-cells = <1>;
> ti,mbox-num-users = <4>;
> ti,mbox-num-fifos = <16>;
> + status = "disabled";
> };
>
> mailbox0_cluster6: mailbox@29060000 {
> @@ -715,6 +862,7 @@
> #mbox-cells = <1>;
> ti,mbox-num-users = <4>;
> ti,mbox-num-fifos = <16>;
> + status = "disabled";
> };
>
> mailbox0_cluster7: mailbox@29070000 {
> @@ -724,6 +872,7 @@
> #mbox-cells = <1>;
> ti,mbox-num-users = <4>;
> ti,mbox-num-fifos = <16>;
> + status = "disabled";
> };
>
> main_r5fss0: r5fss@78000000 {
> @@ -1392,4 +1541,12 @@
> clock-names = "fck";
> status = "disabled";
> };
> +
> + main_vtm0: temperature-sensor@b00000 {
> + compatible = "ti,j7200-vtm";
> + reg = <0x00 0xb00000 0x00 0x400>,
> + <0x00 0xb01000 0x00 0x400>;
> + power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
> + #thermal-sensor-cells = <1>;
> + };
> };
> diff --git a/arch/arm/dts/k3-am64-mcu.dtsi b/arch/arm/dts/k3-am64-mcu.dtsi
> index 38ddf0b3b8..686d497907 100644
> --- a/arch/arm/dts/k3-am64-mcu.dtsi
> +++ b/arch/arm/dts/k3-am64-mcu.dtsi
> @@ -6,11 +6,55 @@
> */
>
> &cbass_mcu {
> + /*
> + * The MCU domain timer interrupts are routed only to the ESM module,
> + * and not currently available for Linux. The MCU domain timers are
> + * of limited use without interrupts, and likely reserved by the ESM.
> + */
> + mcu_timer0: timer@4800000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x4800000 0x00 0x400>;
> + clocks = <&k3_clks 35 1>;
> + clock-names = "fck";
> + power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + status = "reserved";
> + };
> +
> + mcu_timer1: timer@4810000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x4810000 0x00 0x400>;
> + clocks = <&k3_clks 48 1>;
> + clock-names = "fck";
> + power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + status = "reserved";
> + };
> +
> + mcu_timer2: timer@4820000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x4820000 0x00 0x400>;
> + clocks = <&k3_clks 49 1>;
> + clock-names = "fck";
> + power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + status = "reserved";
> + };
> +
> + mcu_timer3: timer@4830000 {
> + compatible = "ti,am654-timer";
> + reg = <0x00 0x4830000 0x00 0x400>;
> + clocks = <&k3_clks 50 1>;
> + clock-names = "fck";
> + power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
> + ti,timer-pwm;
> + status = "reserved";
> + };
> +
> mcu_uart0: serial@4a00000 {
> compatible = "ti,am64-uart", "ti,am654-uart";
> reg = <0x00 0x04a00000 0x00 0x100>;
> interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
> - current-speed = <115200>;
> power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
> clocks = <&k3_clks 149 0>;
> clock-names = "fclk";
> @@ -21,7 +65,6 @@
> compatible = "ti,am64-uart", "ti,am654-uart";
> reg = <0x00 0x04a10000 0x00 0x100>;
> interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> - current-speed = <115200>;
> power-domains = <&k3_pds 160 TI_SCI_PD_EXCLUSIVE>;
> clocks = <&k3_clks 160 0>;
> clock-names = "fclk";
> @@ -109,4 +152,10 @@
> pinctrl-single,register-width = <32>;
> pinctrl-single,function-mask = <0xffffffff>;
> };
> +
> + mcu_esm: esm@4100000 {
> + compatible = "ti,j721e-esm";
> + reg = <0x00 0x4100000 0x00 0x1000>;
> + ti,esm-pins = <0>, <1>;
> + };
> };
> diff --git a/arch/arm/dts/k3-am64-thermal.dtsi b/arch/arm/dts/k3-am64-thermal.dtsi
> new file mode 100644
> index 0000000000..036db56ba7
> --- /dev/null
> +++ b/arch/arm/dts/k3-am64-thermal.dtsi
> @@ -0,0 +1,33 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +#include <dt-bindings/thermal/thermal.h>
> +
> +thermal_zones: thermal-zones {
> + main0_thermal: main0-thermal {
> + polling-delay-passive = <250>; /* milliSeconds */
> + polling-delay = <500>; /* milliSeconds */
> + thermal-sensors = <&main_vtm0 0>;
> +
> + trips {
> + main0_crit: main0-crit {
> + temperature = <105000>; /* milliCelsius */
> + hysteresis = <2000>; /* milliCelsius */
> + type = "critical";
> + };
> + };
> + };
> +
> + main1_thermal: main1-thermal {
> + polling-delay-passive = <250>; /* milliSeconds */
> + polling-delay = <500>; /* milliSeconds */
> + thermal-sensors = <&main_vtm0 1>;
> +
> + trips {
> + main1_crit: main1-crit {
> + temperature = <105000>; /* milliCelsius */
> + hysteresis = <2000>; /* milliCelsius */
> + type = "critical";
> + };
> + };
> + };
> +};
> diff --git a/arch/arm/dts/k3-am64.dtsi b/arch/arm/dts/k3-am64.dtsi
> index c858725133..8e9c2bc70f 100644
> --- a/arch/arm/dts/k3-am64.dtsi
> +++ b/arch/arm/dts/k3-am64.dtsi
> @@ -8,9 +8,10 @@
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> -#include <dt-bindings/pinctrl/k3.h>
> #include <dt-bindings/soc/ti,sci_pm_domain.h>
>
> +#include "k3-pinctrl.h"
> +
> / {
> model = "Texas Instruments K3 AM642 SoC";
> compatible = "ti,am642";
> @@ -18,22 +19,6 @@
> #address-cells = <2>;
> #size-cells = <2>;
>
> - aliases {
> - serial0 = &mcu_uart0;
> - serial1 = &mcu_uart1;
> - serial2 = &main_uart0;
> - serial3 = &main_uart1;
> - serial4 = &main_uart2;
> - serial5 = &main_uart3;
> - serial6 = &main_uart4;
> - serial7 = &main_uart5;
> - serial8 = &main_uart6;
> - ethernet0 = &cpsw_port1;
> - ethernet1 = &cpsw_port2;
> - mmc0 = &sdhci0;
> - mmc1 = &sdhci1;
> - };
> -
> chosen { };
>
> firmware {
> @@ -69,6 +54,7 @@
> <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
> <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
> <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
> + <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
> <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
> <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
> <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
> @@ -105,6 +91,8 @@
> ranges = <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; /* Peripheral window */
> };
> };
> +
> + #include "k3-am64-thermal.dtsi"
> };
>
> /* Now include the peripherals for each bus segments */
> diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
> index 73577e8cfd..686f26032d 100644
> --- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi
> +++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
> @@ -8,7 +8,7 @@
> / {
> chosen {
> stdout-path = "serial2:115200n8";
> - tick-timer = &timer1;
> + tick-timer = &main_timer0;
> };
>
> memory@80000000 {
> @@ -18,13 +18,11 @@
>
> &cbass_main{
> bootph-pre-ram;
> - timer1: timer@2400000 {
> - compatible = "ti,omap5430-timer";
> - reg = <0x0 0x2400000 0x0 0x80>;
> - ti,timer-alwon;
> - clock-frequency = <200000000>;
> - bootph-pre-ram;
> - };
> +};
> +
> +&main_timer0 {
> + bootph-pre-ram;
> + clock-frequency = <200000000>;
> };
>
> &main_conf {
> @@ -36,21 +34,14 @@
>
> &main_pmx0 {
> bootph-pre-ram;
> - main_i2c0_pins_default: main-i2c0-pins-default {
> - bootph-pre-ram;
> - pinctrl-single,pins = <
> - AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
> - AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
> - >;
> - };
> +};
> +
> +&main_i2c0_pins_default {
> + bootph-pre-ram;
> };
>
> &main_i2c0 {
> - status = "okay";
> bootph-pre-ram;
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_i2c0_pins_default>;
> - clock-frequency = <400000>;
> };
>
> &main_uart0 {
> @@ -111,18 +102,7 @@
> };
>
> &cpsw3g {
> - reg = <0x0 0x8000000 0x0 0x200000>,
> - <0x0 0x43000200 0x0 0x8>;
> - reg-names = "cpsw_nuss", "mac_efuse";
> - /delete-property/ ranges;
> - pinctrl-0 = <&mdio1_pins_default /* HACK: as MDIO driver is not DM enabled */
> - &rgmii1_pins_default
> - &rgmii2_pins_default>;
> -
> - cpsw-phy-sel@04044 {
> - compatible = "ti,am64-phy-gmii-sel";
> - reg = <0x0 0x43004044 0x0 0x8>;
> - };
> + bootph-pre-ram;
> };
>
> &cpsw_port2 {
> diff --git a/arch/arm/dts/k3-am642-evm.dts b/arch/arm/dts/k3-am642-evm.dts
> index 39feea78a0..15c282c934 100644
> --- a/arch/arm/dts/k3-am642-evm.dts
> +++ b/arch/arm/dts/k3-am642-evm.dts
> @@ -17,15 +17,26 @@
> model = "Texas Instruments AM642 EVM";
>
> chosen {
> - stdout-path = "serial2:115200n8";
> - bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
> + stdout-path = &main_uart0;
> + };
> +
> + aliases {
> + serial0 = &mcu_uart0;
> + serial1 = &main_uart1;
> + serial2 = &main_uart0;
> + serial3 = &main_uart3;
> + i2c0 = &main_i2c0;
> + i2c1 = &main_i2c1;
> + mmc0 = &sdhci0;
> + mmc1 = &sdhci1;
> + ethernet0 = &cpsw_port1;
> + ethernet1 = &cpsw_port2;
> };
>
> memory@80000000 {
> device_type = "memory";
> /* 2G RAM */
> reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
> -
> };
>
> reserved-memory {
> @@ -94,7 +105,7 @@
> };
> };
>
> - evm_12v0: fixedregulator-evm12v0 {
> + evm_12v0: regulator-0 {
> /* main DC jack */
> compatible = "regulator-fixed";
> regulator-name = "evm_12v0";
> @@ -104,7 +115,7 @@
> regulator-boot-on;
> };
>
> - vsys_5v0: fixedregulator-vsys5v0 {
> + vsys_5v0: regulator-1 {
> /* output of LM5140 */
> compatible = "regulator-fixed";
> regulator-name = "vsys_5v0";
> @@ -115,7 +126,7 @@
> regulator-boot-on;
> };
>
> - vsys_3v3: fixedregulator-vsys3v3 {
> + vsys_3v3: regulator-2 {
> /* output of LM5140 */
> compatible = "regulator-fixed";
> regulator-name = "vsys_3v3";
> @@ -126,7 +137,7 @@
> regulator-boot-on;
> };
>
> - vdd_mmc1: fixed-regulator-sd {
> + vdd_mmc1: regulator-3 {
> /* TPS2051BD */
> compatible = "regulator-fixed";
> regulator-name = "vdd_mmc1";
> @@ -138,7 +149,7 @@
> gpio = <&exp1 6 GPIO_ACTIVE_HIGH>;
> };
>
> - vddb: fixedregulator-vddb {
> + vddb: regulator-4 {
> compatible = "regulator-fixed";
> regulator-name = "vddb_3v3_display";
> regulator-min-microvolt = <3300000>;
> @@ -148,6 +159,20 @@
> regulator-boot-on;
> };
>
> + vtt_supply: regulator-5 {
> + compatible = "regulator-fixed";
> + regulator-name = "vtt";
> + pinctrl-names = "default";
> + pinctrl-0 = <&ddr_vtt_pins_default>;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
> + vin-supply = <&vsys_3v3>;
> + enable-active-high;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> leds {
> compatible = "gpio-leds";
>
> @@ -201,7 +226,7 @@
> };
>
> &main_pmx0 {
> - main_mmc1_pins_default: main-mmc1-pins-default {
> + main_mmc1_pins_default: main-mmc1-default-pins {
> pinctrl-single,pins = <
> AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
> AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
> @@ -215,7 +240,16 @@
> >;
> };
>
> - main_uart0_pins_default: main-uart0-pins-default {
> + main_uart1_pins_default: main-uart1-default-pins {
> + pinctrl-single,pins = <
> + AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */
> + AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */
> + AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */
> + AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */
> + >;
> + };
> +
> + main_uart0_pins_default: main-uart0-default-pins {
> pinctrl-single,pins = <
> AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
> AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
> @@ -224,7 +258,7 @@
> >;
> };
>
> - main_spi0_pins_default: main-spi0-pins-default {
> + main_spi0_pins_default: main-spi0-default-pins {
> pinctrl-single,pins = <
> AM64X_IOPAD(0x0210, PIN_INPUT, 0) /* (D13) SPI0_CLK */
> AM64X_IOPAD(0x0208, PIN_OUTPUT, 0) /* (D12) SPI0_CS0 */
> @@ -233,21 +267,28 @@
> >;
> };
>
> - main_i2c1_pins_default: main-i2c1-pins-default {
> + main_i2c0_pins_default: main-i2c0-default-pins {
> + pinctrl-single,pins = <
> + AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
> + AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
> + >;
> + };
> +
> + main_i2c1_pins_default: main-i2c1-default-pins {
> pinctrl-single,pins = <
> AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */
> AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */
> >;
> };
>
> - mdio1_pins_default: mdio1-pins-default {
> + mdio1_pins_default: mdio1-default-pins {
> pinctrl-single,pins = <
> AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
> AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
> >;
> };
>
> - rgmii1_pins_default: rgmii1-pins-default {
> + rgmii1_pins_default: rgmii1-default-pins {
> pinctrl-single,pins = <
> AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */
> AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */
> @@ -264,7 +305,7 @@
> >;
> };
>
> - rgmii2_pins_default: rgmii2-pins-default {
> + rgmii2_pins_default: rgmii2-default-pins {
> pinctrl-single,pins = <
> AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
> AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
> @@ -281,13 +322,13 @@
> >;
> };
>
> - main_usb0_pins_default: main-usb0-pins-default {
> + main_usb0_pins_default: main-usb0-default-pins {
> pinctrl-single,pins = <
> AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
> >;
> };
>
> - ospi0_pins_default: ospi0-pins-default {
> + ospi0_pins_default: ospi0-default-pins {
> pinctrl-single,pins = <
> AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */
> AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */
> @@ -303,36 +344,58 @@
> >;
> };
>
> - main_ecap0_pins_default: main-ecap0-pins-default {
> + main_ecap0_pins_default: main-ecap0-default-pins {
> pinctrl-single,pins = <
> AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */
> >;
> };
>
> - main_mcan0_pins_default: main-mcan0-pins-default {
> + main_mcan0_pins_default: main-mcan0-default-pins {
> pinctrl-single,pins = <
> AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* (B17) MCAN0_RX */
> AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (A17) MCAN0_TX */
> >;
> };
>
> - main_mcan1_pins_default: main-mcan1-pins-default {
> + main_mcan1_pins_default: main-mcan1-default-pins {
> pinctrl-single,pins = <
> AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* (D17) MCAN1_RX */
> AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */
> >;
> };
> +
> + ddr_vtt_pins_default: ddr-vtt-default-pins {
> + pinctrl-single,pins = <
> + AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */
> + >;
> + };
> };
>
> &main_uart0 {
> status = "okay";
> pinctrl-names = "default";
> pinctrl-0 = <&main_uart0_pins_default>;
> + current-speed = <115200>;
> };
>
> /* main_uart1 is reserved for firmware usage */
> &main_uart1 {
> status = "reserved";
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_uart1_pins_default>;
> +};
> +
> +&main_i2c0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_i2c0_pins_default>;
> + clock-frequency = <400000>;
> +
> + eeprom@50 {
> + /* AT24CM01 */
> + compatible = "atmel,24c1024";
> + reg = <0x50>;
> + };
> };
>
> &main_i2c1 {
> @@ -425,8 +488,7 @@
>
> &cpsw3g {
> pinctrl-names = "default";
> - pinctrl-0 = <&rgmii1_pins_default
> - &rgmii2_pins_default>;
> + pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>;
> };
>
> &cpsw_port1 {
> @@ -471,10 +533,53 @@
> cdns,tchsh-ns = <60>;
> cdns,tslch-ns = <60>;
> cdns,read-delay = <4>;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + partition@0 {
> + label = "ospi.tiboot3";
> + reg = <0x0 0x100000>;
> + };
> +
> + partition@100000 {
> + label = "ospi.tispl";
> + reg = <0x100000 0x200000>;
> + };
> +
> + partition@300000 {
> + label = "ospi.u-boot";
> + reg = <0x300000 0x400000>;
> + };
> +
> + partition@700000 {
> + label = "ospi.env";
> + reg = <0x700000 0x40000>;
> + };
> +
> + partition@740000 {
> + label = "ospi.env.backup";
> + reg = <0x740000 0x40000>;
> + };
> +
> + partition@800000 {
> + label = "ospi.rootfs";
> + reg = <0x800000 0x37c0000>;
> + };
> +
> + partition@3fc0000 {
> + label = "ospi.phypattern";
> + reg = <0x3fc0000 0x40000>;
> + };
> + };
> };
> };
>
> &mailbox0_cluster2 {
> + status = "okay";
> +
> mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
> ti,mbox-rx = <0 0 2>;
> ti,mbox-tx = <1 0 2>;
> @@ -486,11 +591,9 @@
> };
> };
>
> -&mailbox0_cluster3 {
> - status = "disabled";
> -};
> -
> &mailbox0_cluster4 {
> + status = "okay";
> +
> mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
> ti,mbox-rx = <0 0 2>;
> ti,mbox-tx = <1 0 2>;
> @@ -502,41 +605,35 @@
> };
> };
>
> -&mailbox0_cluster5 {
> - status = "disabled";
> -};
> -
> &mailbox0_cluster6 {
> + status = "okay";
> +
> mbox_m4_0: mbox-m4-0 {
> ti,mbox-rx = <0 0 2>;
> ti,mbox-tx = <1 0 2>;
> };
> };
>
> -&mailbox0_cluster7 {
> - status = "disabled";
> -};
> -
> &main_r5fss0_core0 {
> - mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
> + mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core0>;
> memory-region = <&main_r5fss0_core0_dma_memory_region>,
> <&main_r5fss0_core0_memory_region>;
> };
>
> &main_r5fss0_core1 {
> - mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
> + mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core1>;
> memory-region = <&main_r5fss0_core1_dma_memory_region>,
> <&main_r5fss0_core1_memory_region>;
> };
>
> &main_r5fss1_core0 {
> - mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
> + mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core0>;
> memory-region = <&main_r5fss1_core0_dma_memory_region>,
> <&main_r5fss1_core0_memory_region>;
> };
>
> &main_r5fss1_core1 {
> - mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
> + mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core1>;
> memory-region = <&main_r5fss1_core1_dma_memory_region>,
> <&main_r5fss1_core1_memory_region>;
> };
> diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts
> index b49064181a..fd9e9a6489 100644
> --- a/arch/arm/dts/k3-am642-r5-evm.dts
> +++ b/arch/arm/dts/k3-am642-r5-evm.dts
> @@ -13,12 +13,17 @@
> / {
> chosen {
> stdout-path = "serial2:115200n8";
> - tick-timer = &timer1;
> };
>
> aliases {
> remoteproc0 = &sysctrler;
> remoteproc1 = &a53_0;
> + serial1 = &main_uart1;
> + serial2 = &main_uart0;
> + i2c0 = &main_i2c0;
> + mmc0 = &sdhci0;
> + mmc1 = &sdhci1;
> + ethernet0 = &cpsw_port1;
> };
>
> memory@80000000 {
> @@ -210,6 +215,13 @@
> AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
> >;
> };
> +
> + main_i2c0_pins_default: main-i2c0-default-pins {
> + pinctrl-single,pins = <
> + AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
> + AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
> + >;
> + };
> };
>
> &dmsc {
> @@ -227,6 +239,7 @@
> /delete-property/ clock-names;
> pinctrl-names = "default";
> pinctrl-0 = <&main_uart0_pins_default>;
> + current-speed = <115200>;
> status = "okay";
> };
>
> @@ -267,6 +280,10 @@
>
> /* EEPROM might be read before SYSFW is available */
> &main_i2c0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_i2c0_pins_default>;
> + clock-frequency = <400000>;
> /delete-property/ power-domains;
> };
>
> @@ -282,4 +299,11 @@
> pinctrl-0 = <&main_usb0_pins_default>;
> };
>
> +&main_timer0 {
> + /delete-property/ clocks;
> + /delete-property/ assigned-clocks;
> + /delete-property/ assigned-clock-parents;
> + /delete-property/ power-domains;
> +};
> +
> #include "k3-am642-evm-u-boot.dtsi"
> diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts
> index 32d4c31728..5487973e6e 100644
> --- a/arch/arm/dts/k3-am642-r5-sk.dts
> +++ b/arch/arm/dts/k3-am642-r5-sk.dts
k3-am642-r5-sk.dts should include as follows will avoid tons of
duplication:
#include "k3-am642-sk.dts"
#include "k3-am64-sk-ddr4-1600MTs.dtsi"
#include "k3-am64-ddr.dtsi"
#include "k3-am642-sk-u-boot.dtsi"
Then we can drop entire memory and ton of pinmux, esm and what not..
even secure_proxy is defined in main.
Please refer to the cleanup done in am625 as reference.
Also i noticed ti,tps65219 support -> this is not correct.
There are two boards:
https://www.ti.com/tool/SK-AM64 - This uses descrete power supply
https://www.ti.com/tool/SK-AM64B - this uses ti,tps65219
the board dts supports https://www.ti.com/tool/SK-AM64 as should be in the
documentation of the dts (looks missed). - SKB needs to be added in
upstream prior to being backported to the platform.
I'd rather we figure this out in upstream kernel than in u-boot.
Suggestion:
revert 28a4c3113445d4400639f357fae0def007a41093 and introduce it back
once resolved in upstream kernel.
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux
2023-08-01 12:37 ` Nishanth Menon
@ 2023-08-01 13:20 ` Roger Quadros
0 siblings, 0 replies; 10+ messages in thread
From: Roger Quadros @ 2023-08-01 13:20 UTC (permalink / raw)
To: Nishanth Menon; +Cc: trini, vigneshr, srk, r-gunasekaran, s-vadapalli, u-boot
On 01/08/2023 15:37, Nishanth Menon wrote:
> On 15:27-20230731, Roger Quadros wrote:
>> Hi,
>>
>> This series syncs AM64 DT files from Linux v6.5-rc1.
>>
>> NOTE: I have only boot tested this on AM64-GP-EVM.
>> I would appreciate a tested-by for AM64-sk EVM. Thanks.
>>
>> cheers,
>> -roger
>>
>> Changelog:
>>
>> v2:
>> - Sync with v6.5-rc1
>> - Rebase on latest uboot/master
>> - CPSW node cleanup
>> - Timer node cleanup
>>
>> Roger Quadros (2):
>> board: ti: am64x: Recognize AM64-HSEVM
>> arm: dts: k3-am64: Sync DT with Linux v6.5-rc1
>>
>> arch/arm/dts/k3-am64-main.dtsi | 171 +++++++++++++++++++++++--
>> arch/arm/dts/k3-am64-mcu.dtsi | 53 +++++++-
>> arch/arm/dts/k3-am64-thermal.dtsi | 33 +++++
>> arch/arm/dts/k3-am64.dtsi | 22 +---
>> arch/arm/dts/k3-am642-evm-u-boot.dtsi | 42 ++-----
>> arch/arm/dts/k3-am642-evm.dts | 173 ++++++++++++++++++++------
>> arch/arm/dts/k3-am642-r5-evm.dts | 26 +++-
>> arch/arm/dts/k3-am642-r5-sk.dts | 31 ++++-
>> arch/arm/dts/k3-am642-sk-u-boot.dtsi | 43 ++-----
>> arch/arm/dts/k3-am642-sk.dts | 166 +++++++++++++++++-------
>> arch/arm/dts/k3-am642.dtsi | 1 +
>> board/ti/am64x/evm.c | 3 +-
>> 12 files changed, 589 insertions(+), 175 deletions(-)
>> create mode 100644 arch/arm/dts/k3-am64-thermal.dtsi
>>
>> --
>> 2.34.1
>>
> Could you also add documentation for u-boot (doc/board/ti/)
> https://github.com/nmenon/fix-k3-dt-u-boot/commit/840ad0f07d6028e3758650f6d3d0d468438910ce
>
Yes, and will resolve all your comments on this series. Thanks.
--
cheers,
-roger
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux
2023-07-31 12:27 [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux Roger Quadros
` (3 preceding siblings ...)
2023-08-01 12:37 ` Nishanth Menon
@ 2023-08-02 21:12 ` Nishanth Menon
4 siblings, 0 replies; 10+ messages in thread
From: Nishanth Menon @ 2023-08-02 21:12 UTC (permalink / raw)
To: Roger Quadros; +Cc: trini, vigneshr, srk, r-gunasekaran, s-vadapalli, u-boot
On 15:27-20230731, Roger Quadros wrote:
> Hi,
>
> This series syncs AM64 DT files from Linux v6.5-rc1.
>
> NOTE: I have only boot tested this on AM64-GP-EVM.
> I would appreciate a tested-by for AM64-sk EVM. Thanks.
quick test:
https://gist.github.com/nmenon/996855b92e9f233c63ec44185ab61576
Tested-by: Nishanth Menon <nm@ti.com>
>
> cheers,
> -roger
>
> Changelog:
>
> v2:
> - Sync with v6.5-rc1
> - Rebase on latest uboot/master
> - CPSW node cleanup
> - Timer node cleanup
>
> Roger Quadros (2):
> board: ti: am64x: Recognize AM64-HSEVM
> arm: dts: k3-am64: Sync DT with Linux v6.5-rc1
>
> arch/arm/dts/k3-am64-main.dtsi | 171 +++++++++++++++++++++++--
> arch/arm/dts/k3-am64-mcu.dtsi | 53 +++++++-
> arch/arm/dts/k3-am64-thermal.dtsi | 33 +++++
> arch/arm/dts/k3-am64.dtsi | 22 +---
> arch/arm/dts/k3-am642-evm-u-boot.dtsi | 42 ++-----
> arch/arm/dts/k3-am642-evm.dts | 173 ++++++++++++++++++++------
> arch/arm/dts/k3-am642-r5-evm.dts | 26 +++-
> arch/arm/dts/k3-am642-r5-sk.dts | 31 ++++-
> arch/arm/dts/k3-am642-sk-u-boot.dtsi | 43 ++-----
> arch/arm/dts/k3-am642-sk.dts | 166 +++++++++++++++++-------
> arch/arm/dts/k3-am642.dtsi | 1 +
> board/ti/am64x/evm.c | 3 +-
> 12 files changed, 589 insertions(+), 175 deletions(-)
> create mode 100644 arch/arm/dts/k3-am64-thermal.dtsi
>
> --
> 2.34.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2023-08-02 21:12 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-07-31 12:27 [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux Roger Quadros
2023-07-31 12:27 ` [PATCH v2 1/2] board: ti: am64x: Recognize AM64-HSEVM Roger Quadros
2023-07-31 14:20 ` Andrew Davis
2023-07-31 12:27 ` [PATCH v2 2/2] arm: dts: k3-am64: Sync DT with Linux v6.5-rc1 Roger Quadros
2023-08-01 12:36 ` Nishanth Menon
2023-08-01 13:04 ` Nishanth Menon
2023-07-31 15:16 ` [PATCH v2 0/2] arm: dts: k3-am6: Sync DT with Linux Roger Quadros
2023-08-01 12:37 ` Nishanth Menon
2023-08-01 13:20 ` Roger Quadros
2023-08-02 21:12 ` Nishanth Menon
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