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* [igt-dev] [PATCH 1/2] lib/amdgpu: Formatting the code
@ 2023-08-11 21:28 vitaly.prosyak
  2023-08-11 21:28 ` [igt-dev] [PATCH 2/2] tests/amdgpu: misc fixes for basic tests vitaly.prosyak
                   ` (4 more replies)
  0 siblings, 5 replies; 8+ messages in thread
From: vitaly.prosyak @ 2023-08-11 21:28 UTC (permalink / raw)
  To: igt-dev; +Cc: alexander.deucher, luben.tuikov, christian.koenig

From: Vitaly Prosyak <vitaly.prosyak@amd.com>

No functional change, formatting the code to meet iGT guidelines.

Cc: Kamil Konieczny@linux.intel.com <kamil.konieczny@linux.intel.com>
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Acked-by: Kamil Konieczny@linux.intel.com <kamil.konieczny@linux.intel.com>
---
 lib/amdgpu/amd_command_submission.c |  50 ++++------
 lib/amdgpu/amd_command_submission.h |   2 +-
 lib/amdgpu/amd_ip_blocks.c          | 139 +++++++++++++---------------
 lib/amdgpu/amd_ip_blocks.h          |  32 ++-----
 tests/amdgpu/amd_basic.c            |  72 ++++++--------
 5 files changed, 114 insertions(+), 181 deletions(-)

diff --git a/lib/amdgpu/amd_command_submission.c b/lib/amdgpu/amd_command_submission.c
index de393209b..dbf68d4d0 100644
--- a/lib/amdgpu/amd_command_submission.c
+++ b/lib/amdgpu/amd_command_submission.c
@@ -1,27 +1,9 @@
-/* SPDX-License-Identifier: MIT
+// SPDX-License-Identifier: MIT
+/*
  * Copyright 2014 Advanced Micro Devices, Inc.
  * Copyright 2022 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- *
  */
+
 #include "lib/amdgpu/amd_memory.h"
 #include "lib/amdgpu/amd_sdma.h"
 #include "lib/amdgpu/amd_PM4.h"
@@ -34,7 +16,7 @@
  * submit command stream described in ibs_request and wait for this IB accomplished
  */
 
-void amdgpu_test_exec_cs_helper(amdgpu_device_handle device, unsigned ip_type,
+void amdgpu_test_exec_cs_helper(amdgpu_device_handle device, unsigned int ip_type,
 				struct amdgpu_ring_context *ring_context)
 {
 	int r;
@@ -141,19 +123,19 @@ void amdgpu_command_submission_write_linear_helper(amdgpu_device_handle device,
 
 	for (ring_id = 0; (1 << ring_id) & ring_context->hw_ip_info.available_rings; ring_id++) {
 		loop = 0;
-		while(loop < 2) {
+		while (loop < 2) {
 			/* allocate UC bo for sDMA use */
 			r = amdgpu_bo_alloc_and_map(device,
 						    ring_context->write_length * sizeof(uint32_t),
 						    4096, AMDGPU_GEM_DOMAIN_GTT,
 						    gtt_flags[loop], &ring_context->bo,
-						    (void**)&ring_context->bo_cpu,
+						    (void **)&ring_context->bo_cpu,
 						    &ring_context->bo_mc,
 						    &ring_context->va_handle);
 			igt_assert_eq(r, 0);
 
 			/* clear bo */
-			memset((void*)ring_context->bo_cpu, 0, ring_context->write_length * sizeof(uint32_t));
+			memset((void *)ring_context->bo_cpu, 0, ring_context->write_length * sizeof(uint32_t));
 
 			ring_context->resources[0] = ring_context->bo;
 
@@ -232,17 +214,17 @@ void amdgpu_command_submission_const_fill_helper(amdgpu_device_handle device,
 
 	/* prepare resource */
 	loop = 0;
-	while(loop < 2) {
+	while (loop < 2) {
 		/* allocate UC bo for sDMA use */
 		r = amdgpu_bo_alloc_and_map(device,
 					    ring_context->write_length, 4096,
 					    AMDGPU_GEM_DOMAIN_GTT,
-					    gtt_flags[loop], &ring_context->bo, (void**)&ring_context->bo_cpu,
+					    gtt_flags[loop], &ring_context->bo, (void **)&ring_context->bo_cpu,
 					    &ring_context->bo_mc, &ring_context->va_handle);
 		igt_assert_eq(r, 0);
 
 		/* clear bo */
-		memset((void*)ring_context->bo_cpu, 0, ring_context->write_length);
+		memset((void *)ring_context->bo_cpu, 0, ring_context->write_length);
 
 		ring_context->resources[0] = ring_context->bo;
 
@@ -300,31 +282,31 @@ void amdgpu_command_submission_copy_linear_helper(amdgpu_device_handle device,
 
 	loop1 = loop2 = 0;
 	/* run 9 circle to test all mapping combination */
-	while(loop1 < 2) {
-		while(loop2 < 2) {
+	while (loop1 < 2) {
+		while (loop2 < 2) {
 			/* allocate UC bo1for sDMA use */
 			r = amdgpu_bo_alloc_and_map(device,
 						    ring_context->write_length, 4096,
 						    AMDGPU_GEM_DOMAIN_GTT,
 						    gtt_flags[loop1], &ring_context->bo,
-						    (void**)&ring_context->bo_cpu, &ring_context->bo_mc,
+						    (void **)&ring_context->bo_cpu, &ring_context->bo_mc,
 						    &ring_context->va_handle);
 			igt_assert_eq(r, 0);
 
 			/* set bo_cpu */
-			memset((void*)ring_context->bo_cpu, ip_block->funcs->pattern, ring_context->write_length);
+			memset((void *)ring_context->bo_cpu, ip_block->funcs->pattern, ring_context->write_length);
 
 			/* allocate UC bo2 for sDMA use */
 			r = amdgpu_bo_alloc_and_map(device,
 						    ring_context->write_length, 4096,
 						    AMDGPU_GEM_DOMAIN_GTT,
 						    gtt_flags[loop2], &ring_context->bo2,
-						    (void**)&ring_context->bo2_cpu, &ring_context->bo_mc2,
+						    (void **)&ring_context->bo2_cpu, &ring_context->bo_mc2,
 						    &ring_context->va_handle2);
 			igt_assert_eq(r, 0);
 
 			/* clear bo2_cpu */
-			memset((void*)ring_context->bo2_cpu, 0, ring_context->write_length);
+			memset((void *)ring_context->bo2_cpu, 0, ring_context->write_length);
 
 			ring_context->resources[0] = ring_context->bo;
 			ring_context->resources[1] = ring_context->bo2;
diff --git a/lib/amdgpu/amd_command_submission.h b/lib/amdgpu/amd_command_submission.h
index 0c1ba9bb4..58f3221a3 100644
--- a/lib/amdgpu/amd_command_submission.h
+++ b/lib/amdgpu/amd_command_submission.h
@@ -29,7 +29,7 @@
 #include "amd_ip_blocks.h"
 
 void amdgpu_test_exec_cs_helper(amdgpu_device_handle device,
-				unsigned ip_type, struct amdgpu_ring_context *ring_context);
+				unsigned int ip_type, struct amdgpu_ring_context *ring_context);
 
 void amdgpu_command_submission_write_linear_helper(amdgpu_device_handle device,
 						   const struct amdgpu_ip_block_version *ip_block,
diff --git a/lib/amdgpu/amd_ip_blocks.c b/lib/amdgpu/amd_ip_blocks.c
index 44768ba64..b07695714 100644
--- a/lib/amdgpu/amd_ip_blocks.c
+++ b/lib/amdgpu/amd_ip_blocks.c
@@ -1,27 +1,10 @@
-/* SPDX-License-Identifier: MIT
+// SPDX-License-Identifier: MIT
+/*
  * Copyright 2014 Advanced Micro Devices, Inc.
  * Copyright 2022 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- *
+ * Copyright 2023 Advanced Micro Devices, Inc.
  */
+
 #include <fcntl.h>
 
 #include "amd_memory.h"
@@ -67,7 +50,7 @@ sdma_ring_write_linear(const struct amdgpu_ip_funcs *func,
 		else
 			ring_context->pm4[i++] = ring_context->write_length;
 
-		while(j++ < ring_context->write_length)
+		while (j++ < ring_context->write_length)
 			ring_context->pm4[i++] = func->deadbeaf;
 	} else {
 		memset(ring_context->pm4, 0, ring_context->pm4_size * sizeof(uint32_t));
@@ -90,7 +73,7 @@ sdma_ring_write_linear(const struct amdgpu_ip_funcs *func,
 		ring_context->pm4[i++] = 0x100;
 	}
 
- 	*pm4_dw = i;
+	*pm4_dw = i;
 
 	return 0;
 }
@@ -157,7 +140,7 @@ sdma_ring_copy_linear(const struct amdgpu_ip_funcs *func,
 		context->pm4[i++] = (0xffffffff00000000 & context->bo_mc2) >> 32;
 	}
 
- 	*pm4_dw = i;
+	*pm4_dw = i;
 
 	return 0;
 }
@@ -169,25 +152,24 @@ sdma_ring_copy_linear(const struct amdgpu_ip_funcs *func,
  * - copy_linear
  */
 
-
 static int
 gfx_ring_write_linear(const struct amdgpu_ip_funcs *func,
-		      const struct amdgpu_ring_context *ring_context,
-		      uint32_t *pm4_dw)
- {
- 	uint32_t i, j;
-
- 	i = 0;
- 	j = 0;
-
- 	if (ring_context->secure == false) {
- 		ring_context->pm4[i++] = PACKET3(PACKET3_WRITE_DATA, 2 +  ring_context->write_length);
- 		ring_context->pm4[i++] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM;
- 		ring_context->pm4[i++] = 0xfffffffc & ring_context->bo_mc;
- 		ring_context->pm4[i++] = (0xffffffff00000000 & ring_context->bo_mc) >> 32;
- 		while(j++ < ring_context->write_length)
- 			ring_context->pm4[i++] = func->deadbeaf;
- 	} else {
+				const struct amdgpu_ring_context *ring_context,
+				uint32_t *pm4_dw)
+{
+	uint32_t i, j;
+
+	i = 0;
+	j = 0;
+
+	if (ring_context->secure == false) {
+		ring_context->pm4[i++] = PACKET3(PACKET3_WRITE_DATA, 2 +  ring_context->write_length);
+		ring_context->pm4[i++] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM;
+		ring_context->pm4[i++] = 0xfffffffc & ring_context->bo_mc;
+		ring_context->pm4[i++] = (0xffffffff00000000 & ring_context->bo_mc) >> 32;
+		while (j++ < ring_context->write_length)
+			ring_context->pm4[i++] = func->deadbeaf;
+	} else {
 		memset(ring_context->pm4, 0, ring_context->pm4_size * sizeof(uint32_t));
 		ring_context->pm4[i++] = PACKET3(PACKET3_ATOMIC_MEM, 7);
 
@@ -207,21 +189,21 @@ gfx_ring_write_linear(const struct amdgpu_ip_funcs *func,
 		ring_context->pm4[i++] = 0xdeadbeaf;
 		ring_context->pm4[i++] = 0x0;
 		ring_context->pm4[i++] = 0x100;
- 	}
+	}
 
- 	*pm4_dw = i;
+	*pm4_dw = i;
 
- 	return 0;
- }
+	return 0;
+}
 
- static int
- gfx_ring_const_fill(const struct amdgpu_ip_funcs *func,
-		     const struct amdgpu_ring_context *ring_context,
-		     uint32_t *pm4_dw)
- {
- 	uint32_t i;
+static int
+gfx_ring_const_fill(const struct amdgpu_ip_funcs *func,
+				const struct amdgpu_ring_context *ring_context,
+				uint32_t *pm4_dw)
+{
+	uint32_t i;
 
- 	i = 0;
+	i = 0;
 	if (func->family_id == AMDGPU_FAMILY_SI) {
 		ring_context->pm4[i++] = PACKET3(PACKET3_DMA_DATA_SI, 4);
 		ring_context->pm4[i++] = func->deadbeaf;
@@ -244,19 +226,19 @@ gfx_ring_write_linear(const struct amdgpu_ip_funcs *func,
 		ring_context->pm4[i++] = (0xffffffff00000000 & ring_context->bo_mc) >> 32;
 		ring_context->pm4[i++] = ring_context->write_length;
 	}
- 	*pm4_dw = i;
+	*pm4_dw = i;
 
- 	return 0;
- }
+	return 0;
+}
 
 static int
 gfx_ring_copy_linear(const struct amdgpu_ip_funcs *func,
 		     const struct amdgpu_ring_context *context,
 		     uint32_t *pm4_dw)
 {
- 	uint32_t i;
+	uint32_t i;
 
- 	i = 0;
+	i = 0;
 	if (func->family_id == AMDGPU_FAMILY_SI) {
 		context->pm4[i++] = PACKET3(PACKET3_DMA_DATA_SI, 4);
 		context->pm4[i++] = 0xfffffffc & context->bo_mc;
@@ -281,7 +263,7 @@ gfx_ring_copy_linear(const struct amdgpu_ip_funcs *func,
 		context->pm4[i++] = context->write_length;
 	}
 
- 	*pm4_dw = i;
+	*pm4_dw = i;
 
 	return 0;
 }
@@ -295,7 +277,7 @@ x_compare(const struct amdgpu_ip_funcs *func,
 
 	int num_compare = ring_context->write_length/div;
 
-	while(i < num_compare) {
+	while (i < num_compare) {
 		if (ring_context->bo_cpu[i++] != func->deadbeaf) {
 			ret = -1;
 			break;
@@ -312,7 +294,7 @@ x_compare_pattern(const struct amdgpu_ip_funcs *func,
 
 	int num_compare = ring_context->write_length/div;
 
-	while(i < num_compare) {
+	while (i < num_compare) {
 		if (ring_context->bo_cpu[i++] != func->pattern) {
 			ret = -1;
 			break;
@@ -374,9 +356,9 @@ const struct amdgpu_ip_block_version sdma_v3_x_ip_block = {
 };
 
 struct chip_info {
-	  const char *name;
-	  enum radeon_family family;
-	  enum chip_class chip_class;
+	const char *name;
+	enum radeon_family family;
+	enum chip_class chip_class;
 	  amdgpu_device_handle dev;
 };
 
@@ -403,7 +385,7 @@ get_ip_block(amdgpu_device_handle device, enum amd_ip_block_type type)
 	if (g_chip.dev != device)
 		return NULL;
 
-	for(i = 0; i <  amdgpu_ips.num_ip_blocks; i++)
+	for (i = 0; i <  amdgpu_ips.num_ip_blocks; i++)
 		if (amdgpu_ips.ip_blocks[i]->type == type)
 			return amdgpu_ips.ip_blocks[i];
 	return NULL;
@@ -451,14 +433,14 @@ cmd_attach_buf(struct amdgpu_cmd_base  *base, void *ptr, uint32_t size_bytes)
 static void
 cmd_emit(struct amdgpu_cmd_base  *base, uint32_t value)
 {
-	assert(base->cdw <  base->max_dw  );
+	assert(base->cdw <  base->max_dw);
 	base->buf[base->cdw++] = value;
 }
 
 static void
 cmd_emit_aligned(struct amdgpu_cmd_base *base, uint32_t mask, uint32_t cmd)
 {
-	while(base->cdw & mask)
+	while (base->cdw & mask)
 		base->emit(base, cmd);
 }
 static void
@@ -470,7 +452,7 @@ cmd_emit_buf(struct amdgpu_cmd_base  *base, const void *ptr, uint32_t offset_byt
 	assert(size_bytes % 4 == 0); /* no gaps */
 	assert(offset_bytes % 4 == 0);
 	assert(base->cdw + total_offset_dw <  base->max_dw);
-	memcpy(base->buf + base->cdw + offset_dw , ptr, size_bytes);
+	memcpy(base->buf + base->cdw + offset_dw, ptr, size_bytes);
 	base->cdw += total_offset_dw;
 }
 
@@ -494,7 +476,7 @@ cmd_emit_at_offset(struct amdgpu_cmd_base  *base, uint32_t value, uint32_t offse
 struct amdgpu_cmd_base *
 get_cmd_base(void)
 {
-	struct amdgpu_cmd_base *base = calloc(1 ,sizeof(*base));
+	struct amdgpu_cmd_base *base = calloc(1, sizeof(*base));
 
 	base->cdw = 0;
 	base->max_dw = 0;
@@ -504,7 +486,7 @@ get_cmd_base(void)
 	base->allocate_buf = cmd_allocate_buf;
 	base->attach_buf = cmd_attach_buf;
 	base->emit = cmd_emit;
-	base->emit_aligned= cmd_emit_aligned;
+	base->emit_aligned = cmd_emit_aligned;
 	base->emit_repeat = cmd_emit_repeat;
 	base->emit_at_offset = cmd_emit_at_offset;
 	base->emit_buf = cmd_emit_buf;
@@ -513,7 +495,7 @@ get_cmd_base(void)
 }
 
 void
-free_cmd_base(struct amdgpu_cmd_base * base)
+free_cmd_base(struct amdgpu_cmd_base *base)
 {
 	if (base) {
 		if (base->buf && base->is_assigned_buf == false)
@@ -546,11 +528,14 @@ free_cmd_base(struct amdgpu_cmd_base * base)
 int setup_amdgpu_ip_blocks(uint32_t major, uint32_t minor, struct amdgpu_gpu_info *amdinfo,
 			   amdgpu_device_handle device)
 {
-#define identify_chip2(asic, chipname)			\
-   if (ASICREV_IS(amdinfo->chip_external_rev, asic)) {	\
-      info->family = CHIP_##chipname;			\
-      info->name = #chipname;				\
-   }
+#define identify_chip2(asic, chipname)	\
+	do {\
+		if (ASICREV_IS(amdinfo->chip_external_rev, asic)) {\
+			info->family = CHIP_##chipname;	\
+			info->name = #chipname;	\
+		} \
+	} while (0)
+
 #define identify_chip(chipname) identify_chip2(chipname, chipname)
 
 	const struct chip_class_arr {
@@ -662,7 +647,7 @@ int setup_amdgpu_ip_blocks(uint32_t major, uint32_t minor, struct amdgpu_gpu_inf
 	igt_assert_eq(chip_class_arr[info->chip_class].class, info->chip_class);
 	igt_info("amdgpu: chip_class %s\n", chip_class_arr[info->chip_class].name);
 
-	switch(info->chip_class) {
+	switch (info->chip_class) {
 	case GFX6:
 		break;
 	case GFX7: /* tested */
@@ -684,7 +669,7 @@ int setup_amdgpu_ip_blocks(uint32_t major, uint32_t minor, struct amdgpu_gpu_inf
 	default:
 		igt_info("amdgpu: GFX or old.\n");
 		return -1;
-	 }
+	}
 	info->dev = device;
 
 	return 0;
diff --git a/lib/amdgpu/amd_ip_blocks.h b/lib/amdgpu/amd_ip_blocks.h
index 14e33c423..ad7ffd4e6 100644
--- a/lib/amdgpu/amd_ip_blocks.h
+++ b/lib/amdgpu/amd_ip_blocks.h
@@ -1,27 +1,9 @@
 /* SPDX-License-Identifier: MIT
  * Copyright 2014 Advanced Micro Devices, Inc.
  * Copyright 2022 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- *
+ * Copyright 2023 Advanced Micro Devices, Inc.
  */
+
 #ifndef AMD_IP_BLOCKS_H
 #define AMD_IP_BLOCKS_H
 
@@ -45,9 +27,9 @@ struct amdgpu_ring_context {
 	int res_cnt; /* num of bo in amdgpu_bo_handle resources[2] */
 
 	uint32_t write_length;  /* length of data */
-	uint32_t *pm4; 		/* data of the packet */
-	uint32_t pm4_size; 	/* max allocated packet size */
-	bool secure; 		/* secure or not */
+	uint32_t *pm4;		/* data of the packet */
+	uint32_t pm4_size;	/* max allocated packet size */
+	bool secure;		/* secure or not */
 
 	uint64_t bo_mc;		/* result from amdgpu_bo_alloc_and_map */
 	uint64_t bo_mc2;	/* result from amdgpu_bo_alloc_and_map */
@@ -128,13 +110,13 @@ struct amdgpu_cmd_base {
 	int (*allocate_buf)(struct amdgpu_cmd_base  *base, uint32_t size);
 	int (*attach_buf)(struct amdgpu_cmd_base  *base, void *ptr, uint32_t size_bytes);
 	void (*emit)(struct amdgpu_cmd_base  *base, uint32_t value);
-	void (*emit_aligned)(struct amdgpu_cmd_base  *base,uint32_t mask, uint32_t value);
+	void (*emit_aligned)(struct amdgpu_cmd_base  *base, uint32_t mask, uint32_t value);
 	void (*emit_repeat)(struct amdgpu_cmd_base  *base, uint32_t value, uint32_t number_of_times);
 	void (*emit_at_offset)(struct amdgpu_cmd_base  *base, uint32_t value, uint32_t offset_dwords);
 	void (*emit_buf)(struct amdgpu_cmd_base  *base, const void *ptr, uint32_t offset_bytes, uint32_t size_bytes);
 };
 
-struct amdgpu_cmd_base* get_cmd_base(void);
+struct amdgpu_cmd_base *get_cmd_base(void);
 
 void free_cmd_base(struct amdgpu_cmd_base *base);
 
diff --git a/tests/amdgpu/amd_basic.c b/tests/amdgpu/amd_basic.c
index f7d7f036f..31e67647d 100644
--- a/tests/amdgpu/amd_basic.c
+++ b/tests/amdgpu/amd_basic.c
@@ -1,26 +1,8 @@
-/* SPDX-License-Identifier: MIT
+// SPDX-License-Identifier: MIT
+/*
  * Copyright 2014 Advanced Micro Devices, Inc.
  * Copyright 2022 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Based on libdrm/tests/amdgpu/basic_tests.c
+ * Copyright 2023 Advanced Micro Devices, Inc.
  */
 
 #include "lib/amdgpu/amd_memory.h"
@@ -174,7 +156,7 @@ static void amdgpu_semaphore_test(amdgpu_device_handle device)
 	ibs_request[0].ibs = &ib_info[0];
 	ibs_request[0].resources = bo_list[0];
 	ibs_request[0].fence_info.handle = NULL;
-	r = amdgpu_cs_submit(context_handle[0], 0,&ibs_request[0], 1);
+	r = amdgpu_cs_submit(context_handle[0], 0, &ibs_request[0], 1);
 	igt_assert_eq(r, 0);
 	r = amdgpu_cs_signal_semaphore(context_handle[0], AMDGPU_HW_IP_DMA, 0, 0, sem);
 	igt_assert_eq(r, 0);
@@ -192,7 +174,7 @@ static void amdgpu_semaphore_test(amdgpu_device_handle device)
 	ibs_request[1].resources = bo_list[1];
 	ibs_request[1].fence_info.handle = NULL;
 
-	r = amdgpu_cs_submit(context_handle[0], 0,&ibs_request[1], 1);
+	r = amdgpu_cs_submit(context_handle[0], 0, &ibs_request[1], 1);
 	igt_assert_eq(r, 0);
 
 	fence_status.context = context_handle[0];
@@ -215,7 +197,7 @@ static void amdgpu_semaphore_test(amdgpu_device_handle device)
 	ibs_request[0].ibs = &ib_info[0];
 	ibs_request[0].resources = bo_list[0];
 	ibs_request[0].fence_info.handle = NULL;
-	r = amdgpu_cs_submit(context_handle[0], 0,&ibs_request[0], 1);
+	r = amdgpu_cs_submit(context_handle[0], 0, &ibs_request[0], 1);
 	igt_assert_eq(r, 0);
 	r = amdgpu_cs_signal_semaphore(context_handle[0], AMDGPU_HW_IP_GFX, 0, 0, sem);
 	igt_assert_eq(r, 0);
@@ -232,7 +214,7 @@ static void amdgpu_semaphore_test(amdgpu_device_handle device)
 	ibs_request[1].ibs = &ib_info[1];
 	ibs_request[1].resources = bo_list[1];
 	ibs_request[1].fence_info.handle = NULL;
-	r = amdgpu_cs_submit(context_handle[1], 0,&ibs_request[1], 1);
+	r = amdgpu_cs_submit(context_handle[1], 0, &ibs_request[1], 1);
 
 	igt_assert_eq(r, 0);
 
@@ -278,7 +260,8 @@ static void amdgpu_userptr_test(amdgpu_device_handle device)
 	struct amdgpu_ring_context *ring_context;
 	int r;
 
-	const struct amdgpu_ip_block_version * ip_block = get_ip_block(device, AMDGPU_HW_IP_DMA);
+	const struct amdgpu_ip_block_version *ip_block = get_ip_block(device, AMDGPU_HW_IP_DMA);
+
 	igt_assert(ip_block);
 	ring_context = calloc(1, sizeof(*ring_context));
 	igt_assert(ring_context);
@@ -295,12 +278,12 @@ static void amdgpu_userptr_test(amdgpu_device_handle device)
 	r = amdgpu_cs_ctx_create(device, &ring_context->context_handle);
 	igt_assert_eq(r, 0);
 
-	posix_memalign((void**)&ring_context->bo_cpu, sysconf(_SC_PAGE_SIZE), BUFFER_SIZE);
+	posix_memalign((void **)&ring_context->bo_cpu, sysconf(_SC_PAGE_SIZE), BUFFER_SIZE);
 	igt_assert(ring_context->bo_cpu);
-	memset((void*)ring_context->bo_cpu, 0, BUFFER_SIZE);
+	memset((void *)ring_context->bo_cpu, 0, BUFFER_SIZE);
 
 	r = amdgpu_create_bo_from_user_mem(device,
-					   (void*)ring_context->bo_cpu,
+					   (void *)ring_context->bo_cpu,
 					   BUFFER_SIZE, &ring_context->bo);
 	igt_assert_eq(r, 0);
 
@@ -352,7 +335,8 @@ amdgpu_bo_eviction_test(amdgpu_device_handle device_handle)
 
 	uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC};
 
-	const struct amdgpu_ip_block_version * ip_block = get_ip_block(device_handle, AMDGPU_HW_IP_DMA);
+	const struct amdgpu_ip_block_version *ip_block = get_ip_block(device_handle, AMDGPU_HW_IP_DMA);
+
 	igt_assert(ip_block);
 
 	ring_context = calloc(1, sizeof(*ring_context));
@@ -392,31 +376,31 @@ amdgpu_bo_eviction_test(amdgpu_device_handle device_handle)
 
 	loop1 = loop2 = 0;
 	/* run 9 circle to test all mapping combination */
-	while(loop1 < 2) {
-		while(loop2 < 2) {
+	while (loop1 < 2) {
+		while (loop2 < 2) {
 			/* allocate UC bo1for sDMA use */
 			r = amdgpu_bo_alloc_and_map(device_handle,
 						    sdma_write_length, 4096,
 						    AMDGPU_GEM_DOMAIN_GTT,
 						    gtt_flags[loop1],  &ring_context->bo,
-						    (void**)&ring_context->bo_cpu, &ring_context->bo_mc,
+						    (void **)&ring_context->bo_cpu, &ring_context->bo_mc,
 						    &ring_context->va_handle);
 			igt_assert_eq(r, 0);
 
 			/* set bo1 */
-			memset((void*)ring_context->bo_cpu, ip_block->funcs->pattern, ring_context->write_length);
+			memset((void *)ring_context->bo_cpu, ip_block->funcs->pattern, ring_context->write_length);
 
 			/* allocate UC bo2 for sDMA use */
 			r = amdgpu_bo_alloc_and_map(device_handle,
 						    sdma_write_length, 4096,
 						    AMDGPU_GEM_DOMAIN_GTT,
 						    gtt_flags[loop2], &ring_context->bo2,
-						    (void**)&ring_context->bo2_cpu, &ring_context->bo_mc2,
+						    (void **)&ring_context->bo2_cpu, &ring_context->bo_mc2,
 						    &ring_context->va_handle2);
 			igt_assert_eq(r, 0);
 
 			/* clear bo2 */
-			memset((void*)ring_context->bo2_cpu, 0, ring_context->write_length);
+			memset((void *)ring_context->bo2_cpu, 0, ring_context->write_length);
 
 			ring_context->resources[0] = ring_context->bo;
 			ring_context->resources[1] = ring_context->bo2;
@@ -474,8 +458,8 @@ amdgpu_sync_dependency_test(amdgpu_device_handle device_handle)
 	uint32_t size_bytes, code_offset, data_offset;
 	const uint32_t *shader;
 
-	struct amdgpu_cmd_base * base = get_cmd_base();
-	const struct amdgpu_ip_block_version * ip_block = get_ip_block(device_handle, AMD_IP_GFX);
+	struct amdgpu_cmd_base *base = get_cmd_base();
+	const struct amdgpu_ip_block_version *ip_block = get_ip_block(device_handle, AMD_IP_GFX);
 
 	r = amdgpu_cs_ctx_create(device_handle, &context_handle[0]);
 	igt_assert_eq(r, 0);
@@ -513,7 +497,7 @@ amdgpu_sync_dependency_test(amdgpu_device_handle device_handle)
 	base->emit(base, (ib_result_mc_address + code_offset * 4) >> 8);
 	base->emit(base, (ib_result_mc_address + code_offset * 4) >> 40);
 
-	base->emit(base,PACKET3(PKT3_SET_SH_REG, 2));
+	base->emit(base, PACKET3(PKT3_SET_SH_REG, 2));
 	base->emit(base, ip_block->funcs->get_reg_offset(COMPUTE_PGM_RSRC1));
 
 	base->emit(base, 0x002c0040);
@@ -546,7 +530,7 @@ amdgpu_sync_dependency_test(amdgpu_device_handle device_handle)
 	base->emit(base, 0x00000045);
 	base->emit_aligned(base, 7, GFX_COMPUTE_NOP);
 
-	memcpy(base->buf + code_offset , shader, size_bytes);
+	memcpy(base->buf + code_offset, shader, size_bytes);
 
 	memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info));
 	ib_info.ib_mc_address = ib_result_mc_address;
@@ -560,7 +544,7 @@ amdgpu_sync_dependency_test(amdgpu_device_handle device_handle)
 	ibs_request.resources = bo_list;
 	ibs_request.fence_info.handle = NULL;
 
-	r = amdgpu_cs_submit(context_handle[1], 0,&ibs_request, 1);
+	r = amdgpu_cs_submit(context_handle[1], 0, &ibs_request, 1);
 	igt_assert_eq(r, 0);
 	seq_no = ibs_request.seq_no;
 
@@ -593,7 +577,7 @@ amdgpu_sync_dependency_test(amdgpu_device_handle device_handle)
 	ibs_request.dependencies[0].ring = 0;
 	ibs_request.dependencies[0].fence = seq_no;
 
-	r = amdgpu_cs_submit(context_handle[0], 0,&ibs_request, 1);
+	r = amdgpu_cs_submit(context_handle[0], 0, &ibs_request, 1);
 	igt_assert_eq(r, 0);
 
 	memset(&fence_status, 0, sizeof(struct amdgpu_cs_fence));
@@ -604,7 +588,7 @@ amdgpu_sync_dependency_test(amdgpu_device_handle device_handle)
 	fence_status.fence = ibs_request.seq_no;
 
 	r = amdgpu_cs_query_fence_status(&fence_status,
-		       AMDGPU_TIMEOUT_INFINITE,0, &expired);
+		       AMDGPU_TIMEOUT_INFINITE, 0, &expired);
 	igt_assert_eq(r, 0);
 
 	/* Expect the second command to wait for shader to complete */
@@ -656,7 +640,7 @@ igt_main
 
 		r = amdgpu_query_gpu_info(device, &gpu_info);
 		igt_assert_eq(r, 0);
-		r = setup_amdgpu_ip_blocks( major, minor,  &gpu_info, device);
+		r = setup_amdgpu_ip_blocks(major, minor,  &gpu_info, device);
 		igt_assert_eq(r, 0);
 
 	}
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [igt-dev] [PATCH 2/2] tests/amdgpu: misc fixes for basic tests
  2023-08-11 21:28 [igt-dev] [PATCH 1/2] lib/amdgpu: Formatting the code vitaly.prosyak
@ 2023-08-11 21:28 ` vitaly.prosyak
  2023-08-14  8:52   ` Kamil Konieczny
  2023-08-11 22:32 ` [igt-dev] ✗ GitLab.Pipeline: warning for series starting with [1/2] lib/amdgpu: Formatting the code Patchwork
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 8+ messages in thread
From: vitaly.prosyak @ 2023-08-11 21:28 UTC (permalink / raw)
  To: igt-dev; +Cc: alexander.deucher, luben.tuikov, christian.koenig

From: Vitaly Prosyak <vitaly.prosyak@amd.com>

1. Some ASICs may not have GFX IP. For such ASIC the test
   would be skipped and the reason would be printed.
   Added  function is_rings_available and use IGT dynamic
   features.
2. In functions amdgpu_command_submission_const_fill_helper
   and amdgpu_command_submission_copy_linear_helper were
   missing an outer FOR loop for iterating of each ring.

   v2
    - Split formatting code into separate patch (Kamil)

Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Cc: Luben Tuikov <luben.tuikov@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian Koenig <christian.koenig@amd.com>
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Acked-by: Christian Koenig <christian.koenig@amd.com>
---
 lib/amdgpu/amd_command_submission.c |  98 +++++++++++++++------------
 lib/amdgpu/amd_ip_blocks.c          |  23 +++++--
 lib/amdgpu/amd_ip_blocks.h          |  10 ++-
 tests/amdgpu/amd_basic.c            | 101 ++++++++++++++++++++++------
 4 files changed, 163 insertions(+), 69 deletions(-)

diff --git a/lib/amdgpu/amd_command_submission.c b/lib/amdgpu/amd_command_submission.c
index dbf68d4d0..02cf9357b 100644
--- a/lib/amdgpu/amd_command_submission.c
+++ b/lib/amdgpu/amd_command_submission.c
@@ -2,6 +2,7 @@
 /*
  * Copyright 2014 Advanced Micro Devices, Inc.
  * Copyright 2022 Advanced Micro Devices, Inc.
+ * Copyright 2023 Advanced Micro Devices, Inc.
  */
 
 #include "lib/amdgpu/amd_memory.h"
@@ -123,6 +124,7 @@ void amdgpu_command_submission_write_linear_helper(amdgpu_device_handle device,
 
 	for (ring_id = 0; (1 << ring_id) & ring_context->hw_ip_info.available_rings; ring_id++) {
 		loop = 0;
+		ring_context->ring_id = ring_id;
 		while (loop < 2) {
 			/* allocate UC bo for sDMA use */
 			r = amdgpu_bo_alloc_and_map(device,
@@ -197,7 +199,7 @@ void amdgpu_command_submission_const_fill_helper(amdgpu_device_handle device,
 	const int pm4_dw = 256;
 
 	struct amdgpu_ring_context *ring_context;
-	int r, loop;
+	int r, loop, ring_id;
 
 	uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC};
 
@@ -208,38 +210,42 @@ void amdgpu_command_submission_const_fill_helper(amdgpu_device_handle device,
 	ring_context->pm4_size = pm4_dw;
 	ring_context->res_cnt = 1;
 	igt_assert(ring_context->pm4);
+	r = amdgpu_query_hw_ip_info(device, ip_block->type, 0, &ring_context->hw_ip_info);
+	igt_assert_eq(r, 0);
 
 	r = amdgpu_cs_ctx_create(device, &ring_context->context_handle);
 	igt_assert_eq(r, 0);
-
-	/* prepare resource */
-	loop = 0;
-	while (loop < 2) {
-		/* allocate UC bo for sDMA use */
-		r = amdgpu_bo_alloc_and_map(device,
+	for (ring_id = 0; (1 << ring_id) & ring_context->hw_ip_info.available_rings; ring_id++) {
+		/* prepare resource */
+		loop = 0;
+		ring_context->ring_id = ring_id;
+		while (loop < 2) {
+			/* allocate UC bo for sDMA use */
+			r = amdgpu_bo_alloc_and_map(device,
 					    ring_context->write_length, 4096,
 					    AMDGPU_GEM_DOMAIN_GTT,
 					    gtt_flags[loop], &ring_context->bo, (void **)&ring_context->bo_cpu,
 					    &ring_context->bo_mc, &ring_context->va_handle);
-		igt_assert_eq(r, 0);
+			igt_assert_eq(r, 0);
 
-		/* clear bo */
-		memset((void *)ring_context->bo_cpu, 0, ring_context->write_length);
+			/* clear bo */
+			memset((void *)ring_context->bo_cpu, 0, ring_context->write_length);
 
-		ring_context->resources[0] = ring_context->bo;
+			ring_context->resources[0] = ring_context->bo;
 
-		/* fulfill PM4: test DMA const fill */
-		ip_block->funcs->const_fill(ip_block->funcs, ring_context, &ring_context->pm4_dw);
+			/* fulfill PM4: test DMA const fill */
+			ip_block->funcs->const_fill(ip_block->funcs, ring_context, &ring_context->pm4_dw);
 
-		amdgpu_test_exec_cs_helper(device, ip_block->type, ring_context);
+			amdgpu_test_exec_cs_helper(device, ip_block->type, ring_context);
 
-		/* verify if SDMA test result meets with expected */
-		r = ip_block->funcs->compare(ip_block->funcs, ring_context, 4);
-		igt_assert_eq(r, 0);
+			/* verify if SDMA test result meets with expected */
+			r = ip_block->funcs->compare(ip_block->funcs, ring_context, 4);
+			igt_assert_eq(r, 0);
 
-		amdgpu_bo_unmap_and_free(ring_context->bo, ring_context->va_handle, ring_context->bo_mc,
+			amdgpu_bo_unmap_and_free(ring_context->bo, ring_context->va_handle, ring_context->bo_mc,
 					 ring_context->write_length);
-		loop++;
+			loop++;
+		}
 	}
 	/* clean resources */
 	free(ring_context->pm4);
@@ -262,7 +268,7 @@ void amdgpu_command_submission_copy_linear_helper(amdgpu_device_handle device,
 	const int pm4_dw = 256;
 
 	struct amdgpu_ring_context *ring_context;
-	int r, loop1, loop2;
+	int r, loop1, loop2, ring_id;
 
 	uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC};
 
@@ -274,58 +280,62 @@ void amdgpu_command_submission_copy_linear_helper(amdgpu_device_handle device,
 	ring_context->pm4_size = pm4_dw;
 	ring_context->res_cnt = 2;
 	igt_assert(ring_context->pm4);
+	r = amdgpu_query_hw_ip_info(device, ip_block->type, 0, &ring_context->hw_ip_info);
+	igt_assert_eq(r, 0);
 
 
 	r = amdgpu_cs_ctx_create(device, &ring_context->context_handle);
 	igt_assert_eq(r, 0);
 
-
-	loop1 = loop2 = 0;
+	for (ring_id = 0; (1 << ring_id) & ring_context->hw_ip_info.available_rings; ring_id++) {
+		loop1 = loop2 = 0;
+		ring_context->ring_id = ring_id;
 	/* run 9 circle to test all mapping combination */
-	while (loop1 < 2) {
-		while (loop2 < 2) {
+		while (loop1 < 2) {
+			while (loop2 < 2) {
 			/* allocate UC bo1for sDMA use */
-			r = amdgpu_bo_alloc_and_map(device,
+				r = amdgpu_bo_alloc_and_map(device,
 						    ring_context->write_length, 4096,
 						    AMDGPU_GEM_DOMAIN_GTT,
 						    gtt_flags[loop1], &ring_context->bo,
 						    (void **)&ring_context->bo_cpu, &ring_context->bo_mc,
 						    &ring_context->va_handle);
-			igt_assert_eq(r, 0);
+				igt_assert_eq(r, 0);
 
-			/* set bo_cpu */
-			memset((void *)ring_context->bo_cpu, ip_block->funcs->pattern, ring_context->write_length);
+				/* set bo_cpu */
+				memset((void *)ring_context->bo_cpu, ip_block->funcs->pattern, ring_context->write_length);
 
-			/* allocate UC bo2 for sDMA use */
-			r = amdgpu_bo_alloc_and_map(device,
+				/* allocate UC bo2 for sDMA use */
+				r = amdgpu_bo_alloc_and_map(device,
 						    ring_context->write_length, 4096,
 						    AMDGPU_GEM_DOMAIN_GTT,
 						    gtt_flags[loop2], &ring_context->bo2,
 						    (void **)&ring_context->bo2_cpu, &ring_context->bo_mc2,
 						    &ring_context->va_handle2);
-			igt_assert_eq(r, 0);
+				igt_assert_eq(r, 0);
 
-			/* clear bo2_cpu */
-			memset((void *)ring_context->bo2_cpu, 0, ring_context->write_length);
+				/* clear bo2_cpu */
+				memset((void *)ring_context->bo2_cpu, 0, ring_context->write_length);
 
-			ring_context->resources[0] = ring_context->bo;
-			ring_context->resources[1] = ring_context->bo2;
+				ring_context->resources[0] = ring_context->bo;
+				ring_context->resources[1] = ring_context->bo2;
 
-			ip_block->funcs->copy_linear(ip_block->funcs, ring_context, &ring_context->pm4_dw);
+				ip_block->funcs->copy_linear(ip_block->funcs, ring_context, &ring_context->pm4_dw);
 
-			amdgpu_test_exec_cs_helper(device, ip_block->type, ring_context);
+				amdgpu_test_exec_cs_helper(device, ip_block->type, ring_context);
 
-			/* verify if SDMA test result meets with expected */
-			r = ip_block->funcs->compare_pattern(ip_block->funcs, ring_context, 4);
-			igt_assert_eq(r, 0);
+				/* verify if SDMA test result meets with expected */
+				r = ip_block->funcs->compare_pattern(ip_block->funcs, ring_context, 4);
+				igt_assert_eq(r, 0);
 
-			amdgpu_bo_unmap_and_free(ring_context->bo, ring_context->va_handle, ring_context->bo_mc,
+				amdgpu_bo_unmap_and_free(ring_context->bo, ring_context->va_handle, ring_context->bo_mc,
 						 ring_context->write_length);
-			amdgpu_bo_unmap_and_free(ring_context->bo2, ring_context->va_handle2, ring_context->bo_mc2,
+				amdgpu_bo_unmap_and_free(ring_context->bo2, ring_context->va_handle2, ring_context->bo_mc2,
 						 ring_context->write_length);
-			loop2++;
+				loop2++;
+			}
+			loop1++;
 		}
-		loop1++;
 	}
 	/* clean resources */
 	free(ring_context->pm4);
diff --git a/lib/amdgpu/amd_ip_blocks.c b/lib/amdgpu/amd_ip_blocks.c
index b07695714..67bba8e84 100644
--- a/lib/amdgpu/amd_ip_blocks.c
+++ b/lib/amdgpu/amd_ip_blocks.c
@@ -152,10 +152,11 @@ sdma_ring_copy_linear(const struct amdgpu_ip_funcs *func,
  * - copy_linear
  */
 
+
 static int
 gfx_ring_write_linear(const struct amdgpu_ip_funcs *func,
-				const struct amdgpu_ring_context *ring_context,
-				uint32_t *pm4_dw)
+		      const struct amdgpu_ring_context *ring_context,
+		      uint32_t *pm4_dw)
 {
 	uint32_t i, j;
 
@@ -198,8 +199,8 @@ gfx_ring_write_linear(const struct amdgpu_ip_funcs *func,
 
 static int
 gfx_ring_const_fill(const struct amdgpu_ip_funcs *func,
-				const struct amdgpu_ring_context *ring_context,
-				uint32_t *pm4_dw)
+		     const struct amdgpu_ring_context *ring_context,
+		     uint32_t *pm4_dw)
 {
 	uint32_t i;
 
@@ -744,3 +745,17 @@ amdgpu_open_devices(bool open_render_node, int  max_cards_supported, int drm_amd
 	drmFreeDevices(devices, drm_count);
 	return amd_index;
 }
+
+bool
+is_rings_available(amdgpu_device_handle device_handle, uint32_t mask,
+		enum amd_ip_block_type type)
+{
+	struct drm_amdgpu_info_hw_ip hw_ip_info = {0};
+	int r;
+	bool ret = false;
+
+	r = amdgpu_query_hw_ip_info(device_handle, type, 0, &hw_ip_info);
+	igt_assert_eq(r, 0);
+	ret = hw_ip_info.available_rings & mask;
+	return ret;
+}
diff --git a/lib/amdgpu/amd_ip_blocks.h b/lib/amdgpu/amd_ip_blocks.h
index ad7ffd4e6..dcba8a380 100644
--- a/lib/amdgpu/amd_ip_blocks.h
+++ b/lib/amdgpu/amd_ip_blocks.h
@@ -12,11 +12,15 @@
 #define MAX_CARDS_SUPPORTED 4
 
 enum amd_ip_block_type {
-	AMD_IP_GFX,
+	AMD_IP_GFX = 0,
 	AMD_IP_COMPUTE,
 	AMD_IP_DMA,
 	AMD_IP_UVD,
 	AMD_IP_VCE,
+	AMD_IP_UVD_ENC,
+	AMD_IP_VCN_DEC,
+	AMD_IP_VCN_ENC,
+	AMD_IP_VCN_JPEG,
 	AMD_IP_MAX,
 };
 
@@ -123,4 +127,8 @@ void free_cmd_base(struct amdgpu_cmd_base *base);
 int
 amdgpu_open_devices(bool open_render_node, int max_cards_supported, int drm_amdgpu_fds[]);
 
+bool
+is_rings_available(amdgpu_device_handle device_handle, uint32_t mask,
+		enum amd_ip_block_type type);
+
 #endif
diff --git a/tests/amdgpu/amd_basic.c b/tests/amdgpu/amd_basic.c
index 31e67647d..6e54a0e4f 100644
--- a/tests/amdgpu/amd_basic.c
+++ b/tests/amdgpu/amd_basic.c
@@ -619,12 +619,23 @@ amdgpu_gfx_dispatch_test_compute(amdgpu_device_handle device_handle)
 	amdgpu_gfx_dispatch_test(device_handle, AMDGPU_HW_IP_COMPUTE);
 }
 
+static void
+amdgpu_asic_rings_caps(amdgpu_device_handle device_handle, bool *arr, uint32_t mask)
+{
+	enum amd_ip_block_type ip;
+	int i;
+
+	for (i = 0, ip = AMD_IP_GFX; ip < AMD_IP_MAX; ip++)
+		arr[i++] = is_rings_available(device_handle, mask, ip);
+}
+
 igt_main
 {
 	amdgpu_device_handle device;
 	struct amdgpu_gpu_info gpu_info = {0};
 	int fd = -1;
 	int r;
+	bool arr_cap[AMD_IP_MAX] = {0};
 
 	igt_fixture {
 		uint32_t major, minor;
@@ -642,41 +653,91 @@ igt_main
 		igt_assert_eq(r, 0);
 		r = setup_amdgpu_ip_blocks(major, minor,  &gpu_info, device);
 		igt_assert_eq(r, 0);
+		amdgpu_asic_rings_caps(device, arr_cap, 1);
 
 	}
-
 	igt_subtest("memory-alloc")
 		amdgpu_memory_alloc(device);
 
-	igt_subtest("userptr")
-		amdgpu_userptr_test(device);
+	igt_describe("userptr");
+	igt_subtest_with_dynamic("userptr-with-IP-DMA") {
+		if (arr_cap[AMD_IP_DMA]) {
+			igt_dynamic_f("userptr")
+			amdgpu_userptr_test(device);
+		}
+	}
 
-	igt_subtest("cs-gfx")
-		amdgpu_command_submission_gfx(device);
+	igt_describe("cs-gfx");
+	igt_subtest_with_dynamic("cs-gfx-with-IP-GFX") {
+		if (arr_cap[AMD_IP_GFX]) {
+			igt_dynamic_f("cs-gfx")
+			amdgpu_command_submission_gfx(device);
+		}
+	}
 
-	igt_subtest("cs-compute")
-		amdgpu_command_submission_compute(device);
+	igt_describe("cs-compute");
+	igt_subtest_with_dynamic("cs-compute-with-IP-COMPUTE") {
+		if (arr_cap[AMD_IP_COMPUTE]) {
+			igt_dynamic_f("cs-compute")
+			amdgpu_command_submission_compute(device);
+		}
+	}
 
-	igt_subtest("cs-multi-fence")
+	igt_describe("cs-multi-fence");
+	igt_subtest_with_dynamic("cs-multi-fence-with-IP-GFX") {
+		if (arr_cap[AMD_IP_GFX]) {
+			igt_dynamic_f("cs-multi-fence")
 		amdgpu_command_submission_multi_fence(device);
+		}
+	}
 
-	igt_subtest("cs-sdma")
-		amdgpu_command_submission_sdma(device);
+	igt_describe("cs-sdma");
+	igt_subtest_with_dynamic("cs-sdma-with-IP-DMA") {
+		if (arr_cap[AMD_IP_DMA]) {
+			igt_dynamic_f("cs-sdma")
+			amdgpu_command_submission_sdma(device);
+		}
+	}
 
-	igt_subtest("semaphore")
-		amdgpu_semaphore_test(device);
+	igt_describe("semaphore");
+	igt_subtest_with_dynamic("semaphore-with-IP-GFX-and-IP-DMA") {
+		if (arr_cap[AMD_IP_GFX] && arr_cap[AMD_IP_DMA]) {
+			igt_dynamic_f("semaphore")
+			amdgpu_semaphore_test(device);
+		}
+	}
 
-	igt_subtest("eviction_test")
-		amdgpu_bo_eviction_test(device);
+	igt_describe("eviction-test");
+	igt_subtest_with_dynamic("eviction-test-with-IP-DMA") {
+		if (arr_cap[AMD_IP_DMA]) {
+			igt_dynamic_f("eviction_test")
+			amdgpu_bo_eviction_test(device);
+		}
+	}
 
-	igt_subtest("sync_dependency_test")
-		amdgpu_sync_dependency_test(device);
+	igt_describe("sync-dependency-test");
+	igt_subtest_with_dynamic("sync-dependency-test-with-IP-GFX") {
+		if (arr_cap[AMD_IP_GFX]) {
+			igt_dynamic_f("sync-dependency-test")
+			amdgpu_sync_dependency_test(device);
+		}
+	}
 
-	igt_subtest("amdgpu_gfx_dispatch_test_compute")
-	amdgpu_gfx_dispatch_test_compute(device);
+	igt_describe("amdgpu-dispatch-test-compute");
+	igt_subtest_with_dynamic("amdgpu-dispatch-test-compute-with-IP-COMPUTE") {
+		if (arr_cap[AMD_IP_COMPUTE]) {
+			igt_dynamic_f("amdgpu-dispatch-test-compute")
+			amdgpu_gfx_dispatch_test_compute(device);
+		}
+	}
 
-	igt_subtest("amdgpu_gfx_dispatch_test_gfx")
-	amdgpu_gfx_dispatch_test_gfx(device);
+	igt_describe("amdgpu-dispatch-test-gfx");
+	igt_subtest_with_dynamic("amdgpu-dispatch-test-gfx-with-IP-GFX") {
+		if (arr_cap[AMD_IP_GFX]) {
+			igt_dynamic_f("amdgpu-dispatch-test-gfx")
+			amdgpu_gfx_dispatch_test_gfx(device);
+		}
+	}
 
 	igt_fixture {
 		amdgpu_device_deinitialize(device);
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [igt-dev] ✗ GitLab.Pipeline: warning for series starting with [1/2] lib/amdgpu: Formatting the code
  2023-08-11 21:28 [igt-dev] [PATCH 1/2] lib/amdgpu: Formatting the code vitaly.prosyak
  2023-08-11 21:28 ` [igt-dev] [PATCH 2/2] tests/amdgpu: misc fixes for basic tests vitaly.prosyak
@ 2023-08-11 22:32 ` Patchwork
  2023-08-11 23:02 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2023-08-11 22:32 UTC (permalink / raw)
  To: vitaly.prosyak; +Cc: igt-dev

== Series Details ==

Series: series starting with [1/2] lib/amdgpu: Formatting the code
URL   : https://patchwork.freedesktop.org/series/122367/
State : warning

== Summary ==

Pipeline status: FAILED.

see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/958971 for the overview.

containers:igt has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/47213994):
  8fc4972e879f7b7fa806b9de992b7d2704b20442f5f2c65551f62a8fdba4cde6
  STEP 3: COPY .gitlab-ci/docker-help.sh /usr/local/bin/docker-help.sh
  c4ae8024542846ee5bdf1657bfd53eef2157a8a75facf9d775a83c0ccd48253d
  STEP 4: ENV PATH="/opt/igt/bin:${PATH}"
  8372ea099d54a8163ad70edb6627dfc0bb2fc6932771d0811b90de7d5b7f48e3
  STEP 5: ENV LD_LIBRARY_PATH="/opt/igt/lib:/opt/igt/lib64:${LD_LIBRARY_PATH}"
  dff6de6c477b43785c003e04b15a98c198085c4acc3fba789e4f62343eb055ca
  STEP 6: ENV IGT_TEST_ROOT="/opt/igt/libexec/igt-gpu-tools"
  8bc4008d6d052dbf84c166cb7001af97268d46c6b2dd7b41dfbc363367005298
  STEP 7: CMD docker-help.sh
  STEP 8: COMMIT registry.freedesktop.org/gfx-ci/igt-ci-tags/igt:commit-0ab5253a4f02e6a5d9479e66508299943b3e9b12
  42972fdf84d6a428d92e310dad4de3adaa2847c5d3649469822276061532dbf3
  Getting image source signatures
  Error: Error copying image to the remote destination: Error trying to reuse blob sha256:3504a8337d3b7eaabfd338d6a971d02441d28ebef8bd81f730d87f936ed58079 at destination: failed to read from destination repository gfx-ci/igt-ci-tags/igt: 500 (Internal Server Error)
  section_end:1691793077:step_script
  section_start:1691793077:cleanup_file_variables
  Cleaning up project directory and file based variables
  section_end:1691793078:cleanup_file_variables
  ERROR: Job failed: exit code 1

== Logs ==

For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/958971

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [1/2] lib/amdgpu: Formatting the code
  2023-08-11 21:28 [igt-dev] [PATCH 1/2] lib/amdgpu: Formatting the code vitaly.prosyak
  2023-08-11 21:28 ` [igt-dev] [PATCH 2/2] tests/amdgpu: misc fixes for basic tests vitaly.prosyak
  2023-08-11 22:32 ` [igt-dev] ✗ GitLab.Pipeline: warning for series starting with [1/2] lib/amdgpu: Formatting the code Patchwork
@ 2023-08-11 23:02 ` Patchwork
  2023-08-11 23:03 ` [igt-dev] ○ CI.xeBAT: info " Patchwork
  2023-08-13  4:54 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2023-08-11 23:02 UTC (permalink / raw)
  To: vitaly.prosyak; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 6991 bytes --]

== Series Details ==

Series: series starting with [1/2] lib/amdgpu: Formatting the code
URL   : https://patchwork.freedesktop.org/series/122367/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13511 -> IGTPW_9581
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/index.html

Participating hosts (42 -> 42)
------------------------------

  Additional (1): fi-kbl-soraka 
  Missing    (1): fi-snb-2520m 

Known issues
------------

  Here are the changes found in IGTPW_9581 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@dmabuf@all-tests@dma_fence:
    - bat-atsm-1:         [PASS][1] -> [DMESG-FAIL][2] ([i915#8189])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/bat-atsm-1/igt@dmabuf@all-tests@dma_fence.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/bat-atsm-1/igt@dmabuf@all-tests@dma_fence.html

  * igt@dmabuf@all-tests@sanitycheck:
    - bat-atsm-1:         [PASS][3] -> [ABORT][4] ([i915#7699])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/bat-atsm-1/igt@dmabuf@all-tests@sanitycheck.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/bat-atsm-1/igt@dmabuf@all-tests@sanitycheck.html

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html

  * igt@i915_selftest@live@gt_pm:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][7] ([i915#1886] / [i915#7913])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@migrate:
    - bat-atsm-1:         [PASS][8] -> [DMESG-FAIL][9] ([i915#7699] / [i915#7913])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/bat-atsm-1/igt@i915_selftest@live@migrate.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/bat-atsm-1/igt@i915_selftest@live@migrate.html

  * igt@i915_selftest@live@slpc:
    - bat-rpls-1:         [PASS][10] -> [DMESG-WARN][11] ([i915#6367])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/bat-rpls-1/igt@i915_selftest@live@slpc.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/bat-rpls-1/igt@i915_selftest@live@slpc.html

  * igt@kms_chamelium_hpd@common-hpd-after-suspend:
    - bat-rpls-2:         NOTRUN -> [SKIP][12] ([i915#7828])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/bat-rpls-2/igt@kms_chamelium_hpd@common-hpd-after-suspend.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][13] ([fdo#109271]) +16 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/fi-kbl-soraka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - bat-rpls-2:         NOTRUN -> [SKIP][14] ([i915#1845])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/bat-rpls-2/igt@kms_pipe_crc_basic@suspend-read-crc.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-apl-guc:         [DMESG-FAIL][15] ([i915#5334]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@migrate:
    - bat-dg2-11:         [DMESG-WARN][17] ([i915#7699]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/bat-dg2-11/igt@i915_selftest@live@migrate.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/bat-dg2-11/igt@i915_selftest@live@migrate.html

  * igt@i915_selftest@live@requests:
    - bat-mtlp-6:         [DMESG-FAIL][19] ([i915#8497]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/bat-mtlp-6/igt@i915_selftest@live@requests.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/bat-mtlp-6/igt@i915_selftest@live@requests.html

  * igt@i915_selftest@live@reset:
    - bat-rpls-2:         [ABORT][21] ([i915#4983] / [i915#7461] / [i915#7913] / [i915#8347]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/bat-rpls-2/igt@i915_selftest@live@reset.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/bat-rpls-2/igt@i915_selftest@live@reset.html

  * igt@i915_selftest@live@slpc:
    - bat-mtlp-8:         [DMESG-WARN][23] ([i915#6367]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/bat-mtlp-8/igt@i915_selftest@live@slpc.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/bat-mtlp-8/igt@i915_selftest@live@slpc.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/486
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
  [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#8189]: https://gitlab.freedesktop.org/drm/intel/issues/8189
  [i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
  [i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497
  [i915#8879]: https://gitlab.freedesktop.org/drm/intel/issues/8879


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7433 -> IGTPW_9581

  CI-20190529: 20190529
  CI_DRM_13511: 5d873909a143a3c5a272bc27699f3cd220b06d80 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_9581: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/index.html
  IGT_7433: 74c7773be9eb4b8fc0828aad13d5c775289314ef @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/index.html

[-- Attachment #2: Type: text/html, Size: 8220 bytes --]

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [igt-dev] ○ CI.xeBAT: info for series starting with [1/2] lib/amdgpu: Formatting the code
  2023-08-11 21:28 [igt-dev] [PATCH 1/2] lib/amdgpu: Formatting the code vitaly.prosyak
                   ` (2 preceding siblings ...)
  2023-08-11 23:02 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-08-11 23:03 ` Patchwork
  2023-08-13  4:54 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2023-08-11 23:03 UTC (permalink / raw)
  To: vitaly.prosyak; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 346 bytes --]

== Series Details ==

Series: series starting with [1/2] lib/amdgpu: Formatting the code
URL   : https://patchwork.freedesktop.org/series/122367/
State : info

== Summary ==

Participating hosts:
bat-atsm-2
bat-dg2-oem2
bat-adlp-7
Missing hosts results[0]:
Results: [IGTPW_9581](https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_9581/index.html)



[-- Attachment #2: Type: text/html, Size: 856 bytes --]

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [1/2] lib/amdgpu: Formatting the code
  2023-08-11 21:28 [igt-dev] [PATCH 1/2] lib/amdgpu: Formatting the code vitaly.prosyak
                   ` (3 preceding siblings ...)
  2023-08-11 23:03 ` [igt-dev] ○ CI.xeBAT: info " Patchwork
@ 2023-08-13  4:54 ` Patchwork
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2023-08-13  4:54 UTC (permalink / raw)
  To: vitaly.prosyak; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 99942 bytes --]

== Series Details ==

Series: series starting with [1/2] lib/amdgpu: Formatting the code
URL   : https://patchwork.freedesktop.org/series/122367/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13511_full -> IGTPW_9581_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_9581_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_9581_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/index.html

Participating hosts (9 -> 9)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_9581_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_schedule@preempt-engines@ccs0:
    - shard-mtlp:         [PASS][1] -> [FAIL][2] +4 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-6/igt@gem_exec_schedule@preempt-engines@ccs0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-4/igt@gem_exec_schedule@preempt-engines@ccs0.html

  * igt@gem_spin_batch@user-each:
    - shard-mtlp:         [PASS][3] -> [DMESG-FAIL][4] +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-6/igt@gem_spin_batch@user-each.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-4/igt@gem_spin_batch@user-each.html

  
Known issues
------------

  Here are the changes found in IGTPW_9581_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@object-reloc-keep-cache:
    - shard-dg2:          NOTRUN -> [SKIP][5] ([i915#8411])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-2/igt@api_intel_bb@object-reloc-keep-cache.html
    - shard-rkl:          NOTRUN -> [SKIP][6] ([i915#8411]) +1 similar issue
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-4/igt@api_intel_bb@object-reloc-keep-cache.html

  * igt@drm_fdinfo@busy-check-all@ccs0:
    - shard-mtlp:         NOTRUN -> [SKIP][7] ([i915#8414]) +6 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-5/igt@drm_fdinfo@busy-check-all@ccs0.html

  * igt@drm_fdinfo@most-busy-check-all@rcs0:
    - shard-rkl:          [PASS][8] -> [FAIL][9] ([i915#7742])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-rkl-1/igt@drm_fdinfo@most-busy-check-all@rcs0.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-7/igt@drm_fdinfo@most-busy-check-all@rcs0.html

  * igt@drm_fdinfo@virtual-busy-hang:
    - shard-dg2:          NOTRUN -> [SKIP][10] ([i915#8414]) +1 similar issue
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@drm_fdinfo@virtual-busy-hang.html

  * igt@feature_discovery@display-3x:
    - shard-mtlp:         NOTRUN -> [SKIP][11] ([i915#1839])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-2/igt@feature_discovery@display-3x.html
    - shard-tglu:         NOTRUN -> [SKIP][12] ([i915#1839])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-7/igt@feature_discovery@display-3x.html

  * igt@feature_discovery@display-4x:
    - shard-dg2:          NOTRUN -> [SKIP][13] ([i915#1839])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@feature_discovery@display-4x.html

  * igt@gem_basic@multigpu-create-close:
    - shard-rkl:          NOTRUN -> [SKIP][14] ([i915#7697])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@gem_basic@multigpu-create-close.html
    - shard-tglu:         NOTRUN -> [SKIP][15] ([i915#7697])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-9/igt@gem_basic@multigpu-create-close.html
    - shard-dg2:          NOTRUN -> [SKIP][16] ([i915#7697])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@gem_basic@multigpu-create-close.html

  * igt@gem_ccs@block-multicopy-inplace:
    - shard-dg1:          NOTRUN -> [SKIP][17] ([i915#3555] / [i915#5325])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-13/igt@gem_ccs@block-multicopy-inplace.html
    - shard-tglu:         NOTRUN -> [SKIP][18] ([i915#3555] / [i915#5325])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-8/igt@gem_ccs@block-multicopy-inplace.html

  * igt@gem_ctx_freq@sysfs@gt0:
    - shard-dg2:          [PASS][19] -> [FAIL][20] ([i915#6786])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-6/igt@gem_ctx_freq@sysfs@gt0.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-6/igt@gem_ctx_freq@sysfs@gt0.html

  * igt@gem_ctx_persistence@engines-hang@vcs0:
    - shard-mtlp:         [PASS][21] -> [FAIL][22] ([i915#2410]) +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-4/igt@gem_ctx_persistence@engines-hang@vcs0.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-2/igt@gem_ctx_persistence@engines-hang@vcs0.html

  * igt@gem_ctx_persistence@heartbeat-stop:
    - shard-dg2:          NOTRUN -> [SKIP][23] ([i915#8555])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@gem_ctx_persistence@heartbeat-stop.html

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@ccs0:
    - shard-dg2:          NOTRUN -> [SKIP][24] ([i915#5882]) +9 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-6/igt@gem_ctx_persistence@saturated-hostile-nopreempt@ccs0.html

  * igt@gem_ctx_persistence@saturated-hostile@vecs0:
    - shard-mtlp:         [PASS][25] -> [FAIL][26] ([i915#7816]) +2 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-5/igt@gem_ctx_persistence@saturated-hostile@vecs0.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-2/igt@gem_ctx_persistence@saturated-hostile@vecs0.html

  * igt@gem_eio@kms:
    - shard-dg2:          [PASS][27] -> [FAIL][28] ([i915#5784])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-11/igt@gem_eio@kms.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@gem_eio@kms.html

  * igt@gem_exec_balancer@bonded-dual:
    - shard-dg2:          NOTRUN -> [SKIP][29] ([i915#4771])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@gem_exec_balancer@bonded-dual.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-glk:          [PASS][30] -> [FAIL][31] ([i915#2842])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-glk5/igt@gem_exec_fair@basic-none-share@rcs0.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-glk8/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-rkl:          [PASS][32] -> [FAIL][33] ([i915#2842])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-rkl-4/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-1/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-sync:
    - shard-dg2:          NOTRUN -> [SKIP][34] ([i915#3539])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@gem_exec_fair@basic-sync.html

  * igt@gem_exec_fence@submit3:
    - shard-dg1:          NOTRUN -> [SKIP][35] ([i915#4812])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-14/igt@gem_exec_fence@submit3.html

  * igt@gem_exec_flush@basic-uc-ro-default:
    - shard-dg1:          NOTRUN -> [SKIP][36] ([i915#3539] / [i915#4852])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-19/igt@gem_exec_flush@basic-uc-ro-default.html

  * igt@gem_exec_flush@basic-wb-ro-before-default:
    - shard-dg2:          NOTRUN -> [SKIP][37] ([i915#3539] / [i915#4852]) +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-6/igt@gem_exec_flush@basic-wb-ro-before-default.html

  * igt@gem_exec_reloc@basic-active:
    - shard-rkl:          NOTRUN -> [SKIP][38] ([i915#3281]) +4 similar issues
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@gem_exec_reloc@basic-active.html

  * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
    - shard-dg2:          NOTRUN -> [SKIP][39] ([i915#3281]) +9 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-2/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html

  * igt@gem_exec_schedule@preempt-queue-contexts:
    - shard-mtlp:         NOTRUN -> [SKIP][40] ([i915#4812])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-3/igt@gem_exec_schedule@preempt-queue-contexts.html

  * igt@gem_exec_schedule@semaphore-power:
    - shard-rkl:          NOTRUN -> [SKIP][41] ([i915#7276])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@gem_exec_schedule@semaphore-power.html
    - shard-dg2:          NOTRUN -> [SKIP][42] ([i915#4537] / [i915#4812])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-1/igt@gem_exec_schedule@semaphore-power.html

  * igt@gem_exec_schedule@u-semaphore-noskip:
    - shard-dg2:          [PASS][43] -> [SKIP][44] ([i915#2575]) +30 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-10/igt@gem_exec_schedule@u-semaphore-noskip.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@gem_exec_schedule@u-semaphore-noskip.html

  * igt@gem_exec_suspend@basic-s4-devices@lmem0:
    - shard-dg2:          NOTRUN -> [ABORT][45] ([i915#7975] / [i915#8213])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-2/igt@gem_exec_suspend@basic-s4-devices@lmem0.html

  * igt@gem_fence_thrash@bo-write-verify-x:
    - shard-dg2:          NOTRUN -> [SKIP][46] ([i915#4860]) +1 similar issue
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@gem_fence_thrash@bo-write-verify-x.html

  * igt@gem_lmem_evict@dontneed-evict-race:
    - shard-mtlp:         NOTRUN -> [SKIP][47] ([i915#4613])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-1/igt@gem_lmem_evict@dontneed-evict-race.html

  * igt@gem_lmem_swapping@heavy-multi:
    - shard-tglu:         NOTRUN -> [SKIP][48] ([i915#4613])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-10/igt@gem_lmem_swapping@heavy-multi.html

  * igt@gem_lmem_swapping@massive:
    - shard-dg2:          NOTRUN -> [SKIP][49] ([i915#5775])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@gem_lmem_swapping@massive.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg2:          [PASS][50] -> [DMESG-WARN][51] ([i915#4936] / [i915#5493])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-10/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-1/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gem_media_fill@media-fill:
    - shard-dg2:          NOTRUN -> [SKIP][52] ([i915#8289])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@gem_media_fill@media-fill.html

  * igt@gem_mmap@basic:
    - shard-mtlp:         NOTRUN -> [SKIP][53] ([i915#4083]) +1 similar issue
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-1/igt@gem_mmap@basic.html

  * igt@gem_mmap@short-mmap:
    - shard-dg1:          NOTRUN -> [SKIP][54] ([i915#4083])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-13/igt@gem_mmap@short-mmap.html

  * igt@gem_mmap_gtt@cpuset-medium-copy-odd:
    - shard-mtlp:         NOTRUN -> [SKIP][55] ([i915#4077])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-1/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html

  * igt@gem_mmap_gtt@zero-extend:
    - shard-dg1:          NOTRUN -> [SKIP][56] ([i915#4077]) +3 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-19/igt@gem_mmap_gtt@zero-extend.html

  * igt@gem_mmap_wc@write-read-distinct:
    - shard-dg2:          NOTRUN -> [SKIP][57] ([i915#4083]) +3 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-1/igt@gem_mmap_wc@write-read-distinct.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-display:
    - shard-dg1:          NOTRUN -> [SKIP][58] ([i915#3282]) +1 similar issue
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-17/igt@gem_partial_pwrite_pread@writes-after-reads-display.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-snoop:
    - shard-rkl:          NOTRUN -> [SKIP][59] ([i915#3282])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-4/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html

  * igt@gem_pwrite@basic-random:
    - shard-mtlp:         NOTRUN -> [SKIP][60] ([i915#3282]) +1 similar issue
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-5/igt@gem_pwrite@basic-random.html

  * igt@gem_pxp@create-regular-context-1:
    - shard-mtlp:         NOTRUN -> [SKIP][61] ([i915#4270])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-4/igt@gem_pxp@create-regular-context-1.html
    - shard-tglu:         NOTRUN -> [SKIP][62] ([i915#4270])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-4/igt@gem_pxp@create-regular-context-1.html

  * igt@gem_pxp@protected-encrypted-src-copy-not-readible:
    - shard-rkl:          NOTRUN -> [SKIP][63] ([i915#4270])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html

  * igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
    - shard-dg2:          NOTRUN -> [SKIP][64] ([i915#4270]) +2 similar issues
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-1/igt@gem_pxp@verify-pxp-key-change-after-suspend-resume.html

  * igt@gem_pxp@verify-pxp-stale-buf-optout-execution:
    - shard-dg1:          NOTRUN -> [SKIP][65] ([i915#4270])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-13/igt@gem_pxp@verify-pxp-stale-buf-optout-execution.html

  * igt@gem_readwrite@beyond-eob:
    - shard-dg2:          NOTRUN -> [SKIP][66] ([i915#3282]) +5 similar issues
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@gem_readwrite@beyond-eob.html

  * igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
    - shard-snb:          NOTRUN -> [SKIP][67] ([fdo#109271]) +126 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-snb2/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html

  * igt@gem_render_copy@y-tiled-to-vebox-linear:
    - shard-dg2:          NOTRUN -> [SKIP][68] ([i915#5190]) +15 similar issues
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@gem_render_copy@y-tiled-to-vebox-linear.html

  * igt@gem_softpin@evict-snoop:
    - shard-dg1:          NOTRUN -> [SKIP][69] ([i915#4885])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-14/igt@gem_softpin@evict-snoop.html
    - shard-tglu:         NOTRUN -> [SKIP][70] ([fdo#109312])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-10/igt@gem_softpin@evict-snoop.html

  * igt@gem_tiled_pread_pwrite:
    - shard-dg2:          NOTRUN -> [SKIP][71] ([i915#4079]) +1 similar issue
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-6/igt@gem_tiled_pread_pwrite.html
    - shard-mtlp:         NOTRUN -> [SKIP][72] ([i915#4079])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-1/igt@gem_tiled_pread_pwrite.html

  * igt@gem_userptr_blits@coherency-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][73] ([i915#3297]) +2 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@gem_userptr_blits@coherency-unsync.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][74] ([i915#2575]) +45 similar issues
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gem_userptr_blits@map-fixed-invalidate:
    - shard-dg2:          NOTRUN -> [SKIP][75] ([i915#3297] / [i915#4880])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@gem_userptr_blits@map-fixed-invalidate.html

  * igt@gem_userptr_blits@readonly-pwrite-unsync:
    - shard-rkl:          NOTRUN -> [SKIP][76] ([i915#3297])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-7/igt@gem_userptr_blits@readonly-pwrite-unsync.html
    - shard-tglu:         NOTRUN -> [SKIP][77] ([i915#3297]) +1 similar issue
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-10/igt@gem_userptr_blits@readonly-pwrite-unsync.html

  * igt@gem_userptr_blits@readonly-unsync:
    - shard-dg1:          NOTRUN -> [SKIP][78] ([i915#3297])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-18/igt@gem_userptr_blits@readonly-unsync.html

  * igt@gen3_render_tiledx_blits:
    - shard-mtlp:         NOTRUN -> [SKIP][79] ([fdo#109289])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-3/igt@gen3_render_tiledx_blits.html

  * igt@gen7_exec_parse@batch-without-end:
    - shard-dg2:          NOTRUN -> [SKIP][80] ([fdo#109289]) +3 similar issues
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-6/igt@gen7_exec_parse@batch-without-end.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-glk:          [PASS][81] -> [ABORT][82] ([i915#5566])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-glk3/igt@gen9_exec_parse@allowed-single.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-glk6/igt@gen9_exec_parse@allowed-single.html

  * igt@gen9_exec_parse@basic-rejected-ctx-param:
    - shard-tglu:         NOTRUN -> [SKIP][83] ([i915#2527] / [i915#2856]) +2 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-2/igt@gen9_exec_parse@basic-rejected-ctx-param.html

  * igt@gen9_exec_parse@batch-invalid-length:
    - shard-dg1:          NOTRUN -> [SKIP][84] ([i915#2527])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-19/igt@gen9_exec_parse@batch-invalid-length.html

  * igt@gen9_exec_parse@bb-start-far:
    - shard-dg2:          NOTRUN -> [SKIP][85] ([i915#2856]) +3 similar issues
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@gen9_exec_parse@bb-start-far.html
    - shard-rkl:          NOTRUN -> [SKIP][86] ([i915#2527]) +1 similar issue
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-7/igt@gen9_exec_parse@bb-start-far.html

  * igt@i915_pipe_stress@stress-xrgb8888-ytiled:
    - shard-mtlp:         NOTRUN -> [SKIP][87] ([i915#8436])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-7/igt@i915_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@i915_pm_backlight@bad-brightness:
    - shard-dg1:          NOTRUN -> [SKIP][88] ([i915#5354] / [i915#7561])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-13/igt@i915_pm_backlight@bad-brightness.html
    - shard-tglu:         NOTRUN -> [SKIP][89] ([i915#7561])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-4/igt@i915_pm_backlight@bad-brightness.html

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
    - shard-dg2:          NOTRUN -> [SKIP][90] ([i915#1937])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-2/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html

  * igt@i915_pm_lpsp@screens-disabled:
    - shard-tglu:         NOTRUN -> [SKIP][91] ([i915#1902])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-10/igt@i915_pm_lpsp@screens-disabled.html

  * igt@i915_pm_rc6_residency@rc6-idle@vecs0:
    - shard-dg1:          [PASS][92] -> [FAIL][93] ([i915#3591]) +1 similar issue
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg1-16/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html

  * igt@i915_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-dg2:          [PASS][94] -> [SKIP][95] ([i915#5174]) +1 similar issue
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-2/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
    - shard-rkl:          [PASS][96] -> [SKIP][97] ([i915#1397]) +1 similar issue
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-rkl-2/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-7/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@i915_pm_rpm@dpms-non-lpsp:
    - shard-dg1:          [PASS][98] -> [SKIP][99] ([i915#1397]) +2 similar issues
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg1-17/igt@i915_pm_rpm@dpms-non-lpsp.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-19/igt@i915_pm_rpm@dpms-non-lpsp.html
    - shard-dg2:          NOTRUN -> [SKIP][100] ([i915#1397])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@i915_pm_rpm@dpms-non-lpsp.html

  * igt@i915_pm_rpm@fences-dpms:
    - shard-dg2:          NOTRUN -> [SKIP][101] ([i915#4077]) +12 similar issues
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@i915_pm_rpm@fences-dpms.html

  * igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-dg2:          [PASS][102] -> [SKIP][103] ([i915#1397]) +2 similar issues
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-1/igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@i915_pm_rps@basic-api:
    - shard-mtlp:         NOTRUN -> [SKIP][104] ([i915#6621])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-5/igt@i915_pm_rps@basic-api.html

  * igt@i915_pm_rps@thresholds-park@gt0:
    - shard-dg1:          NOTRUN -> [SKIP][105] ([i915#8925])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-17/igt@i915_pm_rps@thresholds-park@gt0.html

  * igt@i915_selftest@live@slpc:
    - shard-mtlp:         [PASS][106] -> [DMESG-WARN][107] ([i915#6367])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-1/igt@i915_selftest@live@slpc.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-6/igt@i915_selftest@live@slpc.html

  * igt@kms_addfb_basic@bo-too-small-due-to-tiling:
    - shard-mtlp:         NOTRUN -> [SKIP][108] ([i915#4212])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-1/igt@kms_addfb_basic@bo-too-small-due-to-tiling.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-dp-2-4-mc_ccs:
    - shard-dg2:          NOTRUN -> [SKIP][109] ([i915#8502] / [i915#8709]) +11 similar issues
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-dp-2-4-mc_ccs.html

  * igt@kms_async_flips@crc@pipe-b-dp-2:
    - shard-dg2:          NOTRUN -> [FAIL][110] ([i915#8247]) +3 similar issues
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@kms_async_flips@crc@pipe-b-dp-2.html

  * igt@kms_async_flips@crc@pipe-b-hdmi-a-1:
    - shard-snb:          NOTRUN -> [FAIL][111] ([i915#8247]) +1 similar issue
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-snb1/igt@kms_async_flips@crc@pipe-b-hdmi-a-1.html

  * igt@kms_async_flips@crc@pipe-c-hdmi-a-1:
    - shard-dg1:          NOTRUN -> [FAIL][112] ([i915#8247]) +3 similar issues
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-19/igt@kms_async_flips@crc@pipe-c-hdmi-a-1.html

  * igt@kms_async_flips@invalid-async-flip:
    - shard-dg2:          NOTRUN -> [SKIP][113] ([i915#6228])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_async_flips@invalid-async-flip.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-dg2:          NOTRUN -> [SKIP][114] ([i915#1769] / [i915#3555])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing@pipe-a-hdmi-a-1:
    - shard-glk:          [PASS][115] -> [DMESG-WARN][116] ([i915#1982])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-glk4/igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing@pipe-a-hdmi-a-1.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-glk9/igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing@pipe-a-hdmi-a-1.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-mtlp:         [PASS][117] -> [FAIL][118] ([i915#3743]) +2 similar issues
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-5/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-dg1:          NOTRUN -> [SKIP][119] ([i915#4538] / [i915#5286])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-18/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-tglu:         NOTRUN -> [SKIP][120] ([fdo#111615] / [i915#5286]) +2 similar issues
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-rkl:          NOTRUN -> [SKIP][121] ([i915#5286]) +3 similar issues
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-dg2:          NOTRUN -> [SKIP][122] ([fdo#111614]) +2 similar issues
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-mtlp:         NOTRUN -> [FAIL][123] ([i915#3743])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-90:
    - shard-dg1:          NOTRUN -> [SKIP][124] ([i915#3638])
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-16/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
    - shard-tglu:         NOTRUN -> [SKIP][125] ([fdo#111614])
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-5/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
    - shard-rkl:          NOTRUN -> [SKIP][126] ([fdo#110723])
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-1/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
    - shard-tglu:         NOTRUN -> [SKIP][127] ([fdo#111615]) +1 similar issue
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-7/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
    - shard-dg2:          NOTRUN -> [SKIP][128] ([i915#4538] / [i915#5190]) +3 similar issues
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-1/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-dg1:          NOTRUN -> [SKIP][129] ([fdo#111615])
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-13/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-mtlp:         NOTRUN -> [SKIP][130] ([fdo#111615])
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-7/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_joiner@basic:
    - shard-rkl:          NOTRUN -> [SKIP][131] ([i915#2705])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@kms_big_joiner@basic.html

  * igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_mc_ccs:
    - shard-tglu:         NOTRUN -> [SKIP][132] ([i915#3689] / [i915#3886] / [i915#5354] / [i915#6095])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-5/igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][133] ([i915#6095]) +5 similar issues
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-4/igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo-4_tiled_mtl_rc_ccs_cc:
    - shard-dg1:          NOTRUN -> [SKIP][134] ([i915#5354] / [i915#6095]) +6 similar issues
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-16/igt@kms_ccs@pipe-a-ccs-on-another-bo-4_tiled_mtl_rc_ccs_cc.html

  * igt@kms_ccs@pipe-a-crc-primary-basic-yf_tiled_ccs:
    - shard-dg2:          NOTRUN -> [SKIP][135] ([i915#3689] / [i915#5354]) +17 similar issues
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@kms_ccs@pipe-a-crc-primary-basic-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
    - shard-mtlp:         NOTRUN -> [SKIP][136] ([i915#3886] / [i915#6095])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-3/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_mtl_rc_ccs_cc:
    - shard-rkl:          NOTRUN -> [SKIP][137] ([i915#5354] / [i915#6095]) +8 similar issues
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-1/igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_mtl_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs:
    - shard-dg1:          NOTRUN -> [SKIP][138] ([i915#3689] / [i915#3886] / [i915#5354] / [i915#6095])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-18/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-basic-4_tiled_dg2_mc_ccs:
    - shard-tglu:         NOTRUN -> [SKIP][139] ([i915#5354] / [i915#6095]) +15 similar issues
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-4/igt@kms_ccs@pipe-b-crc-primary-basic-4_tiled_dg2_mc_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-basic-4_tiled_mtl_mc_ccs:
    - shard-dg2:          NOTRUN -> [SKIP][140] ([i915#5354]) +36 similar issues
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@kms_ccs@pipe-b-crc-primary-basic-4_tiled_mtl_mc_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_mc_ccs:
    - shard-dg2:          NOTRUN -> [SKIP][141] ([i915#3689] / [i915#3886] / [i915#5354]) +10 similar issues
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-1/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-crc-primary-basic-4_tiled_mtl_rc_ccs:
    - shard-rkl:          NOTRUN -> [SKIP][142] ([i915#5354]) +11 similar issues
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-4/igt@kms_ccs@pipe-c-crc-primary-basic-4_tiled_mtl_rc_ccs.html

  * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs_cc:
    - shard-dg1:          NOTRUN -> [SKIP][143] ([i915#3689] / [i915#5354] / [i915#6095]) +1 similar issue
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-15/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs_cc.html
    - shard-tglu:         NOTRUN -> [SKIP][144] ([i915#3689] / [i915#5354] / [i915#6095]) +3 similar issues
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-7/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs_cc.html

  * igt@kms_ccs@pipe-d-missing-ccs-buffer-yf_tiled_ccs:
    - shard-tglu:         NOTRUN -> [SKIP][145] ([fdo#111615] / [i915#3689] / [i915#5354] / [i915#6095]) +2 similar issues
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-6/igt@kms_ccs@pipe-d-missing-ccs-buffer-yf_tiled_ccs.html

  * igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][146] ([i915#4087] / [i915#7213]) +3 similar issues
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-1/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3.html

  * igt@kms_cdclk@plane-scaling@pipe-c-dp-2:
    - shard-dg2:          NOTRUN -> [SKIP][147] ([i915#4087]) +3 similar issues
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@kms_cdclk@plane-scaling@pipe-c-dp-2.html

  * igt@kms_chamelium_color@ctm-green-to-red:
    - shard-dg2:          NOTRUN -> [SKIP][148] ([fdo#111827]) +2 similar issues
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-6/igt@kms_chamelium_color@ctm-green-to-red.html
    - shard-rkl:          NOTRUN -> [SKIP][149] ([fdo#111827])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@kms_chamelium_color@ctm-green-to-red.html

  * igt@kms_chamelium_color@ctm-limited-range:
    - shard-tglu:         NOTRUN -> [SKIP][150] ([fdo#111827]) +2 similar issues
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-7/igt@kms_chamelium_color@ctm-limited-range.html
    - shard-dg1:          NOTRUN -> [SKIP][151] ([fdo#111827])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-15/igt@kms_chamelium_color@ctm-limited-range.html

  * igt@kms_chamelium_edid@vga-edid-read:
    - shard-rkl:          NOTRUN -> [SKIP][152] ([i915#7828]) +1 similar issue
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-1/igt@kms_chamelium_edid@vga-edid-read.html

  * igt@kms_chamelium_frames@dp-frame-dump:
    - shard-tglu:         NOTRUN -> [SKIP][153] ([i915#7828]) +2 similar issues
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-7/igt@kms_chamelium_frames@dp-frame-dump.html

  * igt@kms_chamelium_frames@hdmi-cmp-planar-formats:
    - shard-dg2:          NOTRUN -> [SKIP][154] ([i915#7828]) +5 similar issues
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_chamelium_frames@hdmi-cmp-planar-formats.html

  * igt@kms_chamelium_hpd@dp-hpd-storm-disable:
    - shard-dg1:          NOTRUN -> [SKIP][155] ([i915#7828])
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-13/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html

  * igt@kms_color@deep-color:
    - shard-rkl:          NOTRUN -> [SKIP][156] ([i915#3555]) +4 similar issues
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-1/igt@kms_color@deep-color.html

  * igt@kms_content_protection@atomic@pipe-a-dp-2:
    - shard-dg2:          NOTRUN -> [TIMEOUT][157] ([i915#7173])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@kms_content_protection@atomic@pipe-a-dp-2.html

  * igt@kms_content_protection@legacy:
    - shard-tglu:         NOTRUN -> [SKIP][158] ([i915#6944] / [i915#7116] / [i915#7118]) +1 similar issue
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-5/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@srm:
    - shard-dg2:          NOTRUN -> [SKIP][159] ([i915#7118]) +1 similar issue
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-6/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@type1:
    - shard-rkl:          NOTRUN -> [SKIP][160] ([i915#7118]) +1 similar issue
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@cursor-offscreen-32x10:
    - shard-dg1:          NOTRUN -> [SKIP][161] ([i915#3555])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-18/igt@kms_cursor_crc@cursor-offscreen-32x10.html
    - shard-tglu:         NOTRUN -> [SKIP][162] ([i915#3555]) +3 similar issues
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-10/igt@kms_cursor_crc@cursor-offscreen-32x10.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-dg2:          NOTRUN -> [SKIP][163] ([i915#3359]) +1 similar issue
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-2/igt@kms_cursor_crc@cursor-onscreen-512x170.html
    - shard-rkl:          NOTRUN -> [SKIP][164] ([fdo#109279] / [i915#3359])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@kms_cursor_crc@cursor-onscreen-512x170.html
    - shard-tglu:         NOTRUN -> [SKIP][165] ([fdo#109279] / [i915#3359])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-4/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-128x42@pipe-a-edp-1:
    - shard-mtlp:         [PASS][166] -> [DMESG-WARN][167] ([i915#2017])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-6/igt@kms_cursor_crc@cursor-rapid-movement-128x42@pipe-a-edp-1.html
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-3/igt@kms_cursor_crc@cursor-rapid-movement-128x42@pipe-a-edp-1.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x512:
    - shard-dg1:          NOTRUN -> [SKIP][168] ([i915#3359])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-17/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions:
    - shard-dg2:          NOTRUN -> [SKIP][169] ([fdo#109274] / [i915#5354]) +4 similar issues
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
    - shard-mtlp:         NOTRUN -> [SKIP][170] ([i915#3546]) +2 similar issues
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-6/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
    - shard-dg2:          NOTRUN -> [SKIP][171] ([fdo#109274] / [fdo#111767] / [i915#5354])
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-apl:          [PASS][172] -> [FAIL][173] ([i915#2346])
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-dg2:          NOTRUN -> [SKIP][174] ([i915#4103] / [i915#4213])
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][175] ([i915#3804])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-4/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-dg2:          NOTRUN -> [SKIP][176] ([i915#3555] / [i915#3840])
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_dsc@dsc-with-output-formats.html
    - shard-rkl:          NOTRUN -> [SKIP][177] ([i915#3555] / [i915#3840])
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-1/igt@kms_dsc@dsc-with-output-formats.html
    - shard-tglu:         NOTRUN -> [SKIP][178] ([i915#3555] / [i915#3840]) +1 similar issue
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-7/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-dg2:          [PASS][179] -> [FAIL][180] ([fdo#103375]) +1 similar issue
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-1/igt@kms_fbcon_fbt@fbc-suspend.html
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][181] ([i915#3469])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-7/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_fence_pin_leak:
    - shard-dg2:          NOTRUN -> [SKIP][182] ([i915#4881])
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-2/igt@kms_fence_pin_leak.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-snb:          NOTRUN -> [SKIP][183] ([fdo#109271] / [fdo#111767])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-snb2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@2x-flip-vs-fences:
    - shard-dg2:          NOTRUN -> [SKIP][184] ([i915#8381]) +1 similar issue
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-6/igt@kms_flip@2x-flip-vs-fences.html

  * igt@kms_flip@2x-flip-vs-panning:
    - shard-rkl:          NOTRUN -> [SKIP][185] ([fdo#111825]) +5 similar issues
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-3/igt@kms_flip@2x-flip-vs-panning.html

  * igt@kms_flip@2x-modeset-vs-vblank-race-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][186] ([fdo#109274]) +5 similar issues
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-tglu:         NOTRUN -> [SKIP][187] ([fdo#109274] / [i915#3637]) +6 similar issues
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-7/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
    - shard-dg1:          NOTRUN -> [SKIP][188] ([i915#2587] / [i915#2672])
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-16/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html
    - shard-tglu:         NOTRUN -> [SKIP][189] ([i915#2587] / [i915#2672])
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-4/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][190] ([i915#2672])
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][191] ([i915#2672])
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
    - shard-dg2:          NOTRUN -> [SKIP][192] ([fdo#109315] / [i915#5190])
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][193] ([i915#2672]) +3 similar issues
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-dg2:          [PASS][194] -> [SKIP][195] ([fdo#109315]) +3 similar issues
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-10/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][196] ([i915#8708]) +19 similar issues
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt:
    - shard-rkl:          NOTRUN -> [SKIP][197] ([fdo#111825] / [i915#1825]) +19 similar issues
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
    - shard-mtlp:         NOTRUN -> [SKIP][198] ([i915#1825]) +7 similar issues
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu:
    - shard-dg2:          [PASS][199] -> [FAIL][200] ([i915#6880])
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu.html
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-4:
    - shard-dg1:          NOTRUN -> [SKIP][201] ([i915#5439])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-14/igt@kms_frontbuffer_tracking@fbc-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][202] ([fdo#109315]) +2 similar issues
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move:
    - shard-rkl:          NOTRUN -> [SKIP][203] ([i915#3023]) +10 similar issues
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt:
    - shard-dg1:          NOTRUN -> [SKIP][204] ([i915#3458]) +3 similar issues
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-13/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][205] ([i915#8708]) +1 similar issue
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-cpu:
    - shard-tglu:         NOTRUN -> [SKIP][206] ([fdo#110189]) +12 similar issues
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-10/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][207] ([i915#8708]) +2 similar issues
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][208] ([i915#3458]) +16 similar issues
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-render:
    - shard-dg1:          NOTRUN -> [SKIP][209] ([fdo#111825]) +5 similar issues
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-19/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-tglu:         NOTRUN -> [SKIP][210] ([fdo#109280]) +20 similar issues
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-dg2:          NOTRUN -> [SKIP][211] ([i915#4816])
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes:
    - shard-rkl:          NOTRUN -> [SKIP][212] ([fdo#109289]) +1 similar issue
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-4/igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-1:
    - shard-apl:          NOTRUN -> [ABORT][213] ([i915#180])
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-apl3/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-1.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [FAIL][214] ([i915#8292])
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-7/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-b-hdmi-a-1:
    - shard-dg1:          NOTRUN -> [SKIP][215] ([i915#5176]) +19 similar issues
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-19/igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-b-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-a-dp-4:
    - shard-dg2:          NOTRUN -> [SKIP][216] ([i915#5176]) +7 similar issues
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-a-dp-4.html

  * igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-5@pipe-b-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][217] ([i915#5176]) +3 similar issues
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-6/igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-5@pipe-b-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-scaler-with-rotation-unity-scaling@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][218] ([i915#5176]) +1 similar issue
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-7/igt@kms_plane_scaling@plane-scaler-with-rotation-unity-scaling@pipe-b-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][219] ([i915#5235]) +3 similar issues
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-8/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][220] ([i915#5235]) +23 similar issues
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][221] ([i915#5235]) +19 similar issues
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-17/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4.html

  * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
    - shard-tglu:         NOTRUN -> [SKIP][222] ([i915#658])
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-3/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-dg2:          NOTRUN -> [SKIP][223] ([i915#658])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@kms_psr2_su@frontbuffer-xrgb8888.html
    - shard-rkl:          NOTRUN -> [SKIP][224] ([fdo#111068] / [i915#658]) +1 similar issue
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-7/igt@kms_psr2_su@frontbuffer-xrgb8888.html
    - shard-tglu:         NOTRUN -> [SKIP][225] ([fdo#109642] / [fdo#111068] / [i915#658])
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-10/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-dg1:          NOTRUN -> [SKIP][226] ([fdo#111068] / [i915#658])
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-14/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@cursor_mmap_cpu:
    - shard-dg1:          NOTRUN -> [SKIP][227] ([i915#1072]) +1 similar issue
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-14/igt@kms_psr@cursor_mmap_cpu.html

  * igt@kms_psr@psr2_primary_blt:
    - shard-dg2:          NOTRUN -> [SKIP][228] ([i915#1072]) +6 similar issues
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_psr@psr2_primary_blt.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-dg2:          NOTRUN -> [SKIP][229] ([i915#5461] / [i915#658])
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-tglu:         NOTRUN -> [SKIP][230] ([i915#5289])
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-10/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-dg2:          NOTRUN -> [SKIP][231] ([i915#4235] / [i915#5190])
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-10/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-rkl:          NOTRUN -> [SKIP][232] ([fdo#111615] / [i915#5289])
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
    - shard-mtlp:         NOTRUN -> [SKIP][233] ([i915#4235])
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_selftest@drm_cmdline:
    - shard-rkl:          NOTRUN -> [SKIP][234] ([i915#8661])
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@kms_selftest@drm_cmdline.html
    - shard-tglu:         NOTRUN -> [SKIP][235] ([i915#8661])
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-9/igt@kms_selftest@drm_cmdline.html

  * igt@kms_selftest@drm_plane:
    - shard-dg2:          NOTRUN -> [SKIP][236] ([i915#8661]) +2 similar issues
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@kms_selftest@drm_plane.html

  * igt@kms_setmode@invalid-clone-single-crtc:
    - shard-dg2:          NOTRUN -> [SKIP][237] ([i915#3555]) +3 similar issues
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-6/igt@kms_setmode@invalid-clone-single-crtc.html
    - shard-rkl:          NOTRUN -> [SKIP][238] ([i915#3555] / [i915#4098])
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-1/igt@kms_setmode@invalid-clone-single-crtc.html

  * igt@kms_sysfs_edid_timing:
    - shard-dg2:          [PASS][239] -> [FAIL][240] ([IGT#2])
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-12/igt@kms_sysfs_edid_timing.html
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-6/igt@kms_sysfs_edid_timing.html

  * igt@kms_universal_plane@universal-plane-pipe-d-functional:
    - shard-rkl:          NOTRUN -> [SKIP][241] ([i915#4070] / [i915#533] / [i915#6768]) +1 similar issue
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-4/igt@kms_universal_plane@universal-plane-pipe-d-functional.html

  * igt@kms_vblank@pipe-c-query-forked:
    - shard-rkl:          NOTRUN -> [SKIP][242] ([i915#4070] / [i915#6768]) +1 similar issue
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-1/igt@kms_vblank@pipe-c-query-forked.html

  * igt@kms_writeback@writeback-check-output:
    - shard-tglu:         NOTRUN -> [SKIP][243] ([i915#2437])
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-5/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-rkl:          NOTRUN -> [SKIP][244] ([i915#2437])
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-4/igt@kms_writeback@writeback-fb-id.html

  * igt@kms_writeback@writeback-pixel-formats:
    - shard-mtlp:         NOTRUN -> [SKIP][245] ([i915#2437]) +1 similar issue
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-8/igt@kms_writeback@writeback-pixel-formats.html

  * igt@perf@gen8-unprivileged-single-ctx-counters:
    - shard-dg1:          NOTRUN -> [SKIP][246] ([fdo#109289])
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-19/igt@perf@gen8-unprivileged-single-ctx-counters.html
    - shard-tglu:         NOTRUN -> [SKIP][247] ([fdo#109289]) +1 similar issue
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-3/igt@perf@gen8-unprivileged-single-ctx-counters.html

  * igt@perf@rc6-disable:
    - shard-dg2:          [PASS][248] -> [SKIP][249] ([i915#5608]) +1 similar issue
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-1/igt@perf@rc6-disable.html
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@perf@rc6-disable.html

  * igt@perf_pmu@semaphore-busy:
    - shard-dg2:          NOTRUN -> [SKIP][250] ([i915#5608]) +3 similar issues
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@perf_pmu@semaphore-busy.html

  * igt@prime_vgem@basic-fence-mmap:
    - shard-dg2:          NOTRUN -> [SKIP][251] ([i915#3708] / [i915#4077])
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-2/igt@prime_vgem@basic-fence-mmap.html

  * igt@sysfs_heartbeat_interval@mixed@ccs0:
    - shard-mtlp:         [PASS][252] -> [ABORT][253] ([i915#8552])
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-2/igt@sysfs_heartbeat_interval@mixed@ccs0.html
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-7/igt@sysfs_heartbeat_interval@mixed@ccs0.html

  * igt@sysfs_heartbeat_interval@mixed@vecs0:
    - shard-mtlp:         [PASS][254] -> [FAIL][255] ([i915#1731])
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-2/igt@sysfs_heartbeat_interval@mixed@vecs0.html
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-7/igt@sysfs_heartbeat_interval@mixed@vecs0.html

  * igt@sysfs_preempt_timeout@timeout@vecs0:
    - shard-mtlp:         [PASS][256] -> [ABORT][257] ([i915#8521] / [i915#8865])
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-6/igt@sysfs_preempt_timeout@timeout@vecs0.html
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-8/igt@sysfs_preempt_timeout@timeout@vecs0.html

  * igt@sysfs_timeslice_duration@timeout@vecs0:
    - shard-mtlp:         [PASS][258] -> [TIMEOUT][259] ([i915#6950])
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-3/igt@sysfs_timeslice_duration@timeout@vecs0.html
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-2/igt@sysfs_timeslice_duration@timeout@vecs0.html

  * igt@tools_test@sysfs_l3_parity:
    - shard-dg2:          NOTRUN -> [SKIP][260] ([i915#4818])
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-2/igt@tools_test@sysfs_l3_parity.html

  * igt@v3d/v3d_perfmon@get-values-invalid-perfmon:
    - shard-tglu:         NOTRUN -> [SKIP][261] ([fdo#109315] / [i915#2575]) +6 similar issues
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-6/igt@v3d/v3d_perfmon@get-values-invalid-perfmon.html

  * igt@v3d/v3d_submit_cl@bad-multisync-in-sync:
    - shard-rkl:          NOTRUN -> [SKIP][262] ([fdo#109315]) +4 similar issues
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@v3d/v3d_submit_cl@bad-multisync-in-sync.html

  * igt@v3d/v3d_submit_cl@single-out-sync:
    - shard-mtlp:         NOTRUN -> [SKIP][263] ([i915#2575]) +1 similar issue
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-4/igt@v3d/v3d_submit_cl@single-out-sync.html

  * igt@v3d/v3d_submit_csd@single-out-sync:
    - shard-dg1:          NOTRUN -> [SKIP][264] ([i915#2575]) +2 similar issues
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-19/igt@v3d/v3d_submit_csd@single-out-sync.html

  * igt@vc4/vc4_perfmon@destroy-invalid-perfmon:
    - shard-dg1:          NOTRUN -> [SKIP][265] ([i915#7711])
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-17/igt@vc4/vc4_perfmon@destroy-invalid-perfmon.html

  * igt@vc4/vc4_purgeable_bo@access-purged-bo-mem:
    - shard-mtlp:         NOTRUN -> [SKIP][266] ([i915#7711]) +2 similar issues
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-1/igt@vc4/vc4_purgeable_bo@access-purged-bo-mem.html

  * igt@vc4/vc4_tiling@get-bad-handle:
    - shard-dg2:          NOTRUN -> [SKIP][267] ([i915#7711]) +6 similar issues
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-6/igt@vc4/vc4_tiling@get-bad-handle.html

  * igt@vc4/vc4_wait_bo@used-bo-0ns:
    - shard-tglu:         NOTRUN -> [SKIP][268] ([i915#2575]) +4 similar issues
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-10/igt@vc4/vc4_wait_bo@used-bo-0ns.html

  * igt@vc4/vc4_wait_seqno@bad-seqno-1ns:
    - shard-rkl:          NOTRUN -> [SKIP][269] ([i915#7711]) +3 similar issues
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-3/igt@vc4/vc4_wait_seqno@bad-seqno-1ns.html

  
#### Possible fixes ####

  * igt@gem_ctx_persistence@hostile:
    - shard-mtlp:         [FAIL][270] ([i915#2410]) -> [PASS][271]
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-6/igt@gem_ctx_persistence@hostile.html
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-4/igt@gem_ctx_persistence@hostile.html

  * igt@gem_exec_capture@pi@vcs0:
    - shard-mtlp:         [FAIL][272] ([i915#4475]) -> [PASS][273]
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-2/igt@gem_exec_capture@pi@vcs0.html
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-3/igt@gem_exec_capture@pi@vcs0.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-rkl:          [FAIL][274] ([i915#2846]) -> [PASS][275]
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-rkl-2/igt@gem_exec_fair@basic-deadline.html
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-apl:          [FAIL][276] ([i915#2842]) -> [PASS][277]
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-apl2/igt@gem_exec_fair@basic-none-solo@rcs0.html
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-apl6/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [FAIL][278] ([i915#2842]) -> [PASS][279]
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-glk3/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-glk5/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-rkl:          [FAIL][280] ([i915#2842]) -> [PASS][281] +1 similar issue
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-rkl-3/igt@gem_exec_fair@basic-pace@rcs0.html
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_suspend@basic-s4-devices@smem:
    - shard-tglu:         [ABORT][282] ([i915#7975] / [i915#8213]) -> [PASS][283]
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-tglu-10/igt@gem_exec_suspend@basic-s4-devices@smem.html
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-7/igt@gem_exec_suspend@basic-s4-devices@smem.html

  * igt@i915_hangman@engine-engine-error@vcs0:
    - shard-mtlp:         [FAIL][284] ([i915#7069]) -> [PASS][285]
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-4/igt@i915_hangman@engine-engine-error@vcs0.html
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-6/igt@i915_hangman@engine-engine-error@vcs0.html

  * igt@i915_module_load@reload:
    - shard-snb:          [ABORT][286] ([i915#4528]) -> [PASS][287]
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-snb5/igt@i915_module_load@reload.html
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-snb2/igt@i915_module_load@reload.html

  * igt@i915_pipe_stress@stress-xrgb8888-untiled:
    - shard-mtlp:         [FAIL][288] ([i915#8691]) -> [PASS][289]
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-5/igt@i915_pipe_stress@stress-xrgb8888-untiled.html
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-3/igt@i915_pipe_stress@stress-xrgb8888-untiled.html

  * igt@i915_pm_freq_api@freq-basic-api@gt0:
    - shard-mtlp:         [FAIL][290] ([i915#8670]) -> [PASS][291]
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-7/igt@i915_pm_freq_api@freq-basic-api@gt0.html
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-3/igt@i915_pm_freq_api@freq-basic-api@gt0.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-mtlp:         [SKIP][292] ([i915#8403]) -> [PASS][293]
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-5/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-5/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@i915_pm_rpm@dpms-lpsp:
    - shard-dg2:          [SKIP][294] ([i915#1397]) -> [PASS][295]
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-11/igt@i915_pm_rpm@dpms-lpsp.html
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@i915_pm_rpm@dpms-lpsp.html

  * igt@i915_pm_rpm@modeset-non-lpsp-stress:
    - shard-rkl:          [SKIP][296] ([i915#1397]) -> [PASS][297] +1 similar issue
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-rkl-7/igt@i915_pm_rpm@modeset-non-lpsp-stress.html
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@i915_pm_rpm@modeset-non-lpsp-stress.html

  * igt@i915_selftest@live@gt_mocs:
    - shard-mtlp:         [DMESG-FAIL][298] ([i915#7059]) -> [PASS][299]
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-1/igt@i915_selftest@live@gt_mocs.html
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-6/igt@i915_selftest@live@gt_mocs.html

  * igt@i915_suspend@basic-s3-without-i915:
    - shard-rkl:          [FAIL][300] ([fdo#103375]) -> [PASS][301]
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-rkl-7/igt@i915_suspend@basic-s3-without-i915.html
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-rkl-2/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-mtlp:         [FAIL][302] ([i915#3743]) -> [PASS][303] +1 similar issue
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_cursor_crc@cursor-onscreen-64x64@pipe-a-edp-1:
    - shard-mtlp:         [DMESG-WARN][304] ([i915#1982]) -> [PASS][305]
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-5/igt@kms_cursor_crc@cursor-onscreen-64x64@pipe-a-edp-1.html
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-4/igt@kms_cursor_crc@cursor-onscreen-64x64@pipe-a-edp-1.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-glk:          [FAIL][306] ([i915#2346]) -> [PASS][307]
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_flip_tiling@flip-change-tiling@edp-1-pipe-b-4-rc_ccs-cc-to-4-rc_ccs-cc:
    - shard-mtlp:         [FAIL][308] -> [PASS][309] +2 similar issues
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-2/igt@kms_flip_tiling@flip-change-tiling@edp-1-pipe-b-4-rc_ccs-cc-to-4-rc_ccs-cc.html
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-4/igt@kms_flip_tiling@flip-change-tiling@edp-1-pipe-b-4-rc_ccs-cc-to-4-rc_ccs-cc.html

  * igt@kms_flip_tiling@flip-change-tiling@edp-1-pipe-b-linear-to-4:
    - shard-mtlp:         [FAIL][310] ([i915#9056]) -> [PASS][311] +2 similar issues
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-2/igt@kms_flip_tiling@flip-change-tiling@edp-1-pipe-b-linear-to-4.html
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-4/igt@kms_flip_tiling@flip-change-tiling@edp-1-pipe-b-linear-to-4.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
    - shard-dg2:          [FAIL][312] ([i915#6880]) -> [PASS][313] +1 similar issue
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-10/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html

  * igt@kms_plane@pixel-format-source-clamping@pipe-b-planes:
    - shard-mtlp:         [FAIL][314] ([i915#1623]) -> [PASS][315]
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-5/igt@kms_plane@pixel-format-source-clamping@pipe-b-planes.html
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-3/igt@kms_plane@pixel-format-source-clamping@pipe-b-planes.html

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
    - shard-tglu:         [ABORT][316] ([i915#5122] / [i915#8213]) -> [PASS][317]
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-tglu-6/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-tglu-5/igt@kms_vblank@pipe-c-ts-continuation-suspend.html

  * igt@perf@non-zero-reason@0-rcs0:
    - shard-dg2:          [FAIL][318] ([i915#7484]) -> [PASS][319]
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-11/igt@perf@non-zero-reason@0-rcs0.html
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@perf@non-zero-reason@0-rcs0.html

  * igt@perf_pmu@all-busy-idle-check-all:
    - shard-dg2:          [FAIL][320] ([i915#5234]) -> [PASS][321]
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-1/igt@perf_pmu@all-busy-idle-check-all.html
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-12/igt@perf_pmu@all-busy-idle-check-all.html
    - shard-dg1:          [FAIL][322] ([i915#5234]) -> [PASS][323]
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg1-19/igt@perf_pmu@all-busy-idle-check-all.html
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-16/igt@perf_pmu@all-busy-idle-check-all.html
    - shard-mtlp:         [FAIL][324] ([i915#5234]) -> [PASS][325]
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-1/igt@perf_pmu@all-busy-idle-check-all.html
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-3/igt@perf_pmu@all-busy-idle-check-all.html

  * igt@perf_pmu@busy-double-start@ccs3:
    - shard-dg2:          [FAIL][326] ([i915#4349]) -> [PASS][327] +5 similar issues
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-12/igt@perf_pmu@busy-double-start@ccs3.html
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-6/igt@perf_pmu@busy-double-start@ccs3.html

  * igt@perf_pmu@busy-double-start@vcs1:
    - shard-dg1:          [FAIL][328] ([i915#4349]) -> [PASS][329] +2 similar issues
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg1-15/igt@perf_pmu@busy-double-start@vcs1.html
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-18/igt@perf_pmu@busy-double-start@vcs1.html

  * igt@perf_pmu@rc6-all-gts:
    - shard-mtlp:         [FAIL][330] ([i915#8553]) -> [PASS][331]
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-1/igt@perf_pmu@rc6-all-gts.html
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-6/igt@perf_pmu@rc6-all-gts.html

  * igt@perf_pmu@rc6@runtime-pm-long-gt1:
    - shard-mtlp:         [SKIP][332] ([i915#8537]) -> [PASS][333] +2 similar issues
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-1/igt@perf_pmu@rc6@runtime-pm-long-gt1.html
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-7/igt@perf_pmu@rc6@runtime-pm-long-gt1.html

  * igt@perf_pmu@semaphore-busy@vcs1:
    - shard-mtlp:         [FAIL][334] ([i915#4349]) -> [PASS][335] +3 similar issues
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-4/igt@perf_pmu@semaphore-busy@vcs1.html
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-7/igt@perf_pmu@semaphore-busy@vcs1.html

  
#### Warnings ####

  * igt@api_intel_bb@blit-reloc-keep-cache:
    - shard-dg2:          [SKIP][336] ([i915#8411]) -> [SKIP][337] ([i915#2575])
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-2/igt@api_intel_bb@blit-reloc-keep-cache.html
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@api_intel_bb@blit-reloc-keep-cache.html

  * igt@feature_discovery@psr1:
    - shard-dg2:          [SKIP][338] ([i915#658]) -> [SKIP][339] ([i915#2575])
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-6/igt@feature_discovery@psr1.html
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@feature_discovery@psr1.html

  * igt@gem_exec_fair@basic-none-rrul:
    - shard-dg2:          [SKIP][340] ([i915#3539] / [i915#4852]) -> [SKIP][341] ([i915#2575])
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-10/igt@gem_exec_fair@basic-none-rrul.html
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@gem_exec_fair@basic-none-rrul.html

  * igt@gem_mmap_gtt@flink-race:
    - shard-dg2:          [SKIP][342] ([i915#4077]) -> [SKIP][343] ([i915#2575]) +1 similar issue
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-11/igt@gem_mmap_gtt@flink-race.html
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@gem_mmap_gtt@flink-race.html

  * igt@gem_pread@self:
    - shard-dg2:          [SKIP][344] ([i915#3282]) -> [SKIP][345] ([i915#2575])
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-11/igt@gem_pread@self.html
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@gem_pread@self.html

  * igt@gem_render_copy@yf-tiled-to-vebox-linear:
    - shard-dg2:          [SKIP][346] ([i915#5190]) -> [SKIP][347] ([i915#2575] / [i915#5190])
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-12/igt@gem_render_copy@yf-tiled-to-vebox-linear.html
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@gem_render_copy@yf-tiled-to-vebox-linear.html

  * igt@gem_set_tiling_vs_blt@tiled-to-untiled:
    - shard-dg2:          [SKIP][348] ([i915#4079]) -> [SKIP][349] ([i915#2575])
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-6/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html

  * igt@gen7_exec_parse@basic-rejected:
    - shard-dg2:          [SKIP][350] ([fdo#109289]) -> [SKIP][351] ([i915#2575])
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-11/igt@gen7_exec_parse@basic-rejected.html
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@gen7_exec_parse@basic-rejected.html

  * igt@i915_pm_rc6_residency@media-rc6-accuracy:
    - shard-mtlp:         [SKIP][352] ([fdo#109289]) -> [SKIP][353] ([i915#8403])
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-mtlp-8/igt@i915_pm_rc6_residency@media-rc6-accuracy.html
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-mtlp-6/igt@i915_pm_rc6_residency@media-rc6-accuracy.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-270:
    - shard-dg2:          [SKIP][354] ([fdo#111614]) -> [SKIP][355] ([fdo#109315])
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-6/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-dg2:          [SKIP][356] ([i915#5190]) -> [SKIP][357] ([fdo#109315] / [i915#5190])
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-11/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
    - shard-dg2:          [SKIP][358] ([i915#4538] / [i915#5190]) -> [SKIP][359] ([fdo#109315] / [i915#5190]) +1 similar issue
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-1/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html

  * igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs:
    - shard-dg2:          [SKIP][360] ([i915#3689] / [i915#5354]) -> [SKIP][361] ([i915#2575]) +4 similar issues
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-2/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs.html
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs.html

  * igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
    - shard-dg2:          [SKIP][362] ([i915#3689] / [i915#3886] / [i915#5354]) -> [SKIP][363] ([i915#2575]) +2 similar issues
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-2/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-d-ccs-on-another-bo-4_tiled_mtl_rc_ccs:
    - shard-dg2:          [SKIP][364] ([i915#5354]) -> [SKIP][365] ([i915#2575]) +3 similar issues
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-11/igt@kms_ccs@pipe-d-ccs-on-another-bo-4_tiled_mtl_rc_ccs.html
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_ccs@pipe-d-ccs-on-another-bo-4_tiled_mtl_rc_ccs.html

  * igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
    - shard-dg2:          [SKIP][366] ([i915#7828]) -> [SKIP][367] ([i915#2575]) +1 similar issue
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-2/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html

  * igt@kms_content_protection@content_type_change:
    - shard-dg2:          [SKIP][368] ([i915#7118]) -> [SKIP][369] ([i915#7118] / [i915#7162])
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-10/igt@kms_content_protection@content_type_change.html
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_content_protection@content_type_change.html

  * igt@kms_content_protection@mei_interface:
    - shard-dg1:          [SKIP][370] ([i915#7116]) -> [SKIP][371] ([fdo#109300])
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg1-17/igt@kms_content_protection@mei_interface.html
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-13/igt@kms_content_protection@mei_interface.html

  * igt@kms_content_protection@type1:
    - shard-dg2:          [SKIP][372] ([i915#7118] / [i915#7162]) -> [SKIP][373] ([i915#7118])
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-11/igt@kms_content_protection@type1.html
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-1/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-dg2:          [SKIP][374] ([i915#3555]) -> [SKIP][375] ([i915#2575]) +1 similar issue
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-12/igt@kms_cursor_crc@cursor-sliding-32x10.html
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
    - shard-dg2:          [SKIP][376] ([fdo#109274] / [i915#5354]) -> [SKIP][377] ([i915#2575])
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-10/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - shard-dg2:          [SKIP][378] ([i915#4103] / [i915#4213]) -> [SKIP][379] ([i915#2575])
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-10/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_draw_crc@draw-method-mmap-wc:
    - shard-dg2:          [SKIP][380] ([i915#8812]) -> [SKIP][381] ([fdo#109315])
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-12/igt@kms_draw_crc@draw-method-mmap-wc.html
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_draw_crc@draw-method-mmap-wc.html

  * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
    - shard-dg2:          [SKIP][382] ([fdo#109274]) -> [SKIP][383] ([i915#2575]) +1 similar issue
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-12/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-dg2:          [SKIP][384] ([i915#8708]) -> [SKIP][385] ([fdo#109315])
   [384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html
   [385]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
    - shard-dg2:          [SKIP][386] ([i915#5354]) -> [SKIP][387] ([fdo#109315]) +6 similar issues
   [386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-12/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html
   [387]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu:
    - shard-dg2:          [SKIP][388] ([i915#3458]) -> [SKIP][389] ([fdo#109315]) +2 similar issues
   [388]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-10/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu.html
   [389]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu.html

  * igt@kms_plane_scaling@intel-max-src-size:
    - shard-dg2:          [SKIP][390] ([i915#6953]) -> [SKIP][391] ([i915#2575])
   [390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-2/igt@kms_plane_scaling@intel-max-src-size.html
   [391]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_plane_scaling@intel-max-src-size.html

  * igt@kms_psr@primary_blt:
    - shard-dg2:          [SKIP][392] ([i915#1072]) -> [SKIP][393] ([fdo#109315]) +1 similar issue
   [392]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-2/igt@kms_psr@primary_blt.html
   [393]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@kms_psr@primary_blt.html

  * igt@kms_psr@primary_mmap_gtt:
    - shard-dg1:          [SKIP][394] ([i915#1072] / [i915#4078]) -> [SKIP][395] ([i915#1072])
   [394]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg1-18/igt@kms_psr@primary_mmap_gtt.html
   [395]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-14/igt@kms_psr@primary_mmap_gtt.html

  * igt@kms_psr@primary_page_flip:
    - shard-dg1:          [SKIP][396] ([i915#1072]) -> [SKIP][397] ([i915#1072] / [i915#4078])
   [396]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg1-17/igt@kms_psr@primary_page_flip.html
   [397]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg1-16/igt@kms_psr@primary_page_flip.html

  * igt@perf@mi-rpc:
    - shard-dg2:          [SKIP][398] ([i915#2434]) -> [SKIP][399] ([i915#5608])
   [398]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-2/igt@perf@mi-rpc.html
   [399]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@perf@mi-rpc.html

  * igt@prime_vgem@basic-fence-read:
    - shard-dg2:          [SKIP][400] ([i915#3291] / [i915#3708]) -> [SKIP][401] ([i915#2575])
   [400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13511/shard-dg2-11/igt@prime_vgem@basic-fence-read.html
   [401]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/shard-dg2-11/igt@prime_vgem@basic-fence-read.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
  [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1623]: https://gitlab.freedesktop.org/drm/intel/issues/1623
  [i915#1731]: https://gitlab.freedesktop.org/drm/intel/issues/1731
  [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
  [i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2017]: https://gitlab.freedesktop.org/drm/intel/issues/2017
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2410]: https://gitlab.freedesktop.org/drm/intel/issues/2410
  [i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
  [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
  [i915#4475]: https://gitlab.freedesktop.org/drm/intel/issues/4475
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
  [i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
  [i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
  [i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
  [i915#4936]: https://gitlab.freedesktop.org/drm/intel/issues/4936
  [i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
  [i915#5174]: https://gitlab.freedesktop.org/drm/intel/issues/5174
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5234]: https://gitlab.freedesktop.org/drm/intel/issues/5234
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
  [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
  [i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
  [i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
  [i915#5608]: https://gitlab.freedesktop.org/drm/intel/issues/5608
  [i915#5775]: https://gitlab.freedesktop.org/drm/intel/issues/5775
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#5882]: https://gitlab.freedesktop.org/drm/intel/issues/5882
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6228]: https://gitlab.freedesktop.org/drm/intel/issues/6228
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
  [i915#6786]: https://gitlab.freedesktop.org/drm/intel/issues/6786
  [i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880
  [i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
  [i915#6950]: https://gitlab.freedesktop.org/drm/intel/issues/6950
  [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
  [i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
  [i915#7069]: https://gitlab.freedesktop.org/drm/intel/issues/7069
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
  [i915#7162]: https://gitlab.freedesktop.org/drm/intel/issues/7162
  [i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173
  [i915#7213]: https://gitlab.freedesktop.org/drm/intel/issues/7213
  [i915#7276]: https://gitlab.freedesktop.org/drm/intel/issues/7276
  [i915#7484]: https://gitlab.freedesktop.org/drm/intel/issues/7484
  [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
  [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
  [i915#7816]: https://gitlab.freedesktop.org/drm/intel/issues/7816
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
  [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
  [i915#8247]: https://gitlab.freedesktop.org/drm/intel/issues/8247
  [i915#8289]: https://gitlab.freedesktop.org/drm/intel/issues/8289
  [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
  [i915#8381]: https://gitlab.freedesktop.org/drm/intel/issues/8381
  [i915#8403]: https://gitlab.freedesktop.org/drm/intel/issues/8403
  [i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
  [i915#8436]: https://gitlab.freedesktop.org/drm/intel/issues/8436
  [i915#8502]: https://gitlab.freedesktop.org/drm/intel/issues/8502
  [i915#8521]: https://gitlab.freedesktop.org/drm/intel/issues/8521
  [i915#8537]: https://gitlab.freedesktop.org/drm/intel/issues/8537
  [i915#8552]: https://gitlab.freedesktop.org/drm/intel/issues/8552
  [i915#8553]: https://gitlab.freedesktop.org/drm/intel/issues/8553
  [i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
  [i915#8661]: https://gitlab.freedesktop.org/drm/intel/issues/8661
  [i915#8670]: https://gitlab.freedesktop.org/drm/intel/issues/8670
  [i915#8691]: https://gitlab.freedesktop.org/drm/intel/issues/8691
  [i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
  [i915#8709]: https://gitlab.freedesktop.org/drm/intel/issues/8709
  [i915#8812]: https://gitlab.freedesktop.org/drm/intel/issues/8812
  [i915#8865]: https://gitlab.freedesktop.org/drm/intel/issues/8865
  [i915#8925]: https://gitlab.freedesktop.org/drm/intel/issues/8925
  [i915#9053]: https://gitlab.freedesktop.org/drm/intel/issues/9053
  [i915#9056]: https://gitlab.freedesktop.org/drm/intel/issues/9056


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7433 -> IGTPW_9581
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_13511: 5d873909a143a3c5a272bc27699f3cd220b06d80 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_9581: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/index.html
  IGT_7433: 74c7773be9eb4b8fc0828aad13d5c775289314ef @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9581/index.html

[-- Attachment #2: Type: text/html, Size: 124548 bytes --]

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [igt-dev] [PATCH 2/2] tests/amdgpu: misc fixes for basic tests
  2023-08-11 21:28 ` [igt-dev] [PATCH 2/2] tests/amdgpu: misc fixes for basic tests vitaly.prosyak
@ 2023-08-14  8:52   ` Kamil Konieczny
  0 siblings, 0 replies; 8+ messages in thread
From: Kamil Konieczny @ 2023-08-14  8:52 UTC (permalink / raw)
  To: igt-dev; +Cc: alexander.deucher, luben.tuikov, christian.koenig

Hi Vitaly,

On 2023-08-11 at 17:28:01 -0400, vitaly.prosyak@amd.com wrote:
> From: Vitaly Prosyak <vitaly.prosyak@amd.com>
> 
> 1. Some ASICs may not have GFX IP. For such ASIC the test
>    would be skipped and the reason would be printed.
>    Added  function is_rings_available and use IGT dynamic
>    features.
> 2. In functions amdgpu_command_submission_const_fill_helper
>    and amdgpu_command_submission_copy_linear_helper were
>    missing an outer FOR loop for iterating of each ring.
> 
>    v2
>     - Split formatting code into separate patch (Kamil)
> 
> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> Cc: Luben Tuikov <luben.tuikov@amd.com>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: Christian Koenig <christian.koenig@amd.com>
> Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
> Acked-by: Christian Koenig <christian.koenig@amd.com>
> ---
>  lib/amdgpu/amd_command_submission.c |  98 +++++++++++++++------------
>  lib/amdgpu/amd_ip_blocks.c          |  23 +++++--
>  lib/amdgpu/amd_ip_blocks.h          |  10 ++-
>  tests/amdgpu/amd_basic.c            | 101 ++++++++++++++++++++++------
>  4 files changed, 163 insertions(+), 69 deletions(-)
> 
> diff --git a/lib/amdgpu/amd_command_submission.c b/lib/amdgpu/amd_command_submission.c
> index dbf68d4d0..02cf9357b 100644
> --- a/lib/amdgpu/amd_command_submission.c
> +++ b/lib/amdgpu/amd_command_submission.c
> @@ -2,6 +2,7 @@
>  /*
>   * Copyright 2014 Advanced Micro Devices, Inc.
>   * Copyright 2022 Advanced Micro Devices, Inc.
> + * Copyright 2023 Advanced Micro Devices, Inc.
>   */
>  
>  #include "lib/amdgpu/amd_memory.h"
> @@ -123,6 +124,7 @@ void amdgpu_command_submission_write_linear_helper(amdgpu_device_handle device,
>  
>  	for (ring_id = 0; (1 << ring_id) & ring_context->hw_ip_info.available_rings; ring_id++) {
>  		loop = 0;
> +		ring_context->ring_id = ring_id;
>  		while (loop < 2) {
>  			/* allocate UC bo for sDMA use */
>  			r = amdgpu_bo_alloc_and_map(device,
> @@ -197,7 +199,7 @@ void amdgpu_command_submission_const_fill_helper(amdgpu_device_handle device,
>  	const int pm4_dw = 256;
>  
>  	struct amdgpu_ring_context *ring_context;
> -	int r, loop;
> +	int r, loop, ring_id;
>  
>  	uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC};
>  
> @@ -208,38 +210,42 @@ void amdgpu_command_submission_const_fill_helper(amdgpu_device_handle device,
>  	ring_context->pm4_size = pm4_dw;
>  	ring_context->res_cnt = 1;
>  	igt_assert(ring_context->pm4);
> +	r = amdgpu_query_hw_ip_info(device, ip_block->type, 0, &ring_context->hw_ip_info);
> +	igt_assert_eq(r, 0);
>  
>  	r = amdgpu_cs_ctx_create(device, &ring_context->context_handle);
>  	igt_assert_eq(r, 0);
> -
> -	/* prepare resource */
> -	loop = 0;
> -	while (loop < 2) {
> -		/* allocate UC bo for sDMA use */
> -		r = amdgpu_bo_alloc_and_map(device,
> +	for (ring_id = 0; (1 << ring_id) & ring_context->hw_ip_info.available_rings; ring_id++) {
> +		/* prepare resource */
> +		loop = 0;
> +		ring_context->ring_id = ring_id;
> +		while (loop < 2) {
> +			/* allocate UC bo for sDMA use */
> +			r = amdgpu_bo_alloc_and_map(device,
>  					    ring_context->write_length, 4096,
>  					    AMDGPU_GEM_DOMAIN_GTT,
>  					    gtt_flags[loop], &ring_context->bo, (void **)&ring_context->bo_cpu,
>  					    &ring_context->bo_mc, &ring_context->va_handle);
> -		igt_assert_eq(r, 0);
> +			igt_assert_eq(r, 0);
>  
> -		/* clear bo */
> -		memset((void *)ring_context->bo_cpu, 0, ring_context->write_length);
> +			/* clear bo */
> +			memset((void *)ring_context->bo_cpu, 0, ring_context->write_length);
>  
> -		ring_context->resources[0] = ring_context->bo;
> +			ring_context->resources[0] = ring_context->bo;
>  
> -		/* fulfill PM4: test DMA const fill */
> -		ip_block->funcs->const_fill(ip_block->funcs, ring_context, &ring_context->pm4_dw);
> +			/* fulfill PM4: test DMA const fill */
> +			ip_block->funcs->const_fill(ip_block->funcs, ring_context, &ring_context->pm4_dw);
>  
> -		amdgpu_test_exec_cs_helper(device, ip_block->type, ring_context);
> +			amdgpu_test_exec_cs_helper(device, ip_block->type, ring_context);
>  
> -		/* verify if SDMA test result meets with expected */
> -		r = ip_block->funcs->compare(ip_block->funcs, ring_context, 4);
> -		igt_assert_eq(r, 0);
> +			/* verify if SDMA test result meets with expected */
> +			r = ip_block->funcs->compare(ip_block->funcs, ring_context, 4);
> +			igt_assert_eq(r, 0);
>  
> -		amdgpu_bo_unmap_and_free(ring_context->bo, ring_context->va_handle, ring_context->bo_mc,
> +			amdgpu_bo_unmap_and_free(ring_context->bo, ring_context->va_handle, ring_context->bo_mc,
>  					 ring_context->write_length);
> -		loop++;
> +			loop++;
> +		}
>  	}
>  	/* clean resources */
>  	free(ring_context->pm4);
> @@ -262,7 +268,7 @@ void amdgpu_command_submission_copy_linear_helper(amdgpu_device_handle device,
>  	const int pm4_dw = 256;
>  
>  	struct amdgpu_ring_context *ring_context;
> -	int r, loop1, loop2;
> +	int r, loop1, loop2, ring_id;
>  
>  	uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC};
>  
> @@ -274,58 +280,62 @@ void amdgpu_command_submission_copy_linear_helper(amdgpu_device_handle device,
>  	ring_context->pm4_size = pm4_dw;
>  	ring_context->res_cnt = 2;
>  	igt_assert(ring_context->pm4);
> +	r = amdgpu_query_hw_ip_info(device, ip_block->type, 0, &ring_context->hw_ip_info);
> +	igt_assert_eq(r, 0);
>  
>  
>  	r = amdgpu_cs_ctx_create(device, &ring_context->context_handle);
>  	igt_assert_eq(r, 0);
>  
> -
> -	loop1 = loop2 = 0;
> +	for (ring_id = 0; (1 << ring_id) & ring_context->hw_ip_info.available_rings; ring_id++) {
> +		loop1 = loop2 = 0;
> +		ring_context->ring_id = ring_id;
>  	/* run 9 circle to test all mapping combination */
> -	while (loop1 < 2) {
> -		while (loop2 < 2) {
> +		while (loop1 < 2) {
> +			while (loop2 < 2) {
>  			/* allocate UC bo1for sDMA use */
> -			r = amdgpu_bo_alloc_and_map(device,
> +				r = amdgpu_bo_alloc_and_map(device,
>  						    ring_context->write_length, 4096,
>  						    AMDGPU_GEM_DOMAIN_GTT,
>  						    gtt_flags[loop1], &ring_context->bo,
>  						    (void **)&ring_context->bo_cpu, &ring_context->bo_mc,
>  						    &ring_context->va_handle);
> -			igt_assert_eq(r, 0);
> +				igt_assert_eq(r, 0);
>  
> -			/* set bo_cpu */
> -			memset((void *)ring_context->bo_cpu, ip_block->funcs->pattern, ring_context->write_length);
> +				/* set bo_cpu */
> +				memset((void *)ring_context->bo_cpu, ip_block->funcs->pattern, ring_context->write_length);
>  
> -			/* allocate UC bo2 for sDMA use */
> -			r = amdgpu_bo_alloc_and_map(device,
> +				/* allocate UC bo2 for sDMA use */
> +				r = amdgpu_bo_alloc_and_map(device,
>  						    ring_context->write_length, 4096,
>  						    AMDGPU_GEM_DOMAIN_GTT,
>  						    gtt_flags[loop2], &ring_context->bo2,
>  						    (void **)&ring_context->bo2_cpu, &ring_context->bo_mc2,
>  						    &ring_context->va_handle2);
> -			igt_assert_eq(r, 0);
> +				igt_assert_eq(r, 0);
>  
> -			/* clear bo2_cpu */
> -			memset((void *)ring_context->bo2_cpu, 0, ring_context->write_length);
> +				/* clear bo2_cpu */
> +				memset((void *)ring_context->bo2_cpu, 0, ring_context->write_length);
>  
> -			ring_context->resources[0] = ring_context->bo;
> -			ring_context->resources[1] = ring_context->bo2;
> +				ring_context->resources[0] = ring_context->bo;
> +				ring_context->resources[1] = ring_context->bo2;
>  
> -			ip_block->funcs->copy_linear(ip_block->funcs, ring_context, &ring_context->pm4_dw);
> +				ip_block->funcs->copy_linear(ip_block->funcs, ring_context, &ring_context->pm4_dw);
>  
> -			amdgpu_test_exec_cs_helper(device, ip_block->type, ring_context);
> +				amdgpu_test_exec_cs_helper(device, ip_block->type, ring_context);
>  
> -			/* verify if SDMA test result meets with expected */
> -			r = ip_block->funcs->compare_pattern(ip_block->funcs, ring_context, 4);
> -			igt_assert_eq(r, 0);
> +				/* verify if SDMA test result meets with expected */
> +				r = ip_block->funcs->compare_pattern(ip_block->funcs, ring_context, 4);
> +				igt_assert_eq(r, 0);
>  
> -			amdgpu_bo_unmap_and_free(ring_context->bo, ring_context->va_handle, ring_context->bo_mc,
> +				amdgpu_bo_unmap_and_free(ring_context->bo, ring_context->va_handle, ring_context->bo_mc,
>  						 ring_context->write_length);
> -			amdgpu_bo_unmap_and_free(ring_context->bo2, ring_context->va_handle2, ring_context->bo_mc2,
> +				amdgpu_bo_unmap_and_free(ring_context->bo2, ring_context->va_handle2, ring_context->bo_mc2,
>  						 ring_context->write_length);
> -			loop2++;
> +				loop2++;
> +			}
> +			loop1++;
>  		}
> -		loop1++;
>  	}
>  	/* clean resources */
>  	free(ring_context->pm4);
> diff --git a/lib/amdgpu/amd_ip_blocks.c b/lib/amdgpu/amd_ip_blocks.c
> index b07695714..67bba8e84 100644
> --- a/lib/amdgpu/amd_ip_blocks.c
> +++ b/lib/amdgpu/amd_ip_blocks.c
> @@ -152,10 +152,11 @@ sdma_ring_copy_linear(const struct amdgpu_ip_funcs *func,
>   * - copy_linear
>   */
>  
> +
>  static int
>  gfx_ring_write_linear(const struct amdgpu_ip_funcs *func,
> -				const struct amdgpu_ring_context *ring_context,
> -				uint32_t *pm4_dw)
> +		      const struct amdgpu_ring_context *ring_context,
> +		      uint32_t *pm4_dw)
>  {
>  	uint32_t i, j;
>  
> @@ -198,8 +199,8 @@ gfx_ring_write_linear(const struct amdgpu_ip_funcs *func,
>  
>  static int
>  gfx_ring_const_fill(const struct amdgpu_ip_funcs *func,
> -				const struct amdgpu_ring_context *ring_context,
> -				uint32_t *pm4_dw)
> +		     const struct amdgpu_ring_context *ring_context,
> +		     uint32_t *pm4_dw)
>  {
>  	uint32_t i;
>  
> @@ -744,3 +745,17 @@ amdgpu_open_devices(bool open_render_node, int  max_cards_supported, int drm_amd
>  	drmFreeDevices(devices, drm_count);
>  	return amd_index;
>  }
> +

Please document each new public library function.

> +bool
> +is_rings_available(amdgpu_device_handle device_handle, uint32_t mask,
> +		enum amd_ip_block_type type)
> +{
> +	struct drm_amdgpu_info_hw_ip hw_ip_info = {0};
> +	int r;
> +	bool ret = false;
> +
> +	r = amdgpu_query_hw_ip_info(device_handle, type, 0, &hw_ip_info);
> +	igt_assert_eq(r, 0);
> +	ret = hw_ip_info.available_rings & mask;

Add newline before return, also why not just:

	return hw_ip_info.available_rings & mask;

> +	return ret;
> +}
> diff --git a/lib/amdgpu/amd_ip_blocks.h b/lib/amdgpu/amd_ip_blocks.h
> index ad7ffd4e6..dcba8a380 100644
> --- a/lib/amdgpu/amd_ip_blocks.h
> +++ b/lib/amdgpu/amd_ip_blocks.h
> @@ -12,11 +12,15 @@
>  #define MAX_CARDS_SUPPORTED 4
>  
>  enum amd_ip_block_type {
> -	AMD_IP_GFX,
> +	AMD_IP_GFX = 0,
>  	AMD_IP_COMPUTE,
>  	AMD_IP_DMA,
>  	AMD_IP_UVD,
>  	AMD_IP_VCE,
> +	AMD_IP_UVD_ENC,
> +	AMD_IP_VCN_DEC,
> +	AMD_IP_VCN_ENC,
> +	AMD_IP_VCN_JPEG,
>  	AMD_IP_MAX,
>  };
>  
> @@ -123,4 +127,8 @@ void free_cmd_base(struct amdgpu_cmd_base *base);
>  int
>  amdgpu_open_devices(bool open_render_node, int max_cards_supported, int drm_amdgpu_fds[]);
>  
> +bool
> +is_rings_available(amdgpu_device_handle device_handle, uint32_t mask,
> +		enum amd_ip_block_type type);
> +
>  #endif
> diff --git a/tests/amdgpu/amd_basic.c b/tests/amdgpu/amd_basic.c
> index 31e67647d..6e54a0e4f 100644
> --- a/tests/amdgpu/amd_basic.c
> +++ b/tests/amdgpu/amd_basic.c
> @@ -619,12 +619,23 @@ amdgpu_gfx_dispatch_test_compute(amdgpu_device_handle device_handle)
>  	amdgpu_gfx_dispatch_test(device_handle, AMDGPU_HW_IP_COMPUTE);
>  }
>  
> +static void
> +amdgpu_asic_rings_caps(amdgpu_device_handle device_handle, bool *arr, uint32_t mask)
> +{
> +	enum amd_ip_block_type ip;
> +	int i;
> +
> +	for (i = 0, ip = AMD_IP_GFX; ip < AMD_IP_MAX; ip++)
> +		arr[i++] = is_rings_available(device_handle, mask, ip);
> +}
> +
>  igt_main
>  {
>  	amdgpu_device_handle device;
>  	struct amdgpu_gpu_info gpu_info = {0};
>  	int fd = -1;
>  	int r;
> +	bool arr_cap[AMD_IP_MAX] = {0};
>  
>  	igt_fixture {
>  		uint32_t major, minor;
> @@ -642,41 +653,91 @@ igt_main
>  		igt_assert_eq(r, 0);
>  		r = setup_amdgpu_ip_blocks(major, minor,  &gpu_info, device);
>  		igt_assert_eq(r, 0);
> +		amdgpu_asic_rings_caps(device, arr_cap, 1);
>  
Remove this empty line.

>  	}
> -

Keep this empty line.

>  	igt_subtest("memory-alloc")
>  		amdgpu_memory_alloc(device);
>  
> -	igt_subtest("userptr")
> -		amdgpu_userptr_test(device);
> +	igt_describe("userptr");
--------------------- ^

For description it would be better to write an explanation of what
and/or how whould you test a functionallity. Just repeating a test
name is not much helpfull.

> +	igt_subtest_with_dynamic("userptr-with-IP-DMA") {
> +		if (arr_cap[AMD_IP_DMA]) {
> +			igt_dynamic_f("userptr")
> +			amdgpu_userptr_test(device);
> +		}
> +	}
>  
> -	igt_subtest("cs-gfx")
> -		amdgpu_command_submission_gfx(device);
> +	igt_describe("cs-gfx");
--------------------- ^
Same here.

> +	igt_subtest_with_dynamic("cs-gfx-with-IP-GFX") {
> +		if (arr_cap[AMD_IP_GFX]) {
> +			igt_dynamic_f("cs-gfx")
> +			amdgpu_command_submission_gfx(device);
> +		}
> +	}
>  
> -	igt_subtest("cs-compute")
> -		amdgpu_command_submission_compute(device);
> +	igt_describe("cs-compute");
--------------------- ^
Same here.

> +	igt_subtest_with_dynamic("cs-compute-with-IP-COMPUTE") {
> +		if (arr_cap[AMD_IP_COMPUTE]) {
> +			igt_dynamic_f("cs-compute")
> +			amdgpu_command_submission_compute(device);
> +		}
> +	}
>  
> -	igt_subtest("cs-multi-fence")
> +	igt_describe("cs-multi-fence");
--------------------- ^
Same here.

> +	igt_subtest_with_dynamic("cs-multi-fence-with-IP-GFX") {
> +		if (arr_cap[AMD_IP_GFX]) {
> +			igt_dynamic_f("cs-multi-fence")
>  		amdgpu_command_submission_multi_fence(device);
> +		}
> +	}
>  
> -	igt_subtest("cs-sdma")
> -		amdgpu_command_submission_sdma(device);
> +	igt_describe("cs-sdma");
--------------------- ^
Same here.

> +	igt_subtest_with_dynamic("cs-sdma-with-IP-DMA") {
> +		if (arr_cap[AMD_IP_DMA]) {
> +			igt_dynamic_f("cs-sdma")
> +			amdgpu_command_submission_sdma(device);
> +		}
> +	}
>  
> -	igt_subtest("semaphore")
> -		amdgpu_semaphore_test(device);
> +	igt_describe("semaphore");
--------------------- ^
Same here.

> +	igt_subtest_with_dynamic("semaphore-with-IP-GFX-and-IP-DMA") {
> +		if (arr_cap[AMD_IP_GFX] && arr_cap[AMD_IP_DMA]) {
> +			igt_dynamic_f("semaphore")
> +			amdgpu_semaphore_test(device);
> +		}
> +	}
>  
> -	igt_subtest("eviction_test")
> -		amdgpu_bo_eviction_test(device);
> +	igt_describe("eviction-test");
--------------------- ^
Same here.

> +	igt_subtest_with_dynamic("eviction-test-with-IP-DMA") {
> +		if (arr_cap[AMD_IP_DMA]) {
> +			igt_dynamic_f("eviction_test")
> +			amdgpu_bo_eviction_test(device);
> +		}
> +	}
>  
> -	igt_subtest("sync_dependency_test")
> -		amdgpu_sync_dependency_test(device);
> +	igt_describe("sync-dependency-test");
--------------------- ^
Same here.

> +	igt_subtest_with_dynamic("sync-dependency-test-with-IP-GFX") {
> +		if (arr_cap[AMD_IP_GFX]) {
> +			igt_dynamic_f("sync-dependency-test")
> +			amdgpu_sync_dependency_test(device);
> +		}
> +	}
>  
> -	igt_subtest("amdgpu_gfx_dispatch_test_compute")
> -	amdgpu_gfx_dispatch_test_compute(device);
> +	igt_describe("amdgpu-dispatch-test-compute");
--------------------- ^
Same here.

> +	igt_subtest_with_dynamic("amdgpu-dispatch-test-compute-with-IP-COMPUTE") {
> +		if (arr_cap[AMD_IP_COMPUTE]) {
> +			igt_dynamic_f("amdgpu-dispatch-test-compute")
> +			amdgpu_gfx_dispatch_test_compute(device);
> +		}
> +	}
>  
> -	igt_subtest("amdgpu_gfx_dispatch_test_gfx")
> -	amdgpu_gfx_dispatch_test_gfx(device);
> +	igt_describe("amdgpu-dispatch-test-gfx");
--------------------- ^
Same here.

Regards,
Kamil

> +	igt_subtest_with_dynamic("amdgpu-dispatch-test-gfx-with-IP-GFX") {
> +		if (arr_cap[AMD_IP_GFX]) {
> +			igt_dynamic_f("amdgpu-dispatch-test-gfx")
> +			amdgpu_gfx_dispatch_test_gfx(device);
> +		}
> +	}
>  
>  	igt_fixture {
>  		amdgpu_device_deinitialize(device);
> -- 
> 2.25.1
> 

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [igt-dev] [PATCH 1/2] lib/amdgpu: Formatting the code
@ 2023-08-14 23:54 vitaly.prosyak
  0 siblings, 0 replies; 8+ messages in thread
From: vitaly.prosyak @ 2023-08-14 23:54 UTC (permalink / raw)
  To: igt-dev; +Cc: alexander.deucher, luben.tuikov, christian.koenig

From: Vitaly Prosyak <vitaly.prosyak@amd.com>

No functional change, formatting the code to meet iGT guidelines.

Cc: Kamil Konieczny@linux.intel.com <kamil.konieczny@linux.intel.com>
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Acked-by: Kamil Konieczny@linux.intel.com <kamil.konieczny@linux.intel.com>
---
 lib/amdgpu/amd_command_submission.c |  50 ++++------
 lib/amdgpu/amd_command_submission.h |   2 +-
 lib/amdgpu/amd_ip_blocks.c          | 139 +++++++++++++---------------
 lib/amdgpu/amd_ip_blocks.h          |  32 ++-----
 tests/amdgpu/amd_basic.c            |  72 ++++++--------
 5 files changed, 114 insertions(+), 181 deletions(-)

diff --git a/lib/amdgpu/amd_command_submission.c b/lib/amdgpu/amd_command_submission.c
index de393209b..dbf68d4d0 100644
--- a/lib/amdgpu/amd_command_submission.c
+++ b/lib/amdgpu/amd_command_submission.c
@@ -1,27 +1,9 @@
-/* SPDX-License-Identifier: MIT
+// SPDX-License-Identifier: MIT
+/*
  * Copyright 2014 Advanced Micro Devices, Inc.
  * Copyright 2022 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- *
  */
+
 #include "lib/amdgpu/amd_memory.h"
 #include "lib/amdgpu/amd_sdma.h"
 #include "lib/amdgpu/amd_PM4.h"
@@ -34,7 +16,7 @@
  * submit command stream described in ibs_request and wait for this IB accomplished
  */
 
-void amdgpu_test_exec_cs_helper(amdgpu_device_handle device, unsigned ip_type,
+void amdgpu_test_exec_cs_helper(amdgpu_device_handle device, unsigned int ip_type,
 				struct amdgpu_ring_context *ring_context)
 {
 	int r;
@@ -141,19 +123,19 @@ void amdgpu_command_submission_write_linear_helper(amdgpu_device_handle device,
 
 	for (ring_id = 0; (1 << ring_id) & ring_context->hw_ip_info.available_rings; ring_id++) {
 		loop = 0;
-		while(loop < 2) {
+		while (loop < 2) {
 			/* allocate UC bo for sDMA use */
 			r = amdgpu_bo_alloc_and_map(device,
 						    ring_context->write_length * sizeof(uint32_t),
 						    4096, AMDGPU_GEM_DOMAIN_GTT,
 						    gtt_flags[loop], &ring_context->bo,
-						    (void**)&ring_context->bo_cpu,
+						    (void **)&ring_context->bo_cpu,
 						    &ring_context->bo_mc,
 						    &ring_context->va_handle);
 			igt_assert_eq(r, 0);
 
 			/* clear bo */
-			memset((void*)ring_context->bo_cpu, 0, ring_context->write_length * sizeof(uint32_t));
+			memset((void *)ring_context->bo_cpu, 0, ring_context->write_length * sizeof(uint32_t));
 
 			ring_context->resources[0] = ring_context->bo;
 
@@ -232,17 +214,17 @@ void amdgpu_command_submission_const_fill_helper(amdgpu_device_handle device,
 
 	/* prepare resource */
 	loop = 0;
-	while(loop < 2) {
+	while (loop < 2) {
 		/* allocate UC bo for sDMA use */
 		r = amdgpu_bo_alloc_and_map(device,
 					    ring_context->write_length, 4096,
 					    AMDGPU_GEM_DOMAIN_GTT,
-					    gtt_flags[loop], &ring_context->bo, (void**)&ring_context->bo_cpu,
+					    gtt_flags[loop], &ring_context->bo, (void **)&ring_context->bo_cpu,
 					    &ring_context->bo_mc, &ring_context->va_handle);
 		igt_assert_eq(r, 0);
 
 		/* clear bo */
-		memset((void*)ring_context->bo_cpu, 0, ring_context->write_length);
+		memset((void *)ring_context->bo_cpu, 0, ring_context->write_length);
 
 		ring_context->resources[0] = ring_context->bo;
 
@@ -300,31 +282,31 @@ void amdgpu_command_submission_copy_linear_helper(amdgpu_device_handle device,
 
 	loop1 = loop2 = 0;
 	/* run 9 circle to test all mapping combination */
-	while(loop1 < 2) {
-		while(loop2 < 2) {
+	while (loop1 < 2) {
+		while (loop2 < 2) {
 			/* allocate UC bo1for sDMA use */
 			r = amdgpu_bo_alloc_and_map(device,
 						    ring_context->write_length, 4096,
 						    AMDGPU_GEM_DOMAIN_GTT,
 						    gtt_flags[loop1], &ring_context->bo,
-						    (void**)&ring_context->bo_cpu, &ring_context->bo_mc,
+						    (void **)&ring_context->bo_cpu, &ring_context->bo_mc,
 						    &ring_context->va_handle);
 			igt_assert_eq(r, 0);
 
 			/* set bo_cpu */
-			memset((void*)ring_context->bo_cpu, ip_block->funcs->pattern, ring_context->write_length);
+			memset((void *)ring_context->bo_cpu, ip_block->funcs->pattern, ring_context->write_length);
 
 			/* allocate UC bo2 for sDMA use */
 			r = amdgpu_bo_alloc_and_map(device,
 						    ring_context->write_length, 4096,
 						    AMDGPU_GEM_DOMAIN_GTT,
 						    gtt_flags[loop2], &ring_context->bo2,
-						    (void**)&ring_context->bo2_cpu, &ring_context->bo_mc2,
+						    (void **)&ring_context->bo2_cpu, &ring_context->bo_mc2,
 						    &ring_context->va_handle2);
 			igt_assert_eq(r, 0);
 
 			/* clear bo2_cpu */
-			memset((void*)ring_context->bo2_cpu, 0, ring_context->write_length);
+			memset((void *)ring_context->bo2_cpu, 0, ring_context->write_length);
 
 			ring_context->resources[0] = ring_context->bo;
 			ring_context->resources[1] = ring_context->bo2;
diff --git a/lib/amdgpu/amd_command_submission.h b/lib/amdgpu/amd_command_submission.h
index 0c1ba9bb4..58f3221a3 100644
--- a/lib/amdgpu/amd_command_submission.h
+++ b/lib/amdgpu/amd_command_submission.h
@@ -29,7 +29,7 @@
 #include "amd_ip_blocks.h"
 
 void amdgpu_test_exec_cs_helper(amdgpu_device_handle device,
-				unsigned ip_type, struct amdgpu_ring_context *ring_context);
+				unsigned int ip_type, struct amdgpu_ring_context *ring_context);
 
 void amdgpu_command_submission_write_linear_helper(amdgpu_device_handle device,
 						   const struct amdgpu_ip_block_version *ip_block,
diff --git a/lib/amdgpu/amd_ip_blocks.c b/lib/amdgpu/amd_ip_blocks.c
index 44768ba64..b07695714 100644
--- a/lib/amdgpu/amd_ip_blocks.c
+++ b/lib/amdgpu/amd_ip_blocks.c
@@ -1,27 +1,10 @@
-/* SPDX-License-Identifier: MIT
+// SPDX-License-Identifier: MIT
+/*
  * Copyright 2014 Advanced Micro Devices, Inc.
  * Copyright 2022 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- *
+ * Copyright 2023 Advanced Micro Devices, Inc.
  */
+
 #include <fcntl.h>
 
 #include "amd_memory.h"
@@ -67,7 +50,7 @@ sdma_ring_write_linear(const struct amdgpu_ip_funcs *func,
 		else
 			ring_context->pm4[i++] = ring_context->write_length;
 
-		while(j++ < ring_context->write_length)
+		while (j++ < ring_context->write_length)
 			ring_context->pm4[i++] = func->deadbeaf;
 	} else {
 		memset(ring_context->pm4, 0, ring_context->pm4_size * sizeof(uint32_t));
@@ -90,7 +73,7 @@ sdma_ring_write_linear(const struct amdgpu_ip_funcs *func,
 		ring_context->pm4[i++] = 0x100;
 	}
 
- 	*pm4_dw = i;
+	*pm4_dw = i;
 
 	return 0;
 }
@@ -157,7 +140,7 @@ sdma_ring_copy_linear(const struct amdgpu_ip_funcs *func,
 		context->pm4[i++] = (0xffffffff00000000 & context->bo_mc2) >> 32;
 	}
 
- 	*pm4_dw = i;
+	*pm4_dw = i;
 
 	return 0;
 }
@@ -169,25 +152,24 @@ sdma_ring_copy_linear(const struct amdgpu_ip_funcs *func,
  * - copy_linear
  */
 
-
 static int
 gfx_ring_write_linear(const struct amdgpu_ip_funcs *func,
-		      const struct amdgpu_ring_context *ring_context,
-		      uint32_t *pm4_dw)
- {
- 	uint32_t i, j;
-
- 	i = 0;
- 	j = 0;
-
- 	if (ring_context->secure == false) {
- 		ring_context->pm4[i++] = PACKET3(PACKET3_WRITE_DATA, 2 +  ring_context->write_length);
- 		ring_context->pm4[i++] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM;
- 		ring_context->pm4[i++] = 0xfffffffc & ring_context->bo_mc;
- 		ring_context->pm4[i++] = (0xffffffff00000000 & ring_context->bo_mc) >> 32;
- 		while(j++ < ring_context->write_length)
- 			ring_context->pm4[i++] = func->deadbeaf;
- 	} else {
+				const struct amdgpu_ring_context *ring_context,
+				uint32_t *pm4_dw)
+{
+	uint32_t i, j;
+
+	i = 0;
+	j = 0;
+
+	if (ring_context->secure == false) {
+		ring_context->pm4[i++] = PACKET3(PACKET3_WRITE_DATA, 2 +  ring_context->write_length);
+		ring_context->pm4[i++] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM;
+		ring_context->pm4[i++] = 0xfffffffc & ring_context->bo_mc;
+		ring_context->pm4[i++] = (0xffffffff00000000 & ring_context->bo_mc) >> 32;
+		while (j++ < ring_context->write_length)
+			ring_context->pm4[i++] = func->deadbeaf;
+	} else {
 		memset(ring_context->pm4, 0, ring_context->pm4_size * sizeof(uint32_t));
 		ring_context->pm4[i++] = PACKET3(PACKET3_ATOMIC_MEM, 7);
 
@@ -207,21 +189,21 @@ gfx_ring_write_linear(const struct amdgpu_ip_funcs *func,
 		ring_context->pm4[i++] = 0xdeadbeaf;
 		ring_context->pm4[i++] = 0x0;
 		ring_context->pm4[i++] = 0x100;
- 	}
+	}
 
- 	*pm4_dw = i;
+	*pm4_dw = i;
 
- 	return 0;
- }
+	return 0;
+}
 
- static int
- gfx_ring_const_fill(const struct amdgpu_ip_funcs *func,
-		     const struct amdgpu_ring_context *ring_context,
-		     uint32_t *pm4_dw)
- {
- 	uint32_t i;
+static int
+gfx_ring_const_fill(const struct amdgpu_ip_funcs *func,
+				const struct amdgpu_ring_context *ring_context,
+				uint32_t *pm4_dw)
+{
+	uint32_t i;
 
- 	i = 0;
+	i = 0;
 	if (func->family_id == AMDGPU_FAMILY_SI) {
 		ring_context->pm4[i++] = PACKET3(PACKET3_DMA_DATA_SI, 4);
 		ring_context->pm4[i++] = func->deadbeaf;
@@ -244,19 +226,19 @@ gfx_ring_write_linear(const struct amdgpu_ip_funcs *func,
 		ring_context->pm4[i++] = (0xffffffff00000000 & ring_context->bo_mc) >> 32;
 		ring_context->pm4[i++] = ring_context->write_length;
 	}
- 	*pm4_dw = i;
+	*pm4_dw = i;
 
- 	return 0;
- }
+	return 0;
+}
 
 static int
 gfx_ring_copy_linear(const struct amdgpu_ip_funcs *func,
 		     const struct amdgpu_ring_context *context,
 		     uint32_t *pm4_dw)
 {
- 	uint32_t i;
+	uint32_t i;
 
- 	i = 0;
+	i = 0;
 	if (func->family_id == AMDGPU_FAMILY_SI) {
 		context->pm4[i++] = PACKET3(PACKET3_DMA_DATA_SI, 4);
 		context->pm4[i++] = 0xfffffffc & context->bo_mc;
@@ -281,7 +263,7 @@ gfx_ring_copy_linear(const struct amdgpu_ip_funcs *func,
 		context->pm4[i++] = context->write_length;
 	}
 
- 	*pm4_dw = i;
+	*pm4_dw = i;
 
 	return 0;
 }
@@ -295,7 +277,7 @@ x_compare(const struct amdgpu_ip_funcs *func,
 
 	int num_compare = ring_context->write_length/div;
 
-	while(i < num_compare) {
+	while (i < num_compare) {
 		if (ring_context->bo_cpu[i++] != func->deadbeaf) {
 			ret = -1;
 			break;
@@ -312,7 +294,7 @@ x_compare_pattern(const struct amdgpu_ip_funcs *func,
 
 	int num_compare = ring_context->write_length/div;
 
-	while(i < num_compare) {
+	while (i < num_compare) {
 		if (ring_context->bo_cpu[i++] != func->pattern) {
 			ret = -1;
 			break;
@@ -374,9 +356,9 @@ const struct amdgpu_ip_block_version sdma_v3_x_ip_block = {
 };
 
 struct chip_info {
-	  const char *name;
-	  enum radeon_family family;
-	  enum chip_class chip_class;
+	const char *name;
+	enum radeon_family family;
+	enum chip_class chip_class;
 	  amdgpu_device_handle dev;
 };
 
@@ -403,7 +385,7 @@ get_ip_block(amdgpu_device_handle device, enum amd_ip_block_type type)
 	if (g_chip.dev != device)
 		return NULL;
 
-	for(i = 0; i <  amdgpu_ips.num_ip_blocks; i++)
+	for (i = 0; i <  amdgpu_ips.num_ip_blocks; i++)
 		if (amdgpu_ips.ip_blocks[i]->type == type)
 			return amdgpu_ips.ip_blocks[i];
 	return NULL;
@@ -451,14 +433,14 @@ cmd_attach_buf(struct amdgpu_cmd_base  *base, void *ptr, uint32_t size_bytes)
 static void
 cmd_emit(struct amdgpu_cmd_base  *base, uint32_t value)
 {
-	assert(base->cdw <  base->max_dw  );
+	assert(base->cdw <  base->max_dw);
 	base->buf[base->cdw++] = value;
 }
 
 static void
 cmd_emit_aligned(struct amdgpu_cmd_base *base, uint32_t mask, uint32_t cmd)
 {
-	while(base->cdw & mask)
+	while (base->cdw & mask)
 		base->emit(base, cmd);
 }
 static void
@@ -470,7 +452,7 @@ cmd_emit_buf(struct amdgpu_cmd_base  *base, const void *ptr, uint32_t offset_byt
 	assert(size_bytes % 4 == 0); /* no gaps */
 	assert(offset_bytes % 4 == 0);
 	assert(base->cdw + total_offset_dw <  base->max_dw);
-	memcpy(base->buf + base->cdw + offset_dw , ptr, size_bytes);
+	memcpy(base->buf + base->cdw + offset_dw, ptr, size_bytes);
 	base->cdw += total_offset_dw;
 }
 
@@ -494,7 +476,7 @@ cmd_emit_at_offset(struct amdgpu_cmd_base  *base, uint32_t value, uint32_t offse
 struct amdgpu_cmd_base *
 get_cmd_base(void)
 {
-	struct amdgpu_cmd_base *base = calloc(1 ,sizeof(*base));
+	struct amdgpu_cmd_base *base = calloc(1, sizeof(*base));
 
 	base->cdw = 0;
 	base->max_dw = 0;
@@ -504,7 +486,7 @@ get_cmd_base(void)
 	base->allocate_buf = cmd_allocate_buf;
 	base->attach_buf = cmd_attach_buf;
 	base->emit = cmd_emit;
-	base->emit_aligned= cmd_emit_aligned;
+	base->emit_aligned = cmd_emit_aligned;
 	base->emit_repeat = cmd_emit_repeat;
 	base->emit_at_offset = cmd_emit_at_offset;
 	base->emit_buf = cmd_emit_buf;
@@ -513,7 +495,7 @@ get_cmd_base(void)
 }
 
 void
-free_cmd_base(struct amdgpu_cmd_base * base)
+free_cmd_base(struct amdgpu_cmd_base *base)
 {
 	if (base) {
 		if (base->buf && base->is_assigned_buf == false)
@@ -546,11 +528,14 @@ free_cmd_base(struct amdgpu_cmd_base * base)
 int setup_amdgpu_ip_blocks(uint32_t major, uint32_t minor, struct amdgpu_gpu_info *amdinfo,
 			   amdgpu_device_handle device)
 {
-#define identify_chip2(asic, chipname)			\
-   if (ASICREV_IS(amdinfo->chip_external_rev, asic)) {	\
-      info->family = CHIP_##chipname;			\
-      info->name = #chipname;				\
-   }
+#define identify_chip2(asic, chipname)	\
+	do {\
+		if (ASICREV_IS(amdinfo->chip_external_rev, asic)) {\
+			info->family = CHIP_##chipname;	\
+			info->name = #chipname;	\
+		} \
+	} while (0)
+
 #define identify_chip(chipname) identify_chip2(chipname, chipname)
 
 	const struct chip_class_arr {
@@ -662,7 +647,7 @@ int setup_amdgpu_ip_blocks(uint32_t major, uint32_t minor, struct amdgpu_gpu_inf
 	igt_assert_eq(chip_class_arr[info->chip_class].class, info->chip_class);
 	igt_info("amdgpu: chip_class %s\n", chip_class_arr[info->chip_class].name);
 
-	switch(info->chip_class) {
+	switch (info->chip_class) {
 	case GFX6:
 		break;
 	case GFX7: /* tested */
@@ -684,7 +669,7 @@ int setup_amdgpu_ip_blocks(uint32_t major, uint32_t minor, struct amdgpu_gpu_inf
 	default:
 		igt_info("amdgpu: GFX or old.\n");
 		return -1;
-	 }
+	}
 	info->dev = device;
 
 	return 0;
diff --git a/lib/amdgpu/amd_ip_blocks.h b/lib/amdgpu/amd_ip_blocks.h
index 14e33c423..ad7ffd4e6 100644
--- a/lib/amdgpu/amd_ip_blocks.h
+++ b/lib/amdgpu/amd_ip_blocks.h
@@ -1,27 +1,9 @@
 /* SPDX-License-Identifier: MIT
  * Copyright 2014 Advanced Micro Devices, Inc.
  * Copyright 2022 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- *
+ * Copyright 2023 Advanced Micro Devices, Inc.
  */
+
 #ifndef AMD_IP_BLOCKS_H
 #define AMD_IP_BLOCKS_H
 
@@ -45,9 +27,9 @@ struct amdgpu_ring_context {
 	int res_cnt; /* num of bo in amdgpu_bo_handle resources[2] */
 
 	uint32_t write_length;  /* length of data */
-	uint32_t *pm4; 		/* data of the packet */
-	uint32_t pm4_size; 	/* max allocated packet size */
-	bool secure; 		/* secure or not */
+	uint32_t *pm4;		/* data of the packet */
+	uint32_t pm4_size;	/* max allocated packet size */
+	bool secure;		/* secure or not */
 
 	uint64_t bo_mc;		/* result from amdgpu_bo_alloc_and_map */
 	uint64_t bo_mc2;	/* result from amdgpu_bo_alloc_and_map */
@@ -128,13 +110,13 @@ struct amdgpu_cmd_base {
 	int (*allocate_buf)(struct amdgpu_cmd_base  *base, uint32_t size);
 	int (*attach_buf)(struct amdgpu_cmd_base  *base, void *ptr, uint32_t size_bytes);
 	void (*emit)(struct amdgpu_cmd_base  *base, uint32_t value);
-	void (*emit_aligned)(struct amdgpu_cmd_base  *base,uint32_t mask, uint32_t value);
+	void (*emit_aligned)(struct amdgpu_cmd_base  *base, uint32_t mask, uint32_t value);
 	void (*emit_repeat)(struct amdgpu_cmd_base  *base, uint32_t value, uint32_t number_of_times);
 	void (*emit_at_offset)(struct amdgpu_cmd_base  *base, uint32_t value, uint32_t offset_dwords);
 	void (*emit_buf)(struct amdgpu_cmd_base  *base, const void *ptr, uint32_t offset_bytes, uint32_t size_bytes);
 };
 
-struct amdgpu_cmd_base* get_cmd_base(void);
+struct amdgpu_cmd_base *get_cmd_base(void);
 
 void free_cmd_base(struct amdgpu_cmd_base *base);
 
diff --git a/tests/amdgpu/amd_basic.c b/tests/amdgpu/amd_basic.c
index f7d7f036f..31e67647d 100644
--- a/tests/amdgpu/amd_basic.c
+++ b/tests/amdgpu/amd_basic.c
@@ -1,26 +1,8 @@
-/* SPDX-License-Identifier: MIT
+// SPDX-License-Identifier: MIT
+/*
  * Copyright 2014 Advanced Micro Devices, Inc.
  * Copyright 2022 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Based on libdrm/tests/amdgpu/basic_tests.c
+ * Copyright 2023 Advanced Micro Devices, Inc.
  */
 
 #include "lib/amdgpu/amd_memory.h"
@@ -174,7 +156,7 @@ static void amdgpu_semaphore_test(amdgpu_device_handle device)
 	ibs_request[0].ibs = &ib_info[0];
 	ibs_request[0].resources = bo_list[0];
 	ibs_request[0].fence_info.handle = NULL;
-	r = amdgpu_cs_submit(context_handle[0], 0,&ibs_request[0], 1);
+	r = amdgpu_cs_submit(context_handle[0], 0, &ibs_request[0], 1);
 	igt_assert_eq(r, 0);
 	r = amdgpu_cs_signal_semaphore(context_handle[0], AMDGPU_HW_IP_DMA, 0, 0, sem);
 	igt_assert_eq(r, 0);
@@ -192,7 +174,7 @@ static void amdgpu_semaphore_test(amdgpu_device_handle device)
 	ibs_request[1].resources = bo_list[1];
 	ibs_request[1].fence_info.handle = NULL;
 
-	r = amdgpu_cs_submit(context_handle[0], 0,&ibs_request[1], 1);
+	r = amdgpu_cs_submit(context_handle[0], 0, &ibs_request[1], 1);
 	igt_assert_eq(r, 0);
 
 	fence_status.context = context_handle[0];
@@ -215,7 +197,7 @@ static void amdgpu_semaphore_test(amdgpu_device_handle device)
 	ibs_request[0].ibs = &ib_info[0];
 	ibs_request[0].resources = bo_list[0];
 	ibs_request[0].fence_info.handle = NULL;
-	r = amdgpu_cs_submit(context_handle[0], 0,&ibs_request[0], 1);
+	r = amdgpu_cs_submit(context_handle[0], 0, &ibs_request[0], 1);
 	igt_assert_eq(r, 0);
 	r = amdgpu_cs_signal_semaphore(context_handle[0], AMDGPU_HW_IP_GFX, 0, 0, sem);
 	igt_assert_eq(r, 0);
@@ -232,7 +214,7 @@ static void amdgpu_semaphore_test(amdgpu_device_handle device)
 	ibs_request[1].ibs = &ib_info[1];
 	ibs_request[1].resources = bo_list[1];
 	ibs_request[1].fence_info.handle = NULL;
-	r = amdgpu_cs_submit(context_handle[1], 0,&ibs_request[1], 1);
+	r = amdgpu_cs_submit(context_handle[1], 0, &ibs_request[1], 1);
 
 	igt_assert_eq(r, 0);
 
@@ -278,7 +260,8 @@ static void amdgpu_userptr_test(amdgpu_device_handle device)
 	struct amdgpu_ring_context *ring_context;
 	int r;
 
-	const struct amdgpu_ip_block_version * ip_block = get_ip_block(device, AMDGPU_HW_IP_DMA);
+	const struct amdgpu_ip_block_version *ip_block = get_ip_block(device, AMDGPU_HW_IP_DMA);
+
 	igt_assert(ip_block);
 	ring_context = calloc(1, sizeof(*ring_context));
 	igt_assert(ring_context);
@@ -295,12 +278,12 @@ static void amdgpu_userptr_test(amdgpu_device_handle device)
 	r = amdgpu_cs_ctx_create(device, &ring_context->context_handle);
 	igt_assert_eq(r, 0);
 
-	posix_memalign((void**)&ring_context->bo_cpu, sysconf(_SC_PAGE_SIZE), BUFFER_SIZE);
+	posix_memalign((void **)&ring_context->bo_cpu, sysconf(_SC_PAGE_SIZE), BUFFER_SIZE);
 	igt_assert(ring_context->bo_cpu);
-	memset((void*)ring_context->bo_cpu, 0, BUFFER_SIZE);
+	memset((void *)ring_context->bo_cpu, 0, BUFFER_SIZE);
 
 	r = amdgpu_create_bo_from_user_mem(device,
-					   (void*)ring_context->bo_cpu,
+					   (void *)ring_context->bo_cpu,
 					   BUFFER_SIZE, &ring_context->bo);
 	igt_assert_eq(r, 0);
 
@@ -352,7 +335,8 @@ amdgpu_bo_eviction_test(amdgpu_device_handle device_handle)
 
 	uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC};
 
-	const struct amdgpu_ip_block_version * ip_block = get_ip_block(device_handle, AMDGPU_HW_IP_DMA);
+	const struct amdgpu_ip_block_version *ip_block = get_ip_block(device_handle, AMDGPU_HW_IP_DMA);
+
 	igt_assert(ip_block);
 
 	ring_context = calloc(1, sizeof(*ring_context));
@@ -392,31 +376,31 @@ amdgpu_bo_eviction_test(amdgpu_device_handle device_handle)
 
 	loop1 = loop2 = 0;
 	/* run 9 circle to test all mapping combination */
-	while(loop1 < 2) {
-		while(loop2 < 2) {
+	while (loop1 < 2) {
+		while (loop2 < 2) {
 			/* allocate UC bo1for sDMA use */
 			r = amdgpu_bo_alloc_and_map(device_handle,
 						    sdma_write_length, 4096,
 						    AMDGPU_GEM_DOMAIN_GTT,
 						    gtt_flags[loop1],  &ring_context->bo,
-						    (void**)&ring_context->bo_cpu, &ring_context->bo_mc,
+						    (void **)&ring_context->bo_cpu, &ring_context->bo_mc,
 						    &ring_context->va_handle);
 			igt_assert_eq(r, 0);
 
 			/* set bo1 */
-			memset((void*)ring_context->bo_cpu, ip_block->funcs->pattern, ring_context->write_length);
+			memset((void *)ring_context->bo_cpu, ip_block->funcs->pattern, ring_context->write_length);
 
 			/* allocate UC bo2 for sDMA use */
 			r = amdgpu_bo_alloc_and_map(device_handle,
 						    sdma_write_length, 4096,
 						    AMDGPU_GEM_DOMAIN_GTT,
 						    gtt_flags[loop2], &ring_context->bo2,
-						    (void**)&ring_context->bo2_cpu, &ring_context->bo_mc2,
+						    (void **)&ring_context->bo2_cpu, &ring_context->bo_mc2,
 						    &ring_context->va_handle2);
 			igt_assert_eq(r, 0);
 
 			/* clear bo2 */
-			memset((void*)ring_context->bo2_cpu, 0, ring_context->write_length);
+			memset((void *)ring_context->bo2_cpu, 0, ring_context->write_length);
 
 			ring_context->resources[0] = ring_context->bo;
 			ring_context->resources[1] = ring_context->bo2;
@@ -474,8 +458,8 @@ amdgpu_sync_dependency_test(amdgpu_device_handle device_handle)
 	uint32_t size_bytes, code_offset, data_offset;
 	const uint32_t *shader;
 
-	struct amdgpu_cmd_base * base = get_cmd_base();
-	const struct amdgpu_ip_block_version * ip_block = get_ip_block(device_handle, AMD_IP_GFX);
+	struct amdgpu_cmd_base *base = get_cmd_base();
+	const struct amdgpu_ip_block_version *ip_block = get_ip_block(device_handle, AMD_IP_GFX);
 
 	r = amdgpu_cs_ctx_create(device_handle, &context_handle[0]);
 	igt_assert_eq(r, 0);
@@ -513,7 +497,7 @@ amdgpu_sync_dependency_test(amdgpu_device_handle device_handle)
 	base->emit(base, (ib_result_mc_address + code_offset * 4) >> 8);
 	base->emit(base, (ib_result_mc_address + code_offset * 4) >> 40);
 
-	base->emit(base,PACKET3(PKT3_SET_SH_REG, 2));
+	base->emit(base, PACKET3(PKT3_SET_SH_REG, 2));
 	base->emit(base, ip_block->funcs->get_reg_offset(COMPUTE_PGM_RSRC1));
 
 	base->emit(base, 0x002c0040);
@@ -546,7 +530,7 @@ amdgpu_sync_dependency_test(amdgpu_device_handle device_handle)
 	base->emit(base, 0x00000045);
 	base->emit_aligned(base, 7, GFX_COMPUTE_NOP);
 
-	memcpy(base->buf + code_offset , shader, size_bytes);
+	memcpy(base->buf + code_offset, shader, size_bytes);
 
 	memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info));
 	ib_info.ib_mc_address = ib_result_mc_address;
@@ -560,7 +544,7 @@ amdgpu_sync_dependency_test(amdgpu_device_handle device_handle)
 	ibs_request.resources = bo_list;
 	ibs_request.fence_info.handle = NULL;
 
-	r = amdgpu_cs_submit(context_handle[1], 0,&ibs_request, 1);
+	r = amdgpu_cs_submit(context_handle[1], 0, &ibs_request, 1);
 	igt_assert_eq(r, 0);
 	seq_no = ibs_request.seq_no;
 
@@ -593,7 +577,7 @@ amdgpu_sync_dependency_test(amdgpu_device_handle device_handle)
 	ibs_request.dependencies[0].ring = 0;
 	ibs_request.dependencies[0].fence = seq_no;
 
-	r = amdgpu_cs_submit(context_handle[0], 0,&ibs_request, 1);
+	r = amdgpu_cs_submit(context_handle[0], 0, &ibs_request, 1);
 	igt_assert_eq(r, 0);
 
 	memset(&fence_status, 0, sizeof(struct amdgpu_cs_fence));
@@ -604,7 +588,7 @@ amdgpu_sync_dependency_test(amdgpu_device_handle device_handle)
 	fence_status.fence = ibs_request.seq_no;
 
 	r = amdgpu_cs_query_fence_status(&fence_status,
-		       AMDGPU_TIMEOUT_INFINITE,0, &expired);
+		       AMDGPU_TIMEOUT_INFINITE, 0, &expired);
 	igt_assert_eq(r, 0);
 
 	/* Expect the second command to wait for shader to complete */
@@ -656,7 +640,7 @@ igt_main
 
 		r = amdgpu_query_gpu_info(device, &gpu_info);
 		igt_assert_eq(r, 0);
-		r = setup_amdgpu_ip_blocks( major, minor,  &gpu_info, device);
+		r = setup_amdgpu_ip_blocks(major, minor,  &gpu_info, device);
 		igt_assert_eq(r, 0);
 
 	}
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2023-08-14 23:54 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-08-11 21:28 [igt-dev] [PATCH 1/2] lib/amdgpu: Formatting the code vitaly.prosyak
2023-08-11 21:28 ` [igt-dev] [PATCH 2/2] tests/amdgpu: misc fixes for basic tests vitaly.prosyak
2023-08-14  8:52   ` Kamil Konieczny
2023-08-11 22:32 ` [igt-dev] ✗ GitLab.Pipeline: warning for series starting with [1/2] lib/amdgpu: Formatting the code Patchwork
2023-08-11 23:02 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2023-08-11 23:03 ` [igt-dev] ○ CI.xeBAT: info " Patchwork
2023-08-13  4:54 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
2023-08-14 23:54 [igt-dev] [PATCH 1/2] " vitaly.prosyak

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