* [PATCH v2 0/3] Enable 4-bit tx support
@ 2023-08-31 6:36 ` Biju Das
0 siblings, 0 replies; 12+ messages in thread
From: Biju Das @ 2023-08-31 6:36 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, Paul Walmsley,
Palmer Dabbelt, Albert Ou, linux-renesas-soc, devicetree,
linux-riscv, Prabhakar Mahadev Lad
This patch series aims to enable 4-bit tx support for
RZ/{G2L,G2LC,G2UL,V2L} SMARC EVKs.
v1->v2:
* Enabled 4-bit tx support.
This patch series dependupon [1]
[1] https://lore.kernel.org/all/20230830145835.296690-1-biju.das.jz@bp.renesas.com/
Biju Das (3):
arm64: dts: renesas: rzg2ul-smarc-som: Enable serial NOR flash
arm64: dts: renesas: rzg2l-smarc-som: Enable 4-bit tx support
arm64: dts: renesas: rzg2lc-smarc-som: Enable 4-bit tx support
.../boot/dts/renesas/rzg2l-smarc-som.dtsi | 1 +
.../boot/dts/renesas/rzg2lc-smarc-som.dtsi | 1 +
.../boot/dts/renesas/rzg2ul-smarc-som.dtsi | 44 +++++++++++++++++++
.../boot/dts/renesas/rzfive-smarc-som.dtsi | 4 ++
4 files changed, 50 insertions(+)
--
2.25.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 0/3] Enable 4-bit tx support
@ 2023-08-31 6:36 ` Biju Das
0 siblings, 0 replies; 12+ messages in thread
From: Biju Das @ 2023-08-31 6:36 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, Paul Walmsley,
Palmer Dabbelt, Albert Ou, linux-renesas-soc, devicetree,
linux-riscv, Prabhakar Mahadev Lad
This patch series aims to enable 4-bit tx support for
RZ/{G2L,G2LC,G2UL,V2L} SMARC EVKs.
v1->v2:
* Enabled 4-bit tx support.
This patch series dependupon [1]
[1] https://lore.kernel.org/all/20230830145835.296690-1-biju.das.jz@bp.renesas.com/
Biju Das (3):
arm64: dts: renesas: rzg2ul-smarc-som: Enable serial NOR flash
arm64: dts: renesas: rzg2l-smarc-som: Enable 4-bit tx support
arm64: dts: renesas: rzg2lc-smarc-som: Enable 4-bit tx support
.../boot/dts/renesas/rzg2l-smarc-som.dtsi | 1 +
.../boot/dts/renesas/rzg2lc-smarc-som.dtsi | 1 +
.../boot/dts/renesas/rzg2ul-smarc-som.dtsi | 44 +++++++++++++++++++
.../boot/dts/renesas/rzfive-smarc-som.dtsi | 4 ++
4 files changed, 50 insertions(+)
--
2.25.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 1/3] arm64: dts: renesas: rzg2ul-smarc-som: Enable serial NOR flash
2023-08-31 6:36 ` Biju Das
@ 2023-08-31 6:36 ` Biju Das
-1 siblings, 0 replies; 12+ messages in thread
From: Biju Das @ 2023-08-31 6:36 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, Paul Walmsley,
Palmer Dabbelt, Albert Ou, linux-renesas-soc, devicetree,
linux-riscv, Prabhakar Mahadev Lad
Enable Renesas at25ql128a flash connected to QSPI0. Also disable
the node from rzfive-smarc-som as it is untested.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v1->v2:
* Enabled 4-bit tx support
---
.../boot/dts/renesas/rzg2ul-smarc-som.dtsi | 44 +++++++++++++++++++
.../boot/dts/renesas/rzfive-smarc-som.dtsi | 4 ++
2 files changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
index 97cdad2a12e2..b9e4e476ff7b 100644
--- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
@@ -179,6 +179,18 @@ eth1_pins: eth1 {
<RZG2L_PORT_PINMUX(18, 5, 1)>; /* IRQ7 */
};
+ qspi0_pins: qspi0 {
+ qspi0-data {
+ pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3";
+ power-source = <1800>;
+ };
+
+ qspi0-ctrl {
+ pins = "QSPI0_SPCLK", "QSPI0_SSL";
+ power-source = <1800>;
+ };
+ };
+
sdhi0_emmc_pins: sd0emmc {
sd0_emmc_data {
pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
@@ -230,6 +242,38 @@ sd0_mux_uhs {
};
};
+&sbc {
+ pinctrl-0 = <&qspi0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+
+ spi-cpol;
+ spi-cpha;
+ m25p,fast-read;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ boot@0 {
+ reg = <0x00000000 0x200000>;
+ read-only;
+ };
+ user@200000 {
+ reg = <0x200000 0xE00000>;
+ };
+ };
+ };
+};
+
#if (SW_SW0_DEV_SEL)
&sdhi0 {
pinctrl-0 = <&sdhi0_emmc_pins>;
diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
index c62debc7ca7e..0c9d72c32879 100644
--- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
+++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
@@ -42,6 +42,10 @@ phy1: ethernet-phy@7 {
};
};
+&sbc {
+ status = "disabled";
+};
+
&sdhi0 {
status = "disabled";
};
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 1/3] arm64: dts: renesas: rzg2ul-smarc-som: Enable serial NOR flash
@ 2023-08-31 6:36 ` Biju Das
0 siblings, 0 replies; 12+ messages in thread
From: Biju Das @ 2023-08-31 6:36 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, Paul Walmsley,
Palmer Dabbelt, Albert Ou, linux-renesas-soc, devicetree,
linux-riscv, Prabhakar Mahadev Lad
Enable Renesas at25ql128a flash connected to QSPI0. Also disable
the node from rzfive-smarc-som as it is untested.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v1->v2:
* Enabled 4-bit tx support
---
.../boot/dts/renesas/rzg2ul-smarc-som.dtsi | 44 +++++++++++++++++++
.../boot/dts/renesas/rzfive-smarc-som.dtsi | 4 ++
2 files changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
index 97cdad2a12e2..b9e4e476ff7b 100644
--- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
@@ -179,6 +179,18 @@ eth1_pins: eth1 {
<RZG2L_PORT_PINMUX(18, 5, 1)>; /* IRQ7 */
};
+ qspi0_pins: qspi0 {
+ qspi0-data {
+ pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3";
+ power-source = <1800>;
+ };
+
+ qspi0-ctrl {
+ pins = "QSPI0_SPCLK", "QSPI0_SSL";
+ power-source = <1800>;
+ };
+ };
+
sdhi0_emmc_pins: sd0emmc {
sd0_emmc_data {
pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
@@ -230,6 +242,38 @@ sd0_mux_uhs {
};
};
+&sbc {
+ pinctrl-0 = <&qspi0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+
+ spi-cpol;
+ spi-cpha;
+ m25p,fast-read;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ boot@0 {
+ reg = <0x00000000 0x200000>;
+ read-only;
+ };
+ user@200000 {
+ reg = <0x200000 0xE00000>;
+ };
+ };
+ };
+};
+
#if (SW_SW0_DEV_SEL)
&sdhi0 {
pinctrl-0 = <&sdhi0_emmc_pins>;
diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
index c62debc7ca7e..0c9d72c32879 100644
--- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
+++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
@@ -42,6 +42,10 @@ phy1: ethernet-phy@7 {
};
};
+&sbc {
+ status = "disabled";
+};
+
&sdhi0 {
status = "disabled";
};
--
2.25.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 2/3] arm64: dts: renesas: rzg2l-smarc-som: Enable 4-bit tx support
2023-08-31 6:36 ` Biju Das
(?)
(?)
@ 2023-08-31 6:36 ` Biju Das
2023-08-31 17:32 ` Geert Uytterhoeven
-1 siblings, 1 reply; 12+ messages in thread
From: Biju Das @ 2023-08-31 6:36 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad
Enable 4-bit tx support for sbc node.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v2:
* New patch
---
arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
index 547859c388ce..4409c47239b9 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
@@ -312,6 +312,7 @@ flash@0 {
m25p,fast-read;
spi-max-frequency = <50000000>;
spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 3/3] arm64: dts: renesas: rzg2lc-smarc-som: Enable 4-bit tx support
2023-08-31 6:36 ` Biju Das
` (2 preceding siblings ...)
(?)
@ 2023-08-31 6:36 ` Biju Das
2023-08-31 17:32 ` Geert Uytterhoeven
-1 siblings, 1 reply; 12+ messages in thread
From: Biju Das @ 2023-08-31 6:36 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Prabhakar Mahadev Lad
Enable 4-bit tx support for sbc node.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v2:
* New patch
---
arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi
index 56ff92453976..5e4209d6fb42 100644
--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi
@@ -241,6 +241,7 @@ flash@0 {
m25p,fast-read;
spi-max-frequency = <50000000>;
spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/3] arm64: dts: renesas: rzg2ul-smarc-som: Enable serial NOR flash
2023-08-31 6:36 ` Biju Das
@ 2023-08-31 17:31 ` Geert Uytterhoeven
-1 siblings, 0 replies; 12+ messages in thread
From: Geert Uytterhoeven @ 2023-08-31 17:31 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Magnus Damm,
Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-renesas-soc,
devicetree, linux-riscv, Prabhakar Mahadev Lad
Hi Biju,
On Thu, Aug 31, 2023 at 8:36 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Enable Renesas at25ql128a flash connected to QSPI0. Also disable
> the node from rzfive-smarc-som as it is untested.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v1->v2:
> * Enabled 4-bit tx support
Thanks for the update!
> --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
> @@ -179,6 +179,18 @@ eth1_pins: eth1 {
> <RZG2L_PORT_PINMUX(18, 5, 1)>; /* IRQ7 */
> };
>
> + qspi0_pins: qspi0 {
> + qspi0-data {
> + pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3";
> + power-source = <1800>;
> + };
> +
> + qspi0-ctrl {
> + pins = "QSPI0_SPCLK", "QSPI0_SSL";
> + power-source = <1800>;
> + };
> + };
From the v1 review comments:
> > I guess there is no need for the subnodes, as all pins use the same power-
> > source value?
>
> OK, will remove subnode.
Oops...
The rest LGTM.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/3] arm64: dts: renesas: rzg2ul-smarc-som: Enable serial NOR flash
@ 2023-08-31 17:31 ` Geert Uytterhoeven
0 siblings, 0 replies; 12+ messages in thread
From: Geert Uytterhoeven @ 2023-08-31 17:31 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Magnus Damm,
Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-renesas-soc,
devicetree, linux-riscv, Prabhakar Mahadev Lad
Hi Biju,
On Thu, Aug 31, 2023 at 8:36 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Enable Renesas at25ql128a flash connected to QSPI0. Also disable
> the node from rzfive-smarc-som as it is untested.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v1->v2:
> * Enabled 4-bit tx support
Thanks for the update!
> --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
> @@ -179,6 +179,18 @@ eth1_pins: eth1 {
> <RZG2L_PORT_PINMUX(18, 5, 1)>; /* IRQ7 */
> };
>
> + qspi0_pins: qspi0 {
> + qspi0-data {
> + pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3";
> + power-source = <1800>;
> + };
> +
> + qspi0-ctrl {
> + pins = "QSPI0_SPCLK", "QSPI0_SSL";
> + power-source = <1800>;
> + };
> + };
From the v1 review comments:
> > I guess there is no need for the subnodes, as all pins use the same power-
> > source value?
>
> OK, will remove subnode.
Oops...
The rest LGTM.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/3] arm64: dts: renesas: rzg2l-smarc-som: Enable 4-bit tx support
2023-08-31 6:36 ` [PATCH v2 2/3] arm64: dts: renesas: rzg2l-smarc-som: Enable 4-bit tx support Biju Das
@ 2023-08-31 17:32 ` Geert Uytterhoeven
0 siblings, 0 replies; 12+ messages in thread
From: Geert Uytterhoeven @ 2023-08-31 17:32 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Geert Uytterhoeven, Magnus Damm, linux-renesas-soc, devicetree,
Prabhakar Mahadev Lad
On Thu, Aug 31, 2023 at 8:36 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Enable 4-bit tx support for sbc node.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/3] arm64: dts: renesas: rzg2lc-smarc-som: Enable 4-bit tx support
2023-08-31 6:36 ` [PATCH v2 3/3] arm64: dts: renesas: rzg2lc-smarc-som: " Biju Das
@ 2023-08-31 17:32 ` Geert Uytterhoeven
0 siblings, 0 replies; 12+ messages in thread
From: Geert Uytterhoeven @ 2023-08-31 17:32 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Magnus Damm,
linux-renesas-soc, devicetree, Prabhakar Mahadev Lad
On Thu, Aug 31, 2023 at 8:36 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Enable 4-bit tx support for sbc node.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH v2 1/3] arm64: dts: renesas: rzg2ul-smarc-som: Enable serial NOR flash
2023-08-31 17:31 ` Geert Uytterhoeven
@ 2023-09-01 7:05 ` Biju Das
-1 siblings, 0 replies; 12+ messages in thread
From: Biju Das @ 2023-09-01 7:05 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Magnus Damm,
Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-renesas-soc,
devicetree, linux-riscv, Prabhakar Mahadev Lad
Hi Geert Uytterhoeven,
Thanks for the feedback.
> Subject: Re: [PATCH v2 1/3] arm64: dts: renesas: rzg2ul-smarc-som: Enable
> serial NOR flash
>
> Hi Biju,
>
> On Thu, Aug 31, 2023 at 8:36 AM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > Enable Renesas at25ql128a flash connected to QSPI0. Also disable the
> > node from rzfive-smarc-som as it is untested.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> > v1->v2:
> > * Enabled 4-bit tx support
>
> Thanks for the update!
>
> > --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
> > @@ -179,6 +179,18 @@ eth1_pins: eth1 {
> > <RZG2L_PORT_PINMUX(18, 5, 1)>; /* IRQ7 */
> > };
> >
> > + qspi0_pins: qspi0 {
> > + qspi0-data {
> > + pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2",
> "QSPI0_IO3";
> > + power-source = <1800>;
> > + };
> > +
> > + qspi0-ctrl {
> > + pins = "QSPI0_SPCLK", "QSPI0_SSL";
> > + power-source = <1800>;
> > + };
> > + };
>
> From the v1 review comments:
>
> > > I guess there is no need for the subnodes, as all pins use the same
> > > power- source value?
> >
> > OK, will remove subnode.
>
> Oops...
OK will send V3.
Cheers,
Biju
^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH v2 1/3] arm64: dts: renesas: rzg2ul-smarc-som: Enable serial NOR flash
@ 2023-09-01 7:05 ` Biju Das
0 siblings, 0 replies; 12+ messages in thread
From: Biju Das @ 2023-09-01 7:05 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Magnus Damm,
Paul Walmsley, Palmer Dabbelt, Albert Ou, linux-renesas-soc,
devicetree, linux-riscv, Prabhakar Mahadev Lad
Hi Geert Uytterhoeven,
Thanks for the feedback.
> Subject: Re: [PATCH v2 1/3] arm64: dts: renesas: rzg2ul-smarc-som: Enable
> serial NOR flash
>
> Hi Biju,
>
> On Thu, Aug 31, 2023 at 8:36 AM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > Enable Renesas at25ql128a flash connected to QSPI0. Also disable the
> > node from rzfive-smarc-som as it is untested.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> > v1->v2:
> > * Enabled 4-bit tx support
>
> Thanks for the update!
>
> > --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
> > @@ -179,6 +179,18 @@ eth1_pins: eth1 {
> > <RZG2L_PORT_PINMUX(18, 5, 1)>; /* IRQ7 */
> > };
> >
> > + qspi0_pins: qspi0 {
> > + qspi0-data {
> > + pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2",
> "QSPI0_IO3";
> > + power-source = <1800>;
> > + };
> > +
> > + qspi0-ctrl {
> > + pins = "QSPI0_SPCLK", "QSPI0_SSL";
> > + power-source = <1800>;
> > + };
> > + };
>
> From the v1 review comments:
>
> > > I guess there is no need for the subnodes, as all pins use the same
> > > power- source value?
> >
> > OK, will remove subnode.
>
> Oops...
OK will send V3.
Cheers,
Biju
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^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2023-09-01 7:06 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-08-31 6:36 [PATCH v2 0/3] Enable 4-bit tx support Biju Das
2023-08-31 6:36 ` Biju Das
2023-08-31 6:36 ` [PATCH v2 1/3] arm64: dts: renesas: rzg2ul-smarc-som: Enable serial NOR flash Biju Das
2023-08-31 6:36 ` Biju Das
2023-08-31 17:31 ` Geert Uytterhoeven
2023-08-31 17:31 ` Geert Uytterhoeven
2023-09-01 7:05 ` Biju Das
2023-09-01 7:05 ` Biju Das
2023-08-31 6:36 ` [PATCH v2 2/3] arm64: dts: renesas: rzg2l-smarc-som: Enable 4-bit tx support Biju Das
2023-08-31 17:32 ` Geert Uytterhoeven
2023-08-31 6:36 ` [PATCH v2 3/3] arm64: dts: renesas: rzg2lc-smarc-som: " Biju Das
2023-08-31 17:32 ` Geert Uytterhoeven
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