* [PATCH 0/4] phy: qcom-qmp-combo: correct sm8550 PHY programming
@ 2023-09-06 7:58 ` Dmitry Baryshkov
0 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 7:58 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa
Fix one bug and several small issues with the QMP USB+DP PHY programming
on the Qualcomm SM8550 platform.
Dmitry Baryshkov (4):
phy: qcom-qmp-combo: correct sm8550 PHY programming
phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers
phy: qcom-qmp-usb: move PCS v6 register to the proper header
phy: qcom-qmp-combo: use v6 registers in v6 regs layout
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 50 +++++++++----------
.../phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 27 +++-------
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 19 ++++++-
3 files changed, 49 insertions(+), 47 deletions(-)
--
2.39.2
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 0/4] phy: qcom-qmp-combo: correct sm8550 PHY programming
@ 2023-09-06 7:58 ` Dmitry Baryshkov
0 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 7:58 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa
Fix one bug and several small issues with the QMP USB+DP PHY programming
on the Qualcomm SM8550 platform.
Dmitry Baryshkov (4):
phy: qcom-qmp-combo: correct sm8550 PHY programming
phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers
phy: qcom-qmp-usb: move PCS v6 register to the proper header
phy: qcom-qmp-combo: use v6 registers in v6 regs layout
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 50 +++++++++----------
.../phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 27 +++-------
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 19 ++++++-
3 files changed, 49 insertions(+), 47 deletions(-)
--
2.39.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 1/4] phy: qcom-qmp-combo: correct sm8550 PHY programming
2023-09-06 7:58 ` Dmitry Baryshkov
@ 2023-09-06 7:58 ` Dmitry Baryshkov
-1 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 7:58 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa, stable
Move PCS_USB3_POWER_STATE_CONFIG1 register programming from pcs_tbl to
the pcs_usb_tbl, where it belongs. Also, while we are at it, correct the
offset of this register to point to 0x00, as expected.
Fixes: 49742e9edab3 ("phy: qcom-qmp-combo: Add support for SM8550")
Fixes: 39bbf82d8c2b ("phy: qcom-qmp: pcs-usb: Add v6 register offsets")
Cc: Abel Vesa <abel.vesa@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 2 +-
drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index cbb28afce135..41b9be56eead 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -859,7 +859,6 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = {
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b),
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
};
static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
@@ -867,6 +866,7 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
+ QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
};
static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = {
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
index 9510e63ba9d8..5409ddcd3eb5 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
@@ -12,7 +12,6 @@
#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
#define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
-#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x90
#define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188
#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
@@ -23,6 +22,7 @@
#define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc
#define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec
+#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
#define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
#define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
--
2.39.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 1/4] phy: qcom-qmp-combo: correct sm8550 PHY programming
@ 2023-09-06 7:58 ` Dmitry Baryshkov
0 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 7:58 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa, stable
Move PCS_USB3_POWER_STATE_CONFIG1 register programming from pcs_tbl to
the pcs_usb_tbl, where it belongs. Also, while we are at it, correct the
offset of this register to point to 0x00, as expected.
Fixes: 49742e9edab3 ("phy: qcom-qmp-combo: Add support for SM8550")
Fixes: 39bbf82d8c2b ("phy: qcom-qmp: pcs-usb: Add v6 register offsets")
Cc: Abel Vesa <abel.vesa@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 2 +-
drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index cbb28afce135..41b9be56eead 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -859,7 +859,6 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = {
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b),
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
};
static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
@@ -867,6 +866,7 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
+ QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
};
static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = {
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
index 9510e63ba9d8..5409ddcd3eb5 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
@@ -12,7 +12,6 @@
#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
#define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
-#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x90
#define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188
#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
@@ -23,6 +22,7 @@
#define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc
#define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec
+#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
#define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
#define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
--
2.39.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/4] phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers
2023-09-06 7:58 ` Dmitry Baryshkov
@ 2023-09-06 7:58 ` Dmitry Baryshkov
-1 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 7:58 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa
For all other generations, we have been using just the QPHY prefix for
the PCS registers. Remove the _USB part of the QPHY_USB prefix.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 38 +++++++++----------
.../phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 38 +++++++++----------
2 files changed, 38 insertions(+), 38 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 41b9be56eead..bff6231d7de3 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -845,28 +845,28 @@ static const struct qmp_phy_init_tbl sm8550_usb3_rx_tbl[] = {
};
static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = {
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2, 0x89),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3, 0x20),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6, 0x13),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1, 0x21),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RX_SIGDET_LVL, 0x99),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_CDR_RESET_TIME, 0x0a),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1, 0x88),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2, 0x13),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG2, 0x89),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG3, 0x20),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG6, 0x13),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_REFGEN_REQ_CONFIG1, 0x21),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_RX_SIGDET_LVL, 0x99),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_CDR_RESET_TIME, 0x0a),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG1, 0x88),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG2, 0x13),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG1, 0x4b),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG5, 0x10),
};
static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
};
static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = {
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
index 5409ddcd3eb5..4fbef4eea7b5 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
@@ -7,25 +7,25 @@
#define QCOM_PHY_QMP_PCS_USB_V6_H_
/* Only for QMP V6 PHY - USB3 have different offsets than V5 */
-#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1 0xc4
-#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2 0xc8
-#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
-#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
-#define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
-#define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188
-#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
-#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
-#define QPHY_USB_V6_PCS_CDR_RESET_TIME 0x1b0
-#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0
-#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4
-#define QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
-#define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc
-#define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0xc4
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0xc8
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
+#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
+#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188
+#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
+#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
+#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0
+#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0
+#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4
+#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
+#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc
+#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec
-#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
-#define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
-#define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
-#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
-#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x44
+#define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
+#define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
+#define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
+#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
+#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x44
#endif
--
2.39.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/4] phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers
@ 2023-09-06 7:58 ` Dmitry Baryshkov
0 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 7:58 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa
For all other generations, we have been using just the QPHY prefix for
the PCS registers. Remove the _USB part of the QPHY_USB prefix.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 38 +++++++++----------
.../phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 38 +++++++++----------
2 files changed, 38 insertions(+), 38 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 41b9be56eead..bff6231d7de3 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -845,28 +845,28 @@ static const struct qmp_phy_init_tbl sm8550_usb3_rx_tbl[] = {
};
static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = {
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2, 0x89),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3, 0x20),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6, 0x13),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1, 0x21),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RX_SIGDET_LVL, 0x99),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_CDR_RESET_TIME, 0x0a),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1, 0x88),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2, 0x13),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG2, 0x89),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG3, 0x20),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG6, 0x13),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_REFGEN_REQ_CONFIG1, 0x21),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_RX_SIGDET_LVL, 0x99),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_CDR_RESET_TIME, 0x0a),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG1, 0x88),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG2, 0x13),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG1, 0x4b),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG5, 0x10),
};
static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
- QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
+ QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
};
static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = {
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
index 5409ddcd3eb5..4fbef4eea7b5 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
@@ -7,25 +7,25 @@
#define QCOM_PHY_QMP_PCS_USB_V6_H_
/* Only for QMP V6 PHY - USB3 have different offsets than V5 */
-#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1 0xc4
-#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2 0xc8
-#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
-#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
-#define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
-#define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188
-#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
-#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
-#define QPHY_USB_V6_PCS_CDR_RESET_TIME 0x1b0
-#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0
-#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4
-#define QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
-#define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc
-#define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0xc4
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0xc8
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
+#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
+#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188
+#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
+#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
+#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0
+#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0
+#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4
+#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
+#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc
+#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec
-#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
-#define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
-#define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
-#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
-#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x44
+#define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
+#define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
+#define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
+#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
+#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x44
#endif
--
2.39.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 3/4] phy: qcom-qmp-usb: move PCS v6 register to the proper header
2023-09-06 7:58 ` Dmitry Baryshkov
@ 2023-09-06 7:58 ` Dmitry Baryshkov
-1 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 7:58 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa
The commit 39bbf82d8c2b ("phy: qcom-qmp: pcs-usb: Add v6 register
offsets") incorrectly added plain PCS registers to the PCS_USB header.
Move them to a proper location.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 15 ---------------
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 15 +++++++++++++--
2 files changed, 13 insertions(+), 17 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
index 4fbef4eea7b5..7c16af0b1cc3 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
@@ -7,21 +7,6 @@
#define QCOM_PHY_QMP_PCS_USB_V6_H_
/* Only for QMP V6 PHY - USB3 have different offsets than V5 */
-#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0xc4
-#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0xc8
-#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
-#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
-#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
-#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188
-#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
-#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
-#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0
-#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0
-#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4
-#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
-#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc
-#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec
-
#define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
#define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
#define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
index 18c4a3abe590..c95d3fabd108 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
@@ -7,10 +7,21 @@
#define QCOM_PHY_QMP_PCS_V6_H_
/* Only for QMP V6 PHY - USB/PCIe PCS registers */
-#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0x0cc
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0x0d8
+#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0x0dc
#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188
+#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
+#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
#define QPHY_V6_PCS_RATE_SLEW_CNTRL1 0x198
-#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0
+#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0
+#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0
+#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4
#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
+#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc
+#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0
+#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec
#endif
--
2.39.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 3/4] phy: qcom-qmp-usb: move PCS v6 register to the proper header
@ 2023-09-06 7:58 ` Dmitry Baryshkov
0 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 7:58 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa
The commit 39bbf82d8c2b ("phy: qcom-qmp: pcs-usb: Add v6 register
offsets") incorrectly added plain PCS registers to the PCS_USB header.
Move them to a proper location.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 15 ---------------
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 15 +++++++++++++--
2 files changed, 13 insertions(+), 17 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
index 4fbef4eea7b5..7c16af0b1cc3 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
@@ -7,21 +7,6 @@
#define QCOM_PHY_QMP_PCS_USB_V6_H_
/* Only for QMP V6 PHY - USB3 have different offsets than V5 */
-#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0xc4
-#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0xc8
-#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
-#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
-#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
-#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188
-#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
-#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
-#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0
-#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0
-#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4
-#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
-#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc
-#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec
-
#define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
#define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
#define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
index 18c4a3abe590..c95d3fabd108 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
@@ -7,10 +7,21 @@
#define QCOM_PHY_QMP_PCS_V6_H_
/* Only for QMP V6 PHY - USB/PCIe PCS registers */
-#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0x0cc
+#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0x0d8
+#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0x0dc
#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188
+#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
+#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
#define QPHY_V6_PCS_RATE_SLEW_CNTRL1 0x198
-#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0
+#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0
+#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0
+#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4
#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
+#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc
+#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0
+#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec
#endif
--
2.39.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 4/4] phy: qcom-qmp-combo: use v6 registers in v6 regs layout
2023-09-06 7:58 ` Dmitry Baryshkov
@ 2023-09-06 7:58 ` Dmitry Baryshkov
-1 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 7:58 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa
Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 12 ++++++------
drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 ++
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 4 ++++
3 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index bff6231d7de3..9c71a132afea 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -194,14 +194,14 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
};
static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
- [QPHY_SW_RESET] = QPHY_V5_PCS_SW_RESET,
- [QPHY_START_CTRL] = QPHY_V5_PCS_START_CONTROL,
- [QPHY_PCS_STATUS] = QPHY_V5_PCS_PCS_STATUS1,
- [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V5_PCS_POWER_DOWN_CONTROL,
+ [QPHY_SW_RESET] = QPHY_V6_PCS_SW_RESET,
+ [QPHY_START_CTRL] = QPHY_V6_PCS_START_CONTROL,
+ [QPHY_PCS_STATUS] = QPHY_V6_PCS_PCS_STATUS1,
+ [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V6_PCS_POWER_DOWN_CONTROL,
/* In PCS_USB */
- [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL,
- [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
+ [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL,
+ [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
[QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL,
[QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS,
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
index 7c16af0b1cc3..0d0089898240 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
@@ -8,6 +8,8 @@
/* Only for QMP V6 PHY - USB3 have different offsets than V5 */
#define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
+#define QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL 0x08
+#define QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR 0x14
#define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
#define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
index c95d3fabd108..496c36522e55 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
@@ -7,6 +7,10 @@
#define QCOM_PHY_QMP_PCS_V6_H_
/* Only for QMP V6 PHY - USB/PCIe PCS registers */
+#define QPHY_V6_PCS_SW_RESET 0x000
+#define QPHY_V6_PCS_PCS_STATUS1 0x014
+#define QPHY_V6_PCS_POWER_DOWN_CONTROL 0x040
+#define QPHY_V6_PCS_START_CONTROL 0x044
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0x0cc
--
2.39.2
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 4/4] phy: qcom-qmp-combo: use v6 registers in v6 regs layout
@ 2023-09-06 7:58 ` Dmitry Baryshkov
0 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 7:58 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa
Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 12 ++++++------
drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 ++
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 4 ++++
3 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index bff6231d7de3..9c71a132afea 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -194,14 +194,14 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
};
static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
- [QPHY_SW_RESET] = QPHY_V5_PCS_SW_RESET,
- [QPHY_START_CTRL] = QPHY_V5_PCS_START_CONTROL,
- [QPHY_PCS_STATUS] = QPHY_V5_PCS_PCS_STATUS1,
- [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V5_PCS_POWER_DOWN_CONTROL,
+ [QPHY_SW_RESET] = QPHY_V6_PCS_SW_RESET,
+ [QPHY_START_CTRL] = QPHY_V6_PCS_START_CONTROL,
+ [QPHY_PCS_STATUS] = QPHY_V6_PCS_PCS_STATUS1,
+ [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V6_PCS_POWER_DOWN_CONTROL,
/* In PCS_USB */
- [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL,
- [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
+ [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL,
+ [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
[QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL,
[QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS,
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
index 7c16af0b1cc3..0d0089898240 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
@@ -8,6 +8,8 @@
/* Only for QMP V6 PHY - USB3 have different offsets than V5 */
#define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
+#define QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL 0x08
+#define QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR 0x14
#define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
#define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
index c95d3fabd108..496c36522e55 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
@@ -7,6 +7,10 @@
#define QCOM_PHY_QMP_PCS_V6_H_
/* Only for QMP V6 PHY - USB/PCIe PCS registers */
+#define QPHY_V6_PCS_SW_RESET 0x000
+#define QPHY_V6_PCS_PCS_STATUS1 0x014
+#define QPHY_V6_PCS_POWER_DOWN_CONTROL 0x040
+#define QPHY_V6_PCS_START_CONTROL 0x044
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0x0cc
--
2.39.2
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 4/4] phy: qcom-qmp-combo: use v6 registers in v6 regs layout
2023-09-06 7:58 ` Dmitry Baryshkov
@ 2023-09-06 8:01 ` Neil Armstrong
-1 siblings, 0 replies; 18+ messages in thread
From: Neil Armstrong @ 2023-09-06 8:01 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa
On 06/09/2023 09:58, Dmitry Baryshkov wrote:
> Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout.
Why that if the registers are the same as v5 ?
Neil
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 12 ++++++------
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 ++
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 4 ++++
> 3 files changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> index bff6231d7de3..9c71a132afea 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> @@ -194,14 +194,14 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
> };
>
> static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
> - [QPHY_SW_RESET] = QPHY_V5_PCS_SW_RESET,
> - [QPHY_START_CTRL] = QPHY_V5_PCS_START_CONTROL,
> - [QPHY_PCS_STATUS] = QPHY_V5_PCS_PCS_STATUS1,
> - [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V5_PCS_POWER_DOWN_CONTROL,
> + [QPHY_SW_RESET] = QPHY_V6_PCS_SW_RESET,
> + [QPHY_START_CTRL] = QPHY_V6_PCS_START_CONTROL,
> + [QPHY_PCS_STATUS] = QPHY_V6_PCS_PCS_STATUS1,
> + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V6_PCS_POWER_DOWN_CONTROL,
>
> /* In PCS_USB */
> - [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL,
> - [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
> + [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL,
> + [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
>
> [QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL,
> [QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS,
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> index 7c16af0b1cc3..0d0089898240 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> @@ -8,6 +8,8 @@
>
> /* Only for QMP V6 PHY - USB3 have different offsets than V5 */
> #define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
> +#define QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL 0x08
> +#define QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR 0x14
> #define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
> #define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
> #define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> index c95d3fabd108..496c36522e55 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> @@ -7,6 +7,10 @@
> #define QCOM_PHY_QMP_PCS_V6_H_
>
> /* Only for QMP V6 PHY - USB/PCIe PCS registers */
> +#define QPHY_V6_PCS_SW_RESET 0x000
> +#define QPHY_V6_PCS_PCS_STATUS1 0x014
> +#define QPHY_V6_PCS_POWER_DOWN_CONTROL 0x040
> +#define QPHY_V6_PCS_START_CONTROL 0x044
> #define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4
> #define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8
> #define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0x0cc
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/4] phy: qcom-qmp-combo: use v6 registers in v6 regs layout
@ 2023-09-06 8:01 ` Neil Armstrong
0 siblings, 0 replies; 18+ messages in thread
From: Neil Armstrong @ 2023-09-06 8:01 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa
On 06/09/2023 09:58, Dmitry Baryshkov wrote:
> Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout.
Why that if the registers are the same as v5 ?
Neil
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 12 ++++++------
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 ++
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 4 ++++
> 3 files changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> index bff6231d7de3..9c71a132afea 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> @@ -194,14 +194,14 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
> };
>
> static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
> - [QPHY_SW_RESET] = QPHY_V5_PCS_SW_RESET,
> - [QPHY_START_CTRL] = QPHY_V5_PCS_START_CONTROL,
> - [QPHY_PCS_STATUS] = QPHY_V5_PCS_PCS_STATUS1,
> - [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V5_PCS_POWER_DOWN_CONTROL,
> + [QPHY_SW_RESET] = QPHY_V6_PCS_SW_RESET,
> + [QPHY_START_CTRL] = QPHY_V6_PCS_START_CONTROL,
> + [QPHY_PCS_STATUS] = QPHY_V6_PCS_PCS_STATUS1,
> + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V6_PCS_POWER_DOWN_CONTROL,
>
> /* In PCS_USB */
> - [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL,
> - [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
> + [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL,
> + [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
>
> [QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL,
> [QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS,
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> index 7c16af0b1cc3..0d0089898240 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> @@ -8,6 +8,8 @@
>
> /* Only for QMP V6 PHY - USB3 have different offsets than V5 */
> #define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
> +#define QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL 0x08
> +#define QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR 0x14
> #define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
> #define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
> #define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> index c95d3fabd108..496c36522e55 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> @@ -7,6 +7,10 @@
> #define QCOM_PHY_QMP_PCS_V6_H_
>
> /* Only for QMP V6 PHY - USB/PCIe PCS registers */
> +#define QPHY_V6_PCS_SW_RESET 0x000
> +#define QPHY_V6_PCS_PCS_STATUS1 0x014
> +#define QPHY_V6_PCS_POWER_DOWN_CONTROL 0x040
> +#define QPHY_V6_PCS_START_CONTROL 0x044
> #define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4
> #define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8
> #define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0x0cc
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/4] phy: qcom-qmp-combo: correct sm8550 PHY programming
2023-09-06 7:58 ` Dmitry Baryshkov
@ 2023-09-06 8:02 ` Neil Armstrong
-1 siblings, 0 replies; 18+ messages in thread
From: Neil Armstrong @ 2023-09-06 8:02 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa, stable
On 06/09/2023 09:58, Dmitry Baryshkov wrote:
> Move PCS_USB3_POWER_STATE_CONFIG1 register programming from pcs_tbl to
> the pcs_usb_tbl, where it belongs. Also, while we are at it, correct the
> offset of this register to point to 0x00, as expected.
Konrad already sent this https://lore.kernel.org/all/20230829-topic-8550_usbphy-v1-1-599ddbfa094a@linaro.org/
>
> Fixes: 49742e9edab3 ("phy: qcom-qmp-combo: Add support for SM8550")
> Fixes: 39bbf82d8c2b ("phy: qcom-qmp: pcs-usb: Add v6 register offsets")
> Cc: Abel Vesa <abel.vesa@linaro.org>
> Cc: stable@vger.kernel.org
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 2 +-
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> index cbb28afce135..41b9be56eead 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> @@ -859,7 +859,6 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = {
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b),
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10),
> - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
> };
>
> static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
> @@ -867,6 +866,7 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
> + QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
> };
>
> static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = {
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> index 9510e63ba9d8..5409ddcd3eb5 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> @@ -12,7 +12,6 @@
> #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
> #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
> #define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
> -#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x90
> #define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188
> #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
> #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
> @@ -23,6 +22,7 @@
> #define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc
> #define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec
>
> +#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
> #define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
> #define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
> #define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/4] phy: qcom-qmp-combo: correct sm8550 PHY programming
@ 2023-09-06 8:02 ` Neil Armstrong
0 siblings, 0 replies; 18+ messages in thread
From: Neil Armstrong @ 2023-09-06 8:02 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Vinod Koul, Kishon Vijay Abraham I
Cc: Philipp Zabel, linux-arm-msm, linux-phy, Abel Vesa, stable
On 06/09/2023 09:58, Dmitry Baryshkov wrote:
> Move PCS_USB3_POWER_STATE_CONFIG1 register programming from pcs_tbl to
> the pcs_usb_tbl, where it belongs. Also, while we are at it, correct the
> offset of this register to point to 0x00, as expected.
Konrad already sent this https://lore.kernel.org/all/20230829-topic-8550_usbphy-v1-1-599ddbfa094a@linaro.org/
>
> Fixes: 49742e9edab3 ("phy: qcom-qmp-combo: Add support for SM8550")
> Fixes: 39bbf82d8c2b ("phy: qcom-qmp: pcs-usb: Add v6 register offsets")
> Cc: Abel Vesa <abel.vesa@linaro.org>
> Cc: stable@vger.kernel.org
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 2 +-
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> index cbb28afce135..41b9be56eead 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> @@ -859,7 +859,6 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = {
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b),
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10),
> - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
> };
>
> static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
> @@ -867,6 +866,7 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
> QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
> + QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
> };
>
> static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = {
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> index 9510e63ba9d8..5409ddcd3eb5 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> @@ -12,7 +12,6 @@
> #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
> #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
> #define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
> -#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x90
> #define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188
> #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
> #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
> @@ -23,6 +22,7 @@
> #define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc
> #define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec
>
> +#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
> #define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
> #define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
> #define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/4] phy: qcom-qmp-combo: correct sm8550 PHY programming
2023-09-06 8:02 ` Neil Armstrong
@ 2023-09-06 8:24 ` Dmitry Baryshkov
-1 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 8:24 UTC (permalink / raw)
To: neil.armstrong
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Philipp Zabel, linux-arm-msm, linux-phy,
Abel Vesa, stable
On Wed, 6 Sept 2023 at 11:02, Neil Armstrong <neil.armstrong@linaro.org> wrote:
>
> On 06/09/2023 09:58, Dmitry Baryshkov wrote:
> > Move PCS_USB3_POWER_STATE_CONFIG1 register programming from pcs_tbl to
> > the pcs_usb_tbl, where it belongs. Also, while we are at it, correct the
> > offset of this register to point to 0x00, as expected.
>
> Konrad already sent this https://lore.kernel.org/all/20230829-topic-8550_usbphy-v1-1-599ddbfa094a@linaro.org/
Not quite. Or we'd need to land a separate fix for the register address.
>
> >
> > Fixes: 49742e9edab3 ("phy: qcom-qmp-combo: Add support for SM8550")
> > Fixes: 39bbf82d8c2b ("phy: qcom-qmp: pcs-usb: Add v6 register offsets")
> > Cc: Abel Vesa <abel.vesa@linaro.org>
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> > drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 2 +-
> > drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 +-
> > 2 files changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > index cbb28afce135..41b9be56eead 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > @@ -859,7 +859,6 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = {
> > QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
> > QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b),
> > QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10),
> > - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
> > };
> >
> > static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
> > @@ -867,6 +866,7 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
> > QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
> > QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
> > QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
> > + QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
> > };
> >
> > static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = {
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > index 9510e63ba9d8..5409ddcd3eb5 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > @@ -12,7 +12,6 @@
> > #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
> > #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
> > #define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
> > -#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x90
> > #define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188
> > #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
> > #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
> > @@ -23,6 +22,7 @@
> > #define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc
> > #define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec
> >
> > +#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
> > #define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
> > #define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
> > #define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/4] phy: qcom-qmp-combo: correct sm8550 PHY programming
@ 2023-09-06 8:24 ` Dmitry Baryshkov
0 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 8:24 UTC (permalink / raw)
To: neil.armstrong
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Philipp Zabel, linux-arm-msm, linux-phy,
Abel Vesa, stable
On Wed, 6 Sept 2023 at 11:02, Neil Armstrong <neil.armstrong@linaro.org> wrote:
>
> On 06/09/2023 09:58, Dmitry Baryshkov wrote:
> > Move PCS_USB3_POWER_STATE_CONFIG1 register programming from pcs_tbl to
> > the pcs_usb_tbl, where it belongs. Also, while we are at it, correct the
> > offset of this register to point to 0x00, as expected.
>
> Konrad already sent this https://lore.kernel.org/all/20230829-topic-8550_usbphy-v1-1-599ddbfa094a@linaro.org/
Not quite. Or we'd need to land a separate fix for the register address.
>
> >
> > Fixes: 49742e9edab3 ("phy: qcom-qmp-combo: Add support for SM8550")
> > Fixes: 39bbf82d8c2b ("phy: qcom-qmp: pcs-usb: Add v6 register offsets")
> > Cc: Abel Vesa <abel.vesa@linaro.org>
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> > drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 2 +-
> > drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 +-
> > 2 files changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > index cbb28afce135..41b9be56eead 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > @@ -859,7 +859,6 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = {
> > QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
> > QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b),
> > QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10),
> > - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
> > };
> >
> > static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
> > @@ -867,6 +866,7 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
> > QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
> > QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
> > QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
> > + QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
> > };
> >
> > static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = {
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > index 9510e63ba9d8..5409ddcd3eb5 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > @@ -12,7 +12,6 @@
> > #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
> > #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
> > #define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
> > -#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x90
> > #define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188
> > #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
> > #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
> > @@ -23,6 +22,7 @@
> > #define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc
> > #define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec
> >
> > +#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
> > #define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
> > #define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
> > #define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
>
--
With best wishes
Dmitry
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/4] phy: qcom-qmp-combo: use v6 registers in v6 regs layout
2023-09-06 8:01 ` Neil Armstrong
@ 2023-09-06 8:25 ` Dmitry Baryshkov
-1 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 8:25 UTC (permalink / raw)
To: neil.armstrong
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Philipp Zabel, linux-arm-msm, linux-phy,
Abel Vesa
On Wed, 6 Sept 2023 at 11:01, Neil Armstrong <neil.armstrong@linaro.org> wrote:
>
> On 06/09/2023 09:58, Dmitry Baryshkov wrote:
> > Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout.
>
> Why that if the registers are the same as v5 ?
Because otherwise it is too easy to use the incorrect register when
adding a new register to the regs layout. Been there.
>
> Neil
>
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> > drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 12 ++++++------
> > drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 ++
> > drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 4 ++++
> > 3 files changed, 12 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > index bff6231d7de3..9c71a132afea 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > @@ -194,14 +194,14 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
> > };
> >
> > static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
> > - [QPHY_SW_RESET] = QPHY_V5_PCS_SW_RESET,
> > - [QPHY_START_CTRL] = QPHY_V5_PCS_START_CONTROL,
> > - [QPHY_PCS_STATUS] = QPHY_V5_PCS_PCS_STATUS1,
> > - [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V5_PCS_POWER_DOWN_CONTROL,
> > + [QPHY_SW_RESET] = QPHY_V6_PCS_SW_RESET,
> > + [QPHY_START_CTRL] = QPHY_V6_PCS_START_CONTROL,
> > + [QPHY_PCS_STATUS] = QPHY_V6_PCS_PCS_STATUS1,
> > + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V6_PCS_POWER_DOWN_CONTROL,
> >
> > /* In PCS_USB */
> > - [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL,
> > - [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
> > + [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL,
> > + [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
> >
> > [QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL,
> > [QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS,
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > index 7c16af0b1cc3..0d0089898240 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > @@ -8,6 +8,8 @@
> >
> > /* Only for QMP V6 PHY - USB3 have different offsets than V5 */
> > #define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
> > +#define QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL 0x08
> > +#define QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR 0x14
> > #define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
> > #define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
> > #define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> > index c95d3fabd108..496c36522e55 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> > @@ -7,6 +7,10 @@
> > #define QCOM_PHY_QMP_PCS_V6_H_
> >
> > /* Only for QMP V6 PHY - USB/PCIe PCS registers */
> > +#define QPHY_V6_PCS_SW_RESET 0x000
> > +#define QPHY_V6_PCS_PCS_STATUS1 0x014
> > +#define QPHY_V6_PCS_POWER_DOWN_CONTROL 0x040
> > +#define QPHY_V6_PCS_START_CONTROL 0x044
> > #define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4
> > #define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8
> > #define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0x0cc
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/4] phy: qcom-qmp-combo: use v6 registers in v6 regs layout
@ 2023-09-06 8:25 ` Dmitry Baryshkov
0 siblings, 0 replies; 18+ messages in thread
From: Dmitry Baryshkov @ 2023-09-06 8:25 UTC (permalink / raw)
To: neil.armstrong
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Philipp Zabel, linux-arm-msm, linux-phy,
Abel Vesa
On Wed, 6 Sept 2023 at 11:01, Neil Armstrong <neil.armstrong@linaro.org> wrote:
>
> On 06/09/2023 09:58, Dmitry Baryshkov wrote:
> > Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout.
>
> Why that if the registers are the same as v5 ?
Because otherwise it is too easy to use the incorrect register when
adding a new register to the regs layout. Been there.
>
> Neil
>
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> > drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 12 ++++++------
> > drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 ++
> > drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 4 ++++
> > 3 files changed, 12 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > index bff6231d7de3..9c71a132afea 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > @@ -194,14 +194,14 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
> > };
> >
> > static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
> > - [QPHY_SW_RESET] = QPHY_V5_PCS_SW_RESET,
> > - [QPHY_START_CTRL] = QPHY_V5_PCS_START_CONTROL,
> > - [QPHY_PCS_STATUS] = QPHY_V5_PCS_PCS_STATUS1,
> > - [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V5_PCS_POWER_DOWN_CONTROL,
> > + [QPHY_SW_RESET] = QPHY_V6_PCS_SW_RESET,
> > + [QPHY_START_CTRL] = QPHY_V6_PCS_START_CONTROL,
> > + [QPHY_PCS_STATUS] = QPHY_V6_PCS_PCS_STATUS1,
> > + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V6_PCS_POWER_DOWN_CONTROL,
> >
> > /* In PCS_USB */
> > - [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL,
> > - [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
> > + [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL,
> > + [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
> >
> > [QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL,
> > [QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS,
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > index 7c16af0b1cc3..0d0089898240 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > @@ -8,6 +8,8 @@
> >
> > /* Only for QMP V6 PHY - USB3 have different offsets than V5 */
> > #define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
> > +#define QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL 0x08
> > +#define QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR 0x14
> > #define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
> > #define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
> > #define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> > index c95d3fabd108..496c36522e55 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> > @@ -7,6 +7,10 @@
> > #define QCOM_PHY_QMP_PCS_V6_H_
> >
> > /* Only for QMP V6 PHY - USB/PCIe PCS registers */
> > +#define QPHY_V6_PCS_SW_RESET 0x000
> > +#define QPHY_V6_PCS_PCS_STATUS1 0x014
> > +#define QPHY_V6_PCS_POWER_DOWN_CONTROL 0x040
> > +#define QPHY_V6_PCS_START_CONTROL 0x044
> > #define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4
> > #define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8
> > #define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0x0cc
>
--
With best wishes
Dmitry
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2023-09-06 11:15 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-09-06 7:58 [PATCH 0/4] phy: qcom-qmp-combo: correct sm8550 PHY programming Dmitry Baryshkov
2023-09-06 7:58 ` Dmitry Baryshkov
2023-09-06 7:58 ` [PATCH 1/4] " Dmitry Baryshkov
2023-09-06 7:58 ` Dmitry Baryshkov
2023-09-06 8:02 ` Neil Armstrong
2023-09-06 8:02 ` Neil Armstrong
2023-09-06 8:24 ` Dmitry Baryshkov
2023-09-06 8:24 ` Dmitry Baryshkov
2023-09-06 7:58 ` [PATCH 2/4] phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers Dmitry Baryshkov
2023-09-06 7:58 ` Dmitry Baryshkov
2023-09-06 7:58 ` [PATCH 3/4] phy: qcom-qmp-usb: move PCS v6 register to the proper header Dmitry Baryshkov
2023-09-06 7:58 ` Dmitry Baryshkov
2023-09-06 7:58 ` [PATCH 4/4] phy: qcom-qmp-combo: use v6 registers in v6 regs layout Dmitry Baryshkov
2023-09-06 7:58 ` Dmitry Baryshkov
2023-09-06 8:01 ` Neil Armstrong
2023-09-06 8:01 ` Neil Armstrong
2023-09-06 8:25 ` Dmitry Baryshkov
2023-09-06 8:25 ` Dmitry Baryshkov
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