* [PATCH] usb: dwc3: Soft reset phy on probe for host
@ 2023-09-13 0:52 Thinh Nguyen
2023-09-13 0:57 ` Thinh Nguyen
2023-10-03 14:49 ` Dang Huynh
0 siblings, 2 replies; 7+ messages in thread
From: Thinh Nguyen @ 2023-09-13 0:52 UTC (permalink / raw)
To: Greg Kroah-Hartman, Thinh Nguyen, Jisheng Zhang, Kenta Sato
Cc: John Youn, linux-usb, stable, Manu Gautam, Roger Quadros
When there's phy initialization, we need to initiate a soft-reset
sequence. That's done through USBCMD.HCRST in the xHCI driver and its
initialization, However, the dwc3 driver may modify core configs before
the soft-reset. This may result in some connection instability. So,
ensure the phy is ready before the controller updates the GCTL.PRTCAPDIR
or other settings by issuing phy soft-reset.
Note that some host-mode configurations may not expose device registers
to initiate the controller soft-reset (via DCTL.CoreSftRst). So we reset
through GUSB3PIPECTL and GUSB2PHYCFG instead.
Cc: stable@vger.kernel.org
Fixes: e835c0a4e23c ("usb: dwc3: don't reset device side if dwc3 was configured as host-only")
Reported-by: Kenta Sato <tosainu.maple@gmail.com>
Closes: https://lore.kernel.org/linux-usb/ZPUciRLUcjDywMVS@debian.me/
Signed-off-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
---
drivers/usb/dwc3/core.c | 39 ++++++++++++++++++++++++++++++++++++++-
1 file changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 9c6bf054f15d..343d2570189f 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -279,9 +279,46 @@ int dwc3_core_soft_reset(struct dwc3 *dwc)
* XHCI driver will reset the host block. If dwc3 was configured for
* host-only mode or current role is host, then we can return early.
*/
- if (dwc->dr_mode == USB_DR_MODE_HOST || dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST)
+ if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST)
return 0;
+ /*
+ * If the dr_mode is host and the dwc->current_dr_role is not the
+ * corresponding DWC3_GCTL_PRTCAP_HOST, then the dwc3_core_init_mode
+ * isn't executed yet. Ensure the phy is ready before the controller
+ * updates the GCTL.PRTCAPDIR or other settings by soft-resetting
+ * the phy.
+ *
+ * Note: GUSB3PIPECTL[n] and GUSB2PHYCFG[n] are port settings where n
+ * is port index. If this is a multiport host, then we need to reset
+ * all active ports.
+ */
+ if (dwc->dr_mode == USB_DR_MODE_HOST) {
+ u32 usb3_port;
+ u32 usb2_port;
+
+ usb3_port = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
+ usb3_port |= DWC3_GUSB3PIPECTL_PHYSOFTRST;
+ dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), usb3_port);
+
+ usb2_port = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
+ usb2_port |= DWC3_GUSB2PHYCFG_PHYSOFTRST;
+ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), usb2_port);
+
+ /* Small delay for phy reset assertion */
+ usleep_range(1000, 2000);
+
+ usb3_port &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST;
+ dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), usb3_port);
+
+ usb2_port &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
+ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), usb2_port);
+
+ /* Wait for clock synchronization */
+ msleep(50);
+ return 0;
+ }
+
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
reg |= DWC3_DCTL_CSFTRST;
reg &= ~DWC3_DCTL_RUN_STOP;
base-commit: 0bb80ecc33a8fb5a682236443c1e740d5c917d1d
--
2.38.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] usb: dwc3: Soft reset phy on probe for host
2023-09-13 0:52 [PATCH] usb: dwc3: Soft reset phy on probe for host Thinh Nguyen
@ 2023-09-13 0:57 ` Thinh Nguyen
2023-09-13 17:31 ` Kenta Sato
2023-10-03 14:49 ` Dang Huynh
1 sibling, 1 reply; 7+ messages in thread
From: Thinh Nguyen @ 2023-09-13 0:57 UTC (permalink / raw)
To: Kenta Sato
Cc: Greg Kroah-Hartman, Jisheng Zhang, John Youn, linux-usb, stable,
Roger Quadros
Hi Kenta,
On Wed, Sep 13, 2023, Thinh Nguyen wrote:
> When there's phy initialization, we need to initiate a soft-reset
> sequence. That's done through USBCMD.HCRST in the xHCI driver and its
> initialization, However, the dwc3 driver may modify core configs before
> the soft-reset. This may result in some connection instability. So,
> ensure the phy is ready before the controller updates the GCTL.PRTCAPDIR
> or other settings by issuing phy soft-reset.
>
> Note that some host-mode configurations may not expose device registers
> to initiate the controller soft-reset (via DCTL.CoreSftRst). So we reset
> through GUSB3PIPECTL and GUSB2PHYCFG instead.
>
> Cc: stable@vger.kernel.org
> Fixes: e835c0a4e23c ("usb: dwc3: don't reset device side if dwc3 was configured as host-only")
> Reported-by: Kenta Sato <tosainu.maple@gmail.com>
> Closes: https://lore.kernel.org/linux-usb/ZPUciRLUcjDywMVS@debian.me/
> Signed-off-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
> ---
> drivers/usb/dwc3/core.c | 39 ++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 38 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 9c6bf054f15d..343d2570189f 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -279,9 +279,46 @@ int dwc3_core_soft_reset(struct dwc3 *dwc)
> * XHCI driver will reset the host block. If dwc3 was configured for
> * host-only mode or current role is host, then we can return early.
> */
> - if (dwc->dr_mode == USB_DR_MODE_HOST || dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST)
> + if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST)
> return 0;
>
> + /*
> + * If the dr_mode is host and the dwc->current_dr_role is not the
> + * corresponding DWC3_GCTL_PRTCAP_HOST, then the dwc3_core_init_mode
> + * isn't executed yet. Ensure the phy is ready before the controller
> + * updates the GCTL.PRTCAPDIR or other settings by soft-resetting
> + * the phy.
> + *
> + * Note: GUSB3PIPECTL[n] and GUSB2PHYCFG[n] are port settings where n
> + * is port index. If this is a multiport host, then we need to reset
> + * all active ports.
> + */
> + if (dwc->dr_mode == USB_DR_MODE_HOST) {
> + u32 usb3_port;
> + u32 usb2_port;
> +
> + usb3_port = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
> + usb3_port |= DWC3_GUSB3PIPECTL_PHYSOFTRST;
> + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), usb3_port);
> +
> + usb2_port = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
> + usb2_port |= DWC3_GUSB2PHYCFG_PHYSOFTRST;
> + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), usb2_port);
> +
> + /* Small delay for phy reset assertion */
> + usleep_range(1000, 2000);
> +
> + usb3_port &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST;
> + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), usb3_port);
> +
> + usb2_port &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
> + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), usb2_port);
> +
> + /* Wait for clock synchronization */
> + msleep(50);
> + return 0;
> + }
> +
> reg = dwc3_readl(dwc->regs, DWC3_DCTL);
> reg |= DWC3_DCTL_CSFTRST;
> reg &= ~DWC3_DCTL_RUN_STOP;
>
> base-commit: 0bb80ecc33a8fb5a682236443c1e740d5c917d1d
> --
> 2.38.1
Can you verify again using this updated patch? If it works, can you add
a Tested-by tag?
Thanks!
Thinh
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] usb: dwc3: Soft reset phy on probe for host
2023-09-13 0:57 ` Thinh Nguyen
@ 2023-09-13 17:31 ` Kenta Sato
0 siblings, 0 replies; 7+ messages in thread
From: Kenta Sato @ 2023-09-13 17:31 UTC (permalink / raw)
To: Thinh Nguyen
Cc: Greg Kroah-Hartman, Jisheng Zhang, John Youn, linux-usb, stable,
Roger Quadros
[-- Attachment #1: Type: text/plain, Size: 4197 bytes --]
On Wed, Sep 13, 2023 at 9:57 AM Thinh Nguyen <Thinh.Nguyen@synopsys.com> wrote:
>
> Hi Kenta,
>
> On Wed, Sep 13, 2023, Thinh Nguyen wrote:
> > When there's phy initialization, we need to initiate a soft-reset
> > sequence. That's done through USBCMD.HCRST in the xHCI driver and its
> > initialization, However, the dwc3 driver may modify core configs before
> > the soft-reset. This may result in some connection instability. So,
> > ensure the phy is ready before the controller updates the GCTL.PRTCAPDIR
> > or other settings by issuing phy soft-reset.
> >
> > Note that some host-mode configurations may not expose device registers
> > to initiate the controller soft-reset (via DCTL.CoreSftRst). So we reset
> > through GUSB3PIPECTL and GUSB2PHYCFG instead.
> >
> > Cc: stable@vger.kernel.org
> > Fixes: e835c0a4e23c ("usb: dwc3: don't reset device side if dwc3 was configured as host-only")
> > Reported-by: Kenta Sato <tosainu.maple@gmail.com>
> > Closes: https://lore.kernel.org/linux-usb/ZPUciRLUcjDywMVS@debian.me/
> > Signed-off-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
> > ---
> > drivers/usb/dwc3/core.c | 39 ++++++++++++++++++++++++++++++++++++++-
> > 1 file changed, 38 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> > index 9c6bf054f15d..343d2570189f 100644
> > --- a/drivers/usb/dwc3/core.c
> > +++ b/drivers/usb/dwc3/core.c
> > @@ -279,9 +279,46 @@ int dwc3_core_soft_reset(struct dwc3 *dwc)
> > * XHCI driver will reset the host block. If dwc3 was configured for
> > * host-only mode or current role is host, then we can return early.
> > */
> > - if (dwc->dr_mode == USB_DR_MODE_HOST || dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST)
> > + if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST)
> > return 0;
> >
> > + /*
> > + * If the dr_mode is host and the dwc->current_dr_role is not the
> > + * corresponding DWC3_GCTL_PRTCAP_HOST, then the dwc3_core_init_mode
> > + * isn't executed yet. Ensure the phy is ready before the controller
> > + * updates the GCTL.PRTCAPDIR or other settings by soft-resetting
> > + * the phy.
> > + *
> > + * Note: GUSB3PIPECTL[n] and GUSB2PHYCFG[n] are port settings where n
> > + * is port index. If this is a multiport host, then we need to reset
> > + * all active ports.
> > + */
> > + if (dwc->dr_mode == USB_DR_MODE_HOST) {
> > + u32 usb3_port;
> > + u32 usb2_port;
> > +
> > + usb3_port = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
> > + usb3_port |= DWC3_GUSB3PIPECTL_PHYSOFTRST;
> > + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), usb3_port);
> > +
> > + usb2_port = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
> > + usb2_port |= DWC3_GUSB2PHYCFG_PHYSOFTRST;
> > + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), usb2_port);
> > +
> > + /* Small delay for phy reset assertion */
> > + usleep_range(1000, 2000);
> > +
> > + usb3_port &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST;
> > + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), usb3_port);
> > +
> > + usb2_port &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
> > + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), usb2_port);
> > +
> > + /* Wait for clock synchronization */
> > + msleep(50);
> > + return 0;
> > + }
> > +
> > reg = dwc3_readl(dwc->regs, DWC3_DCTL);
> > reg |= DWC3_DCTL_CSFTRST;
> > reg &= ~DWC3_DCTL_RUN_STOP;
> >
> > base-commit: 0bb80ecc33a8fb5a682236443c1e740d5c917d1d
> > --
> > 2.38.1
>
> Can you verify again using this updated patch? If it works, can you add
> a Tested-by tag?
Hi Thinh,
I tried your updated patch and verified that the kernel detects the
USB devices correctly at every boot while I was testing. I would say
the issue seems to be solved. I attached the boot log for your
information.
Tested-by: Kenta Sato <tosainu.maple@gmail.com>
Thank you so much!
Kenta
>
> Thanks!
> Thinh
[-- Attachment #2: dmesg.log --]
[-- Type: text/x-log, Size: 24259 bytes --]
[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[ 0.000000] Linux version 6.6.0-rc1-dwc3test+ (cocoa@cumin) (aarch64-linux-gnu-gcc (GCC) 13.2.0, GNU ld (GNU Binutils) 2.41) #2 SMP Wed Sep 13 23:48:09 JST 2023
[ 0.000000] Machine model: FriendlyElec NanoPi R4S
[ 0.000000] earlycon: uart0 at MMIO32 0x00000000ff1a0000 (options '1500000n8')
[ 0.000000] printk: bootconsole [uart0] enabled
[ 0.000000] Zone ranges:
[ 0.000000] DMA [mem 0x0000000000200000-0x00000000f7ffffff]
[ 0.000000] DMA32 empty
[ 0.000000] Normal empty
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000200000-0x00000000f7ffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000200000-0x00000000f7ffffff]
[ 0.000000] On node 0, zone DMA: 512 pages in unavailable ranges
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.1 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
[ 0.000000] psci: SMC Calling Convention v1.4
[ 0.000000] percpu: Embedded 17 pages/cpu s38304 r0 d31328 u69632
[ 0.000000] pcpu-alloc: s38304 r0 d31328 u69632 alloc=17*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5
[ 0.000000] Detected VIPT I-cache on CPU0
[ 0.000000] CPU features: detected: GIC system register CPU interface
[ 0.000000] CPU features: detected: ARM erratum 845719
[ 0.000000] alternatives: applying boot alternatives
[ 0.000000] Kernel command line: earlycon console=ttyS2,1500000n8 rdinit=/sbin/init
[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 999432
[ 0.000000] mem auto-init: stack:all(zero), heap alloc:on, heap free:off
[ 0.000000] software IO TLB: area num 8.
[ 0.000000] software IO TLB: mapped [mem 0x00000000ede00000-0x00000000f1e00000] (64MB)
[ 0.000000] Memory: 3897320K/4061184K available (8512K kernel code, 1556K rwdata, 2908K rodata, 2432K init, 514K bss, 163864K reserved, 0K cma-reserved)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=6, Nodes=1
[ 0.000000] rcu: Hierarchical RCU implementation.
[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=6.
[ 0.000000] Tracing variant of Tasks RCU enabled.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies.
[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=6
[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
[ 0.000000] GICv3: 256 SPIs implemented
[ 0.000000] GICv3: 0 Extended SPIs implemented
[ 0.000000] Root IRQ handler: gic_handle_irq
[ 0.000000] GICv3: GICv3 features: 16 PPIs
[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x00000000fef00000
[ 0.000000] ITS [mem 0xfee20000-0xfee3ffff]
[ 0.000000] ITS@0x00000000fee20000: allocated 65536 Devices @480000 (flat, esz 8, psz 64K, shr 0)
[ 0.000000] ITS: using cache flushing for cmd queue
[ 0.000000] GICv3: using LPI property table @0x0000000000460000
[ 0.000000] GIC: using cache flushing for LPI property table
[ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000000470000
[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] }
[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[ 0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys).
[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns
[ 0.000001] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns
[ 0.002589] Console: colour dummy device 80x25
[ 0.003080] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=24000)
[ 0.004076] pid_max: default: 32768 minimum: 301
[ 0.009944] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
[ 0.010700] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
[ 0.015293] cacheinfo: Unable to detect cache hierarchy for CPU 0
[ 0.017198] RCU Tasks Trace: Setting shift to 3 and lim to 1 rcu_task_cb_adjust=1.
[ 0.018314] rcu: Hierarchical SRCU implementation.
[ 0.018781] rcu: Max phase no-delay instances is 400.
[ 0.020127] Platform MSI: msi-controller@fee20000 domain created
[ 0.021188] PCI/MSI: /interrupt-controller@fee00000/msi-controller@fee20000 domain created
[ 0.023614] smp: Bringing up secondary CPUs ...
[ 0.024993] Detected VIPT I-cache on CPU1
[ 0.025091] GICv3: CPU1: found redistributor 1 region 0:0x00000000fef20000
[ 0.025115] GICv3: CPU1: using allocated LPI pending table @0x0000000000500000
[ 0.025179] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
[ 0.026173] Detected VIPT I-cache on CPU2
[ 0.026243] GICv3: CPU2: found redistributor 2 region 0:0x00000000fef40000
[ 0.026261] GICv3: CPU2: using allocated LPI pending table @0x0000000000510000
[ 0.026303] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
[ 0.027259] Detected VIPT I-cache on CPU3
[ 0.027325] GICv3: CPU3: found redistributor 3 region 0:0x00000000fef60000
[ 0.027344] GICv3: CPU3: using allocated LPI pending table @0x0000000000520000
[ 0.027382] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
[ 0.028337] CPU features: detected: Spectre-v2
[ 0.028352] CPU features: detected: Spectre-BHB
[ 0.028362] Detected PIPT I-cache on CPU4
[ 0.028437] GICv3: CPU4: found redistributor 100 region 0:0x00000000fef80000
[ 0.028456] GICv3: CPU4: using allocated LPI pending table @0x0000000000530000
[ 0.028500] CPU4: Booted secondary processor 0x0000000100 [0x410fd082]
[ 0.029530] Detected PIPT I-cache on CPU5
[ 0.029593] GICv3: CPU5: found redistributor 101 region 0:0x00000000fefa0000
[ 0.029612] GICv3: CPU5: using allocated LPI pending table @0x0000000000540000
[ 0.029647] CPU5: Booted secondary processor 0x0000000101 [0x410fd082]
[ 0.029782] smp: Brought up 1 node, 6 CPUs
[ 0.042808] SMP: Total of 6 processors activated.
[ 0.043267] CPU features: detected: 32-bit EL0 Support
[ 0.043767] CPU features: detected: CRC32 instructions
[ 0.044407] CPU: All CPU(s) started at EL2
[ 0.044822] alternatives: applying system-wide alternatives
[ 0.049273] devtmpfs: initialized
[ 0.063818] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
[ 0.064793] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
[ 0.067949] pinctrl core: initialized pinctrl subsystem
[ 0.070302] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
[ 0.071245] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
[ 0.072251] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[ 0.074198] thermal_sys: Registered thermal governor 'fair_share'
[ 0.074207] thermal_sys: Registered thermal governor 'bang_bang'
[ 0.074783] thermal_sys: Registered thermal governor 'step_wise'
[ 0.075359] thermal_sys: Registered thermal governor 'user_space'
[ 0.075925] thermal_sys: Registered thermal governor 'power_allocator'
[ 0.076716] cpuidle: using governor ladder
[ 0.077989] cpuidle: using governor menu
[ 0.078508] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[ 0.079347] ASID allocator initialised with 65536 entries
[ 0.080719] Serial: AMBA PL011 UART driver
[ 0.105952] platform ff940000.hdmi: Fixed dependency cycle(s) with /vop@ff8f0000/port/endpoint@2
[ 0.106821] platform ff940000.hdmi: Fixed dependency cycle(s) with /vop@ff900000/port/endpoint@2
[ 0.114606] gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation.
[ 0.116094] rockchip-gpio ff720000.gpio: probed /pinctrl/gpio@ff720000
[ 0.117228] gpio gpiochip1: Static allocation of GPIO base is deprecated, use dynamic allocation.
[ 0.118342] rockchip-gpio ff730000.gpio: probed /pinctrl/gpio@ff730000
[ 0.119319] gpio gpiochip2: Static allocation of GPIO base is deprecated, use dynamic allocation.
[ 0.120418] rockchip-gpio ff780000.gpio: probed /pinctrl/gpio@ff780000
[ 0.121438] gpio gpiochip3: Static allocation of GPIO base is deprecated, use dynamic allocation.
[ 0.122531] rockchip-gpio ff788000.gpio: probed /pinctrl/gpio@ff788000
[ 0.123480] gpio gpiochip4: Static allocation of GPIO base is deprecated, use dynamic allocation.
[ 0.124572] rockchip-gpio ff790000.gpio: probed /pinctrl/gpio@ff790000
[ 0.131105] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
[ 0.131765] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
[ 0.132359] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
[ 0.133004] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
[ 0.133597] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
[ 0.134240] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
[ 0.134832] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
[ 0.135480] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
[ 0.137400] cryptd: max_cpu_qlen set to 1000
[ 0.139708] iommu: Default domain type: Translated
[ 0.140184] iommu: DMA domain TLB invalidation policy: strict mode
[ 0.141577] SCSI subsystem initialized
[ 0.142127] libata version 3.00 loaded.
[ 0.142323] usbcore: registered new interface driver usbfs
[ 0.142868] usbcore: registered new interface driver hub
[ 0.143414] usbcore: registered new device driver usb
[ 0.144305] EDAC MC: Ver: 3.0.0
[ 0.145198] scmi_core: SCMI protocol bus registered
[ 0.146318] clocksource: Switched to clocksource arch_sys_counter
[ 0.161070] PCI: CLS 0 bytes, default 64
[ 0.161880] Unpacking initramfs...
[ 0.171193] workingset: timestamp_bits=62 max_order=20 bucket_order=0
[ 0.171870] zbud: loaded
[ 0.231179] xor: measuring software checksum speed
[ 0.235046] 8regs : 2906 MB/sec
[ 0.238624] 32regs : 3125 MB/sec
[ 0.242918] arm64_neon : 2541 MB/sec
[ 0.243342] xor: using function: 32regs (3125 MB/sec)
[ 0.243841] async_tx: api initialized (async)
[ 0.244397] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)
[ 0.245107] io scheduler mq-deadline registered
[ 0.245555] io scheduler kyber registered
[ 0.246179] io scheduler bfq registered
[ 0.268465] dma-pl330 ff6d0000.dma-controller: Loaded driver for PL330 DMAC-241330
[ 0.269199] dma-pl330 ff6d0000.dma-controller: DBUFF-32x8bytes Num_Chans-6 Num_Peri-12 Num_Events-12
[ 0.271791] dma-pl330 ff6e0000.dma-controller: Loaded driver for PL330 DMAC-241330
[ 0.272535] dma-pl330 ff6e0000.dma-controller: DBUFF-128x8bytes Num_Chans-8 Num_Peri-20 Num_Events-16
[ 0.276035] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[ 0.280038] printk: console [ttyS2] disabled
[ 0.280809] ff1a0000.serial: ttyS2 at MMIO 0xff1a0000 (irq = 36, base_baud = 1500000) is a 16550A
[ 0.281840] printk: console [ttyS2] enabled
[ 0.282623] printk: bootconsole [uart0] disabled
[ 0.338786] Freeing initrd memory: 2828K
[ 0.412828] rockchip-usb2phy ff770000.syscon:usb2phy@e460: Requested PHY is disabled
[ 0.413573] ehci-platform fe3c0000.usb: EHCI Host Controller
[ 0.413834] rockchip-usb2phy ff770000.syscon:usb2phy@e460: Requested PHY is disabled
[ 0.414398] ehci-platform fe3c0000.usb: new USB bus registered, assigned bus number 1
[ 0.414789] ohci-platform fe3e0000.usb: Generic Platform OHCI controller
[ 0.414826] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
[ 0.415043] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
[ 0.415137] ehci-platform fe380000.usb: EHCI Host Controller
[ 0.415162] ohci-platform fe3a0000.usb: Generic Platform OHCI controller
[ 0.415249] xhci-hcd xhci-hcd.0.auto: hcc params 0x0220fe64 hci version 0x110 quirks 0x0000000002000010
[ 0.415386] ehci-platform fe380000.usb: new USB bus registered, assigned bus number 3
[ 0.415390] xhci-hcd xhci-hcd.0.auto: irq 43, io mem 0xfe800000
[ 0.415426] ohci-platform fe3a0000.usb: new USB bus registered, assigned bus number 4
[ 0.415514] ehci-platform fe380000.usb: irq 45, io mem 0xfe380000
[ 0.415570] ohci-platform fe3a0000.usb: irq 47, io mem 0xfe3a0000
[ 0.415620] ehci-platform fe3c0000.usb: irq 46, io mem 0xfe3c0000
[ 0.415632] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
[ 0.415827] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 5
[ 0.415849] xhci-hcd xhci-hcd.0.auto: Host supports USB 3.0 SuperSpeed
[ 0.416238] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 6.06
[ 0.423324] ehci-platform fe3c0000.usb: USB 2.0 started, EHCI 1.00
[ 0.423810] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 0.426284] usb usb2: Product: xHCI Host Controller
[ 0.426730] usb usb2: Manufacturer: Linux 6.6.0-rc1-dwc3test+ xhci-hcd
[ 0.427319] usb usb2: SerialNumber: xhci-hcd.0.auto
[ 0.428463] hub 2-0:1.0: USB hub found
[ 0.428869] hub 2-0:1.0: 1 port detected
[ 0.429326] ehci-platform fe380000.usb: USB 2.0 started, EHCI 1.00
[ 0.429813] usb usb5: We don't know the algorithms for LPM for this host, disabling LPM.
[ 0.430915] usb usb5: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 6.06
[ 0.431679] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 0.432337] usb usb5: Product: xHCI Host Controller
[ 0.432778] usb usb5: Manufacturer: Linux 6.6.0-rc1-dwc3test+ xhci-hcd
[ 0.433373] usb usb5: SerialNumber: xhci-hcd.0.auto
[ 0.434514] hub 5-0:1.0: USB hub found
[ 0.434912] hub 5-0:1.0: 1 port detected
[ 0.436032] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
[ 0.436118] ohci-platform fe3e0000.usb: new USB bus registered, assigned bus number 6
[ 0.436206] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 6.06
[ 0.436221] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 0.436231] usb usb1: Product: EHCI Host Controller
[ 0.436239] usb usb1: Manufacturer: Linux 6.6.0-rc1-dwc3test+ ehci_hcd
[ 0.436247] usb usb1: SerialNumber: fe3c0000.usb
[ 0.436866] hub 1-0:1.0: USB hub found
[ 0.437396] ohci-platform fe3e0000.usb: irq 48, io mem 0xfe3e0000
[ 0.438035] hub 1-0:1.0: 1 port detected
[ 0.442129] usb usb3: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 6.06
[ 0.442894] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 0.443555] usb usb3: Product: EHCI Host Controller
[ 0.443995] usb usb3: Manufacturer: Linux 6.6.0-rc1-dwc3test+ ehci_hcd
[ 0.444589] usb usb3: SerialNumber: fe380000.usb
[ 0.445674] hub 3-0:1.0: USB hub found
[ 0.446077] hub 3-0:1.0: 1 port detected
[ 0.447136] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 7
[ 0.448006] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220fe64 hci version 0x110 quirks 0x0000000002000010
[ 0.448900] xhci-hcd xhci-hcd.1.auto: irq 44, io mem 0xfe900000
[ 0.449658] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
[ 0.450426] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 8
[ 0.451119] xhci-hcd xhci-hcd.1.auto: Host supports USB 3.0 SuperSpeed
[ 0.452081] usb usb7: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 6.06
[ 0.452836] usb usb7: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 0.453484] usb usb7: Product: xHCI Host Controller
[ 0.453919] usb usb7: Manufacturer: Linux 6.6.0-rc1-dwc3test+ xhci-hcd
[ 0.454504] usb usb7: SerialNumber: xhci-hcd.1.auto
[ 0.455516] hub 7-0:1.0: USB hub found
[ 0.455918] hub 7-0:1.0: 1 port detected
[ 0.456879] usb usb8: We don't know the algorithms for LPM for this host, disabling LPM.
[ 0.457921] usb usb8: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 6.06
[ 0.458679] usb usb8: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 0.459340] usb usb8: Product: xHCI Host Controller
[ 0.459780] usb usb8: Manufacturer: Linux 6.6.0-rc1-dwc3test+ xhci-hcd
[ 0.460375] usb usb8: SerialNumber: xhci-hcd.1.auto
[ 0.461498] hub 8-0:1.0: USB hub found
[ 0.461895] hub 8-0:1.0: 1 port detected
[ 0.462867] usbcore: registered new interface driver cdc_wdm
[ 0.463448] usbcore: registered new interface driver usbtmc
[ 0.464221] usbcore: registered new interface driver uas
[ 0.464868] usbcore: registered new interface driver usb-storage
[ 0.465466] usbcore: registered new interface driver ums-realtek
[ 0.471753] usb usb4: New USB device found, idVendor=1d6b, idProduct=0001, bcdDevice= 6.06
[ 0.472024] i2c 0-001b: Fixed dependency cycle(s) with /i2c@ff3c0000/pmic@1b/regulators/LDO_REG8
[ 0.472529] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 0.473939] usb usb4: Product: Generic Platform OHCI controller
[ 0.474490] usb usb4: Manufacturer: Linux 6.6.0-rc1-dwc3test+ ohci_hcd
[ 0.475073] usb usb4: SerialNumber: fe3a0000.usb
[ 0.476030] device-mapper: uevent: version 1.0.3
[ 0.476348] hub 4-0:1.0: USB hub found
[ 0.476796] device-mapper: ioctl: 4.48.0-ioctl (2023-03-01) initialised: dm-devel@redhat.com
[ 0.476849] hub 4-0:1.0: 1 port detected
[ 0.479825] sdhci: Secure Digital Host Controller Interface driver
[ 0.480390] sdhci: Copyright(c) Pierre Ossman
[ 0.481004] Synopsys Designware Multimedia Card Interface Driver
[ 0.482134] sdhci-pltfm: SDHCI platform and OF driver helper
[ 0.485052] ledtrig-cpu: registered to indicate activity on CPUs
[ 0.488546] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
[ 0.490160] hw perfevents: enabled with armv8_cortex_a72 PMU driver, 7 counters available
[ 0.495204] usb usb6: New USB device found, idVendor=1d6b, idProduct=0001, bcdDevice= 6.06
[ 0.495972] usb usb6: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 0.496629] usb usb6: Product: Generic Platform OHCI controller
[ 0.497160] usb usb6: Manufacturer: Linux 6.6.0-rc1-dwc3test+ ohci_hcd
[ 0.497757] usb usb6: SerialNumber: fe3e0000.usb
[ 0.498219] watchdog: Delayed init of the lockup detector failed: -19
[ 0.498822] watchdog: Hard watchdog permanently disabled
[ 0.499452] hub 6-0:1.0: USB hub found
[ 0.499931] hub 6-0:1.0: 1 port detected
[ 0.534736] zswap: loaded using pool lz4/z3fold
[ 0.700325] usb 7-1: new high-speed USB device number 2 using xhci-hcd
[ 0.832782] usb 7-1: New USB device found, idVendor=0411, idProduct=0111, bcdDevice= 1.00
[ 0.833526] usb 7-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[ 0.834162] usb 7-1: Product: USB Flash Disk
[ 0.834554] usb 7-1: Manufacturer: BUFFALO
[ 0.834921] usb 7-1: SerialNumber: 07B31F089445408A
[ 0.836281] usb-storage 7-1:1.0: USB Mass Storage device detected
[ 0.837717] scsi host0: usb-storage 7-1:1.0
[ 1.414778] usb 5-1: new SuperSpeed USB device number 2 using xhci-hcd
[ 1.431157] usb 5-1: New USB device found, idVendor=0846, idProduct=9053, bcdDevice= 1.00
[ 1.431944] usb 5-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[ 1.432593] usb 5-1: Product: A6210
[ 1.432912] usb 5-1: Manufacturer: NETGEAR
[ 1.433283] usb 5-1: SerialNumber: 100
[ 1.861969] rk808-regulator rk808-regulator: there is no dvs0 gpio
[ 1.862565] rk808-regulator rk808-regulator: there is no dvs1 gpio
[ 1.888733] dwmmc_rockchip fe320000.mmc: IDMAC supports 32-bit address mode.
[ 1.889451] dwmmc_rockchip fe320000.mmc: Using internal DMA controller.
[ 1.890051] dwmmc_rockchip fe320000.mmc: Version ID is 270a
[ 1.890651] dwmmc_rockchip fe320000.mmc: DW MMC controller at irq 65,32 bit host data width,256 deep fifo
[ 1.892129] dwmmc_rockchip fe320000.mmc: Got CD GPIO
[ 1.894894] rockchip-pcie f8000000.pcie: host bridge /pcie@f8000000 ranges:
[ 1.895597] rockchip-pcie f8000000.pcie: MEM 0x00fa000000..0x00fbdfffff -> 0x00fa000000
[ 1.896385] rockchip-pcie f8000000.pcie: IO 0x00fbe00000..0x00fbefffff -> 0x00fbe00000
[ 1.897910] rockchip-pcie f8000000.pcie: no vpcie12v regulator found
[ 1.900276] rockchip-pcie f8000000.pcie: PCI host bridge to bus 0000:00
[ 1.900909] pci_bus 0000:00: root bus resource [bus 00-1f]
[ 1.901418] pci_bus 0000:00: root bus resource [mem 0xfa000000-0xfbdfffff]
[ 1.902032] pci_bus 0000:00: root bus resource [io 0x0000-0xfffff] (bus address [0xfbe00000-0xfbefffff])
[ 1.902925] pci 0000:00:00.0: [1d87:0100] type 01 class 0x060400
[ 1.903581] pci 0000:00:00.0: supports D1
[ 1.903942] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
[ 1.905411] mmc_host mmc1: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
[ 1.909453] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 1.910390] pci 0000:01:00.0: [10ec:8168] type 00 class 0x020000
[ 1.910988] pci 0000:01:00.0: reg 0x10: initial BAR value 0x00000000 invalid
[ 1.911623] pci 0000:01:00.0: reg 0x10: [io size 0x0100]
[ 1.912180] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x00000fff 64bit]
[ 1.912839] pci 0000:01:00.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit]
[ 1.913495] pci 0000:01:00.0: Upstream bridge's Max Payload Size set to 128 (was 256, max 256)
[ 1.914268] pci 0000:01:00.0: Max Payload Size set to 128 (was 128, max 128)
[ 1.915255] pci 0000:01:00.0: supports D1 D2
[ 1.915647] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
[ 1.919365] pci_bus 0000:01: busn_res: [bus 01-1f] end is updated to 01
[ 1.919977] pci 0000:00:00.0: BAR 14: assigned [mem 0xfa000000-0xfa0fffff]
[ 1.920614] pci 0000:01:00.0: BAR 4: assigned [mem 0xfa000000-0xfa003fff 64bit]
[ 1.921315] pci 0000:01:00.0: BAR 2: assigned [mem 0xfa004000-0xfa004fff 64bit]
[ 1.921999] pci 0000:01:00.0: BAR 0: no space for [io size 0x0100]
[ 1.922568] pci 0000:01:00.0: BAR 0: failed to assign [io size 0x0100]
[ 1.923156] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 1.923613] pci 0000:00:00.0: bridge window [mem 0xfa000000-0xfa0fffff]
[ 1.924384] pcieport 0000:00:00.0: enabling device (0000 -> 0002)
[ 1.925230] pcieport 0000:00:00.0: PME: Signaling with IRQ 71
[ 1.926199] pcieport 0000:00:00.0: AER: enabled with IRQ 71
[ 1.929244] scsi 0:0:0:0: Direct-Access BUFFALO USB Flash Disk 3.10 PQ: 0 ANSI: 0 CCS
[ 1.929726] clk: Disabling unused clocks
[ 1.931340] sd 0:0:0:0: Attached scsi generic sg0 type 0
[ 1.931995] dw-apb-uart ff1a0000.serial: forbid DMA for kernel console
[ 1.960529] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0)
[ 1.961572] mmc1: new high speed SDHC card at address b368
[ 1.963743] mmcblk1: mmc1:b368 USD 7.47 GiB
[ 1.975717] mmcblk1: p1
[ 2.400740] sd 0:0:0:0: [sda] 7831552 512-byte logical blocks: (4.01 GB/3.73 GiB)
[ 2.403803] sd 0:0:0:0: [sda] Write Protect is off
[ 2.404252] sd 0:0:0:0: [sda] Mode Sense: 23 00 00 00
[ 2.406691] sd 0:0:0:0: [sda] No Caching mode page found
[ 2.407183] sd 0:0:0:0: [sda] Assuming drive cache: write through
[ 2.459192] sda: sda1
[ 2.460372] sd 0:0:0:0: [sda] Attached SCSI removable disk
[ 2.462455] Freeing unused kernel memory: 2432K
[ 2.595067] Checked W+X mappings: passed, no W+X pages found
[ 2.595627] rodata_test: all tests were successful
[ 2.596070] Run /sbin/init as init process
[ 2.596454] with arguments:
[ 2.596465] /sbin/init
[ 2.596474] with environment:
[ 2.596481] HOME=/
[ 2.596490] TERM=linux
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] usb: dwc3: Soft reset phy on probe for host
2023-09-13 0:52 [PATCH] usb: dwc3: Soft reset phy on probe for host Thinh Nguyen
2023-09-13 0:57 ` Thinh Nguyen
@ 2023-10-03 14:49 ` Dang Huynh
2023-10-12 18:20 ` Thinh Nguyen
1 sibling, 1 reply; 7+ messages in thread
From: Dang Huynh @ 2023-10-03 14:49 UTC (permalink / raw)
To: Greg Kroah-Hartman, Thinh Nguyen, Jisheng Zhang, Kenta Sato,
Thinh Nguyen
Cc: John Youn, linux-usb, stable, Manu Gautam, Roger Quadros
Hi Thinh,
I can confirm that this patch fixed the USB 3.0 port on the Pinebook Pro. It may
be too late for a Tested-by but:
Tested-by: Dang Huynh <danct12@riseup.net>
Best regards,
Dang
On Wednesday, September 13, 2023 12:52:15 AM UTC Thinh Nguyen wrote:
> When there's phy initialization, we need to initiate a soft-reset
> sequence. That's done through USBCMD.HCRST in the xHCI driver and its
> initialization, However, the dwc3 driver may modify core configs before
> the soft-reset. This may result in some connection instability. So,
> ensure the phy is ready before the controller updates the GCTL.PRTCAPDIR
> or other settings by issuing phy soft-reset.
>
> Note that some host-mode configurations may not expose device registers
> to initiate the controller soft-reset (via DCTL.CoreSftRst). So we reset
> through GUSB3PIPECTL and GUSB2PHYCFG instead.
>
> Cc: stable@vger.kernel.org
> Fixes: e835c0a4e23c ("usb: dwc3: don't reset device side if dwc3 was
> configured as host-only") Reported-by: Kenta Sato <tosainu.maple@gmail.com>
> Closes: https://lore.kernel.org/linux-usb/ZPUciRLUcjDywMVS@debian.me/
> Signed-off-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
> ---
> drivers/usb/dwc3/core.c | 39 ++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 38 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 9c6bf054f15d..343d2570189f 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -279,9 +279,46 @@ int dwc3_core_soft_reset(struct dwc3 *dwc)
> * XHCI driver will reset the host block. If dwc3 was configured
for
> * host-only mode or current role is host, then we can return
early.
> */
> - if (dwc->dr_mode == USB_DR_MODE_HOST || dwc->current_dr_role ==
> DWC3_GCTL_PRTCAP_HOST) + if (dwc->current_dr_role ==
DWC3_GCTL_PRTCAP_HOST)
> return 0;
>
> + /*
> + * If the dr_mode is host and the dwc->current_dr_role is not the
> + * corresponding DWC3_GCTL_PRTCAP_HOST, then the
dwc3_core_init_mode
> + * isn't executed yet. Ensure the phy is ready before the
controller
> + * updates the GCTL.PRTCAPDIR or other settings by soft-resetting
> + * the phy.
> + *
> + * Note: GUSB3PIPECTL[n] and GUSB2PHYCFG[n] are port settings where
n
> + * is port index. If this is a multiport host, then we need to
reset
> + * all active ports.
> + */
> + if (dwc->dr_mode == USB_DR_MODE_HOST) {
> + u32 usb3_port;
> + u32 usb2_port;
> +
> + usb3_port = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
> + usb3_port |= DWC3_GUSB3PIPECTL_PHYSOFTRST;
> + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), usb3_port);
> +
> + usb2_port = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
> + usb2_port |= DWC3_GUSB2PHYCFG_PHYSOFTRST;
> + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), usb2_port);
> +
> + /* Small delay for phy reset assertion */
> + usleep_range(1000, 2000);
> +
> + usb3_port &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST;
> + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), usb3_port);
> +
> + usb2_port &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
> + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), usb2_port);
> +
> + /* Wait for clock synchronization */
> + msleep(50);
> + return 0;
> + }
> +
> reg = dwc3_readl(dwc->regs, DWC3_DCTL);
> reg |= DWC3_DCTL_CSFTRST;
> reg &= ~DWC3_DCTL_RUN_STOP;
>
> base-commit: 0bb80ecc33a8fb5a682236443c1e740d5c917d1d
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] usb: dwc3: Soft reset phy on probe for host
2023-10-03 14:49 ` Dang Huynh
@ 2023-10-12 18:20 ` Thinh Nguyen
0 siblings, 0 replies; 7+ messages in thread
From: Thinh Nguyen @ 2023-10-12 18:20 UTC (permalink / raw)
To: Dang Huynh
Cc: Greg Kroah-Hartman, Thinh Nguyen, Jisheng Zhang, Kenta Sato,
John Youn, linux-usb, stable, Manu Gautam, Roger Quadros
On Tue, Oct 03, 2023, Dang Huynh wrote:
> Hi Thinh,
>
> I can confirm that this patch fixed the USB 3.0 port on the Pinebook Pro. It may
> be too late for a Tested-by but:
>
> Tested-by: Dang Huynh <danct12@riseup.net>
>
Thanks for testing. It's already in Greg's usb-linus branch.
BR,
Thinh
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] usb: dwc3: Soft reset phy on probe for host
2023-09-21 12:41 Da Xue
@ 2023-10-02 18:59 ` Thinh Nguyen
0 siblings, 0 replies; 7+ messages in thread
From: Thinh Nguyen @ 2023-10-02 18:59 UTC (permalink / raw)
To: Da Xue; +Cc: Thinh Nguyen, Greg Kroah-Hartman, linux-stable, linux-usb
Hi Da,
On Thu, Sep 21, 2023, Da Xue wrote:
> Hi Thinh,
>
> I can confirm your patch fixed the issue on RK3399 when I was running
> on Linux 6.1.54.
>
> I'm not on the ML for this so I'm sorry if this email causes any issue
> as I'm not sure how to reply to a thread from a ML I am not on.
>
Thanks for confirmation. Greg just recently picked up this patch in his
usb-linus branch[*]. It should go out to mainline at some point.
Thanks,
Thinh
[*] https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git/commit/?h=usb-linus&id=8bea147dfdf823eaa8d3baeccc7aeb041b41944b
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] usb: dwc3: Soft reset phy on probe for host
@ 2023-09-21 12:41 Da Xue
2023-10-02 18:59 ` Thinh Nguyen
0 siblings, 1 reply; 7+ messages in thread
From: Da Xue @ 2023-09-21 12:41 UTC (permalink / raw)
To: Thinh Nguyen, Greg Kroah-Hartman, linux-stable, linux-usb
Hi Thinh,
I can confirm your patch fixed the issue on RK3399 when I was running
on Linux 6.1.54.
I'm not on the ML for this so I'm sorry if this email causes any issue
as I'm not sure how to reply to a thread from a ML I am not on.
Best,
Da
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-10-12 18:21 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-09-13 0:52 [PATCH] usb: dwc3: Soft reset phy on probe for host Thinh Nguyen
2023-09-13 0:57 ` Thinh Nguyen
2023-09-13 17:31 ` Kenta Sato
2023-10-03 14:49 ` Dang Huynh
2023-10-12 18:20 ` Thinh Nguyen
2023-09-21 12:41 Da Xue
2023-10-02 18:59 ` Thinh Nguyen
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