* [PATCH 0/4] Enable Wa_14019159160 and Wa_16019325821 for MTL
@ 2023-09-15 21:55 ` John.C.Harrison
0 siblings, 0 replies; 18+ messages in thread
From: John.C.Harrison @ 2023-09-15 21:55 UTC (permalink / raw)
To: Intel-GFX; +Cc: John Harrison, DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
Enable Wa_14019159160 and Wa_16019325821 for MTL
RCS/CCS workarounds for MTL.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
John Harrison (4):
drm/i915/guc: Update 'recommended' version to 70.11.0 for
DG2/ADL-P/MTL
drm/i915: Enable Wa_16019325821
drm/i915/guc: Add support for w/a KLVs
drm/i915/guc: Enable Wa_14019159160
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 22 +++--
drivers/gpu/drm/i915/gt/intel_engine_types.h | 8 +-
.../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h | 1 +
drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h | 7 ++
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 5 ++
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 3 +
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 88 ++++++++++++++++++-
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 6 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 8 +-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 9 +-
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 6 +-
11 files changed, 145 insertions(+), 18 deletions(-)
--
2.41.0
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 0/4] Enable Wa_14019159160 and Wa_16019325821 for MTL
@ 2023-09-15 21:55 ` John.C.Harrison
0 siblings, 0 replies; 18+ messages in thread
From: John.C.Harrison @ 2023-09-15 21:55 UTC (permalink / raw)
To: Intel-GFX; +Cc: DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
Enable Wa_14019159160 and Wa_16019325821 for MTL
RCS/CCS workarounds for MTL.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
John Harrison (4):
drm/i915/guc: Update 'recommended' version to 70.11.0 for
DG2/ADL-P/MTL
drm/i915: Enable Wa_16019325821
drm/i915/guc: Add support for w/a KLVs
drm/i915/guc: Enable Wa_14019159160
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 22 +++--
drivers/gpu/drm/i915/gt/intel_engine_types.h | 8 +-
.../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h | 1 +
drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h | 7 ++
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 5 ++
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 3 +
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 88 ++++++++++++++++++-
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 6 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 8 +-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 9 +-
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 6 +-
11 files changed, 145 insertions(+), 18 deletions(-)
--
2.41.0
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 1/4] drm/i915/guc: Update 'recommended' version to 70.11.0 for DG2/ADL-P/MTL
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
@ 2023-09-15 21:55 ` John.C.Harrison
-1 siblings, 0 replies; 18+ messages in thread
From: John.C.Harrison @ 2023-09-15 21:55 UTC (permalink / raw)
To: Intel-GFX; +Cc: John Harrison, DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
The latest GuC has new features and new workarounds that we wish to
enable. So let the universe know that it is useful to update their
firmware.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 32e27e9a2490f..a40f96c98308b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -88,9 +88,9 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
* security fixes, etc. to be enabled.
*/
#define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \
- fw_def(METEORLAKE, 0, guc_maj(mtl, 70, 6, 6)) \
- fw_def(DG2, 0, guc_maj(dg2, 70, 5, 1)) \
- fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5, 1)) \
+ fw_def(METEORLAKE, 0, guc_maj(mtl, 70, 11, 0)) \
+ fw_def(DG2, 0, guc_maj(dg2, 70, 11, 0)) \
+ fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 11, 0)) \
fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \
fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \
fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5, 1)) \
--
2.41.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 1/4] drm/i915/guc: Update 'recommended' version to 70.11.0 for DG2/ADL-P/MTL
@ 2023-09-15 21:55 ` John.C.Harrison
0 siblings, 0 replies; 18+ messages in thread
From: John.C.Harrison @ 2023-09-15 21:55 UTC (permalink / raw)
To: Intel-GFX; +Cc: DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
The latest GuC has new features and new workarounds that we wish to
enable. So let the universe know that it is useful to update their
firmware.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 32e27e9a2490f..a40f96c98308b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -88,9 +88,9 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
* security fixes, etc. to be enabled.
*/
#define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \
- fw_def(METEORLAKE, 0, guc_maj(mtl, 70, 6, 6)) \
- fw_def(DG2, 0, guc_maj(dg2, 70, 5, 1)) \
- fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5, 1)) \
+ fw_def(METEORLAKE, 0, guc_maj(mtl, 70, 11, 0)) \
+ fw_def(DG2, 0, guc_maj(dg2, 70, 11, 0)) \
+ fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 11, 0)) \
fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \
fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \
fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5, 1)) \
--
2.41.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/4] drm/i915: Enable Wa_16019325821
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
@ 2023-09-15 21:55 ` John.C.Harrison
-1 siblings, 0 replies; 18+ messages in thread
From: John.C.Harrison @ 2023-09-15 21:55 UTC (permalink / raw)
To: Intel-GFX; +Cc: John Harrison, DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
Some platforms require holding RCS context switches until CCS is idle
(the reverse w/a of Wa_14014475959). Some platforms require both
versions.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 19 +++++++++++--------
drivers/gpu/drm/i915/gt/intel_engine_types.h | 7 ++++---
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 4 ++++
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 3 ++-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 +++++++-
5 files changed, 28 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 0143445dba830..8b494825c55f2 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -733,21 +733,23 @@ static u32 *gen12_emit_preempt_busywait(struct i915_request *rq, u32 *cs)
}
/* Wa_14014475959:dg2 */
-#define CCS_SEMAPHORE_PPHWSP_OFFSET 0x540
-static u32 ccs_semaphore_offset(struct i915_request *rq)
+/* Wa_16019325821 */
+#define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET 0x540
+static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
{
return i915_ggtt_offset(rq->context->state) +
- (LRC_PPHWSP_PN * PAGE_SIZE) + CCS_SEMAPHORE_PPHWSP_OFFSET;
+ (LRC_PPHWSP_PN * PAGE_SIZE) + HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET;
}
/* Wa_14014475959:dg2 */
-static u32 *ccs_emit_wa_busywait(struct i915_request *rq, u32 *cs)
+/* Wa_16019325821 */
+static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq, u32 *cs)
{
int i;
*cs++ = MI_ATOMIC_INLINE | MI_ATOMIC_GLOBAL_GTT | MI_ATOMIC_CS_STALL |
MI_ATOMIC_MOVE;
- *cs++ = ccs_semaphore_offset(rq);
+ *cs++ = hold_switchout_semaphore_offset(rq);
*cs++ = 0;
*cs++ = 1;
@@ -763,7 +765,7 @@ static u32 *ccs_emit_wa_busywait(struct i915_request *rq, u32 *cs)
MI_SEMAPHORE_POLL |
MI_SEMAPHORE_SAD_EQ_SDD;
*cs++ = 0;
- *cs++ = ccs_semaphore_offset(rq);
+ *cs++ = hold_switchout_semaphore_offset(rq);
*cs++ = 0;
return cs;
@@ -780,8 +782,9 @@ gen12_emit_fini_breadcrumb_tail(struct i915_request *rq, u32 *cs)
cs = gen12_emit_preempt_busywait(rq, cs);
/* Wa_14014475959:dg2 */
- if (intel_engine_uses_wa_hold_ccs_switchout(rq->engine))
- cs = ccs_emit_wa_busywait(rq, cs);
+ /* Wa_16019325821 */
+ if (intel_engine_uses_wa_hold_switchout(rq->engine))
+ cs = hold_switchout_emit_wa_busywait(rq, cs);
rq->tail = intel_ring_offset(rq, cs);
assert_ring_tail_valid(rq->ring, rq->tail);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index a7e6775980043..68fe1cef9cd94 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -573,7 +573,7 @@ struct intel_engine_cs {
#define I915_ENGINE_HAS_RCS_REG_STATE BIT(9)
#define I915_ENGINE_HAS_EU_PRIORITY BIT(10)
#define I915_ENGINE_FIRST_RENDER_COMPUTE BIT(11)
-#define I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT BIT(12)
+#define I915_ENGINE_USES_WA_HOLD_SWITCHOUT BIT(12)
unsigned int flags;
/*
@@ -683,10 +683,11 @@ intel_engine_has_relative_mmio(const struct intel_engine_cs * const engine)
}
/* Wa_14014475959:dg2 */
+/* Wa_16019325821 */
static inline bool
-intel_engine_uses_wa_hold_ccs_switchout(struct intel_engine_cs *engine)
+intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine)
{
- return engine->flags & I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT;
+ return engine->flags & I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
}
#endif /* __INTEL_ENGINE_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 27df41c53b890..4001679ba0793 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -294,6 +294,10 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
IS_DG2(gt->i915))
flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
+ /* Wa_16019325821 */
+ if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))
+ flags |= GUC_WA_RCS_CCS_SWITCHOUT;
+
/*
* Wa_14012197797
* Wa_22011391025
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index b4d56eccfb1f0..f97af0168a66b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -95,8 +95,9 @@
#define GUC_WA_GAM_CREDITS BIT(10)
#define GUC_WA_DUAL_QUEUE BIT(11)
#define GUC_WA_RCS_RESET_BEFORE_RC6 BIT(13)
-#define GUC_WA_CONTEXT_ISOLATION BIT(15)
#define GUC_WA_PRE_PARSER BIT(14)
+#define GUC_WA_CONTEXT_ISOLATION BIT(15)
+#define GUC_WA_RCS_CCS_SWITCHOUT BIT(16)
#define GUC_WA_HOLD_CCS_SWITCHOUT BIT(17)
#define GUC_WA_POLLCS BIT(18)
#define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index cabdc645fcddb..ff38a815701ce 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -4267,7 +4267,13 @@ static void guc_default_vfuncs(struct intel_engine_cs *engine)
if (engine->class == COMPUTE_CLASS)
if (IS_GFX_GT_IP_STEP(engine->gt, IP_VER(12, 70), STEP_A0, STEP_B0) ||
IS_DG2(engine->i915))
- engine->flags |= I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT;
+ engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
+
+ /* Wa_16019325821 */
+ if (engine->class == COMPUTE_CLASS || engine->class == RENDER_CLASS)
+ if (IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 71)))
+ engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
+
/*
* TODO: GuC supports timeslicing and semaphores as well, but they're
--
2.41.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 2/4] drm/i915: Enable Wa_16019325821
@ 2023-09-15 21:55 ` John.C.Harrison
0 siblings, 0 replies; 18+ messages in thread
From: John.C.Harrison @ 2023-09-15 21:55 UTC (permalink / raw)
To: Intel-GFX; +Cc: DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
Some platforms require holding RCS context switches until CCS is idle
(the reverse w/a of Wa_14014475959). Some platforms require both
versions.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 19 +++++++++++--------
drivers/gpu/drm/i915/gt/intel_engine_types.h | 7 ++++---
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 4 ++++
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 3 ++-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 +++++++-
5 files changed, 28 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 0143445dba830..8b494825c55f2 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -733,21 +733,23 @@ static u32 *gen12_emit_preempt_busywait(struct i915_request *rq, u32 *cs)
}
/* Wa_14014475959:dg2 */
-#define CCS_SEMAPHORE_PPHWSP_OFFSET 0x540
-static u32 ccs_semaphore_offset(struct i915_request *rq)
+/* Wa_16019325821 */
+#define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET 0x540
+static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
{
return i915_ggtt_offset(rq->context->state) +
- (LRC_PPHWSP_PN * PAGE_SIZE) + CCS_SEMAPHORE_PPHWSP_OFFSET;
+ (LRC_PPHWSP_PN * PAGE_SIZE) + HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET;
}
/* Wa_14014475959:dg2 */
-static u32 *ccs_emit_wa_busywait(struct i915_request *rq, u32 *cs)
+/* Wa_16019325821 */
+static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq, u32 *cs)
{
int i;
*cs++ = MI_ATOMIC_INLINE | MI_ATOMIC_GLOBAL_GTT | MI_ATOMIC_CS_STALL |
MI_ATOMIC_MOVE;
- *cs++ = ccs_semaphore_offset(rq);
+ *cs++ = hold_switchout_semaphore_offset(rq);
*cs++ = 0;
*cs++ = 1;
@@ -763,7 +765,7 @@ static u32 *ccs_emit_wa_busywait(struct i915_request *rq, u32 *cs)
MI_SEMAPHORE_POLL |
MI_SEMAPHORE_SAD_EQ_SDD;
*cs++ = 0;
- *cs++ = ccs_semaphore_offset(rq);
+ *cs++ = hold_switchout_semaphore_offset(rq);
*cs++ = 0;
return cs;
@@ -780,8 +782,9 @@ gen12_emit_fini_breadcrumb_tail(struct i915_request *rq, u32 *cs)
cs = gen12_emit_preempt_busywait(rq, cs);
/* Wa_14014475959:dg2 */
- if (intel_engine_uses_wa_hold_ccs_switchout(rq->engine))
- cs = ccs_emit_wa_busywait(rq, cs);
+ /* Wa_16019325821 */
+ if (intel_engine_uses_wa_hold_switchout(rq->engine))
+ cs = hold_switchout_emit_wa_busywait(rq, cs);
rq->tail = intel_ring_offset(rq, cs);
assert_ring_tail_valid(rq->ring, rq->tail);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index a7e6775980043..68fe1cef9cd94 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -573,7 +573,7 @@ struct intel_engine_cs {
#define I915_ENGINE_HAS_RCS_REG_STATE BIT(9)
#define I915_ENGINE_HAS_EU_PRIORITY BIT(10)
#define I915_ENGINE_FIRST_RENDER_COMPUTE BIT(11)
-#define I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT BIT(12)
+#define I915_ENGINE_USES_WA_HOLD_SWITCHOUT BIT(12)
unsigned int flags;
/*
@@ -683,10 +683,11 @@ intel_engine_has_relative_mmio(const struct intel_engine_cs * const engine)
}
/* Wa_14014475959:dg2 */
+/* Wa_16019325821 */
static inline bool
-intel_engine_uses_wa_hold_ccs_switchout(struct intel_engine_cs *engine)
+intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine)
{
- return engine->flags & I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT;
+ return engine->flags & I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
}
#endif /* __INTEL_ENGINE_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 27df41c53b890..4001679ba0793 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -294,6 +294,10 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
IS_DG2(gt->i915))
flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
+ /* Wa_16019325821 */
+ if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))
+ flags |= GUC_WA_RCS_CCS_SWITCHOUT;
+
/*
* Wa_14012197797
* Wa_22011391025
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index b4d56eccfb1f0..f97af0168a66b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -95,8 +95,9 @@
#define GUC_WA_GAM_CREDITS BIT(10)
#define GUC_WA_DUAL_QUEUE BIT(11)
#define GUC_WA_RCS_RESET_BEFORE_RC6 BIT(13)
-#define GUC_WA_CONTEXT_ISOLATION BIT(15)
#define GUC_WA_PRE_PARSER BIT(14)
+#define GUC_WA_CONTEXT_ISOLATION BIT(15)
+#define GUC_WA_RCS_CCS_SWITCHOUT BIT(16)
#define GUC_WA_HOLD_CCS_SWITCHOUT BIT(17)
#define GUC_WA_POLLCS BIT(18)
#define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index cabdc645fcddb..ff38a815701ce 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -4267,7 +4267,13 @@ static void guc_default_vfuncs(struct intel_engine_cs *engine)
if (engine->class == COMPUTE_CLASS)
if (IS_GFX_GT_IP_STEP(engine->gt, IP_VER(12, 70), STEP_A0, STEP_B0) ||
IS_DG2(engine->i915))
- engine->flags |= I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT;
+ engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
+
+ /* Wa_16019325821 */
+ if (engine->class == COMPUTE_CLASS || engine->class == RENDER_CLASS)
+ if (IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 71)))
+ engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
+
/*
* TODO: GuC supports timeslicing and semaphores as well, but they're
--
2.41.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 3/4] drm/i915/guc: Add support for w/a KLVs
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
@ 2023-09-15 21:55 ` John.C.Harrison
-1 siblings, 0 replies; 18+ messages in thread
From: John.C.Harrison @ 2023-09-15 21:55 UTC (permalink / raw)
To: Intel-GFX; +Cc: John Harrison, DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
To prevent running out of bits, new w/a enable flags are being added
via a KLV system instead of a 32 bit flags word.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
.../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h | 1 +
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 3 +
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 64 ++++++++++++++++++-
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 6 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 5 +-
5 files changed, 77 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
index dabeaf4f245f3..00d6402333f8e 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
@@ -36,6 +36,7 @@ enum intel_guc_load_status {
INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_START,
INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID = 0x73,
INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID = 0x74,
+ INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR = 0x75,
INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_END,
INTEL_GUC_LOAD_STATUS_READY = 0xF0,
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 6c392bad29c19..3b1fc5f96306b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -186,6 +186,8 @@ struct intel_guc {
struct guc_mmio_reg *ads_regset;
/** @ads_golden_ctxt_size: size of the golden contexts in the ADS */
u32 ads_golden_ctxt_size;
+ /** @ads_waklv_size: size of workaround KLVs */
+ u32 ads_waklv_size;
/** @ads_capture_size: size of register lists in the ADS used for error capture */
u32 ads_capture_size;
/** @ads_engine_usage_size: size of engine usage in the ADS */
@@ -295,6 +297,7 @@ struct intel_guc {
#define MAKE_GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
#define MAKE_GUC_VER_STRUCT(ver) MAKE_GUC_VER((ver).major, (ver).minor, (ver).patch)
#define GUC_SUBMIT_VER(guc) MAKE_GUC_VER_STRUCT((guc)->submission_version)
+#define GUC_FIRMWARE_VER(guc) MAKE_GUC_VER_STRUCT((guc)->fw.file_selected.ver)
static inline struct intel_guc *log_to_guc(struct intel_guc_log *log)
{
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 63724e17829a7..792910af3a481 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -46,6 +46,10 @@
* +---------------------------------------+
* | padding |
* +---------------------------------------+ <== 4K aligned
+ * | w/a KLVs |
+ * +---------------------------------------+
+ * | padding |
+ * +---------------------------------------+ <== 4K aligned
* | capture lists |
* +---------------------------------------+
* | padding |
@@ -88,6 +92,11 @@ static u32 guc_ads_golden_ctxt_size(struct intel_guc *guc)
return PAGE_ALIGN(guc->ads_golden_ctxt_size);
}
+static u32 guc_ads_waklv_size(struct intel_guc *guc)
+{
+ return PAGE_ALIGN(guc->ads_waklv_size);
+}
+
static u32 guc_ads_capture_size(struct intel_guc *guc)
{
return PAGE_ALIGN(guc->ads_capture_size);
@@ -113,7 +122,7 @@ static u32 guc_ads_golden_ctxt_offset(struct intel_guc *guc)
return PAGE_ALIGN(offset);
}
-static u32 guc_ads_capture_offset(struct intel_guc *guc)
+static u32 guc_ads_waklv_offset(struct intel_guc *guc)
{
u32 offset;
@@ -123,6 +132,16 @@ static u32 guc_ads_capture_offset(struct intel_guc *guc)
return PAGE_ALIGN(offset);
}
+static u32 guc_ads_capture_offset(struct intel_guc *guc)
+{
+ u32 offset;
+
+ offset = guc_ads_waklv_offset(guc) +
+ guc_ads_waklv_size(guc);
+
+ return PAGE_ALIGN(offset);
+}
+
static u32 guc_ads_private_data_offset(struct intel_guc *guc)
{
u32 offset;
@@ -791,6 +810,40 @@ guc_capture_prep_lists(struct intel_guc *guc)
return PAGE_ALIGN(total_size);
}
+static void guc_waklv_init(struct intel_guc *guc)
+{
+ struct intel_gt *gt = guc_to_gt(guc);
+ u32 offset, addr_ggtt, remain, size;
+
+ if (!intel_uc_uses_guc_submission(>->uc))
+ return;
+
+ if (GUC_FIRMWARE_VER(guc) < MAKE_GUC_VER(70, 10, 0))
+ return;
+
+ GEM_BUG_ON(iosys_map_is_null(&guc->ads_map));
+ offset = guc_ads_waklv_offset(guc);
+ remain = guc_ads_waklv_size(guc);
+
+ /* Add workarounds here */
+
+ size = guc_ads_waklv_size(guc) - remain;
+ if (!size)
+ return;
+
+ addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;
+
+ ads_blob_write(guc, ads.wa_klv_addr_lo, addr_ggtt);
+ ads_blob_write(guc, ads.wa_klv_addr_hi, 0);
+ ads_blob_write(guc, ads.wa_klv_size, size);
+}
+
+static int guc_prep_waklv(struct intel_guc *guc)
+{
+ /* Fudge something chunky for now: */
+ return PAGE_SIZE;
+}
+
static void __guc_ads_init(struct intel_guc *guc)
{
struct intel_gt *gt = guc_to_gt(guc);
@@ -838,6 +891,9 @@ static void __guc_ads_init(struct intel_guc *guc)
/* MMIO save/restore list */
guc_mmio_reg_state_init(guc);
+ /* Workaround KLV list */
+ guc_waklv_init(guc);
+
/* Private Data */
ads_blob_write(guc, ads.private_data, base +
guc_ads_private_data_offset(guc));
@@ -881,6 +937,12 @@ int intel_guc_ads_create(struct intel_guc *guc)
return ret;
guc->ads_capture_size = ret;
+ /* And don't forget the workaround KLVs: */
+ ret = guc_prep_waklv(guc);
+ if (ret < 0)
+ return ret;
+ guc->ads_waklv_size = ret;
+
/* Now the total size can be determined: */
size = guc_ads_blob_size(guc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
index 0f79cb6585182..a54d58b9243b0 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
@@ -115,6 +115,7 @@ static inline bool guc_load_done(struct intel_uncore *uncore, u32 *status, bool
case INTEL_GUC_LOAD_STATUS_INIT_DATA_INVALID:
case INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID:
case INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID:
+ case INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR:
*success = false;
return true;
}
@@ -241,6 +242,11 @@ static int guc_wait_ucode(struct intel_guc *guc)
ret = -EPERM;
break;
+ case INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR:
+ guc_info(guc, "invalid w/a KLV entry\n");
+ ret = -EINVAL;
+ break;
+
case INTEL_GUC_LOAD_STATUS_HWCONFIG_START:
guc_info(guc, "still extracting hwconfig table.\n");
ret = -ETIMEDOUT;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index f97af0168a66b..3266842d925e6 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -429,7 +429,10 @@ struct guc_ads {
u32 capture_instance[GUC_CAPTURE_LIST_INDEX_MAX][GUC_MAX_ENGINE_CLASSES];
u32 capture_class[GUC_CAPTURE_LIST_INDEX_MAX][GUC_MAX_ENGINE_CLASSES];
u32 capture_global[GUC_CAPTURE_LIST_INDEX_MAX];
- u32 reserved[14];
+ u32 wa_klv_addr_lo;
+ u32 wa_klv_addr_hi;
+ u32 wa_klv_size;
+ u32 reserved[11];
} __packed;
/* Engine usage stats */
--
2.41.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 3/4] drm/i915/guc: Add support for w/a KLVs
@ 2023-09-15 21:55 ` John.C.Harrison
0 siblings, 0 replies; 18+ messages in thread
From: John.C.Harrison @ 2023-09-15 21:55 UTC (permalink / raw)
To: Intel-GFX; +Cc: DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
To prevent running out of bits, new w/a enable flags are being added
via a KLV system instead of a 32 bit flags word.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
.../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h | 1 +
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 3 +
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 64 ++++++++++++++++++-
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 6 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 5 +-
5 files changed, 77 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
index dabeaf4f245f3..00d6402333f8e 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
@@ -36,6 +36,7 @@ enum intel_guc_load_status {
INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_START,
INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID = 0x73,
INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID = 0x74,
+ INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR = 0x75,
INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_END,
INTEL_GUC_LOAD_STATUS_READY = 0xF0,
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 6c392bad29c19..3b1fc5f96306b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -186,6 +186,8 @@ struct intel_guc {
struct guc_mmio_reg *ads_regset;
/** @ads_golden_ctxt_size: size of the golden contexts in the ADS */
u32 ads_golden_ctxt_size;
+ /** @ads_waklv_size: size of workaround KLVs */
+ u32 ads_waklv_size;
/** @ads_capture_size: size of register lists in the ADS used for error capture */
u32 ads_capture_size;
/** @ads_engine_usage_size: size of engine usage in the ADS */
@@ -295,6 +297,7 @@ struct intel_guc {
#define MAKE_GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
#define MAKE_GUC_VER_STRUCT(ver) MAKE_GUC_VER((ver).major, (ver).minor, (ver).patch)
#define GUC_SUBMIT_VER(guc) MAKE_GUC_VER_STRUCT((guc)->submission_version)
+#define GUC_FIRMWARE_VER(guc) MAKE_GUC_VER_STRUCT((guc)->fw.file_selected.ver)
static inline struct intel_guc *log_to_guc(struct intel_guc_log *log)
{
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 63724e17829a7..792910af3a481 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -46,6 +46,10 @@
* +---------------------------------------+
* | padding |
* +---------------------------------------+ <== 4K aligned
+ * | w/a KLVs |
+ * +---------------------------------------+
+ * | padding |
+ * +---------------------------------------+ <== 4K aligned
* | capture lists |
* +---------------------------------------+
* | padding |
@@ -88,6 +92,11 @@ static u32 guc_ads_golden_ctxt_size(struct intel_guc *guc)
return PAGE_ALIGN(guc->ads_golden_ctxt_size);
}
+static u32 guc_ads_waklv_size(struct intel_guc *guc)
+{
+ return PAGE_ALIGN(guc->ads_waklv_size);
+}
+
static u32 guc_ads_capture_size(struct intel_guc *guc)
{
return PAGE_ALIGN(guc->ads_capture_size);
@@ -113,7 +122,7 @@ static u32 guc_ads_golden_ctxt_offset(struct intel_guc *guc)
return PAGE_ALIGN(offset);
}
-static u32 guc_ads_capture_offset(struct intel_guc *guc)
+static u32 guc_ads_waklv_offset(struct intel_guc *guc)
{
u32 offset;
@@ -123,6 +132,16 @@ static u32 guc_ads_capture_offset(struct intel_guc *guc)
return PAGE_ALIGN(offset);
}
+static u32 guc_ads_capture_offset(struct intel_guc *guc)
+{
+ u32 offset;
+
+ offset = guc_ads_waklv_offset(guc) +
+ guc_ads_waklv_size(guc);
+
+ return PAGE_ALIGN(offset);
+}
+
static u32 guc_ads_private_data_offset(struct intel_guc *guc)
{
u32 offset;
@@ -791,6 +810,40 @@ guc_capture_prep_lists(struct intel_guc *guc)
return PAGE_ALIGN(total_size);
}
+static void guc_waklv_init(struct intel_guc *guc)
+{
+ struct intel_gt *gt = guc_to_gt(guc);
+ u32 offset, addr_ggtt, remain, size;
+
+ if (!intel_uc_uses_guc_submission(>->uc))
+ return;
+
+ if (GUC_FIRMWARE_VER(guc) < MAKE_GUC_VER(70, 10, 0))
+ return;
+
+ GEM_BUG_ON(iosys_map_is_null(&guc->ads_map));
+ offset = guc_ads_waklv_offset(guc);
+ remain = guc_ads_waklv_size(guc);
+
+ /* Add workarounds here */
+
+ size = guc_ads_waklv_size(guc) - remain;
+ if (!size)
+ return;
+
+ addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;
+
+ ads_blob_write(guc, ads.wa_klv_addr_lo, addr_ggtt);
+ ads_blob_write(guc, ads.wa_klv_addr_hi, 0);
+ ads_blob_write(guc, ads.wa_klv_size, size);
+}
+
+static int guc_prep_waklv(struct intel_guc *guc)
+{
+ /* Fudge something chunky for now: */
+ return PAGE_SIZE;
+}
+
static void __guc_ads_init(struct intel_guc *guc)
{
struct intel_gt *gt = guc_to_gt(guc);
@@ -838,6 +891,9 @@ static void __guc_ads_init(struct intel_guc *guc)
/* MMIO save/restore list */
guc_mmio_reg_state_init(guc);
+ /* Workaround KLV list */
+ guc_waklv_init(guc);
+
/* Private Data */
ads_blob_write(guc, ads.private_data, base +
guc_ads_private_data_offset(guc));
@@ -881,6 +937,12 @@ int intel_guc_ads_create(struct intel_guc *guc)
return ret;
guc->ads_capture_size = ret;
+ /* And don't forget the workaround KLVs: */
+ ret = guc_prep_waklv(guc);
+ if (ret < 0)
+ return ret;
+ guc->ads_waklv_size = ret;
+
/* Now the total size can be determined: */
size = guc_ads_blob_size(guc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
index 0f79cb6585182..a54d58b9243b0 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
@@ -115,6 +115,7 @@ static inline bool guc_load_done(struct intel_uncore *uncore, u32 *status, bool
case INTEL_GUC_LOAD_STATUS_INIT_DATA_INVALID:
case INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID:
case INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID:
+ case INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR:
*success = false;
return true;
}
@@ -241,6 +242,11 @@ static int guc_wait_ucode(struct intel_guc *guc)
ret = -EPERM;
break;
+ case INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR:
+ guc_info(guc, "invalid w/a KLV entry\n");
+ ret = -EINVAL;
+ break;
+
case INTEL_GUC_LOAD_STATUS_HWCONFIG_START:
guc_info(guc, "still extracting hwconfig table.\n");
ret = -ETIMEDOUT;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index f97af0168a66b..3266842d925e6 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -429,7 +429,10 @@ struct guc_ads {
u32 capture_instance[GUC_CAPTURE_LIST_INDEX_MAX][GUC_MAX_ENGINE_CLASSES];
u32 capture_class[GUC_CAPTURE_LIST_INDEX_MAX][GUC_MAX_ENGINE_CLASSES];
u32 capture_global[GUC_CAPTURE_LIST_INDEX_MAX];
- u32 reserved[14];
+ u32 wa_klv_addr_lo;
+ u32 wa_klv_addr_hi;
+ u32 wa_klv_size;
+ u32 reserved[11];
} __packed;
/* Engine usage stats */
--
2.41.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 4/4] drm/i915/guc: Enable Wa_14019159160
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
@ 2023-09-15 21:55 ` John.C.Harrison
-1 siblings, 0 replies; 18+ messages in thread
From: John.C.Harrison @ 2023-09-15 21:55 UTC (permalink / raw)
To: Intel-GFX; +Cc: John Harrison, DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
Use the new w/a KLV support to enable a MTL w/a. Note, this w/a is a
super-set of Wa_16019325821, so requires turning that one as well as
setting the new flag for Wa_14019159160 itself.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 3 +++
drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 +
drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h | 7 +++++
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 1 +
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 26 ++++++++++++++++++-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 1 +
6 files changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 8b494825c55f2..d31c405b095b7 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -734,6 +734,7 @@ static u32 *gen12_emit_preempt_busywait(struct i915_request *rq, u32 *cs)
/* Wa_14014475959:dg2 */
/* Wa_16019325821 */
+/* Wa_14019159160 */
#define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET 0x540
static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
{
@@ -743,6 +744,7 @@ static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
/* Wa_14014475959:dg2 */
/* Wa_16019325821 */
+/* Wa_14019159160 */
static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq, u32 *cs)
{
int i;
@@ -783,6 +785,7 @@ gen12_emit_fini_breadcrumb_tail(struct i915_request *rq, u32 *cs)
/* Wa_14014475959:dg2 */
/* Wa_16019325821 */
+ /* Wa_14019159160 */
if (intel_engine_uses_wa_hold_switchout(rq->engine))
cs = hold_switchout_emit_wa_busywait(rq, cs);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 68fe1cef9cd94..9b3051600856e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -684,6 +684,7 @@ intel_engine_has_relative_mmio(const struct intel_engine_cs * const engine)
/* Wa_14014475959:dg2 */
/* Wa_16019325821 */
+/* Wa_14019159160 */
static inline bool
intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine)
{
diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
index 58012edd4eb0e..bebf28e3c4794 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
@@ -101,4 +101,11 @@ enum {
GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5,
};
+/*
+ * Workaround keys:
+ */
+enum {
+ GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE = 0x9001,
+};
+
#endif /* _ABI_GUC_KLVS_ABI_H */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 4001679ba0793..e74590a71d113 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -295,6 +295,7 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
/* Wa_16019325821 */
+ /* Wa_14019159160 */
if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))
flags |= GUC_WA_RCS_CCS_SWITCHOUT;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 792910af3a481..a9fd2e96f27f5 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -810,6 +810,25 @@ guc_capture_prep_lists(struct intel_guc *guc)
return PAGE_ALIGN(total_size);
}
+/* Wa_14019159160 */
+static u32 guc_waklv_ra_mode(struct intel_guc *guc, u32 offset, u32 remain)
+{
+ u32 size;
+ u32 klv_entry[] = {
+ /* 16:16 key/length */
+ FIELD_PREP(GUC_KLV_0_KEY, GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE) |
+ FIELD_PREP(GUC_KLV_0_LEN, 0),
+ /* 0 dwords data */
+ };
+
+ size = sizeof(klv_entry);
+ GEM_BUG_ON(remain < size);
+
+ iosys_map_memcpy_to(&guc->ads_map, offset, klv_entry, size);
+
+ return size;
+}
+
static void guc_waklv_init(struct intel_guc *guc)
{
struct intel_gt *gt = guc_to_gt(guc);
@@ -825,7 +844,12 @@ static void guc_waklv_init(struct intel_guc *guc)
offset = guc_ads_waklv_offset(guc);
remain = guc_ads_waklv_size(guc);
- /* Add workarounds here */
+ /* Wa_14019159160 */
+ if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) {
+ size = guc_waklv_ra_mode(guc, offset, remain);
+ offset += size;
+ remain -= size;
+ }
size = guc_ads_waklv_size(guc) - remain;
if (!size)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index ff38a815701ce..c8428e4b03592 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -4270,6 +4270,7 @@ static void guc_default_vfuncs(struct intel_engine_cs *engine)
engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
/* Wa_16019325821 */
+ /* Wa_14019159160 */
if (engine->class == COMPUTE_CLASS || engine->class == RENDER_CLASS)
if (IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 71)))
engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
--
2.41.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 4/4] drm/i915/guc: Enable Wa_14019159160
@ 2023-09-15 21:55 ` John.C.Harrison
0 siblings, 0 replies; 18+ messages in thread
From: John.C.Harrison @ 2023-09-15 21:55 UTC (permalink / raw)
To: Intel-GFX; +Cc: DRI-Devel
From: John Harrison <John.C.Harrison@Intel.com>
Use the new w/a KLV support to enable a MTL w/a. Note, this w/a is a
super-set of Wa_16019325821, so requires turning that one as well as
setting the new flag for Wa_14019159160 itself.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 3 +++
drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 +
drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h | 7 +++++
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 1 +
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 26 ++++++++++++++++++-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 1 +
6 files changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 8b494825c55f2..d31c405b095b7 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -734,6 +734,7 @@ static u32 *gen12_emit_preempt_busywait(struct i915_request *rq, u32 *cs)
/* Wa_14014475959:dg2 */
/* Wa_16019325821 */
+/* Wa_14019159160 */
#define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET 0x540
static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
{
@@ -743,6 +744,7 @@ static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
/* Wa_14014475959:dg2 */
/* Wa_16019325821 */
+/* Wa_14019159160 */
static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq, u32 *cs)
{
int i;
@@ -783,6 +785,7 @@ gen12_emit_fini_breadcrumb_tail(struct i915_request *rq, u32 *cs)
/* Wa_14014475959:dg2 */
/* Wa_16019325821 */
+ /* Wa_14019159160 */
if (intel_engine_uses_wa_hold_switchout(rq->engine))
cs = hold_switchout_emit_wa_busywait(rq, cs);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 68fe1cef9cd94..9b3051600856e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -684,6 +684,7 @@ intel_engine_has_relative_mmio(const struct intel_engine_cs * const engine)
/* Wa_14014475959:dg2 */
/* Wa_16019325821 */
+/* Wa_14019159160 */
static inline bool
intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine)
{
diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
index 58012edd4eb0e..bebf28e3c4794 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
@@ -101,4 +101,11 @@ enum {
GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5,
};
+/*
+ * Workaround keys:
+ */
+enum {
+ GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE = 0x9001,
+};
+
#endif /* _ABI_GUC_KLVS_ABI_H */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 4001679ba0793..e74590a71d113 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -295,6 +295,7 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
/* Wa_16019325821 */
+ /* Wa_14019159160 */
if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))
flags |= GUC_WA_RCS_CCS_SWITCHOUT;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 792910af3a481..a9fd2e96f27f5 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -810,6 +810,25 @@ guc_capture_prep_lists(struct intel_guc *guc)
return PAGE_ALIGN(total_size);
}
+/* Wa_14019159160 */
+static u32 guc_waklv_ra_mode(struct intel_guc *guc, u32 offset, u32 remain)
+{
+ u32 size;
+ u32 klv_entry[] = {
+ /* 16:16 key/length */
+ FIELD_PREP(GUC_KLV_0_KEY, GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE) |
+ FIELD_PREP(GUC_KLV_0_LEN, 0),
+ /* 0 dwords data */
+ };
+
+ size = sizeof(klv_entry);
+ GEM_BUG_ON(remain < size);
+
+ iosys_map_memcpy_to(&guc->ads_map, offset, klv_entry, size);
+
+ return size;
+}
+
static void guc_waklv_init(struct intel_guc *guc)
{
struct intel_gt *gt = guc_to_gt(guc);
@@ -825,7 +844,12 @@ static void guc_waklv_init(struct intel_guc *guc)
offset = guc_ads_waklv_offset(guc);
remain = guc_ads_waklv_size(guc);
- /* Add workarounds here */
+ /* Wa_14019159160 */
+ if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) {
+ size = guc_waklv_ra_mode(guc, offset, remain);
+ offset += size;
+ remain -= size;
+ }
size = guc_ads_waklv_size(guc) - remain;
if (!size)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index ff38a815701ce..c8428e4b03592 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -4270,6 +4270,7 @@ static void guc_default_vfuncs(struct intel_engine_cs *engine)
engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
/* Wa_16019325821 */
+ /* Wa_14019159160 */
if (engine->class == COMPUTE_CLASS || engine->class == RENDER_CLASS)
if (IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 71)))
engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
--
2.41.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable Wa_14019159160 and Wa_16019325821 for MTL
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
` (4 preceding siblings ...)
(?)
@ 2023-09-16 3:42 ` Patchwork
-1 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2023-09-16 3:42 UTC (permalink / raw)
To: john.c.harrison; +Cc: intel-gfx
== Series Details ==
Series: Enable Wa_14019159160 and Wa_16019325821 for MTL
URL : https://patchwork.freedesktop.org/series/123813/
State : warning
== Summary ==
Error: dim checkpatch failed
41e13ed5cde2 drm/i915/guc: Update 'recommended' version to 70.11.0 for DG2/ADL-P/MTL
c2d869434453 drm/i915: Enable Wa_16019325821
384a9227b91e drm/i915/guc: Add support for w/a KLVs
-:112: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants
#112: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c:824:
+ GEM_BUG_ON(iosys_map_is_null(&guc->ads_map));
total: 0 errors, 1 warnings, 0 checks, 157 lines checked
fecca61e0f14 drm/i915/guc: Enable Wa_14019159160
-:100: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants
#100: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c:825:
+ GEM_BUG_ON(remain < size);
total: 0 errors, 1 warnings, 0 checks, 91 lines checked
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable Wa_14019159160 and Wa_16019325821 for MTL
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
` (5 preceding siblings ...)
(?)
@ 2023-09-16 3:42 ` Patchwork
-1 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2023-09-16 3:42 UTC (permalink / raw)
To: john.c.harrison; +Cc: intel-gfx
== Series Details ==
Series: Enable Wa_14019159160 and Wa_16019325821 for MTL
URL : https://patchwork.freedesktop.org/series/123813/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Enable Wa_14019159160 and Wa_16019325821 for MTL
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
` (6 preceding siblings ...)
(?)
@ 2023-09-16 3:54 ` Patchwork
-1 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2023-09-16 3:54 UTC (permalink / raw)
To: john.c.harrison; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 9085 bytes --]
== Series Details ==
Series: Enable Wa_14019159160 and Wa_16019325821 for MTL
URL : https://patchwork.freedesktop.org/series/123813/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13643 -> Patchwork_123813v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/index.html
Participating hosts (40 -> 39)
------------------------------
Additional (1): bat-dg2-8
Missing (2): bat-adlp-11 fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_123813v1 that come from known issues:
### CI changes ###
#### Issues hit ####
* boot:
- fi-hsw-4770: [PASS][1] -> [FAIL][2] ([i915#8293])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/fi-hsw-4770/boot.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/fi-hsw-4770/boot.html
### IGT changes ###
#### Issues hit ####
* igt@gem_mmap@basic:
- bat-dg2-8: NOTRUN -> [SKIP][3] ([i915#4083])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@gem_mmap@basic.html
* igt@gem_mmap_gtt@basic:
- bat-dg2-8: NOTRUN -> [SKIP][4] ([i915#4077]) +2 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@gem_mmap_gtt@basic.html
* igt@gem_tiled_pread_basic:
- bat-dg2-8: NOTRUN -> [SKIP][5] ([i915#4079]) +1 other test skip
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rps@basic-api:
- bat-dg2-8: NOTRUN -> [SKIP][6] ([i915#6621])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@i915_pm_rps@basic-api.html
* igt@i915_selftest@live@mman:
- bat-rpls-1: [PASS][7] -> [TIMEOUT][8] ([i915#6794] / [i915#7392])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/bat-rpls-1/igt@i915_selftest@live@mman.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-rpls-1/igt@i915_selftest@live@mman.html
* igt@i915_suspend@basic-s2idle-without-i915:
- bat-rpls-1: [PASS][9] -> [WARN][10] ([i915#8747])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/bat-rpls-1/igt@i915_suspend@basic-s2idle-without-i915.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-rpls-1/igt@i915_suspend@basic-s2idle-without-i915.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-dg2-8: NOTRUN -> [SKIP][11] ([i915#6645])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-dg2-8: NOTRUN -> [SKIP][12] ([i915#5190])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg2-8: NOTRUN -> [SKIP][13] ([i915#4215] / [i915#5190])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- bat-dg2-8: NOTRUN -> [SKIP][14] ([i915#4212]) +7 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-dg2-8: NOTRUN -> [SKIP][15] ([i915#4103] / [i915#4213]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-dg2-8: NOTRUN -> [SKIP][16] ([fdo#109285])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-dg2-8: NOTRUN -> [SKIP][17] ([i915#5274])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-adlp-9: NOTRUN -> [SKIP][18] ([i915#3546]) +2 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-adlp-9/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
* igt@kms_psr@cursor_plane_move:
- bat-dg2-8: NOTRUN -> [SKIP][19] ([i915#1072]) +3 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@kms_psr@cursor_plane_move.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-dg2-8: NOTRUN -> [SKIP][20] ([i915#3555])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-dg2-8: NOTRUN -> [SKIP][21] ([i915#3708])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-mmap:
- bat-dg2-8: NOTRUN -> [SKIP][22] ([i915#3708] / [i915#4077]) +1 other test skip
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-write:
- bat-dg2-8: NOTRUN -> [SKIP][23] ([i915#3291] / [i915#3708]) +2 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-8/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@i915_selftest@live@workarounds:
- bat-dg2-9: [DMESG-FAIL][24] ([i915#7913]) -> [PASS][25]
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/bat-dg2-9/igt@i915_selftest@live@workarounds.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-dg2-9/igt@i915_selftest@live@workarounds.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][26] ([i915#8668]) -> [PASS][27]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#6794]: https://gitlab.freedesktop.org/drm/intel/issues/6794
[i915#7392]: https://gitlab.freedesktop.org/drm/intel/issues/7392
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7952]: https://gitlab.freedesktop.org/drm/intel/issues/7952
[i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#8747]: https://gitlab.freedesktop.org/drm/intel/issues/8747
Build changes
-------------
* Linux: CI_DRM_13643 -> Patchwork_123813v1
CI-20190529: 20190529
CI_DRM_13643: dc4cd6e4e53d46211952fe7c0e408fce3e212993 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7490: 7490
Patchwork_123813v1: dc4cd6e4e53d46211952fe7c0e408fce3e212993 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
9279bf85315e drm/i915/guc: Enable Wa_14019159160
78df9b1aa1ba drm/i915/guc: Add support for w/a KLVs
f796e48423e8 drm/i915: Enable Wa_16019325821
860e40d0f11d drm/i915/guc: Update 'recommended' version to 70.11.0 for DG2/ADL-P/MTL
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/index.html
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^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for Enable Wa_14019159160 and Wa_16019325821 for MTL
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
` (7 preceding siblings ...)
(?)
@ 2023-09-16 13:58 ` Patchwork
-1 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2023-09-16 13:58 UTC (permalink / raw)
To: john.c.harrison; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 79537 bytes --]
== Series Details ==
Series: Enable Wa_14019159160 and Wa_16019325821 for MTL
URL : https://patchwork.freedesktop.org/series/123813/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13643_full -> Patchwork_123813v1_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_123813v1_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_123813v1_full, please notify your bug team (lgci.bug.filing@intel.com) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (9 -> 9)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_123813v1_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_ctx_persistence@saturated-hostile@rcs0:
- shard-mtlp: [PASS][1] -> [FAIL][2] +11 other tests fail
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-mtlp-3/igt@gem_ctx_persistence@saturated-hostile@rcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-2/igt@gem_ctx_persistence@saturated-hostile@rcs0.html
* igt@gem_exec_schedule@fairslice-all:
- shard-mtlp: NOTRUN -> [FAIL][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_exec_schedule@fairslice-all.html
* igt@kms_flip@flip-vs-suspend@b-hdmi-a3:
- shard-dg2: [PASS][4] -> [INCOMPLETE][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg2-6/igt@kms_flip@flip-vs-suspend@b-hdmi-a3.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-5/igt@kms_flip@flip-vs-suspend@b-hdmi-a3.html
Known issues
------------
Here are the changes found in Patchwork_123813v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-keep-cache:
- shard-mtlp: NOTRUN -> [SKIP][6] ([i915#8411])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@api_intel_bb@blit-reloc-keep-cache.html
* igt@api_intel_bb@object-reloc-keep-cache:
- shard-dg2: NOTRUN -> [SKIP][7] ([i915#8411])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@api_intel_bb@object-reloc-keep-cache.html
* igt@device_reset@unbind-cold-reset-rebind:
- shard-mtlp: NOTRUN -> [SKIP][8] ([i915#7701])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@device_reset@unbind-cold-reset-rebind.html
* igt@drm_buddy@drm_buddy_test:
- shard-mtlp: NOTRUN -> [SKIP][9] ([i915#8661]) +1 other test skip
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@drm_buddy@drm_buddy_test.html
* igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- shard-rkl: [PASS][10] -> [FAIL][11] ([i915#7742])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-rkl-6/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-7/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
* igt@drm_fdinfo@virtual-busy-hang-all:
- shard-mtlp: NOTRUN -> [SKIP][12] ([i915#8414]) +1 other test skip
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@drm_fdinfo@virtual-busy-hang-all.html
* igt@drm_fdinfo@virtual-busy-idle-all:
- shard-dg2: NOTRUN -> [SKIP][13] ([i915#8414])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@drm_fdinfo@virtual-busy-idle-all.html
* igt@drm_mm@drm_mm_test:
- shard-dg2: NOTRUN -> [SKIP][14] ([i915#8661])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@drm_mm@drm_mm_test.html
* igt@gem_busy@semaphore:
- shard-dg2: NOTRUN -> [SKIP][15] ([i915#3936])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@gem_busy@semaphore.html
* igt@gem_caching@read-writes:
- shard-mtlp: NOTRUN -> [SKIP][16] ([i915#4873])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_caching@read-writes.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-mtlp: NOTRUN -> [SKIP][17] ([i915#6335])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_create@create-ext-set-pat:
- shard-dg2: NOTRUN -> [SKIP][18] ([i915#8562])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-7/igt@gem_create@create-ext-set-pat.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglu: [PASS][19] -> [FAIL][20] ([i915#6268])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-tglu-3/igt@gem_ctx_exec@basic-nohangcheck.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-9/igt@gem_ctx_exec@basic-nohangcheck.html
- shard-mtlp: NOTRUN -> [FAIL][21] ([i915#6121])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_ctx_persistence@heartbeat-many:
- shard-mtlp: NOTRUN -> [SKIP][22] ([i915#8555])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_ctx_persistence@heartbeat-many.html
* igt@gem_ctx_sseu@invalid-sseu:
- shard-dg2: NOTRUN -> [SKIP][23] ([i915#280])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@gem_ctx_sseu@invalid-sseu.html
* igt@gem_eio@hibernate:
- shard-dg1: [PASS][24] -> [ABORT][25] ([i915#7975] / [i915#8213])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg1-12/igt@gem_eio@hibernate.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg1-14/igt@gem_eio@hibernate.html
* igt@gem_eio@kms:
- shard-dg1: [PASS][26] -> [FAIL][27] ([i915#5784])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg1-16/igt@gem_eio@kms.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg1-16/igt@gem_eio@kms.html
* igt@gem_eio@reset-stress:
- shard-dg2: [PASS][28] -> [FAIL][29] ([i915#5784])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg2-5/igt@gem_eio@reset-stress.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@gem_eio@reset-stress.html
* igt@gem_exec_balancer@bonded-dual:
- shard-mtlp: NOTRUN -> [SKIP][30] ([i915#4771]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_exec_balancer@bonded-dual.html
* igt@gem_exec_balancer@noheartbeat:
- shard-dg2: NOTRUN -> [SKIP][31] ([i915#8555])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@gem_exec_balancer@noheartbeat.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-glk: [PASS][32] -> [FAIL][33] ([i915#2842])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-glk5/igt@gem_exec_fair@basic-none-share@rcs0.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-glk7/igt@gem_exec_fair@basic-none-share@rcs0.html
- shard-rkl: [PASS][34] -> [FAIL][35] ([i915#2842])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-rkl-2/igt@gem_exec_fair@basic-none-share@rcs0.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-4/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-none-solo:
- shard-dg2: NOTRUN -> [SKIP][36] ([i915#3539] / [i915#4852]) +1 other test skip
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@gem_exec_fair@basic-none-solo.html
* igt@gem_exec_fair@basic-pace-solo:
- shard-mtlp: NOTRUN -> [SKIP][37] ([i915#4473])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_exec_fair@basic-pace-solo.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-rkl: NOTRUN -> [FAIL][38] ([i915#2842])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_fence@submit:
- shard-dg2: NOTRUN -> [SKIP][39] ([i915#4812]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@gem_exec_fence@submit.html
* igt@gem_exec_gttfill@multigpu-basic:
- shard-tglu: NOTRUN -> [SKIP][40] ([i915#7697])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@gem_exec_gttfill@multigpu-basic.html
* igt@gem_exec_reloc@basic-cpu-gtt:
- shard-dg2: NOTRUN -> [SKIP][41] ([i915#3281]) +8 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@gem_exec_reloc@basic-cpu-gtt.html
* igt@gem_exec_reloc@basic-write-wc-noreloc:
- shard-rkl: NOTRUN -> [SKIP][42] ([i915#3281]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@gem_exec_reloc@basic-write-wc-noreloc.html
* igt@gem_exec_schedule@preempt-other@ccs0:
- shard-mtlp: [PASS][43] -> [FAIL][44] ([i915#9119]) +9 other tests fail
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-mtlp-3/igt@gem_exec_schedule@preempt-other@ccs0.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-3/igt@gem_exec_schedule@preempt-other@ccs0.html
* igt@gem_exec_schedule@preempt-queue-chain:
- shard-mtlp: NOTRUN -> [SKIP][45] ([i915#4537] / [i915#4812])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_exec_schedule@preempt-queue-chain.html
* igt@gem_exec_schedule@preempt-queue-contexts-chain:
- shard-dg2: NOTRUN -> [SKIP][46] ([i915#4537] / [i915#4812])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@gem_exec_schedule@preempt-queue-contexts-chain.html
* igt@gem_exec_schedule@thriceslice@vcs1:
- shard-mtlp: [PASS][47] -> [ABORT][48] ([i915#9262])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-mtlp-8/igt@gem_exec_schedule@thriceslice@vcs1.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-8/igt@gem_exec_schedule@thriceslice@vcs1.html
* igt@gem_fence_thrash@bo-copy:
- shard-dg2: NOTRUN -> [SKIP][49] ([i915#4860]) +1 other test skip
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@gem_fence_thrash@bo-copy.html
* igt@gem_gtt_cpu_tlb:
- shard-mtlp: NOTRUN -> [SKIP][50] ([i915#4077]) +7 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_gtt_cpu_tlb.html
* igt@gem_lmem_swapping@basic:
- shard-rkl: NOTRUN -> [SKIP][51] ([i915#4613])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@massive:
- shard-tglu: NOTRUN -> [SKIP][52] ([i915#4613])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@gem_lmem_swapping@massive.html
* igt@gem_lmem_swapping@parallel-multi:
- shard-mtlp: NOTRUN -> [SKIP][53] ([i915#4613])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_lmem_swapping@parallel-multi.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- shard-dg1: [PASS][54] -> [TIMEOUT][55] ([i915#5493])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg1-16/igt@gem_lmem_swapping@smem-oom@lmem0.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg1-17/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@gem_madvise@dontneed-before-exec:
- shard-mtlp: NOTRUN -> [SKIP][56] ([i915#3282]) +3 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_madvise@dontneed-before-exec.html
* igt@gem_media_fill@media-fill:
- shard-mtlp: NOTRUN -> [SKIP][57] ([i915#8289])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@gem_media_fill@media-fill.html
* igt@gem_mmap_gtt@coherency:
- shard-rkl: NOTRUN -> [SKIP][58] ([fdo#111656])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@gem_mmap_gtt@coherency.html
* igt@gem_mmap_gtt@cpuset-big-copy:
- shard-dg2: NOTRUN -> [SKIP][59] ([i915#4077]) +3 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@gem_mmap_gtt@cpuset-big-copy.html
* igt@gem_mmap_wc@close:
- shard-dg2: NOTRUN -> [SKIP][60] ([i915#4083]) +1 other test skip
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@gem_mmap_wc@close.html
* igt@gem_mmap_wc@read-write:
- shard-mtlp: NOTRUN -> [SKIP][61] ([i915#4083]) +3 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_mmap_wc@read-write.html
* igt@gem_pread@snoop:
- shard-dg2: NOTRUN -> [SKIP][62] ([i915#3282]) +3 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@gem_pread@snoop.html
* igt@gem_pwrite@basic-exhaustion:
- shard-rkl: NOTRUN -> [SKIP][63] ([i915#3282]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_pxp@create-regular-context-1:
- shard-rkl: NOTRUN -> [SKIP][64] ([i915#4270])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@gem_pxp@create-regular-context-1.html
* igt@gem_pxp@create-valid-protected-context:
- shard-mtlp: NOTRUN -> [SKIP][65] ([i915#4270]) +1 other test skip
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@gem_pxp@create-valid-protected-context.html
* igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
- shard-tglu: NOTRUN -> [SKIP][66] ([i915#4270])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
* igt@gem_pxp@protected-raw-src-copy-not-readible:
- shard-dg2: NOTRUN -> [SKIP][67] ([i915#4270]) +1 other test skip
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@gem_pxp@protected-raw-src-copy-not-readible.html
* igt@gem_render_copy@x-tiled-to-vebox-y-tiled:
- shard-mtlp: NOTRUN -> [SKIP][68] ([i915#8428]) +3 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_render_copy@x-tiled-to-vebox-y-tiled.html
* igt@gem_set_tiling_vs_blt@tiled-to-untiled:
- shard-mtlp: NOTRUN -> [SKIP][69] ([i915#4079]) +2 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html
* igt@gem_softpin@evict-snoop:
- shard-mtlp: NOTRUN -> [SKIP][70] ([i915#4885])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@gem_softpin@evict-snoop.html
* igt@gem_softpin@evict-snoop-interruptible:
- shard-dg2: NOTRUN -> [SKIP][71] ([i915#4885])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@gem_softpin@evict-snoop-interruptible.html
* igt@gem_tiled_pread_pwrite:
- shard-dg2: NOTRUN -> [SKIP][72] ([i915#4079]) +1 other test skip
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-7/igt@gem_tiled_pread_pwrite.html
* igt@gem_userptr_blits@coherency-sync:
- shard-rkl: NOTRUN -> [SKIP][73] ([fdo#110542])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@gem_userptr_blits@coherency-sync.html
* igt@gem_userptr_blits@invalid-mmap-offset-unsync:
- shard-dg2: NOTRUN -> [SKIP][74] ([i915#3297])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html
* igt@gem_userptr_blits@relocations:
- shard-mtlp: NOTRUN -> [SKIP][75] ([i915#3281]) +3 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_userptr_blits@relocations.html
* igt@gem_userptr_blits@unsync-unmap:
- shard-mtlp: NOTRUN -> [SKIP][76] ([i915#3297])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@gem_userptr_blits@unsync-unmap.html
* igt@gem_userptr_blits@unsync-unmap-after-close:
- shard-tglu: NOTRUN -> [SKIP][77] ([i915#3297])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@gem_userptr_blits@unsync-unmap-after-close.html
* igt@gem_userptr_blits@vma-merge:
- shard-snb: NOTRUN -> [FAIL][78] ([i915#2724])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-snb2/igt@gem_userptr_blits@vma-merge.html
* igt@gen3_render_linear_blits:
- shard-tglu: NOTRUN -> [SKIP][79] ([fdo#109289])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@gen3_render_linear_blits.html
* igt@gen7_exec_parse@basic-allowed:
- shard-mtlp: NOTRUN -> [SKIP][80] ([fdo#109289]) +4 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@gen7_exec_parse@basic-allowed.html
* igt@gen7_exec_parse@batch-without-end:
- shard-rkl: NOTRUN -> [SKIP][81] ([fdo#109289])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@gen7_exec_parse@batch-without-end.html
* igt@gen9_exec_parse@allowed-single:
- shard-dg2: NOTRUN -> [SKIP][82] ([i915#2856]) +3 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@gen9_exec_parse@allowed-single.html
- shard-apl: NOTRUN -> [ABORT][83] ([i915#5566])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-apl7/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@bb-start-param:
- shard-rkl: NOTRUN -> [SKIP][84] ([i915#2527])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@gen9_exec_parse@bb-start-param.html
* igt@gen9_exec_parse@unaligned-jump:
- shard-mtlp: NOTRUN -> [SKIP][85] ([i915#2856]) +1 other test skip
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@gen9_exec_parse@unaligned-jump.html
* igt@i915_hangman@gt-engine-error@rcs0:
- shard-mtlp: [PASS][86] -> [FAIL][87] ([i915#7069])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-mtlp-7/igt@i915_hangman@gt-engine-error@rcs0.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-6/igt@i915_hangman@gt-engine-error@rcs0.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-dg2: [PASS][88] -> [DMESG-WARN][89] ([i915#8617])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg2-11/igt@i915_module_load@reload-with-fault-injection.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-2/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_rc6_residency@rc6-idle@vecs0:
- shard-dg1: [PASS][90] -> [FAIL][91] ([i915#3591])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html
* igt@i915_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-mtlp: NOTRUN -> [SKIP][92] ([i915#1397])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@i915_pm_rpm@dpms-non-lpsp:
- shard-rkl: [PASS][93] -> [SKIP][94] ([i915#1397]) +2 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-rkl-1/igt@i915_pm_rpm@dpms-non-lpsp.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-7/igt@i915_pm_rpm@dpms-non-lpsp.html
* igt@i915_pm_rpm@gem-mmap-type@gtt-smem0:
- shard-mtlp: NOTRUN -> [SKIP][95] ([i915#8431])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@i915_pm_rpm@gem-mmap-type@gtt-smem0.html
* igt@i915_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-dg1: [PASS][96] -> [SKIP][97] ([i915#1397]) +2 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg1-19/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg1-16/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@i915_pm_rpm@modeset-non-lpsp-stress:
- shard-dg2: [PASS][98] -> [SKIP][99] ([i915#1397]) +1 other test skip
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg2-7/igt@i915_pm_rpm@modeset-non-lpsp-stress.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@i915_pm_rpm@modeset-non-lpsp-stress.html
* igt@i915_pm_rpm@modeset-pc8-residency-stress:
- shard-tglu: NOTRUN -> [SKIP][100] ([fdo#109506])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@i915_pm_rpm@modeset-pc8-residency-stress.html
* igt@i915_pm_rps@min-max-config-loaded:
- shard-mtlp: NOTRUN -> [SKIP][101] ([i915#6621])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@i915_pm_rps@min-max-config-loaded.html
* igt@i915_pm_rps@reset:
- shard-snb: [PASS][102] -> [INCOMPLETE][103] ([i915#7790])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-snb2/igt@i915_pm_rps@reset.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-snb4/igt@i915_pm_rps@reset.html
* igt@i915_pm_sseu@full-enable:
- shard-mtlp: NOTRUN -> [SKIP][104] ([i915#8437])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@i915_pm_sseu@full-enable.html
* igt@i915_selftest@mock@memory_region:
- shard-mtlp: NOTRUN -> [DMESG-WARN][105] ([i915#9311] / [i915#9312])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@i915_selftest@mock@memory_region.html
* igt@kms_addfb_basic@tile-pitch-mismatch:
- shard-mtlp: NOTRUN -> [SKIP][106] ([i915#4212])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_addfb_basic@tile-pitch-mismatch.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-2-y-rc_ccs:
- shard-rkl: NOTRUN -> [SKIP][107] ([i915#8502]) +3 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-2-y-rc_ccs.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-hdmi-a-1-4-rc_ccs-cc:
- shard-dg2: NOTRUN -> [SKIP][108] ([i915#8502] / [i915#8709]) +11 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-hdmi-a-1-4-rc_ccs-cc.html
* igt@kms_async_flips@crc@pipe-a-hdmi-a-2:
- shard-dg2: NOTRUN -> [FAIL][109] ([i915#8247]) +3 other tests fail
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-2/igt@kms_async_flips@crc@pipe-a-hdmi-a-2.html
* igt@kms_async_flips@crc@pipe-b-hdmi-a-3:
- shard-dg1: NOTRUN -> [FAIL][110] ([i915#8247]) +3 other tests fail
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg1-12/igt@kms_async_flips@crc@pipe-b-hdmi-a-3.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-270:
- shard-dg2: NOTRUN -> [SKIP][111] ([fdo#111614]) +2 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-180:
- shard-tglu: NOTRUN -> [SKIP][112] ([fdo#111615] / [i915#5286]) +1 other test skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-270:
- shard-mtlp: NOTRUN -> [SKIP][113] ([fdo#111614]) +1 other test skip
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
- shard-rkl: NOTRUN -> [SKIP][114] ([i915#5286])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-0:
- shard-dg2: NOTRUN -> [SKIP][115] ([i915#5190]) +7 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-mtlp: NOTRUN -> [SKIP][116] ([i915#6187])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-rkl: NOTRUN -> [SKIP][117] ([fdo#111615])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-tglu: NOTRUN -> [SKIP][118] ([fdo#111615])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180:
- shard-dg2: NOTRUN -> [SKIP][119] ([i915#4538] / [i915#5190])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-mtlp: NOTRUN -> [SKIP][120] ([fdo#111615]) +7 other tests skip
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_joiner@2x-modeset:
- shard-dg2: NOTRUN -> [SKIP][121] ([i915#2705])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_big_joiner@2x-modeset.html
* igt@kms_ccs@pipe-a-ccs-on-another-bo-4_tiled_mtl_mc_ccs:
- shard-rkl: NOTRUN -> [SKIP][122] ([i915#5354] / [i915#6095]) +1 other test skip
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_ccs@pipe-a-ccs-on-another-bo-4_tiled_mtl_mc_ccs.html
* igt@kms_ccs@pipe-a-missing-ccs-buffer-yf_tiled_ccs:
- shard-rkl: NOTRUN -> [SKIP][123] ([i915#3734] / [i915#5354] / [i915#6095]) +1 other test skip
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_ccs@pipe-a-missing-ccs-buffer-yf_tiled_ccs.html
* igt@kms_ccs@pipe-a-random-ccs-data-4_tiled_mtl_rc_ccs_cc:
- shard-tglu: NOTRUN -> [SKIP][124] ([i915#5354] / [i915#6095]) +3 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_ccs@pipe-a-random-ccs-data-4_tiled_mtl_rc_ccs_cc.html
* igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_rc_ccs:
- shard-mtlp: NOTRUN -> [SKIP][125] ([i915#6095]) +19 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_rc_ccs.html
* igt@kms_ccs@pipe-b-random-ccs-data-4_tiled_dg2_mc_ccs:
- shard-tglu: NOTRUN -> [SKIP][126] ([i915#3689] / [i915#5354] / [i915#6095]) +3 other tests skip
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_ccs@pipe-b-random-ccs-data-4_tiled_dg2_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-mtlp: NOTRUN -> [SKIP][127] ([i915#3886] / [i915#6095]) +4 other tests skip
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
- shard-dg2: NOTRUN -> [SKIP][128] ([i915#3689] / [i915#3886] / [i915#5354]) +5 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- shard-rkl: NOTRUN -> [SKIP][129] ([i915#5354]) +6 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-random-ccs-data-yf_tiled_ccs:
- shard-tglu: NOTRUN -> [SKIP][130] ([fdo#111615] / [i915#3689] / [i915#5354] / [i915#6095])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_ccs@pipe-c-random-ccs-data-yf_tiled_ccs.html
* igt@kms_ccs@pipe-d-ccs-on-another-bo-4_tiled_mtl_rc_ccs:
- shard-dg2: NOTRUN -> [SKIP][131] ([i915#5354]) +29 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-7/igt@kms_ccs@pipe-d-ccs-on-another-bo-4_tiled_mtl_rc_ccs.html
* igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_ccs:
- shard-dg2: NOTRUN -> [SKIP][132] ([i915#3689] / [i915#5354]) +15 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_ccs.html
* igt@kms_cdclk@plane-scaling@pipe-c-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][133] ([i915#4087]) +3 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_cdclk@plane-scaling@pipe-c-edp-1.html
* igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][134] ([i915#4087]) +3 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-1.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-mtlp: NOTRUN -> [SKIP][135] ([fdo#111827])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_color@ctm-0-75:
- shard-dg2: NOTRUN -> [SKIP][136] ([fdo#111827])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_chamelium_color@ctm-0-75.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- shard-tglu: NOTRUN -> [SKIP][137] ([i915#7828]) +2 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
- shard-dg2: NOTRUN -> [SKIP][138] ([i915#7828]) +3 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
* igt@kms_chamelium_hpd@vga-hpd-fast:
- shard-mtlp: NOTRUN -> [SKIP][139] ([i915#7828]) +4 other tests skip
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@kms_chamelium_hpd@vga-hpd-fast.html
* igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode:
- shard-rkl: NOTRUN -> [SKIP][140] ([i915#7828]) +2 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html
* igt@kms_concurrent@pipe-d:
- shard-rkl: NOTRUN -> [SKIP][141] ([i915#4070] / [i915#533] / [i915#6768]) +3 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_concurrent@pipe-d.html
* igt@kms_content_protection@atomic:
- shard-mtlp: NOTRUN -> [SKIP][142] ([i915#6944])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-rkl: NOTRUN -> [SKIP][143] ([i915#3116])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-mtlp: NOTRUN -> [SKIP][144] ([i915#3359]) +1 other test skip
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-dg2: NOTRUN -> [SKIP][145] ([i915#3359]) +1 other test skip
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-onscreen-max-size:
- shard-mtlp: NOTRUN -> [SKIP][146] ([i915#3555] / [i915#8814]) +1 other test skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_cursor_crc@cursor-onscreen-max-size.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-snb: NOTRUN -> [SKIP][147] ([fdo#109271]) +91 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-snb2/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_crc@cursor-rapid-movement-max-size:
- shard-rkl: NOTRUN -> [SKIP][148] ([i915#3555])
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-mtlp: NOTRUN -> [SKIP][149] ([i915#4213]) +1 other test skip
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@cursor-vs-flip-toggle:
- shard-mtlp: NOTRUN -> [FAIL][150] ([i915#8248])
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
* igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
- shard-mtlp: NOTRUN -> [SKIP][151] ([i915#3546]) +2 other tests skip
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
- shard-dg2: NOTRUN -> [SKIP][152] ([fdo#109274] / [i915#5354]) +1 other test skip
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-rkl: NOTRUN -> [SKIP][153] ([fdo#111767] / [fdo#111825])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
- shard-dg2: NOTRUN -> [SKIP][154] ([fdo#109274] / [fdo#111767] / [i915#5354])
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
* igt@kms_cursor_legacy@single-move@all-pipes:
- shard-mtlp: [PASS][155] -> [DMESG-WARN][156] ([i915#2017])
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-mtlp-1/igt@kms_cursor_legacy@single-move@all-pipes.html
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-4/igt@kms_cursor_legacy@single-move@all-pipes.html
* igt@kms_dsc@dsc-with-bpc:
- shard-dg2: NOTRUN -> [SKIP][157] ([i915#3555] / [i915#3840])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_flip@2x-flip-vs-blocking-wf-vblank:
- shard-mtlp: NOTRUN -> [SKIP][158] ([fdo#111767] / [i915#3637])
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html
* igt@kms_flip@2x-flip-vs-dpms:
- shard-mtlp: NOTRUN -> [SKIP][159] ([i915#3637]) +2 other tests skip
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@kms_flip@2x-flip-vs-dpms.html
* igt@kms_flip@2x-flip-vs-fences-interruptible:
- shard-tglu: NOTRUN -> [SKIP][160] ([fdo#109274] / [i915#3637])
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_flip@2x-flip-vs-fences-interruptible.html
* igt@kms_flip@2x-flip-vs-panning-vs-hang:
- shard-dg2: NOTRUN -> [SKIP][161] ([fdo#109274]) +4 other tests skip
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible:
- shard-rkl: NOTRUN -> [SKIP][162] ([fdo#111825])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-fences:
- shard-mtlp: NOTRUN -> [SKIP][163] ([i915#8381])
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_flip@flip-vs-fences.html
* igt@kms_flip@flip-vs-suspend@b-edp1:
- shard-mtlp: [PASS][164] -> [DMESG-WARN][165] ([i915#9262]) +3 other tests dmesg-warn
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-mtlp-1/igt@kms_flip@flip-vs-suspend@b-edp1.html
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-4/igt@kms_flip@flip-vs-suspend@b-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode:
- shard-tglu: NOTRUN -> [SKIP][166] ([i915#2587] / [i915#2672])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-valid-mode:
- shard-rkl: NOTRUN -> [SKIP][167] ([i915#2672])
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][168] ([i915#2672])
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][169] ([i915#2672]) +1 other test skip
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][170] ([i915#2672] / [i915#3555])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling@pipe-a-default-mode.html
* igt@kms_force_connector_basic@prune-stale-modes:
- shard-dg2: NOTRUN -> [SKIP][171] ([i915#5274])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_frontbuffer_tracking@fbc-2p-indfb-fliptrack-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][172] ([i915#8708]) +8 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbc-2p-indfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-tglu: NOTRUN -> [SKIP][173] ([fdo#109280]) +7 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt:
- shard-mtlp: NOTRUN -> [SKIP][174] ([i915#1825]) +14 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-dg2: NOTRUN -> [SKIP][175] ([i915#5460])
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move:
- shard-dg2: NOTRUN -> [SKIP][176] ([i915#3458]) +9 other tests skip
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt:
- shard-rkl: NOTRUN -> [SKIP][177] ([i915#3023]) +3 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-dg2: NOTRUN -> [SKIP][178] ([i915#8708]) +6 other tests skip
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt:
- shard-rkl: NOTRUN -> [SKIP][179] ([fdo#111825] / [i915#1825]) +7 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-rgb565-draw-pwrite:
- shard-apl: NOTRUN -> [SKIP][180] ([fdo#109271]) +8 other tests skip
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-apl6/igt@kms_frontbuffer_tracking@psr-rgb565-draw-pwrite.html
* igt@kms_hdr@bpc-switch:
- shard-rkl: NOTRUN -> [SKIP][181] ([i915#3555] / [i915#8228])
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-2/igt@kms_hdr@bpc-switch.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-tglu: NOTRUN -> [SKIP][182] ([i915#3555] / [i915#8228])
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-dg2: NOTRUN -> [SKIP][183] ([i915#3555] / [i915#8228])
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-2/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-dg2: NOTRUN -> [SKIP][184] ([i915#6301])
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_panel_fitting@legacy:
- shard-rkl: NOTRUN -> [SKIP][185] ([i915#6301])
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_panel_fitting@legacy.html
* igt@kms_pipe_b_c_ivb@pipe-b-dpms-off-modeset-pipe-c:
- shard-dg2: NOTRUN -> [SKIP][186] ([fdo#109289])
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_pipe_b_c_ivb@pipe-b-dpms-off-modeset-pipe-c.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-vga-1:
- shard-snb: NOTRUN -> [DMESG-WARN][187] ([i915#8841]) +1 other test dmesg-warn
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-snb5/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-vga-1.html
* igt@kms_plane@pixel-format@pipe-a-planes:
- shard-glk: [PASS][188] -> [DMESG-FAIL][189] ([i915#118])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-glk7/igt@kms_plane@pixel-format@pipe-a-planes.html
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-glk6/igt@kms_plane@pixel-format@pipe-a-planes.html
* igt@kms_plane_lowres@tiling-yf:
- shard-mtlp: NOTRUN -> [SKIP][190] ([i915#3555] / [i915#8821])
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-mtlp: NOTRUN -> [SKIP][191] ([i915#6953])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-25@pipe-b-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][192] ([i915#5176]) +7 other tests skip
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-25@pipe-b-hdmi-a-1.html
* igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-75@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][193] ([i915#5176]) +7 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-6/igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-75@pipe-a-hdmi-a-2.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-b-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][194] ([i915#5176]) +1 other test skip
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-b-edp-1.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-d-hdmi-a-1:
- shard-dg1: NOTRUN -> [SKIP][195] ([i915#5176]) +15 other tests skip
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg1-19/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-d-hdmi-a-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][196] ([i915#5235]) +3 other tests skip
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25@pipe-d-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][197] ([i915#5235]) +3 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25@pipe-d-edp-1.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][198] ([i915#5235]) +5 other tests skip
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-7/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-hdmi-a-1.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][199] ([i915#5235]) +11 other tests skip
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-3.html
- shard-dg1: NOTRUN -> [SKIP][200] ([i915#5235]) +11 other tests skip
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg1-12/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-3.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf:
- shard-rkl: NOTRUN -> [SKIP][201] ([i915#658])
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb:
- shard-tglu: NOTRUN -> [SKIP][202] ([i915#658])
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-rkl: NOTRUN -> [SKIP][203] ([fdo#111068] / [i915#658])
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-dg2: NOTRUN -> [SKIP][204] ([i915#658]) +3 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@cursor_plane_move:
- shard-tglu: NOTRUN -> [SKIP][205] ([fdo#110189]) +5 other tests skip
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_psr@cursor_plane_move.html
* igt@kms_psr@primary_blt:
- shard-dg2: NOTRUN -> [SKIP][206] ([i915#1072]) +1 other test skip
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_psr@primary_blt.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-rkl: NOTRUN -> [SKIP][207] ([i915#1072])
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-mtlp: NOTRUN -> [SKIP][208] ([i915#4235])
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-mtlp: NOTRUN -> [SKIP][209] ([i915#5289])
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_setmode@basic-clone-single-crtc:
- shard-dg2: NOTRUN -> [SKIP][210] ([i915#3555]) +4 other tests skip
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_setmode@basic-clone-single-crtc.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-mtlp: NOTRUN -> [SKIP][211] ([i915#3555] / [i915#8809])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@kms_sysfs_edid_timing:
- shard-dg2: NOTRUN -> [FAIL][212] ([IGT#2])
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-6/igt@kms_sysfs_edid_timing.html
* igt@kms_tv_load_detect@load-detect:
- shard-mtlp: NOTRUN -> [SKIP][213] ([fdo#109309])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@kms_tv_load_detect@load-detect.html
* igt@kms_universal_plane@cursor-fb-leak-pipe-b:
- shard-rkl: [PASS][214] -> [FAIL][215] ([i915#9196])
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-rkl-2/igt@kms_universal_plane@cursor-fb-leak-pipe-b.html
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-4/igt@kms_universal_plane@cursor-fb-leak-pipe-b.html
* igt@kms_vblank@pipe-c-query-forked-hang:
- shard-rkl: NOTRUN -> [SKIP][216] ([i915#4070] / [i915#6768]) +1 other test skip
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_vblank@pipe-c-query-forked-hang.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-tglu: NOTRUN -> [SKIP][217] ([i915#2437])
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@kms_writeback@writeback-invalid-parameters.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-dg2: NOTRUN -> [SKIP][218] ([i915#2437])
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-7/igt@kms_writeback@writeback-pixel-formats.html
- shard-mtlp: NOTRUN -> [SKIP][219] ([i915#2437])
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@kms_writeback@writeback-pixel-formats.html
* igt@perf@enable-disable@0-rcs0:
- shard-mtlp: [PASS][220] -> [FAIL][221] ([i915#7823])
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-mtlp-4/igt@perf@enable-disable@0-rcs0.html
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-5/igt@perf@enable-disable@0-rcs0.html
* igt@perf@polling@1-vcs0:
- shard-mtlp: NOTRUN -> [FAIL][222] ([i915#9259]) +3 other tests fail
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@perf@polling@1-vcs0.html
* igt@perf_pmu@busy-double-start@bcs0:
- shard-mtlp: NOTRUN -> [FAIL][223] ([i915#4349]) +5 other tests fail
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@perf_pmu@busy-double-start@bcs0.html
* igt@perf_pmu@most-busy-check-all@vcs0:
- shard-mtlp: NOTRUN -> [FAIL][224] ([i915#5234]) +6 other tests fail
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@perf_pmu@most-busy-check-all@vcs0.html
* igt@perf_pmu@rc6-all-gts:
- shard-tglu: NOTRUN -> [SKIP][225] ([i915#8516])
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@perf_pmu@rc6-all-gts.html
* igt@perf_pmu@rc6@other-idle-gt0:
- shard-dg2: NOTRUN -> [SKIP][226] ([i915#8516])
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@perf_pmu@rc6@other-idle-gt0.html
* igt@prime_busy@hang-wait@ccs0:
- shard-mtlp: NOTRUN -> [ABORT][227] ([i915#9262])
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@prime_busy@hang-wait@ccs0.html
* igt@prime_vgem@basic-fence-read:
- shard-dg2: NOTRUN -> [SKIP][228] ([i915#3291] / [i915#3708]) +1 other test skip
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@prime_vgem@basic-fence-read.html
* igt@v3d/v3d_submit_csd@bad-multisync-extension:
- shard-mtlp: NOTRUN -> [SKIP][229] ([i915#2575]) +7 other tests skip
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@v3d/v3d_submit_csd@bad-multisync-extension.html
* igt@v3d/v3d_submit_csd@multiple-job-submission:
- shard-rkl: NOTRUN -> [SKIP][230] ([fdo#109315]) +1 other test skip
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@v3d/v3d_submit_csd@multiple-job-submission.html
* igt@v3d/v3d_wait_bo@unused-bo-0ns:
- shard-tglu: NOTRUN -> [SKIP][231] ([fdo#109315] / [i915#2575]) +2 other tests skip
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@v3d/v3d_wait_bo@unused-bo-0ns.html
* igt@v3d/v3d_wait_bo@used-bo-1ns:
- shard-dg2: NOTRUN -> [SKIP][232] ([i915#2575]) +7 other tests skip
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-7/igt@v3d/v3d_wait_bo@used-bo-1ns.html
* igt@vc4/vc4_dmabuf_poll@poll-write-waits-until-write-done:
- shard-tglu: NOTRUN -> [SKIP][233] ([i915#2575]) +1 other test skip
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-3/igt@vc4/vc4_dmabuf_poll@poll-write-waits-until-write-done.html
* igt@vc4/vc4_label_bo@set-bad-name:
- shard-rkl: NOTRUN -> [SKIP][234] ([i915#7711])
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@vc4/vc4_label_bo@set-bad-name.html
* igt@vc4/vc4_perfmon@destroy-invalid-perfmon:
- shard-dg2: NOTRUN -> [SKIP][235] ([i915#7711]) +2 other tests skip
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-10/igt@vc4/vc4_perfmon@destroy-invalid-perfmon.html
* igt@vc4/vc4_purgeable_bo@mark-purgeable-twice:
- shard-mtlp: NOTRUN -> [SKIP][236] ([i915#7711]) +3 other tests skip
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-7/igt@vc4/vc4_purgeable_bo@mark-purgeable-twice.html
#### Possible fixes ####
* igt@drm_fdinfo@most-busy-check-all@rcs0:
- shard-rkl: [FAIL][237] ([i915#7742]) -> [PASS][238]
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-rkl-7/igt@drm_fdinfo@most-busy-check-all@rcs0.html
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-6/igt@drm_fdinfo@most-busy-check-all@rcs0.html
* igt@gem_ctx_freq@sysfs@gt0:
- shard-dg2: [FAIL][239] ([i915#6786]) -> [PASS][240]
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg2-6/igt@gem_ctx_freq@sysfs@gt0.html
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-7/igt@gem_ctx_freq@sysfs@gt0.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [FAIL][241] ([i915#2842]) -> [PASS][242]
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-apl6/igt@gem_exec_fair@basic-none-solo@rcs0.html
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-apl6/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-rkl: [FAIL][243] ([i915#2842]) -> [PASS][244]
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-rkl-2/igt@gem_exec_fair@basic-none@vecs0.html
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-4/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][245] ([i915#2842]) -> [PASS][246]
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-glk7/igt@gem_exec_fair@basic-pace-share@rcs0.html
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-glk6/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fence@expired-history:
- shard-mtlp: [ABORT][247] ([i915#9262]) -> [PASS][248] +3 other tests pass
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-mtlp-7/igt@gem_exec_fence@expired-history.html
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-1/igt@gem_exec_fence@expired-history.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- shard-dg1: [FAIL][249] ([i915#3591]) -> [PASS][250]
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@i915_pm_rpm@dpms-lpsp:
- shard-rkl: [SKIP][251] ([i915#1397]) -> [PASS][252] +2 other tests pass
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-rkl-6/igt@i915_pm_rpm@dpms-lpsp.html
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-7/igt@i915_pm_rpm@dpms-lpsp.html
- shard-dg1: [SKIP][253] ([i915#1397]) -> [PASS][254] +1 other test pass
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg1-18/igt@i915_pm_rpm@dpms-lpsp.html
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg1-19/igt@i915_pm_rpm@dpms-lpsp.html
* igt@i915_suspend@debugfs-reader:
- shard-dg2: [FAIL][255] ([fdo#103375]) -> [PASS][256] +2 other tests pass
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg2-5/igt@i915_suspend@debugfs-reader.html
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-11/igt@i915_suspend@debugfs-reader.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-tglu: [FAIL][257] ([i915#3743]) -> [PASS][258]
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-tglu-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-5/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-apl: [FAIL][259] ([i915#2346]) -> [PASS][260]
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-apl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-dg2: [INCOMPLETE][261] -> [PASS][262]
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg2-1/igt@kms_fbcon_fbt@fbc-suspend.html
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-7/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@flip-vs-suspend-interruptible@d-edp1:
- shard-mtlp: [DMESG-WARN][263] ([i915#9262]) -> [PASS][264] +2 other tests pass
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-mtlp-4/igt@kms_flip@flip-vs-suspend-interruptible@d-edp1.html
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-6/igt@kms_flip@flip-vs-suspend-interruptible@d-edp1.html
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
- shard-dg2: [FAIL][265] ([i915#6880]) -> [PASS][266]
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1:
- shard-apl: [INCOMPLETE][267] -> [PASS][268]
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-apl6/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1.html
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-apl6/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1.html
* igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-a-hdmi-a-2:
- shard-rkl: [INCOMPLETE][269] -> [PASS][270]
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-rkl-4/igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-a-hdmi-a-2.html
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-a-hdmi-a-2.html
* {igt@kms_pm_dc@dc9-dpms}:
- shard-tglu: [SKIP][271] ([i915#4281]) -> [PASS][272]
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-tglu-3/igt@kms_pm_dc@dc9-dpms.html
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-9/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_universal_plane@cursor-fb-leak-pipe-a:
- shard-tglu: [FAIL][273] ([i915#9196]) -> [PASS][274]
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-tglu-2/igt@kms_universal_plane@cursor-fb-leak-pipe-a.html
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-2/igt@kms_universal_plane@cursor-fb-leak-pipe-a.html
* igt@kms_universal_plane@cursor-fb-leak-pipe-d:
- shard-dg1: [FAIL][275] ([i915#9196]) -> [PASS][276]
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg1-15/igt@kms_universal_plane@cursor-fb-leak-pipe-d.html
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg1-12/igt@kms_universal_plane@cursor-fb-leak-pipe-d.html
#### Warnings ####
* igt@gem_create@create-ext-cpu-access-big:
- shard-dg2: [ABORT][277] ([i915#7461]) -> [INCOMPLETE][278] ([i915#9283])
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg2-7/igt@gem_create@create-ext-cpu-access-big.html
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-11/igt@gem_create@create-ext-cpu-access-big.html
* igt@i915_hangman@engine-error-state-capture@vcs1:
- shard-mtlp: [DMESG-WARN][279] ([i915#9262]) -> [ABORT][280] ([i915#9262])
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-mtlp-1/igt@i915_hangman@engine-error-state-capture@vcs1.html
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-mtlp-4/igt@i915_hangman@engine-error-state-capture@vcs1.html
* igt@i915_pm_rc6_residency@rc6-idle@bcs0:
- shard-tglu: [FAIL][281] ([i915#2681] / [i915#3591]) -> [WARN][282] ([i915#2681])
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-tglu-2/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-8/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- shard-tglu: [WARN][283] ([i915#2681]) -> [FAIL][284] ([i915#2681] / [i915#3591])
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-tglu-2/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-tglu-8/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@kms_content_protection@content_type_change:
- shard-dg2: [SKIP][285] ([i915#7118]) -> [SKIP][286] ([i915#7118] / [i915#7162])
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg2-5/igt@kms_content_protection@content_type_change.html
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg2-11/igt@kms_content_protection@content_type_change.html
* igt@kms_fbcon_fbt@psr:
- shard-rkl: [SKIP][287] ([i915#3955]) -> [SKIP][288] ([fdo#110189] / [i915#3955])
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-rkl-6/igt@kms_fbcon_fbt@psr.html
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-1/igt@kms_fbcon_fbt@psr.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-rkl: [SKIP][289] ([i915#4816]) -> [SKIP][290] ([i915#4070] / [i915#4816])
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-rkl-7/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-rkl-6/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_psr@cursor_plane_move:
- shard-dg1: [SKIP][291] ([i915#1072] / [i915#4078]) -> [SKIP][292] ([i915#1072]) +1 other test skip
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg1-12/igt@kms_psr@cursor_plane_move.html
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg1-15/igt@kms_psr@cursor_plane_move.html
* igt@kms_psr@sprite_plane_onoff:
- shard-dg1: [SKIP][293] ([i915#1072]) -> [SKIP][294] ([i915#1072] / [i915#4078]) +1 other test skip
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13643/shard-dg1-17/igt@kms_psr@sprite_plane_onoff.html
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/shard-dg1-12/igt@kms_psr@sprite_plane_onoff.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#2017]: https://gitlab.freedesktop.org/drm/intel/issues/2017
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#2724]: https://gitlab.freedesktop.org/drm/intel/issues/2724
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4473]: https://gitlab.freedesktop.org/drm/intel/issues/4473
[i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5234]: https://gitlab.freedesktop.org/drm/intel/issues/5234
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5460]: https://gitlab.freedesktop.org/drm/intel/issues/5460
[i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6121]: https://gitlab.freedesktop.org/drm/intel/issues/6121
[i915#6187]: https://gitlab.freedesktop.org/drm/intel/issues/6187
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6786]: https://gitlab.freedesktop.org/drm/intel/issues/6786
[i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7069]: https://gitlab.freedesktop.org/drm/intel/issues/7069
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7162]: https://gitlab.freedesktop.org/drm/intel/issues/7162
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7790]: https://gitlab.freedesktop.org/drm/intel/issues/7790
[i915#7823]: https://gitlab.freedesktop.org/drm/intel/issues/7823
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8247]: https://gitlab.freedesktop.org/drm/intel/issues/8247
[i915#8248]: https://gitlab.freedesktop.org/drm/intel/issues/8248
[i915#8289]: https://gitlab.freedesktop.org/drm/intel/issues/8289
[i915#8381]: https://gitlab.freedesktop.org/drm/intel/issues/8381
[i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
[i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
[i915#8428]: https://gitlab.freedesktop.org/drm/intel/issues/8428
[i915#8430]: https://gitlab.freedesktop.org/drm/intel/issues/8430
[i915#8431]: https://gitlab.freedesktop.org/drm/intel/issues/8431
[i915#8437]: https://gitlab.freedesktop.org/drm/intel/issues/8437
[i915#8502]: https://gitlab.freedesktop.org/drm/intel/issues/8502
[i915#8516]: https://gitlab.freedesktop.org/drm/intel/issues/8516
[i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
[i915#8562]: https://gitlab.freedesktop.org/drm/intel/issues/8562
[i915#8617]: https://gitlab.freedesktop.org/drm/intel/issues/8617
[i915#8661]: https://gitlab.freedesktop.org/drm/intel/issues/8661
[i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
[i915#8709]: https://gitlab.freedesktop.org/drm/intel/issues/8709
[i915#8809]: https://gitlab.freedesktop.org/drm/intel/issues/8809
[i915#8814]: https://gitlab.freedesktop.org/drm/intel/issues/8814
[i915#8821]: https://gitlab.freedesktop.org/drm/intel/issues/8821
[i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841
[i915#9053]: https://gitlab.freedesktop.org/drm/intel/issues/9053
[i915#9119]: https://gitlab.freedesktop.org/drm/intel/issues/9119
[i915#9196]: https://gitlab.freedesktop.org/drm/intel/issues/9196
[i915#9259]: https://gitlab.freedesktop.org/drm/intel/issues/9259
[i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262
[i915#9283]: https://gitlab.freedesktop.org/drm/intel/issues/9283
[i915#9311]: https://gitlab.freedesktop.org/drm/intel/issues/9311
[i915#9312]: https://gitlab.freedesktop.org/drm/intel/issues/9312
[i915#9337]: https://gitlab.freedesktop.org/drm/intel/issues/9337
Build changes
-------------
* Linux: CI_DRM_13643 -> Patchwork_123813v1
CI-20190529: 20190529
CI_DRM_13643: dc4cd6e4e53d46211952fe7c0e408fce3e212993 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7490: 7490
Patchwork_123813v1: dc4cd6e4e53d46211952fe7c0e408fce3e212993 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v1/index.html
[-- Attachment #2: Type: text/html, Size: 95480 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 2/4] drm/i915: Enable Wa_16019325821
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
(?)
@ 2023-10-07 0:10 ` Belgaumkar, Vinay
2023-10-27 21:08 ` John Harrison
-1 siblings, 1 reply; 18+ messages in thread
From: Belgaumkar, Vinay @ 2023-10-07 0:10 UTC (permalink / raw)
To: John.C.Harrison, Intel-GFX; +Cc: DRI-Devel
On 9/15/2023 2:55 PM, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> Some platforms require holding RCS context switches until CCS is idle
> (the reverse w/a of Wa_14014475959). Some platforms require both
> versions.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 19 +++++++++++--------
> drivers/gpu/drm/i915/gt/intel_engine_types.h | 7 ++++---
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 4 ++++
> drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 3 ++-
> .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 +++++++-
> 5 files changed, 28 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> index 0143445dba830..8b494825c55f2 100644
> --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> @@ -733,21 +733,23 @@ static u32 *gen12_emit_preempt_busywait(struct i915_request *rq, u32 *cs)
> }
>
> /* Wa_14014475959:dg2 */
> -#define CCS_SEMAPHORE_PPHWSP_OFFSET 0x540
> -static u32 ccs_semaphore_offset(struct i915_request *rq)
> +/* Wa_16019325821 */
> +#define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET 0x540
> +static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
> {
> return i915_ggtt_offset(rq->context->state) +
> - (LRC_PPHWSP_PN * PAGE_SIZE) + CCS_SEMAPHORE_PPHWSP_OFFSET;
> + (LRC_PPHWSP_PN * PAGE_SIZE) + HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET;
> }
>
> /* Wa_14014475959:dg2 */
> -static u32 *ccs_emit_wa_busywait(struct i915_request *rq, u32 *cs)
> +/* Wa_16019325821 */
> +static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq, u32 *cs)
> {
> int i;
>
> *cs++ = MI_ATOMIC_INLINE | MI_ATOMIC_GLOBAL_GTT | MI_ATOMIC_CS_STALL |
> MI_ATOMIC_MOVE;
> - *cs++ = ccs_semaphore_offset(rq);
> + *cs++ = hold_switchout_semaphore_offset(rq);
> *cs++ = 0;
> *cs++ = 1;
>
> @@ -763,7 +765,7 @@ static u32 *ccs_emit_wa_busywait(struct i915_request *rq, u32 *cs)
> MI_SEMAPHORE_POLL |
> MI_SEMAPHORE_SAD_EQ_SDD;
> *cs++ = 0;
> - *cs++ = ccs_semaphore_offset(rq);
> + *cs++ = hold_switchout_semaphore_offset(rq);
> *cs++ = 0;
>
> return cs;
> @@ -780,8 +782,9 @@ gen12_emit_fini_breadcrumb_tail(struct i915_request *rq, u32 *cs)
> cs = gen12_emit_preempt_busywait(rq, cs);
>
> /* Wa_14014475959:dg2 */
> - if (intel_engine_uses_wa_hold_ccs_switchout(rq->engine))
> - cs = ccs_emit_wa_busywait(rq, cs);
> + /* Wa_16019325821 */
> + if (intel_engine_uses_wa_hold_switchout(rq->engine))
> + cs = hold_switchout_emit_wa_busywait(rq, cs);
>
> rq->tail = intel_ring_offset(rq, cs);
> assert_ring_tail_valid(rq->ring, rq->tail);
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> index a7e6775980043..68fe1cef9cd94 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> @@ -573,7 +573,7 @@ struct intel_engine_cs {
> #define I915_ENGINE_HAS_RCS_REG_STATE BIT(9)
> #define I915_ENGINE_HAS_EU_PRIORITY BIT(10)
> #define I915_ENGINE_FIRST_RENDER_COMPUTE BIT(11)
> -#define I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT BIT(12)
> +#define I915_ENGINE_USES_WA_HOLD_SWITCHOUT BIT(12)
> unsigned int flags;
>
> /*
> @@ -683,10 +683,11 @@ intel_engine_has_relative_mmio(const struct intel_engine_cs * const engine)
> }
>
> /* Wa_14014475959:dg2 */
> +/* Wa_16019325821 */
> static inline bool
> -intel_engine_uses_wa_hold_ccs_switchout(struct intel_engine_cs *engine)
> +intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine)
> {
> - return engine->flags & I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT;
> + return engine->flags & I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
> }
>
> #endif /* __INTEL_ENGINE_TYPES_H__ */
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 27df41c53b890..4001679ba0793 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -294,6 +294,10 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
> IS_DG2(gt->i915))
> flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
>
> + /* Wa_16019325821 */
> + if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))
> + flags |= GUC_WA_RCS_CCS_SWITCHOUT;
> +
> /*
> * Wa_14012197797
> * Wa_22011391025
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index b4d56eccfb1f0..f97af0168a66b 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -95,8 +95,9 @@
> #define GUC_WA_GAM_CREDITS BIT(10)
> #define GUC_WA_DUAL_QUEUE BIT(11)
> #define GUC_WA_RCS_RESET_BEFORE_RC6 BIT(13)
> -#define GUC_WA_CONTEXT_ISOLATION BIT(15)
> #define GUC_WA_PRE_PARSER BIT(14)
> +#define GUC_WA_CONTEXT_ISOLATION BIT(15)
> +#define GUC_WA_RCS_CCS_SWITCHOUT BIT(16)
> #define GUC_WA_HOLD_CCS_SWITCHOUT BIT(17)
> #define GUC_WA_POLLCS BIT(18)
> #define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index cabdc645fcddb..ff38a815701ce 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -4267,7 +4267,13 @@ static void guc_default_vfuncs(struct intel_engine_cs *engine)
> if (engine->class == COMPUTE_CLASS)
> if (IS_GFX_GT_IP_STEP(engine->gt, IP_VER(12, 70), STEP_A0, STEP_B0) ||
> IS_DG2(engine->i915))
> - engine->flags |= I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT;
> + engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
> +
> + /* Wa_16019325821 */
> + if (engine->class == COMPUTE_CLASS || engine->class == RENDER_CLASS)
do we need to set the flag for compute class again here? It has been
done above. Other than that, this is
Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> + if (IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 71)))
> + engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
> +
>
> /*
> * TODO: GuC supports timeslicing and semaphores as well, but they're
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915/guc: Add support for w/a KLVs
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
(?)
@ 2023-10-07 0:38 ` Belgaumkar, Vinay
2023-10-27 21:12 ` John Harrison
-1 siblings, 1 reply; 18+ messages in thread
From: Belgaumkar, Vinay @ 2023-10-07 0:38 UTC (permalink / raw)
To: John.C.Harrison, Intel-GFX; +Cc: DRI-Devel
On 9/15/2023 2:55 PM, John.C.Harrison@Intel.com wrote:
> From: John Harrison <John.C.Harrison@Intel.com>
>
> To prevent running out of bits, new w/a enable flags are being added
> via a KLV system instead of a 32 bit flags word.
>
> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> .../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h | 1 +
> drivers/gpu/drm/i915/gt/uc/intel_guc.h | 3 +
> drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 64 ++++++++++++++++++-
> drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 6 ++
> drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 5 +-
> 5 files changed, 77 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
> index dabeaf4f245f3..00d6402333f8e 100644
> --- a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
> +++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
> @@ -36,6 +36,7 @@ enum intel_guc_load_status {
> INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_START,
> INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID = 0x73,
> INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID = 0x74,
> + INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR = 0x75,
> INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_END,
>
> INTEL_GUC_LOAD_STATUS_READY = 0xF0,
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> index 6c392bad29c19..3b1fc5f96306b 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> @@ -186,6 +186,8 @@ struct intel_guc {
> struct guc_mmio_reg *ads_regset;
> /** @ads_golden_ctxt_size: size of the golden contexts in the ADS */
> u32 ads_golden_ctxt_size;
> + /** @ads_waklv_size: size of workaround KLVs */
> + u32 ads_waklv_size;
> /** @ads_capture_size: size of register lists in the ADS used for error capture */
> u32 ads_capture_size;
> /** @ads_engine_usage_size: size of engine usage in the ADS */
> @@ -295,6 +297,7 @@ struct intel_guc {
> #define MAKE_GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
> #define MAKE_GUC_VER_STRUCT(ver) MAKE_GUC_VER((ver).major, (ver).minor, (ver).patch)
> #define GUC_SUBMIT_VER(guc) MAKE_GUC_VER_STRUCT((guc)->submission_version)
> +#define GUC_FIRMWARE_VER(guc) MAKE_GUC_VER_STRUCT((guc)->fw.file_selected.ver)
>
> static inline struct intel_guc *log_to_guc(struct intel_guc_log *log)
> {
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> index 63724e17829a7..792910af3a481 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> @@ -46,6 +46,10 @@
> * +---------------------------------------+
> * | padding |
> * +---------------------------------------+ <== 4K aligned
> + * | w/a KLVs |
> + * +---------------------------------------+
> + * | padding |
> + * +---------------------------------------+ <== 4K aligned
> * | capture lists |
> * +---------------------------------------+
> * | padding |
> @@ -88,6 +92,11 @@ static u32 guc_ads_golden_ctxt_size(struct intel_guc *guc)
> return PAGE_ALIGN(guc->ads_golden_ctxt_size);
> }
>
> +static u32 guc_ads_waklv_size(struct intel_guc *guc)
> +{
> + return PAGE_ALIGN(guc->ads_waklv_size);
> +}
> +
> static u32 guc_ads_capture_size(struct intel_guc *guc)
> {
> return PAGE_ALIGN(guc->ads_capture_size);
> @@ -113,7 +122,7 @@ static u32 guc_ads_golden_ctxt_offset(struct intel_guc *guc)
> return PAGE_ALIGN(offset);
> }
>
> -static u32 guc_ads_capture_offset(struct intel_guc *guc)
> +static u32 guc_ads_waklv_offset(struct intel_guc *guc)
> {
> u32 offset;
>
> @@ -123,6 +132,16 @@ static u32 guc_ads_capture_offset(struct intel_guc *guc)
> return PAGE_ALIGN(offset);
> }
>
> +static u32 guc_ads_capture_offset(struct intel_guc *guc)
> +{
> + u32 offset;
> +
> + offset = guc_ads_waklv_offset(guc) +
> + guc_ads_waklv_size(guc);
> +
> + return PAGE_ALIGN(offset);
> +}
> +
> static u32 guc_ads_private_data_offset(struct intel_guc *guc)
> {
> u32 offset;
> @@ -791,6 +810,40 @@ guc_capture_prep_lists(struct intel_guc *guc)
> return PAGE_ALIGN(total_size);
> }
>
> +static void guc_waklv_init(struct intel_guc *guc)
> +{
> + struct intel_gt *gt = guc_to_gt(guc);
> + u32 offset, addr_ggtt, remain, size;
> +
> + if (!intel_uc_uses_guc_submission(>->uc))
> + return;
> +
> + if (GUC_FIRMWARE_VER(guc) < MAKE_GUC_VER(70, 10, 0))
> + return;
should this be <= ?
> +
> + GEM_BUG_ON(iosys_map_is_null(&guc->ads_map));
> + offset = guc_ads_waklv_offset(guc);
> + remain = guc_ads_waklv_size(guc);
> +
> + /* Add workarounds here */
> +
extra blank line?
> + size = guc_ads_waklv_size(guc) - remain;
Hmm, am I missing something or remain is already set to
guc_ads_walkv_size()?
Thanks,
Vinay.
> + if (!size)
> + return;
> +
> + addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;
> +
> + ads_blob_write(guc, ads.wa_klv_addr_lo, addr_ggtt);
> + ads_blob_write(guc, ads.wa_klv_addr_hi, 0);
> + ads_blob_write(guc, ads.wa_klv_size, size);
> +}
> +
> +static int guc_prep_waklv(struct intel_guc *guc)
> +{
> + /* Fudge something chunky for now: */
> + return PAGE_SIZE;
> +}
> +
> static void __guc_ads_init(struct intel_guc *guc)
> {
> struct intel_gt *gt = guc_to_gt(guc);
> @@ -838,6 +891,9 @@ static void __guc_ads_init(struct intel_guc *guc)
> /* MMIO save/restore list */
> guc_mmio_reg_state_init(guc);
>
> + /* Workaround KLV list */
> + guc_waklv_init(guc);
> +
> /* Private Data */
> ads_blob_write(guc, ads.private_data, base +
> guc_ads_private_data_offset(guc));
> @@ -881,6 +937,12 @@ int intel_guc_ads_create(struct intel_guc *guc)
> return ret;
> guc->ads_capture_size = ret;
>
> + /* And don't forget the workaround KLVs: */
> + ret = guc_prep_waklv(guc);
> + if (ret < 0)
> + return ret;
> + guc->ads_waklv_size = ret;
> +
> /* Now the total size can be determined: */
> size = guc_ads_blob_size(guc);
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
> index 0f79cb6585182..a54d58b9243b0 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
> @@ -115,6 +115,7 @@ static inline bool guc_load_done(struct intel_uncore *uncore, u32 *status, bool
> case INTEL_GUC_LOAD_STATUS_INIT_DATA_INVALID:
> case INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID:
> case INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID:
> + case INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR:
> *success = false;
> return true;
> }
> @@ -241,6 +242,11 @@ static int guc_wait_ucode(struct intel_guc *guc)
> ret = -EPERM;
> break;
>
> + case INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR:
> + guc_info(guc, "invalid w/a KLV entry\n");
> + ret = -EINVAL;
> + break;
> +
> case INTEL_GUC_LOAD_STATUS_HWCONFIG_START:
> guc_info(guc, "still extracting hwconfig table.\n");
> ret = -ETIMEDOUT;
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index f97af0168a66b..3266842d925e6 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -429,7 +429,10 @@ struct guc_ads {
> u32 capture_instance[GUC_CAPTURE_LIST_INDEX_MAX][GUC_MAX_ENGINE_CLASSES];
> u32 capture_class[GUC_CAPTURE_LIST_INDEX_MAX][GUC_MAX_ENGINE_CLASSES];
> u32 capture_global[GUC_CAPTURE_LIST_INDEX_MAX];
> - u32 reserved[14];
> + u32 wa_klv_addr_lo;
> + u32 wa_klv_addr_hi;
> + u32 wa_klv_size;
> + u32 reserved[11];
> } __packed;
>
> /* Engine usage stats */
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 2/4] drm/i915: Enable Wa_16019325821
2023-10-07 0:10 ` Belgaumkar, Vinay
@ 2023-10-27 21:08 ` John Harrison
0 siblings, 0 replies; 18+ messages in thread
From: John Harrison @ 2023-10-27 21:08 UTC (permalink / raw)
To: Belgaumkar, Vinay, Intel-GFX; +Cc: DRI-Devel
On 10/6/2023 17:10, Belgaumkar, Vinay wrote:
> On 9/15/2023 2:55 PM, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> Some platforms require holding RCS context switches until CCS is idle
>> (the reverse w/a of Wa_14014475959). Some platforms require both
>> versions.
>>
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>> ---
>> drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 19 +++++++++++--------
>> drivers/gpu/drm/i915/gt/intel_engine_types.h | 7 ++++---
>> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 4 ++++
>> drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 3 ++-
>> .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 8 +++++++-
>> 5 files changed, 28 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
>> b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
>> index 0143445dba830..8b494825c55f2 100644
>> --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
>> +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
>> @@ -733,21 +733,23 @@ static u32 *gen12_emit_preempt_busywait(struct
>> i915_request *rq, u32 *cs)
>> }
>> /* Wa_14014475959:dg2 */
>> -#define CCS_SEMAPHORE_PPHWSP_OFFSET 0x540
>> -static u32 ccs_semaphore_offset(struct i915_request *rq)
>> +/* Wa_16019325821 */
>> +#define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET 0x540
>> +static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
>> {
>> return i915_ggtt_offset(rq->context->state) +
>> - (LRC_PPHWSP_PN * PAGE_SIZE) + CCS_SEMAPHORE_PPHWSP_OFFSET;
>> + (LRC_PPHWSP_PN * PAGE_SIZE) +
>> HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET;
>> }
>> /* Wa_14014475959:dg2 */
>> -static u32 *ccs_emit_wa_busywait(struct i915_request *rq, u32 *cs)
>> +/* Wa_16019325821 */
>> +static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq,
>> u32 *cs)
>> {
>> int i;
>> *cs++ = MI_ATOMIC_INLINE | MI_ATOMIC_GLOBAL_GTT |
>> MI_ATOMIC_CS_STALL |
>> MI_ATOMIC_MOVE;
>> - *cs++ = ccs_semaphore_offset(rq);
>> + *cs++ = hold_switchout_semaphore_offset(rq);
>> *cs++ = 0;
>> *cs++ = 1;
>> @@ -763,7 +765,7 @@ static u32 *ccs_emit_wa_busywait(struct
>> i915_request *rq, u32 *cs)
>> MI_SEMAPHORE_POLL |
>> MI_SEMAPHORE_SAD_EQ_SDD;
>> *cs++ = 0;
>> - *cs++ = ccs_semaphore_offset(rq);
>> + *cs++ = hold_switchout_semaphore_offset(rq);
>> *cs++ = 0;
>> return cs;
>> @@ -780,8 +782,9 @@ gen12_emit_fini_breadcrumb_tail(struct
>> i915_request *rq, u32 *cs)
>> cs = gen12_emit_preempt_busywait(rq, cs);
>> /* Wa_14014475959:dg2 */
>> - if (intel_engine_uses_wa_hold_ccs_switchout(rq->engine))
>> - cs = ccs_emit_wa_busywait(rq, cs);
>> + /* Wa_16019325821 */
>> + if (intel_engine_uses_wa_hold_switchout(rq->engine))
>> + cs = hold_switchout_emit_wa_busywait(rq, cs);
>> rq->tail = intel_ring_offset(rq, cs);
>> assert_ring_tail_valid(rq->ring, rq->tail);
>> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h
>> b/drivers/gpu/drm/i915/gt/intel_engine_types.h
>> index a7e6775980043..68fe1cef9cd94 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
>> +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
>> @@ -573,7 +573,7 @@ struct intel_engine_cs {
>> #define I915_ENGINE_HAS_RCS_REG_STATE BIT(9)
>> #define I915_ENGINE_HAS_EU_PRIORITY BIT(10)
>> #define I915_ENGINE_FIRST_RENDER_COMPUTE BIT(11)
>> -#define I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT BIT(12)
>> +#define I915_ENGINE_USES_WA_HOLD_SWITCHOUT BIT(12)
>> unsigned int flags;
>> /*
>> @@ -683,10 +683,11 @@ intel_engine_has_relative_mmio(const struct
>> intel_engine_cs * const engine)
>> }
>> /* Wa_14014475959:dg2 */
>> +/* Wa_16019325821 */
>> static inline bool
>> -intel_engine_uses_wa_hold_ccs_switchout(struct intel_engine_cs *engine)
>> +intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine)
>> {
>> - return engine->flags & I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT;
>> + return engine->flags & I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
>> }
>> #endif /* __INTEL_ENGINE_TYPES_H__ */
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> index 27df41c53b890..4001679ba0793 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> @@ -294,6 +294,10 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
>> IS_DG2(gt->i915))
>> flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
>> + /* Wa_16019325821 */
>> + if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))
>> + flags |= GUC_WA_RCS_CCS_SWITCHOUT;
>> +
>> /*
>> * Wa_14012197797
>> * Wa_22011391025
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> index b4d56eccfb1f0..f97af0168a66b 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> @@ -95,8 +95,9 @@
>> #define GUC_WA_GAM_CREDITS BIT(10)
>> #define GUC_WA_DUAL_QUEUE BIT(11)
>> #define GUC_WA_RCS_RESET_BEFORE_RC6 BIT(13)
>> -#define GUC_WA_CONTEXT_ISOLATION BIT(15)
>> #define GUC_WA_PRE_PARSER BIT(14)
>> +#define GUC_WA_CONTEXT_ISOLATION BIT(15)
>> +#define GUC_WA_RCS_CCS_SWITCHOUT BIT(16)
>> #define GUC_WA_HOLD_CCS_SWITCHOUT BIT(17)
>> #define GUC_WA_POLLCS BIT(18)
>> #define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> index cabdc645fcddb..ff38a815701ce 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> @@ -4267,7 +4267,13 @@ static void guc_default_vfuncs(struct
>> intel_engine_cs *engine)
>> if (engine->class == COMPUTE_CLASS)
>> if (IS_GFX_GT_IP_STEP(engine->gt, IP_VER(12, 70), STEP_A0,
>> STEP_B0) ||
>> IS_DG2(engine->i915))
>> - engine->flags |= I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT;
>> + engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
>> +
>> + /* Wa_16019325821 */
>> + if (engine->class == COMPUTE_CLASS || engine->class ==
>> RENDER_CLASS)
>
> do we need to set the flag for compute class again here? It has been
> done above. Other than that, this is
This is not setting a flag, it is checking a flag. The w/a only applies
to RCS and CCS engines. The above check is for a different w/a. We
generally try to keep each w/a separate and discrete. If they start
sharing condition terms then things can get broken when the conditions
for one w/a need to be changed and the code has to be untangled.
John.
>
> Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
>
>> + if (IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70),
>> IP_VER(12, 71)))
>> + engine->flags |= I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
>> +
>> /*
>> * TODO: GuC supports timeslicing and semaphores as well, but
>> they're
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915/guc: Add support for w/a KLVs
2023-10-07 0:38 ` Belgaumkar, Vinay
@ 2023-10-27 21:12 ` John Harrison
0 siblings, 0 replies; 18+ messages in thread
From: John Harrison @ 2023-10-27 21:12 UTC (permalink / raw)
To: Belgaumkar, Vinay, Intel-GFX; +Cc: DRI-Devel
On 10/6/2023 17:38, Belgaumkar, Vinay wrote:
> On 9/15/2023 2:55 PM, John.C.Harrison@Intel.com wrote:
>> From: John Harrison <John.C.Harrison@Intel.com>
>>
>> To prevent running out of bits, new w/a enable flags are being added
>> via a KLV system instead of a 32 bit flags word.
>>
>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
>> ---
>> .../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h | 1 +
>> drivers/gpu/drm/i915/gt/uc/intel_guc.h | 3 +
>> drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 64 ++++++++++++++++++-
>> drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 6 ++
>> drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 5 +-
>> 5 files changed, 77 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
>> b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
>> index dabeaf4f245f3..00d6402333f8e 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
>> @@ -36,6 +36,7 @@ enum intel_guc_load_status {
>> INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_START,
>> INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID = 0x73,
>> INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID = 0x74,
>> + INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR = 0x75,
>> INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_END,
>> INTEL_GUC_LOAD_STATUS_READY = 0xF0,
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> index 6c392bad29c19..3b1fc5f96306b 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> @@ -186,6 +186,8 @@ struct intel_guc {
>> struct guc_mmio_reg *ads_regset;
>> /** @ads_golden_ctxt_size: size of the golden contexts in the
>> ADS */
>> u32 ads_golden_ctxt_size;
>> + /** @ads_waklv_size: size of workaround KLVs */
>> + u32 ads_waklv_size;
>> /** @ads_capture_size: size of register lists in the ADS used
>> for error capture */
>> u32 ads_capture_size;
>> /** @ads_engine_usage_size: size of engine usage in the ADS */
>> @@ -295,6 +297,7 @@ struct intel_guc {
>> #define MAKE_GUC_VER(maj, min, pat) (((maj) << 16) | ((min) <<
>> 8) | (pat))
>> #define MAKE_GUC_VER_STRUCT(ver) MAKE_GUC_VER((ver).major,
>> (ver).minor, (ver).patch)
>> #define GUC_SUBMIT_VER(guc)
>> MAKE_GUC_VER_STRUCT((guc)->submission_version)
>> +#define GUC_FIRMWARE_VER(guc)
>> MAKE_GUC_VER_STRUCT((guc)->fw.file_selected.ver)
>> static inline struct intel_guc *log_to_guc(struct intel_guc_log
>> *log)
>> {
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
>> index 63724e17829a7..792910af3a481 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
>> @@ -46,6 +46,10 @@
>> * +---------------------------------------+
>> * | padding |
>> * +---------------------------------------+ <== 4K aligned
>> + * | w/a KLVs |
>> + * +---------------------------------------+
>> + * | padding |
>> + * +---------------------------------------+ <== 4K aligned
>> * | capture lists |
>> * +---------------------------------------+
>> * | padding |
>> @@ -88,6 +92,11 @@ static u32 guc_ads_golden_ctxt_size(struct
>> intel_guc *guc)
>> return PAGE_ALIGN(guc->ads_golden_ctxt_size);
>> }
>> +static u32 guc_ads_waklv_size(struct intel_guc *guc)
>> +{
>> + return PAGE_ALIGN(guc->ads_waklv_size);
>> +}
>> +
>> static u32 guc_ads_capture_size(struct intel_guc *guc)
>> {
>> return PAGE_ALIGN(guc->ads_capture_size);
>> @@ -113,7 +122,7 @@ static u32 guc_ads_golden_ctxt_offset(struct
>> intel_guc *guc)
>> return PAGE_ALIGN(offset);
>> }
>> -static u32 guc_ads_capture_offset(struct intel_guc *guc)
>> +static u32 guc_ads_waklv_offset(struct intel_guc *guc)
>> {
>> u32 offset;
>> @@ -123,6 +132,16 @@ static u32 guc_ads_capture_offset(struct
>> intel_guc *guc)
>> return PAGE_ALIGN(offset);
>> }
>> +static u32 guc_ads_capture_offset(struct intel_guc *guc)
>> +{
>> + u32 offset;
>> +
>> + offset = guc_ads_waklv_offset(guc) +
>> + guc_ads_waklv_size(guc);
>> +
>> + return PAGE_ALIGN(offset);
>> +}
>> +
>> static u32 guc_ads_private_data_offset(struct intel_guc *guc)
>> {
>> u32 offset;
>> @@ -791,6 +810,40 @@ guc_capture_prep_lists(struct intel_guc *guc)
>> return PAGE_ALIGN(total_size);
>> }
>> +static void guc_waklv_init(struct intel_guc *guc)
>> +{
>> + struct intel_gt *gt = guc_to_gt(guc);
>> + u32 offset, addr_ggtt, remain, size;
>> +
>> + if (!intel_uc_uses_guc_submission(>->uc))
>> + return;
>> +
>> + if (GUC_FIRMWARE_VER(guc) < MAKE_GUC_VER(70, 10, 0))
>> + return;
> should this be <= ?
No. GuC 70.10.0 is when w/a KLVs were introduced. So we want to skip on
any version that is prior to 70.10.0.
>> +
>> + GEM_BUG_ON(iosys_map_is_null(&guc->ads_map));
>> + offset = guc_ads_waklv_offset(guc);
>> + remain = guc_ads_waklv_size(guc);
>> +
>> + /* Add workarounds here */
>> +
> extra blank line?
The point is that the comment is a place holder for where the w/a KLVs
will be added. This is just the prep patch so that whichever w/a
actually gets implemented first (there are still issues with the current
options), the w/a patch is only added the w/a itself and not a whole
bunch of infrastructure as well.
>> + size = guc_ads_waklv_size(guc) - remain;
>
> Hmm, am I missing something or remain is already set to
> guc_ads_walkv_size()?
You are missing the actual w/a to be added above :).
John.
>
> Thanks,
>
> Vinay.
>
>> + if (!size)
>> + return;
>> +
>> + addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;
>> +
>> + ads_blob_write(guc, ads.wa_klv_addr_lo, addr_ggtt);
>> + ads_blob_write(guc, ads.wa_klv_addr_hi, 0);
>> + ads_blob_write(guc, ads.wa_klv_size, size);
>> +}
>> +
>> +static int guc_prep_waklv(struct intel_guc *guc)
>> +{
>> + /* Fudge something chunky for now: */
>> + return PAGE_SIZE;
>> +}
>> +
>> static void __guc_ads_init(struct intel_guc *guc)
>> {
>> struct intel_gt *gt = guc_to_gt(guc);
>> @@ -838,6 +891,9 @@ static void __guc_ads_init(struct intel_guc *guc)
>> /* MMIO save/restore list */
>> guc_mmio_reg_state_init(guc);
>> + /* Workaround KLV list */
>> + guc_waklv_init(guc);
>> +
>> /* Private Data */
>> ads_blob_write(guc, ads.private_data, base +
>> guc_ads_private_data_offset(guc));
>> @@ -881,6 +937,12 @@ int intel_guc_ads_create(struct intel_guc *guc)
>> return ret;
>> guc->ads_capture_size = ret;
>> + /* And don't forget the workaround KLVs: */
>> + ret = guc_prep_waklv(guc);
>> + if (ret < 0)
>> + return ret;
>> + guc->ads_waklv_size = ret;
>> +
>> /* Now the total size can be determined: */
>> size = guc_ads_blob_size(guc);
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
>> index 0f79cb6585182..a54d58b9243b0 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
>> @@ -115,6 +115,7 @@ static inline bool guc_load_done(struct
>> intel_uncore *uncore, u32 *status, bool
>> case INTEL_GUC_LOAD_STATUS_INIT_DATA_INVALID:
>> case INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID:
>> case INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID:
>> + case INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR:
>> *success = false;
>> return true;
>> }
>> @@ -241,6 +242,11 @@ static int guc_wait_ucode(struct intel_guc *guc)
>> ret = -EPERM;
>> break;
>> + case INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR:
>> + guc_info(guc, "invalid w/a KLV entry\n");
>> + ret = -EINVAL;
>> + break;
>> +
>> case INTEL_GUC_LOAD_STATUS_HWCONFIG_START:
>> guc_info(guc, "still extracting hwconfig table.\n");
>> ret = -ETIMEDOUT;
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> index f97af0168a66b..3266842d925e6 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
>> @@ -429,7 +429,10 @@ struct guc_ads {
>> u32
>> capture_instance[GUC_CAPTURE_LIST_INDEX_MAX][GUC_MAX_ENGINE_CLASSES];
>> u32
>> capture_class[GUC_CAPTURE_LIST_INDEX_MAX][GUC_MAX_ENGINE_CLASSES];
>> u32 capture_global[GUC_CAPTURE_LIST_INDEX_MAX];
>> - u32 reserved[14];
>> + u32 wa_klv_addr_lo;
>> + u32 wa_klv_addr_hi;
>> + u32 wa_klv_size;
>> + u32 reserved[11];
>> } __packed;
>> /* Engine usage stats */
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2023-10-27 21:12 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-09-15 21:55 [PATCH 0/4] Enable Wa_14019159160 and Wa_16019325821 for MTL John.C.Harrison
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
2023-09-15 21:55 ` [PATCH 1/4] drm/i915/guc: Update 'recommended' version to 70.11.0 for DG2/ADL-P/MTL John.C.Harrison
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
2023-09-15 21:55 ` [PATCH 2/4] drm/i915: Enable Wa_16019325821 John.C.Harrison
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
2023-10-07 0:10 ` Belgaumkar, Vinay
2023-10-27 21:08 ` John Harrison
2023-09-15 21:55 ` [PATCH 3/4] drm/i915/guc: Add support for w/a KLVs John.C.Harrison
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
2023-10-07 0:38 ` Belgaumkar, Vinay
2023-10-27 21:12 ` John Harrison
2023-09-15 21:55 ` [PATCH 4/4] drm/i915/guc: Enable Wa_14019159160 John.C.Harrison
2023-09-15 21:55 ` [Intel-gfx] " John.C.Harrison
2023-09-16 3:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable Wa_14019159160 and Wa_16019325821 for MTL Patchwork
2023-09-16 3:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-16 3:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-09-16 13:58 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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