* [PATCH V6] PCI: qcom: Fix broken pcie enumeration for 2_3_3 configs ops
@ 2023-09-19 10:29 Sricharan Ramabadhran
2023-09-19 12:19 ` Manivannan Sadhasivam
2023-09-29 20:48 ` Bjorn Helgaas
0 siblings, 2 replies; 4+ messages in thread
From: Sricharan Ramabadhran @ 2023-09-19 10:29 UTC (permalink / raw)
To: agross, andersson, konrad.dybcio, robh, mani, lpieralisi,
bhelgaas, kw, linux-arm-msm, linux-kernel, linux-pci, gregkh,
dmitry.baryshkov, stable, robimarko, quic_srichara
Cc: Stable
PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro is used for qcom_pcie_post_init_2_3_3.
PCIe slave address space size register offset is 0x358, but was wrongly
changed to 0x16c as a part of commit 39171b33f652 ("PCI: qcom: Remove
PCIE20_ prefix from register definitions"). Fixing it, by using the right
macro and remove the unused PARF_SLV_ADDR_SPACE_SIZE_2_3_3.
Without this access to the registers of slave addr space like iATU etc
are broken leading to PCIe enumeration failure on IPQ8074.
Fixes: 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions")
Cc: <Stable@vger.kernel.org>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
---
[V6] Fixed subject and commit text as per Bjorn Helgaas
drivers/pci/controller/dwc/pcie-qcom.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index e2f29404c84e..64420ecc24d1 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -43,7 +43,6 @@
#define PARF_PHY_REFCLK 0x4c
#define PARF_CONFIG_BITS 0x50
#define PARF_DBI_BASE_ADDR 0x168
-#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16c /* Register offset specific to IP ver 2.3.3 */
#define PARF_MHI_CLOCK_RESET_CTRL 0x174
#define PARF_AXI_MSTR_WR_ADDR_HALT 0x178
#define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8
@@ -797,8 +796,7 @@ static int qcom_pcie_post_init_2_3_3(struct qcom_pcie *pcie)
u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
u32 val;
- writel(SLV_ADDR_SPACE_SZ,
- pcie->parf + PARF_SLV_ADDR_SPACE_SIZE_2_3_3);
+ writel(SLV_ADDR_SPACE_SZ, pcie->parf + PARF_SLV_ADDR_SPACE_SIZE);
val = readl(pcie->parf + PARF_PHY_CTRL);
val &= ~PHY_TEST_PWR_DOWN;
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH V6] PCI: qcom: Fix broken pcie enumeration for 2_3_3 configs ops
2023-09-19 10:29 [PATCH V6] PCI: qcom: Fix broken pcie enumeration for 2_3_3 configs ops Sricharan Ramabadhran
@ 2023-09-19 12:19 ` Manivannan Sadhasivam
2023-09-19 12:49 ` Greg KH
2023-09-29 20:48 ` Bjorn Helgaas
1 sibling, 1 reply; 4+ messages in thread
From: Manivannan Sadhasivam @ 2023-09-19 12:19 UTC (permalink / raw)
To: Sricharan Ramabadhran
Cc: agross, andersson, konrad.dybcio, robh, lpieralisi, bhelgaas, kw,
linux-arm-msm, linux-kernel, linux-pci, gregkh, dmitry.baryshkov,
stable, robimarko
On Tue, Sep 19, 2023 at 03:59:48PM +0530, Sricharan Ramabadhran wrote:
> PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro is used for qcom_pcie_post_init_2_3_3.
> PCIe slave address space size register offset is 0x358, but was wrongly
> changed to 0x16c as a part of commit 39171b33f652 ("PCI: qcom: Remove
> PCIE20_ prefix from register definitions"). Fixing it, by using the right
> macro and remove the unused PARF_SLV_ADDR_SPACE_SIZE_2_3_3.
>
> Without this access to the registers of slave addr space like iATU etc
> are broken leading to PCIe enumeration failure on IPQ8074.
>
> Fixes: 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions")
> Cc: <Stable@vger.kernel.org>
Please fix the stable list address: stable@vger.kernel.org
- Mani
> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Tested-by: Robert Marko <robimarko@gmail.com>
> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
> ---
> [V6] Fixed subject and commit text as per Bjorn Helgaas
>
> drivers/pci/controller/dwc/pcie-qcom.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index e2f29404c84e..64420ecc24d1 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -43,7 +43,6 @@
> #define PARF_PHY_REFCLK 0x4c
> #define PARF_CONFIG_BITS 0x50
> #define PARF_DBI_BASE_ADDR 0x168
> -#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16c /* Register offset specific to IP ver 2.3.3 */
> #define PARF_MHI_CLOCK_RESET_CTRL 0x174
> #define PARF_AXI_MSTR_WR_ADDR_HALT 0x178
> #define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8
> @@ -797,8 +796,7 @@ static int qcom_pcie_post_init_2_3_3(struct qcom_pcie *pcie)
> u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
> u32 val;
>
> - writel(SLV_ADDR_SPACE_SZ,
> - pcie->parf + PARF_SLV_ADDR_SPACE_SIZE_2_3_3);
> + writel(SLV_ADDR_SPACE_SZ, pcie->parf + PARF_SLV_ADDR_SPACE_SIZE);
>
> val = readl(pcie->parf + PARF_PHY_CTRL);
> val &= ~PHY_TEST_PWR_DOWN;
> --
> 2.34.1
>
--
மணிவண்ணன் சதாசிவம்
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH V6] PCI: qcom: Fix broken pcie enumeration for 2_3_3 configs ops
2023-09-19 12:19 ` Manivannan Sadhasivam
@ 2023-09-19 12:49 ` Greg KH
0 siblings, 0 replies; 4+ messages in thread
From: Greg KH @ 2023-09-19 12:49 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: Sricharan Ramabadhran, agross, andersson, konrad.dybcio, robh,
lpieralisi, bhelgaas, kw, linux-arm-msm, linux-kernel, linux-pci,
dmitry.baryshkov, stable, robimarko
On Tue, Sep 19, 2023 at 02:19:09PM +0200, Manivannan Sadhasivam wrote:
> On Tue, Sep 19, 2023 at 03:59:48PM +0530, Sricharan Ramabadhran wrote:
> > PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro is used for qcom_pcie_post_init_2_3_3.
> > PCIe slave address space size register offset is 0x358, but was wrongly
> > changed to 0x16c as a part of commit 39171b33f652 ("PCI: qcom: Remove
> > PCIE20_ prefix from register definitions"). Fixing it, by using the right
> > macro and remove the unused PARF_SLV_ADDR_SPACE_SIZE_2_3_3.
> >
> > Without this access to the registers of slave addr space like iATU etc
> > are broken leading to PCIe enumeration failure on IPQ8074.
> >
> > Fixes: 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions")
> > Cc: <Stable@vger.kernel.org>
>
> Please fix the stable list address: stable@vger.kernel.org
Either works!
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH V6] PCI: qcom: Fix broken pcie enumeration for 2_3_3 configs ops
2023-09-19 10:29 [PATCH V6] PCI: qcom: Fix broken pcie enumeration for 2_3_3 configs ops Sricharan Ramabadhran
2023-09-19 12:19 ` Manivannan Sadhasivam
@ 2023-09-29 20:48 ` Bjorn Helgaas
1 sibling, 0 replies; 4+ messages in thread
From: Bjorn Helgaas @ 2023-09-29 20:48 UTC (permalink / raw)
To: Sricharan Ramabadhran
Cc: agross, andersson, konrad.dybcio, robh, mani, lpieralisi,
bhelgaas, kw, linux-arm-msm, linux-kernel, linux-pci, gregkh,
dmitry.baryshkov, stable, robimarko
On Tue, Sep 19, 2023 at 03:59:48PM +0530, Sricharan Ramabadhran wrote:
> PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro is used for qcom_pcie_post_init_2_3_3.
> PCIe slave address space size register offset is 0x358, but was wrongly
> changed to 0x16c as a part of commit 39171b33f652 ("PCI: qcom: Remove
> PCIE20_ prefix from register definitions"). Fixing it, by using the right
> macro and remove the unused PARF_SLV_ADDR_SPACE_SIZE_2_3_3.
>
> Without this access to the registers of slave addr space like iATU etc
> are broken leading to PCIe enumeration failure on IPQ8074.
>
> Fixes: 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions")
> Cc: <Stable@vger.kernel.org>
> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Tested-by: Robert Marko <robimarko@gmail.com>
> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Applied to for-linus for v6.6, thanks!
> ---
> [V6] Fixed subject and commit text as per Bjorn Helgaas
>
> drivers/pci/controller/dwc/pcie-qcom.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index e2f29404c84e..64420ecc24d1 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -43,7 +43,6 @@
> #define PARF_PHY_REFCLK 0x4c
> #define PARF_CONFIG_BITS 0x50
> #define PARF_DBI_BASE_ADDR 0x168
> -#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16c /* Register offset specific to IP ver 2.3.3 */
> #define PARF_MHI_CLOCK_RESET_CTRL 0x174
> #define PARF_AXI_MSTR_WR_ADDR_HALT 0x178
> #define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8
> @@ -797,8 +796,7 @@ static int qcom_pcie_post_init_2_3_3(struct qcom_pcie *pcie)
> u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
> u32 val;
>
> - writel(SLV_ADDR_SPACE_SZ,
> - pcie->parf + PARF_SLV_ADDR_SPACE_SIZE_2_3_3);
> + writel(SLV_ADDR_SPACE_SZ, pcie->parf + PARF_SLV_ADDR_SPACE_SIZE);
>
> val = readl(pcie->parf + PARF_PHY_CTRL);
> val &= ~PHY_TEST_PWR_DOWN;
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-09-29 20:48 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-09-19 10:29 [PATCH V6] PCI: qcom: Fix broken pcie enumeration for 2_3_3 configs ops Sricharan Ramabadhran
2023-09-19 12:19 ` Manivannan Sadhasivam
2023-09-19 12:49 ` Greg KH
2023-09-29 20:48 ` Bjorn Helgaas
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.