[PATCH v12 0/3] Add multiport support for DWC3 controllers

[PATCH v12 0/3] Add multiport support for DWC3 controllers

[Krishna Kurapati]

This series is a set of picked up acks and split from larger series [1]
The series is rebased on top of:
Repo: git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
Branch: usb-testing
commit 03cf2af41b37 ("Revert "phy: qcom-qmp-usb: Add Qualcomm SDX75 USB3 PHY support"")

The patches present in series have been reviewed and acked by respective
maintainers. They dont break any existing implementation and is just a
subset of merge ready multiport code. The rest of the patches will be
rebased on top of the usb branch once this series is merged.

[1]: https://patchwork.kernel.org/project/linux-usb/cover/20230828133033.11988-1-quic_kriskura@quicinc.com/

Krishna Kurapati (3):
  usb: dwc3: core: Access XHCI address space temporarily to read port
    info
  usb: dwc3: core: Skip setting event buffers for host only controllers
  usb: dwc3: qcom: Add helper function to request threaded IRQ

 drivers/usb/dwc3/core.c      | 74 ++++++++++++++++++++++++++++++++++++
 drivers/usb/dwc3/core.h      |  5 +++
 drivers/usb/dwc3/dwc3-qcom.c | 59 +++++++++++++---------------
 3 files changed, 105 insertions(+), 33 deletions(-)

-- 
2.42.0

[PATCH v12 1/3] usb: dwc3: core: Access XHCI address space temporarily to read port info

[Krishna Kurapati]

Currently host-only capable DWC3 controllers support Multiport.
Temporarily map XHCI address space for host-only controllers and parse
XHCI Extended Capabilities registers to read number of usb2 ports and
usb3 ports present on multiport controller. Each USB Port is at least HS
capable.

The port info for usb2 and usb3 phy are identified as num_usb2_ports
and num_usb3_ports. The intention is as follows:

Wherever we need to perform phy operations like:

LOOP_OVER_NUMBER_OF_AVAILABLE_PORTS()
{
	phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST);
	phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST);
}

If number of usb2 ports is 3, loop can go from index 0-2 for
usb2_generic_phy. If number of usb3-ports is 2, we don't know for sure,
if the first 2 ports are SS capable or some other ports like (2 and 3)
are SS capable. So instead, num_usb2_ports is used to loop around all
phy's (both hs and ss) for performing phy operations. If any
usb3_generic_phy turns out to be NULL, phy operation just bails out.

num_usb3_ports is used to modify GUSB3PIPECTL registers while setting up
phy's as we need to know how many SS capable ports are there for this.

Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
---
 drivers/usb/dwc3/core.c | 61 +++++++++++++++++++++++++++++++++++++++++
 drivers/usb/dwc3/core.h |  5 ++++
 2 files changed, 66 insertions(+)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 44ee8526dc28..d7c5669ebd06 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -39,6 +39,7 @@
 #include "io.h"
 
 #include "debug.h"
+#include "../host/xhci-ext-caps.h"
 
 #define DWC3_DEFAULT_AUTOSUSPEND_DELAY	5000 /* ms */
 
@@ -1839,6 +1840,51 @@ static int dwc3_get_clocks(struct dwc3 *dwc)
 	return 0;
 }
 
+static int dwc3_read_port_info(struct dwc3 *dwc)
+{
+	void __iomem *base;
+	u8 major_revision;
+	u32 offset = 0;
+	u32 val;
+
+	/*
+	 * Remap xHCI address space to access XHCI ext cap regs,
+	 * since it is needed to get port info.
+	 */
+	base = ioremap(dwc->xhci_resources[0].start,
+				resource_size(&dwc->xhci_resources[0]));
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	do {
+		offset = xhci_find_next_ext_cap(base, offset,
+				XHCI_EXT_CAPS_PROTOCOL);
+		if (!offset)
+			break;
+
+		val = readl(base + offset);
+		major_revision = XHCI_EXT_PORT_MAJOR(val);
+
+		val = readl(base + offset + 0x08);
+		if (major_revision == 0x03) {
+			dwc->num_usb3_ports += XHCI_EXT_PORT_COUNT(val);
+		} else if (major_revision <= 0x02) {
+			dwc->num_usb2_ports += XHCI_EXT_PORT_COUNT(val);
+		} else {
+			dev_err(dwc->dev,
+				"Unrecognized port major revision %d\n",
+							major_revision);
+		}
+	} while (1);
+
+	dev_dbg(dwc->dev, "hs-ports: %u ss-ports: %u\n",
+			dwc->num_usb2_ports, dwc->num_usb3_ports);
+
+	iounmap(base);
+
+	return 0;
+}
+
 static int dwc3_probe(struct platform_device *pdev)
 {
 	struct device		*dev = &pdev->dev;
@@ -1846,6 +1892,7 @@ static int dwc3_probe(struct platform_device *pdev)
 	void __iomem		*regs;
 	struct dwc3		*dwc;
 	int			ret;
+	unsigned int		hw_mode;
 
 	dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
 	if (!dwc)
@@ -1926,6 +1973,20 @@ static int dwc3_probe(struct platform_device *pdev)
 			goto err_disable_clks;
 	}
 
+	/*
+	 * Currently only DWC3 controllers that are host-only capable
+	 * support Multiport.
+	 */
+	hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0);
+	if (hw_mode == DWC3_GHWPARAMS0_MODE_HOST) {
+		ret = dwc3_read_port_info(dwc);
+		if (ret)
+			goto err_disable_clks;
+	} else {
+		dwc->num_usb2_ports = 1;
+		dwc->num_usb3_ports = 1;
+	}
+
 	spin_lock_init(&dwc->lock);
 	mutex_init(&dwc->mutex);
 
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 6782ec8bfd64..2ea6df7e6571 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -1031,6 +1031,8 @@ struct dwc3_scratchpad_array {
  * @usb3_phy: pointer to USB3 PHY
  * @usb2_generic_phy: pointer to USB2 PHY
  * @usb3_generic_phy: pointer to USB3 PHY
+ * @num_usb2_ports: number of USB2 ports
+ * @num_usb3_ports: number of USB3 ports
  * @phys_ready: flag to indicate that PHYs are ready
  * @ulpi: pointer to ulpi interface
  * @ulpi_ready: flag to indicate that ULPI is initialized
@@ -1174,6 +1176,9 @@ struct dwc3 {
 	struct phy		*usb2_generic_phy;
 	struct phy		*usb3_generic_phy;
 
+	u8			num_usb2_ports;
+	u8			num_usb3_ports;
+
 	bool			phys_ready;
 
 	struct ulpi		*ulpi;
-- 
2.42.0

[PATCH v12 2/3] usb: dwc3: core: Skip setting event buffers for host only controllers

[Krishna Kurapati]

On some SoC's like SA8295P where the tertiary controller is host-only
capable, GEVTADDRHI/LO, GEVTSIZ, GEVTCOUNT registers are not accessible.
Trying to access them leads to a crash.

For DRD/Peripheral supported controllers, event buffer setup is done
again in gadget_pullup. Skip setup or cleanup of event buffers if
controller is host-only capable.

Suggested-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
---
 drivers/usb/dwc3/core.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index d7c5669ebd06..3e507e4cc542 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -486,6 +486,13 @@ static void dwc3_free_event_buffers(struct dwc3 *dwc)
 static int dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned int length)
 {
 	struct dwc3_event_buffer *evt;
+	unsigned int hw_mode;
+
+	hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0);
+	if (hw_mode == DWC3_GHWPARAMS0_MODE_HOST) {
+		dwc->ev_buf = NULL;
+		return 0;
+	}
 
 	evt = dwc3_alloc_one_event_buffer(dwc, length);
 	if (IS_ERR(evt)) {
@@ -507,6 +514,9 @@ int dwc3_event_buffers_setup(struct dwc3 *dwc)
 {
 	struct dwc3_event_buffer	*evt;
 
+	if (!dwc->ev_buf)
+		return 0;
+
 	evt = dwc->ev_buf;
 	evt->lpos = 0;
 	dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(0),
@@ -524,6 +534,9 @@ void dwc3_event_buffers_cleanup(struct dwc3 *dwc)
 {
 	struct dwc3_event_buffer	*evt;
 
+	if (!dwc->ev_buf)
+		return;
+
 	evt = dwc->ev_buf;
 
 	evt->lpos = 0;
-- 
2.42.0

[PATCH v12 3/3] usb: dwc3: qcom: Add helper function to request threaded IRQ

[Krishna Kurapati]

Cleanup setup irq call by implementing a new prep_irq helper function
and using it to request threaded IRQ's.

Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
 drivers/usb/dwc3/dwc3-qcom.c | 59 ++++++++++++++++--------------------
 1 file changed, 26 insertions(+), 33 deletions(-)

diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index 3de43df6bbe8..ef2006db7601 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -535,6 +535,24 @@ static int dwc3_qcom_get_irq(struct platform_device *pdev,
 	return ret;
 }
 
+static int dwc3_qcom_prep_irq(struct dwc3_qcom *qcom, char *irq_name,
+				char *disp_name, int irq)
+{
+	int ret;
+
+	/* Keep wakeup interrupts disabled until suspend */
+	irq_set_status_flags(irq, IRQ_NOAUTOEN);
+	ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
+					qcom_dwc3_resume_irq,
+					IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
+					disp_name, qcom);
+
+	if (ret)
+		dev_err(qcom->dev, "%s failed: %d\n", irq_name, ret);
+
+	return ret;
+}
+
 static int dwc3_qcom_setup_irq(struct platform_device *pdev)
 {
 	struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
@@ -545,61 +563,36 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev)
 	irq = dwc3_qcom_get_irq(pdev, "hs_phy_irq",
 				pdata ? pdata->hs_phy_irq_index : -1);
 	if (irq > 0) {
-		/* Keep wakeup interrupts disabled until suspend */
-		irq_set_status_flags(irq, IRQ_NOAUTOEN);
-		ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
-					qcom_dwc3_resume_irq,
-					IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
-					"qcom_dwc3 HS", qcom);
-		if (ret) {
-			dev_err(qcom->dev, "hs_phy_irq failed: %d\n", ret);
+		ret = dwc3_qcom_prep_irq(qcom, "hs_phy_irq", "qcom_dwc3 HS", irq);
+		if (ret)
 			return ret;
-		}
 		qcom->hs_phy_irq = irq;
 	}
 
 	irq = dwc3_qcom_get_irq(pdev, "dp_hs_phy_irq",
 				pdata ? pdata->dp_hs_phy_irq_index : -1);
 	if (irq > 0) {
-		irq_set_status_flags(irq, IRQ_NOAUTOEN);
-		ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
-					qcom_dwc3_resume_irq,
-					IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
-					"qcom_dwc3 DP_HS", qcom);
-		if (ret) {
-			dev_err(qcom->dev, "dp_hs_phy_irq failed: %d\n", ret);
+		ret = dwc3_qcom_prep_irq(qcom, "dp_hs_phy_irq", "qcom_dwc3 DP_HS", irq);
+		if (ret)
 			return ret;
-		}
 		qcom->dp_hs_phy_irq = irq;
 	}
 
 	irq = dwc3_qcom_get_irq(pdev, "dm_hs_phy_irq",
 				pdata ? pdata->dm_hs_phy_irq_index : -1);
 	if (irq > 0) {
-		irq_set_status_flags(irq, IRQ_NOAUTOEN);
-		ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
-					qcom_dwc3_resume_irq,
-					IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
-					"qcom_dwc3 DM_HS", qcom);
-		if (ret) {
-			dev_err(qcom->dev, "dm_hs_phy_irq failed: %d\n", ret);
+		ret = dwc3_qcom_prep_irq(qcom, "dm_hs_phy_irq", "qcom_dwc3 DM_HS", irq);
+		if (ret)
 			return ret;
-		}
 		qcom->dm_hs_phy_irq = irq;
 	}
 
 	irq = dwc3_qcom_get_irq(pdev, "ss_phy_irq",
 				pdata ? pdata->ss_phy_irq_index : -1);
 	if (irq > 0) {
-		irq_set_status_flags(irq, IRQ_NOAUTOEN);
-		ret = devm_request_threaded_irq(qcom->dev, irq, NULL,
-					qcom_dwc3_resume_irq,
-					IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
-					"qcom_dwc3 SS", qcom);
-		if (ret) {
-			dev_err(qcom->dev, "ss_phy_irq failed: %d\n", ret);
+		ret = dwc3_qcom_prep_irq(qcom, "ss_phy_irq", "qcom_dwc3 SS", irq);
+		if (ret)
 			return ret;
-		}
 		qcom->ss_phy_irq = irq;
 	}
 
-- 
2.42.0

Re: [PATCH v12 0/3] Add multiport support for DWC3 controllers

[Johan Hovold]

On Wed, Oct 04, 2023 at 10:29:19PM +0530, Krishna Kurapati wrote:
> This series is a set of picked up acks and split from larger series [1]
> The series is rebased on top of:
> Repo: git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
> Branch: usb-testing
> commit 03cf2af41b37 ("Revert "phy: qcom-qmp-usb: Add Qualcomm SDX75 USB3 PHY support"")
> 
> The patches present in series have been reviewed and acked by respective
> maintainers. They dont break any existing implementation and is just a
> subset of merge ready multiport code. The rest of the patches will be
> rebased on top of the usb branch once this series is merged.
>
> [1]: https://patchwork.kernel.org/project/linux-usb/cover/20230828133033.11988-1-quic_kriskura@quicinc.com/
> 
> Krishna Kurapati (3):
>   usb: dwc3: core: Access XHCI address space temporarily to read port
>     info
>   usb: dwc3: core: Skip setting event buffers for host only controllers
>   usb: dwc3: qcom: Add helper function to request threaded IRQ

NAK.

These patches make very little sense on their own and can't really be
evaluated without the context of the larger series.

Just work on getting the multiport series in shape and include any acks
you've received so far when submitting new revisions.

Johan

Re: [PATCH v12 0/3] Add multiport support for DWC3 controllers

[Krishna Kurapati PSSNV]

On 10/5/2023 12:06 PM, Johan Hovold wrote:
> On Wed, Oct 04, 2023 at 10:29:19PM +0530, Krishna Kurapati wrote:
>> This series is a set of picked up acks and split from larger series [1]
>> The series is rebased on top of:
>> Repo: git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
>> Branch: usb-testing
>> commit 03cf2af41b37 ("Revert "phy: qcom-qmp-usb: Add Qualcomm SDX75 USB3 PHY support"")
>>
>> The patches present in series have been reviewed and acked by respective
>> maintainers. They dont break any existing implementation and is just a
>> subset of merge ready multiport code. The rest of the patches will be
>> rebased on top of the usb branch once this series is merged.
>>
>> [1]: https://patchwork.kernel.org/project/linux-usb/cover/20230828133033.11988-1-quic_kriskura@quicinc.com/
>>
>> Krishna Kurapati (3):
>>    usb: dwc3: core: Access XHCI address space temporarily to read port
>>      info
>>    usb: dwc3: core: Skip setting event buffers for host only controllers
>>    usb: dwc3: qcom: Add helper function to request threaded IRQ
> 
> NAK.
> 
> These patches make very little sense on their own and can't really be
> evaluated without the context of the larger series.
> 
> Just work on getting the multiport series in shape and include any acks
> you've received so far when submitting new revisions.
> 

Hi Johan,

  This may be partially true for first patch of this series, (where we 
read num_ports), but the other two patches are self explanatory and are 
applicable for non-mp controllers as well. Intention was to ensure we 
make the next rebase easy.

  Will try to address all comments and send v12 again as a whole series 
this week. I am actually blocked on [1]. Not able to repro the compile 
error on my end. That's what stopped me from sending all at once.

[1]: https://lore.kernel.org/all/202309200156.CxQ3yaLY-lkp@intel.com/

Thanks,
Krishna,

Re: [PATCH v12 0/3] Add multiport support for DWC3 controllers

[Krishna Kurapati PSSNV]

On 10/5/2023 12:06 PM, Johan Hovold wrote:
> On Wed, Oct 04, 2023 at 10:29:19PM +0530, Krishna Kurapati wrote:
>> This series is a set of picked up acks and split from larger series [1]
>> The series is rebased on top of:
>> Repo: git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
>> Branch: usb-testing
>> commit 03cf2af41b37 ("Revert "phy: qcom-qmp-usb: Add Qualcomm SDX75 USB3 PHY support"")
>>
>> The patches present in series have been reviewed and acked by respective
>> maintainers. They dont break any existing implementation and is just a
>> subset of merge ready multiport code. The rest of the patches will be
>> rebased on top of the usb branch once this series is merged.
>>
>> [1]: https://patchwork.kernel.org/project/linux-usb/cover/20230828133033.11988-1-quic_kriskura@quicinc.com/
>>
>> Krishna Kurapati (3):
>>    usb: dwc3: core: Access XHCI address space temporarily to read port
>>      info
>>    usb: dwc3: core: Skip setting event buffers for host only controllers
>>    usb: dwc3: qcom: Add helper function to request threaded IRQ
> 
> NAK.
> 
> These patches make very little sense on their own and can't really be
> evaluated without the context of the larger series.
> 
> Just work on getting the multiport series in shape and include any acks
> you've received so far when submitting new revisions
Hi Johan,

  This may be partially true for first patch of this series, (where we 
read num_ports), but the other two patches are self explanatory and are 
applicable for non-mp controllers as well. Intention was to ensure we 
make the next rebase easy.

  Will try to address all comments and send v12 again as a whole series 
this week. I am actually blocked on [1]. Not able to repro the compile 
error on my end. That's what stopped me from sending all at once.

[1]: https://lore.kernel.org/all/202309200156.CxQ3yaLY-lkp@intel.com/

PS: I sent this mail once but some issue with my mail client and the 
mail didn't reach the mailing list. If two copies of same mail comes up, 
pls ignore it.

Thanks,
Krishna,

Re: [PATCH v12 0/3] Add multiport support for DWC3 controllers

[Johan Hovold]

On Thu, Oct 05, 2023 at 02:32:54PM +0530, Krishna Kurapati PSSNV wrote:
> On 10/5/2023 12:06 PM, Johan Hovold wrote:
> > On Wed, Oct 04, 2023 at 10:29:19PM +0530, Krishna Kurapati wrote:

> >> Krishna Kurapati (3):
> >>    usb: dwc3: core: Access XHCI address space temporarily to read port
> >>      info
> >>    usb: dwc3: core: Skip setting event buffers for host only controllers
> >>    usb: dwc3: qcom: Add helper function to request threaded IRQ
> > 
> > NAK.
> > 
> > These patches make very little sense on their own and can't really be
> > evaluated without the context of the larger series.
> > 
> > Just work on getting the multiport series in shape and include any acks
> > you've received so far when submitting new revisions.

>   This may be partially true for first patch of this series, (where we 
> read num_ports), but the other two patches are self explanatory and are 
> applicable for non-mp controllers as well. Intention was to ensure we 
> make the next rebase easy.

No, just send the whole series at once.
 
>   Will try to address all comments and send v12 again as a whole series 
> this week. I am actually blocked on [1]. Not able to repro the compile 
> error on my end. That's what stopped me from sending all at once.

Looks like your buffer is too small for a u8 index. Should be easy to
fix.

Johan
 
> [1]: https://lore.kernel.org/all/202309200156.CxQ3yaLY-lkp@intel.com/