[PATCH v3 0/2] Add DSS support for TI AM62A7 SoC

[PATCH v3 0/2] Add DSS support for TI AM62A7 SoC

[Aradhya Bhatia]

This patch series adds a new compatible for the Display SubSystem (DSS)
controller on TI's AM62A7 SoC. It further adds the required support, for
the same, in the tidss driver.

The DSS controller is similar to the recently added AM625 DSS, with the
key difference being the absence of VP1 output on the SoC. The VP1 in
AM62A7 DSS is tied off and cannot be used, unlike in AM625, where the
VP1 was connected to 2 OLDI TXes. The video pipeline that corresponds to
VP1 still exists and can be used to overlay planes on the VP2's primary
plane. This can be done using the overlay managers inside the SoC.
Moreover, DSS VP2 can output Full-HD RGB888 DPI video signals.

I have tested these patches on AM62A7 SK-EVM, which converts DPI signals
to HDMI on the platform using the Sil9022A HDMI transmitter. All the
patches, required to enable display on AM62A7-SK, can be found on my
github fork[0] in the branch "next_am62a-v3".

Regards
Aradhya

[0]: https://github.com/aradhya07/linux-ab/tree/next_am62a-v3

Change Log:
V2 -> V3:
  - Add Krzysztof Kozlowski's R-b in patch 1/2.
  - Add new DISPC_VP_TIED_OFF for tied-off video-ports in patch 2/2.

V1 -> V2:
  - Correctly sort DISPC_AM62A7 macro after DISPC_AM625 in patch 2/2.

Previous Versions:
V1: https://lore.kernel.org/all/20230818131750.4779-1-a-bhatia1@ti.com/
V2: https://lore.kernel.org/all/20230818142124.8561-1-a-bhatia1@ti.com/

Aradhya Bhatia (2):
  dt-bindings: display: ti: Add support for am62a7 dss
  drivers/tidss: Add support for AM62A7 DSS

 .../bindings/display/ti/ti,am65x-dss.yaml     | 14 +++++
 drivers/gpu/drm/tidss/tidss_dispc.c           | 59 +++++++++++++++++++
 drivers/gpu/drm/tidss/tidss_dispc.h           |  3 +
 drivers/gpu/drm/tidss/tidss_drv.c             |  1 +
 4 files changed, 77 insertions(+)


base-commit: 2220f68f4504aa1ccce0fac721ccdb301e9da32f
-- 
2.42.0

[PATCH v3 0/2] Add DSS support for TI AM62A7 SoC

[Aradhya Bhatia]

This patch series adds a new compatible for the Display SubSystem (DSS)
controller on TI's AM62A7 SoC. It further adds the required support, for
the same, in the tidss driver.

The DSS controller is similar to the recently added AM625 DSS, with the
key difference being the absence of VP1 output on the SoC. The VP1 in
AM62A7 DSS is tied off and cannot be used, unlike in AM625, where the
VP1 was connected to 2 OLDI TXes. The video pipeline that corresponds to
VP1 still exists and can be used to overlay planes on the VP2's primary
plane. This can be done using the overlay managers inside the SoC.
Moreover, DSS VP2 can output Full-HD RGB888 DPI video signals.

I have tested these patches on AM62A7 SK-EVM, which converts DPI signals
to HDMI on the platform using the Sil9022A HDMI transmitter. All the
patches, required to enable display on AM62A7-SK, can be found on my
github fork[0] in the branch "next_am62a-v3".

Regards
Aradhya

[0]: https://github.com/aradhya07/linux-ab/tree/next_am62a-v3

Change Log:
V2 -> V3:
  - Add Krzysztof Kozlowski's R-b in patch 1/2.
  - Add new DISPC_VP_TIED_OFF for tied-off video-ports in patch 2/2.

V1 -> V2:
  - Correctly sort DISPC_AM62A7 macro after DISPC_AM625 in patch 2/2.

Previous Versions:
V1: https://lore.kernel.org/all/20230818131750.4779-1-a-bhatia1@ti.com/
V2: https://lore.kernel.org/all/20230818142124.8561-1-a-bhatia1@ti.com/

Aradhya Bhatia (2):
  dt-bindings: display: ti: Add support for am62a7 dss
  drivers/tidss: Add support for AM62A7 DSS

 .../bindings/display/ti/ti,am65x-dss.yaml     | 14 +++++
 drivers/gpu/drm/tidss/tidss_dispc.c           | 59 +++++++++++++++++++
 drivers/gpu/drm/tidss/tidss_dispc.h           |  3 +
 drivers/gpu/drm/tidss/tidss_drv.c             |  1 +
 4 files changed, 77 insertions(+)


base-commit: 2220f68f4504aa1ccce0fac721ccdb301e9da32f
-- 
2.42.0

[PATCH v3 1/2] dt-bindings: display: ti: Add support for am62a7 dss

[Aradhya Bhatia]

The DSS controller on TI's AM62A7 SoC is an update from that on TI's
AM625 SoC. Like the DSS in AM625, the DSS in this SoC has 2 video
pipelines, but unlike the former, the latter only has one output port on
VP2 to service DPI display sinks.

Add the new controller's compatible.

Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../bindings/display/ti/ti,am65x-dss.yaml          | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
index ae09cd3cbce1..b6767ef0d24d 100644
--- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
+++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
@@ -23,6 +23,7 @@ properties:
   compatible:
     enum:
       - ti,am625-dss
+      - ti,am62a7,dss
       - ti,am65x-dss
 
   reg:
@@ -87,6 +88,7 @@ properties:
           For AM65x DSS, the OLDI output port node from video port 1.
           For AM625 DSS, the internal DPI output port node from video
           port 1.
+          For AM62A7 DSS, the port is tied off inside the SoC.
 
       port@1:
         $ref: /schemas/graph.yaml#/properties/port
@@ -108,6 +110,18 @@ properties:
       Input memory (from main memory to dispc) bandwidth limit in
       bytes per second
 
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: ti,am62a7-dss
+    then:
+      properties:
+        ports:
+          properties:
+            port@0: false
+
 required:
   - compatible
   - reg
-- 
2.42.0

[PATCH v3 1/2] dt-bindings: display: ti: Add support for am62a7 dss

[Aradhya Bhatia]

The DSS controller on TI's AM62A7 SoC is an update from that on TI's
AM625 SoC. Like the DSS in AM625, the DSS in this SoC has 2 video
pipelines, but unlike the former, the latter only has one output port on
VP2 to service DPI display sinks.

Add the new controller's compatible.

Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../bindings/display/ti/ti,am65x-dss.yaml          | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
index ae09cd3cbce1..b6767ef0d24d 100644
--- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
+++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
@@ -23,6 +23,7 @@ properties:
   compatible:
     enum:
       - ti,am625-dss
+      - ti,am62a7,dss
       - ti,am65x-dss
 
   reg:
@@ -87,6 +88,7 @@ properties:
           For AM65x DSS, the OLDI output port node from video port 1.
           For AM625 DSS, the internal DPI output port node from video
           port 1.
+          For AM62A7 DSS, the port is tied off inside the SoC.
 
       port@1:
         $ref: /schemas/graph.yaml#/properties/port
@@ -108,6 +110,18 @@ properties:
       Input memory (from main memory to dispc) bandwidth limit in
       bytes per second
 
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: ti,am62a7-dss
+    then:
+      properties:
+        ports:
+          properties:
+            port@0: false
+
 required:
   - compatible
   - reg
-- 
2.42.0

[PATCH v3 2/2] drivers/tidss: Add support for AM62A7 DSS

[Aradhya Bhatia]

Add support for the DSS controller on TI's AM62A7 SoC in the tidss
driver.

This controller has 2 video pipelines that can render 2 video planes on
over a screen, using the overlay managers. The output of the DSS comes
from video port 2 (VP2) in the form of RGB88 DPI signals, while the VP1
is tied off inside the SoC.

Also add and use a new type of VP, DISPC_VP_TIED_OFF, for the tied-off
VP1 of AM62A DSS.

Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
---
Notes:
       Changes from V2:
       * Add new DISPC_VP_TIED_OFF for tied-off video-ports.

       Changes from V1:
       * Correctly sort DISPC_AM62A7 macro after DISPC_AM625.

 drivers/gpu/drm/tidss/tidss_dispc.c | 59 +++++++++++++++++++++++++++++
 drivers/gpu/drm/tidss/tidss_dispc.h |  3 ++
 drivers/gpu/drm/tidss/tidss_drv.c   |  1 +
 3 files changed, 63 insertions(+)

diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
index 9d9dee7abaef..7af416457c57 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -322,6 +322,60 @@ const struct dispc_features dispc_am625_feats = {
 	.vid_order = { 1, 0 },
 };
 
+const struct dispc_features dispc_am62a7_feats = {
+	/*
+	 * if the code reaches dispc_mode_valid with VP1,
+	 * it should return MODE_BAD.
+	 */
+	.max_pclk_khz = {
+		[DISPC_VP_TIED_OFF] = 0,
+		[DISPC_VP_DPI] = 165000,
+	},
+
+	.scaling = {
+		.in_width_max_5tap_rgb = 1280,
+		.in_width_max_3tap_rgb = 2560,
+		.in_width_max_5tap_yuv = 2560,
+		.in_width_max_3tap_yuv = 4096,
+		.upscale_limit = 16,
+		.downscale_limit_5tap = 4,
+		.downscale_limit_3tap = 2,
+		/*
+		 * The max supported pixel inc value is 255. The value
+		 * of pixel inc is calculated like this: 1+(xinc-1)*bpp.
+		 * The maximum bpp of all formats supported by the HW
+		 * is 8. So the maximum supported xinc value is 32,
+		 * because 1+(32-1)*8 < 255 < 1+(33-1)*4.
+		 */
+		.xinc_max = 32,
+	},
+
+	.subrev = DISPC_AM62A7,
+
+	.common = "common",
+	.common_regs = tidss_am65x_common_regs,
+
+	.num_vps = 2,
+	.vp_name = { "vp1", "vp2" },
+	.ovr_name = { "ovr1", "ovr2" },
+	.vpclk_name =  { "vp1", "vp2" },
+	/* VP1 of the DSS in AM62A7 SoC is tied off internally */
+	.vp_bus_type = { DISPC_VP_TIED_OFF, DISPC_VP_DPI },
+
+	.vp_feat = { .color = {
+			.has_ctm = true,
+			.gamma_size = 256,
+			.gamma_type = TIDSS_GAMMA_8BIT,
+		},
+	},
+
+	.num_planes = 2,
+	/* note: vid is plane_id 0 and vidl1 is plane_id 1 */
+	.vid_name = { "vid", "vidl1" },
+	.vid_lite = { false, true, },
+	.vid_order = { 1, 0 },
+};
+
 static const u16 *dispc_common_regmap;
 
 struct dss_vp_data {
@@ -824,6 +878,7 @@ dispc_irq_t dispc_read_and_clear_irqstatus(struct dispc_device *dispc)
 	case DISPC_K2G:
 		return dispc_k2g_read_and_clear_irqstatus(dispc);
 	case DISPC_AM625:
+	case DISPC_AM62A7:
 	case DISPC_AM65X:
 	case DISPC_J721E:
 		return dispc_k3_read_and_clear_irqstatus(dispc);
@@ -840,6 +895,7 @@ void dispc_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask)
 		dispc_k2g_set_irqenable(dispc, mask);
 		break;
 	case DISPC_AM625:
+	case DISPC_AM62A7:
 	case DISPC_AM65X:
 	case DISPC_J721E:
 		dispc_k3_set_irqenable(dispc, mask);
@@ -1331,6 +1387,7 @@ void dispc_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane,
 					x, y, layer);
 		break;
 	case DISPC_AM625:
+	case DISPC_AM62A7:
 	case DISPC_AM65X:
 		dispc_am65x_ovr_set_plane(dispc, hw_plane, hw_videoport,
 					  x, y, layer);
@@ -2250,6 +2307,7 @@ static void dispc_plane_init(struct dispc_device *dispc)
 		dispc_k2g_plane_init(dispc);
 		break;
 	case DISPC_AM625:
+	case DISPC_AM62A7:
 	case DISPC_AM65X:
 	case DISPC_J721E:
 		dispc_k3_plane_init(dispc);
@@ -2357,6 +2415,7 @@ static void dispc_vp_write_gamma_table(struct dispc_device *dispc,
 		dispc_k2g_vp_write_gamma_table(dispc, hw_videoport);
 		break;
 	case DISPC_AM625:
+	case DISPC_AM62A7:
 	case DISPC_AM65X:
 		dispc_am65x_vp_write_gamma_table(dispc, hw_videoport);
 		break;
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/tidss_dispc.h
index 33ac5ad7a423..086327d51a90 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.h
+++ b/drivers/gpu/drm/tidss/tidss_dispc.h
@@ -54,12 +54,14 @@ enum dispc_vp_bus_type {
 	DISPC_VP_DPI,		/* DPI output */
 	DISPC_VP_OLDI,		/* OLDI (LVDS) output */
 	DISPC_VP_INTERNAL,	/* SoC internal routing */
+	DISPC_VP_TIED_OFF,	/* Tied off / Unavailable */
 	DISPC_VP_MAX_BUS_TYPE,
 };
 
 enum dispc_dss_subrevision {
 	DISPC_K2G,
 	DISPC_AM625,
+	DISPC_AM62A7,
 	DISPC_AM65X,
 	DISPC_J721E,
 };
@@ -88,6 +90,7 @@ struct dispc_features {
 
 extern const struct dispc_features dispc_k2g_feats;
 extern const struct dispc_features dispc_am625_feats;
+extern const struct dispc_features dispc_am62a7_feats;
 extern const struct dispc_features dispc_am65x_feats;
 extern const struct dispc_features dispc_j721e_feats;
 
diff --git a/drivers/gpu/drm/tidss/tidss_drv.c b/drivers/gpu/drm/tidss/tidss_drv.c
index 4d063eb9cd0b..edf69d020544 100644
--- a/drivers/gpu/drm/tidss/tidss_drv.c
+++ b/drivers/gpu/drm/tidss/tidss_drv.c
@@ -231,6 +231,7 @@ static void tidss_shutdown(struct platform_device *pdev)
 static const struct of_device_id tidss_of_table[] = {
 	{ .compatible = "ti,k2g-dss", .data = &dispc_k2g_feats, },
 	{ .compatible = "ti,am625-dss", .data = &dispc_am625_feats, },
+	{ .compatible = "ti,am62a7-dss", .data = &dispc_am62a7_feats, },
 	{ .compatible = "ti,am65x-dss", .data = &dispc_am65x_feats, },
 	{ .compatible = "ti,j721e-dss", .data = &dispc_j721e_feats, },
 	{ }
-- 
2.42.0

[PATCH v3 2/2] drivers/tidss: Add support for AM62A7 DSS

[Aradhya Bhatia]

Add support for the DSS controller on TI's AM62A7 SoC in the tidss
driver.

This controller has 2 video pipelines that can render 2 video planes on
over a screen, using the overlay managers. The output of the DSS comes
from video port 2 (VP2) in the form of RGB88 DPI signals, while the VP1
is tied off inside the SoC.

Also add and use a new type of VP, DISPC_VP_TIED_OFF, for the tied-off
VP1 of AM62A DSS.

Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
---
Notes:
       Changes from V2:
       * Add new DISPC_VP_TIED_OFF for tied-off video-ports.

       Changes from V1:
       * Correctly sort DISPC_AM62A7 macro after DISPC_AM625.

 drivers/gpu/drm/tidss/tidss_dispc.c | 59 +++++++++++++++++++++++++++++
 drivers/gpu/drm/tidss/tidss_dispc.h |  3 ++
 drivers/gpu/drm/tidss/tidss_drv.c   |  1 +
 3 files changed, 63 insertions(+)

diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
index 9d9dee7abaef..7af416457c57 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -322,6 +322,60 @@ const struct dispc_features dispc_am625_feats = {
 	.vid_order = { 1, 0 },
 };
 
+const struct dispc_features dispc_am62a7_feats = {
+	/*
+	 * if the code reaches dispc_mode_valid with VP1,
+	 * it should return MODE_BAD.
+	 */
+	.max_pclk_khz = {
+		[DISPC_VP_TIED_OFF] = 0,
+		[DISPC_VP_DPI] = 165000,
+	},
+
+	.scaling = {
+		.in_width_max_5tap_rgb = 1280,
+		.in_width_max_3tap_rgb = 2560,
+		.in_width_max_5tap_yuv = 2560,
+		.in_width_max_3tap_yuv = 4096,
+		.upscale_limit = 16,
+		.downscale_limit_5tap = 4,
+		.downscale_limit_3tap = 2,
+		/*
+		 * The max supported pixel inc value is 255. The value
+		 * of pixel inc is calculated like this: 1+(xinc-1)*bpp.
+		 * The maximum bpp of all formats supported by the HW
+		 * is 8. So the maximum supported xinc value is 32,
+		 * because 1+(32-1)*8 < 255 < 1+(33-1)*4.
+		 */
+		.xinc_max = 32,
+	},
+
+	.subrev = DISPC_AM62A7,
+
+	.common = "common",
+	.common_regs = tidss_am65x_common_regs,
+
+	.num_vps = 2,
+	.vp_name = { "vp1", "vp2" },
+	.ovr_name = { "ovr1", "ovr2" },
+	.vpclk_name =  { "vp1", "vp2" },
+	/* VP1 of the DSS in AM62A7 SoC is tied off internally */
+	.vp_bus_type = { DISPC_VP_TIED_OFF, DISPC_VP_DPI },
+
+	.vp_feat = { .color = {
+			.has_ctm = true,
+			.gamma_size = 256,
+			.gamma_type = TIDSS_GAMMA_8BIT,
+		},
+	},
+
+	.num_planes = 2,
+	/* note: vid is plane_id 0 and vidl1 is plane_id 1 */
+	.vid_name = { "vid", "vidl1" },
+	.vid_lite = { false, true, },
+	.vid_order = { 1, 0 },
+};
+
 static const u16 *dispc_common_regmap;
 
 struct dss_vp_data {
@@ -824,6 +878,7 @@ dispc_irq_t dispc_read_and_clear_irqstatus(struct dispc_device *dispc)
 	case DISPC_K2G:
 		return dispc_k2g_read_and_clear_irqstatus(dispc);
 	case DISPC_AM625:
+	case DISPC_AM62A7:
 	case DISPC_AM65X:
 	case DISPC_J721E:
 		return dispc_k3_read_and_clear_irqstatus(dispc);
@@ -840,6 +895,7 @@ void dispc_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask)
 		dispc_k2g_set_irqenable(dispc, mask);
 		break;
 	case DISPC_AM625:
+	case DISPC_AM62A7:
 	case DISPC_AM65X:
 	case DISPC_J721E:
 		dispc_k3_set_irqenable(dispc, mask);
@@ -1331,6 +1387,7 @@ void dispc_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane,
 					x, y, layer);
 		break;
 	case DISPC_AM625:
+	case DISPC_AM62A7:
 	case DISPC_AM65X:
 		dispc_am65x_ovr_set_plane(dispc, hw_plane, hw_videoport,
 					  x, y, layer);
@@ -2250,6 +2307,7 @@ static void dispc_plane_init(struct dispc_device *dispc)
 		dispc_k2g_plane_init(dispc);
 		break;
 	case DISPC_AM625:
+	case DISPC_AM62A7:
 	case DISPC_AM65X:
 	case DISPC_J721E:
 		dispc_k3_plane_init(dispc);
@@ -2357,6 +2415,7 @@ static void dispc_vp_write_gamma_table(struct dispc_device *dispc,
 		dispc_k2g_vp_write_gamma_table(dispc, hw_videoport);
 		break;
 	case DISPC_AM625:
+	case DISPC_AM62A7:
 	case DISPC_AM65X:
 		dispc_am65x_vp_write_gamma_table(dispc, hw_videoport);
 		break;
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/tidss_dispc.h
index 33ac5ad7a423..086327d51a90 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.h
+++ b/drivers/gpu/drm/tidss/tidss_dispc.h
@@ -54,12 +54,14 @@ enum dispc_vp_bus_type {
 	DISPC_VP_DPI,		/* DPI output */
 	DISPC_VP_OLDI,		/* OLDI (LVDS) output */
 	DISPC_VP_INTERNAL,	/* SoC internal routing */
+	DISPC_VP_TIED_OFF,	/* Tied off / Unavailable */
 	DISPC_VP_MAX_BUS_TYPE,
 };
 
 enum dispc_dss_subrevision {
 	DISPC_K2G,
 	DISPC_AM625,
+	DISPC_AM62A7,
 	DISPC_AM65X,
 	DISPC_J721E,
 };
@@ -88,6 +90,7 @@ struct dispc_features {
 
 extern const struct dispc_features dispc_k2g_feats;
 extern const struct dispc_features dispc_am625_feats;
+extern const struct dispc_features dispc_am62a7_feats;
 extern const struct dispc_features dispc_am65x_feats;
 extern const struct dispc_features dispc_j721e_feats;
 
diff --git a/drivers/gpu/drm/tidss/tidss_drv.c b/drivers/gpu/drm/tidss/tidss_drv.c
index 4d063eb9cd0b..edf69d020544 100644
--- a/drivers/gpu/drm/tidss/tidss_drv.c
+++ b/drivers/gpu/drm/tidss/tidss_drv.c
@@ -231,6 +231,7 @@ static void tidss_shutdown(struct platform_device *pdev)
 static const struct of_device_id tidss_of_table[] = {
 	{ .compatible = "ti,k2g-dss", .data = &dispc_k2g_feats, },
 	{ .compatible = "ti,am625-dss", .data = &dispc_am625_feats, },
+	{ .compatible = "ti,am62a7-dss", .data = &dispc_am62a7_feats, },
 	{ .compatible = "ti,am65x-dss", .data = &dispc_am65x_feats, },
 	{ .compatible = "ti,j721e-dss", .data = &dispc_j721e_feats, },
 	{ }
-- 
2.42.0

Re: [PATCH v3 0/2] Add DSS support for TI AM62A7 SoC

[Tomi Valkeinen]

Hi,

On 08/11/2023 19:16, Aradhya Bhatia wrote:
> This patch series adds a new compatible for the Display SubSystem (DSS)
> controller on TI's AM62A7 SoC. It further adds the required support, for
> the same, in the tidss driver.
> 
> The DSS controller is similar to the recently added AM625 DSS, with the
> key difference being the absence of VP1 output on the SoC. The VP1 in
> AM62A7 DSS is tied off and cannot be used, unlike in AM625, where the
> VP1 was connected to 2 OLDI TXes. The video pipeline that corresponds to
> VP1 still exists and can be used to overlay planes on the VP2's primary
> plane. This can be done using the overlay managers inside the SoC.
> Moreover, DSS VP2 can output Full-HD RGB888 DPI video signals.
> 
> I have tested these patches on AM62A7 SK-EVM, which converts DPI signals
> to HDMI on the platform using the Sil9022A HDMI transmitter. All the
> patches, required to enable display on AM62A7-SK, can be found on my
> github fork[0] in the branch "next_am62a-v3".
> 
> Regards
> Aradhya
> 
> [0]: https://github.com/aradhya07/linux-ab/tree/next_am62a-v3
> 
> Change Log:
> V2 -> V3:
>    - Add Krzysztof Kozlowski's R-b in patch 1/2.
>    - Add new DISPC_VP_TIED_OFF for tied-off video-ports in patch 2/2.
> 
> V1 -> V2:
>    - Correctly sort DISPC_AM62A7 macro after DISPC_AM625 in patch 2/2.
> 
> Previous Versions:
> V1: https://lore.kernel.org/all/20230818131750.4779-1-a-bhatia1@ti.com/
> V2: https://lore.kernel.org/all/20230818142124.8561-1-a-bhatia1@ti.com/
> 
> Aradhya Bhatia (2):
>    dt-bindings: display: ti: Add support for am62a7 dss
>    drivers/tidss: Add support for AM62A7 DSS
> 
>   .../bindings/display/ti/ti,am65x-dss.yaml     | 14 +++++
>   drivers/gpu/drm/tidss/tidss_dispc.c           | 59 +++++++++++++++++++
>   drivers/gpu/drm/tidss/tidss_dispc.h           |  3 +
>   drivers/gpu/drm/tidss/tidss_drv.c             |  1 +
>   4 files changed, 77 insertions(+)
> 
> 
> base-commit: 2220f68f4504aa1ccce0fac721ccdb301e9da32f

For the series:

Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>

  Tomi

Re: [PATCH v3 0/2] Add DSS support for TI AM62A7 SoC

[Tomi Valkeinen]

Hi,

On 08/11/2023 19:16, Aradhya Bhatia wrote:
> This patch series adds a new compatible for the Display SubSystem (DSS)
> controller on TI's AM62A7 SoC. It further adds the required support, for
> the same, in the tidss driver.
> 
> The DSS controller is similar to the recently added AM625 DSS, with the
> key difference being the absence of VP1 output on the SoC. The VP1 in
> AM62A7 DSS is tied off and cannot be used, unlike in AM625, where the
> VP1 was connected to 2 OLDI TXes. The video pipeline that corresponds to
> VP1 still exists and can be used to overlay planes on the VP2's primary
> plane. This can be done using the overlay managers inside the SoC.
> Moreover, DSS VP2 can output Full-HD RGB888 DPI video signals.
> 
> I have tested these patches on AM62A7 SK-EVM, which converts DPI signals
> to HDMI on the platform using the Sil9022A HDMI transmitter. All the
> patches, required to enable display on AM62A7-SK, can be found on my
> github fork[0] in the branch "next_am62a-v3".
> 
> Regards
> Aradhya
> 
> [0]: https://github.com/aradhya07/linux-ab/tree/next_am62a-v3
> 
> Change Log:
> V2 -> V3:
>    - Add Krzysztof Kozlowski's R-b in patch 1/2.
>    - Add new DISPC_VP_TIED_OFF for tied-off video-ports in patch 2/2.
> 
> V1 -> V2:
>    - Correctly sort DISPC_AM62A7 macro after DISPC_AM625 in patch 2/2.
> 
> Previous Versions:
> V1: https://lore.kernel.org/all/20230818131750.4779-1-a-bhatia1@ti.com/
> V2: https://lore.kernel.org/all/20230818142124.8561-1-a-bhatia1@ti.com/
> 
> Aradhya Bhatia (2):
>    dt-bindings: display: ti: Add support for am62a7 dss
>    drivers/tidss: Add support for AM62A7 DSS
> 
>   .../bindings/display/ti/ti,am65x-dss.yaml     | 14 +++++
>   drivers/gpu/drm/tidss/tidss_dispc.c           | 59 +++++++++++++++++++
>   drivers/gpu/drm/tidss/tidss_dispc.h           |  3 +
>   drivers/gpu/drm/tidss/tidss_drv.c             |  1 +
>   4 files changed, 77 insertions(+)
> 
> 
> base-commit: 2220f68f4504aa1ccce0fac721ccdb301e9da32f

For the series:

Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>

  Tomi

Re: [PATCH v3 0/2] Add DSS support for TI AM62A7 SoC

[Tomi Valkeinen]

On 08/11/2023 19:16, Aradhya Bhatia wrote:
> This patch series adds a new compatible for the Display SubSystem (DSS)
> controller on TI's AM62A7 SoC. It further adds the required support, for
> the same, in the tidss driver.
> 
> The DSS controller is similar to the recently added AM625 DSS, with the
> key difference being the absence of VP1 output on the SoC. The VP1 in
> AM62A7 DSS is tied off and cannot be used, unlike in AM625, where the
> VP1 was connected to 2 OLDI TXes. The video pipeline that corresponds to
> VP1 still exists and can be used to overlay planes on the VP2's primary
> plane. This can be done using the overlay managers inside the SoC.
> Moreover, DSS VP2 can output Full-HD RGB888 DPI video signals.
> 
> I have tested these patches on AM62A7 SK-EVM, which converts DPI signals
> to HDMI on the platform using the Sil9022A HDMI transmitter. All the
> patches, required to enable display on AM62A7-SK, can be found on my
> github fork[0] in the branch "next_am62a-v3".
> 
> Regards
> Aradhya
> 
> [0]: https://github.com/aradhya07/linux-ab/tree/next_am62a-v3
> 
> Change Log:
> V2 -> V3:
>    - Add Krzysztof Kozlowski's R-b in patch 1/2.
>    - Add new DISPC_VP_TIED_OFF for tied-off video-ports in patch 2/2.
> 
> V1 -> V2:
>    - Correctly sort DISPC_AM62A7 macro after DISPC_AM625 in patch 2/2.
> 
> Previous Versions:
> V1: https://lore.kernel.org/all/20230818131750.4779-1-a-bhatia1@ti.com/
> V2: https://lore.kernel.org/all/20230818142124.8561-1-a-bhatia1@ti.com/
> 
> Aradhya Bhatia (2):
>    dt-bindings: display: ti: Add support for am62a7 dss
>    drivers/tidss: Add support for AM62A7 DSS
> 
>   .../bindings/display/ti/ti,am65x-dss.yaml     | 14 +++++
>   drivers/gpu/drm/tidss/tidss_dispc.c           | 59 +++++++++++++++++++
>   drivers/gpu/drm/tidss/tidss_dispc.h           |  3 +
>   drivers/gpu/drm/tidss/tidss_drv.c             |  1 +
>   4 files changed, 77 insertions(+)
> 
> 
> base-commit: 2220f68f4504aa1ccce0fac721ccdb301e9da32f

Thanks, I'm applying to drm-misc.

  Tomi

Re: [PATCH v3 0/2] Add DSS support for TI AM62A7 SoC

[Tomi Valkeinen]

On 08/11/2023 19:16, Aradhya Bhatia wrote:
> This patch series adds a new compatible for the Display SubSystem (DSS)
> controller on TI's AM62A7 SoC. It further adds the required support, for
> the same, in the tidss driver.
> 
> The DSS controller is similar to the recently added AM625 DSS, with the
> key difference being the absence of VP1 output on the SoC. The VP1 in
> AM62A7 DSS is tied off and cannot be used, unlike in AM625, where the
> VP1 was connected to 2 OLDI TXes. The video pipeline that corresponds to
> VP1 still exists and can be used to overlay planes on the VP2's primary
> plane. This can be done using the overlay managers inside the SoC.
> Moreover, DSS VP2 can output Full-HD RGB888 DPI video signals.
> 
> I have tested these patches on AM62A7 SK-EVM, which converts DPI signals
> to HDMI on the platform using the Sil9022A HDMI transmitter. All the
> patches, required to enable display on AM62A7-SK, can be found on my
> github fork[0] in the branch "next_am62a-v3".
> 
> Regards
> Aradhya
> 
> [0]: https://github.com/aradhya07/linux-ab/tree/next_am62a-v3
> 
> Change Log:
> V2 -> V3:
>    - Add Krzysztof Kozlowski's R-b in patch 1/2.
>    - Add new DISPC_VP_TIED_OFF for tied-off video-ports in patch 2/2.
> 
> V1 -> V2:
>    - Correctly sort DISPC_AM62A7 macro after DISPC_AM625 in patch 2/2.
> 
> Previous Versions:
> V1: https://lore.kernel.org/all/20230818131750.4779-1-a-bhatia1@ti.com/
> V2: https://lore.kernel.org/all/20230818142124.8561-1-a-bhatia1@ti.com/
> 
> Aradhya Bhatia (2):
>    dt-bindings: display: ti: Add support for am62a7 dss
>    drivers/tidss: Add support for AM62A7 DSS
> 
>   .../bindings/display/ti/ti,am65x-dss.yaml     | 14 +++++
>   drivers/gpu/drm/tidss/tidss_dispc.c           | 59 +++++++++++++++++++
>   drivers/gpu/drm/tidss/tidss_dispc.h           |  3 +
>   drivers/gpu/drm/tidss/tidss_drv.c             |  1 +
>   4 files changed, 77 insertions(+)
> 
> 
> base-commit: 2220f68f4504aa1ccce0fac721ccdb301e9da32f

Thanks, I'm applying to drm-misc.

  Tomi