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* [PATCH] [i-g-t] tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate
@ 2023-12-18 13:59 ` Hersen Wu
  0 siblings, 0 replies; 7+ messages in thread
From: Hersen Wu @ 2023-12-18 13:59 UTC (permalink / raw)
  To: igt-dev, rodrigo.siqueira, aurabindo.pillai, alex.hung,
	hamza.mahfooz, wayne.lin
  Cc: Hersen Wu, markyacoub

From: Hersen Wu <Hersenxs.Wu@amd.com>

Add check eDP intermedidate link rate caps from DPCD
offset 0x10 - 0x1f. Only run DP link training for link
rate supported by eDP.

Beside max link rate, eDP1.4b introduces intermediate link
rate. eDP reports ilr caps with DPCD register 0x10 - 0x1f.

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
---
 lib/igt_amd.h                    |  1 +
 tests/amdgpu/amd_ilr.c           |  2 --
 tests/amdgpu/amd_link_settings.c | 32 ++++++++++++++++++++++++++++----
 3 files changed, 29 insertions(+), 6 deletions(-)

diff --git a/lib/igt_amd.h b/lib/igt_amd.h
index 1e66348ad..254b5d37b 100644
--- a/lib/igt_amd.h
+++ b/lib/igt_amd.h
@@ -46,6 +46,7 @@
 /* eDP related */
 #define DEBUGFS_EDP_ILR_SETTING "ilr_setting"
 #define MAX_SUPPORTED_ILR 8
+#define MULTIPLIER_TO_LR 270000
 #define DEBUGFS_EDP_PSR_CAP	"psr_capability"
 #define DEBUGFS_EDP_PSR_STATE	"psr_state"
 #define DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT "allow_edp_hotplug_detection"
diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c
index 50ca93a14..b2c0f294d 100644
--- a/tests/amdgpu/amd_ilr.c
+++ b/tests/amdgpu/amd_ilr.c
@@ -29,8 +29,6 @@
 #include <sys/types.h>
 #include <sys/stat.h>
 
-#define MULTIPLIER_TO_LR 270000
-
 IGT_TEST_DESCRIPTION("This igt test validates ILR (Intermediate Link Rate) "
 	"feature from two perspective: "
 	"1. Test if we can sucessfully train link rate at all supported ILRs"
diff --git a/tests/amdgpu/amd_link_settings.c b/tests/amdgpu/amd_link_settings.c
index 6a7e8cc53..226c94d73 100644
--- a/tests/amdgpu/amd_link_settings.c
+++ b/tests/amdgpu/amd_link_settings.c
@@ -34,6 +34,7 @@ typedef struct
         enum pipe pipe_id;
 	int connector_type;
 	int w, h;
+	int supported_ilr[MAX_SUPPORTED_ILR];
 } data_t;
 
 const enum dc_lane_count lane_count_values[] =
@@ -51,12 +52,17 @@ const enum dc_link_rate dp_link_rate_values[] =
 	LINK_RATE_HIGH3
 };
 
+/* eDP 1.4b */
 const enum dc_link_rate edp_link_rate_values[] =
 {
-	LINK_RATE_LOW,
-	LINK_RATE_HIGH,
-	LINK_RATE_RBR2,
-	LINK_RATE_HIGH2
+	LINK_RATE_LOW,		/* 0x6 Rate_1 (RBR)	- 1.62 Gbps/Lane */
+	LINK_RATE_RATE_2,	/* 0x8 Rate_2		- 2.16 Gbps/Lane */
+	LINK_RATE_RATE_3,	/* 0x9 Rate_3		- 2.43 Gbps/Lane */
+	LINK_RATE_HIGH,		/* 0xA Rate_4 (HBR)	- 2.70 Gbps/Lane */
+	LINK_RATE_RBR2,		/* 0xC Rate_5 (RBR2)	- 3.24 Gbps/Lane */
+	LINK_RATE_RATE_6,	/* 0x10 Rate_6		- 4.32 Gbps/Lane */
+	LINK_RATE_HIGH2,	/* 0x14 Rate_7 (HBR2)	- 5.40 Gbps/Lane */
+	LINK_RATE_HIGH3		/* 0x1E Rate_8 (HBR3)	- 8.10 Gbps/Lane */
 };
 
 static void test_fini(data_t *data)
@@ -116,6 +122,8 @@ static void run_link_training_config(data_t *data, igt_output_t *output)
 	} else if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {
 		link_rate_values = edp_link_rate_values;
 		num_link_rates = ARRAY_SIZE(edp_link_rate_values);
+		igt_amd_read_ilr_setting(data->drm_fd, connector_name,
+			data->supported_ilr);
 	} else {
 		igt_info("Not a DP or eDP connector\n");
 		return;
@@ -137,6 +145,22 @@ static void run_link_training_config(data_t *data, igt_output_t *output)
 			if (link_rate_values[j] > max_lr)
 				continue;
 
+			/* Check if ilr link rate is supported */
+			if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {
+				bool valid_link_rate = false;
+
+				for (int k = 0; k < MAX_SUPPORTED_ILR; k++) {
+					if (data->supported_ilr[k] ==
+						link_rate_values[j] * MULTIPLIER_TO_LR) {
+						valid_link_rate = true;
+						break;
+					} else if (data->supported_ilr[k] == 0)
+						break;
+				}
+				if (!valid_link_rate)
+					continue;
+			}
+
 			/* Write link settings */
 			igt_info("Applying lane count: %d, link rate 0x%02x, on default training\n",
 				  lane_count_values[i], link_rate_values[j]);
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread
* [PATCH] [i-g-t] tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate
@ 2023-12-18 13:59 ` Hersen Wu
  0 siblings, 0 replies; 7+ messages in thread
From: Hersen Wu @ 2023-12-18 13:59 UTC (permalink / raw)
  To: igt-dev, rodrigo.siqueira, aurabindo.pillai, alex.hung,
	hamza.mahfooz, wayne.lin
  Cc: Hersen Wu, markyacoub

From: Hersen Wu <Hersenxs.Wu@amd.com>

Add check eDP intermedidate link rate caps from DPCD
offset 0x10 - 0x1f. Only run DP link training for link
rate supported by eDP.

Beside max link rate, eDP1.4b introduces intermediate link
rate. eDP reports ilr caps with DPCD register 0x10 - 0x1f.

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
---
 lib/igt_amd.h                    |  1 +
 tests/amdgpu/amd_ilr.c           |  2 --
 tests/amdgpu/amd_link_settings.c | 32 ++++++++++++++++++++++++++++----
 3 files changed, 29 insertions(+), 6 deletions(-)

diff --git a/lib/igt_amd.h b/lib/igt_amd.h
index 1e66348ad..254b5d37b 100644
--- a/lib/igt_amd.h
+++ b/lib/igt_amd.h
@@ -46,6 +46,7 @@
 /* eDP related */
 #define DEBUGFS_EDP_ILR_SETTING "ilr_setting"
 #define MAX_SUPPORTED_ILR 8
+#define MULTIPLIER_TO_LR 270000
 #define DEBUGFS_EDP_PSR_CAP	"psr_capability"
 #define DEBUGFS_EDP_PSR_STATE	"psr_state"
 #define DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT "allow_edp_hotplug_detection"
diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c
index 50ca93a14..b2c0f294d 100644
--- a/tests/amdgpu/amd_ilr.c
+++ b/tests/amdgpu/amd_ilr.c
@@ -29,8 +29,6 @@
 #include <sys/types.h>
 #include <sys/stat.h>
 
-#define MULTIPLIER_TO_LR 270000
-
 IGT_TEST_DESCRIPTION("This igt test validates ILR (Intermediate Link Rate) "
 	"feature from two perspective: "
 	"1. Test if we can sucessfully train link rate at all supported ILRs"
diff --git a/tests/amdgpu/amd_link_settings.c b/tests/amdgpu/amd_link_settings.c
index 6a7e8cc53..226c94d73 100644
--- a/tests/amdgpu/amd_link_settings.c
+++ b/tests/amdgpu/amd_link_settings.c
@@ -34,6 +34,7 @@ typedef struct
         enum pipe pipe_id;
 	int connector_type;
 	int w, h;
+	int supported_ilr[MAX_SUPPORTED_ILR];
 } data_t;
 
 const enum dc_lane_count lane_count_values[] =
@@ -51,12 +52,17 @@ const enum dc_link_rate dp_link_rate_values[] =
 	LINK_RATE_HIGH3
 };
 
+/* eDP 1.4b */
 const enum dc_link_rate edp_link_rate_values[] =
 {
-	LINK_RATE_LOW,
-	LINK_RATE_HIGH,
-	LINK_RATE_RBR2,
-	LINK_RATE_HIGH2
+	LINK_RATE_LOW,		/* 0x6 Rate_1 (RBR)	- 1.62 Gbps/Lane */
+	LINK_RATE_RATE_2,	/* 0x8 Rate_2		- 2.16 Gbps/Lane */
+	LINK_RATE_RATE_3,	/* 0x9 Rate_3		- 2.43 Gbps/Lane */
+	LINK_RATE_HIGH,		/* 0xA Rate_4 (HBR)	- 2.70 Gbps/Lane */
+	LINK_RATE_RBR2,		/* 0xC Rate_5 (RBR2)	- 3.24 Gbps/Lane */
+	LINK_RATE_RATE_6,	/* 0x10 Rate_6		- 4.32 Gbps/Lane */
+	LINK_RATE_HIGH2,	/* 0x14 Rate_7 (HBR2)	- 5.40 Gbps/Lane */
+	LINK_RATE_HIGH3		/* 0x1E Rate_8 (HBR3)	- 8.10 Gbps/Lane */
 };
 
 static void test_fini(data_t *data)
@@ -116,6 +122,8 @@ static void run_link_training_config(data_t *data, igt_output_t *output)
 	} else if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {
 		link_rate_values = edp_link_rate_values;
 		num_link_rates = ARRAY_SIZE(edp_link_rate_values);
+		igt_amd_read_ilr_setting(data->drm_fd, connector_name,
+			data->supported_ilr);
 	} else {
 		igt_info("Not a DP or eDP connector\n");
 		return;
@@ -137,6 +145,22 @@ static void run_link_training_config(data_t *data, igt_output_t *output)
 			if (link_rate_values[j] > max_lr)
 				continue;
 
+			/* Check if ilr link rate is supported */
+			if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {
+				bool valid_link_rate = false;
+
+				for (int k = 0; k < MAX_SUPPORTED_ILR; k++) {
+					if (data->supported_ilr[k] ==
+						link_rate_values[j] * MULTIPLIER_TO_LR) {
+						valid_link_rate = true;
+						break;
+					} else if (data->supported_ilr[k] == 0)
+						break;
+				}
+				if (!valid_link_rate)
+					continue;
+			}
+
 			/* Write link settings */
 			igt_info("Applying lane count: %d, link rate 0x%02x, on default training\n",
 				  lane_count_values[i], link_rate_values[j]);
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread
* Re: [PATCH] [i-g-t] tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate
  2023-12-18 13:59 ` Hersen Wu
  (?)
@ 2023-12-18 14:48 ` Pillai, Aurabindo
  -1 siblings, 0 replies; 7+ messages in thread
From: Pillai, Aurabindo @ 2023-12-18 14:48 UTC (permalink / raw)
  To: Wu, Hersen, igt-dev, Siqueira, Rodrigo, Hung, Alex, Mahfooz,
	Hamza, Lin, Wayne
  Cc: markyacoub

[-- Attachment #1: Type: text/plain, Size: 5409 bytes --]

[AMD Official Use Only - General]

Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>

--

Regards,
Jay
________________________________
From: Hersen Wu <hersenxs.wu@amd.com>
Sent: Monday, December 18, 2023 8:59 AM
To: igt-dev@lists.freedesktop.org <igt-dev@lists.freedesktop.org>; Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; Pillai, Aurabindo <Aurabindo.Pillai@amd.com>; Hung, Alex <Alex.Hung@amd.com>; Mahfooz, Hamza <Hamza.Mahfooz@amd.com>; Lin, Wayne <Wayne.Lin@amd.com>
Cc: markyacoub@google.com <markyacoub@google.com>; Wu, Hersen <hersenxs.wu@amd.com>; Wu, Hersen <hersenxs.wu@amd.com>
Subject: [PATCH] [i-g-t] tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate

From: Hersen Wu <Hersenxs.Wu@amd.com>

Add check eDP intermedidate link rate caps from DPCD
offset 0x10 - 0x1f. Only run DP link training for link
rate supported by eDP.

Beside max link rate, eDP1.4b introduces intermediate link
rate. eDP reports ilr caps with DPCD register 0x10 - 0x1f.

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
---
 lib/igt_amd.h                    |  1 +
 tests/amdgpu/amd_ilr.c           |  2 --
 tests/amdgpu/amd_link_settings.c | 32 ++++++++++++++++++++++++++++----
 3 files changed, 29 insertions(+), 6 deletions(-)

diff --git a/lib/igt_amd.h b/lib/igt_amd.h
index 1e66348ad..254b5d37b 100644
--- a/lib/igt_amd.h
+++ b/lib/igt_amd.h
@@ -46,6 +46,7 @@
 /* eDP related */
 #define DEBUGFS_EDP_ILR_SETTING "ilr_setting"
 #define MAX_SUPPORTED_ILR 8
+#define MULTIPLIER_TO_LR 270000
 #define DEBUGFS_EDP_PSR_CAP     "psr_capability"
 #define DEBUGFS_EDP_PSR_STATE   "psr_state"
 #define DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT "allow_edp_hotplug_detection"
diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c
index 50ca93a14..b2c0f294d 100644
--- a/tests/amdgpu/amd_ilr.c
+++ b/tests/amdgpu/amd_ilr.c
@@ -29,8 +29,6 @@
 #include <sys/types.h>
 #include <sys/stat.h>

-#define MULTIPLIER_TO_LR 270000
-
 IGT_TEST_DESCRIPTION("This igt test validates ILR (Intermediate Link Rate) "
         "feature from two perspective: "
         "1. Test if we can sucessfully train link rate at all supported ILRs"
diff --git a/tests/amdgpu/amd_link_settings.c b/tests/amdgpu/amd_link_settings.c
index 6a7e8cc53..226c94d73 100644
--- a/tests/amdgpu/amd_link_settings.c
+++ b/tests/amdgpu/amd_link_settings.c
@@ -34,6 +34,7 @@ typedef struct
         enum pipe pipe_id;
         int connector_type;
         int w, h;
+       int supported_ilr[MAX_SUPPORTED_ILR];
 } data_t;

 const enum dc_lane_count lane_count_values[] =
@@ -51,12 +52,17 @@ const enum dc_link_rate dp_link_rate_values[] =
         LINK_RATE_HIGH3
 };

+/* eDP 1.4b */
 const enum dc_link_rate edp_link_rate_values[] =
 {
-       LINK_RATE_LOW,
-       LINK_RATE_HIGH,
-       LINK_RATE_RBR2,
-       LINK_RATE_HIGH2
+       LINK_RATE_LOW,          /* 0x6 Rate_1 (RBR)     - 1.62 Gbps/Lane */
+       LINK_RATE_RATE_2,       /* 0x8 Rate_2           - 2.16 Gbps/Lane */
+       LINK_RATE_RATE_3,       /* 0x9 Rate_3           - 2.43 Gbps/Lane */
+       LINK_RATE_HIGH,         /* 0xA Rate_4 (HBR)     - 2.70 Gbps/Lane */
+       LINK_RATE_RBR2,         /* 0xC Rate_5 (RBR2)    - 3.24 Gbps/Lane */
+       LINK_RATE_RATE_6,       /* 0x10 Rate_6          - 4.32 Gbps/Lane */
+       LINK_RATE_HIGH2,        /* 0x14 Rate_7 (HBR2)   - 5.40 Gbps/Lane */
+       LINK_RATE_HIGH3         /* 0x1E Rate_8 (HBR3)   - 8.10 Gbps/Lane */
 };

 static void test_fini(data_t *data)
@@ -116,6 +122,8 @@ static void run_link_training_config(data_t *data, igt_output_t *output)
         } else if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {
                 link_rate_values = edp_link_rate_values;
                 num_link_rates = ARRAY_SIZE(edp_link_rate_values);
+               igt_amd_read_ilr_setting(data->drm_fd, connector_name,
+                       data->supported_ilr);
         } else {
                 igt_info("Not a DP or eDP connector\n");
                 return;
@@ -137,6 +145,22 @@ static void run_link_training_config(data_t *data, igt_output_t *output)
                         if (link_rate_values[j] > max_lr)
                                 continue;

+                       /* Check if ilr link rate is supported */
+                       if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {
+                               bool valid_link_rate = false;
+
+                               for (int k = 0; k < MAX_SUPPORTED_ILR; k++) {
+                                       if (data->supported_ilr[k] ==
+                                               link_rate_values[j] * MULTIPLIER_TO_LR) {
+                                               valid_link_rate = true;
+                                               break;
+                                       } else if (data->supported_ilr[k] == 0)
+                                               break;
+                               }
+                               if (!valid_link_rate)
+                                       continue;
+                       }
+
                         /* Write link settings */
                         igt_info("Applying lane count: %d, link rate 0x%02x, on default training\n",
                                   lane_count_values[i], link_rate_values[j]);
--
2.25.1


[-- Attachment #2: Type: text/html, Size: 12843 bytes --]

^ permalink raw reply related	[flat|nested] 7+ messages in thread
* ✗ Fi.CI.BUILD: failure for tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate (rev2)
  2023-12-18 13:59 ` Hersen Wu
  (?)
  (?)
@ 2023-12-18 18:59 ` Patchwork
  -1 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2023-12-18 18:59 UTC (permalink / raw)
  To: Pillai, Aurabindo; +Cc: igt-dev

== Series Details ==

Series: tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate (rev2)
URL   : https://patchwork.freedesktop.org/series/127915/
State : failure

== Summary ==

Applying: tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate
Using index info to reconstruct a base tree...
Patch failed at 0001 tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".


^ permalink raw reply	[flat|nested] 7+ messages in thread
* Re: [PATCH] [i-g-t] tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate
  2024-01-03 14:46 ` Hersen Wu
  (?)
@ 2024-01-03 15:38 ` Aurabindo Pillai
  -1 siblings, 0 replies; 7+ messages in thread
From: Aurabindo Pillai @ 2024-01-03 15:38 UTC (permalink / raw)
  To: Hersen Wu, igt-dev, rodrigo.siqueira, alex.hung, hamza.mahfooz,
	wayne.lin
  Cc: markyacoub



On 1/3/2024 9:46 AM, Hersen Wu wrote:
> From: Hersen Wu <Hersenxs.Wu@amd.com>
> 
> Add check eDP intermedidate link rate caps from DPCD
> offset 0x10 - 0x1f. Only run DP link training for link
> rate supported by eDP.
> 
> Beside max link rate, eDP1.4b introduces intermediate link
> rate. eDP reports ilr caps with DPCD register 0x10 - 0x1f.
> 
> Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
> ---
>   lib/igt_amd.h                    |  1 +
>   tests/amdgpu/amd_ilr.c           |  2 --
>   tests/amdgpu/amd_link_settings.c | 32 ++++++++++++++++++++++++++++----
>   3 files changed, 29 insertions(+), 6 deletions(-)
> 
> diff --git a/lib/igt_amd.h b/lib/igt_amd.h
> index 1e66348ad..254b5d37b 100644
> --- a/lib/igt_amd.h
> +++ b/lib/igt_amd.h
> @@ -46,6 +46,7 @@
>   /* eDP related */
>   #define DEBUGFS_EDP_ILR_SETTING "ilr_setting"
>   #define MAX_SUPPORTED_ILR 8
> +#define MULTIPLIER_TO_LR 270000
>   #define DEBUGFS_EDP_PSR_CAP	"psr_capability"
>   #define DEBUGFS_EDP_PSR_STATE	"psr_state"
>   #define DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT "allow_edp_hotplug_detection"
> diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c
> index 50ca93a14..b2c0f294d 100644
> --- a/tests/amdgpu/amd_ilr.c
> +++ b/tests/amdgpu/amd_ilr.c
> @@ -29,8 +29,6 @@
>   #include <sys/types.h>
>   #include <sys/stat.h>
>   
> -#define MULTIPLIER_TO_LR 270000
> -
>   IGT_TEST_DESCRIPTION("This igt test validates ILR (Intermediate Link Rate) "
>   	"feature from two perspective: "
>   	"1. Test if we can sucessfully train link rate at all supported ILRs"
> diff --git a/tests/amdgpu/amd_link_settings.c b/tests/amdgpu/amd_link_settings.c
> index 6a7e8cc53..226c94d73 100644
> --- a/tests/amdgpu/amd_link_settings.c
> +++ b/tests/amdgpu/amd_link_settings.c
> @@ -34,6 +34,7 @@ typedef struct
>           enum pipe pipe_id;
>   	int connector_type;
>   	int w, h;
> +	int supported_ilr[MAX_SUPPORTED_ILR];
>   } data_t;
>   
>   const enum dc_lane_count lane_count_values[] =
> @@ -51,12 +52,17 @@ const enum dc_link_rate dp_link_rate_values[] =
>   	LINK_RATE_HIGH3
>   };
>   
> +/* eDP 1.4b */
>   const enum dc_link_rate edp_link_rate_values[] =
>   {
> -	LINK_RATE_LOW,
> -	LINK_RATE_HIGH,
> -	LINK_RATE_RBR2,
> -	LINK_RATE_HIGH2
> +	LINK_RATE_LOW,		/* 0x6 Rate_1 (RBR)	- 1.62 Gbps/Lane */
> +	LINK_RATE_RATE_2,	/* 0x8 Rate_2		- 2.16 Gbps/Lane */
> +	LINK_RATE_RATE_3,	/* 0x9 Rate_3		- 2.43 Gbps/Lane */
> +	LINK_RATE_HIGH,		/* 0xA Rate_4 (HBR)	- 2.70 Gbps/Lane */
> +	LINK_RATE_RBR2,		/* 0xC Rate_5 (RBR2)	- 3.24 Gbps/Lane */
> +	LINK_RATE_RATE_6,	/* 0x10 Rate_6		- 4.32 Gbps/Lane */
> +	LINK_RATE_HIGH2,	/* 0x14 Rate_7 (HBR2)	- 5.40 Gbps/Lane */
> +	LINK_RATE_HIGH3		/* 0x1E Rate_8 (HBR3)	- 8.10 Gbps/Lane */
>   };
>   
>   static void test_fini(data_t *data)
> @@ -116,6 +122,8 @@ static void run_link_training_config(data_t *data, igt_output_t *output)
>   	} else if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {
>   		link_rate_values = edp_link_rate_values;
>   		num_link_rates = ARRAY_SIZE(edp_link_rate_values);
> +		igt_amd_read_ilr_setting(data->drm_fd, connector_name,
> +			data->supported_ilr);
>   	} else {
>   		igt_info("Not a DP or eDP connector\n");
>   		return;
> @@ -137,6 +145,22 @@ static void run_link_training_config(data_t *data, igt_output_t *output)
>   			if (link_rate_values[j] > max_lr)
>   				continue;
>   
> +			/* Check if ilr link rate is supported */
> +			if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {
> +				bool valid_link_rate = false;
> +
> +				for (int k = 0; k < MAX_SUPPORTED_ILR; k++) {
> +					if (data->supported_ilr[k] ==
> +						link_rate_values[j] * MULTIPLIER_TO_LR) {
> +						valid_link_rate = true;
> +						break;
> +					} else if (data->supported_ilr[k] == 0)
> +						break;
> +				}
> +				if (!valid_link_rate)
> +					continue;
> +			}
> +
>   			/* Write link settings */
>   			igt_info("Applying lane count: %d, link rate 0x%02x, on default training\n",
>   				  lane_count_values[i], link_rate_values[j]);

Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>

^ permalink raw reply	[flat|nested] 7+ messages in thread
* [PATCH] [i-g-t] tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate
@ 2024-01-03 14:46 ` Hersen Wu
  0 siblings, 0 replies; 7+ messages in thread
From: Hersen Wu @ 2024-01-03 14:46 UTC (permalink / raw)
  To: igt-dev, rodrigo.siqueira, aurabindo.pillai, alex.hung,
	hamza.mahfooz, wayne.lin
  Cc: Hersen Wu, markyacoub

From: Hersen Wu <Hersenxs.Wu@amd.com>

Add check eDP intermedidate link rate caps from DPCD
offset 0x10 - 0x1f. Only run DP link training for link
rate supported by eDP.

Beside max link rate, eDP1.4b introduces intermediate link
rate. eDP reports ilr caps with DPCD register 0x10 - 0x1f.

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
---
 lib/igt_amd.h                    |  1 +
 tests/amdgpu/amd_ilr.c           |  2 --
 tests/amdgpu/amd_link_settings.c | 32 ++++++++++++++++++++++++++++----
 3 files changed, 29 insertions(+), 6 deletions(-)

diff --git a/lib/igt_amd.h b/lib/igt_amd.h
index 1e66348ad..254b5d37b 100644
--- a/lib/igt_amd.h
+++ b/lib/igt_amd.h
@@ -46,6 +46,7 @@
 /* eDP related */
 #define DEBUGFS_EDP_ILR_SETTING "ilr_setting"
 #define MAX_SUPPORTED_ILR 8
+#define MULTIPLIER_TO_LR 270000
 #define DEBUGFS_EDP_PSR_CAP	"psr_capability"
 #define DEBUGFS_EDP_PSR_STATE	"psr_state"
 #define DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT "allow_edp_hotplug_detection"
diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c
index 50ca93a14..b2c0f294d 100644
--- a/tests/amdgpu/amd_ilr.c
+++ b/tests/amdgpu/amd_ilr.c
@@ -29,8 +29,6 @@
 #include <sys/types.h>
 #include <sys/stat.h>
 
-#define MULTIPLIER_TO_LR 270000
-
 IGT_TEST_DESCRIPTION("This igt test validates ILR (Intermediate Link Rate) "
 	"feature from two perspective: "
 	"1. Test if we can sucessfully train link rate at all supported ILRs"
diff --git a/tests/amdgpu/amd_link_settings.c b/tests/amdgpu/amd_link_settings.c
index 6a7e8cc53..226c94d73 100644
--- a/tests/amdgpu/amd_link_settings.c
+++ b/tests/amdgpu/amd_link_settings.c
@@ -34,6 +34,7 @@ typedef struct
         enum pipe pipe_id;
 	int connector_type;
 	int w, h;
+	int supported_ilr[MAX_SUPPORTED_ILR];
 } data_t;
 
 const enum dc_lane_count lane_count_values[] =
@@ -51,12 +52,17 @@ const enum dc_link_rate dp_link_rate_values[] =
 	LINK_RATE_HIGH3
 };
 
+/* eDP 1.4b */
 const enum dc_link_rate edp_link_rate_values[] =
 {
-	LINK_RATE_LOW,
-	LINK_RATE_HIGH,
-	LINK_RATE_RBR2,
-	LINK_RATE_HIGH2
+	LINK_RATE_LOW,		/* 0x6 Rate_1 (RBR)	- 1.62 Gbps/Lane */
+	LINK_RATE_RATE_2,	/* 0x8 Rate_2		- 2.16 Gbps/Lane */
+	LINK_RATE_RATE_3,	/* 0x9 Rate_3		- 2.43 Gbps/Lane */
+	LINK_RATE_HIGH,		/* 0xA Rate_4 (HBR)	- 2.70 Gbps/Lane */
+	LINK_RATE_RBR2,		/* 0xC Rate_5 (RBR2)	- 3.24 Gbps/Lane */
+	LINK_RATE_RATE_6,	/* 0x10 Rate_6		- 4.32 Gbps/Lane */
+	LINK_RATE_HIGH2,	/* 0x14 Rate_7 (HBR2)	- 5.40 Gbps/Lane */
+	LINK_RATE_HIGH3		/* 0x1E Rate_8 (HBR3)	- 8.10 Gbps/Lane */
 };
 
 static void test_fini(data_t *data)
@@ -116,6 +122,8 @@ static void run_link_training_config(data_t *data, igt_output_t *output)
 	} else if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {
 		link_rate_values = edp_link_rate_values;
 		num_link_rates = ARRAY_SIZE(edp_link_rate_values);
+		igt_amd_read_ilr_setting(data->drm_fd, connector_name,
+			data->supported_ilr);
 	} else {
 		igt_info("Not a DP or eDP connector\n");
 		return;
@@ -137,6 +145,22 @@ static void run_link_training_config(data_t *data, igt_output_t *output)
 			if (link_rate_values[j] > max_lr)
 				continue;
 
+			/* Check if ilr link rate is supported */
+			if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {
+				bool valid_link_rate = false;
+
+				for (int k = 0; k < MAX_SUPPORTED_ILR; k++) {
+					if (data->supported_ilr[k] ==
+						link_rate_values[j] * MULTIPLIER_TO_LR) {
+						valid_link_rate = true;
+						break;
+					} else if (data->supported_ilr[k] == 0)
+						break;
+				}
+				if (!valid_link_rate)
+					continue;
+			}
+
 			/* Write link settings */
 			igt_info("Applying lane count: %d, link rate 0x%02x, on default training\n",
 				  lane_count_values[i], link_rate_values[j]);
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread
* [PATCH] [i-g-t] tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate
@ 2024-01-03 14:46 ` Hersen Wu
  0 siblings, 0 replies; 7+ messages in thread
From: Hersen Wu @ 2024-01-03 14:46 UTC (permalink / raw)
  To: igt-dev, rodrigo.siqueira, aurabindo.pillai, alex.hung,
	hamza.mahfooz, wayne.lin
  Cc: Hersen Wu, markyacoub

From: Hersen Wu <Hersenxs.Wu@amd.com>

Add check eDP intermedidate link rate caps from DPCD
offset 0x10 - 0x1f. Only run DP link training for link
rate supported by eDP.

Beside max link rate, eDP1.4b introduces intermediate link
rate. eDP reports ilr caps with DPCD register 0x10 - 0x1f.

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
---
 lib/igt_amd.h                    |  1 +
 tests/amdgpu/amd_ilr.c           |  2 --
 tests/amdgpu/amd_link_settings.c | 32 ++++++++++++++++++++++++++++----
 3 files changed, 29 insertions(+), 6 deletions(-)

diff --git a/lib/igt_amd.h b/lib/igt_amd.h
index 1e66348ad..254b5d37b 100644
--- a/lib/igt_amd.h
+++ b/lib/igt_amd.h
@@ -46,6 +46,7 @@
 /* eDP related */
 #define DEBUGFS_EDP_ILR_SETTING "ilr_setting"
 #define MAX_SUPPORTED_ILR 8
+#define MULTIPLIER_TO_LR 270000
 #define DEBUGFS_EDP_PSR_CAP	"psr_capability"
 #define DEBUGFS_EDP_PSR_STATE	"psr_state"
 #define DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT "allow_edp_hotplug_detection"
diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c
index 50ca93a14..b2c0f294d 100644
--- a/tests/amdgpu/amd_ilr.c
+++ b/tests/amdgpu/amd_ilr.c
@@ -29,8 +29,6 @@
 #include <sys/types.h>
 #include <sys/stat.h>
 
-#define MULTIPLIER_TO_LR 270000
-
 IGT_TEST_DESCRIPTION("This igt test validates ILR (Intermediate Link Rate) "
 	"feature from two perspective: "
 	"1. Test if we can sucessfully train link rate at all supported ILRs"
diff --git a/tests/amdgpu/amd_link_settings.c b/tests/amdgpu/amd_link_settings.c
index 6a7e8cc53..226c94d73 100644
--- a/tests/amdgpu/amd_link_settings.c
+++ b/tests/amdgpu/amd_link_settings.c
@@ -34,6 +34,7 @@ typedef struct
         enum pipe pipe_id;
 	int connector_type;
 	int w, h;
+	int supported_ilr[MAX_SUPPORTED_ILR];
 } data_t;
 
 const enum dc_lane_count lane_count_values[] =
@@ -51,12 +52,17 @@ const enum dc_link_rate dp_link_rate_values[] =
 	LINK_RATE_HIGH3
 };
 
+/* eDP 1.4b */
 const enum dc_link_rate edp_link_rate_values[] =
 {
-	LINK_RATE_LOW,
-	LINK_RATE_HIGH,
-	LINK_RATE_RBR2,
-	LINK_RATE_HIGH2
+	LINK_RATE_LOW,		/* 0x6 Rate_1 (RBR)	- 1.62 Gbps/Lane */
+	LINK_RATE_RATE_2,	/* 0x8 Rate_2		- 2.16 Gbps/Lane */
+	LINK_RATE_RATE_3,	/* 0x9 Rate_3		- 2.43 Gbps/Lane */
+	LINK_RATE_HIGH,		/* 0xA Rate_4 (HBR)	- 2.70 Gbps/Lane */
+	LINK_RATE_RBR2,		/* 0xC Rate_5 (RBR2)	- 3.24 Gbps/Lane */
+	LINK_RATE_RATE_6,	/* 0x10 Rate_6		- 4.32 Gbps/Lane */
+	LINK_RATE_HIGH2,	/* 0x14 Rate_7 (HBR2)	- 5.40 Gbps/Lane */
+	LINK_RATE_HIGH3		/* 0x1E Rate_8 (HBR3)	- 8.10 Gbps/Lane */
 };
 
 static void test_fini(data_t *data)
@@ -116,6 +122,8 @@ static void run_link_training_config(data_t *data, igt_output_t *output)
 	} else if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {
 		link_rate_values = edp_link_rate_values;
 		num_link_rates = ARRAY_SIZE(edp_link_rate_values);
+		igt_amd_read_ilr_setting(data->drm_fd, connector_name,
+			data->supported_ilr);
 	} else {
 		igt_info("Not a DP or eDP connector\n");
 		return;
@@ -137,6 +145,22 @@ static void run_link_training_config(data_t *data, igt_output_t *output)
 			if (link_rate_values[j] > max_lr)
 				continue;
 
+			/* Check if ilr link rate is supported */
+			if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {
+				bool valid_link_rate = false;
+
+				for (int k = 0; k < MAX_SUPPORTED_ILR; k++) {
+					if (data->supported_ilr[k] ==
+						link_rate_values[j] * MULTIPLIER_TO_LR) {
+						valid_link_rate = true;
+						break;
+					} else if (data->supported_ilr[k] == 0)
+						break;
+				}
+				if (!valid_link_rate)
+					continue;
+			}
+
 			/* Write link settings */
 			igt_info("Applying lane count: %d, link rate 0x%02x, on default training\n",
 				  lane_count_values[i], link_rate_values[j]);
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread
end of thread, other threads:[~2024-01-03 15:38 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-12-18 13:59 [PATCH] [i-g-t] tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate Hersen Wu
2023-12-18 13:59 ` Hersen Wu
2023-12-18 14:48 ` Pillai, Aurabindo
2023-12-18 18:59 ` ✗ Fi.CI.BUILD: failure for tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate (rev2) Patchwork
2024-01-03 14:46 [PATCH] [i-g-t] tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate Hersen Wu
2024-01-03 14:46 ` Hersen Wu
2024-01-03 15:38 ` Aurabindo Pillai

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