* [PATCH] drm/xe/guc: Enable WA 14018913170
@ 2024-01-16 7:48 Karthik Poosa
2024-01-16 8:45 ` ✗ Fi.CI.BAT: failure for drm/xe/guc: Enable WA 14018913170 (rev3) Patchwork
2024-01-16 8:48 ` [PATCH] drm/xe/guc: Enable WA 14018913170 Nilawar, Badal
0 siblings, 2 replies; 13+ messages in thread
From: Karthik Poosa @ 2024-01-16 7:48 UTC (permalink / raw)
To: intel-gfx; +Cc: Karthik Poosa, matthew.d.roper
The GuC handles the WA, the KMD just needs to set the flag to enable
it on the appropriate platforms.
v2: Fixed CI checkpatch warning, alignment should match open parenthesis.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
drivers/gpu/drm/xe/xe_guc.c | 13 +++++++++++++
drivers/gpu/drm/xe/xe_guc_fwif.h | 1 +
drivers/gpu/drm/xe/xe_wa_oob.rules | 5 +++++
3 files changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 235d27b17ff9..5ecd9cd964de 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -132,10 +132,15 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
return flags;
}
+#define GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
+
static u32 guc_ctl_wa_flags(struct xe_guc *guc)
{
struct xe_device *xe = guc_to_xe(guc);
struct xe_gt *gt = guc_to_gt(guc);
+ struct xe_uc_fw *uc_fw = &guc->fw;
+ struct xe_uc_fw_version *version = &uc_fw->versions.found[XE_UC_FW_VER_COMPATIBILITY];
+
u32 flags = 0;
if (XE_WA(gt, 22012773006))
@@ -165,6 +170,14 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
if (XE_WA(gt, 1509372804))
flags |= GUC_WA_RENDER_RST_RC6_EXIT;
+ if (XE_WA(gt, 14018913170)) {
+ if (GUC_VER(version->major, version->minor, version->patch) >= GUC_VER(70, 7, 0))
+ flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
+ else
+ drm_warn(&xe->drm, "can't apply WA 14018913170, GUC version expected >= 70.7.0, found %us %us %us\n",
+ version->major, version->minor, version->patch);
+ }
+
return flags;
}
diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
index 4dd5a88a7826..c281fdbfd2d6 100644
--- a/drivers/gpu/drm/xe/xe_guc_fwif.h
+++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
@@ -97,6 +97,7 @@ struct guc_update_exec_queue_policy {
#define GUC_WA_POLLCS BIT(18)
#define GUC_WA_RENDER_RST_RC6_EXIT BIT(19)
#define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
+#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
#define GUC_CTL_FEATURE 2
#define GUC_CTL_ENABLE_SLPC BIT(2)
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index e73b84e01ea1..b138cbd51bdb 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -17,3 +17,8 @@
14019821291 MEDIA_VERSION_RANGE(1300, 2000)
14015076503 MEDIA_VERSION(1300)
16020292621 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
+14018913170 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
+ MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
+ GRAPHICS_VERSION_RANGE(1270, 1274)
+ MEDIA_VERSION(1300)
+ PLATFORM(DG2)
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/xe/guc: Enable WA 14018913170 (rev3)
2024-01-16 7:48 [PATCH] drm/xe/guc: Enable WA 14018913170 Karthik Poosa
@ 2024-01-16 8:45 ` Patchwork
2024-01-16 8:48 ` [PATCH] drm/xe/guc: Enable WA 14018913170 Nilawar, Badal
1 sibling, 0 replies; 13+ messages in thread
From: Patchwork @ 2024-01-16 8:45 UTC (permalink / raw)
To: Karthik Poosa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 8578 bytes --]
== Series Details ==
Series: drm/xe/guc: Enable WA 14018913170 (rev3)
URL : https://patchwork.freedesktop.org/series/128781/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14125 -> Patchwork_128781v3
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_128781v3 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_128781v3, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/index.html
Participating hosts (39 -> 39)
------------------------------
Additional (1): bat-dg2-8
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_128781v3:
### IGT changes ###
#### Possible regressions ####
* igt@i915_suspend@basic-s3-without-i915:
- bat-rpls-2: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14125/bat-rpls-2/igt@i915_suspend@basic-s3-without-i915.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-rpls-2/igt@i915_suspend@basic-s3-without-i915.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-2:
- {bat-rpls-3}: [PASS][3] -> [FAIL][4] +5 other tests fail
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14125/bat-rpls-3/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-2.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-rpls-3/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-2.html
Known issues
------------
Here are the changes found in Patchwork_128781v3 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s0@lmem0:
- bat-dg2-8: NOTRUN -> [INCOMPLETE][5] ([i915#9275])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@gem_exec_suspend@basic-s0@lmem0.html
* igt@gem_mmap@basic:
- bat-dg2-8: NOTRUN -> [SKIP][6] ([i915#4083])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@gem_mmap@basic.html
* igt@gem_mmap_gtt@basic:
- bat-dg2-8: NOTRUN -> [SKIP][7] ([i915#4077]) +2 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@gem_mmap_gtt@basic.html
* igt@gem_tiled_pread_basic:
- bat-dg2-8: NOTRUN -> [SKIP][8] ([i915#4079]) +1 other test skip
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rps@basic-api:
- bat-dg2-8: NOTRUN -> [SKIP][9] ([i915#6621])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@i915_pm_rps@basic-api.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-dg2-8: NOTRUN -> [SKIP][10] ([i915#6645])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-dg2-8: NOTRUN -> [SKIP][11] ([i915#5190])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg2-8: NOTRUN -> [SKIP][12] ([i915#4215] / [i915#5190])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- bat-dg2-8: NOTRUN -> [SKIP][13] ([i915#4212]) +7 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-dg2-8: NOTRUN -> [SKIP][14] ([i915#4103] / [i915#4213]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-dg2-8: NOTRUN -> [SKIP][15] ([fdo#109285])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-dg2-8: NOTRUN -> [SKIP][16] ([i915#5274])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_pm_backlight@basic-brightness:
- bat-dg2-8: NOTRUN -> [SKIP][17] ([i915#5354])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-dg2-8: NOTRUN -> [SKIP][18] ([i915#3555])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-dg2-8: NOTRUN -> [SKIP][19] ([i915#3708])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-mmap:
- bat-dg2-8: NOTRUN -> [SKIP][20] ([i915#3708] / [i915#4077]) +1 other test skip
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-write:
- bat-dg2-8: NOTRUN -> [SKIP][21] ([i915#3291] / [i915#3708]) +2 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-dg2-8/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@vgem_basic@unload:
- {bat-adls-6}: [INCOMPLETE][22] ([i915#10095]) -> [PASS][23]
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14125/bat-adls-6/igt@vgem_basic@unload.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/bat-adls-6/igt@vgem_basic@unload.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#10095]: https://gitlab.freedesktop.org/drm/intel/issues/10095
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
[i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673
[i915#9732]: https://gitlab.freedesktop.org/drm/intel/issues/9732
Build changes
-------------
* Linux: CI_DRM_14125 -> Patchwork_128781v3
CI-20190529: 20190529
CI_DRM_14125: fc429d95eec92e32db2ad6ae53f61587e3bdaf40 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7674: 7674
Patchwork_128781v3: fc429d95eec92e32db2ad6ae53f61587e3bdaf40 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
b425b3236648 drm/xe/guc: Enable WA 14018913170
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128781v3/index.html
[-- Attachment #2: Type: text/html, Size: 9709 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/xe/guc: Enable WA 14018913170
2024-01-16 7:48 [PATCH] drm/xe/guc: Enable WA 14018913170 Karthik Poosa
2024-01-16 8:45 ` ✗ Fi.CI.BAT: failure for drm/xe/guc: Enable WA 14018913170 (rev3) Patchwork
@ 2024-01-16 8:48 ` Nilawar, Badal
1 sibling, 0 replies; 13+ messages in thread
From: Nilawar, Badal @ 2024-01-16 8:48 UTC (permalink / raw)
To: Karthik Poosa, intel-gfx; +Cc: matthew.d.roper
Please post this patch to intel xe mailing list.
Regards,
Badal
On 16-01-2024 13:18, Karthik Poosa wrote:
> The GuC handles the WA, the KMD just needs to set the flag to enable
> it on the appropriate platforms.
>
> v2: Fixed CI checkpatch warning, alignment should match open parenthesis.
>
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc.c | 13 +++++++++++++
> drivers/gpu/drm/xe/xe_guc_fwif.h | 1 +
> drivers/gpu/drm/xe/xe_wa_oob.rules | 5 +++++
> 3 files changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index 235d27b17ff9..5ecd9cd964de 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -132,10 +132,15 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
> return flags;
> }
>
> +#define GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
> +
> static u32 guc_ctl_wa_flags(struct xe_guc *guc)
> {
> struct xe_device *xe = guc_to_xe(guc);
> struct xe_gt *gt = guc_to_gt(guc);
> + struct xe_uc_fw *uc_fw = &guc->fw;
> + struct xe_uc_fw_version *version = &uc_fw->versions.found[XE_UC_FW_VER_COMPATIBILITY];
> +
> u32 flags = 0;
>
> if (XE_WA(gt, 22012773006))
> @@ -165,6 +170,14 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
> if (XE_WA(gt, 1509372804))
> flags |= GUC_WA_RENDER_RST_RC6_EXIT;
>
> + if (XE_WA(gt, 14018913170)) {
> + if (GUC_VER(version->major, version->minor, version->patch) >= GUC_VER(70, 7, 0))
> + flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
> + else
> + drm_warn(&xe->drm, "can't apply WA 14018913170, GUC version expected >= 70.7.0, found %us %us %us\n",
> + version->major, version->minor, version->patch);
> + }
> +
> return flags;
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
> index 4dd5a88a7826..c281fdbfd2d6 100644
> --- a/drivers/gpu/drm/xe/xe_guc_fwif.h
> +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
> @@ -97,6 +97,7 @@ struct guc_update_exec_queue_policy {
> #define GUC_WA_POLLCS BIT(18)
> #define GUC_WA_RENDER_RST_RC6_EXIT BIT(19)
> #define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
> +#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
>
> #define GUC_CTL_FEATURE 2
> #define GUC_CTL_ENABLE_SLPC BIT(2)
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index e73b84e01ea1..b138cbd51bdb 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -17,3 +17,8 @@
> 14019821291 MEDIA_VERSION_RANGE(1300, 2000)
> 14015076503 MEDIA_VERSION(1300)
> 16020292621 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
> +14018913170 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
> + MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
> + GRAPHICS_VERSION_RANGE(1270, 1274)
> + MEDIA_VERSION(1300)
> + PLATFORM(DG2)
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/xe/guc: Enable WA 14018913170
2024-01-17 5:50 Karthik Poosa
2024-01-18 8:02 ` Nilawar, Badal
@ 2024-01-24 4:41 ` Lucas De Marchi
1 sibling, 0 replies; 13+ messages in thread
From: Lucas De Marchi @ 2024-01-24 4:41 UTC (permalink / raw)
To: Karthik Poosa; +Cc: matthew.d.roper, intel-xe
On Wed, Jan 17, 2024 at 11:20:35AM +0530, Karthik Poosa wrote:
>The GuC handles the WA, the KMD just needs to set the flag to enable
>it on the appropriate platforms.
>
>v2:
> - Fixed CI checkpatch warning, alignment should match open parenthesis.
> - Fixed GUC FW version check to use XE_UC_FW_VER_RELEASE which points to
> current GUC FW version instead of XE_UC_FW_VER_COMPATIBILITY which
> holds GUC FW I/F version (Badal).
>v3:
> - Removed extra character in debug print.
>
>Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
>---
> drivers/gpu/drm/xe/xe_guc.c | 13 +++++++++++++
> drivers/gpu/drm/xe/xe_guc_fwif.h | 1 +
> drivers/gpu/drm/xe/xe_wa_oob.rules | 5 +++++
> 3 files changed, 19 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
>index 235d27b17ff9..2891b0cc4f7f 100644
>--- a/drivers/gpu/drm/xe/xe_guc.c
>+++ b/drivers/gpu/drm/xe/xe_guc.c
>@@ -132,10 +132,15 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
> return flags;
> }
>
>+#define GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
>+
> static u32 guc_ctl_wa_flags(struct xe_guc *guc)
> {
> struct xe_device *xe = guc_to_xe(guc);
> struct xe_gt *gt = guc_to_gt(guc);
>+ struct xe_uc_fw *uc_fw = &guc->fw;
>+ struct xe_uc_fw_version *version = &uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
>+
> u32 flags = 0;
>
> if (XE_WA(gt, 22012773006))
>@@ -165,6 +170,14 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
> if (XE_WA(gt, 1509372804))
> flags |= GUC_WA_RENDER_RST_RC6_EXIT;
>
>+ if (XE_WA(gt, 14018913170)) {
>+ if (GUC_VER(version->major, version->minor, version->patch) >= GUC_VER(70, 7, 0))
>+ flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
>+ else
>+ drm_warn(&xe->drm, "can't apply WA 14018913170, GUC version expected >= 70.7.0, found %u %u %u\n",
>+ version->major, version->minor, version->patch);
this warning can't be here for 2 reasons:
1) We still publish that the expected version is 70.5.1. This now warns
for everybody. The minor version will eventually change, see
https://lore.kernel.org/intel-xe/20240122213708.1841488-1-John.C.Harrison@Intel.com/,
but the message here shouldn't be added ahead of that patch merging.
2) The mechanism to inform about newer fw versions is not by sprinkling
warnings in the driver. The fw loader part in xe will already do it in
the proper way that follows
https://docs.kernel.org/driver-api/firmware/firmware-usage-guidelines.html
For the meantime, please reduce this to a debug message, not a warning.
Lucas De Marchi
>+ }
>+
> return flags;
> }
>
>diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
>index 4dd5a88a7826..c281fdbfd2d6 100644
>--- a/drivers/gpu/drm/xe/xe_guc_fwif.h
>+++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
>@@ -97,6 +97,7 @@ struct guc_update_exec_queue_policy {
> #define GUC_WA_POLLCS BIT(18)
> #define GUC_WA_RENDER_RST_RC6_EXIT BIT(19)
> #define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
>+#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
>
> #define GUC_CTL_FEATURE 2
> #define GUC_CTL_ENABLE_SLPC BIT(2)
>diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
>index e73b84e01ea1..b138cbd51bdb 100644
>--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
>+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
>@@ -17,3 +17,8 @@
> 14019821291 MEDIA_VERSION_RANGE(1300, 2000)
> 14015076503 MEDIA_VERSION(1300)
> 16020292621 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
>+14018913170 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
>+ MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
>+ GRAPHICS_VERSION_RANGE(1270, 1274)
>+ MEDIA_VERSION(1300)
>+ PLATFORM(DG2)
>--
>2.25.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/xe/guc: Enable WA 14018913170
2024-01-17 5:50 Karthik Poosa
@ 2024-01-18 8:02 ` Nilawar, Badal
2024-01-24 4:41 ` Lucas De Marchi
1 sibling, 0 replies; 13+ messages in thread
From: Nilawar, Badal @ 2024-01-18 8:02 UTC (permalink / raw)
To: Karthik Poosa, intel-xe; +Cc: matthew.d.roper
On 17-01-2024 11:20, Karthik Poosa wrote:
> The GuC handles the WA, the KMD just needs to set the flag to enable
> it on the appropriate platforms.
>
> v2:
> - Fixed CI checkpatch warning, alignment should match open parenthesis.
> - Fixed GUC FW version check to use XE_UC_FW_VER_RELEASE which points to
> current GUC FW version instead of XE_UC_FW_VER_COMPATIBILITY which
> holds GUC FW I/F version (Badal).
> v3:
> - Removed extra character in debug print.
>
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
LGTM
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc.c | 13 +++++++++++++
> drivers/gpu/drm/xe/xe_guc_fwif.h | 1 +
> drivers/gpu/drm/xe/xe_wa_oob.rules | 5 +++++
> 3 files changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index 235d27b17ff9..2891b0cc4f7f 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -132,10 +132,15 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
> return flags;
> }
>
> +#define GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
> +
> static u32 guc_ctl_wa_flags(struct xe_guc *guc)
> {
> struct xe_device *xe = guc_to_xe(guc);
> struct xe_gt *gt = guc_to_gt(guc);
> + struct xe_uc_fw *uc_fw = &guc->fw;
> + struct xe_uc_fw_version *version = &uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
> +
> u32 flags = 0;
>
> if (XE_WA(gt, 22012773006))
> @@ -165,6 +170,14 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
> if (XE_WA(gt, 1509372804))
> flags |= GUC_WA_RENDER_RST_RC6_EXIT;
>
> + if (XE_WA(gt, 14018913170)) {
> + if (GUC_VER(version->major, version->minor, version->patch) >= GUC_VER(70, 7, 0))
> + flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
> + else
> + drm_warn(&xe->drm, "can't apply WA 14018913170, GUC version expected >= 70.7.0, found %u %u %u\n",
> + version->major, version->minor, version->patch);
> + }
> +
> return flags;
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
> index 4dd5a88a7826..c281fdbfd2d6 100644
> --- a/drivers/gpu/drm/xe/xe_guc_fwif.h
> +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
> @@ -97,6 +97,7 @@ struct guc_update_exec_queue_policy {
> #define GUC_WA_POLLCS BIT(18)
> #define GUC_WA_RENDER_RST_RC6_EXIT BIT(19)
> #define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
> +#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
>
> #define GUC_CTL_FEATURE 2
> #define GUC_CTL_ENABLE_SLPC BIT(2)
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index e73b84e01ea1..b138cbd51bdb 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -17,3 +17,8 @@
> 14019821291 MEDIA_VERSION_RANGE(1300, 2000)
> 14015076503 MEDIA_VERSION(1300)
> 16020292621 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
> +14018913170 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
> + MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
> + GRAPHICS_VERSION_RANGE(1270, 1274)
> + MEDIA_VERSION(1300)
> + PLATFORM(DG2)
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH] drm/xe/guc: Enable WA 14018913170
@ 2024-01-17 5:50 Karthik Poosa
2024-01-18 8:02 ` Nilawar, Badal
2024-01-24 4:41 ` Lucas De Marchi
0 siblings, 2 replies; 13+ messages in thread
From: Karthik Poosa @ 2024-01-17 5:50 UTC (permalink / raw)
To: intel-xe; +Cc: Karthik Poosa, matthew.d.roper
The GuC handles the WA, the KMD just needs to set the flag to enable
it on the appropriate platforms.
v2:
- Fixed CI checkpatch warning, alignment should match open parenthesis.
- Fixed GUC FW version check to use XE_UC_FW_VER_RELEASE which points to
current GUC FW version instead of XE_UC_FW_VER_COMPATIBILITY which
holds GUC FW I/F version (Badal).
v3:
- Removed extra character in debug print.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
drivers/gpu/drm/xe/xe_guc.c | 13 +++++++++++++
drivers/gpu/drm/xe/xe_guc_fwif.h | 1 +
drivers/gpu/drm/xe/xe_wa_oob.rules | 5 +++++
3 files changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 235d27b17ff9..2891b0cc4f7f 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -132,10 +132,15 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
return flags;
}
+#define GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
+
static u32 guc_ctl_wa_flags(struct xe_guc *guc)
{
struct xe_device *xe = guc_to_xe(guc);
struct xe_gt *gt = guc_to_gt(guc);
+ struct xe_uc_fw *uc_fw = &guc->fw;
+ struct xe_uc_fw_version *version = &uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
+
u32 flags = 0;
if (XE_WA(gt, 22012773006))
@@ -165,6 +170,14 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
if (XE_WA(gt, 1509372804))
flags |= GUC_WA_RENDER_RST_RC6_EXIT;
+ if (XE_WA(gt, 14018913170)) {
+ if (GUC_VER(version->major, version->minor, version->patch) >= GUC_VER(70, 7, 0))
+ flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
+ else
+ drm_warn(&xe->drm, "can't apply WA 14018913170, GUC version expected >= 70.7.0, found %u %u %u\n",
+ version->major, version->minor, version->patch);
+ }
+
return flags;
}
diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
index 4dd5a88a7826..c281fdbfd2d6 100644
--- a/drivers/gpu/drm/xe/xe_guc_fwif.h
+++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
@@ -97,6 +97,7 @@ struct guc_update_exec_queue_policy {
#define GUC_WA_POLLCS BIT(18)
#define GUC_WA_RENDER_RST_RC6_EXIT BIT(19)
#define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
+#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
#define GUC_CTL_FEATURE 2
#define GUC_CTL_ENABLE_SLPC BIT(2)
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index e73b84e01ea1..b138cbd51bdb 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -17,3 +17,8 @@
14019821291 MEDIA_VERSION_RANGE(1300, 2000)
14015076503 MEDIA_VERSION(1300)
16020292621 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
+14018913170 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
+ MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
+ GRAPHICS_VERSION_RANGE(1270, 1274)
+ MEDIA_VERSION(1300)
+ PLATFORM(DG2)
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH] drm/xe/guc: Enable WA 14018913170
@ 2024-01-16 13:14 Karthik Poosa
0 siblings, 0 replies; 13+ messages in thread
From: Karthik Poosa @ 2024-01-16 13:14 UTC (permalink / raw)
To: intel-xe; +Cc: Karthik Poosa, matthew.d.roper
The GuC handles the WA, the KMD just needs to set the flag to enable
it on the appropriate platforms.
v2:
- Fixed CI checkpatch warning, alignment should match open parenthesis.
- Fixed GUC FW version check to use XE_UC_FW_VER_RELEASE which points to
current GUC FW version instead of XE_UC_FW_VER_COMPATIBILITY which
holds GUC FW I/F version (Badal).
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
drivers/gpu/drm/xe/xe_guc.c | 13 +++++++++++++
drivers/gpu/drm/xe/xe_guc_fwif.h | 1 +
drivers/gpu/drm/xe/xe_wa_oob.rules | 5 +++++
3 files changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 235d27b17ff9..635411e45194 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -132,10 +132,15 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
return flags;
}
+#define GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
+
static u32 guc_ctl_wa_flags(struct xe_guc *guc)
{
struct xe_device *xe = guc_to_xe(guc);
struct xe_gt *gt = guc_to_gt(guc);
+ struct xe_uc_fw *uc_fw = &guc->fw;
+ struct xe_uc_fw_version *version = &uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
+
u32 flags = 0;
if (XE_WA(gt, 22012773006))
@@ -165,6 +170,14 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
if (XE_WA(gt, 1509372804))
flags |= GUC_WA_RENDER_RST_RC6_EXIT;
+ if (XE_WA(gt, 14018913170)) {
+ if (GUC_VER(version->major, version->minor, version->patch) >= GUC_VER(70, 7, 0))
+ flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
+ else
+ drm_warn(&xe->drm, "can't apply WA 14018913170, GUC version expected >= 70.7.0, found %us %us %us\n",
+ version->major, version->minor, version->patch);
+ }
+
return flags;
}
diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
index 4dd5a88a7826..c281fdbfd2d6 100644
--- a/drivers/gpu/drm/xe/xe_guc_fwif.h
+++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
@@ -97,6 +97,7 @@ struct guc_update_exec_queue_policy {
#define GUC_WA_POLLCS BIT(18)
#define GUC_WA_RENDER_RST_RC6_EXIT BIT(19)
#define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
+#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
#define GUC_CTL_FEATURE 2
#define GUC_CTL_ENABLE_SLPC BIT(2)
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index e73b84e01ea1..b138cbd51bdb 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -17,3 +17,8 @@
14019821291 MEDIA_VERSION_RANGE(1300, 2000)
14015076503 MEDIA_VERSION(1300)
16020292621 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
+14018913170 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
+ MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
+ GRAPHICS_VERSION_RANGE(1270, 1274)
+ MEDIA_VERSION(1300)
+ PLATFORM(DG2)
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/xe/guc: Enable WA 14018913170
2024-01-16 11:37 ` Nilawar, Badal
@ 2024-01-16 13:08 ` Poosa, Karthik
0 siblings, 0 replies; 13+ messages in thread
From: Poosa, Karthik @ 2024-01-16 13:08 UTC (permalink / raw)
To: Nilawar, Badal, intel-xe; +Cc: matthew.d.roper
Hi Badal,
Fixed the issue in latest patch. Current GUC FW version stored in
XE_UC_FW_VER_RELEASE.
On 16-01-2024 17:07, Nilawar, Badal wrote:
>
>
> On 16-01-2024 15:25, Karthik Poosa wrote:
>> The GuC handles the WA, the KMD just needs to set the flag to enable
>> it on the appropriate platforms.
>>
>> v2: Fixed CI checkpatch warning, alignment should match open
>> parenthesis.
>>
>> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_guc.c | 13 +++++++++++++
>> drivers/gpu/drm/xe/xe_guc_fwif.h | 1 +
>> drivers/gpu/drm/xe/xe_wa_oob.rules | 5 +++++
>> 3 files changed, 19 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
>> index 235d27b17ff9..5ecd9cd964de 100644
>> --- a/drivers/gpu/drm/xe/xe_guc.c
>> +++ b/drivers/gpu/drm/xe/xe_guc.c
>> @@ -132,10 +132,15 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
>> return flags;
>> }
>> +#define GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) |
>> (pat))
>> +
>> static u32 guc_ctl_wa_flags(struct xe_guc *guc)
>> {
>> struct xe_device *xe = guc_to_xe(guc);
>> struct xe_gt *gt = guc_to_gt(guc);
>> + struct xe_uc_fw *uc_fw = &guc->fw;
>> + struct xe_uc_fw_version *version =
>> &uc_fw->versions.found[XE_UC_FW_VER_COMPATIBILITY];
> Why not XE_UC_FW_VER_RELEASE here?
>> +
>> u32 flags = 0;
>> if (XE_WA(gt, 22012773006))
>> @@ -165,6 +170,14 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
>> if (XE_WA(gt, 1509372804))
>> flags |= GUC_WA_RENDER_RST_RC6_EXIT;
>> + if (XE_WA(gt, 14018913170)) {
>> + if (GUC_VER(version->major, version->minor, version->patch)
>> >= GUC_VER(70, 7, 0))
>> + flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
>> + else
>> + drm_warn(&xe->drm, "can't apply WA 14018913170, GUC
>> version expected >= 70.7.0, found %us %us %us\n",
>> + version->major, version->minor, version->patch);
> In bat results this warning is appearing even if guc firmware version
> is > 70.7.0
>
> Regards,
> Badal
>> + }
>> +
>> return flags;
>> }
>> diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h
>> b/drivers/gpu/drm/xe/xe_guc_fwif.h
>> index 4dd5a88a7826..c281fdbfd2d6 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_fwif.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
>> @@ -97,6 +97,7 @@ struct guc_update_exec_queue_policy {
>> #define GUC_WA_POLLCS BIT(18)
>> #define GUC_WA_RENDER_RST_RC6_EXIT BIT(19)
>> #define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
>> +#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
>> #define GUC_CTL_FEATURE 2
>> #define GUC_CTL_ENABLE_SLPC BIT(2)
>> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules
>> b/drivers/gpu/drm/xe/xe_wa_oob.rules
>> index e73b84e01ea1..b138cbd51bdb 100644
>> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
>> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
>> @@ -17,3 +17,8 @@
>> 14019821291 MEDIA_VERSION_RANGE(1300, 2000)
>> 14015076503 MEDIA_VERSION(1300)
>> 16020292621 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
>> +14018913170 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
>> + MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
>> + GRAPHICS_VERSION_RANGE(1270, 1274)
>> + MEDIA_VERSION(1300)
>> + PLATFORM(DG2)
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/xe/guc: Enable WA 14018913170
2024-01-16 9:55 Karthik Poosa
2024-01-16 11:27 ` Nilawar, Badal
@ 2024-01-16 11:37 ` Nilawar, Badal
2024-01-16 13:08 ` Poosa, Karthik
1 sibling, 1 reply; 13+ messages in thread
From: Nilawar, Badal @ 2024-01-16 11:37 UTC (permalink / raw)
To: Karthik Poosa, intel-xe; +Cc: matthew.d.roper
On 16-01-2024 15:25, Karthik Poosa wrote:
> The GuC handles the WA, the KMD just needs to set the flag to enable
> it on the appropriate platforms.
>
> v2: Fixed CI checkpatch warning, alignment should match open parenthesis.
>
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc.c | 13 +++++++++++++
> drivers/gpu/drm/xe/xe_guc_fwif.h | 1 +
> drivers/gpu/drm/xe/xe_wa_oob.rules | 5 +++++
> 3 files changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index 235d27b17ff9..5ecd9cd964de 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -132,10 +132,15 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
> return flags;
> }
>
> +#define GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
> +
> static u32 guc_ctl_wa_flags(struct xe_guc *guc)
> {
> struct xe_device *xe = guc_to_xe(guc);
> struct xe_gt *gt = guc_to_gt(guc);
> + struct xe_uc_fw *uc_fw = &guc->fw;
> + struct xe_uc_fw_version *version = &uc_fw->versions.found[XE_UC_FW_VER_COMPATIBILITY];
Why not XE_UC_FW_VER_RELEASE here?
> +
> u32 flags = 0;
>
> if (XE_WA(gt, 22012773006))
> @@ -165,6 +170,14 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
> if (XE_WA(gt, 1509372804))
> flags |= GUC_WA_RENDER_RST_RC6_EXIT;
>
> + if (XE_WA(gt, 14018913170)) {
> + if (GUC_VER(version->major, version->minor, version->patch) >= GUC_VER(70, 7, 0))
> + flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
> + else
> + drm_warn(&xe->drm, "can't apply WA 14018913170, GUC version expected >= 70.7.0, found %us %us %us\n",
> + version->major, version->minor, version->patch);
In bat results this warning is appearing even if guc firmware version is
> 70.7.0
Regards,
Badal
> + }
> +
> return flags;
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
> index 4dd5a88a7826..c281fdbfd2d6 100644
> --- a/drivers/gpu/drm/xe/xe_guc_fwif.h
> +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
> @@ -97,6 +97,7 @@ struct guc_update_exec_queue_policy {
> #define GUC_WA_POLLCS BIT(18)
> #define GUC_WA_RENDER_RST_RC6_EXIT BIT(19)
> #define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
> +#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
>
> #define GUC_CTL_FEATURE 2
> #define GUC_CTL_ENABLE_SLPC BIT(2)
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index e73b84e01ea1..b138cbd51bdb 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -17,3 +17,8 @@
> 14019821291 MEDIA_VERSION_RANGE(1300, 2000)
> 14015076503 MEDIA_VERSION(1300)
> 16020292621 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
> +14018913170 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
> + MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
> + GRAPHICS_VERSION_RANGE(1270, 1274)
> + MEDIA_VERSION(1300)
> + PLATFORM(DG2)
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/xe/guc: Enable WA 14018913170
2024-01-16 9:55 Karthik Poosa
@ 2024-01-16 11:27 ` Nilawar, Badal
2024-01-16 11:37 ` Nilawar, Badal
1 sibling, 0 replies; 13+ messages in thread
From: Nilawar, Badal @ 2024-01-16 11:27 UTC (permalink / raw)
To: Karthik Poosa, intel-xe; +Cc: matthew.d.roper
On 16-01-2024 15:25, Karthik Poosa wrote:
> The GuC handles the WA, the KMD just needs to set the flag to enable
> it on the appropriate platforms.
>
> v2: Fixed CI checkpatch warning, alignment should match open parenthesis.
>
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc.c | 13 +++++++++++++
> drivers/gpu/drm/xe/xe_guc_fwif.h | 1 +
> drivers/gpu/drm/xe/xe_wa_oob.rules | 5 +++++
> 3 files changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index 235d27b17ff9..5ecd9cd964de 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -132,10 +132,15 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
> return flags;
> }
>
> +#define GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
> +
> static u32 guc_ctl_wa_flags(struct xe_guc *guc)
> {
> struct xe_device *xe = guc_to_xe(guc);
> struct xe_gt *gt = guc_to_gt(guc);
> + struct xe_uc_fw *uc_fw = &guc->fw;
> + struct xe_uc_fw_version *version = &uc_fw->versions.found[XE_UC_FW_VER_COMPATIBILITY];
> +
> u32 flags = 0;
>
> if (XE_WA(gt, 22012773006))
> @@ -165,6 +170,14 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
> if (XE_WA(gt, 1509372804))
> flags |= GUC_WA_RENDER_RST_RC6_EXIT;
>
> + if (XE_WA(gt, 14018913170)) {
> + if (GUC_VER(version->major, version->minor, version->patch) >= GUC_VER(70, 7, 0))
> + flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
> + else
> + drm_warn(&xe->drm, "can't apply WA 14018913170, GUC version expected >= 70.7.0, found %us %us %us\n",
> + version->major, version->minor, version->patch);
> + }
> +
> return flags;
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
> index 4dd5a88a7826..c281fdbfd2d6 100644
> --- a/drivers/gpu/drm/xe/xe_guc_fwif.h
> +++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
> @@ -97,6 +97,7 @@ struct guc_update_exec_queue_policy {
> #define GUC_WA_POLLCS BIT(18)
> #define GUC_WA_RENDER_RST_RC6_EXIT BIT(19)
> #define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
> +#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
>
> #define GUC_CTL_FEATURE 2
> #define GUC_CTL_ENABLE_SLPC BIT(2)
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index e73b84e01ea1..b138cbd51bdb 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -17,3 +17,8 @@
> 14019821291 MEDIA_VERSION_RANGE(1300, 2000)
> 14015076503 MEDIA_VERSION(1300)
> 16020292621 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
> +14018913170 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
> + MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
> + GRAPHICS_VERSION_RANGE(1270, 1274)
> + MEDIA_VERSION(1300)
> + PLATFORM(DG2)
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH] drm/xe/guc: Enable WA 14018913170
@ 2024-01-16 9:55 Karthik Poosa
2024-01-16 11:27 ` Nilawar, Badal
2024-01-16 11:37 ` Nilawar, Badal
0 siblings, 2 replies; 13+ messages in thread
From: Karthik Poosa @ 2024-01-16 9:55 UTC (permalink / raw)
To: intel-xe; +Cc: Karthik Poosa, matthew.d.roper
The GuC handles the WA, the KMD just needs to set the flag to enable
it on the appropriate platforms.
v2: Fixed CI checkpatch warning, alignment should match open parenthesis.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
drivers/gpu/drm/xe/xe_guc.c | 13 +++++++++++++
drivers/gpu/drm/xe/xe_guc_fwif.h | 1 +
drivers/gpu/drm/xe/xe_wa_oob.rules | 5 +++++
3 files changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 235d27b17ff9..5ecd9cd964de 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -132,10 +132,15 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
return flags;
}
+#define GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
+
static u32 guc_ctl_wa_flags(struct xe_guc *guc)
{
struct xe_device *xe = guc_to_xe(guc);
struct xe_gt *gt = guc_to_gt(guc);
+ struct xe_uc_fw *uc_fw = &guc->fw;
+ struct xe_uc_fw_version *version = &uc_fw->versions.found[XE_UC_FW_VER_COMPATIBILITY];
+
u32 flags = 0;
if (XE_WA(gt, 22012773006))
@@ -165,6 +170,14 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
if (XE_WA(gt, 1509372804))
flags |= GUC_WA_RENDER_RST_RC6_EXIT;
+ if (XE_WA(gt, 14018913170)) {
+ if (GUC_VER(version->major, version->minor, version->patch) >= GUC_VER(70, 7, 0))
+ flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
+ else
+ drm_warn(&xe->drm, "can't apply WA 14018913170, GUC version expected >= 70.7.0, found %us %us %us\n",
+ version->major, version->minor, version->patch);
+ }
+
return flags;
}
diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
index 4dd5a88a7826..c281fdbfd2d6 100644
--- a/drivers/gpu/drm/xe/xe_guc_fwif.h
+++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
@@ -97,6 +97,7 @@ struct guc_update_exec_queue_policy {
#define GUC_WA_POLLCS BIT(18)
#define GUC_WA_RENDER_RST_RC6_EXIT BIT(19)
#define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
+#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
#define GUC_CTL_FEATURE 2
#define GUC_CTL_ENABLE_SLPC BIT(2)
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index e73b84e01ea1..b138cbd51bdb 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -17,3 +17,8 @@
14019821291 MEDIA_VERSION_RANGE(1300, 2000)
14015076503 MEDIA_VERSION(1300)
16020292621 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
+14018913170 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
+ MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
+ GRAPHICS_VERSION_RANGE(1270, 1274)
+ MEDIA_VERSION(1300)
+ PLATFORM(DG2)
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH] drm/xe/guc: Enable WA 14018913170
@ 2024-01-15 18:55 Karthik Poosa
0 siblings, 0 replies; 13+ messages in thread
From: Karthik Poosa @ 2024-01-15 18:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Karthik Poosa, matthew.d.roper
The GuC handles the WA, the KMD just needs to set the flag to enable
it on the appropriate platforms.
v2: Fixed CI checkpatch warning, alignment should match open parenthesis.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
drivers/gpu/drm/xe/xe_guc.c | 13 +++++++++++++
drivers/gpu/drm/xe/xe_guc_fwif.h | 1 +
drivers/gpu/drm/xe/xe_wa_oob.rules | 5 +++++
3 files changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 235d27b17ff9..6dab0c1a6070 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -132,10 +132,15 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
return flags;
}
+#define GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
+
static u32 guc_ctl_wa_flags(struct xe_guc *guc)
{
struct xe_device *xe = guc_to_xe(guc);
struct xe_gt *gt = guc_to_gt(guc);
+ struct xe_uc_fw *uc_fw = &guc->fw;
+ struct xe_uc_fw_version *version = &uc_fw->versions.found[XE_UC_FW_VER_COMPATIBILITY];
+
u32 flags = 0;
if (XE_WA(gt, 22012773006))
@@ -165,6 +170,14 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
if (XE_WA(gt, 1509372804))
flags |= GUC_WA_RENDER_RST_RC6_EXIT;
+ if (XE_WA(gt, 14018913170)) {
+ if (GUC_VER(version->major, version->minor, version->patch) >= GUC_VER(70, 7, 0))
+ flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
+ else
+ drm_warn(&xe->drm, "can't apply WA 14018913170, GUC version expected >= 70.7.0, found %us %us %us\n",
+ version->major, version->minor, version->patch);
+ }
+
return flags;
}
diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
index 4dd5a88a7826..c281fdbfd2d6 100644
--- a/drivers/gpu/drm/xe/xe_guc_fwif.h
+++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
@@ -97,6 +97,7 @@ struct guc_update_exec_queue_policy {
#define GUC_WA_POLLCS BIT(18)
#define GUC_WA_RENDER_RST_RC6_EXIT BIT(19)
#define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
+#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
#define GUC_CTL_FEATURE 2
#define GUC_CTL_ENABLE_SLPC BIT(2)
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index e73b84e01ea1..b138cbd51bdb 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -17,3 +17,8 @@
14019821291 MEDIA_VERSION_RANGE(1300, 2000)
14015076503 MEDIA_VERSION(1300)
16020292621 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
+14018913170 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
+ MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
+ GRAPHICS_VERSION_RANGE(1270, 1274)
+ MEDIA_VERSION(1300)
+ PLATFORM(DG2)
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH] drm/xe/guc: Enable WA 14018913170
@ 2024-01-15 16:06 Karthik Poosa
0 siblings, 0 replies; 13+ messages in thread
From: Karthik Poosa @ 2024-01-15 16:06 UTC (permalink / raw)
To: intel-gfx; +Cc: Karthik Poosa, matthew.d.roper
The GuC handles the WA, the KMD just needs to set the flag to enable
it on the appropriate platforms.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
drivers/gpu/drm/xe/xe_guc.c | 13 +++++++++++++
drivers/gpu/drm/xe/xe_guc_fwif.h | 1 +
drivers/gpu/drm/xe/xe_wa_oob.rules | 5 +++++
3 files changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 235d27b17ff9..9411bd9d4325 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -132,10 +132,15 @@ static u32 guc_ctl_ads_flags(struct xe_guc *guc)
return flags;
}
+#define GUC_VER(maj, min, pat) (((maj) << 16) | ((min) << 8) | (pat))
+
static u32 guc_ctl_wa_flags(struct xe_guc *guc)
{
struct xe_device *xe = guc_to_xe(guc);
struct xe_gt *gt = guc_to_gt(guc);
+ struct xe_uc_fw *uc_fw = &guc->fw;
+ struct xe_uc_fw_version *version = &uc_fw->versions.found[XE_UC_FW_VER_COMPATIBILITY];
+
u32 flags = 0;
if (XE_WA(gt, 22012773006))
@@ -165,6 +170,14 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
if (XE_WA(gt, 1509372804))
flags |= GUC_WA_RENDER_RST_RC6_EXIT;
+ if (XE_WA(gt, 14018913170)) {
+ if (GUC_VER(version->major, version->minor, version->patch) >= GUC_VER(70, 7, 0))
+ flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
+ else
+ drm_warn(&xe->drm, "can't apply WA 14018913170, GUC version expected >= 70.7.0, found %us %us %us\n",
+ version->major, version->minor, version->patch);
+ }
+
return flags;
}
diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
index 4dd5a88a7826..c281fdbfd2d6 100644
--- a/drivers/gpu/drm/xe/xe_guc_fwif.h
+++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
@@ -97,6 +97,7 @@ struct guc_update_exec_queue_policy {
#define GUC_WA_POLLCS BIT(18)
#define GUC_WA_RENDER_RST_RC6_EXIT BIT(19)
#define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21)
+#define GUC_WA_ENABLE_TSC_CHECK_ON_RC6 BIT(22)
#define GUC_CTL_FEATURE 2
#define GUC_CTL_ENABLE_SLPC BIT(2)
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index e73b84e01ea1..b138cbd51bdb 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -17,3 +17,8 @@
14019821291 MEDIA_VERSION_RANGE(1300, 2000)
14015076503 MEDIA_VERSION(1300)
16020292621 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
+14018913170 GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0)
+ MEDIA_VERSION(2000), GRAPHICS_STEP(A0, A1)
+ GRAPHICS_VERSION_RANGE(1270, 1274)
+ MEDIA_VERSION(1300)
+ PLATFORM(DG2)
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
end of thread, other threads:[~2024-01-24 4:42 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-01-16 7:48 [PATCH] drm/xe/guc: Enable WA 14018913170 Karthik Poosa
2024-01-16 8:45 ` ✗ Fi.CI.BAT: failure for drm/xe/guc: Enable WA 14018913170 (rev3) Patchwork
2024-01-16 8:48 ` [PATCH] drm/xe/guc: Enable WA 14018913170 Nilawar, Badal
-- strict thread matches above, loose matches on Subject: below --
2024-01-17 5:50 Karthik Poosa
2024-01-18 8:02 ` Nilawar, Badal
2024-01-24 4:41 ` Lucas De Marchi
2024-01-16 13:14 Karthik Poosa
2024-01-16 9:55 Karthik Poosa
2024-01-16 11:27 ` Nilawar, Badal
2024-01-16 11:37 ` Nilawar, Badal
2024-01-16 13:08 ` Poosa, Karthik
2024-01-15 18:55 Karthik Poosa
2024-01-15 16:06 Karthik Poosa
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