[PATCH 00/15] rockchip: rk3328: Update defconfigs, DTs and enable boot from SPI

[PATCH 00/15] rockchip: rk3328: Update defconfigs, DTs and enable boot from SPI

[Jonas Karlman]

This series contains miscellaneous updates to defconfigs, syncs latest
device trees from linux, fixes an issue loading FIT from SD-card when
running SPL from eMMC and enables building a bootable SPI image on
RK3328 boards.

I am also adding myself as a reviewer for the three RK3328 boards I own.

Patch 1-7 updates boards to enable similar Kconfig options and use a
common order for from where to try and load FIT.

Patch 8 fix loading FIT from SD-card when booting from eMMC by using
pinctrl for emmc and sdmmc in SPL.

Patch 9-10 makes rockchip gpio and rng driver compatible with linux.

Patch 11 sync latest rk3328 device tree files from linux v6.8-rc1.

Patch 12 reverts an old commit that added duplicated code.

Patch 13-15 enables building u-boot-rockchip-spi.bin for boards with
SPI flash.

This series depends on the "rockchip: Fix ethernet on Radxa ROCK Pi E
v1.21" series at [1].

[1] https://patchwork.ozlabs.org/cover/1887729/

Jonas Karlman (15):
  rockchip: rk3328: Update default u-boot,spl-boot-order prop
  rockchip: rk3328-evb: Update defconfig
  rockchip: rk3328-rock64: Update defconfig
  rockchip: rk3328-roc-cc: Update defconfig
  rockchip: rk3328-rock-pi-e: Update defconfig
  rockchip: rk3328-nanopi-r2: Update defconfig
  rockchip: rk3328-orangepi-r1-plus: Update defconfig
  rockchip: rk3328: Fix loading FIT from SD-card when booting from eMMC
  gpio: rockchip: Use gpio alias id as gpio bank id
  rng: rockchip: Use same compatible as linux
  rockchip: rk3328: Sync device tree from linux v6.8-rc1
  Revert "rockchip: Allow booting from SPI"
  rockchip: rk3328: Add support to build bootable SPI image
  rockchip: rk3328-rock64: Enable boot from SPI NOR flash
  rockchip: rk3328-orangepi-r1-plus: Enable boot from SPI NOR flash

 arch/arm/dts/rk3328-evb-u-boot.dtsi           |  4 +
 arch/arm/dts/rk3328-evb.dts                   |  1 +
 .../dts/rk3328-nanopi-r2c-plus-u-boot.dtsi    |  6 --
 arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi    | 28 ------
 arch/arm/dts/rk3328-nanopi-r2s.dts            |  3 +-
 .../rk3328-orangepi-r1-plus-lts-u-boot.dtsi   | 36 ++-----
 arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts  |  4 +-
 .../dts/rk3328-orangepi-r1-plus-u-boot.dtsi   | 36 ++-----
 arch/arm/dts/rk3328-orangepi-r1-plus.dts      |  1 +
 arch/arm/dts/rk3328-roc-cc-u-boot.dtsi        | 22 +----
 arch/arm/dts/rk3328-roc-cc.dts                |  3 +-
 arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi     | 17 ----
 arch/arm/dts/rk3328-rock-pi-e.dts             | 55 +++++++++++
 arch/arm/dts/rk3328-rock64-u-boot.dtsi        | 30 ++----
 arch/arm/dts/rk3328-rock64.dts                |  1 +
 arch/arm/dts/rk3328-u-boot.dtsi               | 99 +++++++++++++++----
 arch/arm/dts/rk3328.dtsi                      | 64 +++++++++---
 arch/arm/dts/rk3399-u-boot.dtsi               |  2 +-
 arch/arm/mach-rockchip/rk3328/rk3328.c        |  1 +
 arch/arm/mach-rockchip/spl-boot-order.c       |  3 -
 board/rockchip/evb_rk3328/MAINTAINERS         | 11 +++
 board/rockchip/evb_rk3328/README              | 70 -------------
 configs/evb-rk3328_defconfig                  | 16 ++-
 configs/nanopi-r2c-plus-rk3328_defconfig      | 11 ++-
 configs/nanopi-r2c-rk3328_defconfig           | 11 ++-
 configs/nanopi-r2s-rk3328_defconfig           | 11 ++-
 configs/orangepi-r1-plus-lts-rk3328_defconfig | 20 +++-
 configs/orangepi-r1-plus-rk3328_defconfig     | 20 +++-
 configs/roc-cc-rk3328_defconfig               |  9 +-
 configs/rock-pi-e-rk3328_defconfig            | 10 +-
 configs/rock64-rk3328_defconfig               | 15 ++-
 doc/board/rockchip/rockchip.rst               |  9 +-
 drivers/gpio/rk_gpio.c                        |  7 +-
 drivers/rng/rockchip_rng.c                    | 10 +-
 34 files changed, 351 insertions(+), 295 deletions(-)
 delete mode 100644 board/rockchip/evb_rk3328/README

-- 
2.43.0

[PATCH 01/15] rockchip: rk3328: Update default u-boot, spl-boot-order prop

[Jonas Karlman]

Change to use a common FIT load order, same-as-spl > SD-card > eMMC on
RK3328 boards. Only EVB and Radxa ROCK Pi E is affected by this change.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi      | 6 ------
 arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi           | 5 -----
 arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 5 -----
 arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi     | 5 -----
 arch/arm/dts/rk3328-roc-cc-u-boot.dtsi               | 5 +----
 arch/arm/dts/rk3328-rock64-u-boot.dtsi               | 5 +----
 arch/arm/dts/rk3328-u-boot.dtsi                      | 2 +-
 7 files changed, 3 insertions(+), 30 deletions(-)

diff --git a/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
index f8adb9e5e1ff..1dc3c022c504 100644
--- a/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
@@ -1,9 +1,3 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include "rk3328-nanopi-r2c-u-boot.dtsi"
-
-/ {
-	chosen {
-		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
-	};
-};
diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
index 78d37ab47558..d969b008775e 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
@@ -6,11 +6,6 @@
 
 #include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-ddr4-666.dtsi"
-/ {
-	chosen {
-		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
-	};
-};
 
 &gpio0 {
 	bootph-pre-ram;
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
index ebe33e48cb9c..5aaa5ccb15c1 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
@@ -6,11 +6,6 @@
 
 #include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-lpddr3-666.dtsi"
-/ {
-	chosen {
-		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
-	};
-};
 
 &gpio0 {
 	bootph-pre-ram;
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
index 637c70adf194..6d3db86dce6a 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
@@ -6,11 +6,6 @@
 
 #include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-ddr4-666.dtsi"
-/ {
-	chosen {
-		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
-	};
-};
 
 &gpio0 {
 	bootph-pre-ram;
diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
index 2062f34bf825..8bc2f134f8f4 100644
--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
@@ -5,11 +5,8 @@
 
 #include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-ddr4-666.dtsi"
-/ {
-	chosen {
-		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
-	};
 
+/ {
 	smbios {
 		compatible = "u-boot,sysinfo-smbios";
 
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 6904515b9693..bfe506fd2249 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -5,11 +5,8 @@
 
 #include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-lpddr3-1600.dtsi"
-/ {
-	chosen {
-		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
-	};
 
+/ {
 	smbios {
 		compatible = "u-boot,sysinfo-smbios";
 
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index a9f2536de2a2..a12be7876db0 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -13,7 +13,7 @@
 	};
 
 	chosen {
-		u-boot,spl-boot-order = &emmc, &sdmmc;
+		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
 	};
 
 	dmc: dmc {
-- 
2.43.0

[PATCH 02/15] rockchip: rk3328-evb: Update defconfig

[Jonas Karlman]

Update defconfig for rk3328-evb with new defaults.

Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Add MISC_INIT_R=y, ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y,
ethaddr and eth1addr is set based on cpuid read from eFUSE.

Remove pinctrl-0 and pinctrl-names from CONFIG_OF_SPL_REMOVE_PROPS,
SPL need to configure pinctrl for e.g. SD-card.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
ethernet PHYs.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Also add missing device tree files to MAINTAINERS and remove the
obsolete README file.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 board/rockchip/evb_rk3328/MAINTAINERS |  2 +
 board/rockchip/evb_rk3328/README      | 70 ---------------------------
 configs/evb-rk3328_defconfig          | 16 ++++--
 3 files changed, 13 insertions(+), 75 deletions(-)
 delete mode 100644 board/rockchip/evb_rk3328/README

diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index 5fc114a63f6c..dc750bd69426 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -4,6 +4,8 @@ S:      Maintained
 F:      board/rockchip/evb_rk3328
 F:      include/configs/evb_rk3328.h
 F:      configs/evb-rk3328_defconfig
+F:      arch/arm/dts/rk3328-evb.dts
+F:      arch/arm/dts/rk3328-evb-u-boot.dtsi
 
 NANOPI-R2C-RK3328
 M:      Tianling Shen <cnsztl@gmail.com>
diff --git a/board/rockchip/evb_rk3328/README b/board/rockchip/evb_rk3328/README
deleted file mode 100644
index 6cbb66a4cf87..000000000000
--- a/board/rockchip/evb_rk3328/README
+++ /dev/null
@@ -1,70 +0,0 @@
-Introduction
-============
-
-RK3328 key features we might use in U-Boot:
-* CPU: ARMv8 64bit quad-core Cortex-A53
-* IRAM: 36KB
-* DRAM: 4GB-16MB dual-channel
-* eMMC: support eMMC 5.0/5.1, suport HS400, HS200, DDR50
-* SD/MMC: support SD 3.0, MMC 4.51
-* USB: USB2.0 EHCI host port *2
-* Display: RGB/HDMI/DP/MIPI/EDP
-
-evb key features:
-* regulator: pwm regulator for CPU B/L
-* PMIC: rk808
-* debug console: UART2
-
-In order to support Arm Trust Firmware(ATF), we need to use the
-miniloader from rockchip which:
-* do DRAM init
-* load and verify ATF image
-* load and verify U-Boot image
-
-Here is the step-by-step to boot to U-Boot on rk3328.
-
-Get the Source and prebuild binary
-==================================
-
-  > mkdir ~/evb_rk3328
-  > cd ~/evb_rk3328
-  > git clone https://github.com/ARM-software/arm-trusted-firmware.git
-  > git clone https://github.com/rockchip-linux/rkbin
-  > git clone https://github.com/rockchip-linux/rkflashtool
-
-Compile ATF
-===============
-
-  > cd arm-trusted-firmware
-  > make realclean
-  > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3328 bl31
-
-Compile U-Boot
-==================
-
-  > cd ../u-boot
-  > make CROSS_COMPILE=aarch64-linux-gnu- evb-rk3328_defconfig all
-
-Compile rkflashtool
-=======================
-
-  > cd ../rkflashtool
-  > make
-
-Package image for miniloader
-================================
-  > cd ..
-  > cp arm-trusted-firmware/build/rk3328/release/bl31.bin rkbin/rk33
-  > ./rkbin/tools/trust_merger rkbin/tools/RK3328TRUST.ini
-  > ./rkbin/tools/loaderimage --pack --uboot u-boot/u-boot-dtb.bin uboot.img
-  > mkdir image
-  > mv trust.img ./image/
-  > mv uboot.img ./image/rk3328evb-uboot.bin
-
-Flash image
-===============
-Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
-
-  > ./rkflashtool/rkflashloader rk3328evb
-
-You should be able to get U-Boot log message in console/UART2 now.
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index b9c541a92a1f..995bfd0558b1 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -13,7 +13,6 @@ CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK_R_ADDR=0x4000000
 CONFIG_SPL_STACK=0x400000
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -25,10 +24,13 @@ CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-evb.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
 CONFIG_SPL_MAX_SIZE=0x40000
 CONFIG_SPL_PAD_TO=0x7f8000
 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -41,7 +43,6 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
-CONFIG_TPL_DRIVERS_MISC=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
@@ -50,13 +51,13 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -70,8 +71,12 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
@@ -86,9 +91,10 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_SYS_NS16550_MEM32=y
 CONFIG_SYSRESET=y
 # CONFIG_TPL_SYSRESET is not set
-- 
2.43.0

[PATCH 03/15] rockchip: rk3328-rock64: Update defconfig

[Jonas Karlman]

Update defconfig for rk3328-rock64 with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Remove the NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is set
based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY.

Also add missing device tree file to MAINTAINERS and add myself as a
reviewer for this board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 board/rockchip/evb_rk3328/MAINTAINERS | 2 ++
 configs/rock64-rk3328_defconfig       | 7 +++++--
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index dc750bd69426..419bc8ded375 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -47,8 +47,10 @@ F:      arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
 
 ROCK64-RK3328
 M:      Matwey V. Kornilov <matwey.kornilov@gmail.com>
+R:      Jonas Karlman <jonas@kwiboo.se>
 S:      Maintained
 F:      configs/rock64-rk3328_defconfig
+F:      arch/arm/dts/rk3328-rock64.dts
 F:      arch/arm/dts/rk3328-rock64-u-boot.dtsi
 
 ROCKPIE-RK3328
diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
index 0297d098761e..0157a1efe374 100644
--- a/configs/rock64-rk3328_defconfig
+++ b/configs/rock64-rk3328_defconfig
@@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_SPL_STACK=0x400000
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -76,6 +77,8 @@ CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-- 
2.43.0

[PATCH 04/15] rockchip: rk3328-roc-cc: Update defconfig

[Jonas Karlman]

Update defconfig for rk3328-roc-cc with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
ethernet PHYs.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Also add missing device tree file to MAINTAINERS and add myself as a
reviewer for this board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 board/rockchip/evb_rk3328/MAINTAINERS | 2 ++
 configs/roc-cc-rk3328_defconfig       | 9 +++++++--
 doc/board/rockchip/rockchip.rst       | 2 +-
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index 419bc8ded375..09488eaf083f 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -41,8 +41,10 @@ F:      arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
 ROC-RK3328-CC
 M:      Loic Devulder <ldevulder@suse.com>
 M:      Chen-Yu Tsai <wens@csie.org>
+R:      Jonas Karlman <jonas@kwiboo.se>
 S:      Maintained
 F:      configs/roc-cc-rk3328_defconfig
+F:      arch/arm/dts/rk3328-roc-cc.dts
 F:      arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
 
 ROCK64-RK3328
diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
index 4ac3c9403b02..7d81a715ef25 100644
--- a/configs/roc-cc-rk3328_defconfig
+++ b/configs/roc-cc-rk3328_defconfig
@@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_SPL_STACK=0x400000
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-roc-cc.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -58,8 +59,8 @@ CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -73,9 +74,11 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
@@ -95,6 +98,8 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550_MEM32=y
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index de2195deadca..99f48b6d6fa5 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -60,8 +60,8 @@ List of mainline supported Rockchip boards:
      - ODROID-GO Advance (odroid-go2)
 * rk3328
      - Rockchip Evb-RK3328 (evb-rk3328)
+     - Firefly ROC-RK3328-CC (roc-cc-rk3328)
      - Pine64 Rock64 (rock64-rk3328)
-     - Firefly-RK3328 (roc-cc-rk3328)
      - Radxa Rockpi E (rock-pi-e-rk3328)
 * rk3368
      - GeekBox (geekbox)
-- 
2.43.0

[PATCH 05/15] rockchip: rk3328-rock-pi-e: Update defconfig

[Jonas Karlman]

Update defconfig for rk3328-rock-pi-e with new defaults.

Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Also add myself as a reviewer for this board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 board/rockchip/evb_rk3328/MAINTAINERS |  1 +
 configs/rock-pi-e-rk3328_defconfig    | 10 ++++++----
 doc/board/rockchip/rockchip.rst       |  2 +-
 3 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index 09488eaf083f..47fd05d2ea8b 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -57,6 +57,7 @@ F:      arch/arm/dts/rk3328-rock64-u-boot.dtsi
 
 ROCKPIE-RK3328
 M:      Banglang Huang <banglang.huang@foxmail.com>
+R:      Jonas Karlman <jonas@kwiboo.se>
 S:      Maintained
 F:      configs/rock-pi-e-rk3328_defconfig
 F:      arch/arm/dts/rk3328-rock-pi-e.dts
diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig
index 6dda900a9b42..ddd482dd0195 100644
--- a/configs/rock-pi-e-rk3328_defconfig
+++ b/configs/rock-pi-e-rk3328_defconfig
@@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK_R_ADDR=0x4000000
 CONFIG_SPL_STACK=0x400000
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -27,7 +26,9 @@ CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -46,7 +47,6 @@ CONFIG_SPL_POWER=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
-CONFIG_TPL_DRIVERS_MISC=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
@@ -59,8 +59,8 @@ CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -74,6 +74,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY_REALTEK=y
@@ -95,9 +96,10 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_SYS_NS16550_MEM32=y
 CONFIG_SYSINFO=y
 CONFIG_SYSINFO_SMBIOS=y
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 99f48b6d6fa5..b71fa375b2bf 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -62,7 +62,7 @@ List of mainline supported Rockchip boards:
      - Rockchip Evb-RK3328 (evb-rk3328)
      - Firefly ROC-RK3328-CC (roc-cc-rk3328)
      - Pine64 Rock64 (rock64-rk3328)
-     - Radxa Rockpi E (rock-pi-e-rk3328)
+     - Radxa ROCK Pi E (rock-pi-e-rk3328)
 * rk3368
      - GeekBox (geekbox)
      - PX5 EVB (evb-px5)
-- 
2.43.0

[PATCH 06/15] rockchip: rk3328-nanopi-r2: Update defconfig

[Jonas Karlman]

Update defconfig for rk3328-nanopi-r2* boards with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove &gmac2io to
support reset of onboard ethernet PHYs.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Also add missing device tree files to MAINTAINERS file.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi |  6 ------
 board/rockchip/evb_rk3328/MAINTAINERS      |  2 ++
 configs/nanopi-r2c-plus-rk3328_defconfig   | 11 +++++++++--
 configs/nanopi-r2c-rk3328_defconfig        | 11 +++++++++--
 configs/nanopi-r2s-rk3328_defconfig        | 11 +++++++++--
 doc/board/rockchip/rockchip.rst            |  3 +++
 6 files changed, 32 insertions(+), 12 deletions(-)

diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
index d969b008775e..0a1152e8b52d 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
@@ -27,9 +27,3 @@
 &vcc_sd {
 	bootph-pre-ram;
 };
-
-&gmac2io {
-	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	snps,reset-delays-us = <0 10000 50000>;
-};
diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index 47fd05d2ea8b..b88727acad26 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -11,12 +11,14 @@ NANOPI-R2C-RK3328
 M:      Tianling Shen <cnsztl@gmail.com>
 S:      Maintained
 F:      configs/nanopi-r2c-rk3328_defconfig
+F:      arch/arm/dts/rk3328-nanopi-r2c.dts
 F:      arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi
 
 NANOPI-R2C-PLUS-RK3328
 M:      Tianling Shen <cnsztl@gmail.com>
 S:      Maintained
 F:      configs/nanopi-r2c-plus-rk3328_defconfig
+F:      arch/arm/dts/rk3328-nanopi-r2c-plus.dts
 F:      arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
 
 NANOPI-R2S-RK3328
diff --git a/configs/nanopi-r2c-plus-rk3328_defconfig b/configs/nanopi-r2c-plus-rk3328_defconfig
index 320ed8b434a8..1cb0ed855398 100644
--- a/configs/nanopi-r2c-plus-rk3328_defconfig
+++ b/configs/nanopi-r2c-plus-rk3328_defconfig
@@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_SPL_STACK=0x400000
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c-plus.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -72,8 +73,12 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
@@ -91,6 +96,8 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/nanopi-r2c-rk3328_defconfig b/configs/nanopi-r2c-rk3328_defconfig
index 583179d7c548..59801328deda 100644
--- a/configs/nanopi-r2c-rk3328_defconfig
+++ b/configs/nanopi-r2c-rk3328_defconfig
@@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_SPL_STACK=0x400000
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -72,8 +73,12 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
@@ -91,6 +96,8 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig
index f7ed71e41228..61914b1650d2 100644
--- a/configs/nanopi-r2s-rk3328_defconfig
+++ b/configs/nanopi-r2s-rk3328_defconfig
@@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_SPL_STACK=0x400000
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -72,8 +73,12 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
@@ -91,6 +96,8 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550_MEM32=y
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index b71fa375b2bf..77360e0ff155 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -61,6 +61,9 @@ List of mainline supported Rockchip boards:
 * rk3328
      - Rockchip Evb-RK3328 (evb-rk3328)
      - Firefly ROC-RK3328-CC (roc-cc-rk3328)
+     - FriendlyElec NanoPi R2C (nanopi-r2c-rk3328)
+     - FriendlyElec NanoPi R2C Plus (nanopi-r2c-plus-rk3328)
+     - FriendlyElec NanoPi R2S (nanopi-r2s-rk3328)
      - Pine64 Rock64 (rock64-rk3328)
      - Radxa ROCK Pi E (rock-pi-e-rk3328)
 * rk3368
-- 
2.43.0

[PATCH 07/15] rockchip: rk3328-orangepi-r1-plus: Update defconfig

[Jonas Karlman]

Update defconfig for rk3328-orangepi-r1-plus boards with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove &gmac2io to
support reset of onboard ethernet PHYs.

Add PHY_ROCKCHIP_INNO_USB2=y option to support the onboard USB PHY.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Also add missing device tree files to MAINTAINERS file.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi |  6 ------
 arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi     |  6 ------
 board/rockchip/evb_rk3328/MAINTAINERS                |  2 ++
 configs/orangepi-r1-plus-lts-rk3328_defconfig        | 12 ++++++++++--
 configs/orangepi-r1-plus-rk3328_defconfig            | 12 ++++++++++--
 doc/board/rockchip/rockchip.rst                      |  2 ++
 6 files changed, 24 insertions(+), 16 deletions(-)

diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
index 5aaa5ccb15c1..8a4189c6f1cc 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
@@ -28,12 +28,6 @@
 	bootph-pre-ram;
 };
 
-&gmac2io {
-	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	snps,reset-delays-us = <0 10000 50000>;
-};
-
 &spi0 {
 	spi_flash: spiflash@0 {
 		bootph-all;
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
index 6d3db86dce6a..2e3b6a77a268 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
@@ -28,12 +28,6 @@
 	bootph-pre-ram;
 };
 
-&gmac2io {
-	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	snps,reset-delays-us = <0 10000 50000>;
-};
-
 &spi0 {
 	spi_flash: spiflash@0 {
 		bootph-all;
diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index b88727acad26..675b72dd060c 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -32,12 +32,14 @@ ORANGEPI-R1-PLUS-RK3328
 M:      Tianling Shen <cnsztl@gmail.com>
 S:      Maintained
 F:      configs/orangepi-r1-plus-rk3328_defconfig
+F:      arch/arm/dts/rk3328-orangepi-r1-plus.dts
 F:      arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
 
 ORANGEPI-R1-PLUS-LTS-RK3328
 M:      Tianling Shen <cnsztl@gmail.com>
 S:      Maintained
 F:      configs/orangepi-r1-plus-lts-rk3328_defconfig
+F:      arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
 F:      arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
 
 ROC-RK3328-CC
diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig
index d3d9417509e9..937ef003d85b 100644
--- a/configs/orangepi-r1-plus-lts-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
@@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_SPL_STACK=0x400000
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -72,11 +73,16 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
@@ -91,6 +97,8 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/orangepi-r1-plus-rk3328_defconfig b/configs/orangepi-r1-plus-rk3328_defconfig
index 9356e87132e7..563a1ac6ecd4 100644
--- a/configs/orangepi-r1-plus-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-rk3328_defconfig
@@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_SPL_STACK=0x400000
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -72,11 +73,16 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
@@ -91,6 +97,8 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550_MEM32=y
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 77360e0ff155..f65381cc7b0b 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -66,6 +66,8 @@ List of mainline supported Rockchip boards:
      - FriendlyElec NanoPi R2S (nanopi-r2s-rk3328)
      - Pine64 Rock64 (rock64-rk3328)
      - Radxa ROCK Pi E (rock-pi-e-rk3328)
+     - Xunlong Orange Pi R1 Plus (orangepi-r1-plus-rk3328)
+     - Xunlong Orange Pi R1 Plus LTS (orangepi-r1-plus-lts-rk3328)
 * rk3368
      - GeekBox (geekbox)
      - PX5 EVB (evb-px5)
-- 
2.43.0

[PATCH 08/15] rockchip: rk3328: Fix loading FIT from SD-card when booting from eMMC

[Jonas Karlman]

When RK3328 boards run SPL from eMMC and fail to load FIT from eMMC due
to it being missing or checksum validation fails there is a fallback to
read FIT from SD-card. However, without proper pinctrl configuration
reading FIT from SD-card will fail:

  U-Boot SPL 2024.04-rc1 (Feb 05 2024 - 22:18:22 +0000)
  Trying to boot from MMC1
  mmc_load_image_raw_sector: mmc block read error
  Trying to boot from MMC2
  Card did not respond to voltage select! : -110
  spl: mmc init failed with error: -95
  Trying to boot from MMC1
  mmc_load_image_raw_sector: mmc block read error
  SPL: failed to boot from all boot devices
  ### ERROR ### Please RESET the board ###

Fix this by tagging related emmc and sdmmc pinctrl nodes with bootph
props. Also sort and move common nodes shared by all boards to the SoC
u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/dts/rk3328-evb-u-boot.dtsi           |  4 +
 arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi    | 17 ----
 .../rk3328-orangepi-r1-plus-lts-u-boot.dtsi   | 25 ++----
 .../dts/rk3328-orangepi-r1-plus-u-boot.dtsi   | 25 ++----
 arch/arm/dts/rk3328-roc-cc-u-boot.dtsi        | 17 ----
 arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi     | 17 ----
 arch/arm/dts/rk3328-rock64-u-boot.dtsi        | 25 ++----
 arch/arm/dts/rk3328-u-boot.dtsi               | 82 ++++++++++++++++---
 8 files changed, 92 insertions(+), 120 deletions(-)

diff --git a/arch/arm/dts/rk3328-evb-u-boot.dtsi b/arch/arm/dts/rk3328-evb-u-boot.dtsi
index 12b68df1ac67..38ad3cc16d09 100644
--- a/arch/arm/dts/rk3328-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-evb-u-boot.dtsi
@@ -44,3 +44,7 @@
 	/* Integrated PHY unsupported by U-Boot */
 	status = "broken";
 };
+
+&vcc_sd {
+	bootph-pre-ram;
+};
diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
index 0a1152e8b52d..0ffac0e6f930 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
@@ -7,23 +7,6 @@
 #include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-ddr4-666.dtsi"
 
-&gpio0 {
-	bootph-pre-ram;
-};
-
-&pinctrl {
-	bootph-pre-ram;
-};
-
-&sdmmc0m1_pin {
-	bootph-pre-ram;
-};
-
-&pcfg_pull_up_4ma {
-	bootph-pre-ram;
-};
-
-/* Need this and all the pinctrl/gpio stuff above to set pinmux */
 &vcc_sd {
 	bootph-pre-ram;
 };
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
index 8a4189c6f1cc..7cdf6913795d 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
@@ -7,29 +7,16 @@
 #include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-lpddr3-666.dtsi"
 
-&gpio0 {
-	bootph-pre-ram;
-};
-
-&pinctrl {
-	bootph-pre-ram;
-};
-
-&sdmmc0m1_pin {
+&spi0 {
 	bootph-pre-ram;
-};
+	bootph-some-ram;
 
-&pcfg_pull_up_4ma {
-	bootph-pre-ram;
+	flash@0 {
+		bootph-pre-ram;
+		bootph-some-ram;
+	};
 };
 
-/* Need this and all the pinctrl/gpio stuff above to set pinmux */
 &vcc_sd {
 	bootph-pre-ram;
 };
-
-&spi0 {
-	spi_flash: spiflash@0 {
-		bootph-all;
-	};
-};
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
index 2e3b6a77a268..35baeb2464bc 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
@@ -7,29 +7,16 @@
 #include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-ddr4-666.dtsi"
 
-&gpio0 {
-	bootph-pre-ram;
-};
-
-&pinctrl {
-	bootph-pre-ram;
-};
-
-&sdmmc0m1_pin {
+&spi0 {
 	bootph-pre-ram;
-};
+	bootph-some-ram;
 
-&pcfg_pull_up_4ma {
-	bootph-pre-ram;
+	flash@0 {
+		bootph-pre-ram;
+		bootph-some-ram;
+	};
 };
 
-/* Need this and all the pinctrl/gpio stuff above to set pinmux */
 &vcc_sd {
 	bootph-pre-ram;
 };
-
-&spi0 {
-	spi_flash: spiflash@0 {
-		bootph-all;
-	};
-};
diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
index 8bc2f134f8f4..47d74964fd0c 100644
--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
@@ -29,23 +29,6 @@
 	};
 };
 
-&gpio0 {
-	bootph-pre-ram;
-};
-
-&pinctrl {
-	bootph-pre-ram;
-};
-
-&sdmmc0m1_pin {
-	bootph-pre-ram;
-};
-
-&pcfg_pull_up_4ma {
-	bootph-pre-ram;
-};
-
-/* Need this and all the pinctrl/gpio stuff above to set pinmux */
 &vcc_sd {
 	bootph-pre-ram;
 };
diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
index 1f220c6dcd0f..9ed0aef1ecc9 100644
--- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
@@ -29,23 +29,6 @@
 	};
 };
 
-&gpio0 {
-	bootph-pre-ram;
-};
-
-&pinctrl {
-	bootph-pre-ram;
-};
-
-&sdmmc0m1_pin {
-	bootph-pre-ram;
-};
-
-&pcfg_pull_up_4ma {
-	bootph-pre-ram;
-};
-
-/* Need this and all the pinctrl/gpio stuff above to set pinmux */
 &vcc_sd {
 	bootph-pre-ram;
 };
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index bfe506fd2249..9de645d8d7ab 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -29,29 +29,16 @@
 	};
 };
 
-&gpio0 {
-	bootph-pre-ram;
-};
-
-&pinctrl {
-	bootph-pre-ram;
-};
-
-&sdmmc0m1_pin {
+&spi0 {
 	bootph-pre-ram;
-};
+	bootph-some-ram;
 
-&pcfg_pull_up_4ma {
-	bootph-pre-ram;
+	flash@0 {
+		bootph-pre-ram;
+		bootph-some-ram;
+	};
 };
 
-/* Need this and all the pinctrl/gpio stuff above to set pinmux */
 &vcc_sd {
 	bootph-pre-ram;
 };
-
-&spi0 {
-	spi_flash: flash@0 {
-		bootph-all;
-	};
-};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index a12be7876db0..e087b02893c1 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -38,33 +38,91 @@
 	bootph-all;
 };
 
+&emmc {
+	bootph-pre-ram;
+	bootph-some-ram;
+
+	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
+	u-boot,spl-fifo-mode;
+};
+
+&emmc_bus8 {
+	bootph-pre-ram;
+};
+
+&emmc_clk {
+	bootph-pre-ram;
+};
+
+&emmc_cmd {
+	bootph-pre-ram;
+};
+
+&gpio0 {
+	bootph-pre-ram;
+};
+
 &grf {
 	bootph-all;
 };
 
-&uart2 {
-	bootph-all;
-	clock-frequency = <24000000>;
+&pcfg_pull_none_8ma {
+	bootph-pre-ram;
 };
 
-&emmc {
-	bootph-all;
+&pcfg_pull_none_12ma {
+	bootph-pre-ram;
+};
 
-	/* mmc to sram can't do dma, prevent aborts transfering TF-A parts */
-	u-boot,spl-fifo-mode;
+&pcfg_pull_up_4ma {
+	bootph-pre-ram;
+};
+
+&pcfg_pull_up_8ma {
+	bootph-pre-ram;
+};
+
+&pcfg_pull_up_12ma {
+	bootph-pre-ram;
+};
+
+&pinctrl {
+	bootph-pre-ram;
 };
 
 &sdmmc {
-	bootph-all;
+	bootph-pre-ram;
+	bootph-some-ram;
 
-	/* mmc to sram can't do dma, prevent aborts transfering TF-A parts */
+	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
 	u-boot,spl-fifo-mode;
 };
 
-&usb20_otg {
-	hnp-srp-disable;
+&sdmmc0_bus4 {
+	bootph-pre-ram;
+};
+
+&sdmmc0_clk {
+	bootph-pre-ram;
+};
+
+&sdmmc0_cmd {
+	bootph-pre-ram;
 };
 
-&spi0 {
+&sdmmc0_dectn {
+	bootph-pre-ram;
+};
+
+&sdmmc0m1_pin {
+	bootph-pre-ram;
+};
+
+&uart2 {
 	bootph-all;
+	clock-frequency = <24000000>;
+};
+
+&usb20_otg {
+	hnp-srp-disable;
 };
-- 
2.43.0

[PATCH 09/15] gpio: rockchip: Use gpio alias id as gpio bank id

[Jonas Karlman]

The U-Boot driver try to base the gpio bank id on the gpio-ranges prop
and fall back to base the bank id on the node name. However, the linux
driver try to base the bank id on the gpio alias id and fall back on
node order.

This can cause issues when SoC DT is synced from linux and gpioX@ nodes
has been renamed to gpio@ and gpio-ranges or a SoC specific alias has
not been assigned.

Try to use the gpio alias id as first fallback when a gpio-ranges prop
is missing to ease sync of updated SoC DT. Keep the current fallback on
node name as a third fallback to not affect any existing unsynced DT.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 drivers/gpio/rk_gpio.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index 4a6ae554bf78..24fedd456353 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -201,8 +201,11 @@ static int rockchip_gpio_probe(struct udevice *dev)
 		priv->bank = args.args[1] / ROCKCHIP_GPIOS_PER_BANK;
 	} else {
 		uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK;
-		end = strrchr(dev->name, '@');
-		priv->bank = trailing_strtoln(dev->name, end);
+		ret = dev_read_alias_seq(dev, &priv->bank);
+		if (ret) {
+			end = strrchr(dev->name, '@');
+			priv->bank = trailing_strtoln(dev->name, end);
+		}
 	}
 
 	priv->name[0] = 'A' + priv->bank;
-- 
2.43.0

[PATCH 10/15] rng: rockchip: Use same compatible as linux

[Jonas Karlman]

Replace the rockchip,cryptov1-rng compatible with compatibles used in
the linux device tree for RK3288, RK3328 and RK3399 to ease sync of SoC
device tree from linux.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/dts/rk3328-u-boot.dtsi |  2 +-
 arch/arm/dts/rk3399-u-boot.dtsi |  2 +-
 drivers/rng/rockchip_rng.c      | 10 +++++++++-
 3 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index e087b02893c1..d805c2f394f8 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -28,7 +28,7 @@
 	};
 
 	rng: rng@ff060000 {
-		compatible = "rockchip,cryptov1-rng";
+		compatible = "rockchip,rk3328-crypto";
 		reg = <0x0 0xff060000 0x0 0x4000>;
 		status = "okay";
 	};
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 3423b882c437..87b173e59579 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -30,7 +30,7 @@
 	};
 
 	rng: rng@ff8b8000 {
-		compatible = "rockchip,cryptov1-rng";
+		compatible = "rockchip,rk3399-crypto";
 		reg = <0x0 0xff8b8000 0x0 0x1000>;
 		status = "okay";
 	};
diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c
index 705b424cf3dd..e82b5572fec5 100644
--- a/drivers/rng/rockchip_rng.c
+++ b/drivers/rng/rockchip_rng.c
@@ -302,7 +302,15 @@ static const struct dm_rng_ops rockchip_rng_ops = {
 
 static const struct udevice_id rockchip_rng_match[] = {
 	{
-		.compatible = "rockchip,cryptov1-rng",
+		.compatible = "rockchip,rk3288-crypto",
+		.data = (ulong)&rk_cryptov1_soc_data,
+	},
+	{
+		.compatible = "rockchip,rk3328-crypto",
+		.data = (ulong)&rk_cryptov1_soc_data,
+	},
+	{
+		.compatible = "rockchip,rk3399-crypto",
 		.data = (ulong)&rk_cryptov1_soc_data,
 	},
 	{
-- 
2.43.0

[PATCH 11/15] rockchip: rk3328: Sync device tree from linux v6.8-rc1

[Jonas Karlman]

Sync rk3328 device tree from linux v6.8-rc1.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/dts/rk3328-evb.dts                  |  1 +
 arch/arm/dts/rk3328-nanopi-r2s.dts           |  3 +-
 arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts |  4 +-
 arch/arm/dts/rk3328-orangepi-r1-plus.dts     |  1 +
 arch/arm/dts/rk3328-roc-cc.dts               |  3 +-
 arch/arm/dts/rk3328-rock-pi-e.dts            | 55 +++++++++++++++++
 arch/arm/dts/rk3328-rock64.dts               |  1 +
 arch/arm/dts/rk3328-u-boot.dtsi              |  6 --
 arch/arm/dts/rk3328.dtsi                     | 64 +++++++++++++++-----
 9 files changed, 112 insertions(+), 26 deletions(-)

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index ff6b466e0e07..1eef5504445f 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -11,6 +11,7 @@
 	compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
 
 	aliases {
+		ethernet0 = &gmac2phy;
 		mmc0 = &sdmmc;
 		mmc1 = &sdio;
 		mmc2 = &emmc;
diff --git a/arch/arm/dts/rk3328-nanopi-r2s.dts b/arch/arm/dts/rk3328-nanopi-r2s.dts
index 3857d487ab84..a4399da7d8b1 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s.dts
+++ b/arch/arm/dts/rk3328-nanopi-r2s.dts
@@ -14,6 +14,7 @@
 	compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
 
 	aliases {
+		ethernet0 = &gmac2io;
 		ethernet1 = &rtl8153;
 		mmc0 = &sdmmc;
 	};
@@ -34,7 +35,7 @@
 		pinctrl-0 = <&reset_button_pin>;
 		pinctrl-names = "default";
 
-		reset {
+		key-reset {
 			label = "reset";
 			gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
 			linux,code = <KEY_RESTART>;
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
index 5d7d567283e5..4237f2ee8fee 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
@@ -26,9 +26,11 @@
 			compatible = "ethernet-phy-ieee802.3-c22";
 			reg = <0>;
 
+			motorcomm,auto-sleep-disabled;
 			motorcomm,clk-out-frequency-hz = <125000000>;
 			motorcomm,keep-pll-enabled;
-			motorcomm,auto-sleep-disabled;
+			motorcomm,rx-clk-drv-microamp = <5020>;
+			motorcomm,rx-data-drv-microamp = <5020>;
 
 			pinctrl-0 = <&eth_phy_reset_pin>;
 			pinctrl-names = "default";
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus.dts b/arch/arm/dts/rk3328-orangepi-r1-plus.dts
index dc83d74045a3..f20662929c77 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus.dts
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus.dts
@@ -15,6 +15,7 @@
 	compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";
 
 	aliases {
+		ethernet0 = &gmac2io;
 		ethernet1 = &rtl8153;
 		mmc0 = &sdmmc;
 	};
diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts
index aa22a0c22265..414897a57e75 100644
--- a/arch/arm/dts/rk3328-roc-cc.dts
+++ b/arch/arm/dts/rk3328-roc-cc.dts
@@ -11,6 +11,7 @@
 	compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";
 
 	aliases {
+		ethernet0 = &gmac2io;
 		mmc0 = &sdmmc;
 		mmc1 = &emmc;
 	};
@@ -96,7 +97,6 @@
 			linux,default-trigger = "heartbeat";
 			gpios = <&rk805 1 GPIO_ACTIVE_LOW>;
 			default-state = "on";
-			mode = <0x23>;
 		};
 
 		user_led: led-1 {
@@ -104,7 +104,6 @@
 			linux,default-trigger = "mmc1";
 			gpios = <&rk805 0 GPIO_ACTIVE_LOW>;
 			default-state = "off";
-			mode = <0x05>;
 		};
 	};
 };
diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts
index 018a3a5075c7..3cda6c627b68 100644
--- a/arch/arm/dts/rk3328-rock-pi-e.dts
+++ b/arch/arm/dts/rk3328-rock-pi-e.dts
@@ -21,6 +21,8 @@
 	compatible = "radxa,rockpi-e", "rockchip,rk3328";
 
 	aliases {
+		ethernet0 = &gmac2io;
+		ethernet1 = &gmac2phy;
 		mmc0 = &sdmmc;
 		mmc1 = &emmc;
 	};
@@ -180,6 +182,59 @@
 	status = "okay";
 };
 
+&gpio0 {
+	gpio-line-names =
+		/* GPIO0_A0 - A7 */
+		"", "", "", "", "", "", "", "",
+		/* GPIO0_B0 - B7 */
+		"", "", "", "", "", "", "", "",
+		/* GPIO0_C0 - C7 */
+		"", "", "", "", "", "", "", "",
+		/* GPIO0_D0 - D7 */
+		"", "", "", "pin-15 [GPIO0_D3]", "", "", "", "";
+};
+
+&gpio1 {
+	gpio-line-names =
+		/* GPIO1_A0 - A7 */
+		"", "", "", "", "", "", "", "",
+		/* GPIO1_B0 - B7 */
+		"", "", "", "", "", "", "", "",
+		/* GPIO1_C0 - C7 */
+		"", "", "", "", "", "", "", "",
+		/* GPIO1_D0 - D7 */
+		"", "", "", "", "pin-07 [GPIO1_D4]", "", "", "";
+};
+
+&gpio2 {
+	gpio-line-names =
+		/* GPIO2_A0 - A7 */
+		"pin-08 [GPIO2_A0]", "pin-10 [GPIO2_A1]", "pin-11 [GPIO2_A2]",
+		"pin-13 [GPIO2-A3]", "pin-27 [GPIO2_A4]", "pin-28 [GPIO2_A5]",
+		"pin-33 [GPIO2_A6]", "",
+		/* GPIO2_B0 - B7 */
+		"", "", "", "", "pin-26 [GPIO2_B4]", "", "", "pin-36 [GPIO2_B7]",
+		/* GPIO2_C0 - C7 */
+		"pin-32 [GPIO2_C0]", "pin-35 [GPIO2_C1]", "pin-12 [GPIO2_C2]",
+		"pin-38 [GPIO2_C3]", "pin-29 [GPIO2_C4]", "pin-31 [GPIO2_C5]",
+		"pin-37 [GPIO2_C6]", "pin-40 [GPIO2_C7]",
+		/* GPIO2_D0 - D7 */
+		"", "", "", "", "", "", "", "";
+};
+
+&gpio3 {
+	gpio-line-names =
+		/* GPIO3_A0 - A7 */
+		"pin-23 [GPIO3_A0]", "pin-19 [GPIO3_A1]", "pin-21 [GPIO3_A2]",
+		"", "pin-03 [GPIO3_A4]", "", "pin-05 [GPIO3_A6]", "",
+		/* GPIO3_B0 - B7 */
+		"pin-24 [GPIO3_B0]", "", "", "", "", "", "", "",
+		/* GPIO3_C0 - C7 */
+		"", "", "", "", "", "", "", "",
+		/* GPIO3_D0 - D7 */
+		"", "", "", "", "", "", "", "";
+};
+
 &i2c1 {
 	status = "okay";
 
diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts
index 0a27fa5271f5..229fe9da9c2d 100644
--- a/arch/arm/dts/rk3328-rock64.dts
+++ b/arch/arm/dts/rk3328-rock64.dts
@@ -11,6 +11,7 @@
 	compatible = "pine64,rock64", "rockchip,rk3328";
 
 	aliases {
+		ethernet0 = &gmac2io;
 		mmc0 = &sdmmc;
 		mmc1 = &emmc;
 	};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index d805c2f394f8..b90d78878d77 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -26,12 +26,6 @@
 		       0x0 0xff720000 0x0 0x1000
 		       0x0 0xff798000 0x0 0x1000>;
 	};
-
-	rng: rng@ff060000 {
-		compatible = "rockchip,rk3328-crypto";
-		reg = <0x0 0xff060000 0x0 0x4000>;
-		status = "okay";
-	};
 };
 
 &cru {
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index e8d8f00be8aa..fe81b97bbe78 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -20,6 +20,10 @@
 	#size-cells = <2>;
 
 	aliases {
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+		gpio2 = &gpio2;
+		gpio3 = &gpio3;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
@@ -27,8 +31,6 @@
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
-		ethernet0 = &gmac2io;
-		ethernet1 = &gmac2phy;
 	};
 
 	cpus {
@@ -102,10 +104,12 @@
 
 		l2: l2-cache0 {
 			compatible = "cache";
+			cache-level = <2>;
+			cache-unified;
 		};
 	};
 
-	cpu0_opp_table: opp_table0 {
+	cpu0_opp_table: opp-table-0 {
 		compatible = "operating-points-v2";
 		opp-shared;
 
@@ -306,6 +310,10 @@
 			};
 			power-domain@RK3328_PD_VIDEO {
 				reg = <RK3328_PD_VIDEO>;
+				clocks = <&cru ACLK_RKVDEC>,
+					 <&cru HCLK_RKVDEC>,
+					 <&cru SCLK_VDEC_CABAC>,
+					 <&cru SCLK_VDEC_CORE>;
 				#power-domain-cells = <0>;
 			};
 			power-domain@RK3328_PD_VPU {
@@ -489,7 +497,7 @@
 		status = "disabled";
 	};
 
-	dmac: dmac@ff1f0000 {
+	dmac: dma-controller@ff1f0000 {
 		compatible = "arm,pl330", "arm,primecell";
 		reg = <0x0 0xff1f0000 0x0 0x4000>;
 		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
@@ -599,7 +607,7 @@
 
 	gpu: gpu@ff300000 {
 		compatible = "rockchip,rk3328-mali", "arm,mali-450";
-		reg = <0x0 0xff300000 0x0 0x40000>;
+		reg = <0x0 0xff300000 0x0 0x30000>;
 		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
@@ -623,7 +631,6 @@
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff330200 0 0x100>;
 		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "h265e_mmu";
 		clocks = <&cru ACLK_H265>, <&cru PCLK_H265>;
 		clock-names = "aclk", "iface";
 		#iommu-cells = <0>;
@@ -634,7 +641,6 @@
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff340800 0x0 0x40>;
 		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "vepu_mmu";
 		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
 		clock-names = "aclk", "iface";
 		#iommu-cells = <0>;
@@ -656,22 +662,34 @@
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff350800 0x0 0x40>;
 		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "vpu_mmu";
 		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
 		clock-names = "aclk", "iface";
 		#iommu-cells = <0>;
 		power-domains = <&power RK3328_PD_VPU>;
 	};
 
-	rkvdec_mmu: iommu@ff360480 {
+	vdec: video-codec@ff360000 {
+		compatible = "rockchip,rk3328-vdec", "rockchip,rk3399-vdec";
+		reg = <0x0 0xff360000 0x0 0x480>;
+		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>,
+			 <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>;
+		clock-names = "axi", "ahb", "cabac", "core";
+		assigned-clocks = <&cru ACLK_RKVDEC>, <&cru SCLK_VDEC_CABAC>,
+				  <&cru SCLK_VDEC_CORE>;
+		assigned-clock-rates = <400000000>, <400000000>, <300000000>;
+		iommus = <&vdec_mmu>;
+		power-domains = <&power RK3328_PD_VIDEO>;
+	};
+
+	vdec_mmu: iommu@ff360480 {
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>;
 		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "rkvdec_mmu";
 		clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
 		clock-names = "aclk", "iface";
 		#iommu-cells = <0>;
-		status = "disabled";
+		power-domains = <&power RK3328_PD_VIDEO>;
 	};
 
 	vop: vop@ff370000 {
@@ -700,7 +718,6 @@
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff373f00 0x0 0x100>;
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "vop_mmu";
 		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
 		clock-names = "aclk", "iface";
 		#iommu-cells = <0>;
@@ -901,6 +918,8 @@
 		resets = <&cru SRST_GMAC2IO_A>;
 		reset-names = "stmmaceth";
 		rockchip,grf = <&grf>;
+		tx-fifo-depth = <2048>;
+		rx-fifo-depth = <4096>;
 		snps,txpbl = <0x4>;
 		status = "disabled";
 	};
@@ -923,6 +942,8 @@
 		reset-names = "stmmaceth";
 		phy-mode = "rmii";
 		phy-handle = <&phy>;
+		tx-fifo-depth = <2048>;
+		rx-fifo-depth = <4096>;
 		snps,txpbl = <0x4>;
 		clock_in_out = "output";
 		status = "disabled";
@@ -1021,6 +1042,17 @@
 		      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 	};
 
+	crypto: crypto@ff060000 {
+		compatible = "rockchip,rk3328-crypto";
+		reg = <0x0 0xff060000 0x0 0x4000>;
+		interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_CRYPTO_MST>, <&cru HCLK_CRYPTO_SLV>,
+			 <&cru SCLK_CRYPTO>;
+		clock-names = "hclk_master", "hclk_slave", "sclk";
+		resets = <&cru SRST_CRYPTO>;
+		reset-names = "crypto-rst";
+	};
+
 	pinctrl: pinctrl {
 		compatible = "rockchip,rk3328-pinctrl";
 		rockchip,grf = <&grf>;
@@ -1028,7 +1060,7 @@
 		#size-cells = <2>;
 		ranges;
 
-		gpio0: gpio0@ff210000 {
+		gpio0: gpio@ff210000 {
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff210000 0x0 0x100>;
 			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
@@ -1041,7 +1073,7 @@
 			#interrupt-cells = <2>;
 		};
 
-		gpio1: gpio1@ff220000 {
+		gpio1: gpio@ff220000 {
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff220000 0x0 0x100>;
 			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
@@ -1054,7 +1086,7 @@
 			#interrupt-cells = <2>;
 		};
 
-		gpio2: gpio2@ff230000 {
+		gpio2: gpio@ff230000 {
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff230000 0x0 0x100>;
 			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
@@ -1067,7 +1099,7 @@
 			#interrupt-cells = <2>;
 		};
 
-		gpio3: gpio3@ff240000 {
+		gpio3: gpio@ff240000 {
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff240000 0x0 0x100>;
 			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.43.0

[PATCH 12/15] Revert "rockchip: Allow booting from SPI"

[Jonas Karlman]

This reverts commit 3523c07867b403d5b3b68812aebac8a5afa5be4c.

Booting from SPI was already allowed before this commit was first
introduced. A few lines further down the exact same code already existed
and still does.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/mach-rockchip/spl-boot-order.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 2c39a215c107..79c856d2a0ac 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -65,9 +65,6 @@ static int spl_node_to_boot_device(int node)
 		default:
 			return -ENOSYS;
 		}
-	} else if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node,
-		&parent)) {
-		return BOOT_DEVICE_SPI;
 	}
 
 	/*
-- 
2.43.0

[PATCH 13/15] rockchip: rk3328: Add support to build bootable SPI image

[Jonas Karlman]

Similar to RK35xx the BootRom in RK3328 can read all data and look for
idbloader at 0x8000, same as on SD and eMMC.

Use the rksd format and modify the mkimage offset to generate a bootable
u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 arch/arm/dts/rk3328-u-boot.dtsi        | 11 +++++++++++
 arch/arm/mach-rockchip/rk3328/rk3328.c |  1 +
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index b90d78878d77..2a5dca97dd4b 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -120,3 +120,14 @@
 &usb20_otg {
 	hnp-srp-disable;
 };
+
+#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
+&binman {
+	simple-bin-spi {
+		mkimage {
+			args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
+			offset = <0x8000>;
+		};
+	};
+};
+#endif
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index b591d38fe412..b82b209de9e2 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -36,6 +36,7 @@
 
 const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
 	[BROM_BOOTSOURCE_EMMC] = "/mmc@ff520000",
+	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff190000/flash@0",
 	[BROM_BOOTSOURCE_SD] = "/mmc@ff500000",
 };
 
-- 
2.43.0

[PATCH 14/15] rockchip: rk3328-rock64: Enable boot from SPI NOR flash

[Jonas Karlman]

Add Kconfig options to enable support for booting from SPI NOR flash on
Pine64 Rock64.

The generated bootable u-boot-rockchip-spi.bin that can be written to
0x0 of SPI NOR flash. The FIT image is loaded from 0x60000, same as on
RK35xx boards.

  => sf probe
  SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB

  => load mmc 1:1 10000000 u-boot-rockchip-spi.bin
  1359872 bytes read in 65 ms (20 MiB/s)

  => sf update $fileaddr 0 $filesize
  device 0 offset 0x0, size 0x14c000
  1118208 bytes written, 241664 bytes skipped in 8.516s, speed 163516 B/s

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 configs/rock64-rk3328_defconfig | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
index 0157a1efe374..01e447448513 100644
--- a/configs/rock64-rk3328_defconfig
+++ b/configs/rock64-rk3328_defconfig
@@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64"
 CONFIG_DM_RESET=y
 CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
@@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x400000
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
 CONFIG_DEBUG_UART_BASE=0xFF130000
 CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
 CONFIG_SYS_LOAD_ADDR=0x800800
 CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
@@ -42,6 +45,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_POWER=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
@@ -76,7 +81,10 @@ CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_REALTEK=y
 CONFIG_DM_ETH_PHY=y
 CONFIG_ETH_DESIGNWARE=y
-- 
2.43.0

[PATCH 15/15] rockchip: rk3328-orangepi-r1-plus: Enable boot from SPI NOR flash

[Jonas Karlman]

Add Kconfig options to enable support for booting from SPI NOR flash on
Orange Pi R1 Plus boards.

The generated bootable u-boot-rockchip-spi.bin that can be written to
0x0 of SPI NOR flash. The FIT image is loaded from 0x60000, same as on
RK35xx boards.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
 configs/orangepi-r1-plus-lts-rk3328_defconfig | 8 ++++++++
 configs/orangepi-r1-plus-rk3328_defconfig     | 8 ++++++++
 2 files changed, 16 insertions(+)

diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig
index 937ef003d85b..968110c8cd6f 100644
--- a/configs/orangepi-r1-plus-lts-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
@@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus-lts"
 CONFIG_DM_RESET=y
 CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
@@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x400000
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
 CONFIG_DEBUG_UART_BASE=0xFF130000
 CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
 CONFIG_SYS_LOAD_ADDR=0x800800
 CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
@@ -42,6 +45,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_POWER=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
@@ -76,7 +81,10 @@ CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_MOTORCOMM=y
 CONFIG_PHY_REALTEK=y
 CONFIG_DM_ETH_PHY=y
diff --git a/configs/orangepi-r1-plus-rk3328_defconfig b/configs/orangepi-r1-plus-rk3328_defconfig
index 563a1ac6ecd4..7038f09f202c 100644
--- a/configs/orangepi-r1-plus-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-rk3328_defconfig
@@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus"
 CONFIG_DM_RESET=y
 CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
@@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x400000
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
 CONFIG_DEBUG_UART_BASE=0xFF130000
 CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
 CONFIG_SYS_LOAD_ADDR=0x800800
 CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
@@ -42,6 +45,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_POWER=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
@@ -76,7 +81,10 @@ CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_MOTORCOMM=y
 CONFIG_PHY_REALTEK=y
 CONFIG_DM_ETH_PHY=y
-- 
2.43.0

Re: [PATCH 01/15] rockchip: rk3328: Update default u-boot, spl-boot-order prop

[Dragan Simic]

On 2024-02-07 01:02, Jonas Karlman wrote:
> Change to use a common FIT load order, same-as-spl > SD-card > eMMC on
> RK3328 boards. Only EVB and Radxa ROCK Pi E is affected by this change.
> 
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Looking good to me.

Reviewed-by: Dragan Simic <dsimic@manjaro.org>

> ---
>  arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi      | 6 ------
>  arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi           | 5 -----
>  arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 5 -----
>  arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi     | 5 -----
>  arch/arm/dts/rk3328-roc-cc-u-boot.dtsi               | 5 +----
>  arch/arm/dts/rk3328-rock64-u-boot.dtsi               | 5 +----
>  arch/arm/dts/rk3328-u-boot.dtsi                      | 2 +-
>  7 files changed, 3 insertions(+), 30 deletions(-)
> 
> diff --git a/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
> b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
> index f8adb9e5e1ff..1dc3c022c504 100644
> --- a/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
> @@ -1,9 +1,3 @@
>  // SPDX-License-Identifier: GPL-2.0-or-later
> 
>  #include "rk3328-nanopi-r2c-u-boot.dtsi"
> -
> -/ {
> -	chosen {
> -		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
> -	};
> -};
> diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
> b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
> index 78d37ab47558..d969b008775e 100644
> --- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
> @@ -6,11 +6,6 @@
> 
>  #include "rk3328-u-boot.dtsi"
>  #include "rk3328-sdram-ddr4-666.dtsi"
> -/ {
> -	chosen {
> -		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
> -	};
> -};
> 
>  &gpio0 {
>  	bootph-pre-ram;
> diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> index ebe33e48cb9c..5aaa5ccb15c1 100644
> --- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> @@ -6,11 +6,6 @@
> 
>  #include "rk3328-u-boot.dtsi"
>  #include "rk3328-sdram-lpddr3-666.dtsi"
> -/ {
> -	chosen {
> -		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
> -	};
> -};
> 
>  &gpio0 {
>  	bootph-pre-ram;
> diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> index 637c70adf194..6d3db86dce6a 100644
> --- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> @@ -6,11 +6,6 @@
> 
>  #include "rk3328-u-boot.dtsi"
>  #include "rk3328-sdram-ddr4-666.dtsi"
> -/ {
> -	chosen {
> -		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
> -	};
> -};
> 
>  &gpio0 {
>  	bootph-pre-ram;
> diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
> b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
> index 2062f34bf825..8bc2f134f8f4 100644
> --- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
> @@ -5,11 +5,8 @@
> 
>  #include "rk3328-u-boot.dtsi"
>  #include "rk3328-sdram-ddr4-666.dtsi"
> -/ {
> -	chosen {
> -		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
> -	};
> 
> +/ {
>  	smbios {
>  		compatible = "u-boot,sysinfo-smbios";
> 
> diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
> b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
> index 6904515b9693..bfe506fd2249 100644
> --- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
> @@ -5,11 +5,8 @@
> 
>  #include "rk3328-u-boot.dtsi"
>  #include "rk3328-sdram-lpddr3-1600.dtsi"
> -/ {
> -	chosen {
> -		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
> -	};
> 
> +/ {
>  	smbios {
>  		compatible = "u-boot,sysinfo-smbios";
> 
> diff --git a/arch/arm/dts/rk3328-u-boot.dtsi 
> b/arch/arm/dts/rk3328-u-boot.dtsi
> index a9f2536de2a2..a12be7876db0 100644
> --- a/arch/arm/dts/rk3328-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-u-boot.dtsi
> @@ -13,7 +13,7 @@
>  	};
> 
>  	chosen {
> -		u-boot,spl-boot-order = &emmc, &sdmmc;
> +		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
>  	};
> 
>  	dmc: dmc {

Re: [PATCH 03/15] rockchip: rk3328-rock64: Update defconfig

[Dragan Simic]

On 2024-02-07 01:02, Jonas Karlman wrote:
> Update defconfig for rk3328-rock64 with new defaults.
> 
> Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
> 
> Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
> of FIT images. This help indicate if there is an issue loading any of
> the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
> support for scripts.
> 
> Remove the NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is set
> based on cpuid read from eFUSE.
> 
> Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
> 
> Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY.
> 
> Also add missing device tree file to MAINTAINERS and add myself as a
> reviewer for this board.
> 
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Looking good to me.

Reviewed-by: Dragan Simic <dsimic@manjaro.org>

> ---
>  board/rockchip/evb_rk3328/MAINTAINERS | 2 ++
>  configs/rock64-rk3328_defconfig       | 7 +++++--
>  2 files changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/board/rockchip/evb_rk3328/MAINTAINERS
> b/board/rockchip/evb_rk3328/MAINTAINERS
> index dc750bd69426..419bc8ded375 100644
> --- a/board/rockchip/evb_rk3328/MAINTAINERS
> +++ b/board/rockchip/evb_rk3328/MAINTAINERS
> @@ -47,8 +47,10 @@ F:      arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
> 
>  ROCK64-RK3328
>  M:      Matwey V. Kornilov <matwey.kornilov@gmail.com>
> +R:      Jonas Karlman <jonas@kwiboo.se>
>  S:      Maintained
>  F:      configs/rock64-rk3328_defconfig
> +F:      arch/arm/dts/rk3328-rock64.dts
>  F:      arch/arm/dts/rk3328-rock64-u-boot.dtsi
> 
>  ROCKPIE-RK3328
> diff --git a/configs/rock64-rk3328_defconfig 
> b/configs/rock64-rk3328_defconfig
> index 0297d098761e..0157a1efe374 100644
> --- a/configs/rock64-rk3328_defconfig
> +++ b/configs/rock64-rk3328_defconfig
> @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
>  CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
>  CONFIG_TPL_LIBCOMMON_SUPPORT=y
>  CONFIG_TPL_LIBGENERIC_SUPPORT=y
> -CONFIG_SPL_DRIVERS_MISC=y
>  CONFIG_SPL_STACK_R_ADDR=0x600000
>  CONFIG_SPL_STACK=0x400000
>  CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
> @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
>  # CONFIG_ANDROID_BOOT_IMAGE is not set
>  CONFIG_FIT=y
>  CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_FIT_SIGNATURE=y
>  CONFIG_SPL_LOAD_FIT=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
>  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb"
>  # CONFIG_DISPLAY_CPUINFO is not set
>  CONFIG_DISPLAY_BOARDINFO_LATE=y
> @@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
>  CONFIG_ENV_IS_IN_MMC=y
>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>  CONFIG_SYS_MMC_ENV_DEV=1
> -CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_TPL_DM=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_REGMAP=y
>  CONFIG_SPL_REGMAP=y
>  CONFIG_TPL_REGMAP=y
> @@ -76,6 +77,8 @@ CONFIG_ROCKCHIP_EFUSE=y
>  CONFIG_MMC_DW=y
>  CONFIG_MMC_DW_ROCKCHIP=y
>  CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_PHY_REALTEK=y
> +CONFIG_DM_ETH_PHY=y
>  CONFIG_ETH_DESIGNWARE=y
>  CONFIG_GMAC_ROCKCHIP=y
>  CONFIG_PHY_ROCKCHIP_INNO_USB2=y

Re: [PATCH 04/15] rockchip: rk3328-roc-cc: Update defconfig

[Chen-Yu Tsai]

On Wed, Feb 7, 2024 at 8:04 AM Jonas Karlman <jonas@kwiboo.se> wrote:
>
> Update defconfig for rk3328-roc-cc with new defaults.
>
> Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
>
> Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
> of FIT images. This help indicate if there is an issue loading any of
> the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
> support for scripts.
>
> Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
> eth1addr is set based on cpuid read from eFUSE.

I wonder if it would make sense to enable ROCKCHIP_EFUSE or ROCKCHIP_OTP
for the respective SoCs by default, either with "imply" under the SoC
Kconfig options, or "default if XXX" under the driver Kconfig options?
Not sure which is preferred.

Same goes for CONFIG_MISC_INIT_R for actually generating the serial number
and MAC addresses from the efuse/OTP.

At least for RK3566 and RK3588 we are implying these options.


ChenYu

> Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
>
> Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
> ethernet PHYs.
>
> Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
> generator.
>
> Also add missing device tree file to MAINTAINERS and add myself as a
> reviewer for this board.
>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> ---
>  board/rockchip/evb_rk3328/MAINTAINERS | 2 ++
>  configs/roc-cc-rk3328_defconfig       | 9 +++++++--
>  doc/board/rockchip/rockchip.rst       | 2 +-
>  3 files changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
> index 419bc8ded375..09488eaf083f 100644
> --- a/board/rockchip/evb_rk3328/MAINTAINERS
> +++ b/board/rockchip/evb_rk3328/MAINTAINERS
> @@ -41,8 +41,10 @@ F:      arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
>  ROC-RK3328-CC
>  M:      Loic Devulder <ldevulder@suse.com>
>  M:      Chen-Yu Tsai <wens@csie.org>
> +R:      Jonas Karlman <jonas@kwiboo.se>
>  S:      Maintained
>  F:      configs/roc-cc-rk3328_defconfig
> +F:      arch/arm/dts/rk3328-roc-cc.dts
>  F:      arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
>
>  ROCK64-RK3328
> diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
> index 4ac3c9403b02..7d81a715ef25 100644
> --- a/configs/roc-cc-rk3328_defconfig
> +++ b/configs/roc-cc-rk3328_defconfig
> @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
>  CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
>  CONFIG_TPL_LIBCOMMON_SUPPORT=y
>  CONFIG_TPL_LIBGENERIC_SUPPORT=y
> -CONFIG_SPL_DRIVERS_MISC=y
>  CONFIG_SPL_STACK_R_ADDR=0x600000
>  CONFIG_SPL_STACK=0x400000
>  CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
> @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
>  # CONFIG_ANDROID_BOOT_IMAGE is not set
>  CONFIG_FIT=y
>  CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_FIT_SIGNATURE=y
>  CONFIG_SPL_LOAD_FIT=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
>  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-roc-cc.dtb"
>  # CONFIG_DISPLAY_CPUINFO is not set
>  CONFIG_DISPLAY_BOARDINFO_LATE=y
> @@ -58,8 +59,8 @@ CONFIG_TPL_OF_PLATDATA=y
>  CONFIG_ENV_IS_IN_MMC=y
>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>  CONFIG_SYS_MMC_ENV_DEV=1
> -CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_TPL_DM=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_REGMAP=y
>  CONFIG_SPL_REGMAP=y
>  CONFIG_TPL_REGMAP=y
> @@ -73,9 +74,11 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
>  CONFIG_ROCKCHIP_GPIO=y
>  CONFIG_SYS_I2C_ROCKCHIP=y
>  CONFIG_MISC=y
> +CONFIG_ROCKCHIP_EFUSE=y
>  CONFIG_MMC_DW=y
>  CONFIG_MMC_DW_ROCKCHIP=y
>  CONFIG_PHY_REALTEK=y
> +CONFIG_DM_ETH_PHY=y
>  CONFIG_PHY_GIGE=y
>  CONFIG_ETH_DESIGNWARE=y
>  CONFIG_GMAC_ROCKCHIP=y
> @@ -95,6 +98,8 @@ CONFIG_PWM_ROCKCHIP=y
>  CONFIG_RAM=y
>  CONFIG_SPL_RAM=y
>  CONFIG_TPL_RAM=y
> +CONFIG_DM_RNG=y
> +CONFIG_RNG_ROCKCHIP=y
>  CONFIG_BAUDRATE=1500000
>  CONFIG_DEBUG_UART_SHIFT=2
>  CONFIG_SYS_NS16550_MEM32=y
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index de2195deadca..99f48b6d6fa5 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -60,8 +60,8 @@ List of mainline supported Rockchip boards:
>       - ODROID-GO Advance (odroid-go2)
>  * rk3328
>       - Rockchip Evb-RK3328 (evb-rk3328)
> +     - Firefly ROC-RK3328-CC (roc-cc-rk3328)
>       - Pine64 Rock64 (rock64-rk3328)
> -     - Firefly-RK3328 (roc-cc-rk3328)
>       - Radxa Rockpi E (rock-pi-e-rk3328)
>  * rk3368
>       - GeekBox (geekbox)
> --
> 2.43.0
>

Re: [PATCH 10/15] rng: rockchip: Use same compatible as linux

[Heinrich Schuchardt]

On 2/7/24 01:02, Jonas Karlman wrote:
> Replace the rockchip,cryptov1-rng compatible with compatibles used in
> the linux device tree for RK3288, RK3328 and RK3399 to ease sync of SoC
> device tree from linux.
>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

It is strange that U-Boot only uses the random number generation while
Linux only seems to use the crypto algorithm acceleration.

U-Boot has some crypto accelerator drivers in drivers/crypto/. But here
we only make use of modular exponentiation (see struct mod_exp_ops). We
could improve on crypto acceleration.

The current change looks good to me.

Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

> ---
>   arch/arm/dts/rk3328-u-boot.dtsi |  2 +-
>   arch/arm/dts/rk3399-u-boot.dtsi |  2 +-
>   drivers/rng/rockchip_rng.c      | 10 +++++++++-
>   3 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
> index e087b02893c1..d805c2f394f8 100644
> --- a/arch/arm/dts/rk3328-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-u-boot.dtsi
> @@ -28,7 +28,7 @@
>   	};
>
>   	rng: rng@ff060000 {
> -		compatible = "rockchip,cryptov1-rng";
> +		compatible = "rockchip,rk3328-crypto";
>   		reg = <0x0 0xff060000 0x0 0x4000>;
>   		status = "okay";
>   	};
> diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
> index 3423b882c437..87b173e59579 100644
> --- a/arch/arm/dts/rk3399-u-boot.dtsi
> +++ b/arch/arm/dts/rk3399-u-boot.dtsi
> @@ -30,7 +30,7 @@
>   	};
>
>   	rng: rng@ff8b8000 {
> -		compatible = "rockchip,cryptov1-rng";
> +		compatible = "rockchip,rk3399-crypto";
>   		reg = <0x0 0xff8b8000 0x0 0x1000>;
>   		status = "okay";
>   	};
> diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c
> index 705b424cf3dd..e82b5572fec5 100644
> --- a/drivers/rng/rockchip_rng.c
> +++ b/drivers/rng/rockchip_rng.c
> @@ -302,7 +302,15 @@ static const struct dm_rng_ops rockchip_rng_ops = {
>
>   static const struct udevice_id rockchip_rng_match[] = {
>   	{
> -		.compatible = "rockchip,cryptov1-rng",
> +		.compatible = "rockchip,rk3288-crypto",
> +		.data = (ulong)&rk_cryptov1_soc_data,
> +	},
> +	{
> +		.compatible = "rockchip,rk3328-crypto",
> +		.data = (ulong)&rk_cryptov1_soc_data,
> +	},
> +	{
> +		.compatible = "rockchip,rk3399-crypto",
>   		.data = (ulong)&rk_cryptov1_soc_data,
>   	},
>   	{

Re: [PATCH 10/15] rng: rockchip: Use same compatible as linux

[Dragan Simic]

Hello Heinrich,

On 2024-02-07 08:12, Heinrich Schuchardt wrote:
> On 2/7/24 01:02, Jonas Karlman wrote:
>> Replace the rockchip,cryptov1-rng compatible with compatibles used in
>> the linux device tree for RK3288, RK3328 and RK3399 to ease sync of 
>> SoC
>> device tree from linux.
>> 
>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> 
> It is strange that U-Boot only uses the random number generation while
> Linux only seems to use the crypto algorithm acceleration.
> 
> U-Boot has some crypto accelerator drivers in drivers/crypto/. But here
> we only make use of modular exponentiation (see struct mod_exp_ops). We
> could improve on crypto acceleration.

Pleas, let's keep in mind that using crypto accelerators doesn't
always result in improved performance;  it all depends on the
workload and on the particular SoC.  For example, performing
crypto operations on small chunks of data may be much faster when
performed on a CPU core.  Another example is that some crypto IP
cores don't use the available CPU caches at all, which inevitably
slows them down.

Though, crypto IP cores are quite often more power-efficient vs.
performing the same crypto operations on a CPU core, which seems
to be the main reason why they get included in a number of SoCs.
Of course, this power efficiency becomes noticeable only when
offloading crypto operations performed on large chunks of data,
or when offloading for sizable amounts of time.

> The current change looks good to me.
> 
> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
> 
>> ---
>>   arch/arm/dts/rk3328-u-boot.dtsi |  2 +-
>>   arch/arm/dts/rk3399-u-boot.dtsi |  2 +-
>>   drivers/rng/rockchip_rng.c      | 10 +++++++++-
>>   3 files changed, 11 insertions(+), 3 deletions(-)
>> 
>> diff --git a/arch/arm/dts/rk3328-u-boot.dtsi 
>> b/arch/arm/dts/rk3328-u-boot.dtsi
>> index e087b02893c1..d805c2f394f8 100644
>> --- a/arch/arm/dts/rk3328-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3328-u-boot.dtsi
>> @@ -28,7 +28,7 @@
>>   	};
>> 
>>   	rng: rng@ff060000 {
>> -		compatible = "rockchip,cryptov1-rng";
>> +		compatible = "rockchip,rk3328-crypto";
>>   		reg = <0x0 0xff060000 0x0 0x4000>;
>>   		status = "okay";
>>   	};
>> diff --git a/arch/arm/dts/rk3399-u-boot.dtsi 
>> b/arch/arm/dts/rk3399-u-boot.dtsi
>> index 3423b882c437..87b173e59579 100644
>> --- a/arch/arm/dts/rk3399-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3399-u-boot.dtsi
>> @@ -30,7 +30,7 @@
>>   	};
>> 
>>   	rng: rng@ff8b8000 {
>> -		compatible = "rockchip,cryptov1-rng";
>> +		compatible = "rockchip,rk3399-crypto";
>>   		reg = <0x0 0xff8b8000 0x0 0x1000>;
>>   		status = "okay";
>>   	};
>> diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c
>> index 705b424cf3dd..e82b5572fec5 100644
>> --- a/drivers/rng/rockchip_rng.c
>> +++ b/drivers/rng/rockchip_rng.c
>> @@ -302,7 +302,15 @@ static const struct dm_rng_ops rockchip_rng_ops = 
>> {
>> 
>>   static const struct udevice_id rockchip_rng_match[] = {
>>   	{
>> -		.compatible = "rockchip,cryptov1-rng",
>> +		.compatible = "rockchip,rk3288-crypto",
>> +		.data = (ulong)&rk_cryptov1_soc_data,
>> +	},
>> +	{
>> +		.compatible = "rockchip,rk3328-crypto",
>> +		.data = (ulong)&rk_cryptov1_soc_data,
>> +	},
>> +	{
>> +		.compatible = "rockchip,rk3399-crypto",
>>   		.data = (ulong)&rk_cryptov1_soc_data,
>>   	},
>>   	{

Re: [PATCH 04/15] rockchip: rk3328-roc-cc: Update defconfig

[Chen-Yu Tsai]

(Resend from subscribed address.)

On Wed, Feb 7, 2024 at 8:04 AM Jonas Karlman <jonas@kwiboo.se> wrote:
>
> Update defconfig for rk3328-roc-cc with new defaults.
>
> Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
>
> Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
> of FIT images. This help indicate if there is an issue loading any of
> the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
> support for scripts.
>
> Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
> eth1addr is set based on cpuid read from eFUSE.

I wonder if it would make sense to enable ROCKCHIP_EFUSE or ROCKCHIP_OTP
for the respective SoCs by default, either with "imply" under the SoC
Kconfig options, or "default if XXX" under the driver Kconfig options?
Not sure which is preferred.

Same goes for CONFIG_MISC_INIT_R for actually generating the serial number
and MAC addresses from the efuse/OTP.

At least for RK3566 and RK3588 these options are implied.


ChenYu

> Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
>
> Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
> ethernet PHYs.
>
> Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
> generator.
>
> Also add missing device tree file to MAINTAINERS and add myself as a
> reviewer for this board.
>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> ---
>  board/rockchip/evb_rk3328/MAINTAINERS | 2 ++
>  configs/roc-cc-rk3328_defconfig       | 9 +++++++--
>  doc/board/rockchip/rockchip.rst       | 2 +-
>  3 files changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
> index 419bc8ded375..09488eaf083f 100644
> --- a/board/rockchip/evb_rk3328/MAINTAINERS
> +++ b/board/rockchip/evb_rk3328/MAINTAINERS
> @@ -41,8 +41,10 @@ F:      arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
>  ROC-RK3328-CC
>  M:      Loic Devulder <ldevulder@suse.com>
>  M:      Chen-Yu Tsai <wens@csie.org>
> +R:      Jonas Karlman <jonas@kwiboo.se>
>  S:      Maintained
>  F:      configs/roc-cc-rk3328_defconfig
> +F:      arch/arm/dts/rk3328-roc-cc.dts
>  F:      arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
>
>  ROCK64-RK3328
> diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
> index 4ac3c9403b02..7d81a715ef25 100644
> --- a/configs/roc-cc-rk3328_defconfig
> +++ b/configs/roc-cc-rk3328_defconfig
> @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
>  CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
>  CONFIG_TPL_LIBCOMMON_SUPPORT=y
>  CONFIG_TPL_LIBGENERIC_SUPPORT=y
> -CONFIG_SPL_DRIVERS_MISC=y
>  CONFIG_SPL_STACK_R_ADDR=0x600000
>  CONFIG_SPL_STACK=0x400000
>  CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
> @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
>  # CONFIG_ANDROID_BOOT_IMAGE is not set
>  CONFIG_FIT=y
>  CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_FIT_SIGNATURE=y
>  CONFIG_SPL_LOAD_FIT=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
>  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-roc-cc.dtb"
>  # CONFIG_DISPLAY_CPUINFO is not set
>  CONFIG_DISPLAY_BOARDINFO_LATE=y
> @@ -58,8 +59,8 @@ CONFIG_TPL_OF_PLATDATA=y
>  CONFIG_ENV_IS_IN_MMC=y
>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>  CONFIG_SYS_MMC_ENV_DEV=1
> -CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_TPL_DM=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_REGMAP=y
>  CONFIG_SPL_REGMAP=y
>  CONFIG_TPL_REGMAP=y
> @@ -73,9 +74,11 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
>  CONFIG_ROCKCHIP_GPIO=y
>  CONFIG_SYS_I2C_ROCKCHIP=y
>  CONFIG_MISC=y
> +CONFIG_ROCKCHIP_EFUSE=y
>  CONFIG_MMC_DW=y
>  CONFIG_MMC_DW_ROCKCHIP=y
>  CONFIG_PHY_REALTEK=y
> +CONFIG_DM_ETH_PHY=y
>  CONFIG_PHY_GIGE=y
>  CONFIG_ETH_DESIGNWARE=y
>  CONFIG_GMAC_ROCKCHIP=y
> @@ -95,6 +98,8 @@ CONFIG_PWM_ROCKCHIP=y
>  CONFIG_RAM=y
>  CONFIG_SPL_RAM=y
>  CONFIG_TPL_RAM=y
> +CONFIG_DM_RNG=y
> +CONFIG_RNG_ROCKCHIP=y
>  CONFIG_BAUDRATE=1500000
>  CONFIG_DEBUG_UART_SHIFT=2
>  CONFIG_SYS_NS16550_MEM32=y
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index de2195deadca..99f48b6d6fa5 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -60,8 +60,8 @@ List of mainline supported Rockchip boards:
>       - ODROID-GO Advance (odroid-go2)
>  * rk3328
>       - Rockchip Evb-RK3328 (evb-rk3328)
> +     - Firefly ROC-RK3328-CC (roc-cc-rk3328)
>       - Pine64 Rock64 (rock64-rk3328)
> -     - Firefly-RK3328 (roc-cc-rk3328)
>       - Radxa Rockpi E (rock-pi-e-rk3328)
>  * rk3368
>       - GeekBox (geekbox)
> --
> 2.43.0
>

Re: [PATCH 03/15] rockchip: rk3328-rock64: Update defconfig

[Matwey V. Kornilov]

ср, 7 февр. 2024 г. в 03:14, Jonas Karlman <jonas@kwiboo.se>:
>
> Update defconfig for rk3328-rock64 with new defaults.
>
> Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

What is abould rockchip-efuse?

>
> Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
> of FIT images. This help indicate if there is an issue loading any of
> the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
> support for scripts.
>
> Remove the NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is set
> based on cpuid read from eFUSE.
>
> Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
>
> Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY.
>
> Also add missing device tree file to MAINTAINERS and add myself as a
> reviewer for this board.
>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> ---
>  board/rockchip/evb_rk3328/MAINTAINERS | 2 ++
>  configs/rock64-rk3328_defconfig       | 7 +++++--
>  2 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
> index dc750bd69426..419bc8ded375 100644
> --- a/board/rockchip/evb_rk3328/MAINTAINERS
> +++ b/board/rockchip/evb_rk3328/MAINTAINERS
> @@ -47,8 +47,10 @@ F:      arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
>
>  ROCK64-RK3328
>  M:      Matwey V. Kornilov <matwey.kornilov@gmail.com>
> +R:      Jonas Karlman <jonas@kwiboo.se>
>  S:      Maintained
>  F:      configs/rock64-rk3328_defconfig
> +F:      arch/arm/dts/rk3328-rock64.dts
>  F:      arch/arm/dts/rk3328-rock64-u-boot.dtsi
>
>  ROCKPIE-RK3328
> diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
> index 0297d098761e..0157a1efe374 100644
> --- a/configs/rock64-rk3328_defconfig
> +++ b/configs/rock64-rk3328_defconfig
> @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
>  CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
>  CONFIG_TPL_LIBCOMMON_SUPPORT=y
>  CONFIG_TPL_LIBGENERIC_SUPPORT=y
> -CONFIG_SPL_DRIVERS_MISC=y
>  CONFIG_SPL_STACK_R_ADDR=0x600000
>  CONFIG_SPL_STACK=0x400000
>  CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
> @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
>  # CONFIG_ANDROID_BOOT_IMAGE is not set
>  CONFIG_FIT=y
>  CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_FIT_SIGNATURE=y
>  CONFIG_SPL_LOAD_FIT=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
>  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb"
>  # CONFIG_DISPLAY_CPUINFO is not set
>  CONFIG_DISPLAY_BOARDINFO_LATE=y
> @@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
>  CONFIG_ENV_IS_IN_MMC=y
>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>  CONFIG_SYS_MMC_ENV_DEV=1
> -CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_TPL_DM=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_REGMAP=y
>  CONFIG_SPL_REGMAP=y
>  CONFIG_TPL_REGMAP=y
> @@ -76,6 +77,8 @@ CONFIG_ROCKCHIP_EFUSE=y
>  CONFIG_MMC_DW=y
>  CONFIG_MMC_DW_ROCKCHIP=y
>  CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_PHY_REALTEK=y
> +CONFIG_DM_ETH_PHY=y
>  CONFIG_ETH_DESIGNWARE=y
>  CONFIG_GMAC_ROCKCHIP=y
>  CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> --
> 2.43.0
>


-- 
With best regards,
Matwey V. Kornilov

Re: [PATCH 04/15] rockchip: rk3328-roc-cc: Update defconfig

[Jonas Karlman]

On 2024-02-07 06:52, Chen-Yu Tsai wrote:
> On Wed, Feb 7, 2024 at 8:04 AM Jonas Karlman <jonas@kwiboo.se> wrote:
>>
>> Update defconfig for rk3328-roc-cc with new defaults.
>>
>> Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
>>
>> Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
>> of FIT images. This help indicate if there is an issue loading any of
>> the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
>> support for scripts.
>>
>> Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
>> eth1addr is set based on cpuid read from eFUSE.
> 
> I wonder if it would make sense to enable ROCKCHIP_EFUSE or ROCKCHIP_OTP
> for the respective SoCs by default, either with "imply" under the SoC
> Kconfig options, or "default if XXX" under the driver Kconfig options?
> Not sure which is preferred.
> 
> Same goes for CONFIG_MISC_INIT_R for actually generating the serial number
> and MAC addresses from the efuse/OTP.
> 
> At least for RK3566 and RK3588 we are implying these options.

I agree that these and lots of other Kconfig options could and should be
implied, either at soc or arch level.

Maybe something for a follow up series?

Regards,
Jonas

> 
> 
> ChenYu
> 
>> Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
>>
>> Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
>> ethernet PHYs.
>>
>> Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
>> generator.
>>
>> Also add missing device tree file to MAINTAINERS and add myself as a
>> reviewer for this board.
>>
>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
>> ---
>>  board/rockchip/evb_rk3328/MAINTAINERS | 2 ++
>>  configs/roc-cc-rk3328_defconfig       | 9 +++++++--
>>  doc/board/rockchip/rockchip.rst       | 2 +-
>>  3 files changed, 10 insertions(+), 3 deletions(-)
>>
>> diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
>> index 419bc8ded375..09488eaf083f 100644
>> --- a/board/rockchip/evb_rk3328/MAINTAINERS
>> +++ b/board/rockchip/evb_rk3328/MAINTAINERS
>> @@ -41,8 +41,10 @@ F:      arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
>>  ROC-RK3328-CC
>>  M:      Loic Devulder <ldevulder@suse.com>
>>  M:      Chen-Yu Tsai <wens@csie.org>
>> +R:      Jonas Karlman <jonas@kwiboo.se>
>>  S:      Maintained
>>  F:      configs/roc-cc-rk3328_defconfig
>> +F:      arch/arm/dts/rk3328-roc-cc.dts
>>  F:      arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
>>
>>  ROCK64-RK3328
>> diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
>> index 4ac3c9403b02..7d81a715ef25 100644
>> --- a/configs/roc-cc-rk3328_defconfig
>> +++ b/configs/roc-cc-rk3328_defconfig
>> @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
>>  CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
>>  CONFIG_TPL_LIBCOMMON_SUPPORT=y
>>  CONFIG_TPL_LIBGENERIC_SUPPORT=y
>> -CONFIG_SPL_DRIVERS_MISC=y
>>  CONFIG_SPL_STACK_R_ADDR=0x600000
>>  CONFIG_SPL_STACK=0x400000
>>  CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
>> @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
>>  # CONFIG_ANDROID_BOOT_IMAGE is not set
>>  CONFIG_FIT=y
>>  CONFIG_FIT_VERBOSE=y
>> +CONFIG_SPL_FIT_SIGNATURE=y
>>  CONFIG_SPL_LOAD_FIT=y
>> +CONFIG_LEGACY_IMAGE_FORMAT=y
>>  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-roc-cc.dtb"
>>  # CONFIG_DISPLAY_CPUINFO is not set
>>  CONFIG_DISPLAY_BOARDINFO_LATE=y
>> @@ -58,8 +59,8 @@ CONFIG_TPL_OF_PLATDATA=y
>>  CONFIG_ENV_IS_IN_MMC=y
>>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>>  CONFIG_SYS_MMC_ENV_DEV=1
>> -CONFIG_NET_RANDOM_ETHADDR=y
>>  CONFIG_TPL_DM=y
>> +CONFIG_SPL_DM_SEQ_ALIAS=y
>>  CONFIG_REGMAP=y
>>  CONFIG_SPL_REGMAP=y
>>  CONFIG_TPL_REGMAP=y
>> @@ -73,9 +74,11 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
>>  CONFIG_ROCKCHIP_GPIO=y
>>  CONFIG_SYS_I2C_ROCKCHIP=y
>>  CONFIG_MISC=y
>> +CONFIG_ROCKCHIP_EFUSE=y
>>  CONFIG_MMC_DW=y
>>  CONFIG_MMC_DW_ROCKCHIP=y
>>  CONFIG_PHY_REALTEK=y
>> +CONFIG_DM_ETH_PHY=y
>>  CONFIG_PHY_GIGE=y
>>  CONFIG_ETH_DESIGNWARE=y
>>  CONFIG_GMAC_ROCKCHIP=y
>> @@ -95,6 +98,8 @@ CONFIG_PWM_ROCKCHIP=y
>>  CONFIG_RAM=y
>>  CONFIG_SPL_RAM=y
>>  CONFIG_TPL_RAM=y
>> +CONFIG_DM_RNG=y
>> +CONFIG_RNG_ROCKCHIP=y
>>  CONFIG_BAUDRATE=1500000
>>  CONFIG_DEBUG_UART_SHIFT=2
>>  CONFIG_SYS_NS16550_MEM32=y
>> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
>> index de2195deadca..99f48b6d6fa5 100644
>> --- a/doc/board/rockchip/rockchip.rst
>> +++ b/doc/board/rockchip/rockchip.rst
>> @@ -60,8 +60,8 @@ List of mainline supported Rockchip boards:
>>       - ODROID-GO Advance (odroid-go2)
>>  * rk3328
>>       - Rockchip Evb-RK3328 (evb-rk3328)
>> +     - Firefly ROC-RK3328-CC (roc-cc-rk3328)
>>       - Pine64 Rock64 (rock64-rk3328)
>> -     - Firefly-RK3328 (roc-cc-rk3328)
>>       - Radxa Rockpi E (rock-pi-e-rk3328)
>>  * rk3368
>>       - GeekBox (geekbox)
>> --
>> 2.43.0
>>

Re: [PATCH 10/15] rng: rockchip: Use same compatible as linux

[Jonas Karlman]

On 2024-02-07 08:12, Heinrich Schuchardt wrote:
> On 2/7/24 01:02, Jonas Karlman wrote:
>> Replace the rockchip,cryptov1-rng compatible with compatibles used in
>> the linux device tree for RK3288, RK3328 and RK3399 to ease sync of SoC
>> device tree from linux.
>>
>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> 
> It is strange that U-Boot only uses the random number generation while
> Linux only seems to use the crypto algorithm acceleration.
> 
> U-Boot has some crypto accelerator drivers in drivers/crypto/. But here
> we only make use of modular exponentiation (see struct mod_exp_ops). We
> could improve on crypto acceleration.

I believe kaslrseed was the main intended use case of this driver in
U-Boot, and the TRNG feature of crypto hw block can serve that purpose.

Regards,
Jonas

> 
> The current change looks good to me.
> 
> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
> 
>> ---
>>   arch/arm/dts/rk3328-u-boot.dtsi |  2 +-
>>   arch/arm/dts/rk3399-u-boot.dtsi |  2 +-
>>   drivers/rng/rockchip_rng.c      | 10 +++++++++-
>>   3 files changed, 11 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
>> index e087b02893c1..d805c2f394f8 100644
>> --- a/arch/arm/dts/rk3328-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3328-u-boot.dtsi
>> @@ -28,7 +28,7 @@
>>   	};
>>
>>   	rng: rng@ff060000 {
>> -		compatible = "rockchip,cryptov1-rng";
>> +		compatible = "rockchip,rk3328-crypto";
>>   		reg = <0x0 0xff060000 0x0 0x4000>;
>>   		status = "okay";
>>   	};
>> diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
>> index 3423b882c437..87b173e59579 100644
>> --- a/arch/arm/dts/rk3399-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3399-u-boot.dtsi
>> @@ -30,7 +30,7 @@
>>   	};
>>
>>   	rng: rng@ff8b8000 {
>> -		compatible = "rockchip,cryptov1-rng";
>> +		compatible = "rockchip,rk3399-crypto";
>>   		reg = <0x0 0xff8b8000 0x0 0x1000>;
>>   		status = "okay";
>>   	};
>> diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c
>> index 705b424cf3dd..e82b5572fec5 100644
>> --- a/drivers/rng/rockchip_rng.c
>> +++ b/drivers/rng/rockchip_rng.c
>> @@ -302,7 +302,15 @@ static const struct dm_rng_ops rockchip_rng_ops = {
>>
>>   static const struct udevice_id rockchip_rng_match[] = {
>>   	{
>> -		.compatible = "rockchip,cryptov1-rng",
>> +		.compatible = "rockchip,rk3288-crypto",
>> +		.data = (ulong)&rk_cryptov1_soc_data,
>> +	},
>> +	{
>> +		.compatible = "rockchip,rk3328-crypto",
>> +		.data = (ulong)&rk_cryptov1_soc_data,
>> +	},
>> +	{
>> +		.compatible = "rockchip,rk3399-crypto",
>>   		.data = (ulong)&rk_cryptov1_soc_data,
>>   	},
>>   	{
> 

Re: [PATCH 03/15] rockchip: rk3328-rock64: Update defconfig

[Jonas Karlman]

On 2024-02-07 08:53, Matwey V. Kornilov wrote:
> ср, 7 февр. 2024 г. в 03:14, Jonas Karlman <jonas@kwiboo.se>:
>>
>> Update defconfig for rk3328-rock64 with new defaults.
>>
>> Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
> 
> What is abould rockchip-efuse?

The efuse driver is only used in U-Boot proper to read cpuid for serial#
and ethaddr use, there is nothing trying to access efuse in TPL or SPL.

Beside the initialization of efuse block done after commit 5708e8eeae53
("rockchip: rk3328: Set efuse auto mode and timing control"). But that
happens outside the efuse driver, in arch_cpu_init() at SPL.

So it is safe to skip DRIVERS_MISC for TPL/SPL and current intended use
of efuse still continues to work.

Regards,
Jonas

> 
>>
>> Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
>> of FIT images. This help indicate if there is an issue loading any of
>> the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
>> support for scripts.
>>
>> Remove the NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is set
>> based on cpuid read from eFUSE.
>>
>> Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
>>
>> Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY.
>>
>> Also add missing device tree file to MAINTAINERS and add myself as a
>> reviewer for this board.
>>
>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
>> ---
>>  board/rockchip/evb_rk3328/MAINTAINERS | 2 ++
>>  configs/rock64-rk3328_defconfig       | 7 +++++--
>>  2 files changed, 7 insertions(+), 2 deletions(-)
>>
>> diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
>> index dc750bd69426..419bc8ded375 100644
>> --- a/board/rockchip/evb_rk3328/MAINTAINERS
>> +++ b/board/rockchip/evb_rk3328/MAINTAINERS
>> @@ -47,8 +47,10 @@ F:      arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
>>
>>  ROCK64-RK3328
>>  M:      Matwey V. Kornilov <matwey.kornilov@gmail.com>
>> +R:      Jonas Karlman <jonas@kwiboo.se>
>>  S:      Maintained
>>  F:      configs/rock64-rk3328_defconfig
>> +F:      arch/arm/dts/rk3328-rock64.dts
>>  F:      arch/arm/dts/rk3328-rock64-u-boot.dtsi
>>
>>  ROCKPIE-RK3328
>> diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
>> index 0297d098761e..0157a1efe374 100644
>> --- a/configs/rock64-rk3328_defconfig
>> +++ b/configs/rock64-rk3328_defconfig
>> @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
>>  CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
>>  CONFIG_TPL_LIBCOMMON_SUPPORT=y
>>  CONFIG_TPL_LIBGENERIC_SUPPORT=y
>> -CONFIG_SPL_DRIVERS_MISC=y
>>  CONFIG_SPL_STACK_R_ADDR=0x600000
>>  CONFIG_SPL_STACK=0x400000
>>  CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
>> @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
>>  # CONFIG_ANDROID_BOOT_IMAGE is not set
>>  CONFIG_FIT=y
>>  CONFIG_FIT_VERBOSE=y
>> +CONFIG_SPL_FIT_SIGNATURE=y
>>  CONFIG_SPL_LOAD_FIT=y
>> +CONFIG_LEGACY_IMAGE_FORMAT=y
>>  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb"
>>  # CONFIG_DISPLAY_CPUINFO is not set
>>  CONFIG_DISPLAY_BOARDINFO_LATE=y
>> @@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
>>  CONFIG_ENV_IS_IN_MMC=y
>>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>>  CONFIG_SYS_MMC_ENV_DEV=1
>> -CONFIG_NET_RANDOM_ETHADDR=y
>>  CONFIG_TPL_DM=y
>> +CONFIG_SPL_DM_SEQ_ALIAS=y
>>  CONFIG_REGMAP=y
>>  CONFIG_SPL_REGMAP=y
>>  CONFIG_TPL_REGMAP=y
>> @@ -76,6 +77,8 @@ CONFIG_ROCKCHIP_EFUSE=y
>>  CONFIG_MMC_DW=y
>>  CONFIG_MMC_DW_ROCKCHIP=y
>>  CONFIG_SPI_FLASH_GIGADEVICE=y
>> +CONFIG_PHY_REALTEK=y
>> +CONFIG_DM_ETH_PHY=y
>>  CONFIG_ETH_DESIGNWARE=y
>>  CONFIG_GMAC_ROCKCHIP=y
>>  CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>> --
>> 2.43.0
>>
> 
> 

Re: [PATCH 15/15] rockchip: rk3328-orangepi-r1-plus: Enable boot from SPI NOR flash

[Tianling Shen]

Hi Jonas,

On Wed, Feb 7, 2024 at 8:14 AM Jonas Karlman <jonas@kwiboo.se> wrote:
>
> Add Kconfig options to enable support for booting from SPI NOR flash on
> Orange Pi R1 Plus boards.
>
> The generated bootable u-boot-rockchip-spi.bin that can be written to
> 0x0 of SPI NOR flash. The FIT image is loaded from 0x60000, same as on
> RK35xx boards.
>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Thanks for your great work!

Reviewed-by: Tianling Shen <cnsztl@gmail.com>

Best regards,
Tianling.

> ---
>  configs/orangepi-r1-plus-lts-rk3328_defconfig | 8 ++++++++
>  configs/orangepi-r1-plus-rk3328_defconfig     | 8 ++++++++
>  2 files changed, 16 insertions(+)
>
> diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig
> index 937ef003d85b..968110c8cd6f 100644
> --- a/configs/orangepi-r1-plus-lts-rk3328_defconfig
> +++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
> @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus-lts"
>  CONFIG_DM_RESET=y
>  CONFIG_ROCKCHIP_RK3328=y
>  CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>  CONFIG_TPL_LIBCOMMON_SUPPORT=y
>  CONFIG_TPL_LIBGENERIC_SUPPORT=y
>  CONFIG_SPL_STACK_R_ADDR=0x600000
> @@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x400000
>  CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
>  CONFIG_DEBUG_UART_BASE=0xFF130000
>  CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
> +CONFIG_SPL_SPI=y
>  CONFIG_SYS_LOAD_ADDR=0x800800
>  CONFIG_DEBUG_UART=y
>  # CONFIG_ANDROID_BOOT_IMAGE is not set
> @@ -42,6 +45,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
>  CONFIG_SPL_STACK_R=y
>  CONFIG_SPL_I2C=y
>  CONFIG_SPL_POWER=y
> +CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
>  CONFIG_SPL_ATF=y
>  CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
>  CONFIG_TPL_SYS_MALLOC_SIMPLE=y
> @@ -76,7 +81,10 @@ CONFIG_MISC=y
>  CONFIG_ROCKCHIP_EFUSE=y
>  CONFIG_MMC_DW=y
>  CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>  CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_WINBOND=y
>  CONFIG_PHY_MOTORCOMM=y
>  CONFIG_PHY_REALTEK=y
>  CONFIG_DM_ETH_PHY=y
> diff --git a/configs/orangepi-r1-plus-rk3328_defconfig b/configs/orangepi-r1-plus-rk3328_defconfig
> index 563a1ac6ecd4..7038f09f202c 100644
> --- a/configs/orangepi-r1-plus-rk3328_defconfig
> +++ b/configs/orangepi-r1-plus-rk3328_defconfig
> @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus"
>  CONFIG_DM_RESET=y
>  CONFIG_ROCKCHIP_RK3328=y
>  CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>  CONFIG_TPL_LIBCOMMON_SUPPORT=y
>  CONFIG_TPL_LIBGENERIC_SUPPORT=y
>  CONFIG_SPL_STACK_R_ADDR=0x600000
> @@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x400000
>  CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
>  CONFIG_DEBUG_UART_BASE=0xFF130000
>  CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
> +CONFIG_SPL_SPI=y
>  CONFIG_SYS_LOAD_ADDR=0x800800
>  CONFIG_DEBUG_UART=y
>  # CONFIG_ANDROID_BOOT_IMAGE is not set
> @@ -42,6 +45,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
>  CONFIG_SPL_STACK_R=y
>  CONFIG_SPL_I2C=y
>  CONFIG_SPL_POWER=y
> +CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
>  CONFIG_SPL_ATF=y
>  CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
>  CONFIG_TPL_SYS_MALLOC_SIMPLE=y
> @@ -76,7 +81,10 @@ CONFIG_MISC=y
>  CONFIG_ROCKCHIP_EFUSE=y
>  CONFIG_MMC_DW=y
>  CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>  CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_WINBOND=y
>  CONFIG_PHY_MOTORCOMM=y
>  CONFIG_PHY_REALTEK=y
>  CONFIG_DM_ETH_PHY=y
> --
> 2.43.0
>

Re: [PATCH 07/15] rockchip: rk3328-orangepi-r1-plus: Update defconfig

[Tianling Shen]

Hi Jonas,

On Wed, Feb 7, 2024 at 9:06 AM Jonas Karlman <jonas@kwiboo.se> wrote:
>
> Update defconfig for rk3328-orangepi-r1-plus boards with new defaults.
>
> Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
>
> Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
> of FIT images. This help indicate if there is an issue loading any of
> the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
> support for scripts.
>
> Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
> eth1addr is set based on cpuid read from eFUSE.
>
> Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
>
> Add DM_ETH_PHY=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove &gmac2io to
> support reset of onboard ethernet PHYs.
>
> Add PHY_ROCKCHIP_INNO_USB2=y option to support the onboard USB PHY.
>
> Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
> generator.
>
> Also add missing device tree files to MAINTAINERS file.
>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Reviewed-by: Tianling Shen <cnsztl@gmail.com>

Best regards,
Tianling.

> ---
>  arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi |  6 ------
>  arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi     |  6 ------
>  board/rockchip/evb_rk3328/MAINTAINERS                |  2 ++
>  configs/orangepi-r1-plus-lts-rk3328_defconfig        | 12 ++++++++++--
>  configs/orangepi-r1-plus-rk3328_defconfig            | 12 ++++++++++--
>  doc/board/rockchip/rockchip.rst                      |  2 ++
>  6 files changed, 24 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> index 5aaa5ccb15c1..8a4189c6f1cc 100644
> --- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> @@ -28,12 +28,6 @@
>         bootph-pre-ram;
>  };
>
> -&gmac2io {
> -       snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
> -       snps,reset-active-low;
> -       snps,reset-delays-us = <0 10000 50000>;
> -};
> -
>  &spi0 {
>         spi_flash: spiflash@0 {
>                 bootph-all;
> diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> index 6d3db86dce6a..2e3b6a77a268 100644
> --- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> @@ -28,12 +28,6 @@
>         bootph-pre-ram;
>  };
>
> -&gmac2io {
> -       snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
> -       snps,reset-active-low;
> -       snps,reset-delays-us = <0 10000 50000>;
> -};
> -
>  &spi0 {
>         spi_flash: spiflash@0 {
>                 bootph-all;
> diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
> index b88727acad26..675b72dd060c 100644
> --- a/board/rockchip/evb_rk3328/MAINTAINERS
> +++ b/board/rockchip/evb_rk3328/MAINTAINERS
> @@ -32,12 +32,14 @@ ORANGEPI-R1-PLUS-RK3328
>  M:      Tianling Shen <cnsztl@gmail.com>
>  S:      Maintained
>  F:      configs/orangepi-r1-plus-rk3328_defconfig
> +F:      arch/arm/dts/rk3328-orangepi-r1-plus.dts
>  F:      arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
>
>  ORANGEPI-R1-PLUS-LTS-RK3328
>  M:      Tianling Shen <cnsztl@gmail.com>
>  S:      Maintained
>  F:      configs/orangepi-r1-plus-lts-rk3328_defconfig
> +F:      arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
>  F:      arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
>
>  ROC-RK3328-CC
> diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig
> index d3d9417509e9..937ef003d85b 100644
> --- a/configs/orangepi-r1-plus-lts-rk3328_defconfig
> +++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
> @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
>  CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
>  CONFIG_TPL_LIBCOMMON_SUPPORT=y
>  CONFIG_TPL_LIBGENERIC_SUPPORT=y
> -CONFIG_SPL_DRIVERS_MISC=y
>  CONFIG_SPL_STACK_R_ADDR=0x600000
>  CONFIG_SPL_STACK=0x400000
>  CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
> @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
>  # CONFIG_ANDROID_BOOT_IMAGE is not set
>  CONFIG_FIT=y
>  CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_FIT_SIGNATURE=y
>  CONFIG_SPL_LOAD_FIT=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
>  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb"
>  # CONFIG_DISPLAY_CPUINFO is not set
>  CONFIG_DISPLAY_BOARDINFO_LATE=y
> @@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
>  CONFIG_ENV_IS_IN_MMC=y
>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>  CONFIG_SYS_MMC_ENV_DEV=1
> -CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_TPL_DM=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_REGMAP=y
>  CONFIG_SPL_REGMAP=y
>  CONFIG_TPL_REGMAP=y
> @@ -72,11 +73,16 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
>  CONFIG_ROCKCHIP_GPIO=y
>  CONFIG_SYS_I2C_ROCKCHIP=y
>  CONFIG_MISC=y
> +CONFIG_ROCKCHIP_EFUSE=y
>  CONFIG_MMC_DW=y
>  CONFIG_MMC_DW_ROCKCHIP=y
>  CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_PHY_MOTORCOMM=y
> +CONFIG_PHY_REALTEK=y
> +CONFIG_DM_ETH_PHY=y
>  CONFIG_ETH_DESIGNWARE=y
>  CONFIG_GMAC_ROCKCHIP=y
> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>  CONFIG_PINCTRL=y
>  CONFIG_SPL_PINCTRL=y
>  CONFIG_DM_PMIC=y
> @@ -91,6 +97,8 @@ CONFIG_PWM_ROCKCHIP=y
>  CONFIG_RAM=y
>  CONFIG_SPL_RAM=y
>  CONFIG_TPL_RAM=y
> +CONFIG_DM_RNG=y
> +CONFIG_RNG_ROCKCHIP=y
>  CONFIG_BAUDRATE=1500000
>  CONFIG_DEBUG_UART_SHIFT=2
>  CONFIG_SYS_NS16550_MEM32=y
> diff --git a/configs/orangepi-r1-plus-rk3328_defconfig b/configs/orangepi-r1-plus-rk3328_defconfig
> index 9356e87132e7..563a1ac6ecd4 100644
> --- a/configs/orangepi-r1-plus-rk3328_defconfig
> +++ b/configs/orangepi-r1-plus-rk3328_defconfig
> @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
>  CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
>  CONFIG_TPL_LIBCOMMON_SUPPORT=y
>  CONFIG_TPL_LIBGENERIC_SUPPORT=y
> -CONFIG_SPL_DRIVERS_MISC=y
>  CONFIG_SPL_STACK_R_ADDR=0x600000
>  CONFIG_SPL_STACK=0x400000
>  CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
> @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
>  # CONFIG_ANDROID_BOOT_IMAGE is not set
>  CONFIG_FIT=y
>  CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_FIT_SIGNATURE=y
>  CONFIG_SPL_LOAD_FIT=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
>  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus.dtb"
>  # CONFIG_DISPLAY_CPUINFO is not set
>  CONFIG_DISPLAY_BOARDINFO_LATE=y
> @@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
>  CONFIG_ENV_IS_IN_MMC=y
>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>  CONFIG_SYS_MMC_ENV_DEV=1
> -CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_TPL_DM=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_REGMAP=y
>  CONFIG_SPL_REGMAP=y
>  CONFIG_TPL_REGMAP=y
> @@ -72,11 +73,16 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
>  CONFIG_ROCKCHIP_GPIO=y
>  CONFIG_SYS_I2C_ROCKCHIP=y
>  CONFIG_MISC=y
> +CONFIG_ROCKCHIP_EFUSE=y
>  CONFIG_MMC_DW=y
>  CONFIG_MMC_DW_ROCKCHIP=y
>  CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_PHY_MOTORCOMM=y
> +CONFIG_PHY_REALTEK=y
> +CONFIG_DM_ETH_PHY=y
>  CONFIG_ETH_DESIGNWARE=y
>  CONFIG_GMAC_ROCKCHIP=y
> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>  CONFIG_PINCTRL=y
>  CONFIG_SPL_PINCTRL=y
>  CONFIG_DM_PMIC=y
> @@ -91,6 +97,8 @@ CONFIG_PWM_ROCKCHIP=y
>  CONFIG_RAM=y
>  CONFIG_SPL_RAM=y
>  CONFIG_TPL_RAM=y
> +CONFIG_DM_RNG=y
> +CONFIG_RNG_ROCKCHIP=y
>  CONFIG_BAUDRATE=1500000
>  CONFIG_DEBUG_UART_SHIFT=2
>  CONFIG_SYS_NS16550_MEM32=y
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index 77360e0ff155..f65381cc7b0b 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -66,6 +66,8 @@ List of mainline supported Rockchip boards:
>       - FriendlyElec NanoPi R2S (nanopi-r2s-rk3328)
>       - Pine64 Rock64 (rock64-rk3328)
>       - Radxa ROCK Pi E (rock-pi-e-rk3328)
> +     - Xunlong Orange Pi R1 Plus (orangepi-r1-plus-rk3328)
> +     - Xunlong Orange Pi R1 Plus LTS (orangepi-r1-plus-lts-rk3328)
>  * rk3368
>       - GeekBox (geekbox)
>       - PX5 EVB (evb-px5)
> --
> 2.43.0
>

Re: [PATCH 13/15] rockchip: rk3328: Add support to build bootable SPI image

[Dragan Simic]

Hello Jonas,

On 2024-02-07 01:02, Jonas Karlman wrote:
> Similar to RK35xx the BootRom in RK3328 can read all data and look for
> idbloader at 0x8000, same as on SD and eMMC.
> 
> Use the rksd format and modify the mkimage offset to generate a 
> bootable
> u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash.
> 
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Could you, please, clarify a bit why the "rkspi" format isn't used
instead of "rksd"?

> ---
>  arch/arm/dts/rk3328-u-boot.dtsi        | 11 +++++++++++
>  arch/arm/mach-rockchip/rk3328/rk3328.c |  1 +
>  2 files changed, 12 insertions(+)
> 
> diff --git a/arch/arm/dts/rk3328-u-boot.dtsi 
> b/arch/arm/dts/rk3328-u-boot.dtsi
> index b90d78878d77..2a5dca97dd4b 100644
> --- a/arch/arm/dts/rk3328-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-u-boot.dtsi
> @@ -120,3 +120,14 @@
>  &usb20_otg {
>  	hnp-srp-disable;
>  };
> +
> +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
> +&binman {
> +	simple-bin-spi {
> +		mkimage {
> +			args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
> +			offset = <0x8000>;
> +		};
> +	};
> +};
> +#endif
> diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c
> b/arch/arm/mach-rockchip/rk3328/rk3328.c
> index b591d38fe412..b82b209de9e2 100644
> --- a/arch/arm/mach-rockchip/rk3328/rk3328.c
> +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
> @@ -36,6 +36,7 @@
> 
>  const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
>  	[BROM_BOOTSOURCE_EMMC] = "/mmc@ff520000",
> +	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff190000/flash@0",
>  	[BROM_BOOTSOURCE_SD] = "/mmc@ff500000",
>  };

Re: [PATCH 13/15] rockchip: rk3328: Add support to build bootable SPI image

[Jonas Karlman]

Hi Dragan,

On 2024-02-08 04:53, Dragan Simic wrote:
> Hello Jonas,
> 
> On 2024-02-07 01:02, Jonas Karlman wrote:
>> Similar to RK35xx the BootRom in RK3328 can read all data and look for
>> idbloader at 0x8000, same as on SD and eMMC.
>>
>> Use the rksd format and modify the mkimage offset to generate a 
>> bootable
>> u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash.
>>
>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> 
> Could you, please, clarify a bit why the "rkspi" format isn't used
> instead of "rksd"?

Not really sure how I can clarify this.

As stated in commit message, the bootrom will read all bytes and use
same boot offset as the sd/emmc-format. The "legacy" spi-format only
read first 2kb of each 4kb of storage, see tools/rkspi.c.

A few bootrom versions:
- rk3288: 320A 20131116 V100
- rk3399: 330C 20160118 V100
- rk3328: 320C 20161117 V100
- rk3308: 330E 20180203 V100

I am not sure if the rkspi format must be used for all bootrom prior to
and including rk3399 and all versions after that should use the rksd
format. I have only ever used boot from spi flash on rk3399, rk3328 and
rk35xx. And for those that has been true.

Regards,
Jonas

> 
>> ---
>>  arch/arm/dts/rk3328-u-boot.dtsi        | 11 +++++++++++
>>  arch/arm/mach-rockchip/rk3328/rk3328.c |  1 +
>>  2 files changed, 12 insertions(+)
>>
>> diff --git a/arch/arm/dts/rk3328-u-boot.dtsi 
>> b/arch/arm/dts/rk3328-u-boot.dtsi
>> index b90d78878d77..2a5dca97dd4b 100644
>> --- a/arch/arm/dts/rk3328-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3328-u-boot.dtsi
>> @@ -120,3 +120,14 @@
>>  &usb20_otg {
>>  	hnp-srp-disable;
>>  };
>> +
>> +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
>> +&binman {
>> +	simple-bin-spi {
>> +		mkimage {
>> +			args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
>> +			offset = <0x8000>;
>> +		};
>> +	};
>> +};
>> +#endif
>> diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c
>> b/arch/arm/mach-rockchip/rk3328/rk3328.c
>> index b591d38fe412..b82b209de9e2 100644
>> --- a/arch/arm/mach-rockchip/rk3328/rk3328.c
>> +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
>> @@ -36,6 +36,7 @@
>>
>>  const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
>>  	[BROM_BOOTSOURCE_EMMC] = "/mmc@ff520000",
>> +	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff190000/flash@0",
>>  	[BROM_BOOTSOURCE_SD] = "/mmc@ff500000",
>>  };

Re: [PATCH 13/15] rockchip: rk3328: Add support to build bootable SPI image

[Da Xue]

On Wed, Feb 7, 2024 at 10:53 PM Dragan Simic <dsimic@manjaro.org> wrote:
>
> Hello Jonas,
>
> On 2024-02-07 01:02, Jonas Karlman wrote:
> > Similar to RK35xx the BootRom in RK3328 can read all data and look for
> > idbloader at 0x8000, same as on SD and eMMC.
> >
> > Use the rksd format and modify the mkimage offset to generate a
> > bootable
> > u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash.
> >
> > Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
>
> Could you, please, clarify a bit why the "rkspi" format isn't used
> instead of "rksd"?

"The SPI code has a bug that means that the 2 KiB blocks in which the
bootloader is loaded have a stride of 4KiB, leaving the 2KiB inbetween
as unused padding."

RK3399 has the 2K SPI bug and necessitated the rkspi format. RK3328
came after RK3399 and resolved this bug so the SPI and MMC formats are
now the same.

I verified on a ROC-RK3328-CC-V2.

>
> > ---
> >  arch/arm/dts/rk3328-u-boot.dtsi        | 11 +++++++++++
> >  arch/arm/mach-rockchip/rk3328/rk3328.c |  1 +
> >  2 files changed, 12 insertions(+)
> >
> > diff --git a/arch/arm/dts/rk3328-u-boot.dtsi
> > b/arch/arm/dts/rk3328-u-boot.dtsi
> > index b90d78878d77..2a5dca97dd4b 100644
> > --- a/arch/arm/dts/rk3328-u-boot.dtsi
> > +++ b/arch/arm/dts/rk3328-u-boot.dtsi
> > @@ -120,3 +120,14 @@
> >  &usb20_otg {
> >       hnp-srp-disable;
> >  };
> > +
> > +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
> > +&binman {
> > +     simple-bin-spi {
> > +             mkimage {
> > +                     args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
> > +                     offset = <0x8000>;
> > +             };
> > +     };
> > +};
> > +#endif
> > diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c
> > b/arch/arm/mach-rockchip/rk3328/rk3328.c
> > index b591d38fe412..b82b209de9e2 100644
> > --- a/arch/arm/mach-rockchip/rk3328/rk3328.c
> > +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
> > @@ -36,6 +36,7 @@
> >
> >  const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
> >       [BROM_BOOTSOURCE_EMMC] = "/mmc@ff520000",
> > +     [BROM_BOOTSOURCE_SPINOR] = "/spi@ff190000/flash@0",
> >       [BROM_BOOTSOURCE_SD] = "/mmc@ff500000",
> >  };

Re: [PATCH 00/15] rockchip: rk3328: Update defconfigs, DTs and enable boot from SPI

[John Clark]

On 2/6/24 7:02 PM, Jonas Karlman wrote:
> This series contains miscellaneous updates to defconfigs, syncs latest
> device trees from linux, fixes an issue loading FIT from SD-card when
> running SPL from eMMC and enables building a bootable SPI image on
> RK3328 boards.
>
> I am also adding myself as a reviewer for the three RK3328 boards I own.
>
> Patch 1-7 updates boards to enable similar Kconfig options and use a
> common order for from where to try and load FIT.
>
> Patch 8 fix loading FIT from SD-card when booting from eMMC by using
> pinctrl for emmc and sdmmc in SPL.
>
> Patch 9-10 makes rockchip gpio and rng driver compatible with linux.
>
> Patch 11 sync latest rk3328 device tree files from linux v6.8-rc1.
>
> Patch 12 reverts an old commit that added duplicated code.
>
> Patch 13-15 enables building u-boot-rockchip-spi.bin for boards with
> SPI flash.
>
> This series depends on the "rockchip: Fix ethernet on Radxa ROCK Pi E
> v1.21" series at [1].
>
> [1] https://patchwork.ozlabs.org/cover/1887729/
>
> Jonas Karlman (15):
>    rockchip: rk3328: Update default u-boot,spl-boot-order prop
>    rockchip: rk3328-evb: Update defconfig
>    rockchip: rk3328-rock64: Update defconfig
>    rockchip: rk3328-roc-cc: Update defconfig
>    rockchip: rk3328-rock-pi-e: Update defconfig
>    rockchip: rk3328-nanopi-r2: Update defconfig
>    rockchip: rk3328-orangepi-r1-plus: Update defconfig
>    rockchip: rk3328: Fix loading FIT from SD-card when booting from eMMC
>    gpio: rockchip: Use gpio alias id as gpio bank id
>    rng: rockchip: Use same compatible as linux
>    rockchip: rk3328: Sync device tree from linux v6.8-rc1
>    Revert "rockchip: Allow booting from SPI"
>    rockchip: rk3328: Add support to build bootable SPI image
>    rockchip: rk3328-rock64: Enable boot from SPI NOR flash
>    rockchip: rk3328-orangepi-r1-plus: Enable boot from SPI NOR flash
>
>   arch/arm/dts/rk3328-evb-u-boot.dtsi           |  4 +
>   arch/arm/dts/rk3328-evb.dts                   |  1 +
>   .../dts/rk3328-nanopi-r2c-plus-u-boot.dtsi    |  6 --
>   arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi    | 28 ------
>   arch/arm/dts/rk3328-nanopi-r2s.dts            |  3 +-
>   .../rk3328-orangepi-r1-plus-lts-u-boot.dtsi   | 36 ++-----
>   arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts  |  4 +-
>   .../dts/rk3328-orangepi-r1-plus-u-boot.dtsi   | 36 ++-----
>   arch/arm/dts/rk3328-orangepi-r1-plus.dts      |  1 +
>   arch/arm/dts/rk3328-roc-cc-u-boot.dtsi        | 22 +----
>   arch/arm/dts/rk3328-roc-cc.dts                |  3 +-
>   arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi     | 17 ----
>   arch/arm/dts/rk3328-rock-pi-e.dts             | 55 +++++++++++
>   arch/arm/dts/rk3328-rock64-u-boot.dtsi        | 30 ++----
>   arch/arm/dts/rk3328-rock64.dts                |  1 +
>   arch/arm/dts/rk3328-u-boot.dtsi               | 99 +++++++++++++++----
>   arch/arm/dts/rk3328.dtsi                      | 64 +++++++++---
>   arch/arm/dts/rk3399-u-boot.dtsi               |  2 +-
>   arch/arm/mach-rockchip/rk3328/rk3328.c        |  1 +
>   arch/arm/mach-rockchip/spl-boot-order.c       |  3 -
>   board/rockchip/evb_rk3328/MAINTAINERS         | 11 +++
>   board/rockchip/evb_rk3328/README              | 70 -------------
>   configs/evb-rk3328_defconfig                  | 16 ++-
>   configs/nanopi-r2c-plus-rk3328_defconfig      | 11 ++-
>   configs/nanopi-r2c-rk3328_defconfig           | 11 ++-
>   configs/nanopi-r2s-rk3328_defconfig           | 11 ++-
>   configs/orangepi-r1-plus-lts-rk3328_defconfig | 20 +++-
>   configs/orangepi-r1-plus-rk3328_defconfig     | 20 +++-
>   configs/roc-cc-rk3328_defconfig               |  9 +-
>   configs/rock-pi-e-rk3328_defconfig            | 10 +-
>   configs/rock64-rk3328_defconfig               | 15 ++-
>   doc/board/rockchip/rockchip.rst               |  9 +-
>   drivers/gpio/rk_gpio.c                        |  7 +-
>   drivers/rng/rockchip_rng.c                    | 10 +-
>   34 files changed, 351 insertions(+), 295 deletions(-)
>   delete mode 100644 board/rockchip/evb_rk3328/README
>
nice cleanup, great work

Re: [PATCH 13/15] rockchip: rk3328: Add support to build bootable SPI image

[Dragan Simic]

Hello Jonas,

On 2024-02-08 22:54, Jonas Karlman wrote:
> On 2024-02-08 04:53, Dragan Simic wrote:
>> On 2024-02-07 01:02, Jonas Karlman wrote:
>>> Similar to RK35xx the BootRom in RK3328 can read all data and look 
>>> for
>>> idbloader at 0x8000, same as on SD and eMMC.
>>> 
>>> Use the rksd format and modify the mkimage offset to generate a
>>> bootable
>>> u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash.
>>> 
>>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
>> 
>> Could you, please, clarify a bit why the "rkspi" format isn't used
>> instead of "rksd"?
> 
> Not really sure how I can clarify this.
> 
> As stated in commit message, the bootrom will read all bytes and use
> same boot offset as the sd/emmc-format. The "legacy" spi-format only
> read first 2kb of each 4kb of storage, see tools/rkspi.c.
> 
> A few bootrom versions:
> - rk3288: 320A 20131116 V100
> - rk3399: 330C 20160118 V100
> - rk3328: 320C 20161117 V100
> - rk3308: 330E 20180203 V100
> 
> I am not sure if the rkspi format must be used for all bootrom prior to
> and including rk3399 and all versions after that should use the rksd
> format. I have only ever used boot from spi flash on rk3399, rk3328 and
> rk35xx. And for those that has been true.

Ah, thank you very much for refreshing my memory.  I somehow forgot 
about
the bug that the RK3399 BROM suffers from.

Please see also one small suggestion below.

>>> ---
>>>  arch/arm/dts/rk3328-u-boot.dtsi        | 11 +++++++++++
>>>  arch/arm/mach-rockchip/rk3328/rk3328.c |  1 +
>>>  2 files changed, 12 insertions(+)
>>> 
>>> diff --git a/arch/arm/dts/rk3328-u-boot.dtsi
>>> b/arch/arm/dts/rk3328-u-boot.dtsi
>>> index b90d78878d77..2a5dca97dd4b 100644
>>> --- a/arch/arm/dts/rk3328-u-boot.dtsi
>>> +++ b/arch/arm/dts/rk3328-u-boot.dtsi
>>> @@ -120,3 +120,14 @@
>>>  &usb20_otg {
>>>  	hnp-srp-disable;
>>>  };
>>> +
>>> +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
>>> +&binman {
>>> +	simple-bin-spi {
>>> +		mkimage {
>>> +			args = "-n", CONFIG_SYS_SOC, "-T", "rksd";

Perhaps there's no need to use CONFIG_SYS_SOC there, because this is an
U-Boot SoC dtsi specific to the RK3328.  Furthermore, I find it much 
more
readable (and grep-able, which is also important) when the exact name of
the SoC is specified here.

This note also applies to the other U-Boot SoC dtsi files.

>>> +			offset = <0x8000>;
>>> +		};
>>> +	};
>>> +};
>>> +#endif
>>> diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c
>>> b/arch/arm/mach-rockchip/rk3328/rk3328.c
>>> index b591d38fe412..b82b209de9e2 100644
>>> --- a/arch/arm/mach-rockchip/rk3328/rk3328.c
>>> +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
>>> @@ -36,6 +36,7 @@
>>> 
>>>  const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
>>>  	[BROM_BOOTSOURCE_EMMC] = "/mmc@ff520000",
>>> +	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff190000/flash@0",
>>>  	[BROM_BOOTSOURCE_SD] = "/mmc@ff500000",
>>>  };

Re: [PATCH 13/15] rockchip: rk3328: Add support to build bootable SPI image

[Dragan Simic]

Hello Da Xue,

On 2024-02-09 02:57, Da Xue wrote:
> On Wed, Feb 7, 2024 at 10:53 PM Dragan Simic <dsimic@manjaro.org> 
> wrote:
>> On 2024-02-07 01:02, Jonas Karlman wrote:
>> > Similar to RK35xx the BootRom in RK3328 can read all data and look for
>> > idbloader at 0x8000, same as on SD and eMMC.
>> >
>> > Use the rksd format and modify the mkimage offset to generate a
>> > bootable
>> > u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash.
>> >
>> > Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
>> 
>> Could you, please, clarify a bit why the "rkspi" format isn't used
>> instead of "rksd"?
> 
> "The SPI code has a bug that means that the 2 KiB blocks in which the
> bootloader is loaded have a stride of 4KiB, leaving the 2KiB inbetween
> as unused padding."
> 
> RK3399 has the 2K SPI bug and necessitated the rkspi format. RK3328
> came after RK3399 and resolved this bug so the SPI and MMC formats are
> now the same.
> 
> I verified on a ROC-RK3328-CC-V2.

Thank you very much too, for refreshing my memory.  I somehow forgot 
about
the bug that the RK3399 BROM suffers from.


>> > ---
>> >  arch/arm/dts/rk3328-u-boot.dtsi        | 11 +++++++++++
>> >  arch/arm/mach-rockchip/rk3328/rk3328.c |  1 +
>> >  2 files changed, 12 insertions(+)
>> >
>> > diff --git a/arch/arm/dts/rk3328-u-boot.dtsi
>> > b/arch/arm/dts/rk3328-u-boot.dtsi
>> > index b90d78878d77..2a5dca97dd4b 100644
>> > --- a/arch/arm/dts/rk3328-u-boot.dtsi
>> > +++ b/arch/arm/dts/rk3328-u-boot.dtsi
>> > @@ -120,3 +120,14 @@
>> >  &usb20_otg {
>> >       hnp-srp-disable;
>> >  };
>> > +
>> > +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
>> > +&binman {
>> > +     simple-bin-spi {
>> > +             mkimage {
>> > +                     args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
>> > +                     offset = <0x8000>;
>> > +             };
>> > +     };
>> > +};
>> > +#endif
>> > diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c
>> > b/arch/arm/mach-rockchip/rk3328/rk3328.c
>> > index b591d38fe412..b82b209de9e2 100644
>> > --- a/arch/arm/mach-rockchip/rk3328/rk3328.c
>> > +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
>> > @@ -36,6 +36,7 @@
>> >
>> >  const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
>> >       [BROM_BOOTSOURCE_EMMC] = "/mmc@ff520000",
>> > +     [BROM_BOOTSOURCE_SPINOR] = "/spi@ff190000/flash@0",
>> >       [BROM_BOOTSOURCE_SD] = "/mmc@ff500000",
>> >  };

Re: [PATCH 14/15] rockchip: rk3328-rock64: Enable boot from SPI NOR flash

[Dragan Simic]

On 2024-02-07 01:02, Jonas Karlman wrote:
> Add Kconfig options to enable support for booting from SPI NOR flash on
> Pine64 Rock64.
> 
> The generated bootable u-boot-rockchip-spi.bin that can be written to
> 0x0 of SPI NOR flash. The FIT image is loaded from 0x60000, same as on
> RK35xx boards.
> 
>   => sf probe
>   SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, 
> total 16 MiB
> 
>   => load mmc 1:1 10000000 u-boot-rockchip-spi.bin
>   1359872 bytes read in 65 ms (20 MiB/s)
> 
>   => sf update $fileaddr 0 $filesize
>   device 0 offset 0x0, size 0x14c000
>   1118208 bytes written, 241664 bytes skipped in 8.516s, speed 163516 
> B/s
> 
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>

Looking good to me.  I'm just not sure that we need to support multiple
SPI chip brands, because I can't recall that the Rock64 has been shipped
with different SPI chips, but perhaps better safe than sorry.

Reviewed-by: Dragan Simic <dsimic@manjaro.org>

> ---
>  configs/rock64-rk3328_defconfig | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/configs/rock64-rk3328_defconfig 
> b/configs/rock64-rk3328_defconfig
> index 0157a1efe374..01e447448513 100644
> --- a/configs/rock64-rk3328_defconfig
> +++ b/configs/rock64-rk3328_defconfig
> @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64"
>  CONFIG_DM_RESET=y
>  CONFIG_ROCKCHIP_RK3328=y
>  CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>  CONFIG_TPL_LIBCOMMON_SUPPORT=y
>  CONFIG_TPL_LIBGENERIC_SUPPORT=y
>  CONFIG_SPL_STACK_R_ADDR=0x600000
> @@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x400000
>  CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
>  CONFIG_DEBUG_UART_BASE=0xFF130000
>  CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
> +CONFIG_SPL_SPI=y
>  CONFIG_SYS_LOAD_ADDR=0x800800
>  CONFIG_DEBUG_UART=y
>  # CONFIG_ANDROID_BOOT_IMAGE is not set
> @@ -42,6 +45,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
>  CONFIG_SPL_STACK_R=y
>  CONFIG_SPL_I2C=y
>  CONFIG_SPL_POWER=y
> +CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
>  CONFIG_SPL_ATF=y
>  CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
>  CONFIG_TPL_SYS_MALLOC_SIMPLE=y
> @@ -76,7 +81,10 @@ CONFIG_MISC=y
>  CONFIG_ROCKCHIP_EFUSE=y
>  CONFIG_MMC_DW=y
>  CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>  CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_WINBOND=y
>  CONFIG_PHY_REALTEK=y
>  CONFIG_DM_ETH_PHY=y
>  CONFIG_ETH_DESIGNWARE=y

Re: [PATCH 13/15] rockchip: rk3328: Add support to build bootable SPI image

[Jonas Karlman]

Hi Dragan,

On 2024-02-10 18:18, Dragan Simic wrote:
> Hello Jonas,
> 
> On 2024-02-08 22:54, Jonas Karlman wrote:
>> On 2024-02-08 04:53, Dragan Simic wrote:
>>> On 2024-02-07 01:02, Jonas Karlman wrote:
>>>> Similar to RK35xx the BootRom in RK3328 can read all data and look 
>>>> for
>>>> idbloader at 0x8000, same as on SD and eMMC.
>>>>
>>>> Use the rksd format and modify the mkimage offset to generate a
>>>> bootable
>>>> u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash.
>>>>
>>>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
>>>
>>> Could you, please, clarify a bit why the "rkspi" format isn't used
>>> instead of "rksd"?
>>
>> Not really sure how I can clarify this.
>>
>> As stated in commit message, the bootrom will read all bytes and use
>> same boot offset as the sd/emmc-format. The "legacy" spi-format only
>> read first 2kb of each 4kb of storage, see tools/rkspi.c.
>>
>> A few bootrom versions:
>> - rk3288: 320A 20131116 V100
>> - rk3399: 330C 20160118 V100
>> - rk3328: 320C 20161117 V100
>> - rk3308: 330E 20180203 V100
>>
>> I am not sure if the rkspi format must be used for all bootrom prior to
>> and including rk3399 and all versions after that should use the rksd
>> format. I have only ever used boot from spi flash on rk3399, rk3328 and
>> rk35xx. And for those that has been true.
> 
> Ah, thank you very much for refreshing my memory.  I somehow forgot 
> about
> the bug that the RK3399 BROM suffers from.
> 
> Please see also one small suggestion below.
> 
>>>> ---
>>>>  arch/arm/dts/rk3328-u-boot.dtsi        | 11 +++++++++++
>>>>  arch/arm/mach-rockchip/rk3328/rk3328.c |  1 +
>>>>  2 files changed, 12 insertions(+)
>>>>
>>>> diff --git a/arch/arm/dts/rk3328-u-boot.dtsi
>>>> b/arch/arm/dts/rk3328-u-boot.dtsi
>>>> index b90d78878d77..2a5dca97dd4b 100644
>>>> --- a/arch/arm/dts/rk3328-u-boot.dtsi
>>>> +++ b/arch/arm/dts/rk3328-u-boot.dtsi
>>>> @@ -120,3 +120,14 @@
>>>>  &usb20_otg {
>>>>  	hnp-srp-disable;
>>>>  };
>>>> +
>>>> +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
>>>> +&binman {
>>>> +	simple-bin-spi {
>>>> +		mkimage {
>>>> +			args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
> 
> Perhaps there's no need to use CONFIG_SYS_SOC there, because this is an
> U-Boot SoC dtsi specific to the RK3328.  Furthermore, I find it much 
> more
> readable (and grep-able, which is also important) when the exact name of
> the SoC is specified here.
> 
> This note also applies to the other U-Boot SoC dtsi files.

Consistency is my main concern so I would rather keep using SYS_SOC, it
is already being used at the two other override locations.

If we can get confirmation that it is brom in SoCs chronologically up to
and including rk3399 that is affected by the read 2kb per 4kb of spi
issue we should be able to rework this into a more proper and future
proof way.

Regards,
Jonas

> 
>>>> +			offset = <0x8000>;
>>>> +		};
>>>> +	};
>>>> +};
>>>> +#endif
>>>> diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c
>>>> b/arch/arm/mach-rockchip/rk3328/rk3328.c
>>>> index b591d38fe412..b82b209de9e2 100644
>>>> --- a/arch/arm/mach-rockchip/rk3328/rk3328.c
>>>> +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
>>>> @@ -36,6 +36,7 @@
>>>>
>>>>  const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
>>>>  	[BROM_BOOTSOURCE_EMMC] = "/mmc@ff520000",
>>>> +	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff190000/flash@0",
>>>>  	[BROM_BOOTSOURCE_SD] = "/mmc@ff500000",
>>>>  };

Re: [PATCH 14/15] rockchip: rk3328-rock64: Enable boot from SPI NOR flash

[Jonas Karlman]

On 2024-02-10 19:31, Dragan Simic wrote:
> On 2024-02-07 01:02, Jonas Karlman wrote:
>> Add Kconfig options to enable support for booting from SPI NOR flash on
>> Pine64 Rock64.
>>
>> The generated bootable u-boot-rockchip-spi.bin that can be written to
>> 0x0 of SPI NOR flash. The FIT image is loaded from 0x60000, same as on
>> RK35xx boards.
>>
>>   => sf probe
>>   SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, 
>> total 16 MiB
>>
>>   => load mmc 1:1 10000000 u-boot-rockchip-spi.bin
>>   1359872 bytes read in 65 ms (20 MiB/s)
>>
>>   => sf update $fileaddr 0 $filesize
>>   device 0 offset 0x0, size 0x14c000
>>   1118208 bytes written, 241664 bytes skipped in 8.516s, speed 163516 
>> B/s
>>
>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> 
> Looking good to me.  I'm just not sure that we need to support multiple
> SPI chip brands, because I can't recall that the Rock64 has been shipped
> with different SPI chips, but perhaps better safe than sorry.

Main reason was that rock64 v3 does not come with a spi flash, and the
rock64 wiki link to datasheet for both gigadevice and winbond, and in
order to keep consistent with the orangepi r1 plus board that use
macronix in its schematics.

Regards,
Jonas

> 
> Reviewed-by: Dragan Simic <dsimic@manjaro.org>
> 
>> ---
>>  configs/rock64-rk3328_defconfig | 8 ++++++++
>>  1 file changed, 8 insertions(+)
>>
>> diff --git a/configs/rock64-rk3328_defconfig 
>> b/configs/rock64-rk3328_defconfig
>> index 0157a1efe374..01e447448513 100644
>> --- a/configs/rock64-rk3328_defconfig
>> +++ b/configs/rock64-rk3328_defconfig
>> @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64"
>>  CONFIG_DM_RESET=y
>>  CONFIG_ROCKCHIP_RK3328=y
>>  CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
>> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>>  CONFIG_TPL_LIBCOMMON_SUPPORT=y
>>  CONFIG_TPL_LIBGENERIC_SUPPORT=y
>>  CONFIG_SPL_STACK_R_ADDR=0x600000
>> @@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x400000
>>  CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
>>  CONFIG_DEBUG_UART_BASE=0xFF130000
>>  CONFIG_DEBUG_UART_CLOCK=24000000
>> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
>> +CONFIG_SPL_SPI=y
>>  CONFIG_SYS_LOAD_ADDR=0x800800
>>  CONFIG_DEBUG_UART=y
>>  # CONFIG_ANDROID_BOOT_IMAGE is not set
>> @@ -42,6 +45,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
>>  CONFIG_SPL_STACK_R=y
>>  CONFIG_SPL_I2C=y
>>  CONFIG_SPL_POWER=y
>> +CONFIG_SPL_SPI_LOAD=y
>> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
>>  CONFIG_SPL_ATF=y
>>  CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
>>  CONFIG_TPL_SYS_MALLOC_SIMPLE=y
>> @@ -76,7 +81,10 @@ CONFIG_MISC=y
>>  CONFIG_ROCKCHIP_EFUSE=y
>>  CONFIG_MMC_DW=y
>>  CONFIG_MMC_DW_ROCKCHIP=y
>> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>>  CONFIG_SPI_FLASH_GIGADEVICE=y
>> +CONFIG_SPI_FLASH_MACRONIX=y
>> +CONFIG_SPI_FLASH_WINBOND=y
>>  CONFIG_PHY_REALTEK=y
>>  CONFIG_DM_ETH_PHY=y
>>  CONFIG_ETH_DESIGNWARE=y

Re: [PATCH 14/15] rockchip: rk3328-rock64: Enable boot from SPI NOR flash

[Dragan Simic]

On 2024-02-10 20:38, Jonas Karlman wrote:
> On 2024-02-10 19:31, Dragan Simic wrote:
>> On 2024-02-07 01:02, Jonas Karlman wrote:
>>> Add Kconfig options to enable support for booting from SPI NOR flash 
>>> on
>>> Pine64 Rock64.
>>> 
>>> The generated bootable u-boot-rockchip-spi.bin that can be written to
>>> 0x0 of SPI NOR flash. The FIT image is loaded from 0x60000, same as 
>>> on
>>> RK35xx boards.
>>> 
>>>   => sf probe
>>>   SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB,
>>> total 16 MiB
>>> 
>>>   => load mmc 1:1 10000000 u-boot-rockchip-spi.bin
>>>   1359872 bytes read in 65 ms (20 MiB/s)
>>> 
>>>   => sf update $fileaddr 0 $filesize
>>>   device 0 offset 0x0, size 0x14c000
>>>   1118208 bytes written, 241664 bytes skipped in 8.516s, speed 163516
>>> B/s
>>> 
>>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
>> 
>> Looking good to me.  I'm just not sure that we need to support 
>> multiple
>> SPI chip brands, because I can't recall that the Rock64 has been 
>> shipped
>> with different SPI chips, but perhaps better safe than sorry.
> 
> Main reason was that rock64 v3 does not come with a spi flash, and the
> rock64 wiki link to datasheet for both gigadevice and winbond, and in
> order to keep consistent with the orangepi r1 plus board that use
> macronix in its schematics.

Makes sense, so there's higher chance that an SPI chip selected by
the board user is already supported.  Maybe even CONFIG_SPI_FLASH_XTX
could also be added.

>> Reviewed-by: Dragan Simic <dsimic@manjaro.org>
>> 
>>> ---
>>>  configs/rock64-rk3328_defconfig | 8 ++++++++
>>>  1 file changed, 8 insertions(+)
>>> 
>>> diff --git a/configs/rock64-rk3328_defconfig
>>> b/configs/rock64-rk3328_defconfig
>>> index 0157a1efe374..01e447448513 100644
>>> --- a/configs/rock64-rk3328_defconfig
>>> +++ b/configs/rock64-rk3328_defconfig
>>> @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64"
>>>  CONFIG_DM_RESET=y
>>>  CONFIG_ROCKCHIP_RK3328=y
>>>  CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
>>> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>>>  CONFIG_TPL_LIBCOMMON_SUPPORT=y
>>>  CONFIG_TPL_LIBGENERIC_SUPPORT=y
>>>  CONFIG_SPL_STACK_R_ADDR=0x600000
>>> @@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x400000
>>>  CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
>>>  CONFIG_DEBUG_UART_BASE=0xFF130000
>>>  CONFIG_DEBUG_UART_CLOCK=24000000
>>> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
>>> +CONFIG_SPL_SPI=y
>>>  CONFIG_SYS_LOAD_ADDR=0x800800
>>>  CONFIG_DEBUG_UART=y
>>>  # CONFIG_ANDROID_BOOT_IMAGE is not set
>>> @@ -42,6 +45,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
>>>  CONFIG_SPL_STACK_R=y
>>>  CONFIG_SPL_I2C=y
>>>  CONFIG_SPL_POWER=y
>>> +CONFIG_SPL_SPI_LOAD=y
>>> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
>>>  CONFIG_SPL_ATF=y
>>>  CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
>>>  CONFIG_TPL_SYS_MALLOC_SIMPLE=y
>>> @@ -76,7 +81,10 @@ CONFIG_MISC=y
>>>  CONFIG_ROCKCHIP_EFUSE=y
>>>  CONFIG_MMC_DW=y
>>>  CONFIG_MMC_DW_ROCKCHIP=y
>>> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>>>  CONFIG_SPI_FLASH_GIGADEVICE=y
>>> +CONFIG_SPI_FLASH_MACRONIX=y
>>> +CONFIG_SPI_FLASH_WINBOND=y
>>>  CONFIG_PHY_REALTEK=y
>>>  CONFIG_DM_ETH_PHY=y
>>>  CONFIG_ETH_DESIGNWARE=y

Re: [PATCH 13/15] rockchip: rk3328: Add support to build bootable SPI image

[Dragan Simic]

On 2024-02-10 20:30, Jonas Karlman wrote:
> On 2024-02-10 18:18, Dragan Simic wrote:
>> On 2024-02-08 22:54, Jonas Karlman wrote:
>>> On 2024-02-08 04:53, Dragan Simic wrote:
>>>> On 2024-02-07 01:02, Jonas Karlman wrote:
>>>>> Similar to RK35xx the BootRom in RK3328 can read all data and look
>>>>> for
>>>>> idbloader at 0x8000, same as on SD and eMMC.
>>>>> 
>>>>> Use the rksd format and modify the mkimage offset to generate a
>>>>> bootable
>>>>> u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR 
>>>>> flash.
>>>>> 
>>>>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
>>>> 
>>>> Could you, please, clarify a bit why the "rkspi" format isn't used
>>>> instead of "rksd"?
>>> 
>>> Not really sure how I can clarify this.
>>> 
>>> As stated in commit message, the bootrom will read all bytes and use
>>> same boot offset as the sd/emmc-format. The "legacy" spi-format only
>>> read first 2kb of each 4kb of storage, see tools/rkspi.c.
>>> 
>>> A few bootrom versions:
>>> - rk3288: 320A 20131116 V100
>>> - rk3399: 330C 20160118 V100
>>> - rk3328: 320C 20161117 V100
>>> - rk3308: 330E 20180203 V100
>>> 
>>> I am not sure if the rkspi format must be used for all bootrom prior 
>>> to
>>> and including rk3399 and all versions after that should use the rksd
>>> format. I have only ever used boot from spi flash on rk3399, rk3328 
>>> and
>>> rk35xx. And for those that has been true.
>> 
>> Ah, thank you very much for refreshing my memory.  I somehow forgot
>> about the bug that the RK3399 BROM suffers from.
>> 
>> Please see also one small suggestion below.
>> 
>>>>> ---
>>>>>  arch/arm/dts/rk3328-u-boot.dtsi        | 11 +++++++++++
>>>>>  arch/arm/mach-rockchip/rk3328/rk3328.c |  1 +
>>>>>  2 files changed, 12 insertions(+)
>>>>> 
>>>>> diff --git a/arch/arm/dts/rk3328-u-boot.dtsi
>>>>> b/arch/arm/dts/rk3328-u-boot.dtsi
>>>>> index b90d78878d77..2a5dca97dd4b 100644
>>>>> --- a/arch/arm/dts/rk3328-u-boot.dtsi
>>>>> +++ b/arch/arm/dts/rk3328-u-boot.dtsi
>>>>> @@ -120,3 +120,14 @@
>>>>>  &usb20_otg {
>>>>>  	hnp-srp-disable;
>>>>>  };
>>>>> +
>>>>> +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
>>>>> +&binman {
>>>>> +	simple-bin-spi {
>>>>> +		mkimage {
>>>>> +			args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
>> 
>> Perhaps there's no need to use CONFIG_SYS_SOC there, because this is 
>> an
>> U-Boot SoC dtsi specific to the RK3328.  Furthermore, I find it much
>> more readable (and grep-able, which is also important) when the exact
>> name of the SoC is specified here.
>> 
>> This note also applies to the other U-Boot SoC dtsi files.
> 
> Consistency is my main concern so I would rather keep using SYS_SOC, it
> is already being used at the two other override locations.

I agree that consistency is good.  Just checking, are you referring
to the use of CONFIG_SYS_SOC in arch/arm/dts/rk356x-u-boot.dtsi and
arch/arm/dts/rk3588s-u-boot.dtsi?  Frankly, I'd much rather see rk3568
and rk3588 there, which would be much more readable.

I mean, is CONFIG_SYS_SOC in each of the U-Boot SoC dtsi files ever
going to be substituted with something else than the already known
"rkxxxx" value?  If so, IMHO there's no valid point in not using the
known value directly.

> If we can get confirmation that it is brom in SoCs chronologically up 
> to
> and including rk3399 that is affected by the read 2kb per 4kb of spi
> issue we should be able to rework this into a more proper and future
> proof way.

It would be nice to have some kind of an official confirmation for that.

>>>>> +			offset = <0x8000>;
>>>>> +		};
>>>>> +	};
>>>>> +};
>>>>> +#endif
>>>>> diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c
>>>>> b/arch/arm/mach-rockchip/rk3328/rk3328.c
>>>>> index b591d38fe412..b82b209de9e2 100644
>>>>> --- a/arch/arm/mach-rockchip/rk3328/rk3328.c
>>>>> +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
>>>>> @@ -36,6 +36,7 @@
>>>>> 
>>>>>  const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
>>>>>  	[BROM_BOOTSOURCE_EMMC] = "/mmc@ff520000",
>>>>> +	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff190000/flash@0",
>>>>>  	[BROM_BOOTSOURCE_SD] = "/mmc@ff500000",
>>>>>  };