* Re: [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf
2024-02-21 9:01 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi
@ 2024-02-21 8:56 ` Hogander, Jouni
0 siblings, 0 replies; 17+ messages in thread
From: Hogander, Jouni @ 2024-02-21 8:56 UTC (permalink / raw)
To: Joshi, Kunal1, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh
On Wed, 2024-02-21 at 14:31 +0530, Kunal Joshi wrote:
> Extend the tests to cover panel replay selective fetch feature.
>
> From kms_psr2_sf test point of view we have
> check_pr_psr2_sel_fetch_support
> function to check if PR/PSR2 selective fetch is supported for an
> output
> if output supports selective fetch then we check we if enter
> DEEP_SLEEP mode
> in run function
>
> v2: fixed dynamic test name
> v3: use check_psr2_support (Jouni)
> v4: correct order of checks in check_pr_psr2_sel_fetch_support
> (Jouni)
> use appropriate psr mode in psr_wait_entry (Jouni)
> v5: modify get_sel_fetch_mode_for_output to use member data (Jouni)
> v6: modify get_sel_fetch_mode_for_output ->
> set_sel_fetch_mode_for_output (Jouni)
>
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Animesh Manna <animesh.manna@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> tests/intel/kms_psr2_sf.c | 195 +++++++++++++++++++++++++++---------
> --
> 1 file changed, 142 insertions(+), 53 deletions(-)
>
> diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c
> index 0fb300161..4c3e34aa0 100644
> --- a/tests/intel/kms_psr2_sf.c
> +++ b/tests/intel/kms_psr2_sf.c
> @@ -172,6 +172,7 @@ typedef struct {
> uint32_t screen_changes;
> int cur_x, cur_y;
> enum pipe pipe;
> + enum psr_mode psr_mode;
> enum {
> FEATURE_NONE = 0,
> FEATURE_DSC = 1,
> @@ -179,6 +180,41 @@ typedef struct {
> } coexist_feature;
> } data_t;
>
> +static bool set_sel_fetch_mode_for_output(data_t *data)
> +{
> + bool supported = false;
> +
> + if (psr_sink_support(data->drm_fd, data->debugfs_fd,
> + PR_MODE_SEL_FETCH,
> data->output)) {
> + supported = true;
> + data->psr_mode = PR_MODE_SEL_FETCH;
> + } else if (psr_sink_support(data->drm_fd, data->debugfs_fd,
> + PSR_MODE_2,
> data->output)) {
> + supported = true;
> + data->psr_mode = PSR_MODE_2;
> + } else
> + igt_info("selective fetch not supported on output
> %s\n", data->output->name);
> +
> + return supported;
> +}
> +
> +static const char *get_psr_mode_str_for_output(data_t *data)
> +{
> + static const char *psr_mode;
> +
> + switch (data->psr_mode) {
> + case PSR_MODE_2:
> + psr_mode = "psr2";
> + break;
> + case PR_MODE_SEL_FETCH:
> + psr_mode = "pr";
> + break;
> + default:
> + psr_mode = "";
> + }
> + return psr_mode;
> +}
> +
> static const char *op_str(enum operations op)
> {
> static const char * const name[] = {
> @@ -688,7 +724,7 @@ static void damaged_plane_move(data_t *data)
>
> igt_display_commit2(&data->display, COMMIT_ATOMIC);
>
> - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2,
> NULL));
> + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode,
> data->output));
>
> expected_output(data);
> }
> @@ -788,7 +824,7 @@ static void plane_move_continuous(data_t *data)
> {
> int target_x, target_y;
>
> - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2,
> NULL));
> + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode,
> data->output));
>
> get_target_coords(data, &target_x, &target_y);
>
> @@ -865,7 +901,7 @@ static void damaged_plane_update(data_t *data)
> igt_plane_set_position(data->test_plane, 0, 0);
> igt_display_commit2(&data->display, COMMIT_ATOMIC);
>
> - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2,
> NULL));
> + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode,
> data->output));
>
> expected_output(data);
> }
> @@ -874,7 +910,7 @@ static void run(data_t *data)
> {
> int i;
>
> - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2,
> NULL));
> + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode,
> data->output));
>
> if (data->fbc_flag == true && data->op_fbc_mode ==
> FBC_ENABLED)
> igt_assert_f(intel_fbc_wait_until_enabled(data-
> >drm_fd,
> @@ -952,14 +988,22 @@ static void cleanup(data_t *data)
> igt_remove_fb(data->drm_fd, &data->fb_test);
> }
>
> -static int check_psr2_support(data_t *data)
> +static bool check_pr_psr2_sel_fetch_support(data_t *data)
> {
> - int status;
> + bool status = false;
> +
> + /* Check sink supports PR/PSR2 selective fetch */
> + if (!set_sel_fetch_mode_for_output(data))
> + return false;
> +
> + /* Check if selective fetch can be enabled */
> + if (!selective_fetch_check(data->debugfs_fd, data->output))
> + igt_assert("Selective fetch is not enabled even
> though panel should support it\n");
>
> prepare(data);
> - status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL);
> + /* We enter into DEEP_SLEEP for both PSR2 and PR sel fetch */
> + status = psr_wait_entry(data->debugfs_fd, data->psr_mode,
> data->output);
> cleanup(data);
> -
> return status;
> }
>
> @@ -981,6 +1025,8 @@ pipe_output_combo_valid(igt_display_t *display,
>
> igt_main
> {
> + bool output_supports_pr_psr2_sel_fetch = false;
> + bool pr_psr2_sel_fetch_supported = false;
> data_t data = {};
> igt_output_t *outputs[IGT_MAX_PIPES * IGT_MAX_PIPES];
> int i, j, k, y;
> @@ -1000,11 +1046,6 @@ igt_main
> data.debugfs_fd = igt_debugfs_dir(data.drm_fd);
> kmstest_set_vt_graphics_mode();
>
> - igt_require_f(psr_sink_support(data.drm_fd,
> - data.debugfs_fd,
> PSR_MODE_2,
> - NULL),
> - "Sink does not support PSR2\n");
> -
> display_init(&data);
>
> if
> ((intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 20) &&
> @@ -1028,7 +1069,8 @@ igt_main
>
> for_each_pipe_with_valid_output(&data.display,
> data.pipe, data.output) {
> coexist_features[n_pipes] = 0;
> - if (check_psr2_support(&data)) {
> + output_supports_pr_psr2_sel_fetch =
> check_pr_psr2_sel_fetch_support(&data);
> + if (output_supports_pr_psr2_sel_fetch) {
> pipes[n_pipes] = data.pipe;
> outputs[n_pipes] = data.output;
>
> @@ -1037,7 +1079,10 @@ igt_main
>
> n_pipes++;
> }
> + pr_psr2_sel_fetch_supported |=
> output_supports_pr_psr2_sel_fetch;
> }
> + igt_require_f(pr_psr2_sel_fetch_supported,
> + "No output supports
> selective fetch\n");
> }
>
> for (y = 0; y < ARRAY_SIZE(fbc_status); y++) {
> @@ -1054,15 +1099,18 @@ igt_main
> for (i = 0; i < n_pipes; i++) {
> if
> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
> continue;
> + data.pipe = pipes[i];
> + data.output = outputs[i];
> + igt_assert_f(set_sel_fetch_mode_for_o
> utput(&data),
> + "Selective
> fetch is not supported\n");
>
> for (j = FEATURE_NONE; j <
> FEATURE_COUNT; j++) {
> if (j != FEATURE_NONE &&
> !(coexist_features[i] & j))
> continue;
> - igt_dynamic_f("pipe-%s-%s%s",
> kmstest_pipe_name(pipes[i]),
> + igt_dynamic_f("%s-pipe-%s-
> %s%s", get_psr_mode_str_for_output(&data),
> +
> kmstest_pipe_name(pipes[i]),
>
> igt_output_name(outputs[i]),
>
> coexist_feature_str(j)) {
> - data.pipe = pipes[i];
> - data.output =
> outputs[i];
> data.test_plane_id =
> DRM_PLANE_TYPE_PRIMARY;
> data.coexist_feature
> = j;
> for (k = 1; k <=
> MAX_DAMAGE_AREAS; k++) {
> @@ -1087,18 +1135,22 @@ igt_main
> if
> (!pipe_output_combo_valid(&data.display, pipes[i],
>
> outputs[i]))
> continue;
> + data.pipe = pipes[i];
> + data.output = outputs[i];
> + igt_assert_f(set_sel_fetch_mo
> de_for_output(&data),
> +
> "Selective fetch is not supported\n");
>
> for (j = FEATURE_NONE; j <
> FEATURE_COUNT; j++) {
> if (j != FEATURE_NONE
> && !(coexist_features[i] & j))
> continue;
> - igt_dynamic_f("pipe-
> %s-%s%s",
> + igt_dynamic_f("%s-
> pipe-%s-%s%s",
> +
> get_psr_mode_str_for_output(&data),
>
> kmstest_pipe_name(pipes[i]),
>
> igt_output_name(outputs[i]),
>
> coexist_feature_str(j)) {
> - data.pipe =
> pipes[i];
> - data.output =
> outputs[i];
> data.test_pla
> ne_id = DRM_PLANE_TYPE_PRIMARY;
> data.coexist_
> feature = j;
> +
> for (k = 1; k
> <= MAX_DAMAGE_AREAS; k++) {
> data.
> damage_area_count = k;
> prepa
> re(&data);
> @@ -1119,17 +1171,21 @@ igt_main
> for (i = 0; i < n_pipes; i++) {
> if
> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
> continue;
> + data.pipe = pipes[i];
> + data.output = outputs[i];
> + igt_assert_f(set_sel_fetch_mode_for_o
> utput(&data),
> + "Selective
> fetch is not supported\n");
>
> for (j = FEATURE_NONE; j <
> FEATURE_COUNT; j++) {
> if (j != FEATURE_NONE &&
> !(coexist_features[i] & j))
> continue;
> - igt_dynamic_f("pipe-%s-%s%s",
> kmstest_pipe_name(pipes[i]),
> + igt_dynamic_f("%s-pipe-%s-
> %s%s", get_psr_mode_str_for_output(&data),
> +
> kmstest_pipe_name(pipes[i]),
>
> igt_output_name(outputs[i]),
>
> coexist_feature_str(j)) {
> - data.pipe = pipes[i];
> - data.output =
> outputs[i];
> data.test_plane_id =
> DRM_PLANE_TYPE_OVERLAY;
> data.coexist_feature
> = j;
> +
> for (k = 1; k <=
> MAX_DAMAGE_AREAS; k++) {
> data.damage_a
> rea_count = k;
> prepare(&data
> );
> @@ -1149,15 +1205,18 @@ igt_main
> for (i = 0; i < n_pipes; i++) {
> if
> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
> continue;
> + data.pipe = pipes[i];
> + data.output = outputs[i];
> + igt_assert_f(set_sel_fetch_mode_for_o
> utput(&data),
> + "Selective
> fetch is not supported\n");
>
> for (j = FEATURE_NONE; j <
> FEATURE_COUNT; j++) {
> if (j != FEATURE_NONE &&
> !(coexist_features[i] & j))
> continue;
> - igt_dynamic_f("pipe-%s-%s%s",
> kmstest_pipe_name(pipes[i]),
> + igt_dynamic_f("%s-pipe-%s-
> %s%s", get_psr_mode_str_for_output(&data),
> +
> kmstest_pipe_name(pipes[i]),
>
> igt_output_name(outputs[i]),
>
> coexist_feature_str(j)) {
> - data.pipe = pipes[i];
> - data.output =
> outputs[i];
> data.test_plane_id =
> DRM_PLANE_TYPE_CURSOR;
> data.coexist_feature
> = j;
> prepare(&data);
> @@ -1175,17 +1234,21 @@ igt_main
> for (i = 0; i < n_pipes; i++) {
> if
> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
> continue;
> + data.pipe = pipes[i];
> + data.output = outputs[i];
> + igt_assert_f(set_sel_fetch_mode_for_o
> utput(&data),
> + "Selective
> fetch is not supported\n");
>
> for (j = FEATURE_NONE; j <
> FEATURE_COUNT; j++) {
> if (j != FEATURE_NONE &&
> !(coexist_features[i] & j))
> continue;
> - igt_dynamic_f("pipe-%s-%s%s",
> kmstest_pipe_name(pipes[i]),
> + igt_dynamic_f("%s-pipe-%s-
> %s%s", get_psr_mode_str_for_output(&data),
> +
> kmstest_pipe_name(pipes[i]),
>
> igt_output_name(outputs[i]),
>
> coexist_feature_str(j)) {
> - data.pipe = pipes[i];
> - data.output =
> outputs[i];
> data.test_plane_id =
> DRM_PLANE_TYPE_CURSOR;
> data.coexist_feature
> = j;
> +
> prepare(&data);
> run(&data);
> cleanup(&data);
> @@ -1202,15 +1265,18 @@ igt_main
> for (i = 0; i < n_pipes; i++) {
> if
> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
> continue;
> + data.pipe = pipes[i];
> + data.output = outputs[i];
> + igt_assert_f(set_sel_fetch_mode_for_o
> utput(&data),
> + "Selective
> fetch is not supported\n");
>
> for (j = FEATURE_NONE; j <
> FEATURE_COUNT; j++) {
> if (j != FEATURE_NONE &&
> !(coexist_features[i] & j))
> continue;
> - igt_dynamic_f("pipe-%s-%s%s",
> kmstest_pipe_name(pipes[i]),
> + igt_dynamic_f("%s-pipe-%s-
> %s%s", get_psr_mode_str_for_output(&data),
> +
> kmstest_pipe_name(pipes[i]),
>
> igt_output_name(outputs[i]),
>
> coexist_feature_str(j)) {
> - data.pipe = pipes[i];
> - data.output =
> outputs[i];
> data.test_plane_id =
> DRM_PLANE_TYPE_CURSOR;
> data.coexist_feature
> = j;
> prepare(&data);
> @@ -1229,15 +1295,18 @@ igt_main
> for (i = 0; i < n_pipes; i++) {
> if
> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
> continue;
> + data.pipe = pipes[i];
> + data.output = outputs[i];
> + igt_assert_f(set_sel_fetch_mode_for_o
> utput(&data),
> + "Selective
> fetch is not supported\n");
>
> for (j = FEATURE_NONE; j <
> FEATURE_COUNT; j++) {
> if (j != FEATURE_NONE &&
> !(coexist_features[i] & j))
> continue;
> - igt_dynamic_f("pipe-%s-%s%s",
> kmstest_pipe_name(pipes[i]),
> + igt_dynamic_f("%s-pipe-%s-
> %s%s", get_psr_mode_str_for_output(&data),
> +
> kmstest_pipe_name(pipes[i]),
>
> igt_output_name(outputs[i]),
>
> coexist_feature_str(j)) {
> - data.pipe = pipes[i];
> - data.output =
> outputs[i];
> data.test_plane_id =
> DRM_PLANE_TYPE_CURSOR;
> data.coexist_feature
> = j;
> prepare(&data);
> @@ -1257,15 +1326,19 @@ igt_main
> for (i = 0; i < n_pipes; i++) {
> if
> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
> continue;
> + data.pipe = pipes[i];
> + data.output = outputs[i];
> + igt_assert_f(set_sel_fetch_mode_for_o
> utput(&data),
> + "Selective
> fetch is not supported\n");
>
> for (j = FEATURE_NONE; j <
> FEATURE_COUNT; j++) {
> if (j != FEATURE_NONE &&
> !(coexist_features[i] & j))
> continue;
> - igt_dynamic_f("pipe-%s-%s%s",
> kmstest_pipe_name(pipes[i]),
> + igt_dynamic_f("%s-pipe-%s-
> %s%s",
> +
> get_psr_mode_str_for_output(&data),
> +
> kmstest_pipe_name(pipes[i]),
>
> igt_output_name(outputs[i]),
>
> coexist_feature_str(j)) {
> - data.pipe = pipes[i];
> - data.output =
> outputs[i];
> data.test_plane_id =
> DRM_PLANE_TYPE_OVERLAY;
> data.coexist_feature
> = j;
> for (k =
> POS_TOP_LEFT; k <= POS_BOTTOM_RIGHT ; k++) {
> @@ -1286,15 +1359,18 @@ igt_main
> for (i = 0; i < n_pipes; i++) {
> if
> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
> continue;
> + data.pipe = pipes[i];
> + data.output = outputs[i];
> + igt_assert_f(set_sel_fetch_mode_for_o
> utput(&data),
> + "Selective
> fetch is not supported\n");
>
> for (j = FEATURE_NONE; j <
> FEATURE_COUNT; j++) {
> if (j != FEATURE_NONE &&
> !(coexist_features[i] & j))
> continue;
> - igt_dynamic_f("pipe-%s-%s%s",
> kmstest_pipe_name(pipes[i]),
> + igt_dynamic_f("%s-pipe-%s-
> %s%s", get_psr_mode_str_for_output(&data),
> +
> kmstest_pipe_name(pipes[i]),
>
> igt_output_name(outputs[i]),
>
> coexist_feature_str(j)) {
> - data.pipe = pipes[i];
> - data.output = outputs[i];
> data.test_plane_id =
> DRM_PLANE_TYPE_OVERLAY;
> data.coexist_feature = j;
> prepare(&data);
> @@ -1313,15 +1389,18 @@ igt_main
> for (i = 0; i < n_pipes; i++) {
> if
> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
> continue;
> + data.pipe = pipes[i];
> + data.output = outputs[i];
> + igt_assert_f(set_sel_fetch_mode_for_o
> utput(&data),
> + "Selective
> fetch is not supported\n");
>
> for (j = FEATURE_NONE; j <
> FEATURE_COUNT; j++) {
> if (j != FEATURE_NONE &&
> !(coexist_features[i] & j))
> continue;
> - igt_dynamic_f("pipe-%s-%s%s",
> kmstest_pipe_name(pipes[i]),
> + igt_dynamic_f("%s-pipe-%s-
> %s%s", get_psr_mode_str_for_output(&data),
> +
> kmstest_pipe_name(pipes[i]),
>
> igt_output_name(outputs[i]),
>
> coexist_feature_str(j)) {
> - data.pipe = pipes[i];
> - data.output =
> outputs[i];
> data.test_plane_id =
> DRM_PLANE_TYPE_OVERLAY;
> data.coexist_feature
> = j;
> prepare(&data);
> @@ -1340,15 +1419,18 @@ igt_main
> for (i = 0; i < n_pipes; i++) {
> if
> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
> continue;
> + data.pipe = pipes[i];
> + data.output = outputs[i];
> + igt_assert_f(set_sel_fetch_mode_for_o
> utput(&data),
> + "Selective
> fetch is not supported\n");
>
> for (j = FEATURE_NONE; j <
> FEATURE_COUNT; j++) {
> if (j != FEATURE_NONE &&
> !(coexist_features[i] & j))
> continue;
> - igt_dynamic_f("pipe-%s-%s%s",
> kmstest_pipe_name(pipes[i]),
> + igt_dynamic_f("%s-pipe-%s-
> %s%s", get_psr_mode_str_for_output(&data),
> +
> kmstest_pipe_name(pipes[i]),
>
> igt_output_name(outputs[i]),
>
> coexist_feature_str(j)) {
> - data.pipe = pipes[i];
> - data.output =
> outputs[i];
> data.test_plane_id =
> DRM_PLANE_TYPE_OVERLAY;
> data.coexist_feature
> = j;
> prepare(&data);
> @@ -1368,19 +1450,23 @@ igt_main
> for (i = 0; i < n_pipes; i++) {
> if
> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
> continue;
> + data.pipe = pipes[i];
> + data.output = outputs[i];
> + igt_assert_f(set_sel_fetch_mode_for_o
> utput(&data),
> + "Selective
> fetch is not supported\n");
>
> for (j = FEATURE_NONE; j <
> FEATURE_COUNT; j++) {
> if (j != FEATURE_NONE &&
> !(coexist_features[i] & j))
> continue;
> - igt_dynamic_f("pipe-%s-%s%s",
> kmstest_pipe_name(pipes[i]),
> + igt_dynamic_f("%s-pipe-%s-
> %s%s", kmstest_pipe_name(pipes[i]),
> +
> get_psr_mode_str_for_output(&data),
>
> igt_output_name(outputs[i]),
>
> coexist_feature_str(j)) {
> - data.pipe = pipes[i];
> - data.output =
> outputs[i];
> for (k = 1; k <=
> MAX_DAMAGE_AREAS; k++) {
> data.damage_a
> rea_count = k;
> data.test_pla
> ne_id = DRM_PLANE_TYPE_PRIMARY;
> data.coexist_
> feature = j;
> +
> prepare(&data
> );
> run(&data);
> cleanup(&data
> );
> @@ -1401,15 +1487,18 @@ igt_main
> for (i = 0; i < n_pipes; i++) {
> if
> (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
> continue;
> + data.pipe = pipes[i];
> + data.output = outputs[i];
> + igt_assert_f(set_sel_fetch_mode_for_o
> utput(&data),
> + "Selective
> fetch is not supported\n");
>
> for (j = FEATURE_NONE; j <
> FEATURE_COUNT; j++) {
> if (j != FEATURE_NONE &&
> !(coexist_features[i] & j))
> continue;
> - igt_dynamic_f("pipe-%s-%s%s",
> kmstest_pipe_name(pipes[i]),
> + igt_dynamic_f("%s-pipe-%s-
> %s%s", get_psr_mode_str_for_output(&data),
> +
> kmstest_pipe_name(pipes[i]),
>
> igt_output_name(outputs[i]),
>
> coexist_feature_str(j)) {
> - data.pipe = pipes[i];
> - data.output =
> outputs[i];
> data.damage_area_coun
> t = 1;
> if (data.op_fbc_mode
> == FBC_ENABLED)
> data.primary_
> format = DRM_FORMAT_XRGB8888;
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf
@ 2024-02-21 9:01 Kunal Joshi
2024-02-21 9:01 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi
` (5 more replies)
0 siblings, 6 replies; 17+ messages in thread
From: Kunal Joshi @ 2024-02-21 9:01 UTC (permalink / raw)
To: igt-dev; +Cc: Kunal Joshi
kmd series [1] adds supports for panel replay selective fetch,
modify lib and kms_psr2_sf to extend kms_psr2_sf tests to validate
panel replay selective fetch as well.
[1] https://patchwork.freedesktop.org/patch/575163/?series=128193&rev=3
Kunal Joshi (3):
lib/igt_psr: modify library to support multiple PSR/PR outputs
lib/igt_psr: add support for PR selective update
tests/intel/kms_psr2_sf: extend tests for panel replay sf
lib/igt_psr.c | 90 ++++++-----
lib/igt_psr.h | 14 +-
tests/intel/kms_dirtyfb.c | 4 +-
tests/intel/kms_fbcon_fbt.c | 4 +-
tests/intel/kms_frontbuffer_tracking.c | 4 +-
tests/intel/kms_pm_dc.c | 6 +-
tests/intel/kms_psr.c | 4 +-
tests/intel/kms_psr2_sf.c | 200 ++++++++++++++++++-------
tests/intel/kms_psr2_su.c | 2 +-
tests/intel/kms_psr_stress_test.c | 4 +-
tests/kms_async_flips.c | 4 +-
tests/kms_cursor_legacy.c | 4 +-
12 files changed, 219 insertions(+), 121 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs
2024-02-21 9:01 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi
@ 2024-02-21 9:01 ` Kunal Joshi
2024-02-21 9:01 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi
` (4 subsequent siblings)
5 siblings, 0 replies; 17+ messages in thread
From: Kunal Joshi @ 2024-02-21 9:01 UTC (permalink / raw)
To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy
We can have multiple panels connected to the system so PSR information
should be exposed per output. changes provide support for multiple
PSR/PR to be tested simultaneously.
v2: Use macro instead of function (Jouni)
v3: keep psr_enable in igt_fixture (Jouni)
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
---
lib/igt_psr.c | 76 ++++++++++++++------------
lib/igt_psr.h | 14 ++---
tests/intel/kms_dirtyfb.c | 4 +-
tests/intel/kms_fbcon_fbt.c | 4 +-
tests/intel/kms_frontbuffer_tracking.c | 4 +-
tests/intel/kms_pm_dc.c | 6 +-
tests/intel/kms_psr.c | 4 +-
tests/intel/kms_psr2_sf.c | 5 +-
tests/intel/kms_psr2_su.c | 2 +-
tests/intel/kms_psr_stress_test.c | 4 +-
tests/kms_async_flips.c | 4 +-
tests/kms_cursor_legacy.c | 4 +-
12 files changed, 66 insertions(+), 65 deletions(-)
diff --git a/lib/igt_psr.c b/lib/igt_psr.c
index ac214fcfc..cad8cce05 100644
--- a/lib/igt_psr.c
+++ b/lib/igt_psr.c
@@ -27,6 +27,10 @@
#include "igt_sysfs.h"
#include <errno.h>
+#define SET_DEBUGFS_PATH(output, path) \
+ sprintf(path, "%s%s%s", output ? output->name : "", output ? "/" : "", \
+ output ? "i915_psr_status" : "i915_edp_psr_status")
+
bool psr_disabled_check(int debugfs_fd)
{
char buf[PSR_STATUS_MAX_LEN];
@@ -37,11 +41,13 @@ bool psr_disabled_check(int debugfs_fd)
return strstr(buf, "PSR mode: disabled\n");
}
-bool psr2_selective_fetch_check(int debugfs_fd)
+bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output)
{
char buf[PSR_STATUS_MAX_LEN];
+ char debugfs_file[128] = {0};
- igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf,
+ SET_DEBUGFS_PATH(output, debugfs_file);
+ igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf,
sizeof(buf));
return strstr(buf, "PSR2 selective fetch: enabled");
@@ -54,11 +60,7 @@ static bool psr_active_check(int debugfs_fd, enum psr_mode mode, igt_output_t *o
const char *state = (mode == PSR_MODE_1 || mode == PR_MODE) ? "SRDENT" : "DEEP_SLEEP";
int ret;
- if (output)
- sprintf(debugfs_file, "%s/i915_psr_status", output->name);
- else
- sprintf(debugfs_file, "%s", "i915_edp_psr_status");
-
+ SET_DEBUGFS_PATH(output, debugfs_file);
ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file,
buf, sizeof(buf));
if (ret < 0) {
@@ -90,13 +92,18 @@ bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *outp
return igt_wait(!psr_active_check(debugfs_fd, mode, output), 500, 10);
}
-static ssize_t psr_write(int debugfs_fd, const char *buf)
+static ssize_t psr_write(int debugfs_fd, const char *buf, igt_output_t *output)
{
+ /*
+ * FIXME: Currently we don't have separate psr_debug file for each output.
+ * so, we are using i915_edp_psr_debug file for all outputs.
+ * Later we need to add support for separate psr_debug file for each output.
+ */
return igt_sysfs_write(debugfs_fd, "i915_edp_psr_debug", buf,
- strlen(buf));
+ strlen(buf));
}
-static int has_psr_debugfs(int debugfs_fd)
+static int has_psr_debugfs(int debugfs_fd, igt_output_t *output)
{
int ret;
@@ -105,7 +112,7 @@ static int has_psr_debugfs(int debugfs_fd)
* Legacy mode will return OK here, debugfs api will return -EINVAL.
* -ENODEV is returned when PSR is unavailable.
*/
- ret = psr_write(debugfs_fd, "0xf");
+ ret = psr_write(debugfs_fd, "0xf", output);
if (ret == -EINVAL) {
errno = 0;
return 0;
@@ -113,7 +120,7 @@ static int has_psr_debugfs(int debugfs_fd)
return ret;
/* legacy debugfs api, we enabled irqs by writing, disable them. */
- psr_write(debugfs_fd, "0");
+ psr_write(debugfs_fd, "0", output);
return -EINVAL;
}
@@ -134,14 +141,14 @@ static int psr_restore_debugfs_fd = -1;
static void restore_psr_debugfs(int sig)
{
- psr_write(psr_restore_debugfs_fd, "0");
+ psr_write(psr_restore_debugfs_fd, "0", NULL);
}
-static bool psr_set(int device, int debugfs_fd, int mode)
+static bool psr_set(int device, int debugfs_fd, int mode, igt_output_t *output)
{
int ret;
- ret = has_psr_debugfs(debugfs_fd);
+ ret = has_psr_debugfs(debugfs_fd, output);
if (ret == -ENODEV) {
igt_skip("PSR not available\n");
return false;
@@ -179,7 +186,7 @@ static bool psr_set(int device, int debugfs_fd, int mode)
debug_val = "0x1";
}
- ret = psr_write(debugfs_fd, debug_val);
+ ret = psr_write(debugfs_fd, debug_val, output);
igt_require_f(ret > 0, "PSR2 SF feature not available\n");
}
@@ -193,15 +200,15 @@ static bool psr_set(int device, int debugfs_fd, int mode)
return ret;
}
-bool psr_enable(int device, int debugfs_fd, enum psr_mode mode)
+bool psr_enable(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output)
{
- return psr_set(device, debugfs_fd, mode);
+ return psr_set(device, debugfs_fd, mode, output);
}
-bool psr_disable(int device, int debugfs_fd)
+bool psr_disable(int device, int debugfs_fd, igt_output_t *output)
{
/* Any mode different than PSR_MODE_1/2 will disable PSR */
- return psr_set(device, debugfs_fd, -1);
+ return psr_set(device, debugfs_fd, -1, output);
}
bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output)
@@ -211,11 +218,7 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output
char buf[PSR_STATUS_MAX_LEN];
int ret;
- if (output)
- sprintf(debugfs_file, "%s/i915_psr_status", output->name);
- else
- sprintf(debugfs_file, "%s", "i915_edp_psr_status");
-
+ SET_DEBUGFS_PATH(output, debugfs_file);
ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf,
sizeof(buf));
if (ret < 1)
@@ -305,7 +308,7 @@ void psr_print_debugfs(int debugfs_fd)
igt_info("%s", buf);
}
-bool i915_psr2_selective_fetch_check(int drm_fd)
+bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output)
{
int debugfs_fd;
bool ret;
@@ -314,7 +317,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd)
return false;
debugfs_fd = igt_debugfs_dir(drm_fd);
- ret = psr2_selective_fetch_check(debugfs_fd);
+ ret = psr2_selective_fetch_check(debugfs_fd, output);
close(debugfs_fd);
return ret;
@@ -331,7 +334,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd)
* Returns:
* True if PSR mode changed to PSR1, false otherwise.
*/
-bool i915_psr2_sel_fetch_to_psr1(int drm_fd)
+bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output)
{
int debugfs_fd;
bool ret = false;
@@ -340,8 +343,8 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd)
return ret;
debugfs_fd = igt_debugfs_dir(drm_fd);
- if (psr2_selective_fetch_check(debugfs_fd)) {
- psr_set(drm_fd, debugfs_fd, PSR_MODE_1);
+ if (psr2_selective_fetch_check(debugfs_fd, output)) {
+ psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
ret = true;
}
@@ -355,12 +358,12 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd)
* Restore PSR2 selective fetch after tests were executed, this function should
* only be called if i915_psr2_sel_fetch_to_psr1() returned true.
*/
-void i915_psr2_sel_fetch_restore(int drm_fd)
+void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output)
{
int debugfs_fd;
debugfs_fd = igt_debugfs_dir(drm_fd);
- psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH);
+ psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output);
close(debugfs_fd);
}
@@ -369,16 +372,17 @@ void i915_psr2_sel_fetch_restore(int drm_fd)
*
* Return the current PSR mode.
*/
-enum psr_mode psr_get_mode(int debugfs_fd)
+enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output)
{
char buf[PSR_STATUS_MAX_LEN];
+ char debugfs_file[128] = {0};
int ret;
-
- ret = igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf,
+ SET_DEBUGFS_PATH(output, debugfs_file);
+ ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf,
sizeof(buf));
if (ret < 0) {
- igt_info("Could not read i915_edp_psr_status: %s\n",
+ igt_info("Could not read psr status: %s\n",
strerror(-ret));
return PSR_DISABLED;
}
diff --git a/lib/igt_psr.h b/lib/igt_psr.h
index 82a4e8c5e..372bef2b2 100644
--- a/lib/igt_psr.h
+++ b/lib/igt_psr.h
@@ -46,21 +46,21 @@ enum fbc_mode {
};
bool psr_disabled_check(int debugfs_fd);
-bool psr2_selective_fetch_check(int debugfs_fd);
+bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output);
bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
-bool psr_enable(int device, int debugfs_fd, enum psr_mode);
-bool psr_disable(int device, int debugfs_fd);
+bool psr_enable(int device, int debugfs_fd, enum psr_mode, igt_output_t *output);
+bool psr_disable(int device, int debugfs_fd, igt_output_t *output);
bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output);
bool psr2_wait_su(int debugfs_fd, uint16_t *num_su_blocks);
void psr_print_debugfs(int debugfs_fd);
-enum psr_mode psr_get_mode(int debugfs_fd);
+enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output);
-bool i915_psr2_selective_fetch_check(int drm_fd);
+bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output);
-bool i915_psr2_sel_fetch_to_psr1(int drm_fd);
-void i915_psr2_sel_fetch_restore(int drm_fd);
+bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output);
+void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output);
bool is_psr_enable_possible(int drm_fd, enum psr_mode mode);
#endif
diff --git a/tests/intel/kms_dirtyfb.c b/tests/intel/kms_dirtyfb.c
index 26b82e50a..c2411c824 100644
--- a/tests/intel/kms_dirtyfb.c
+++ b/tests/intel/kms_dirtyfb.c
@@ -127,7 +127,7 @@ static void enable_feature(data_t *data)
intel_fbc_enable(data->drm_fd);
break;
case FEATURE_PSR:
- psr_enable(data->drm_fd, data->debugfs_fd, PSR_MODE_1);
+ psr_enable(data->drm_fd, data->debugfs_fd, PSR_MODE_1, NULL);
break;
case FEATURE_DRRS:
intel_drrs_enable(data->drm_fd, data->pipe);
@@ -167,7 +167,7 @@ static void check_feature(data_t *data)
static void disable_features(data_t *data)
{
intel_fbc_disable(data->drm_fd);
- psr_disable(data->drm_fd, data->debugfs_fd);
+ psr_disable(data->drm_fd, data->debugfs_fd, NULL);
intel_drrs_disable(data->drm_fd, data->pipe);
}
diff --git a/tests/intel/kms_fbcon_fbt.c b/tests/intel/kms_fbcon_fbt.c
index 90484dccf..71e42f19c 100644
--- a/tests/intel/kms_fbcon_fbt.c
+++ b/tests/intel/kms_fbcon_fbt.c
@@ -277,7 +277,7 @@ static void disable_features(int device, int debugfs_fd)
{
igt_set_module_param_int(device, "enable_fbc", 0);
if (psr_sink_support(device, debugfs_fd, PSR_MODE_1, NULL))
- psr_disable(device, debugfs_fd);
+ psr_disable(device, debugfs_fd, NULL);
}
static inline void fbc_modparam_enable(int device, int debugfs_fd)
@@ -287,7 +287,7 @@ static inline void fbc_modparam_enable(int device, int debugfs_fd)
static inline void psr_debugfs_enable(int device, int debugfs_fd)
{
- psr_enable(device, debugfs_fd, PSR_MODE_1);
+ psr_enable(device, debugfs_fd, PSR_MODE_1, NULL);
}
static void fbc_skips_on_fbcon(int debugfs_fd)
diff --git a/tests/intel/kms_frontbuffer_tracking.c b/tests/intel/kms_frontbuffer_tracking.c
index 912cca3f8..023843161 100644
--- a/tests/intel/kms_frontbuffer_tracking.c
+++ b/tests/intel/kms_frontbuffer_tracking.c
@@ -2234,7 +2234,7 @@ static bool disable_features(const struct test_mode *t)
intel_fbc_disable(drm.fd);
intel_drrs_disable(drm.fd, prim_mode_params.pipe);
- return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : false;
+ return psr.can_test ? psr_disable(drm.fd, drm.debugfs, NULL) : false;
}
static void *busy_thread_func(void *data)
@@ -2867,7 +2867,7 @@ static bool enable_features_for_test(const struct test_mode *t)
if (t->feature & FEATURE_FBC)
intel_fbc_enable(drm.fd);
if (t->feature & FEATURE_PSR)
- ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1);
+ ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1, NULL);
if (t->feature & FEATURE_DRRS)
intel_drrs_enable(drm.fd, prim_mode_params.pipe);
diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c
index 0d5824e67..7deebf83d 100644
--- a/tests/intel/kms_pm_dc.c
+++ b/tests/intel/kms_pm_dc.c
@@ -362,7 +362,7 @@ static void require_dc_counter(int debugfs_fd, int dc_flag)
static void setup_dc3co(data_t *data)
{
data->op_psr_mode = PSR_MODE_2;
- psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode);
+ psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, NULL);
igt_require_f(psr_wait_entry(data->debugfs_fd, data->op_psr_mode, NULL),
"PSR2 is not enabled\n");
}
@@ -665,7 +665,7 @@ igt_main
igt_require(psr_sink_support(data.drm_fd, data.debugfs_fd,
PSR_MODE_1, NULL));
data.op_psr_mode = PSR_MODE_1;
- psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode);
+ psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode, NULL);
test_dc_state_psr(&data, CHECK_DC5);
}
@@ -675,7 +675,7 @@ igt_main
igt_require(psr_sink_support(data.drm_fd, data.debugfs_fd,
PSR_MODE_1, NULL));
data.op_psr_mode = PSR_MODE_1;
- psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode);
+ psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode, NULL);
igt_require_f(igt_pm_pc8_plus_residencies_enabled(data.msr_fd),
"PC8+ residencies not supported\n");
if (intel_display_ver(data.devid) >= 14)
diff --git a/tests/intel/kms_psr.c b/tests/intel/kms_psr.c
index 521d4c708..3822b3081 100644
--- a/tests/intel/kms_psr.c
+++ b/tests/intel/kms_psr.c
@@ -519,7 +519,7 @@ static bool psr_enable_if_enabled(data_t *data)
igt_skip("enable_psr modparam doesn't allow psr mode %d\n",
data->op_psr_mode);
- return psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode);
+ return psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, data->output);
}
static inline void manual(const char *expected)
@@ -658,6 +658,7 @@ static void test_cleanup(data_t *data)
igt_remove_fb(data->drm_fd, &data->fb_green);
igt_remove_fb(data->drm_fd, &data->fb_white);
+ psr_disable(data->drm_fd, data->debugfs_fd, data->output);
}
static void setup_test_plane(data_t *data, int test_plane)
@@ -976,7 +977,6 @@ igt_main
}
igt_fixture {
- psr_disable(data.drm_fd, data.debugfs_fd);
close(data.debugfs_fd);
buf_ops_destroy(data.bops);
diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c
index ecf9ad77f..0fb300161 100644
--- a/tests/intel/kms_psr2_sf.c
+++ b/tests/intel/kms_psr2_sf.c
@@ -1014,7 +1014,7 @@ igt_main
/* Test if PSR2 can be enabled */
igt_require_f(psr_enable(data.drm_fd,
- data.debugfs_fd, PSR_MODE_2_SEL_FETCH),
+ data.debugfs_fd, PSR_MODE_2_SEL_FETCH, NULL),
"Error enabling PSR2\n");
data.damage_area_count = MAX_DAMAGE_AREAS;
@@ -1026,9 +1026,6 @@ igt_main
igt_info("Big framebuffer size %dx%d\n",
data.big_fb_width, data.big_fb_height);
- igt_require_f(psr2_selective_fetch_check(data.debugfs_fd),
- "PSR2 selective fetch not enabled\n");
-
for_each_pipe_with_valid_output(&data.display, data.pipe, data.output) {
coexist_features[n_pipes] = 0;
if (check_psr2_support(&data)) {
diff --git a/tests/intel/kms_psr2_su.c b/tests/intel/kms_psr2_su.c
index 936b5beb3..437ee36f6 100644
--- a/tests/intel/kms_psr2_su.c
+++ b/tests/intel/kms_psr2_su.c
@@ -338,7 +338,7 @@ igt_main
/* Test if PSR2 can be enabled */
igt_require_f(psr_enable(data.drm_fd,
- data.debugfs_fd, PSR_MODE_2),
+ data.debugfs_fd, PSR_MODE_2, NULL),
"Error enabling PSR2\n");
data.op = FRONTBUFFER;
data.format = DRM_FORMAT_XRGB8888;
diff --git a/tests/intel/kms_psr_stress_test.c b/tests/intel/kms_psr_stress_test.c
index 7aea8e8a5..bca3bd513 100644
--- a/tests/intel/kms_psr_stress_test.c
+++ b/tests/intel/kms_psr_stress_test.c
@@ -230,7 +230,7 @@ static void prepare(data_t *data)
r = timerfd_settime(data->completed_timerfd, 0, &interval, NULL);
igt_require_f(r != -1, "Error setting completed_timerfd\n");
- data->initial_state = psr_get_mode(data->debugfs_fd);
+ data->initial_state = psr_get_mode(data->debugfs_fd, NULL);
igt_require(data->initial_state != PSR_DISABLED);
igt_require(psr_wait_entry(data->debugfs_fd, data->initial_state, NULL));
}
@@ -343,7 +343,7 @@ static void run(data_t *data)
}
/* Check if after all this stress the PSR is still in the same state */
- igt_assert(psr_get_mode(data->debugfs_fd) == data->initial_state);
+ igt_assert(psr_get_mode(data->debugfs_fd, NULL) == data->initial_state);
}
igt_main
diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c
index a0349fa03..2895168f7 100644
--- a/tests/kms_async_flips.c
+++ b/tests/kms_async_flips.c
@@ -391,7 +391,7 @@ static void test_cursor(data_t *data)
* necessary, causing the async flip to fail because async flip is not
* supported in cursor plane.
*/
- igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd),
+ igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd, NULL),
"PSR2 sel fetch causes cursor to be added to primary plane " \
"pages flips and async flip is not supported in cursor\n");
@@ -704,7 +704,7 @@ igt_main
* necessary, causing the async flip to fail because async flip is not
* supported in cursor plane.
*/
- igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_fd),
+ igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_fd, NULL),
"PSR2 sel fetch causes cursor to be added to primary plane " \
"pages flips and async flip is not supported in cursor\n");
diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c
index 0017659d4..a430f735a 100644
--- a/tests/kms_cursor_legacy.c
+++ b/tests/kms_cursor_legacy.c
@@ -1849,7 +1849,7 @@ igt_main
* page flip with cursor legacy APIS when Intel's PSR2 selective
* fetch is enabled, so switching PSR1 for this whole test.
*/
- intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd);
+ intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL);
}
igt_describe("Test checks how many cursor updates we can fit between vblanks "
@@ -2074,7 +2074,7 @@ igt_main
igt_fixture {
if (intel_psr2_restore)
- i915_psr2_sel_fetch_restore(display.drm_fd);
+ i915_psr2_sel_fetch_restore(display.drm_fd, NULL);
igt_display_fini(&display);
drm_close_driver(display.drm_fd);
}
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update
2024-02-21 9:01 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi
2024-02-21 9:01 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi
@ 2024-02-21 9:01 ` Kunal Joshi
2024-02-21 9:01 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi
` (3 subsequent siblings)
5 siblings, 0 replies; 17+ messages in thread
From: Kunal Joshi @ 2024-02-21 9:01 UTC (permalink / raw)
To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy
adapt to kmd changes to support PR selective update
https://patchwork.freedesktop.org/patch/575163/?series=128193&rev=3
v2: "PSR2 selective fetch: enable" valid for both cases (Jouni)
v3: use check_psr2_support (Jouni)
v4: split patches (Jouni)
v5: drop changes on psr2_sel_fetch_to_psr1 and *_restore (Jouni)
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
---
lib/igt_psr.c | 20 ++++++++++++++------
lib/igt_psr.h | 2 +-
2 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/lib/igt_psr.c b/lib/igt_psr.c
index cad8cce05..6008b73a6 100644
--- a/lib/igt_psr.c
+++ b/lib/igt_psr.c
@@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd)
return strstr(buf, "PSR mode: disabled\n");
}
-bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output)
+bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
{
char buf[PSR_STATUS_MAX_LEN];
char debugfs_file[128] = {0};
@@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output
(strstr(line, "PSR = yes") &&
(strstr(line, "[0x03]") || strstr(line, "[0x04]")));
case PR_MODE:
- return strstr(line, "Panel Replay = yes");
+ return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no");
+ case PR_MODE_SEL_FETCH:
+ return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes");
default:
igt_assert_f(false, "Invalid psr mode\n");
return false;
@@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output)
return false;
debugfs_fd = igt_debugfs_dir(drm_fd);
- ret = psr2_selective_fetch_check(debugfs_fd, output);
+ ret = selective_fetch_check(debugfs_fd, output);
close(debugfs_fd);
return ret;
@@ -343,7 +345,11 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output)
return ret;
debugfs_fd = igt_debugfs_dir(drm_fd);
- if (psr2_selective_fetch_check(debugfs_fd, output)) {
+ if (selective_fetch_check(debugfs_fd, output)) {
+ /*
+ * With below we switch to PSR1 incase of PSR and
+ * Panel Replay Full Frame update in case of Panel Replay.
+ */
psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
ret = true;
}
@@ -389,11 +395,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output)
if (strstr(buf, "Panel Replay Enabled"))
return PR_MODE;
+ else if (strstr(buf, "Panel Replay Selective Update Enabled"))
+ return PR_MODE_SEL_FETCH;
else if (strstr(buf, "PSR2 selective fetch: enabled"))
return PSR_MODE_2_SEL_FETCH;
- else if (strstr(buf, "PSR2 enabled"))
+ else if (strstr(buf, "PSR2"))
return PSR_MODE_2;
- else if (strstr(buf, "PSR1 enabled"))
+ else if (strstr(buf, "PSR1"))
return PSR_MODE_1;
return PSR_DISABLED;
diff --git a/lib/igt_psr.h b/lib/igt_psr.h
index 372bef2b2..e8595fd8c 100644
--- a/lib/igt_psr.h
+++ b/lib/igt_psr.h
@@ -46,7 +46,7 @@ enum fbc_mode {
};
bool psr_disabled_check(int debugfs_fd);
-bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output);
+bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf
2024-02-21 9:01 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi
2024-02-21 9:01 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi
2024-02-21 9:01 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi
@ 2024-02-21 9:01 ` Kunal Joshi
2024-02-21 8:56 ` Hogander, Jouni
2024-02-21 9:37 ` ✓ CI.xeBAT: success for extend psr2_sf test for pr_sf (rev7) Patchwork
` (2 subsequent siblings)
5 siblings, 1 reply; 17+ messages in thread
From: Kunal Joshi @ 2024-02-21 9:01 UTC (permalink / raw)
To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy
Extend the tests to cover panel replay selective fetch feature.
From kms_psr2_sf test point of view we have check_pr_psr2_sel_fetch_support
function to check if PR/PSR2 selective fetch is supported for an output
if output supports selective fetch then we check we if enter DEEP_SLEEP mode
in run function
v2: fixed dynamic test name
v3: use check_psr2_support (Jouni)
v4: correct order of checks in check_pr_psr2_sel_fetch_support (Jouni)
use appropriate psr mode in psr_wait_entry (Jouni)
v5: modify get_sel_fetch_mode_for_output to use member data (Jouni)
v6: modify get_sel_fetch_mode_for_output -> set_sel_fetch_mode_for_output (Jouni)
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com>
---
tests/intel/kms_psr2_sf.c | 195 +++++++++++++++++++++++++++-----------
1 file changed, 142 insertions(+), 53 deletions(-)
diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c
index 0fb300161..4c3e34aa0 100644
--- a/tests/intel/kms_psr2_sf.c
+++ b/tests/intel/kms_psr2_sf.c
@@ -172,6 +172,7 @@ typedef struct {
uint32_t screen_changes;
int cur_x, cur_y;
enum pipe pipe;
+ enum psr_mode psr_mode;
enum {
FEATURE_NONE = 0,
FEATURE_DSC = 1,
@@ -179,6 +180,41 @@ typedef struct {
} coexist_feature;
} data_t;
+static bool set_sel_fetch_mode_for_output(data_t *data)
+{
+ bool supported = false;
+
+ if (psr_sink_support(data->drm_fd, data->debugfs_fd,
+ PR_MODE_SEL_FETCH, data->output)) {
+ supported = true;
+ data->psr_mode = PR_MODE_SEL_FETCH;
+ } else if (psr_sink_support(data->drm_fd, data->debugfs_fd,
+ PSR_MODE_2, data->output)) {
+ supported = true;
+ data->psr_mode = PSR_MODE_2;
+ } else
+ igt_info("selective fetch not supported on output %s\n", data->output->name);
+
+ return supported;
+}
+
+static const char *get_psr_mode_str_for_output(data_t *data)
+{
+ static const char *psr_mode;
+
+ switch (data->psr_mode) {
+ case PSR_MODE_2:
+ psr_mode = "psr2";
+ break;
+ case PR_MODE_SEL_FETCH:
+ psr_mode = "pr";
+ break;
+ default:
+ psr_mode = "";
+ }
+ return psr_mode;
+}
+
static const char *op_str(enum operations op)
{
static const char * const name[] = {
@@ -688,7 +724,7 @@ static void damaged_plane_move(data_t *data)
igt_display_commit2(&data->display, COMMIT_ATOMIC);
- igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL));
+ igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output));
expected_output(data);
}
@@ -788,7 +824,7 @@ static void plane_move_continuous(data_t *data)
{
int target_x, target_y;
- igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL));
+ igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output));
get_target_coords(data, &target_x, &target_y);
@@ -865,7 +901,7 @@ static void damaged_plane_update(data_t *data)
igt_plane_set_position(data->test_plane, 0, 0);
igt_display_commit2(&data->display, COMMIT_ATOMIC);
- igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL));
+ igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output));
expected_output(data);
}
@@ -874,7 +910,7 @@ static void run(data_t *data)
{
int i;
- igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL));
+ igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output));
if (data->fbc_flag == true && data->op_fbc_mode == FBC_ENABLED)
igt_assert_f(intel_fbc_wait_until_enabled(data->drm_fd,
@@ -952,14 +988,22 @@ static void cleanup(data_t *data)
igt_remove_fb(data->drm_fd, &data->fb_test);
}
-static int check_psr2_support(data_t *data)
+static bool check_pr_psr2_sel_fetch_support(data_t *data)
{
- int status;
+ bool status = false;
+
+ /* Check sink supports PR/PSR2 selective fetch */
+ if (!set_sel_fetch_mode_for_output(data))
+ return false;
+
+ /* Check if selective fetch can be enabled */
+ if (!selective_fetch_check(data->debugfs_fd, data->output))
+ igt_assert("Selective fetch is not enabled even though panel should support it\n");
prepare(data);
- status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL);
+ /* We enter into DEEP_SLEEP for both PSR2 and PR sel fetch */
+ status = psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output);
cleanup(data);
-
return status;
}
@@ -981,6 +1025,8 @@ pipe_output_combo_valid(igt_display_t *display,
igt_main
{
+ bool output_supports_pr_psr2_sel_fetch = false;
+ bool pr_psr2_sel_fetch_supported = false;
data_t data = {};
igt_output_t *outputs[IGT_MAX_PIPES * IGT_MAX_PIPES];
int i, j, k, y;
@@ -1000,11 +1046,6 @@ igt_main
data.debugfs_fd = igt_debugfs_dir(data.drm_fd);
kmstest_set_vt_graphics_mode();
- igt_require_f(psr_sink_support(data.drm_fd,
- data.debugfs_fd, PSR_MODE_2,
- NULL),
- "Sink does not support PSR2\n");
-
display_init(&data);
if ((intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 20) &&
@@ -1028,7 +1069,8 @@ igt_main
for_each_pipe_with_valid_output(&data.display, data.pipe, data.output) {
coexist_features[n_pipes] = 0;
- if (check_psr2_support(&data)) {
+ output_supports_pr_psr2_sel_fetch = check_pr_psr2_sel_fetch_support(&data);
+ if (output_supports_pr_psr2_sel_fetch) {
pipes[n_pipes] = data.pipe;
outputs[n_pipes] = data.output;
@@ -1037,7 +1079,10 @@ igt_main
n_pipes++;
}
+ pr_psr2_sel_fetch_supported |= output_supports_pr_psr2_sel_fetch;
}
+ igt_require_f(pr_psr2_sel_fetch_supported,
+ "No output supports selective fetch\n");
}
for (y = 0; y < ARRAY_SIZE(fbc_status); y++) {
@@ -1054,15 +1099,18 @@ igt_main
for (i = 0; i < n_pipes; i++) {
if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
continue;
+ data.pipe = pipes[i];
+ data.output = outputs[i];
+ igt_assert_f(set_sel_fetch_mode_for_output(&data),
+ "Selective fetch is not supported\n");
for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) {
if (j != FEATURE_NONE && !(coexist_features[i] & j))
continue;
- igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]),
+ igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data),
+ kmstest_pipe_name(pipes[i]),
igt_output_name(outputs[i]),
coexist_feature_str(j)) {
- data.pipe = pipes[i];
- data.output = outputs[i];
data.test_plane_id = DRM_PLANE_TYPE_PRIMARY;
data.coexist_feature = j;
for (k = 1; k <= MAX_DAMAGE_AREAS; k++) {
@@ -1087,18 +1135,22 @@ igt_main
if (!pipe_output_combo_valid(&data.display, pipes[i],
outputs[i]))
continue;
+ data.pipe = pipes[i];
+ data.output = outputs[i];
+ igt_assert_f(set_sel_fetch_mode_for_output(&data),
+ "Selective fetch is not supported\n");
for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) {
if (j != FEATURE_NONE && !(coexist_features[i] & j))
continue;
- igt_dynamic_f("pipe-%s-%s%s",
+ igt_dynamic_f("%s-pipe-%s-%s%s",
+ get_psr_mode_str_for_output(&data),
kmstest_pipe_name(pipes[i]),
igt_output_name(outputs[i]),
coexist_feature_str(j)) {
- data.pipe = pipes[i];
- data.output = outputs[i];
data.test_plane_id = DRM_PLANE_TYPE_PRIMARY;
data.coexist_feature = j;
+
for (k = 1; k <= MAX_DAMAGE_AREAS; k++) {
data.damage_area_count = k;
prepare(&data);
@@ -1119,17 +1171,21 @@ igt_main
for (i = 0; i < n_pipes; i++) {
if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
continue;
+ data.pipe = pipes[i];
+ data.output = outputs[i];
+ igt_assert_f(set_sel_fetch_mode_for_output(&data),
+ "Selective fetch is not supported\n");
for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) {
if (j != FEATURE_NONE && !(coexist_features[i] & j))
continue;
- igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]),
+ igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data),
+ kmstest_pipe_name(pipes[i]),
igt_output_name(outputs[i]),
coexist_feature_str(j)) {
- data.pipe = pipes[i];
- data.output = outputs[i];
data.test_plane_id = DRM_PLANE_TYPE_OVERLAY;
data.coexist_feature = j;
+
for (k = 1; k <= MAX_DAMAGE_AREAS; k++) {
data.damage_area_count = k;
prepare(&data);
@@ -1149,15 +1205,18 @@ igt_main
for (i = 0; i < n_pipes; i++) {
if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
continue;
+ data.pipe = pipes[i];
+ data.output = outputs[i];
+ igt_assert_f(set_sel_fetch_mode_for_output(&data),
+ "Selective fetch is not supported\n");
for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) {
if (j != FEATURE_NONE && !(coexist_features[i] & j))
continue;
- igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]),
+ igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data),
+ kmstest_pipe_name(pipes[i]),
igt_output_name(outputs[i]),
coexist_feature_str(j)) {
- data.pipe = pipes[i];
- data.output = outputs[i];
data.test_plane_id = DRM_PLANE_TYPE_CURSOR;
data.coexist_feature = j;
prepare(&data);
@@ -1175,17 +1234,21 @@ igt_main
for (i = 0; i < n_pipes; i++) {
if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
continue;
+ data.pipe = pipes[i];
+ data.output = outputs[i];
+ igt_assert_f(set_sel_fetch_mode_for_output(&data),
+ "Selective fetch is not supported\n");
for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) {
if (j != FEATURE_NONE && !(coexist_features[i] & j))
continue;
- igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]),
+ igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data),
+ kmstest_pipe_name(pipes[i]),
igt_output_name(outputs[i]),
coexist_feature_str(j)) {
- data.pipe = pipes[i];
- data.output = outputs[i];
data.test_plane_id = DRM_PLANE_TYPE_CURSOR;
data.coexist_feature = j;
+
prepare(&data);
run(&data);
cleanup(&data);
@@ -1202,15 +1265,18 @@ igt_main
for (i = 0; i < n_pipes; i++) {
if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
continue;
+ data.pipe = pipes[i];
+ data.output = outputs[i];
+ igt_assert_f(set_sel_fetch_mode_for_output(&data),
+ "Selective fetch is not supported\n");
for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) {
if (j != FEATURE_NONE && !(coexist_features[i] & j))
continue;
- igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]),
+ igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data),
+ kmstest_pipe_name(pipes[i]),
igt_output_name(outputs[i]),
coexist_feature_str(j)) {
- data.pipe = pipes[i];
- data.output = outputs[i];
data.test_plane_id = DRM_PLANE_TYPE_CURSOR;
data.coexist_feature = j;
prepare(&data);
@@ -1229,15 +1295,18 @@ igt_main
for (i = 0; i < n_pipes; i++) {
if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
continue;
+ data.pipe = pipes[i];
+ data.output = outputs[i];
+ igt_assert_f(set_sel_fetch_mode_for_output(&data),
+ "Selective fetch is not supported\n");
for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) {
if (j != FEATURE_NONE && !(coexist_features[i] & j))
continue;
- igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]),
+ igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data),
+ kmstest_pipe_name(pipes[i]),
igt_output_name(outputs[i]),
coexist_feature_str(j)) {
- data.pipe = pipes[i];
- data.output = outputs[i];
data.test_plane_id = DRM_PLANE_TYPE_CURSOR;
data.coexist_feature = j;
prepare(&data);
@@ -1257,15 +1326,19 @@ igt_main
for (i = 0; i < n_pipes; i++) {
if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
continue;
+ data.pipe = pipes[i];
+ data.output = outputs[i];
+ igt_assert_f(set_sel_fetch_mode_for_output(&data),
+ "Selective fetch is not supported\n");
for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) {
if (j != FEATURE_NONE && !(coexist_features[i] & j))
continue;
- igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]),
+ igt_dynamic_f("%s-pipe-%s-%s%s",
+ get_psr_mode_str_for_output(&data),
+ kmstest_pipe_name(pipes[i]),
igt_output_name(outputs[i]),
coexist_feature_str(j)) {
- data.pipe = pipes[i];
- data.output = outputs[i];
data.test_plane_id = DRM_PLANE_TYPE_OVERLAY;
data.coexist_feature = j;
for (k = POS_TOP_LEFT; k <= POS_BOTTOM_RIGHT ; k++) {
@@ -1286,15 +1359,18 @@ igt_main
for (i = 0; i < n_pipes; i++) {
if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
continue;
+ data.pipe = pipes[i];
+ data.output = outputs[i];
+ igt_assert_f(set_sel_fetch_mode_for_output(&data),
+ "Selective fetch is not supported\n");
for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) {
if (j != FEATURE_NONE && !(coexist_features[i] & j))
continue;
- igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]),
+ igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data),
+ kmstest_pipe_name(pipes[i]),
igt_output_name(outputs[i]),
coexist_feature_str(j)) {
- data.pipe = pipes[i];
- data.output = outputs[i];
data.test_plane_id = DRM_PLANE_TYPE_OVERLAY;
data.coexist_feature = j;
prepare(&data);
@@ -1313,15 +1389,18 @@ igt_main
for (i = 0; i < n_pipes; i++) {
if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
continue;
+ data.pipe = pipes[i];
+ data.output = outputs[i];
+ igt_assert_f(set_sel_fetch_mode_for_output(&data),
+ "Selective fetch is not supported\n");
for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) {
if (j != FEATURE_NONE && !(coexist_features[i] & j))
continue;
- igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]),
+ igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data),
+ kmstest_pipe_name(pipes[i]),
igt_output_name(outputs[i]),
coexist_feature_str(j)) {
- data.pipe = pipes[i];
- data.output = outputs[i];
data.test_plane_id = DRM_PLANE_TYPE_OVERLAY;
data.coexist_feature = j;
prepare(&data);
@@ -1340,15 +1419,18 @@ igt_main
for (i = 0; i < n_pipes; i++) {
if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
continue;
+ data.pipe = pipes[i];
+ data.output = outputs[i];
+ igt_assert_f(set_sel_fetch_mode_for_output(&data),
+ "Selective fetch is not supported\n");
for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) {
if (j != FEATURE_NONE && !(coexist_features[i] & j))
continue;
- igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]),
+ igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data),
+ kmstest_pipe_name(pipes[i]),
igt_output_name(outputs[i]),
coexist_feature_str(j)) {
- data.pipe = pipes[i];
- data.output = outputs[i];
data.test_plane_id = DRM_PLANE_TYPE_OVERLAY;
data.coexist_feature = j;
prepare(&data);
@@ -1368,19 +1450,23 @@ igt_main
for (i = 0; i < n_pipes; i++) {
if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
continue;
+ data.pipe = pipes[i];
+ data.output = outputs[i];
+ igt_assert_f(set_sel_fetch_mode_for_output(&data),
+ "Selective fetch is not supported\n");
for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) {
if (j != FEATURE_NONE && !(coexist_features[i] & j))
continue;
- igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]),
+ igt_dynamic_f("%s-pipe-%s-%s%s", kmstest_pipe_name(pipes[i]),
+ get_psr_mode_str_for_output(&data),
igt_output_name(outputs[i]),
coexist_feature_str(j)) {
- data.pipe = pipes[i];
- data.output = outputs[i];
for (k = 1; k <= MAX_DAMAGE_AREAS; k++) {
data.damage_area_count = k;
data.test_plane_id = DRM_PLANE_TYPE_PRIMARY;
data.coexist_feature = j;
+
prepare(&data);
run(&data);
cleanup(&data);
@@ -1401,15 +1487,18 @@ igt_main
for (i = 0; i < n_pipes; i++) {
if (!pipe_output_combo_valid(&data.display, pipes[i], outputs[i]))
continue;
+ data.pipe = pipes[i];
+ data.output = outputs[i];
+ igt_assert_f(set_sel_fetch_mode_for_output(&data),
+ "Selective fetch is not supported\n");
for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) {
if (j != FEATURE_NONE && !(coexist_features[i] & j))
continue;
- igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]),
+ igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data),
+ kmstest_pipe_name(pipes[i]),
igt_output_name(outputs[i]),
coexist_feature_str(j)) {
- data.pipe = pipes[i];
- data.output = outputs[i];
data.damage_area_count = 1;
if (data.op_fbc_mode == FBC_ENABLED)
data.primary_format = DRM_FORMAT_XRGB8888;
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* ✓ CI.xeBAT: success for extend psr2_sf test for pr_sf (rev7)
2024-02-21 9:01 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi
` (2 preceding siblings ...)
2024-02-21 9:01 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi
@ 2024-02-21 9:37 ` Patchwork
2024-02-21 9:56 ` ✓ Fi.CI.BAT: " Patchwork
2024-02-21 11:29 ` ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2024-02-21 9:37 UTC (permalink / raw)
To: Joshi, Kunal1; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 1056 bytes --]
== Series Details ==
Series: extend psr2_sf test for pr_sf (rev7)
URL : https://patchwork.freedesktop.org/series/129004/
State : success
== Summary ==
CI Bug Log - changes from XEIGT_7718_BAT -> XEIGTPW_10708_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_7718 -> IGTPW_10708
* Linux: xe-803-f12bce6493b6443870b55f36b1462d65e450d29d -> xe-807-e2b02e89746d8eff8c244f938eecd0f1db8eb805
IGTPW_10708: 10708
IGT_7718: 40e8b9122853f455c84afcfa56469a6bc9a0d564 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-803-f12bce6493b6443870b55f36b1462d65e450d29d: f12bce6493b6443870b55f36b1462d65e450d29d
xe-807-e2b02e89746d8eff8c244f938eecd0f1db8eb805: e2b02e89746d8eff8c244f938eecd0f1db8eb805
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10708/index.html
[-- Attachment #2: Type: text/html, Size: 1615 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✓ Fi.CI.BAT: success for extend psr2_sf test for pr_sf (rev7)
2024-02-21 9:01 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi
` (3 preceding siblings ...)
2024-02-21 9:37 ` ✓ CI.xeBAT: success for extend psr2_sf test for pr_sf (rev7) Patchwork
@ 2024-02-21 9:56 ` Patchwork
2024-02-21 11:29 ` ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2024-02-21 9:56 UTC (permalink / raw)
To: Joshi, Kunal1; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 1729 bytes --]
== Series Details ==
Series: extend psr2_sf test for pr_sf (rev7)
URL : https://patchwork.freedesktop.org/series/129004/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14306 -> IGTPW_10708
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/index.html
Participating hosts (39 -> 37)
------------------------------
Missing (2): fi-apl-guc fi-snb-2520m
Known issues
------------
Here are the changes found in IGTPW_10708 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@gem_exec_fence@basic-busy@ccs0:
- {bat-arls-1}: [DMESG-WARN][1] ([i915#10194]) -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/bat-arls-1/igt@gem_exec_fence@basic-busy@ccs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/bat-arls-1/igt@gem_exec_fence@basic-busy@ccs0.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10194]: https://gitlab.freedesktop.org/drm/intel/issues/10194
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7718 -> IGTPW_10708
CI-20190529: 20190529
CI_DRM_14306: b895612a4da69e73804cd5fc2dedfa44fda1da99 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_10708: 10708
IGT_7718: 40e8b9122853f455c84afcfa56469a6bc9a0d564 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Testlist changes
----------------
-igt@xe_vm@compact-64k-pages
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/index.html
[-- Attachment #2: Type: text/html, Size: 2321 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.IGT: failure for extend psr2_sf test for pr_sf (rev7)
2024-02-21 9:01 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi
` (4 preceding siblings ...)
2024-02-21 9:56 ` ✓ Fi.CI.BAT: " Patchwork
@ 2024-02-21 11:29 ` Patchwork
5 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2024-02-21 11:29 UTC (permalink / raw)
To: Joshi, Kunal1; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 88654 bytes --]
== Series Details ==
Series: extend psr2_sf test for pr_sf (rev7)
URL : https://patchwork.freedesktop.org/series/129004/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14306_full -> IGTPW_10708_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_10708_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_10708_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/index.html
Participating hosts (8 -> 8)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_10708_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_cursor_legacy@single-move@pipe-a:
- shard-rkl: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-4/igt@kms_cursor_legacy@single-move@pipe-a.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-7/igt@kms_cursor_legacy@single-move@pipe-a.html
* {igt@kms_psr2_sf@fbc-primary-plane-update-sf-dmg-area@psr2-pipe-a-edp-1} (NEW):
- shard-mtlp: NOTRUN -> [SKIP][3] +23 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-mtlp-2/igt@kms_psr2_sf@fbc-primary-plane-update-sf-dmg-area@psr2-pipe-a-edp-1.html
#### Warnings ####
* igt@kms_async_flips@test-cursor:
- shard-mtlp: [SKIP][4] ([i915#6229]) -> [SKIP][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-mtlp-8/igt@kms_async_flips@test-cursor.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-mtlp-7/igt@kms_async_flips@test-cursor.html
New tests
---------
New tests have been introduced between CI_DRM_14306_full and IGTPW_10708_full:
### New IGT tests (50) ###
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [11.79] s
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf@psr2-pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [11.80] s
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf@psr2-pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [11.53] s
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf@psr2-pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [11.51] s
* igt@kms_psr2_sf@cursor-plane-move-continuous-sf@psr2-pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [11.15] s
* igt@kms_psr2_sf@cursor-plane-move-continuous-sf@psr2-pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [11.21] s
* igt@kms_psr2_sf@cursor-plane-update-sf@psr2-pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.35] s
* igt@kms_psr2_sf@cursor-plane-update-sf@psr2-pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.41] s
* igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1:
- Statuses : 1 skip(s)
- Exec time: [0.83] s
* igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-fully-sf@psr2-pipe-b-edp-1:
- Statuses : 1 skip(s)
- Exec time: [1.21] s
* igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-sf@psr2-pipe-a-edp-1:
- Statuses : 1 skip(s)
- Exec time: [0.83] s
* igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-sf@psr2-pipe-b-edp-1:
- Statuses : 1 skip(s)
- Exec time: [1.22] s
* igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-sf@psr2-pipe-a-edp-1:
- Statuses : 1 skip(s)
- Exec time: [0.85] s
* igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-sf@psr2-pipe-b-edp-1:
- Statuses : 1 skip(s)
- Exec time: [1.21] s
* igt@kms_psr2_sf@fbc-cursor-plane-update-sf@psr2-pipe-a-edp-1:
- Statuses : 1 skip(s)
- Exec time: [0.88] s
* igt@kms_psr2_sf@fbc-cursor-plane-update-sf@psr2-pipe-b-edp-1:
- Statuses : 1 skip(s)
- Exec time: [1.21] s
* igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1:
- Statuses : 1 skip(s)
- Exec time: [0.84] s
* igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-b-edp-1:
- Statuses : 1 skip(s)
- Exec time: [1.21] s
* igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-sf@psr2-pipe-a-edp-1:
- Statuses : 1 skip(s)
- Exec time: [0.84] s
* igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-sf@psr2-pipe-b-edp-1:
- Statuses : 1 skip(s)
- Exec time: [1.21] s
* igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-sf@psr2-pipe-a-edp-1:
- Statuses : 1 skip(s)
- Exec time: [0.85] s
* igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-sf@psr2-pipe-b-edp-1:
- Statuses : 1 skip(s)
- Exec time: [1.21] s
* igt@kms_psr2_sf@fbc-overlay-plane-update-continuous-sf@psr2-pipe-a-edp-1:
- Statuses : 1 skip(s)
- Exec time: [0.84] s
* igt@kms_psr2_sf@fbc-overlay-plane-update-continuous-sf@psr2-pipe-b-edp-1:
- Statuses : 1 skip(s)
- Exec time: [1.27] s
* igt@kms_psr2_sf@fbc-overlay-plane-update-sf-dmg-area@psr2-pipe-a-edp-1:
- Statuses : 1 skip(s)
- Exec time: [0.84] s
* igt@kms_psr2_sf@fbc-overlay-plane-update-sf-dmg-area@psr2-pipe-b-edp-1:
- Statuses : 1 skip(s)
- Exec time: [1.24] s
* igt@kms_psr2_sf@fbc-overlay-primary-update-sf-dmg-area@a-pipe-psr2-edp-1:
- Statuses : 1 skip(s)
- Exec time: [0.83] s
* igt@kms_psr2_sf@fbc-overlay-primary-update-sf-dmg-area@b-pipe-psr2-edp-1:
- Statuses : 1 skip(s)
- Exec time: [1.26] s
* igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area@psr2-pipe-a-edp-1:
- Statuses : 1 skip(s)
- Exec time: [0.84] s
* igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area@psr2-pipe-b-edp-1:
- Statuses : 1 skip(s)
- Exec time: [1.21] s
* igt@kms_psr2_sf@fbc-primary-plane-update-sf-dmg-area@psr2-pipe-a-edp-1:
- Statuses : 1 skip(s)
- Exec time: [0.86] s
* igt@kms_psr2_sf@fbc-primary-plane-update-sf-dmg-area@psr2-pipe-b-edp-1:
- Statuses : 1 skip(s)
- Exec time: [1.21] s
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [17.27] s
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [17.28] s
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf@psr2-pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [12.12] s
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf@psr2-pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [12.11] s
* igt@kms_psr2_sf@overlay-plane-move-continuous-sf@psr2-pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [6.81] s
* igt@kms_psr2_sf@overlay-plane-move-continuous-sf@psr2-pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [6.77] s
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf@psr2-pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.83] s
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf@psr2-pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.82] s
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area@psr2-pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [6.81] s
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area@psr2-pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [6.81] s
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area@a-pipe-psr2-edp-1:
- Statuses : 1 pass(s)
- Exec time: [6.82] s
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area@b-pipe-psr2-edp-1:
- Statuses : 1 pass(s)
- Exec time: [6.81] s
* igt@kms_psr2_sf@plane-move-sf-dmg-area@psr2-pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [5.44] s
* igt@kms_psr2_sf@plane-move-sf-dmg-area@psr2-pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [5.45] s
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb@psr2-pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [7.30] s
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb@psr2-pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [7.61] s
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area@psr2-pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [6.84] s
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area@psr2-pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [6.85] s
Known issues
------------
Here are the changes found in IGTPW_10708_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-keep-cache:
- shard-dg2: NOTRUN -> [SKIP][6] ([i915#8411])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@api_intel_bb@blit-reloc-keep-cache.html
* igt@api_intel_bb@crc32:
- shard-rkl: NOTRUN -> [SKIP][7] ([i915#6230])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@api_intel_bb@crc32.html
* igt@api_intel_bb@render-ccs:
- shard-dg2: NOTRUN -> [FAIL][8] ([i915#10288])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@api_intel_bb@render-ccs.html
* igt@device_reset@unbind-cold-reset-rebind:
- shard-tglu: NOTRUN -> [SKIP][9] ([i915#7701])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-2/igt@device_reset@unbind-cold-reset-rebind.html
* igt@drm_fdinfo@busy-hang@bcs0:
- shard-dg2: NOTRUN -> [SKIP][10] ([i915#8414]) +9 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@drm_fdinfo@busy-hang@bcs0.html
* igt@drm_fdinfo@most-busy-check-all@rcs0:
- shard-rkl: [PASS][11] -> [FAIL][12] ([i915#7742])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-2/igt@drm_fdinfo@most-busy-check-all@rcs0.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-7/igt@drm_fdinfo@most-busy-check-all@rcs0.html
* igt@gem_basic@multigpu-create-close:
- shard-dg2: NOTRUN -> [SKIP][13] ([i915#7697])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@gem_basic@multigpu-create-close.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-dg2: NOTRUN -> [ABORT][14] ([i915#10183])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-6/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_create@create-ext-set-pat:
- shard-rkl: NOTRUN -> [SKIP][15] ([i915#8562])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-2/igt@gem_create@create-ext-set-pat.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglu: [PASS][16] -> [FAIL][17] ([i915#6268])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-tglu-7/igt@gem_ctx_exec@basic-nohangcheck.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-5/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_ctx_persistence@engines-cleanup:
- shard-snb: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#1099])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb1/igt@gem_ctx_persistence@engines-cleanup.html
* igt@gem_ctx_persistence@heartbeat-hostile:
- shard-dg1: NOTRUN -> [SKIP][19] ([i915#8555])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-15/igt@gem_ctx_persistence@heartbeat-hostile.html
* igt@gem_ctx_sseu@invalid-sseu:
- shard-tglu: NOTRUN -> [SKIP][20] ([i915#280])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-2/igt@gem_ctx_sseu@invalid-sseu.html
* igt@gem_exec_balancer@hog:
- shard-dg2: NOTRUN -> [SKIP][21] ([i915#4812])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-7/igt@gem_exec_balancer@hog.html
* igt@gem_exec_balancer@parallel:
- shard-rkl: NOTRUN -> [SKIP][22] ([i915#4525])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-4/igt@gem_exec_balancer@parallel.html
* igt@gem_exec_capture@capture-invisible@lmem0:
- shard-dg2: NOTRUN -> [SKIP][23] ([i915#6334]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-6/igt@gem_exec_capture@capture-invisible@lmem0.html
* igt@gem_exec_capture@capture-invisible@smem0:
- shard-rkl: NOTRUN -> [SKIP][24] ([i915#6334])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@gem_exec_capture@capture-invisible@smem0.html
* igt@gem_exec_capture@many-4k-incremental:
- shard-dg1: NOTRUN -> [FAIL][25] ([i915#9606])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-17/igt@gem_exec_capture@many-4k-incremental.html
* igt@gem_exec_capture@many-4k-zero:
- shard-tglu: NOTRUN -> [FAIL][26] ([i915#9606])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-4/igt@gem_exec_capture@many-4k-zero.html
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-rkl: NOTRUN -> [FAIL][27] ([i915#2842]) +1 other test fail
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-7/igt@gem_exec_fair@basic-none-rrul@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: NOTRUN -> [FAIL][28] ([i915#2842])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-glk6/igt@gem_exec_fair@basic-pace-share@rcs0.html
- shard-tglu: [PASS][29] -> [FAIL][30] ([i915#2842])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-tglu-3/igt@gem_exec_fair@basic-pace-share@rcs0.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-3/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace@bcs0:
- shard-tglu: NOTRUN -> [FAIL][31] ([i915#2842]) +5 other tests fail
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-8/igt@gem_exec_fair@basic-pace@bcs0.html
* igt@gem_exec_fair@basic-sync:
- shard-dg1: NOTRUN -> [SKIP][32] ([i915#3539])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-18/igt@gem_exec_fair@basic-sync.html
* igt@gem_exec_flush@basic-wb-ro-before-default:
- shard-dg2: NOTRUN -> [SKIP][33] ([i915#3539] / [i915#4852]) +1 other test skip
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@gem_exec_flush@basic-wb-ro-before-default.html
* igt@gem_exec_flush@basic-wb-set-default:
- shard-dg1: NOTRUN -> [SKIP][34] ([i915#3539] / [i915#4852])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-13/igt@gem_exec_flush@basic-wb-set-default.html
* igt@gem_exec_params@secure-non-master:
- shard-dg2: NOTRUN -> [SKIP][35] ([fdo#112283])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-6/igt@gem_exec_params@secure-non-master.html
* igt@gem_exec_reloc@basic-active:
- shard-dg2: NOTRUN -> [SKIP][36] ([i915#3281]) +12 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-6/igt@gem_exec_reloc@basic-active.html
* igt@gem_exec_reloc@basic-concurrent0:
- shard-dg1: NOTRUN -> [SKIP][37] ([i915#3281]) +1 other test skip
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-19/igt@gem_exec_reloc@basic-concurrent0.html
* igt@gem_exec_reloc@basic-cpu-gtt:
- shard-rkl: NOTRUN -> [SKIP][38] ([i915#3281]) +4 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-4/igt@gem_exec_reloc@basic-cpu-gtt.html
* igt@gem_exec_schedule@preempt-queue-contexts-chain:
- shard-dg2: NOTRUN -> [SKIP][39] ([i915#4537] / [i915#4812]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-7/igt@gem_exec_schedule@preempt-queue-contexts-chain.html
* igt@gem_exec_suspend@basic-s0@smem:
- shard-dg2: [PASS][40] -> [INCOMPLETE][41] ([i915#9275])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-dg2-2/igt@gem_exec_suspend@basic-s0@smem.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-5/igt@gem_exec_suspend@basic-s0@smem.html
* igt@gem_exec_suspend@basic-s4-devices@lmem0:
- shard-dg2: NOTRUN -> [ABORT][42] ([i915#7975] / [i915#8213])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@gem_exec_suspend@basic-s4-devices@lmem0.html
* igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible:
- shard-dg2: NOTRUN -> [SKIP][43] ([i915#4860])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible.html
* igt@gem_lmem_swapping@heavy-verify-random-ccs:
- shard-tglu: NOTRUN -> [SKIP][44] ([i915#4613]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-9/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
* igt@gem_lmem_swapping@massive:
- shard-rkl: NOTRUN -> [SKIP][45] ([i915#4613]) +2 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-4/igt@gem_lmem_swapping@massive.html
* igt@gem_lmem_swapping@verify-random-ccs:
- shard-glk: NOTRUN -> [SKIP][46] ([fdo#109271] / [i915#4613]) +1 other test skip
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-glk7/igt@gem_lmem_swapping@verify-random-ccs.html
* igt@gem_mmap_gtt@basic-small-bo:
- shard-dg2: NOTRUN -> [SKIP][47] ([i915#4077]) +14 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-7/igt@gem_mmap_gtt@basic-small-bo.html
* igt@gem_mmap_gtt@close-race:
- shard-dg1: NOTRUN -> [SKIP][48] ([i915#4077])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-13/igt@gem_mmap_gtt@close-race.html
* igt@gem_mmap_wc@bad-offset:
- shard-dg1: NOTRUN -> [SKIP][49] ([i915#4083]) +1 other test skip
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-13/igt@gem_mmap_wc@bad-offset.html
* igt@gem_mmap_wc@write-prefaulted:
- shard-dg2: NOTRUN -> [SKIP][50] ([i915#4083]) +2 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-5/igt@gem_mmap_wc@write-prefaulted.html
* igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
- shard-rkl: NOTRUN -> [SKIP][51] ([i915#3282]) +5 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
* igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
- shard-tglu: NOTRUN -> [SKIP][52] ([i915#4270])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-9/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
* igt@gem_pxp@verify-pxp-stale-buf-execution:
- shard-dg2: NOTRUN -> [SKIP][53] ([i915#4270]) +3 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-2/igt@gem_pxp@verify-pxp-stale-buf-execution.html
* igt@gem_pxp@verify-pxp-stale-ctx-execution:
- shard-rkl: NOTRUN -> [SKIP][54] ([i915#4270])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-2/igt@gem_pxp@verify-pxp-stale-ctx-execution.html
* igt@gem_readwrite@beyond-eob:
- shard-dg2: NOTRUN -> [SKIP][55] ([i915#3282]) +2 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@gem_readwrite@beyond-eob.html
* igt@gem_set_tiling_vs_blt@tiled-to-tiled:
- shard-dg2: NOTRUN -> [SKIP][56] ([i915#4079]) +1 other test skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-2/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
* igt@gem_userptr_blits@coherency-unsync:
- shard-dg2: NOTRUN -> [SKIP][57] ([i915#3297]) +1 other test skip
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@gem_userptr_blits@coherency-unsync.html
* igt@gem_userptr_blits@create-destroy-unsync:
- shard-rkl: NOTRUN -> [SKIP][58] ([i915#3297])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-4/igt@gem_userptr_blits@create-destroy-unsync.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-rkl: NOTRUN -> [SKIP][59] ([i915#3323])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@forbidden-operations:
- shard-dg2: NOTRUN -> [SKIP][60] ([i915#3282] / [i915#3297])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@gem_userptr_blits@forbidden-operations.html
* igt@gem_userptr_blits@map-fixed-invalidate:
- shard-dg2: NOTRUN -> [SKIP][61] ([i915#3297] / [i915#4880])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@gem_userptr_blits@map-fixed-invalidate.html
* igt@gem_userptr_blits@readonly-pwrite-unsync:
- shard-tglu: NOTRUN -> [SKIP][62] ([i915#3297]) +1 other test skip
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-9/igt@gem_userptr_blits@readonly-pwrite-unsync.html
* igt@gem_userptr_blits@sd-probe:
- shard-dg2: NOTRUN -> [SKIP][63] ([i915#3297] / [i915#4958])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@gem_userptr_blits@sd-probe.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [PASS][64] -> [ABORT][65] ([i915#5566])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-glk9/igt@gen9_exec_parse@allowed-single.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-glk1/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@batch-zero-length:
- shard-tglu: NOTRUN -> [SKIP][66] ([i915#2527] / [i915#2856])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-4/igt@gen9_exec_parse@batch-zero-length.html
* igt@gen9_exec_parse@bb-chained:
- shard-rkl: NOTRUN -> [SKIP][67] ([i915#2527])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-4/igt@gen9_exec_parse@bb-chained.html
* igt@gen9_exec_parse@shadow-peek:
- shard-dg2: NOTRUN -> [SKIP][68] ([i915#2856]) +3 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@gen9_exec_parse@shadow-peek.html
* igt@i915_module_load@load:
- shard-glk: NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#6227])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-glk4/igt@i915_module_load@load.html
- shard-dg2: NOTRUN -> [SKIP][70] ([i915#6227])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@i915_module_load@load.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-rkl: NOTRUN -> [INCOMPLETE][71] ([i915#10137] / [i915#9820] / [i915#9849])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@i915_module_load@reload-with-fault-injection.html
- shard-dg1: [PASS][72] -> [INCOMPLETE][73] ([i915#10137] / [i915#9820] / [i915#9849])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-dg1-19/igt@i915_module_load@reload-with-fault-injection.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-18/igt@i915_module_load@reload-with-fault-injection.html
- shard-tglu: [PASS][74] -> [INCOMPLETE][75] ([i915#10137] / [i915#9200])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-tglu-3/igt@i915_module_load@reload-with-fault-injection.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-7/igt@i915_module_load@reload-with-fault-injection.html
- shard-mtlp: [PASS][76] -> [ABORT][77] ([i915#10131] / [i915#9697])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-mtlp-3/igt@i915_module_load@reload-with-fault-injection.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-mtlp-1/igt@i915_module_load@reload-with-fault-injection.html
- shard-dg2: NOTRUN -> [WARN][78] ([i915#7356])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_freq_api@freq-reset:
- shard-rkl: NOTRUN -> [SKIP][79] ([i915#8399])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@i915_pm_freq_api@freq-reset.html
* igt@i915_pm_freq_mult@media-freq@gt0:
- shard-rkl: NOTRUN -> [SKIP][80] ([i915#6590])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-7/igt@i915_pm_freq_mult@media-freq@gt0.html
* igt@i915_pm_rps@basic-api:
- shard-dg2: NOTRUN -> [SKIP][81] ([i915#6621])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-7/igt@i915_pm_rps@basic-api.html
* igt@i915_pm_rps@thresholds@gt0:
- shard-dg2: NOTRUN -> [SKIP][82] ([i915#8925]) +1 other test skip
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@i915_pm_rps@thresholds@gt0.html
* igt@i915_query@query-topology-known-pci-ids:
- shard-dg1: NOTRUN -> [SKIP][83] ([fdo#109303])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-12/igt@i915_query@query-topology-known-pci-ids.html
* igt@i915_selftest@mock@memory_region:
- shard-rkl: NOTRUN -> [DMESG-WARN][84] ([i915#9311])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-4/igt@i915_selftest@mock@memory_region.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-rkl: [PASS][85] -> [FAIL][86] ([i915#10031])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-7/igt@i915_suspend@basic-s3-without-i915.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-2-y-rc-ccs-cc:
- shard-rkl: NOTRUN -> [SKIP][87] ([i915#8709]) +3 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-2-y-rc-ccs-cc.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][88] ([fdo#111614]) +3 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-0:
- shard-dg1: NOTRUN -> [SKIP][89] ([i915#4538] / [i915#5286])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-15/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
- shard-rkl: NOTRUN -> [SKIP][90] ([i915#5286]) +2 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-tglu: NOTRUN -> [SKIP][91] ([fdo#111615] / [i915#5286]) +3 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-8/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@linear-16bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][92] ([fdo#111614] / [i915#3638])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-7/igt@kms_big_fb@linear-16bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-dg2: NOTRUN -> [SKIP][93] ([i915#5190]) +10 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-2/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-tglu: [PASS][94] -> [FAIL][95] ([i915#3743])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-tglu-6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-270:
- shard-dg2: NOTRUN -> [SKIP][96] ([i915#4538] / [i915#5190]) +10 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@kms_big_fb@yf-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-270:
- shard-tglu: NOTRUN -> [SKIP][97] ([fdo#111615]) +2 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-3/igt@kms_big_fb@yf-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-rkl: NOTRUN -> [SKIP][98] ([fdo#111615])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-rkl: NOTRUN -> [SKIP][99] ([fdo#110723]) +1 other test skip
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-4/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_joiner@invalid-modeset:
- shard-tglu: NOTRUN -> [SKIP][100] ([i915#2705])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-5/igt@kms_big_joiner@invalid-modeset.html
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic-yf-tiled-ccs:
- shard-dg2: NOTRUN -> [SKIP][101] ([i915#5354]) +90 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-yf-tiled-ccs.html
* igt@kms_ccs@pipe-a-missing-ccs-buffer-y-tiled-gen12-mc-ccs:
- shard-tglu: NOTRUN -> [SKIP][102] ([i915#5354] / [i915#6095]) +23 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-10/igt@kms_ccs@pipe-a-missing-ccs-buffer-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@pipe-a-random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-rkl: NOTRUN -> [SKIP][103] ([i915#5354] / [i915#6095]) +15 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-2/igt@kms_ccs@pipe-a-random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@pipe-d-ccs-on-another-bo-4-tiled-mtl-mc-ccs:
- shard-rkl: NOTRUN -> [SKIP][104] ([i915#5354]) +15 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_ccs@pipe-d-ccs-on-another-bo-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@pipe-d-random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg1: NOTRUN -> [SKIP][105] ([i915#5354] / [i915#6095]) +8 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-16/igt@kms_ccs@pipe-d-random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-rkl: NOTRUN -> [SKIP][106] ([fdo#111827])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-7/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_color@ctm-negative:
- shard-dg2: NOTRUN -> [SKIP][107] ([fdo#111827]) +1 other test skip
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-2/igt@kms_chamelium_color@ctm-negative.html
* igt@kms_chamelium_edid@hdmi-edid-stress-resolution-4k:
- shard-tglu: NOTRUN -> [SKIP][108] ([i915#7828]) +2 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-6/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-4k.html
* igt@kms_chamelium_frames@dp-crc-fast:
- shard-dg2: NOTRUN -> [SKIP][109] ([i915#7828]) +8 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-2/igt@kms_chamelium_frames@dp-crc-fast.html
* igt@kms_chamelium_frames@hdmi-crc-single:
- shard-rkl: NOTRUN -> [SKIP][110] ([i915#7828]) +5 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-7/igt@kms_chamelium_frames@hdmi-crc-single.html
* igt@kms_content_protection@atomic:
- shard-rkl: NOTRUN -> [SKIP][111] ([i915#7118] / [i915#9424])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@atomic-dpms:
- shard-dg2: NOTRUN -> [SKIP][112] ([i915#7118] / [i915#9424]) +1 other test skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-6/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-dg2: NOTRUN -> [SKIP][113] ([i915#3299])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@type1:
- shard-tglu: NOTRUN -> [SKIP][114] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-2/igt@kms_content_protection@type1.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-rkl: NOTRUN -> [SKIP][115] ([fdo#109279] / [i915#3359])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-tglu: NOTRUN -> [SKIP][116] ([i915#3555]) +1 other test skip
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-5/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-onscreen-512x512:
- shard-dg1: NOTRUN -> [SKIP][117] ([i915#3359]) +1 other test skip
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-19/igt@kms_cursor_crc@cursor-onscreen-512x512.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-tglu: NOTRUN -> [SKIP][118] ([i915#3359]) +1 other test skip
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-8/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x10:
- shard-rkl: NOTRUN -> [SKIP][119] ([i915#3555]) +3 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-4/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-rkl: NOTRUN -> [SKIP][120] ([i915#3359])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-2/igt@kms_cursor_crc@cursor-sliding-512x512.html
- shard-dg2: NOTRUN -> [SKIP][121] ([i915#3359])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions:
- shard-dg2: NOTRUN -> [SKIP][122] ([fdo#109274] / [i915#5354]) +1 other test skip
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
- shard-tglu: NOTRUN -> [SKIP][123] ([fdo#109274])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-7/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-dg2: NOTRUN -> [SKIP][124] ([fdo#109274] / [fdo#111767] / [i915#5354])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
- shard-rkl: NOTRUN -> [SKIP][125] ([fdo#111767] / [fdo#111825])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
- shard-snb: NOTRUN -> [SKIP][126] ([fdo#109271] / [fdo#111767])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-dg2: NOTRUN -> [SKIP][127] ([i915#4103] / [i915#4213])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
- shard-rkl: NOTRUN -> [SKIP][128] ([i915#4103])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@torture-move@pipe-a:
- shard-snb: [PASS][129] -> [DMESG-WARN][130] ([i915#10166])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-snb6/igt@kms_cursor_legacy@torture-move@pipe-a.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb4/igt@kms_cursor_legacy@torture-move@pipe-a.html
* igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][131] ([fdo#110189] / [i915#9723])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-17/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-4.html
* igt@kms_display_modes@mst-extended-mode-negative:
- shard-dg2: NOTRUN -> [SKIP][132] ([i915#8588])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@kms_display_modes@mst-extended-mode-negative.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][133] ([i915#3804])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-dg2: NOTRUN -> [SKIP][134] ([i915#3840] / [i915#9688])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@kms_dsc@dsc-fractional-bpp.html
- shard-dg1: NOTRUN -> [SKIP][135] ([i915#3840])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-16/igt@kms_dsc@dsc-fractional-bpp.html
- shard-tglu: NOTRUN -> [SKIP][136] ([i915#3840]) +1 other test skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-8/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc:
- shard-tglu: NOTRUN -> [SKIP][137] ([i915#3840] / [i915#9053])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-3/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
* igt@kms_fbcon_fbt@psr:
- shard-tglu: NOTRUN -> [SKIP][138] ([i915#3469])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-7/igt@kms_fbcon_fbt@psr.html
* igt@kms_feature_discovery@display-2x:
- shard-rkl: NOTRUN -> [SKIP][139] ([i915#1839])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_feature_discovery@display-2x.html
* igt@kms_feature_discovery@display-3x:
- shard-dg2: NOTRUN -> [SKIP][140] ([i915#1839])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-6/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@dp-mst:
- shard-dg2: NOTRUN -> [SKIP][141] ([i915#9337])
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-6/igt@kms_feature_discovery@dp-mst.html
* igt@kms_fence_pin_leak:
- shard-dg2: NOTRUN -> [SKIP][142] ([i915#4881])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-2/igt@kms_fence_pin_leak.html
* igt@kms_flip@2x-dpms-vs-vblank-race-interruptible:
- shard-dg1: NOTRUN -> [SKIP][143] ([fdo#111825] / [i915#9934]) +1 other test skip
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-19/igt@kms_flip@2x-dpms-vs-vblank-race-interruptible.html
* igt@kms_flip@2x-modeset-vs-vblank-race:
- shard-dg2: NOTRUN -> [SKIP][144] ([fdo#109274]) +6 other tests skip
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-7/igt@kms_flip@2x-modeset-vs-vblank-race.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-tglu: NOTRUN -> [SKIP][145] ([fdo#109274] / [i915#3637]) +1 other test skip
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-4/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@flip-vs-fences:
- shard-dg2: NOTRUN -> [SKIP][146] ([i915#8381])
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-2/igt@kms_flip@flip-vs-fences.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-valid-mode:
- shard-tglu: NOTRUN -> [SKIP][147] ([i915#2587] / [i915#2672]) +2 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-4/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][148] ([i915#2672]) +7 other tests skip
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-7/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode:
- shard-rkl: NOTRUN -> [SKIP][149] ([i915#2672])
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode:
- shard-dg1: NOTRUN -> [SKIP][150] ([i915#2587] / [i915#2672])
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-17/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode.html
* igt@kms_force_connector_basic@force-load-detect:
- shard-tglu: NOTRUN -> [SKIP][151] ([fdo#109285])
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-4/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
- shard-dg1: NOTRUN -> [SKIP][152] ([fdo#111767] / [fdo#111825])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-18/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-snb: [PASS][153] -> [SKIP][154] ([fdo#109271]) +11 other tests skip
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt:
- shard-rkl: NOTRUN -> [SKIP][155] ([fdo#111825]) +3 other tests skip
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-4/igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-msflip-blt:
- shard-dg1: NOTRUN -> [SKIP][156] ([i915#3458]) +1 other test skip
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-19/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-tglu: NOTRUN -> [SKIP][157] ([fdo#109280] / [fdo#111767]) +1 other test skip
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-msflip-blt:
- shard-tglu: NOTRUN -> [SKIP][158] ([fdo#109280]) +14 other tests skip
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-cpu:
- shard-dg1: NOTRUN -> [SKIP][159] ([fdo#111825]) +4 other tests skip
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-19/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-render:
- shard-dg2: NOTRUN -> [SKIP][160] ([fdo#111767] / [i915#5354]) +2 other tests skip
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt:
- shard-glk: NOTRUN -> [SKIP][161] ([fdo#109271]) +110 other tests skip
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-glk8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt:
- shard-rkl: NOTRUN -> [SKIP][162] ([i915#3023]) +11 other tests skip
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-dg2: NOTRUN -> [SKIP][163] ([i915#10055])
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-wc:
- shard-dg1: NOTRUN -> [SKIP][164] ([i915#8708])
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-17/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite:
- shard-tglu: NOTRUN -> [SKIP][165] ([fdo#110189]) +10 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][166] ([i915#8708]) +18 other tests skip
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-pwrite:
- shard-rkl: NOTRUN -> [SKIP][167] ([fdo#111767] / [fdo#111825] / [i915#1825]) +1 other test skip
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt:
- shard-rkl: NOTRUN -> [SKIP][168] ([fdo#111825] / [i915#1825]) +17 other tests skip
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
- shard-dg2: NOTRUN -> [SKIP][169] ([i915#3458]) +20 other tests skip
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
* igt@kms_getfb@getfb-reject-ccs:
- shard-dg2: NOTRUN -> [SKIP][170] ([i915#6118])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-7/igt@kms_getfb@getfb-reject-ccs.html
* igt@kms_hdr@bpc-switch:
- shard-dg2: NOTRUN -> [SKIP][171] ([i915#3555] / [i915#8228])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@kms_hdr@bpc-switch.html
* igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c:
- shard-rkl: NOTRUN -> [SKIP][172] ([fdo#109289]) +4 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c.html
* igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes:
- shard-dg2: NOTRUN -> [SKIP][173] ([fdo#109289]) +6 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes.html
* igt@kms_plane_alpha_blend@alpha-basic@pipe-c-hdmi-a-1:
- shard-glk: NOTRUN -> [FAIL][174] ([i915#7862]) +1 other test fail
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-glk2/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-hdmi-a-1.html
* igt@kms_plane_lowres@tiling-y:
- shard-dg2: NOTRUN -> [SKIP][175] ([i915#8821])
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-dg2: NOTRUN -> [SKIP][176] ([fdo#109274] / [i915#5354] / [i915#9423])
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-7/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [FAIL][177] ([i915#8292])
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4:
- shard-dg1: NOTRUN -> [FAIL][178] ([i915#8292])
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-15/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-c-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][179] ([i915#9423]) +3 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-c-hdmi-a-1.html
* igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][180] ([i915#9423]) +5 other tests skip
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-a-hdmi-a-2.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-c-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][181] ([i915#5176] / [i915#9423]) +3 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-15/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-c-hdmi-a-4.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-d-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][182] ([i915#9423]) +11 other tests skip
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-13/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-d-hdmi-a-3.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-hdmi-a-2:
- shard-dg2: NOTRUN -> [SKIP][183] ([i915#5235] / [i915#9423] / [i915#9728]) +7 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-hdmi-a-2.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][184] ([i915#5235]) +7 other tests skip
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-13/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-3.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][185] ([i915#5235]) +3 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][186] ([i915#5235] / [i915#9423]) +7 other tests skip
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c-hdmi-a-1.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-tglu: NOTRUN -> [SKIP][187] ([i915#9812])
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-3/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_dc@dc5-psr:
- shard-rkl: NOTRUN -> [SKIP][188] ([i915#9685])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-2/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@dc6-dpms:
- shard-tglu: [PASS][189] -> [FAIL][190] ([i915#9295])
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-tglu-3/igt@kms_pm_dc@dc6-dpms.html
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-10/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_dc@dc9-dpms:
- shard-tglu: [PASS][191] -> [SKIP][192] ([i915#4281])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-tglu-6/igt@kms_pm_dc@dc9-dpms.html
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-9/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_lpsp@screens-disabled:
- shard-dg1: NOTRUN -> [SKIP][193] ([i915#8430])
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-19/igt@kms_pm_lpsp@screens-disabled.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-rkl: [PASS][194] -> [SKIP][195] ([i915#9519])
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-4/igt@kms_pm_rpm@modeset-lpsp.html
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-rkl: NOTRUN -> [SKIP][196] ([i915#9519])
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-tglu: NOTRUN -> [SKIP][197] ([i915#9519])
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-3/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_prime@basic-modeset-hybrid:
- shard-rkl: NOTRUN -> [SKIP][198] ([i915#6524]) +1 other test skip
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-7/igt@kms_prime@basic-modeset-hybrid.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
- shard-rkl: NOTRUN -> [SKIP][199] ([fdo#110189])
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-dg2: NOTRUN -> [SKIP][200] ([fdo#110189]) +2 other tests skip
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area:
- shard-snb: NOTRUN -> [SKIP][201] ([fdo#109271] / [fdo#110189])
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb1/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-p010:
- shard-dg2: NOTRUN -> [SKIP][202] ([i915#9683]) +1 other test skip
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-2/igt@kms_psr2_su@page_flip-p010.html
- shard-rkl: NOTRUN -> [SKIP][203] ([fdo#111068] / [i915#9683])
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-snb: NOTRUN -> [SKIP][204] ([fdo#109271]) +143 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb1/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
- shard-rkl: NOTRUN -> [SKIP][205] ([i915#5289]) +1 other test skip
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
- shard-rkl: [PASS][206] -> [ABORT][207] ([i915#8875])
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-dg2: NOTRUN -> [SKIP][208] ([i915#4235] / [i915#5190])
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
- shard-rkl: NOTRUN -> [SKIP][209] ([fdo#111615] / [i915#5289])
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-dg1: NOTRUN -> [SKIP][210] ([fdo#111615] / [i915#5289])
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-13/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg1: NOTRUN -> [SKIP][211] ([i915#8623])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-16/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_vrr@flip-basic-fastset:
- shard-dg2: NOTRUN -> [SKIP][212] ([i915#9906])
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@kms_vrr@flip-basic-fastset.html
* igt@kms_vrr@flip-dpms:
- shard-dg2: NOTRUN -> [SKIP][213] ([i915#3555]) +6 other tests skip
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-6/igt@kms_vrr@flip-dpms.html
* igt@kms_writeback@writeback-fb-id-xrgb2101010:
- shard-tglu: NOTRUN -> [SKIP][214] ([i915#2437] / [i915#9412])
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-10/igt@kms_writeback@writeback-fb-id-xrgb2101010.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-rkl: NOTRUN -> [SKIP][215] ([i915#2437] / [i915#9412])
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@kms_writeback@writeback-pixel-formats.html
* igt@perf@mi-rpc:
- shard-rkl: NOTRUN -> [SKIP][216] ([i915#2434])
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-4/igt@perf@mi-rpc.html
* igt@perf@per-context-mode-unprivileged:
- shard-tglu: NOTRUN -> [SKIP][217] ([fdo#109289]) +2 other tests skip
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-4/igt@perf@per-context-mode-unprivileged.html
* igt@perf_pmu@busy-check-all@rcs0:
- shard-dg2: NOTRUN -> [FAIL][218] ([i915#4349])
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@perf_pmu@busy-check-all@rcs0.html
* igt@perf_pmu@frequency@gt0:
- shard-dg2: NOTRUN -> [FAIL][219] ([i915#6806])
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@perf_pmu@frequency@gt0.html
* igt@prime_vgem@basic-fence-mmap:
- shard-dg2: NOTRUN -> [SKIP][220] ([i915#3708] / [i915#4077])
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-fence-read:
- shard-dg2: NOTRUN -> [SKIP][221] ([i915#3291] / [i915#3708])
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@fence-flip-hang:
- shard-dg2: NOTRUN -> [SKIP][222] ([i915#3708]) +1 other test skip
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@prime_vgem@fence-flip-hang.html
* igt@sriov_basic@enable-vfs-autoprobe-on:
- shard-dg2: NOTRUN -> [SKIP][223] ([i915#9917])
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-6/igt@sriov_basic@enable-vfs-autoprobe-on.html
* igt@sriov_basic@enable-vfs-bind-unbind-each:
- shard-rkl: NOTRUN -> [SKIP][224] ([i915#9917])
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-7/igt@sriov_basic@enable-vfs-bind-unbind-each.html
* igt@syncobj_timeline@invalid-wait-zero-handles:
- shard-dg2: NOTRUN -> [FAIL][225] ([i915#9781])
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-10/igt@syncobj_timeline@invalid-wait-zero-handles.html
* igt@v3d/v3d_perfmon@destroy-invalid-perfmon:
- shard-tglu: NOTRUN -> [SKIP][226] ([fdo#109315] / [i915#2575]) +3 other tests skip
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-2/igt@v3d/v3d_perfmon@destroy-invalid-perfmon.html
* igt@v3d/v3d_submit_csd@bad-multisync-out-sync:
- shard-rkl: NOTRUN -> [SKIP][227] ([fdo#109315]) +6 other tests skip
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-7/igt@v3d/v3d_submit_csd@bad-multisync-out-sync.html
* igt@v3d/v3d_submit_csd@bad-pad:
- shard-dg1: NOTRUN -> [SKIP][228] ([i915#2575]) +2 other tests skip
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-17/igt@v3d/v3d_submit_csd@bad-pad.html
* igt@v3d/v3d_submit_csd@single-out-sync:
- shard-dg2: NOTRUN -> [SKIP][229] ([i915#2575]) +18 other tests skip
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-6/igt@v3d/v3d_submit_csd@single-out-sync.html
* igt@vc4/vc4_dmabuf_poll@poll-write-waits-until-write-done:
- shard-tglu: NOTRUN -> [SKIP][230] ([i915#2575]) +4 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-2/igt@vc4/vc4_dmabuf_poll@poll-write-waits-until-write-done.html
* igt@vc4/vc4_perfmon@get-values-valid-perfmon:
- shard-rkl: NOTRUN -> [SKIP][231] ([i915#7711]) +2 other tests skip
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@vc4/vc4_perfmon@get-values-valid-perfmon.html
* igt@vc4/vc4_tiling@get-bad-flags:
- shard-dg1: NOTRUN -> [SKIP][232] ([i915#7711])
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-18/igt@vc4/vc4_tiling@get-bad-flags.html
* igt@vc4/vc4_wait_bo@bad-bo:
- shard-dg2: NOTRUN -> [SKIP][233] ([i915#7711]) +7 other tests skip
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-6/igt@vc4/vc4_wait_bo@bad-bo.html
#### Possible fixes ####
* igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- shard-rkl: [FAIL][234] ([i915#7742]) -> [PASS][235]
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-5/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-rkl: [FAIL][236] ([i915#2842]) -> [PASS][237] +2 other tests pass
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-7/igt@gem_exec_fair@basic-pace@vecs0.html
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gen9_exec_parse@allowed-all:
- shard-glk: [INCOMPLETE][238] ([i915#10137] / [i915#5566]) -> [PASS][239]
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-glk7/igt@gen9_exec_parse@allowed-all.html
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-glk5/igt@gen9_exec_parse@allowed-all.html
* igt@i915_module_load@reload-no-display:
- shard-snb: [INCOMPLETE][240] ([i915#9849]) -> [PASS][241]
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-snb5/igt@i915_module_load@reload-no-display.html
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb5/igt@i915_module_load@reload-no-display.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-snb: [INCOMPLETE][242] ([i915#10137] / [i915#9200] / [i915#9849]) -> [PASS][243]
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-snb2/igt@i915_module_load@reload-with-fault-injection.html
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb1/igt@i915_module_load@reload-with-fault-injection.html
- shard-glk: [INCOMPLETE][244] ([i915#10137] / [i915#9200] / [i915#9849]) -> [PASS][245]
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-glk7/igt@i915_module_load@reload-with-fault-injection.html
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-glk8/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0:
- shard-dg1: [FAIL][246] ([i915#3591]) -> [PASS][247]
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-dg1-16/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html
* igt@i915_pm_rps@reset:
- shard-snb: [INCOMPLETE][248] ([i915#10137] / [i915#7790]) -> [PASS][249]
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-snb5/igt@i915_pm_rps@reset.html
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb6/igt@i915_pm_rps@reset.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-tglu: [FAIL][250] ([i915#3743]) -> [PASS][251] +2 other tests pass
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-tglu-8/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-9/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-glk: [FAIL][252] ([i915#2346]) -> [PASS][253]
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@torture-bo@pipe-b:
- shard-glk: [DMESG-WARN][254] ([i915#1982]) -> [PASS][255]
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-glk5/igt@kms_cursor_legacy@torture-bo@pipe-b.html
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-glk3/igt@kms_cursor_legacy@torture-bo@pipe-b.html
* igt@kms_flip@wf_vblank-ts-check@c-edp1:
- shard-mtlp: [DMESG-WARN][256] ([i915#9157]) -> [PASS][257]
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-mtlp-8/igt@kms_flip@wf_vblank-ts-check@c-edp1.html
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-mtlp-7/igt@kms_flip@wf_vblank-ts-check@c-edp1.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
- shard-snb: [SKIP][258] ([fdo#109271] / [fdo#111767]) -> [PASS][259]
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
- shard-snb: [SKIP][260] ([fdo#109271]) -> [PASS][261] +11 other tests pass
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-rkl: [SKIP][262] ([i915#9519]) -> [PASS][263]
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-7/igt@kms_pm_rpm@dpms-non-lpsp.html
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1:
- shard-rkl: [FAIL][264] ([i915#9196]) -> [PASS][265]
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-4/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-4/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1:
- shard-tglu: [FAIL][266] ([i915#9196]) -> [PASS][267] +3 other tests pass
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-tglu-4/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1.html
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-5/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1.html
* igt@syncobj_timeline@host-signal-points:
- shard-snb: [ABORT][268] -> [PASS][269]
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-snb6/igt@syncobj_timeline@host-signal-points.html
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb2/igt@syncobj_timeline@host-signal-points.html
#### Warnings ####
* igt@device_reset@unbind-reset-rebind:
- shard-dg1: [ABORT][270] ([i915#9618]) -> [INCOMPLETE][271] ([i915#10137] / [i915#9618])
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-dg1-13/igt@device_reset@unbind-reset-rebind.html
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-19/igt@device_reset@unbind-reset-rebind.html
* igt@kms_content_protection@mei-interface:
- shard-dg1: [SKIP][272] ([i915#9424]) -> [SKIP][273] ([i915#9433])
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-dg1-17/igt@kms_content_protection@mei-interface.html
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-18/igt@kms_content_protection@mei-interface.html
* igt@kms_content_protection@type1:
- shard-snb: [SKIP][274] ([fdo#109271]) -> [INCOMPLETE][275] ([i915#8816]) +1 other test incomplete
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-snb1/igt@kms_content_protection@type1.html
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb7/igt@kms_content_protection@type1.html
* igt@kms_fbcon_fbt@psr:
- shard-rkl: [SKIP][276] ([fdo#110189] / [i915#3955]) -> [SKIP][277] ([i915#3955])
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-5/igt@kms_fbcon_fbt@psr.html
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-4/igt@kms_fbcon_fbt@psr.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-rkl: [SKIP][278] ([i915#3955]) -> [SKIP][279] ([fdo#110189] / [i915#3955])
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-4/igt@kms_fbcon_fbt@psr-suspend.html
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-5/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-snb: [SKIP][280] ([fdo#109271] / [fdo#111767]) -> [SKIP][281] ([fdo#109271])
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-snb2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff:
- shard-snb: [SKIP][282] ([fdo#109271]) -> [SKIP][283] ([fdo#109271] / [fdo#111767])
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-snb7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff.html
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff.html
* igt@kms_pm_dc@dc9-dpms:
- shard-rkl: [SKIP][284] ([i915#4281]) -> [SKIP][285] ([i915#3361])
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-5/igt@kms_pm_dc@dc9-dpms.html
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf:
- shard-rkl: [SKIP][286] ([i915#9683]) -> [SKIP][287] ([fdo#110189]) +5 other tests skip
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-1/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-1/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
- shard-tglu: [SKIP][288] ([i915#9683]) -> [SKIP][289] ([fdo#110189]) +6 other tests skip
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-tglu-3/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-2/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-sf:
- shard-dg1: [SKIP][290] ([i915#9683]) -> [SKIP][291] ([fdo#110189]) +6 other tests skip
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-dg1-19/igt@kms_psr2_sf@cursor-plane-move-continuous-sf.html
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-13/igt@kms_psr2_sf@cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-rkl: [SKIP][292] ([fdo#111068] / [i915#9683]) -> [SKIP][293] ([fdo#110189]) +4 other tests skip
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-rkl-5/igt@kms_psr2_sf@cursor-plane-update-sf.html
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-rkl-7/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf:
- shard-dg2: [SKIP][294] ([i915#9683]) -> [SKIP][295] ([fdo#110189])
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-dg2-5/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg2-1/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-tglu: [SKIP][296] ([fdo#111068] / [i915#9683]) -> [SKIP][297] ([fdo#110189]) +5 other tests skip
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-tglu-8/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-tglu-10/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
- shard-glk: [SKIP][298] ([fdo#109271]) -> [SKIP][299] ([fdo#109271] / [fdo#110189]) +11 other tests skip
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-glk2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-glk5/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
- shard-dg1: [SKIP][300] ([fdo#111068] / [i915#9683]) -> [SKIP][301] ([fdo#110189]) +5 other tests skip
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-dg1-19/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-dg1-18/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb:
- shard-snb: [SKIP][302] ([fdo#109271]) -> [SKIP][303] ([fdo#109271] / [fdo#110189]) +11 other tests skip
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14306/shard-snb1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/shard-snb4/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#10031]: https://gitlab.freedesktop.org/drm/intel/issues/10031
[i915#10055]: https://gitlab.freedesktop.org/drm/intel/issues/10055
[i915#10131]: https://gitlab.freedesktop.org/drm/intel/issues/10131
[i915#10137]: https://gitlab.freedesktop.org/drm/intel/issues/10137
[i915#10166]: https://gitlab.freedesktop.org/drm/intel/issues/10166
[i915#10183]: https://gitlab.freedesktop.org/drm/intel/issues/10183
[i915#10278]: https://gitlab.freedesktop.org/drm/intel/issues/10278
[i915#10282]: https://gitlab.freedesktop.org/drm/intel/issues/10282
[i915#10288]: https://gitlab.freedesktop.org/drm/intel/issues/10288
[i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#4958]: https://gitlab.freedesktop.org/drm/intel/issues/4958
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6118]: https://gitlab.freedesktop.org/drm/intel/issues/6118
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6229]: https://gitlab.freedesktop.org/drm/intel/issues/6229
[i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6806]: https://gitlab.freedesktop.org/drm/intel/issues/6806
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7356]: https://gitlab.freedesktop.org/drm/intel/issues/7356
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7790]: https://gitlab.freedesktop.org/drm/intel/issues/7790
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7862]: https://gitlab.freedesktop.org/drm/intel/issues/7862
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
[i915#8381]: https://gitlab.freedesktop.org/drm/intel/issues/8381
[i915#8399]: https://gitlab.freedesktop.org/drm/intel/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
[i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
[i915#8430]: https://gitlab.freedesktop.org/drm/intel/issues/8430
[i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
[i915#8562]: https://gitlab.freedesktop.org/drm/intel/issues/8562
[i915#8588]: https://gitlab.freedesktop.org/drm/intel/issues/8588
[i915#8623]: https://gitlab.freedesktop.org/drm/intel/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
[i915#8709]: https://gitlab.freedesktop.org/drm/intel/issues/8709
[i915#8816]: https://gitlab.freedesktop.org/drm/intel/issues/8816
[i915#8821]: https://gitlab.freedesktop.org/drm/intel/issues/8821
[i915#8875]: https://gitlab.freedesktop.org/drm/intel/issues/8875
[i915#8925]: https://gitlab.freedesktop.org/drm/intel/issues/8925
[i915#9053]: https://gitlab.freedesktop.org/drm/intel/issues/9053
[i915#9157]: https://gitlab.freedesktop.org/drm/intel/issues/9157
[i915#9196]: https://gitlab.freedesktop.org/drm/intel/issues/9196
[i915#9200]: https://gitlab.freedesktop.org/drm/intel/issues/9200
[i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
[i915#9295]: https://gitlab.freedesktop.org/drm/intel/issues/9295
[i915#9311]: https://gitlab.freedesktop.org/drm/intel/issues/9311
[i915#9337]: https://gitlab.freedesktop.org/drm/intel/issues/9337
[i915#9412]: https://gitlab.freedesktop.org/drm/intel/issues/9412
[i915#9423]: https://gitlab.freedesktop.org/drm/intel/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/intel/issues/9424
[i915#9433]: https://gitlab.freedesktop.org/drm/intel/issues/9433
[i915#9519]: https://gitlab.freedesktop.org/drm/intel/issues/9519
[i915#9606]: https://gitlab.freedesktop.org/drm/intel/issues/9606
[i915#9618]: https://gitlab.freedesktop.org/drm/intel/issues/9618
[i915#9683]: https://gitlab.freedesktop.org/drm/intel/issues/9683
[i915#9685]: https://gitlab.freedesktop.org/drm/intel/issues/9685
[i915#9688]: https://gitlab.freedesktop.org/drm/intel/issues/9688
[i915#9697]: https://gitlab.freedesktop.org/drm/intel/issues/9697
[i915#9723]: https://gitlab.freedesktop.org/drm/intel/issues/9723
[i915#9728]: https://gitlab.freedesktop.org/drm/intel/issues/9728
[i915#9732]: https://gitlab.freedesktop.org/drm/intel/issues/9732
[i915#9781]: https://gitlab.freedesktop.org/drm/intel/issues/9781
[i915#9812]: https://gitlab.freedesktop.org/drm/intel/issues/9812
[i915#9820]: https://gitlab.freedesktop.org/drm/intel/issues/9820
[i915#9849]: https://gitlab.freedesktop.org/drm/intel/issues/9849
[i915#9906]: https://gitlab.freedesktop.org/drm/intel/issues/9906
[i915#9917]: https://gitlab.freedesktop.org/drm/intel/issues/9917
[i915#9934]: https://gitlab.freedesktop.org/drm/intel/issues/9934
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7718 -> IGTPW_10708
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_14306: b895612a4da69e73804cd5fc2dedfa44fda1da99 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_10708: 10708
IGT_7718: 40e8b9122853f455c84afcfa56469a6bc9a0d564 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10708/index.html
[-- Attachment #2: Type: text/html, Size: 108953 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update
2024-02-19 16:33 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi
@ 2024-02-20 8:48 ` Hogander, Jouni
0 siblings, 0 replies; 17+ messages in thread
From: Hogander, Jouni @ 2024-02-20 8:48 UTC (permalink / raw)
To: Joshi, Kunal1, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh
On Mon, 2024-02-19 at 22:03 +0530, Kunal Joshi wrote:
> adapt to kmd changes to support PR selective update
> https://patchwork.freedesktop.org/patch/575163/?series=128193&rev=3
>
> v2: "PSR2 selective fetch: enable" valid for both cases (Jouni)
> v3: use check_psr2_support (Jouni)
> v4: split patches (Jouni)
> v5: drop changes on psr2_sel_fetch_to_psr1 and *_restore (Jouni)
>
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Animesh Manna <animesh.manna@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> lib/igt_psr.c | 20 ++++++++++++++------
> lib/igt_psr.h | 2 +-
> 2 files changed, 15 insertions(+), 7 deletions(-)
>
> diff --git a/lib/igt_psr.c b/lib/igt_psr.c
> index cad8cce05..6008b73a6 100644
> --- a/lib/igt_psr.c
> +++ b/lib/igt_psr.c
> @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd)
> return strstr(buf, "PSR mode: disabled\n");
> }
>
> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t
> *output)
> +bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
> {
> char buf[PSR_STATUS_MAX_LEN];
> char debugfs_file[128] = {0};
> @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd,
> enum psr_mode mode, igt_output
> (strstr(line, "PSR = yes") &&
> (strstr(line, "[0x03]") || strstr(line,
> "[0x04]")));
> case PR_MODE:
> - return strstr(line, "Panel Replay = yes");
> + return strstr(line, "Panel Replay = yes, Panel Replay
> Selective Update = no");
> + case PR_MODE_SEL_FETCH:
> + return strstr(line, "Panel Replay = yes, Panel Replay
> Selective Update = yes");
> default:
> igt_assert_f(false, "Invalid psr mode\n");
> return false;
> @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd,
> igt_output_t *output)
> return false;
>
> debugfs_fd = igt_debugfs_dir(drm_fd);
> - ret = psr2_selective_fetch_check(debugfs_fd, output);
> + ret = selective_fetch_check(debugfs_fd, output);
> close(debugfs_fd);
>
> return ret;
> @@ -343,7 +345,11 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd,
> igt_output_t *output)
> return ret;
>
> debugfs_fd = igt_debugfs_dir(drm_fd);
> - if (psr2_selective_fetch_check(debugfs_fd, output)) {
> + if (selective_fetch_check(debugfs_fd, output)) {
> + /*
> + * With below we switch to PSR1 incase of PSR and
> + * Panel Replay Full Frame update in case of Panel
> Replay.
> + */
> psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
> ret = true;
> }
> @@ -389,11 +395,13 @@ enum psr_mode psr_get_mode(int debugfs_fd,
> igt_output_t *output)
>
> if (strstr(buf, "Panel Replay Enabled"))
> return PR_MODE;
> + else if (strstr(buf, "Panel Replay Selective Update
> Enabled"))
> + return PR_MODE_SEL_FETCH;
> else if (strstr(buf, "PSR2 selective fetch: enabled"))
> return PSR_MODE_2_SEL_FETCH;
> - else if (strstr(buf, "PSR2 enabled"))
> + else if (strstr(buf, "PSR2"))
> return PSR_MODE_2;
> - else if (strstr(buf, "PSR1 enabled"))
> + else if (strstr(buf, "PSR1"))
> return PSR_MODE_1;
>
> return PSR_DISABLED;
> diff --git a/lib/igt_psr.h b/lib/igt_psr.h
> index 372bef2b2..e8595fd8c 100644
> --- a/lib/igt_psr.h
> +++ b/lib/igt_psr.h
> @@ -46,7 +46,7 @@ enum fbc_mode {
> };
>
> bool psr_disabled_check(int debugfs_fd);
> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t
> *output);
> +bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
> bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t
> *output);
> bool psr_wait_update(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output);
> bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output);
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update
2024-02-19 16:33 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi
@ 2024-02-19 16:33 ` Kunal Joshi
2024-02-20 8:48 ` Hogander, Jouni
0 siblings, 1 reply; 17+ messages in thread
From: Kunal Joshi @ 2024-02-19 16:33 UTC (permalink / raw)
To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy
adapt to kmd changes to support PR selective update
https://patchwork.freedesktop.org/patch/575163/?series=128193&rev=3
v2: "PSR2 selective fetch: enable" valid for both cases (Jouni)
v3: use check_psr2_support (Jouni)
v4: split patches (Jouni)
v5: drop changes on psr2_sel_fetch_to_psr1 and *_restore (Jouni)
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com>
---
lib/igt_psr.c | 20 ++++++++++++++------
lib/igt_psr.h | 2 +-
2 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/lib/igt_psr.c b/lib/igt_psr.c
index cad8cce05..6008b73a6 100644
--- a/lib/igt_psr.c
+++ b/lib/igt_psr.c
@@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd)
return strstr(buf, "PSR mode: disabled\n");
}
-bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output)
+bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
{
char buf[PSR_STATUS_MAX_LEN];
char debugfs_file[128] = {0};
@@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output
(strstr(line, "PSR = yes") &&
(strstr(line, "[0x03]") || strstr(line, "[0x04]")));
case PR_MODE:
- return strstr(line, "Panel Replay = yes");
+ return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no");
+ case PR_MODE_SEL_FETCH:
+ return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes");
default:
igt_assert_f(false, "Invalid psr mode\n");
return false;
@@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output)
return false;
debugfs_fd = igt_debugfs_dir(drm_fd);
- ret = psr2_selective_fetch_check(debugfs_fd, output);
+ ret = selective_fetch_check(debugfs_fd, output);
close(debugfs_fd);
return ret;
@@ -343,7 +345,11 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output)
return ret;
debugfs_fd = igt_debugfs_dir(drm_fd);
- if (psr2_selective_fetch_check(debugfs_fd, output)) {
+ if (selective_fetch_check(debugfs_fd, output)) {
+ /*
+ * With below we switch to PSR1 incase of PSR and
+ * Panel Replay Full Frame update in case of Panel Replay.
+ */
psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
ret = true;
}
@@ -389,11 +395,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output)
if (strstr(buf, "Panel Replay Enabled"))
return PR_MODE;
+ else if (strstr(buf, "Panel Replay Selective Update Enabled"))
+ return PR_MODE_SEL_FETCH;
else if (strstr(buf, "PSR2 selective fetch: enabled"))
return PSR_MODE_2_SEL_FETCH;
- else if (strstr(buf, "PSR2 enabled"))
+ else if (strstr(buf, "PSR2"))
return PSR_MODE_2;
- else if (strstr(buf, "PSR1 enabled"))
+ else if (strstr(buf, "PSR1"))
return PSR_MODE_1;
return PSR_DISABLED;
diff --git a/lib/igt_psr.h b/lib/igt_psr.h
index 372bef2b2..e8595fd8c 100644
--- a/lib/igt_psr.h
+++ b/lib/igt_psr.h
@@ -46,7 +46,7 @@ enum fbc_mode {
};
bool psr_disabled_check(int debugfs_fd);
-bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output);
+bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update
2024-02-19 10:01 ` Joshi, Kunal1
@ 2024-02-19 10:29 ` Hogander, Jouni
0 siblings, 0 replies; 17+ messages in thread
From: Hogander, Jouni @ 2024-02-19 10:29 UTC (permalink / raw)
To: Joshi, Kunal1, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh
[-- Attachment #1: Type: text/plain, Size: 7903 bytes --]
On Mon, 2024-02-19 at 15:31 +0530, Joshi, Kunal1 wrote:
Hello Jouni,
On 2/18/2024 2:47 PM, Kunal Joshi wrote:
Extend the tests to cover panel replay selective fetch feature.
From kms_psr2_sf test point of view we have check_pr_psr2_sel_fetch_support
function to check if PR/PSR2 selective fetch is supported for an output
if output supports selective fetch then we check we enter DEEP_SLEEP mode
in run function
v2: fixed dynamic test name
v3: use check_psr2_support (Jouni)
v4: split patches (Jouni)
Cc: Jouni Högander <jouni.hogander@intel.com><mailto:jouni.hogander@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com><mailto:animesh.manna@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com><mailto:arun.r.murthy@intel.com>
Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com><mailto:kunal1.joshi@intel.com>
---
lib/igt_psr.c | 36 ++++++++++++++++++++++++++----------
lib/igt_psr.h | 6 +++---
tests/kms_cursor_legacy.c | 4 ++--
3 files changed, 31 insertions(+), 15 deletions(-)
diff --git a/lib/igt_psr.c b/lib/igt_psr.c
index cad8cce05..9accd2047 100644
--- a/lib/igt_psr.c
+++ b/lib/igt_psr.c
@@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd)
return strstr(buf, "PSR mode: disabled\n");
}
-bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output)
+bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
{
char buf[PSR_STATUS_MAX_LEN];
char debugfs_file[128] = {0};
@@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output
(strstr(line, "PSR = yes") &&
(strstr(line, "[0x03]") || strstr(line, "[0x04]")));
case PR_MODE:
- return strstr(line, "Panel Replay = yes");
+ return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no");
+ case PR_MODE_SEL_FETCH:
+ return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes");
default:
igt_assert_f(false, "Invalid psr mode\n");
return false;
@@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output)
return false;
debugfs_fd = igt_debugfs_dir(drm_fd);
- ret = psr2_selective_fetch_check(debugfs_fd, output);
+ ret = selective_fetch_check(debugfs_fd, output);
close(debugfs_fd);
return ret;
@@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output)
* Returns:
* True if PSR mode changed to PSR1, false otherwise.
*/
-bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output)
+bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t *output)
{
int debugfs_fd;
bool ret = false;
+ enum psr_mode mode;
if (!is_intel_device(drm_fd))
return ret;
debugfs_fd = igt_debugfs_dir(drm_fd);
- if (psr2_selective_fetch_check(debugfs_fd, output)) {
- psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
+ if (selective_fetch_check(debugfs_fd, output)) {
+ mode = psr_get_mode(debugfs_fd, output);
+ if (mode == PR_MODE_SEL_FETCH)
+ psr_set(drm_fd, debugfs_fd, PR_MODE, output);
+ else if (mode == PSR_MODE_2_SEL_FETCH)
+ psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
+ else
+ igt_assert("switch not possible from current psr mode\n");
ret = true;
}
@@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output)
* Restore PSR2 selective fetch after tests were executed, this function should
* only be called if i915_psr2_sel_fetch_to_psr1() returned true.
*/
-void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output)
+void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output)
{
int debugfs_fd;
+ enum psr_mode mode;
debugfs_fd = igt_debugfs_dir(drm_fd);
- psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output);
+ mode = psr_get_mode(debugfs_fd, output);
+ if (mode == PR_MODE)
+ psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH, output);
+ else
+ psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output);
close(debugfs_fd);
}
What do you think of this change, do we need to care about PR/PSR2 Selective fetch or just
write PSR_MODE_2_SEL_FETCH?
Good point. I think this function can be left untouched as well.
BR,
Jouni Högander
Thanks and Regards Kunal Joshi
@@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output)
if (strstr(buf, "Panel Replay Enabled"))
return PR_MODE;
+ else if (strstr(buf, "Panel Replay Selective Update Enabled"))
+ return PR_MODE_SEL_FETCH;
else if (strstr(buf, "PSR2 selective fetch: enabled"))
return PSR_MODE_2_SEL_FETCH;
- else if (strstr(buf, "PSR2 enabled"))
+ else if (strstr(buf, "PSR2"))
return PSR_MODE_2;
- else if (strstr(buf, "PSR1 enabled"))
+ else if (strstr(buf, "PSR1"))
return PSR_MODE_1;
return PSR_DISABLED;
diff --git a/lib/igt_psr.h b/lib/igt_psr.h
index 372bef2b2..36ba7f068 100644
--- a/lib/igt_psr.h
+++ b/lib/igt_psr.h
@@ -46,7 +46,7 @@ enum fbc_mode {
};
bool psr_disabled_check(int debugfs_fd);
-bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output);
+bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
@@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output);
bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output);
-bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output);
-void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output);
+bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t *output);
+void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output);
bool is_psr_enable_possible(int drm_fd, enum psr_mode mode);
#endif
diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c
index a430f735a..91e5e9b07 100644
--- a/tests/kms_cursor_legacy.c
+++ b/tests/kms_cursor_legacy.c
@@ -1849,7 +1849,7 @@ igt_main
* page flip with cursor legacy APIS when Intel's PSR2 selective
* fetch is enabled, so switching PSR1 for this whole test.
*/
- intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL);
+ intel_psr2_restore = i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL);
}
igt_describe("Test checks how many cursor updates we can fit between vblanks "
@@ -2074,7 +2074,7 @@ igt_main
igt_fixture {
if (intel_psr2_restore)
- i915_psr2_sel_fetch_restore(display.drm_fd, NULL);
+ i915_pr_psr2_sel_fetch_restore(display.drm_fd, NULL);
igt_display_fini(&display);
drm_close_driver(display.drm_fd);
}
[-- Attachment #2: Type: text/html, Size: 10140 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update
2024-02-18 9:17 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi
2024-02-19 8:00 ` Hogander, Jouni
@ 2024-02-19 10:01 ` Joshi, Kunal1
2024-02-19 10:29 ` Hogander, Jouni
1 sibling, 1 reply; 17+ messages in thread
From: Joshi, Kunal1 @ 2024-02-19 10:01 UTC (permalink / raw)
To: igt-dev; +Cc: Jouni Högander, Animesh Manna, Arun R Murthy
[-- Attachment #1: Type: text/plain, Size: 6816 bytes --]
Hello Jouni,
On 2/18/2024 2:47 PM, Kunal Joshi wrote:
> Extend the tests to cover panel replay selective fetch feature.
>
> From kms_psr2_sf test point of view we have check_pr_psr2_sel_fetch_support
> function to check if PR/PSR2 selective fetch is supported for an output
> if output supports selective fetch then we check we enter DEEP_SLEEP mode
> in run function
>
> v2: fixed dynamic test name
> v3: use check_psr2_support (Jouni)
> v4: split patches (Jouni)
>
> Cc: Jouni Högander<jouni.hogander@intel.com>
> Cc: Animesh Manna<animesh.manna@intel.com>
> Cc: Arun R Murthy<arun.r.murthy@intel.com>
> Signed-off-by: Kunal Joshi<kunal1.joshi@intel.com>
> ---
> lib/igt_psr.c | 36 ++++++++++++++++++++++++++----------
> lib/igt_psr.h | 6 +++---
> tests/kms_cursor_legacy.c | 4 ++--
> 3 files changed, 31 insertions(+), 15 deletions(-)
>
> diff --git a/lib/igt_psr.c b/lib/igt_psr.c
> index cad8cce05..9accd2047 100644
> --- a/lib/igt_psr.c
> +++ b/lib/igt_psr.c
> @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd)
> return strstr(buf, "PSR mode: disabled\n");
> }
>
> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output)
> +bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
> {
> char buf[PSR_STATUS_MAX_LEN];
> char debugfs_file[128] = {0};
> @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output
> (strstr(line, "PSR = yes") &&
> (strstr(line, "[0x03]") || strstr(line, "[0x04]")));
> case PR_MODE:
> - return strstr(line, "Panel Replay = yes");
> + return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no");
> + case PR_MODE_SEL_FETCH:
> + return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes");
> default:
> igt_assert_f(false, "Invalid psr mode\n");
> return false;
> @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output)
> return false;
>
> debugfs_fd = igt_debugfs_dir(drm_fd);
> - ret = psr2_selective_fetch_check(debugfs_fd, output);
> + ret = selective_fetch_check(debugfs_fd, output);
> close(debugfs_fd);
>
> return ret;
> @@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output)
> * Returns:
> * True if PSR mode changed to PSR1, false otherwise.
> */
> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output)
> +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t *output)
> {
> int debugfs_fd;
> bool ret = false;
> + enum psr_mode mode;
>
> if (!is_intel_device(drm_fd))
> return ret;
>
> debugfs_fd = igt_debugfs_dir(drm_fd);
> - if (psr2_selective_fetch_check(debugfs_fd, output)) {
> - psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
> + if (selective_fetch_check(debugfs_fd, output)) {
> + mode = psr_get_mode(debugfs_fd, output);
> + if (mode == PR_MODE_SEL_FETCH)
> + psr_set(drm_fd, debugfs_fd, PR_MODE, output);
> + else if (mode == PSR_MODE_2_SEL_FETCH)
> + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
> + else
> + igt_assert("switch not possible from current psr mode\n");
> ret = true;
> }
>
> @@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output)
> * Restore PSR2 selective fetch after tests were executed, this function should
> * only be called if i915_psr2_sel_fetch_to_psr1() returned true.
> */
> -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output)
> +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output)
> {
> int debugfs_fd;
> + enum psr_mode mode;
>
> debugfs_fd = igt_debugfs_dir(drm_fd);
> - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output);
> + mode = psr_get_mode(debugfs_fd, output);
> + if (mode == PR_MODE)
> + psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH, output);
> + else
> + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output);
> close(debugfs_fd);
> }
What do you think of this change, do we need to care about PR/PSR2
Selective fetch or just
write PSR_MODE_2_SEL_FETCH? Thanks and Regards Kunal Joshi
>
> @@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output)
>
> if (strstr(buf, "Panel Replay Enabled"))
> return PR_MODE;
> + else if (strstr(buf, "Panel Replay Selective Update Enabled"))
> + return PR_MODE_SEL_FETCH;
> else if (strstr(buf, "PSR2 selective fetch: enabled"))
> return PSR_MODE_2_SEL_FETCH;
> - else if (strstr(buf, "PSR2 enabled"))
> + else if (strstr(buf, "PSR2"))
> return PSR_MODE_2;
> - else if (strstr(buf, "PSR1 enabled"))
> + else if (strstr(buf, "PSR1"))
> return PSR_MODE_1;
>
> return PSR_DISABLED;
> diff --git a/lib/igt_psr.h b/lib/igt_psr.h
> index 372bef2b2..36ba7f068 100644
> --- a/lib/igt_psr.h
> +++ b/lib/igt_psr.h
> @@ -46,7 +46,7 @@ enum fbc_mode {
> };
>
> bool psr_disabled_check(int debugfs_fd);
> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output);
> +bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
> bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
> bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
> bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
> @@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output);
>
> bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output);
>
> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output);
> -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output);
> +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t *output);
> +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output);
> bool is_psr_enable_possible(int drm_fd, enum psr_mode mode);
>
> #endif
> diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c
> index a430f735a..91e5e9b07 100644
> --- a/tests/kms_cursor_legacy.c
> +++ b/tests/kms_cursor_legacy.c
> @@ -1849,7 +1849,7 @@ igt_main
> * page flip with cursor legacy APIS when Intel's PSR2 selective
> * fetch is enabled, so switching PSR1 for this whole test.
> */
> - intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL);
> + intel_psr2_restore = i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL);
> }
>
> igt_describe("Test checks how many cursor updates we can fit between vblanks "
> @@ -2074,7 +2074,7 @@ igt_main
>
> igt_fixture {
> if (intel_psr2_restore)
> - i915_psr2_sel_fetch_restore(display.drm_fd, NULL);
> + i915_pr_psr2_sel_fetch_restore(display.drm_fd, NULL);
> igt_display_fini(&display);
> drm_close_driver(display.drm_fd);
> }
[-- Attachment #2: Type: text/html, Size: 7506 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update
2024-02-19 8:56 ` Hogander, Jouni
@ 2024-02-19 9:01 ` Joshi, Kunal1
0 siblings, 0 replies; 17+ messages in thread
From: Joshi, Kunal1 @ 2024-02-19 9:01 UTC (permalink / raw)
To: Hogander, Jouni, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh
Hello Jouni,
On 2/19/2024 2:26 PM, Hogander, Jouni wrote:
> On Mon, 2024-02-19 at 13:42 +0530, Joshi, Kunal1 wrote:
>> Hello Jouni,
>>
>> On 2/19/2024 1:30 PM, Hogander, Jouni wrote:
>>> On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote:
>>>> Extend the tests to cover panel replay selective fetch feature.
>>>>
>>>> From kms_psr2_sf test point of view we have
>>>> check_pr_psr2_sel_fetch_support
>>>> function to check if PR/PSR2 selective fetch is supported for an
>>>> output
>>>> if output supports selective fetch then we check we enter
>>>> DEEP_SLEEP
>>>> mode
>>>> in run function
>>>>
>>>> v2: fixed dynamic test name
>>>> v3: use check_psr2_support (Jouni)
>>>> v4: split patches (Jouni)
>>>>
>>>> Cc: Jouni Högander <jouni.hogander@intel.com>
>>>> Cc: Animesh Manna <animesh.manna@intel.com>
>>>> Cc: Arun R Murthy <arun.r.murthy@intel.com>
>>>> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com>
>>>> ---
>>>> lib/igt_psr.c | 36 ++++++++++++++++++++++++++------
>>>> ----
>>>> lib/igt_psr.h | 6 +++---
>>>> tests/kms_cursor_legacy.c | 4 ++--
>>>> 3 files changed, 31 insertions(+), 15 deletions(-)
>>>>
>>>> diff --git a/lib/igt_psr.c b/lib/igt_psr.c
>>>> index cad8cce05..9accd2047 100644
>>>> --- a/lib/igt_psr.c
>>>> +++ b/lib/igt_psr.c
>>>> @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd)
>>>> return strstr(buf, "PSR mode: disabled\n");
>>>> }
>>>>
>>>> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t
>>>> *output)
>>>> +bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
>>>> {
>>>> char buf[PSR_STATUS_MAX_LEN];
>>>> char debugfs_file[128] = {0};
>>>> @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int
>>>> debugfs_fd,
>>>> enum psr_mode mode, igt_output
>>>> (strstr(line, "PSR = yes") &&
>>>> (strstr(line, "[0x03]") || strstr(line,
>>>> "[0x04]")));
>>>> case PR_MODE:
>>>> - return strstr(line, "Panel Replay = yes");
>>>> + return strstr(line, "Panel Replay = yes, Panel
>>>> Replay
>>>> Selective Update = no");
>>>> + case PR_MODE_SEL_FETCH:
>>>> + return strstr(line, "Panel Replay = yes, Panel
>>>> Replay
>>>> Selective Update = yes");
>>>> default:
>>>> igt_assert_f(false, "Invalid psr mode\n");
>>>> return false;
>>>> @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int
>>>> drm_fd,
>>>> igt_output_t *output)
>>>> return false;
>>>>
>>>> debugfs_fd = igt_debugfs_dir(drm_fd);
>>>> - ret = psr2_selective_fetch_check(debugfs_fd, output);
>>>> + ret = selective_fetch_check(debugfs_fd, output);
>>>> close(debugfs_fd);
>>>>
>>>> return ret;
>>>> @@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int
>>>> drm_fd, igt_output_t *output)
>>>> * Returns:
>>>> * True if PSR mode changed to PSR1, false otherwise.
>>>> */
>>>> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t
>>>> *output)
>>>> +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t
>>>> *output)
>>>> {
>>>> int debugfs_fd;
>>>> bool ret = false;
>>>> + enum psr_mode mode;
>>>>
>>>> if (!is_intel_device(drm_fd))
>>>> return ret;
>>>>
>>>> debugfs_fd = igt_debugfs_dir(drm_fd);
>>>> - if (psr2_selective_fetch_check(debugfs_fd, output)) {
>>>> - psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
>>>> + if (selective_fetch_check(debugfs_fd, output)) {
>>>> + mode = psr_get_mode(debugfs_fd, output);
>>>> + if (mode == PR_MODE_SEL_FETCH)
>>>> + psr_set(drm_fd, debugfs_fd, PR_MODE,
>>>> output);
>>>> + else if (mode == PSR_MODE_2_SEL_FETCH)
>>>> + psr_set(drm_fd, debugfs_fd, PSR_MODE_1,
>>>> output);
>>>> + else
>>>> + igt_assert("switch not possible from
>>>> current
>>>> psr mode\n");
>>> There is no need to change this function.
>>> psr2_selective_fetch_check
>>> (now selective_fetch_check) works for PR and PSR.
>>>
>>> BR,
>>>
>>> Jouni Högander
>> Have modified selective_fetch_check to check for a particular output,
>>
>> bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
>> {
>> char buf[PSR_STATUS_MAX_LEN];
>> char debugfs_file[128] = {0};
>>
>> SET_DEBUGFS_PATH(output, debugfs_file);
>> igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf,
>> sizeof(buf));
>>
>> return strstr(buf, "PSR2 selective fetch: enabled");
>> }
>>
>> Will this be not required?
> No it has to support providing ouput as parameter. My point is that
>
> selective_fetch_check works for PR as well. and:
>
> psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
>
> Will switch to Panel Replay Full Frame update for Panel Replay and PSR1
> for PSR. If we ever need to take into account panel supporting both I
> think we should do that by adding disable flag for Panel Replay
> instead of setting the mode. See:
>
> https://patchwork.freedesktop.org/series/128193/
>
> and specifically:
>
> https://patchwork.freedesktop.org/patch/575161/?series=128193&rev=3
>
> In practice no need to touch contents of
> i915_pr_psr2_sel_fetch_to_pr_psr1 at all. It will switch to PSR1 in
> case of PSR and Panel Replay Full Frame update in case of Panel
> Replay.
>
> Also psr_set should use same values for Panel Replay as are used for
> PSR. I'm sorry if I have instructed otherwise earlier. This has somehow
> evolved during writing the code.
>
> BR,
>
> Jouni Högander
Ok got your point.
Will add your comment as a comment so nobody gets confused.
It will switch to PSR1 incase of PSR and Panel Replay Full Frame update in case of Panel Replay.
Thanks and Regards
Kunal Joshi
>> Thanks and Regards
>> Kunal Joshi
>>>> ret = true;
>>>> }
>>>>
>>>> @@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int
>>>> drm_fd,
>>>> igt_output_t *output)
>>>> * Restore PSR2 selective fetch after tests were executed, this
>>>> function should
>>>> * only be called if i915_psr2_sel_fetch_to_psr1() returned
>>>> true.
>>>> */
>>>> -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t
>>>> *output)
>>>> +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t
>>>> *output)
>>>> {
>>>> int debugfs_fd;
>>>> + enum psr_mode mode;
>>>>
>>>> debugfs_fd = igt_debugfs_dir(drm_fd);
>>>> - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH,
>>>> output);
>>>> + mode = psr_get_mode(debugfs_fd, output);
>>>> + if (mode == PR_MODE)
>>>> + psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH,
>>>> output);
>>>> + else
>>>> + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH,
>>>> output);
>>>> close(debugfs_fd);
>>>> }
>>>>
>>>> @@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd,
>>>> igt_output_t *output)
>>>>
>>>> if (strstr(buf, "Panel Replay Enabled"))
>>>> return PR_MODE;
>>>> + else if (strstr(buf, "Panel Replay Selective Update
>>>> Enabled"))
>>>> + return PR_MODE_SEL_FETCH;
>>>> else if (strstr(buf, "PSR2 selective fetch: enabled"))
>>>> return PSR_MODE_2_SEL_FETCH;
>>>> - else if (strstr(buf, "PSR2 enabled"))
>>>> + else if (strstr(buf, "PSR2"))
>>>> return PSR_MODE_2;
>>>> - else if (strstr(buf, "PSR1 enabled"))
>>>> + else if (strstr(buf, "PSR1"))
>>>> return PSR_MODE_1;
>>>>
>>>> return PSR_DISABLED;
>>>> diff --git a/lib/igt_psr.h b/lib/igt_psr.h
>>>> index 372bef2b2..36ba7f068 100644
>>>> --- a/lib/igt_psr.h
>>>> +++ b/lib/igt_psr.h
>>>> @@ -46,7 +46,7 @@ enum fbc_mode {
>>>> };
>>>>
>>>> bool psr_disabled_check(int debugfs_fd);
>>>> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t
>>>> *output);
>>>> +bool selective_fetch_check(int debugfs_fd, igt_output_t
>>>> *output);
>>>> bool psr_wait_entry(int debugfs_fd, enum psr_mode mode,
>>>> igt_output_t
>>>> *output);
>>>> bool psr_wait_update(int debugfs_fd, enum psr_mode mode,
>>>> igt_output_t *output);
>>>> bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode,
>>>> igt_output_t *output);
>>>> @@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd,
>>>> igt_output_t *output);
>>>>
>>>> bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t
>>>> *output);
>>>>
>>>> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t
>>>> *output);
>>>> -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t
>>>> *output);
>>>> +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t
>>>> *output);
>>>> +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t
>>>> *output);
>>>> bool is_psr_enable_possible(int drm_fd, enum psr_mode mode);
>>>>
>>>> #endif
>>>> diff --git a/tests/kms_cursor_legacy.c
>>>> b/tests/kms_cursor_legacy.c
>>>> index a430f735a..91e5e9b07 100644
>>>> --- a/tests/kms_cursor_legacy.c
>>>> +++ b/tests/kms_cursor_legacy.c
>>>> @@ -1849,7 +1849,7 @@ igt_main
>>>> * page flip with cursor legacy APIS when
>>>> Intel's
>>>> PSR2 selective
>>>> * fetch is enabled, so switching PSR1 for this
>>>> whole
>>>> test.
>>>> */
>>>> - intel_psr2_restore =
>>>> i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL);
>>>> + intel_psr2_restore =
>>>> i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL);
>>>> }
>>>>
>>>> igt_describe("Test checks how many cursor updates we can
>>>> fit
>>>> between vblanks "
>>>> @@ -2074,7 +2074,7 @@ igt_main
>>>>
>>>> igt_fixture {
>>>> if (intel_psr2_restore)
>>>> -
>>>> i915_psr2_sel_fetch_restore(display.drm_fd,
>>>> NULL);
>>>> + i915_pr_psr2_sel_fetch_restore(display.dr
>>>> m_fd
>>>> , NULL);
>>>> igt_display_fini(&display);
>>>> drm_close_driver(display.drm_fd);
>>>> }
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update
2024-02-19 8:12 ` Joshi, Kunal1
@ 2024-02-19 8:56 ` Hogander, Jouni
2024-02-19 9:01 ` Joshi, Kunal1
0 siblings, 1 reply; 17+ messages in thread
From: Hogander, Jouni @ 2024-02-19 8:56 UTC (permalink / raw)
To: Joshi, Kunal1, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh
On Mon, 2024-02-19 at 13:42 +0530, Joshi, Kunal1 wrote:
> Hello Jouni,
>
> On 2/19/2024 1:30 PM, Hogander, Jouni wrote:
> > On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote:
> > > Extend the tests to cover panel replay selective fetch feature.
> > >
> > > From kms_psr2_sf test point of view we have
> > > check_pr_psr2_sel_fetch_support
> > > function to check if PR/PSR2 selective fetch is supported for an
> > > output
> > > if output supports selective fetch then we check we enter
> > > DEEP_SLEEP
> > > mode
> > > in run function
> > >
> > > v2: fixed dynamic test name
> > > v3: use check_psr2_support (Jouni)
> > > v4: split patches (Jouni)
> > >
> > > Cc: Jouni Högander <jouni.hogander@intel.com>
> > > Cc: Animesh Manna <animesh.manna@intel.com>
> > > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > > Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com>
> > > ---
> > > lib/igt_psr.c | 36 ++++++++++++++++++++++++++------
> > > ----
> > > lib/igt_psr.h | 6 +++---
> > > tests/kms_cursor_legacy.c | 4 ++--
> > > 3 files changed, 31 insertions(+), 15 deletions(-)
> > >
> > > diff --git a/lib/igt_psr.c b/lib/igt_psr.c
> > > index cad8cce05..9accd2047 100644
> > > --- a/lib/igt_psr.c
> > > +++ b/lib/igt_psr.c
> > > @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd)
> > > return strstr(buf, "PSR mode: disabled\n");
> > > }
> > >
> > > -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t
> > > *output)
> > > +bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
> > > {
> > > char buf[PSR_STATUS_MAX_LEN];
> > > char debugfs_file[128] = {0};
> > > @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int
> > > debugfs_fd,
> > > enum psr_mode mode, igt_output
> > > (strstr(line, "PSR = yes") &&
> > > (strstr(line, "[0x03]") || strstr(line,
> > > "[0x04]")));
> > > case PR_MODE:
> > > - return strstr(line, "Panel Replay = yes");
> > > + return strstr(line, "Panel Replay = yes, Panel
> > > Replay
> > > Selective Update = no");
> > > + case PR_MODE_SEL_FETCH:
> > > + return strstr(line, "Panel Replay = yes, Panel
> > > Replay
> > > Selective Update = yes");
> > > default:
> > > igt_assert_f(false, "Invalid psr mode\n");
> > > return false;
> > > @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int
> > > drm_fd,
> > > igt_output_t *output)
> > > return false;
> > >
> > > debugfs_fd = igt_debugfs_dir(drm_fd);
> > > - ret = psr2_selective_fetch_check(debugfs_fd, output);
> > > + ret = selective_fetch_check(debugfs_fd, output);
> > > close(debugfs_fd);
> > >
> > > return ret;
> > > @@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int
> > > drm_fd, igt_output_t *output)
> > > * Returns:
> > > * True if PSR mode changed to PSR1, false otherwise.
> > > */
> > > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t
> > > *output)
> > > +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t
> > > *output)
> > > {
> > > int debugfs_fd;
> > > bool ret = false;
> > > + enum psr_mode mode;
> > >
> > > if (!is_intel_device(drm_fd))
> > > return ret;
> > >
> > > debugfs_fd = igt_debugfs_dir(drm_fd);
> > > - if (psr2_selective_fetch_check(debugfs_fd, output)) {
> > > - psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
> > > + if (selective_fetch_check(debugfs_fd, output)) {
> > > + mode = psr_get_mode(debugfs_fd, output);
> > > + if (mode == PR_MODE_SEL_FETCH)
> > > + psr_set(drm_fd, debugfs_fd, PR_MODE,
> > > output);
> > > + else if (mode == PSR_MODE_2_SEL_FETCH)
> > > + psr_set(drm_fd, debugfs_fd, PSR_MODE_1,
> > > output);
> > > + else
> > > + igt_assert("switch not possible from
> > > current
> > > psr mode\n");
> > There is no need to change this function.
> > psr2_selective_fetch_check
> > (now selective_fetch_check) works for PR and PSR.
> >
> > BR,
> >
> > Jouni Högander
> Have modified selective_fetch_check to check for a particular output,
>
> bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
> {
> char buf[PSR_STATUS_MAX_LEN];
> char debugfs_file[128] = {0};
>
> SET_DEBUGFS_PATH(output, debugfs_file);
> igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf,
> sizeof(buf));
>
> return strstr(buf, "PSR2 selective fetch: enabled");
> }
>
> Will this be not required?
No it has to support providing ouput as parameter. My point is that
selective_fetch_check works for PR as well. and:
psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
Will switch to Panel Replay Full Frame update for Panel Replay and PSR1
for PSR. If we ever need to take into account panel supporting both I
think we should do that by adding disable flag for Panel Replay
instead of setting the mode. See:
https://patchwork.freedesktop.org/series/128193/
and specifically:
https://patchwork.freedesktop.org/patch/575161/?series=128193&rev=3
In practice no need to touch contents of
i915_pr_psr2_sel_fetch_to_pr_psr1 at all. It will switch to PSR1 in
case of PSR and Panel Replay Full Frame update in case of Panel
Replay.
Also psr_set should use same values for Panel Replay as are used for
PSR. I'm sorry if I have instructed otherwise earlier. This has somehow
evolved during writing the code.
BR,
Jouni Högander
>
> Thanks and Regards
> Kunal Joshi
> >
> > > ret = true;
> > > }
> > >
> > > @@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int
> > > drm_fd,
> > > igt_output_t *output)
> > > * Restore PSR2 selective fetch after tests were executed, this
> > > function should
> > > * only be called if i915_psr2_sel_fetch_to_psr1() returned
> > > true.
> > > */
> > > -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t
> > > *output)
> > > +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t
> > > *output)
> > > {
> > > int debugfs_fd;
> > > + enum psr_mode mode;
> > >
> > > debugfs_fd = igt_debugfs_dir(drm_fd);
> > > - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH,
> > > output);
> > > + mode = psr_get_mode(debugfs_fd, output);
> > > + if (mode == PR_MODE)
> > > + psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH,
> > > output);
> > > + else
> > > + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH,
> > > output);
> > > close(debugfs_fd);
> > > }
> > >
> > > @@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd,
> > > igt_output_t *output)
> > >
> > > if (strstr(buf, "Panel Replay Enabled"))
> > > return PR_MODE;
> > > + else if (strstr(buf, "Panel Replay Selective Update
> > > Enabled"))
> > > + return PR_MODE_SEL_FETCH;
> > > else if (strstr(buf, "PSR2 selective fetch: enabled"))
> > > return PSR_MODE_2_SEL_FETCH;
> > > - else if (strstr(buf, "PSR2 enabled"))
> > > + else if (strstr(buf, "PSR2"))
> > > return PSR_MODE_2;
> > > - else if (strstr(buf, "PSR1 enabled"))
> > > + else if (strstr(buf, "PSR1"))
> > > return PSR_MODE_1;
> > >
> > > return PSR_DISABLED;
> > > diff --git a/lib/igt_psr.h b/lib/igt_psr.h
> > > index 372bef2b2..36ba7f068 100644
> > > --- a/lib/igt_psr.h
> > > +++ b/lib/igt_psr.h
> > > @@ -46,7 +46,7 @@ enum fbc_mode {
> > > };
> > >
> > > bool psr_disabled_check(int debugfs_fd);
> > > -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t
> > > *output);
> > > +bool selective_fetch_check(int debugfs_fd, igt_output_t
> > > *output);
> > > bool psr_wait_entry(int debugfs_fd, enum psr_mode mode,
> > > igt_output_t
> > > *output);
> > > bool psr_wait_update(int debugfs_fd, enum psr_mode mode,
> > > igt_output_t *output);
> > > bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode,
> > > igt_output_t *output);
> > > @@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd,
> > > igt_output_t *output);
> > >
> > > bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t
> > > *output);
> > >
> > > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t
> > > *output);
> > > -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t
> > > *output);
> > > +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t
> > > *output);
> > > +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t
> > > *output);
> > > bool is_psr_enable_possible(int drm_fd, enum psr_mode mode);
> > >
> > > #endif
> > > diff --git a/tests/kms_cursor_legacy.c
> > > b/tests/kms_cursor_legacy.c
> > > index a430f735a..91e5e9b07 100644
> > > --- a/tests/kms_cursor_legacy.c
> > > +++ b/tests/kms_cursor_legacy.c
> > > @@ -1849,7 +1849,7 @@ igt_main
> > > * page flip with cursor legacy APIS when
> > > Intel's
> > > PSR2 selective
> > > * fetch is enabled, so switching PSR1 for this
> > > whole
> > > test.
> > > */
> > > - intel_psr2_restore =
> > > i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL);
> > > + intel_psr2_restore =
> > > i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL);
> > > }
> > >
> > > igt_describe("Test checks how many cursor updates we can
> > > fit
> > > between vblanks "
> > > @@ -2074,7 +2074,7 @@ igt_main
> > >
> > > igt_fixture {
> > > if (intel_psr2_restore)
> > > -
> > > i915_psr2_sel_fetch_restore(display.drm_fd,
> > > NULL);
> > > + i915_pr_psr2_sel_fetch_restore(display.dr
> > > m_fd
> > > , NULL);
> > > igt_display_fini(&display);
> > > drm_close_driver(display.drm_fd);
> > > }
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update
2024-02-19 8:00 ` Hogander, Jouni
@ 2024-02-19 8:12 ` Joshi, Kunal1
2024-02-19 8:56 ` Hogander, Jouni
0 siblings, 1 reply; 17+ messages in thread
From: Joshi, Kunal1 @ 2024-02-19 8:12 UTC (permalink / raw)
To: Hogander, Jouni, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh
Hello Jouni,
On 2/19/2024 1:30 PM, Hogander, Jouni wrote:
> On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote:
>> Extend the tests to cover panel replay selective fetch feature.
>>
>> From kms_psr2_sf test point of view we have
>> check_pr_psr2_sel_fetch_support
>> function to check if PR/PSR2 selective fetch is supported for an
>> output
>> if output supports selective fetch then we check we enter DEEP_SLEEP
>> mode
>> in run function
>>
>> v2: fixed dynamic test name
>> v3: use check_psr2_support (Jouni)
>> v4: split patches (Jouni)
>>
>> Cc: Jouni Högander <jouni.hogander@intel.com>
>> Cc: Animesh Manna <animesh.manna@intel.com>
>> Cc: Arun R Murthy <arun.r.murthy@intel.com>
>> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com>
>> ---
>> lib/igt_psr.c | 36 ++++++++++++++++++++++++++----------
>> lib/igt_psr.h | 6 +++---
>> tests/kms_cursor_legacy.c | 4 ++--
>> 3 files changed, 31 insertions(+), 15 deletions(-)
>>
>> diff --git a/lib/igt_psr.c b/lib/igt_psr.c
>> index cad8cce05..9accd2047 100644
>> --- a/lib/igt_psr.c
>> +++ b/lib/igt_psr.c
>> @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd)
>> return strstr(buf, "PSR mode: disabled\n");
>> }
>>
>> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t
>> *output)
>> +bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
>> {
>> char buf[PSR_STATUS_MAX_LEN];
>> char debugfs_file[128] = {0};
>> @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd,
>> enum psr_mode mode, igt_output
>> (strstr(line, "PSR = yes") &&
>> (strstr(line, "[0x03]") || strstr(line,
>> "[0x04]")));
>> case PR_MODE:
>> - return strstr(line, "Panel Replay = yes");
>> + return strstr(line, "Panel Replay = yes, Panel Replay
>> Selective Update = no");
>> + case PR_MODE_SEL_FETCH:
>> + return strstr(line, "Panel Replay = yes, Panel Replay
>> Selective Update = yes");
>> default:
>> igt_assert_f(false, "Invalid psr mode\n");
>> return false;
>> @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd,
>> igt_output_t *output)
>> return false;
>>
>> debugfs_fd = igt_debugfs_dir(drm_fd);
>> - ret = psr2_selective_fetch_check(debugfs_fd, output);
>> + ret = selective_fetch_check(debugfs_fd, output);
>> close(debugfs_fd);
>>
>> return ret;
>> @@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int
>> drm_fd, igt_output_t *output)
>> * Returns:
>> * True if PSR mode changed to PSR1, false otherwise.
>> */
>> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output)
>> +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t
>> *output)
>> {
>> int debugfs_fd;
>> bool ret = false;
>> + enum psr_mode mode;
>>
>> if (!is_intel_device(drm_fd))
>> return ret;
>>
>> debugfs_fd = igt_debugfs_dir(drm_fd);
>> - if (psr2_selective_fetch_check(debugfs_fd, output)) {
>> - psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
>> + if (selective_fetch_check(debugfs_fd, output)) {
>> + mode = psr_get_mode(debugfs_fd, output);
>> + if (mode == PR_MODE_SEL_FETCH)
>> + psr_set(drm_fd, debugfs_fd, PR_MODE, output);
>> + else if (mode == PSR_MODE_2_SEL_FETCH)
>> + psr_set(drm_fd, debugfs_fd, PSR_MODE_1,
>> output);
>> + else
>> + igt_assert("switch not possible from current
>> psr mode\n");
> There is no need to change this function. psr2_selective_fetch_check
> (now selective_fetch_check) works for PR and PSR.
>
> BR,
>
> Jouni Högander
Have modified selective_fetch_check to check for a particular output,
bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
{
char buf[PSR_STATUS_MAX_LEN];
char debugfs_file[128] = {0};
SET_DEBUGFS_PATH(output, debugfs_file);
igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf,
sizeof(buf));
return strstr(buf, "PSR2 selective fetch: enabled");
}
Will this be not required?
Thanks and Regards
Kunal Joshi
>
>> ret = true;
>> }
>>
>> @@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd,
>> igt_output_t *output)
>> * Restore PSR2 selective fetch after tests were executed, this
>> function should
>> * only be called if i915_psr2_sel_fetch_to_psr1() returned true.
>> */
>> -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output)
>> +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t
>> *output)
>> {
>> int debugfs_fd;
>> + enum psr_mode mode;
>>
>> debugfs_fd = igt_debugfs_dir(drm_fd);
>> - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output);
>> + mode = psr_get_mode(debugfs_fd, output);
>> + if (mode == PR_MODE)
>> + psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH,
>> output);
>> + else
>> + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH,
>> output);
>> close(debugfs_fd);
>> }
>>
>> @@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd,
>> igt_output_t *output)
>>
>> if (strstr(buf, "Panel Replay Enabled"))
>> return PR_MODE;
>> + else if (strstr(buf, "Panel Replay Selective Update
>> Enabled"))
>> + return PR_MODE_SEL_FETCH;
>> else if (strstr(buf, "PSR2 selective fetch: enabled"))
>> return PSR_MODE_2_SEL_FETCH;
>> - else if (strstr(buf, "PSR2 enabled"))
>> + else if (strstr(buf, "PSR2"))
>> return PSR_MODE_2;
>> - else if (strstr(buf, "PSR1 enabled"))
>> + else if (strstr(buf, "PSR1"))
>> return PSR_MODE_1;
>>
>> return PSR_DISABLED;
>> diff --git a/lib/igt_psr.h b/lib/igt_psr.h
>> index 372bef2b2..36ba7f068 100644
>> --- a/lib/igt_psr.h
>> +++ b/lib/igt_psr.h
>> @@ -46,7 +46,7 @@ enum fbc_mode {
>> };
>>
>> bool psr_disabled_check(int debugfs_fd);
>> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t
>> *output);
>> +bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
>> bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t
>> *output);
>> bool psr_wait_update(int debugfs_fd, enum psr_mode mode,
>> igt_output_t *output);
>> bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode,
>> igt_output_t *output);
>> @@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd,
>> igt_output_t *output);
>>
>> bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t
>> *output);
>>
>> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output);
>> -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output);
>> +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t
>> *output);
>> +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t
>> *output);
>> bool is_psr_enable_possible(int drm_fd, enum psr_mode mode);
>>
>> #endif
>> diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c
>> index a430f735a..91e5e9b07 100644
>> --- a/tests/kms_cursor_legacy.c
>> +++ b/tests/kms_cursor_legacy.c
>> @@ -1849,7 +1849,7 @@ igt_main
>> * page flip with cursor legacy APIS when Intel's
>> PSR2 selective
>> * fetch is enabled, so switching PSR1 for this whole
>> test.
>> */
>> - intel_psr2_restore =
>> i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL);
>> + intel_psr2_restore =
>> i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL);
>> }
>>
>> igt_describe("Test checks how many cursor updates we can fit
>> between vblanks "
>> @@ -2074,7 +2074,7 @@ igt_main
>>
>> igt_fixture {
>> if (intel_psr2_restore)
>> - i915_psr2_sel_fetch_restore(display.drm_fd,
>> NULL);
>> + i915_pr_psr2_sel_fetch_restore(display.drm_fd
>> , NULL);
>> igt_display_fini(&display);
>> drm_close_driver(display.drm_fd);
>> }
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update
2024-02-18 9:17 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi
@ 2024-02-19 8:00 ` Hogander, Jouni
2024-02-19 8:12 ` Joshi, Kunal1
2024-02-19 10:01 ` Joshi, Kunal1
1 sibling, 1 reply; 17+ messages in thread
From: Hogander, Jouni @ 2024-02-19 8:00 UTC (permalink / raw)
To: Joshi, Kunal1, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh
On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote:
> Extend the tests to cover panel replay selective fetch feature.
>
> From kms_psr2_sf test point of view we have
> check_pr_psr2_sel_fetch_support
> function to check if PR/PSR2 selective fetch is supported for an
> output
> if output supports selective fetch then we check we enter DEEP_SLEEP
> mode
> in run function
>
> v2: fixed dynamic test name
> v3: use check_psr2_support (Jouni)
> v4: split patches (Jouni)
>
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Animesh Manna <animesh.manna@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com>
> ---
> lib/igt_psr.c | 36 ++++++++++++++++++++++++++----------
> lib/igt_psr.h | 6 +++---
> tests/kms_cursor_legacy.c | 4 ++--
> 3 files changed, 31 insertions(+), 15 deletions(-)
>
> diff --git a/lib/igt_psr.c b/lib/igt_psr.c
> index cad8cce05..9accd2047 100644
> --- a/lib/igt_psr.c
> +++ b/lib/igt_psr.c
> @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd)
> return strstr(buf, "PSR mode: disabled\n");
> }
>
> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t
> *output)
> +bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
> {
> char buf[PSR_STATUS_MAX_LEN];
> char debugfs_file[128] = {0};
> @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd,
> enum psr_mode mode, igt_output
> (strstr(line, "PSR = yes") &&
> (strstr(line, "[0x03]") || strstr(line,
> "[0x04]")));
> case PR_MODE:
> - return strstr(line, "Panel Replay = yes");
> + return strstr(line, "Panel Replay = yes, Panel Replay
> Selective Update = no");
> + case PR_MODE_SEL_FETCH:
> + return strstr(line, "Panel Replay = yes, Panel Replay
> Selective Update = yes");
> default:
> igt_assert_f(false, "Invalid psr mode\n");
> return false;
> @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd,
> igt_output_t *output)
> return false;
>
> debugfs_fd = igt_debugfs_dir(drm_fd);
> - ret = psr2_selective_fetch_check(debugfs_fd, output);
> + ret = selective_fetch_check(debugfs_fd, output);
> close(debugfs_fd);
>
> return ret;
> @@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int
> drm_fd, igt_output_t *output)
> * Returns:
> * True if PSR mode changed to PSR1, false otherwise.
> */
> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output)
> +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t
> *output)
> {
> int debugfs_fd;
> bool ret = false;
> + enum psr_mode mode;
>
> if (!is_intel_device(drm_fd))
> return ret;
>
> debugfs_fd = igt_debugfs_dir(drm_fd);
> - if (psr2_selective_fetch_check(debugfs_fd, output)) {
> - psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
> + if (selective_fetch_check(debugfs_fd, output)) {
> + mode = psr_get_mode(debugfs_fd, output);
> + if (mode == PR_MODE_SEL_FETCH)
> + psr_set(drm_fd, debugfs_fd, PR_MODE, output);
> + else if (mode == PSR_MODE_2_SEL_FETCH)
> + psr_set(drm_fd, debugfs_fd, PSR_MODE_1,
> output);
> + else
> + igt_assert("switch not possible from current
> psr mode\n");
There is no need to change this function. psr2_selective_fetch_check
(now selective_fetch_check) works for PR and PSR.
BR,
Jouni Högander
> ret = true;
> }
>
> @@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd,
> igt_output_t *output)
> * Restore PSR2 selective fetch after tests were executed, this
> function should
> * only be called if i915_psr2_sel_fetch_to_psr1() returned true.
> */
> -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output)
> +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t
> *output)
> {
> int debugfs_fd;
> + enum psr_mode mode;
>
> debugfs_fd = igt_debugfs_dir(drm_fd);
> - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output);
> + mode = psr_get_mode(debugfs_fd, output);
> + if (mode == PR_MODE)
> + psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH,
> output);
> + else
> + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH,
> output);
> close(debugfs_fd);
> }
>
> @@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd,
> igt_output_t *output)
>
> if (strstr(buf, "Panel Replay Enabled"))
> return PR_MODE;
> + else if (strstr(buf, "Panel Replay Selective Update
> Enabled"))
> + return PR_MODE_SEL_FETCH;
> else if (strstr(buf, "PSR2 selective fetch: enabled"))
> return PSR_MODE_2_SEL_FETCH;
> - else if (strstr(buf, "PSR2 enabled"))
> + else if (strstr(buf, "PSR2"))
> return PSR_MODE_2;
> - else if (strstr(buf, "PSR1 enabled"))
> + else if (strstr(buf, "PSR1"))
> return PSR_MODE_1;
>
> return PSR_DISABLED;
> diff --git a/lib/igt_psr.h b/lib/igt_psr.h
> index 372bef2b2..36ba7f068 100644
> --- a/lib/igt_psr.h
> +++ b/lib/igt_psr.h
> @@ -46,7 +46,7 @@ enum fbc_mode {
> };
>
> bool psr_disabled_check(int debugfs_fd);
> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t
> *output);
> +bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
> bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t
> *output);
> bool psr_wait_update(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output);
> bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output);
> @@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd,
> igt_output_t *output);
>
> bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t
> *output);
>
> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output);
> -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output);
> +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t
> *output);
> +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t
> *output);
> bool is_psr_enable_possible(int drm_fd, enum psr_mode mode);
>
> #endif
> diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c
> index a430f735a..91e5e9b07 100644
> --- a/tests/kms_cursor_legacy.c
> +++ b/tests/kms_cursor_legacy.c
> @@ -1849,7 +1849,7 @@ igt_main
> * page flip with cursor legacy APIS when Intel's
> PSR2 selective
> * fetch is enabled, so switching PSR1 for this whole
> test.
> */
> - intel_psr2_restore =
> i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL);
> + intel_psr2_restore =
> i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL);
> }
>
> igt_describe("Test checks how many cursor updates we can fit
> between vblanks "
> @@ -2074,7 +2074,7 @@ igt_main
>
> igt_fixture {
> if (intel_psr2_restore)
> - i915_psr2_sel_fetch_restore(display.drm_fd,
> NULL);
> + i915_pr_psr2_sel_fetch_restore(display.drm_fd
> , NULL);
> igt_display_fini(&display);
> drm_close_driver(display.drm_fd);
> }
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update
2024-02-18 9:17 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi
@ 2024-02-18 9:17 ` Kunal Joshi
2024-02-19 8:00 ` Hogander, Jouni
2024-02-19 10:01 ` Joshi, Kunal1
0 siblings, 2 replies; 17+ messages in thread
From: Kunal Joshi @ 2024-02-18 9:17 UTC (permalink / raw)
To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy
Extend the tests to cover panel replay selective fetch feature.
From kms_psr2_sf test point of view we have check_pr_psr2_sel_fetch_support
function to check if PR/PSR2 selective fetch is supported for an output
if output supports selective fetch then we check we enter DEEP_SLEEP mode
in run function
v2: fixed dynamic test name
v3: use check_psr2_support (Jouni)
v4: split patches (Jouni)
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com>
---
lib/igt_psr.c | 36 ++++++++++++++++++++++++++----------
lib/igt_psr.h | 6 +++---
tests/kms_cursor_legacy.c | 4 ++--
3 files changed, 31 insertions(+), 15 deletions(-)
diff --git a/lib/igt_psr.c b/lib/igt_psr.c
index cad8cce05..9accd2047 100644
--- a/lib/igt_psr.c
+++ b/lib/igt_psr.c
@@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd)
return strstr(buf, "PSR mode: disabled\n");
}
-bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output)
+bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
{
char buf[PSR_STATUS_MAX_LEN];
char debugfs_file[128] = {0};
@@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output
(strstr(line, "PSR = yes") &&
(strstr(line, "[0x03]") || strstr(line, "[0x04]")));
case PR_MODE:
- return strstr(line, "Panel Replay = yes");
+ return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no");
+ case PR_MODE_SEL_FETCH:
+ return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes");
default:
igt_assert_f(false, "Invalid psr mode\n");
return false;
@@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output)
return false;
debugfs_fd = igt_debugfs_dir(drm_fd);
- ret = psr2_selective_fetch_check(debugfs_fd, output);
+ ret = selective_fetch_check(debugfs_fd, output);
close(debugfs_fd);
return ret;
@@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output)
* Returns:
* True if PSR mode changed to PSR1, false otherwise.
*/
-bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output)
+bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t *output)
{
int debugfs_fd;
bool ret = false;
+ enum psr_mode mode;
if (!is_intel_device(drm_fd))
return ret;
debugfs_fd = igt_debugfs_dir(drm_fd);
- if (psr2_selective_fetch_check(debugfs_fd, output)) {
- psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
+ if (selective_fetch_check(debugfs_fd, output)) {
+ mode = psr_get_mode(debugfs_fd, output);
+ if (mode == PR_MODE_SEL_FETCH)
+ psr_set(drm_fd, debugfs_fd, PR_MODE, output);
+ else if (mode == PSR_MODE_2_SEL_FETCH)
+ psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output);
+ else
+ igt_assert("switch not possible from current psr mode\n");
ret = true;
}
@@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output)
* Restore PSR2 selective fetch after tests were executed, this function should
* only be called if i915_psr2_sel_fetch_to_psr1() returned true.
*/
-void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output)
+void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output)
{
int debugfs_fd;
+ enum psr_mode mode;
debugfs_fd = igt_debugfs_dir(drm_fd);
- psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output);
+ mode = psr_get_mode(debugfs_fd, output);
+ if (mode == PR_MODE)
+ psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH, output);
+ else
+ psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output);
close(debugfs_fd);
}
@@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output)
if (strstr(buf, "Panel Replay Enabled"))
return PR_MODE;
+ else if (strstr(buf, "Panel Replay Selective Update Enabled"))
+ return PR_MODE_SEL_FETCH;
else if (strstr(buf, "PSR2 selective fetch: enabled"))
return PSR_MODE_2_SEL_FETCH;
- else if (strstr(buf, "PSR2 enabled"))
+ else if (strstr(buf, "PSR2"))
return PSR_MODE_2;
- else if (strstr(buf, "PSR1 enabled"))
+ else if (strstr(buf, "PSR1"))
return PSR_MODE_1;
return PSR_DISABLED;
diff --git a/lib/igt_psr.h b/lib/igt_psr.h
index 372bef2b2..36ba7f068 100644
--- a/lib/igt_psr.h
+++ b/lib/igt_psr.h
@@ -46,7 +46,7 @@ enum fbc_mode {
};
bool psr_disabled_check(int debugfs_fd);
-bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output);
+bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
@@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output);
bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output);
-bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output);
-void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output);
+bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t *output);
+void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output);
bool is_psr_enable_possible(int drm_fd, enum psr_mode mode);
#endif
diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c
index a430f735a..91e5e9b07 100644
--- a/tests/kms_cursor_legacy.c
+++ b/tests/kms_cursor_legacy.c
@@ -1849,7 +1849,7 @@ igt_main
* page flip with cursor legacy APIS when Intel's PSR2 selective
* fetch is enabled, so switching PSR1 for this whole test.
*/
- intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL);
+ intel_psr2_restore = i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL);
}
igt_describe("Test checks how many cursor updates we can fit between vblanks "
@@ -2074,7 +2074,7 @@ igt_main
igt_fixture {
if (intel_psr2_restore)
- i915_psr2_sel_fetch_restore(display.drm_fd, NULL);
+ i915_pr_psr2_sel_fetch_restore(display.drm_fd, NULL);
igt_display_fini(&display);
drm_close_driver(display.drm_fd);
}
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
end of thread, other threads:[~2024-02-21 11:29 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-02-21 9:01 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi
2024-02-21 9:01 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi
2024-02-21 9:01 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi
2024-02-21 9:01 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi
2024-02-21 8:56 ` Hogander, Jouni
2024-02-21 9:37 ` ✓ CI.xeBAT: success for extend psr2_sf test for pr_sf (rev7) Patchwork
2024-02-21 9:56 ` ✓ Fi.CI.BAT: " Patchwork
2024-02-21 11:29 ` ✗ Fi.CI.IGT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2024-02-19 16:33 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi
2024-02-19 16:33 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi
2024-02-20 8:48 ` Hogander, Jouni
2024-02-18 9:17 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi
2024-02-18 9:17 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi
2024-02-19 8:00 ` Hogander, Jouni
2024-02-19 8:12 ` Joshi, Kunal1
2024-02-19 8:56 ` Hogander, Jouni
2024-02-19 9:01 ` Joshi, Kunal1
2024-02-19 10:01 ` Joshi, Kunal1
2024-02-19 10:29 ` Hogander, Jouni
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.