All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH] lib: sync xe_pciids.h with kernel
@ 2024-03-27 20:21 Ravi Kumar Vodapalli
  2024-03-27 22:57 ` ✗ CI.xeBAT: failure for " Patchwork
  2024-03-28 19:32 ` [PATCH] " Matt Roper
  0 siblings, 2 replies; 4+ messages in thread
From: Ravi Kumar Vodapalli @ 2024-03-27 20:21 UTC (permalink / raw)
  To: igt-dev
  Cc: balasubramani.vivekanandan, matthew.d.roper, lucas.demarchi,
	gustavo.sousa, radhakrishna.sripada, clinton.a.taylor,
	matthew.s.atwood, dnyaneshwar.bhadane, haridhar.kalvala,
	shekhar.chauhan

This synchronizes with kernel commit
0bd25f78c4fc ("drm/xe: Add new PCI IDs to DG2 platform")

Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com>
---
 lib/xe_pciids.h | 72 +++++++++++++++++++++++--------------------------
 1 file changed, 34 insertions(+), 38 deletions(-)

diff --git a/lib/xe_pciids.h b/lib/xe_pciids.h
index 29f07a00a..c7fc288da 100644
--- a/lib/xe_pciids.h
+++ b/lib/xe_pciids.h
@@ -67,6 +67,7 @@
 	MACRO__(0x4682, ## __VA_ARGS__),	\
 	MACRO__(0x4688, ## __VA_ARGS__),	\
 	MACRO__(0x468A, ## __VA_ARGS__),	\
+	MACRO__(0x468B, ## __VA_ARGS__),	\
 	MACRO__(0x4690, ## __VA_ARGS__),	\
 	MACRO__(0x4692, ## __VA_ARGS__),	\
 	MACRO__(0x4693, ## __VA_ARGS__)
@@ -113,13 +114,18 @@
 #define XE_RPLU_IDS(MACRO__, ...)		\
 	MACRO__(0xA721, ## __VA_ARGS__),	\
 	MACRO__(0xA7A1, ## __VA_ARGS__),	\
-	MACRO__(0xA7A9, ## __VA_ARGS__)
+	MACRO__(0xA7A9, ## __VA_ARGS__),	\
+	MACRO__(0xA7AC, ## __VA_ARGS__),	\
+	MACRO__(0xA7AD, ## __VA_ARGS__)
 
 /* RPL-P */
 #define XE_RPLP_IDS(MACRO__, ...)		\
+	XE_RPLU_IDS(MACRO__, ## __VA_ARGS__),	\
 	MACRO__(0xA720, ## __VA_ARGS__),	\
 	MACRO__(0xA7A0, ## __VA_ARGS__),	\
-	MACRO__(0xA7A8, ## __VA_ARGS__)
+	MACRO__(0xA7A8, ## __VA_ARGS__),	\
+	MACRO__(0xA7AA, ## __VA_ARGS__),	\
+	MACRO__(0xA7AB, ## __VA_ARGS__)
 
 /* DG2 */
 #define XE_DG2_G10_IDS(MACRO__, ...)		\
@@ -128,17 +134,22 @@
 	MACRO__(0x5692, ## __VA_ARGS__),	\
 	MACRO__(0x56A0, ## __VA_ARGS__),	\
 	MACRO__(0x56A1, ## __VA_ARGS__),	\
-	MACRO__(0x56A2, ## __VA_ARGS__)
+	MACRO__(0x56A2, ## __VA_ARGS__),	\
+	MACRO__(0x56BE, ## __VA_ARGS__),	\
+	MACRO__(0x56BF, ## __VA_ARGS__)
 
 #define XE_DG2_G11_IDS(MACRO__, ...)		\
 	MACRO__(0x5693, ## __VA_ARGS__),	\
 	MACRO__(0x5694, ## __VA_ARGS__),	\
 	MACRO__(0x5695, ## __VA_ARGS__),	\
-	MACRO__(0x5698, ## __VA_ARGS__),	\
 	MACRO__(0x56A5, ## __VA_ARGS__),	\
 	MACRO__(0x56A6, ## __VA_ARGS__),	\
 	MACRO__(0x56B0, ## __VA_ARGS__),	\
-	MACRO__(0x56B1, ## __VA_ARGS__)
+	MACRO__(0x56B1, ## __VA_ARGS__),	\
+	MACRO__(0x56BA, ## __VA_ARGS__),	\
+	MACRO__(0x56BB, ## __VA_ARGS__),	\
+	MACRO__(0x56BC, ## __VA_ARGS__),	\
+	MACRO__(0x56BD, ## __VA_ARGS__)
 
 #define XE_DG2_G12_IDS(MACRO__, ...)		\
 	MACRO__(0x5696, ## __VA_ARGS__),	\
@@ -154,7 +165,8 @@
 	XE_DG2_G12_IDS(MACRO__, ## __VA_ARGS__)
 
 #define XE_ATS_M150_IDS(MACRO__, ...)		\
-	MACRO__(0x56C0, ## __VA_ARGS__)
+	MACRO__(0x56C0, ## __VA_ARGS__),	\
+	MACRO__(0x56C2, ## __VA_ARGS__)
 
 #define XE_ATS_M75_IDS(MACRO__, ...)		\
 	MACRO__(0x56C1, ## __VA_ARGS__)
@@ -163,8 +175,23 @@
 	XE_ATS_M150_IDS(MACRO__, ## __VA_ARGS__),\
 	XE_ATS_M75_IDS(MACRO__, ## __VA_ARGS__)
 
+/* MTL / ARL */
+#define XE_MTL_IDS(MACRO__, ...)		\
+	MACRO__(0x7D40, ## __VA_ARGS__),	\
+	MACRO__(0x7D41, ## __VA_ARGS__),	\
+	MACRO__(0x7D45, ## __VA_ARGS__),	\
+	MACRO__(0x7D51, ## __VA_ARGS__),        \
+	MACRO__(0x7D55, ## __VA_ARGS__),	\
+	MACRO__(0x7D60, ## __VA_ARGS__),	\
+	MACRO__(0x7D67, ## __VA_ARGS__),	\
+	MACRO__(0x7DD1, ## __VA_ARGS__),        \
+	MACRO__(0x7DD5, ## __VA_ARGS__)
+
 /* PVC */
-#define XE_PVC_XT_IDS(MACRO__, ...)		\
+#define XE_PVC_IDS(MACRO__, ...)		\
+	MACRO__(0x0B69, ## __VA_ARGS__),	\
+	MACRO__(0x0B6E, ## __VA_ARGS__),	\
+	MACRO__(0x0BD4, ## __VA_ARGS__),	\
 	MACRO__(0x0BD5, ## __VA_ARGS__),	\
 	MACRO__(0x0BD6, ## __VA_ARGS__),	\
 	MACRO__(0x0BD7, ## __VA_ARGS__),	\
@@ -176,37 +203,6 @@
 	MACRO__(0x0BE1, ## __VA_ARGS__),	\
 	MACRO__(0x0BE5, ## __VA_ARGS__)
 
-#define XE_PVC_IDS(MACRO__, ...)		\
-	XE_PVC_XT_IDS(MACRO__, ## __VA_ARGS__)
-
-/* MTL */
-#define XE_MTL_M_IDS(MACRO__, ...)		\
-	MACRO__(0x7D40, ## __VA_ARGS__),	\
-	MACRO__(0x7D43, ## __VA_ARGS__),	\
-	MACRO__(0x7DC0, ## __VA_ARGS__)
-
-#define XE_MTL_P_IDS(MACRO__, ...)		\
-	MACRO__(0x7D45, ## __VA_ARGS__),	\
-	MACRO__(0x7D47, ## __VA_ARGS__),	\
-	MACRO__(0x7D50, ## __VA_ARGS__),	\
-	MACRO__(0x7D55, ## __VA_ARGS__),	\
-	MACRO__(0x7DC5, ## __VA_ARGS__),	\
-	MACRO__(0x7DD0, ## __VA_ARGS__),	\
-	MACRO__(0x7DD5, ## __VA_ARGS__)
-
-#define XE_MTL_S_IDS(MACRO__, ...)		\
-	MACRO__(0x7D60, ## __VA_ARGS__),	\
-	MACRO__(0x7DE0, ## __VA_ARGS__)
-
-#define XE_ARL_IDS(MACRO__, ...)		\
-	MACRO__(0x7D67, ## __VA_ARGS__)
-
-#define XE_MTL_IDS(MACRO__, ...)		\
-	XE_MTL_M_IDS(MACRO__, ## __VA_ARGS__),	\
-	XE_MTL_P_IDS(MACRO__, ## __VA_ARGS__),	\
-	XE_MTL_S_IDS(MACRO__, ## __VA_ARGS__),	\
-	XE_ARL_IDS(MACRO__, ## __VA_ARGS__)
-
 #define XE_LNL_IDS(MACRO__, ...) \
 	MACRO__(0x6420, ## __VA_ARGS__), \
 	MACRO__(0x64A0, ## __VA_ARGS__), \
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 4+ messages in thread
* ✗ CI.xeBAT: failure for lib: sync xe_pciids.h with kernel
  2024-03-27 20:21 [PATCH] lib: sync xe_pciids.h with kernel Ravi Kumar Vodapalli
@ 2024-03-27 22:57 ` Patchwork
  2024-03-28 19:34   ` Matt Roper
  2024-03-28 19:32 ` [PATCH] " Matt Roper
  1 sibling, 1 reply; 4+ messages in thread
From: Patchwork @ 2024-03-27 22:57 UTC (permalink / raw)
  To: Ravi Kumar Vodapalli; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 1633 bytes --]

== Series Details ==

Series: lib: sync xe_pciids.h with kernel
URL   : https://patchwork.freedesktop.org/series/131710/
State : failure

== Summary ==

CI Bug Log - changes from XEIGT_7786_BAT -> XEIGTPW_10935_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with XEIGTPW_10935_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in XEIGTPW_10935_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (5 -> 0)
------------------------------

  ERROR: It appears as if the changes made in XEIGTPW_10935_BAT prevented too many machines from booting.

  Missing    (5): bat-pvc-2 bat-lnl-1 bat-dg2-oem2 bat-adlp-7 bat-atsm-2 


Changes
-------

  No changes found


Build changes
-------------

  * IGT: IGT_7786 -> IGTPW_10935
  * Linux: xe-998-f9c56f1a03b5c35488671e4ffe61e28b12ffe163 -> xe-1004-07c774152cf8a034784b40978a77b5ee66e4779b

  IGTPW_10935: 30fb47a9a1c4453a367779d4f1c266b1fe399f92 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_7786: 1e4a3cd0a4bb3419fb70ed3e01259485b056dcfd @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-1004-07c774152cf8a034784b40978a77b5ee66e4779b: 07c774152cf8a034784b40978a77b5ee66e4779b
  xe-998-f9c56f1a03b5c35488671e4ffe61e28b12ffe163: f9c56f1a03b5c35488671e4ffe61e28b12ffe163

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10935/index.html

[-- Attachment #2: Type: text/html, Size: 2216 bytes --]

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH] lib: sync xe_pciids.h with kernel
  2024-03-27 20:21 [PATCH] lib: sync xe_pciids.h with kernel Ravi Kumar Vodapalli
  2024-03-27 22:57 ` ✗ CI.xeBAT: failure for " Patchwork
@ 2024-03-28 19:32 ` Matt Roper
  1 sibling, 0 replies; 4+ messages in thread
From: Matt Roper @ 2024-03-28 19:32 UTC (permalink / raw)
  To: Ravi Kumar Vodapalli
  Cc: igt-dev, balasubramani.vivekanandan, lucas.demarchi,
	gustavo.sousa, radhakrishna.sripada, clinton.a.taylor,
	matthew.s.atwood, dnyaneshwar.bhadane, haridhar.kalvala,
	shekhar.chauhan

On Thu, Mar 28, 2024 at 01:51:00AM +0530, Ravi Kumar Vodapalli wrote:
> This synchronizes with kernel commit
> 0bd25f78c4fc ("drm/xe: Add new PCI IDs to DG2 platform")
> 
> Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

and applied to master.  Thanks for the patch.


Matt

> ---
>  lib/xe_pciids.h | 72 +++++++++++++++++++++++--------------------------
>  1 file changed, 34 insertions(+), 38 deletions(-)
> 
> diff --git a/lib/xe_pciids.h b/lib/xe_pciids.h
> index 29f07a00a..c7fc288da 100644
> --- a/lib/xe_pciids.h
> +++ b/lib/xe_pciids.h
> @@ -67,6 +67,7 @@
>  	MACRO__(0x4682, ## __VA_ARGS__),	\
>  	MACRO__(0x4688, ## __VA_ARGS__),	\
>  	MACRO__(0x468A, ## __VA_ARGS__),	\
> +	MACRO__(0x468B, ## __VA_ARGS__),	\
>  	MACRO__(0x4690, ## __VA_ARGS__),	\
>  	MACRO__(0x4692, ## __VA_ARGS__),	\
>  	MACRO__(0x4693, ## __VA_ARGS__)
> @@ -113,13 +114,18 @@
>  #define XE_RPLU_IDS(MACRO__, ...)		\
>  	MACRO__(0xA721, ## __VA_ARGS__),	\
>  	MACRO__(0xA7A1, ## __VA_ARGS__),	\
> -	MACRO__(0xA7A9, ## __VA_ARGS__)
> +	MACRO__(0xA7A9, ## __VA_ARGS__),	\
> +	MACRO__(0xA7AC, ## __VA_ARGS__),	\
> +	MACRO__(0xA7AD, ## __VA_ARGS__)
>  
>  /* RPL-P */
>  #define XE_RPLP_IDS(MACRO__, ...)		\
> +	XE_RPLU_IDS(MACRO__, ## __VA_ARGS__),	\
>  	MACRO__(0xA720, ## __VA_ARGS__),	\
>  	MACRO__(0xA7A0, ## __VA_ARGS__),	\
> -	MACRO__(0xA7A8, ## __VA_ARGS__)
> +	MACRO__(0xA7A8, ## __VA_ARGS__),	\
> +	MACRO__(0xA7AA, ## __VA_ARGS__),	\
> +	MACRO__(0xA7AB, ## __VA_ARGS__)
>  
>  /* DG2 */
>  #define XE_DG2_G10_IDS(MACRO__, ...)		\
> @@ -128,17 +134,22 @@
>  	MACRO__(0x5692, ## __VA_ARGS__),	\
>  	MACRO__(0x56A0, ## __VA_ARGS__),	\
>  	MACRO__(0x56A1, ## __VA_ARGS__),	\
> -	MACRO__(0x56A2, ## __VA_ARGS__)
> +	MACRO__(0x56A2, ## __VA_ARGS__),	\
> +	MACRO__(0x56BE, ## __VA_ARGS__),	\
> +	MACRO__(0x56BF, ## __VA_ARGS__)
>  
>  #define XE_DG2_G11_IDS(MACRO__, ...)		\
>  	MACRO__(0x5693, ## __VA_ARGS__),	\
>  	MACRO__(0x5694, ## __VA_ARGS__),	\
>  	MACRO__(0x5695, ## __VA_ARGS__),	\
> -	MACRO__(0x5698, ## __VA_ARGS__),	\
>  	MACRO__(0x56A5, ## __VA_ARGS__),	\
>  	MACRO__(0x56A6, ## __VA_ARGS__),	\
>  	MACRO__(0x56B0, ## __VA_ARGS__),	\
> -	MACRO__(0x56B1, ## __VA_ARGS__)
> +	MACRO__(0x56B1, ## __VA_ARGS__),	\
> +	MACRO__(0x56BA, ## __VA_ARGS__),	\
> +	MACRO__(0x56BB, ## __VA_ARGS__),	\
> +	MACRO__(0x56BC, ## __VA_ARGS__),	\
> +	MACRO__(0x56BD, ## __VA_ARGS__)
>  
>  #define XE_DG2_G12_IDS(MACRO__, ...)		\
>  	MACRO__(0x5696, ## __VA_ARGS__),	\
> @@ -154,7 +165,8 @@
>  	XE_DG2_G12_IDS(MACRO__, ## __VA_ARGS__)
>  
>  #define XE_ATS_M150_IDS(MACRO__, ...)		\
> -	MACRO__(0x56C0, ## __VA_ARGS__)
> +	MACRO__(0x56C0, ## __VA_ARGS__),	\
> +	MACRO__(0x56C2, ## __VA_ARGS__)
>  
>  #define XE_ATS_M75_IDS(MACRO__, ...)		\
>  	MACRO__(0x56C1, ## __VA_ARGS__)
> @@ -163,8 +175,23 @@
>  	XE_ATS_M150_IDS(MACRO__, ## __VA_ARGS__),\
>  	XE_ATS_M75_IDS(MACRO__, ## __VA_ARGS__)
>  
> +/* MTL / ARL */
> +#define XE_MTL_IDS(MACRO__, ...)		\
> +	MACRO__(0x7D40, ## __VA_ARGS__),	\
> +	MACRO__(0x7D41, ## __VA_ARGS__),	\
> +	MACRO__(0x7D45, ## __VA_ARGS__),	\
> +	MACRO__(0x7D51, ## __VA_ARGS__),        \
> +	MACRO__(0x7D55, ## __VA_ARGS__),	\
> +	MACRO__(0x7D60, ## __VA_ARGS__),	\
> +	MACRO__(0x7D67, ## __VA_ARGS__),	\
> +	MACRO__(0x7DD1, ## __VA_ARGS__),        \
> +	MACRO__(0x7DD5, ## __VA_ARGS__)
> +
>  /* PVC */
> -#define XE_PVC_XT_IDS(MACRO__, ...)		\
> +#define XE_PVC_IDS(MACRO__, ...)		\
> +	MACRO__(0x0B69, ## __VA_ARGS__),	\
> +	MACRO__(0x0B6E, ## __VA_ARGS__),	\
> +	MACRO__(0x0BD4, ## __VA_ARGS__),	\
>  	MACRO__(0x0BD5, ## __VA_ARGS__),	\
>  	MACRO__(0x0BD6, ## __VA_ARGS__),	\
>  	MACRO__(0x0BD7, ## __VA_ARGS__),	\
> @@ -176,37 +203,6 @@
>  	MACRO__(0x0BE1, ## __VA_ARGS__),	\
>  	MACRO__(0x0BE5, ## __VA_ARGS__)
>  
> -#define XE_PVC_IDS(MACRO__, ...)		\
> -	XE_PVC_XT_IDS(MACRO__, ## __VA_ARGS__)
> -
> -/* MTL */
> -#define XE_MTL_M_IDS(MACRO__, ...)		\
> -	MACRO__(0x7D40, ## __VA_ARGS__),	\
> -	MACRO__(0x7D43, ## __VA_ARGS__),	\
> -	MACRO__(0x7DC0, ## __VA_ARGS__)
> -
> -#define XE_MTL_P_IDS(MACRO__, ...)		\
> -	MACRO__(0x7D45, ## __VA_ARGS__),	\
> -	MACRO__(0x7D47, ## __VA_ARGS__),	\
> -	MACRO__(0x7D50, ## __VA_ARGS__),	\
> -	MACRO__(0x7D55, ## __VA_ARGS__),	\
> -	MACRO__(0x7DC5, ## __VA_ARGS__),	\
> -	MACRO__(0x7DD0, ## __VA_ARGS__),	\
> -	MACRO__(0x7DD5, ## __VA_ARGS__)
> -
> -#define XE_MTL_S_IDS(MACRO__, ...)		\
> -	MACRO__(0x7D60, ## __VA_ARGS__),	\
> -	MACRO__(0x7DE0, ## __VA_ARGS__)
> -
> -#define XE_ARL_IDS(MACRO__, ...)		\
> -	MACRO__(0x7D67, ## __VA_ARGS__)
> -
> -#define XE_MTL_IDS(MACRO__, ...)		\
> -	XE_MTL_M_IDS(MACRO__, ## __VA_ARGS__),	\
> -	XE_MTL_P_IDS(MACRO__, ## __VA_ARGS__),	\
> -	XE_MTL_S_IDS(MACRO__, ## __VA_ARGS__),	\
> -	XE_ARL_IDS(MACRO__, ## __VA_ARGS__)
> -
>  #define XE_LNL_IDS(MACRO__, ...) \
>  	MACRO__(0x6420, ## __VA_ARGS__), \
>  	MACRO__(0x64A0, ## __VA_ARGS__), \
> -- 
> 2.25.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: ✗ CI.xeBAT: failure for lib: sync xe_pciids.h with kernel
  2024-03-27 22:57 ` ✗ CI.xeBAT: failure for " Patchwork
@ 2024-03-28 19:34   ` Matt Roper
  0 siblings, 0 replies; 4+ messages in thread
From: Matt Roper @ 2024-03-28 19:34 UTC (permalink / raw)
  To: igt-dev; +Cc: Ravi Kumar Vodapalli

On Wed, Mar 27, 2024 at 10:57:59PM -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: lib: sync xe_pciids.h with kernel
> URL   : https://patchwork.freedesktop.org/series/131710/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from XEIGT_7786_BAT -> XEIGTPW_10935_BAT
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with XEIGTPW_10935_BAT absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in XEIGTPW_10935_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Participating hosts (5 -> 0)
> ------------------------------
> 
>   ERROR: It appears as if the changes made in XEIGTPW_10935_BAT prevented too many machines from booting.
> 
>   Missing    (5): bat-pvc-2 bat-lnl-1 bat-dg2-oem2 bat-adlp-7 bat-atsm-2 

This looks like a hiccup in the CI system.  Updating IGT would not cause
all these machines to stop booting.

This is just adding missing PCI IDs that already exist in the kernel and
not changing any actual functionality, so I think we can ignore this.


Matt

> 
> 
> Changes
> -------
> 
>   No changes found
> 
> 
> Build changes
> -------------
> 
>   * IGT: IGT_7786 -> IGTPW_10935
>   * Linux: xe-998-f9c56f1a03b5c35488671e4ffe61e28b12ffe163 -> xe-1004-07c774152cf8a034784b40978a77b5ee66e4779b
> 
>   IGTPW_10935: 30fb47a9a1c4453a367779d4f1c266b1fe399f92 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   IGT_7786: 1e4a3cd0a4bb3419fb70ed3e01259485b056dcfd @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   xe-1004-07c774152cf8a034784b40978a77b5ee66e4779b: 07c774152cf8a034784b40978a77b5ee66e4779b
>   xe-998-f9c56f1a03b5c35488671e4ffe61e28b12ffe163: f9c56f1a03b5c35488671e4ffe61e28b12ffe163
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10935/index.html

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2024-03-28 19:34 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-03-27 20:21 [PATCH] lib: sync xe_pciids.h with kernel Ravi Kumar Vodapalli
2024-03-27 22:57 ` ✗ CI.xeBAT: failure for " Patchwork
2024-03-28 19:34   ` Matt Roper
2024-03-28 19:32 ` [PATCH] " Matt Roper

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.