* Re: [PATCH v3 2/6] serial: lpuart: use ipg clk for i.MX7ULP
2024-03-28 0:52 ` [PATCH v3 2/6] serial: lpuart: use ipg clk for i.MX7ULP Peng Fan (OSS)
@ 2024-03-28 0:09 ` Fabio Estevam
0 siblings, 0 replies; 13+ messages in thread
From: Fabio Estevam @ 2024-03-28 0:09 UTC (permalink / raw)
To: Peng Fan (OSS)
Cc: Stefano Babic, NXP i.MX U-Boot Team, Sumit Garg, Tom Rini,
u-boot, Peng Fan
On Wed, Mar 27, 2024 at 8:53 PM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
> + struct lpuart_serial_plat *plat = dev_get_plat(dev);
> struct clk per_clk;
Please rename from "per_clk" to "clk".
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
2024-03-28 0:53 ` [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM Peng Fan (OSS)
@ 2024-03-28 0:13 ` Fabio Estevam
2024-03-28 0:40 ` Peng Fan
2024-03-28 1:55 ` Peng Fan
0 siblings, 2 replies; 13+ messages in thread
From: Fabio Estevam @ 2024-03-28 0:13 UTC (permalink / raw)
To: Peng Fan (OSS)
Cc: Stefano Babic, NXP i.MX U-Boot Team, Sumit Garg, Tom Rini,
u-boot, Peng Fan
On Wed, Mar 27, 2024 at 8:53 PM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
> +&lpi2c2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-frequency = <400000>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&pinctrl_lpi2c2>;
> + pinctrl-1 = <&pinctrl_lpi2c2>;
> + status = "okay";
> +
> + pmic@25 {
....
> + adp5585gpio: gpio@34 {
> + compatible = "adp5585";
> + reg = <0x34>;
> + gpio-controller;
> + #gpio-cells = <2>;
Please add a comment saying these nodes are already available in 6.9-rc1.
> --- a/arch/arm/mach-imx/imx9/Kconfig
> +++ b/arch/arm/mach-imx/imx9/Kconfig
> @@ -31,6 +31,7 @@ choice
> config TARGET_IMX93_11X11_EVK
> bool "imx93_11x11_evk"
> select IMX93
> + imply OF_UPSTREAM
Sumit and I asked you to add OF_UPSTREAM to all imx93 boards, not just this one.
Please don't ignore review comments.
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
2024-03-28 0:13 ` Fabio Estevam
@ 2024-03-28 0:40 ` Peng Fan
2024-03-28 0:44 ` Fabio Estevam
2024-03-28 1:55 ` Peng Fan
1 sibling, 1 reply; 13+ messages in thread
From: Peng Fan @ 2024-03-28 0:40 UTC (permalink / raw)
To: Fabio Estevam, Peng Fan (OSS)
Cc: Stefano Babic, dl-uboot-imx, Sumit Garg, Tom Rini, u-boot
> Subject: Re: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to
> OF_UPSTREAM
>
> On Wed, Mar 27, 2024 at 8:53 PM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
>
> > +&lpi2c2 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + clock-frequency = <400000>;
> > + pinctrl-names = "default", "sleep";
> > + pinctrl-0 = <&pinctrl_lpi2c2>;
> > + pinctrl-1 = <&pinctrl_lpi2c2>;
> > + status = "okay";
> > +
> > + pmic@25 {
> ....
> > + adp5585gpio: gpio@34 {
> > + compatible = "adp5585";
> > + reg = <0x34>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
>
> Please add a comment saying these nodes are already available in 6.9-rc1.
>
> > --- a/arch/arm/mach-imx/imx9/Kconfig
> > +++ b/arch/arm/mach-imx/imx9/Kconfig
> > @@ -31,6 +31,7 @@ choice
> > config TARGET_IMX93_11X11_EVK
> > bool "imx93_11x11_evk"
> > select IMX93
> > + imply OF_UPSTREAM
>
> Sumit and I asked you to add OF_UPSTREAM to all imx93 boards, not just this
> one.
I could help convert all imx93 boards, but I could only test nxp
imx93 boards, not able to test others.
Thanks,
Peng.
>
> Please don't ignore review comments.
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
2024-03-28 0:40 ` Peng Fan
@ 2024-03-28 0:44 ` Fabio Estevam
2024-03-28 1:46 ` Peng Fan
0 siblings, 1 reply; 13+ messages in thread
From: Fabio Estevam @ 2024-03-28 0:44 UTC (permalink / raw)
To: Peng Fan
Cc: Peng Fan (OSS),
Stefano Babic, dl-uboot-imx, Sumit Garg, Tom Rini, u-boot
Hi Peng,
On Wed, Mar 27, 2024 at 9:40 PM Peng Fan <peng.fan@nxp.com> wrote:
> I could help convert all imx93 boards, but I could only test nxp
> imx93 boards, not able to test others.
Just copy the board maintainers in your patch and they could help test
the conversion to OF_UPSTREAM.
Thanks!
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3 0/6] imx93-11x11-evk: convert to OF_UPSTREAM
@ 2024-03-28 0:52 Peng Fan (OSS)
2024-03-28 0:52 ` [PATCH v3 1/6] gpio: imx_rgpio2p: support one address Peng Fan (OSS)
` (5 more replies)
0 siblings, 6 replies; 13+ messages in thread
From: Peng Fan (OSS) @ 2024-03-28 0:52 UTC (permalink / raw)
To: Stefano Babic, Fabio Estevam, NXP i.MX U-Boot Team
Cc: Sumit Garg, Tom Rini, u-boot, Peng Fan
To support OF_UPSTREAM, a few driver changes are included.
For TMU, still use U-Boot node, I will prepare a kernel update,
then back to U-Boot support.
Add the pmic nodes to x-u-boot.dtsi, since upstream still not has it.
imx93.dtsi still kept because other boards still use it as of now.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
Changes in v3:
- Update patch 5, to drop the imx8mp-evk changes which are wrongly
included
- Link to v2: https://lore.kernel.org/r/20240328-imx93-of-v2-0-909f5d37da87@nxp.com
Changes in v2:
- Add a new patch to sync clock header to avoid breaking
- Drop the Makefile change which change including order
- Link to v1: https://lore.kernel.org/r/20240327-imx93-of-v1-0-afab6b31422a@nxp.com
---
Peng Fan (6):
gpio: imx_rgpio2p: support one address
serial: lpuart: use ipg clk for i.MX7ULP
cpu: drop imx9_cpu
clk: imx93: fix anatop base
dt-bindings: imx93: sync clock header
imx: imx93-11x11-evk: convert to OF_UPSTREAM
arch/arm/dts/Makefile | 1 -
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 +++++++++++
arch/arm/dts/imx93-11x11-evk.dts | 322 -------------------------------
arch/arm/dts/imx93-u-boot.dtsi | 15 ++
arch/arm/mach-imx/imx9/Kconfig | 1 +
configs/imx93_11x11_evk_defconfig | 2 +-
configs/imx93_11x11_evk_ld_defconfig | 2 +-
drivers/clk/imx/clk-imx93.c | 2 +-
drivers/cpu/imx9_cpu.c | 224 ---------------------
drivers/gpio/imx_rgpio2p.c | 42 +++-
drivers/serial/serial_lpuart.c | 9 +-
include/dt-bindings/clock/imx93-clock.h | 3 +-
12 files changed, 185 insertions(+), 556 deletions(-)
---
base-commit: ab8d9ca3044acf51d8ff3bf3c4718c48f30ad606
change-id: 20240327-imx93-of-56ef2b96f2e2
Best regards,
--
Peng Fan <peng.fan@nxp.com>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3 1/6] gpio: imx_rgpio2p: support one address
2024-03-28 0:52 [PATCH v3 0/6] imx93-11x11-evk: convert to OF_UPSTREAM Peng Fan (OSS)
@ 2024-03-28 0:52 ` Peng Fan (OSS)
2024-03-28 0:52 ` [PATCH v3 2/6] serial: lpuart: use ipg clk for i.MX7ULP Peng Fan (OSS)
` (4 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Peng Fan (OSS) @ 2024-03-28 0:52 UTC (permalink / raw)
To: Stefano Babic, Fabio Estevam, NXP i.MX U-Boot Team
Cc: Sumit Garg, Tom Rini, u-boot, Peng Fan
From: Peng Fan <peng.fan@nxp.com>
The i.MX8ULP/93 gpio dt-schema have been updated to only have one
address entry, update the driver to support it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
drivers/gpio/imx_rgpio2p.c | 42 ++++++++++++++++++++++++++++++++++++++----
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
index 175e460aff5..3227a8d5b57 100644
--- a/drivers/gpio/imx_rgpio2p.c
+++ b/drivers/gpio/imx_rgpio2p.c
@@ -21,6 +21,12 @@ enum imx_rgpio2p_direction {
#define GPIO_PER_BANK 32
+struct imx_rgpio2p_soc_data {
+ bool have_dual_base;
+};
+
+#define IMX8ULP_GPIO_BASE_OFF 0x40
+
struct imx_rgpio2p_data {
struct gpio_regs *regs;
};
@@ -165,6 +171,9 @@ static int imx_rgpio2p_probe(struct udevice *dev)
static int imx_rgpio2p_bind(struct udevice *dev)
{
struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
+ struct imx_rgpio2p_soc_data *data =
+ (struct imx_rgpio2p_soc_data *)dev_get_driver_data(dev);
+ bool dual_base = data->have_dual_base;
fdt_addr_t addr;
/*
@@ -176,9 +185,26 @@ static int imx_rgpio2p_bind(struct udevice *dev)
if (plat)
return 0;
- addr = devfdt_get_addr_index(dev, 1);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
+ /*
+ * Handle legacy compatible combinations which used two reg values
+ * for the i.MX8ULP and i.MX93.
+ */
+ if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+ (device_is_compatible(dev, "fsl,imx93-gpio") ||
+ (device_is_compatible(dev, "fsl,imx8ulp-gpio"))))
+ dual_base = true;
+
+ if (dual_base) {
+ addr = devfdt_get_addr_index(dev, 1);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+ } else {
+ addr = devfdt_get_addr_index(dev, 0);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ addr += IMX8ULP_GPIO_BASE_OFF;
+ }
/*
* TODO:
@@ -202,9 +228,17 @@ static int imx_rgpio2p_bind(struct udevice *dev)
return 0;
}
+static struct imx_rgpio2p_soc_data imx7ulp_data = {
+ .have_dual_base = true,
+};
+
+static struct imx_rgpio2p_soc_data imx8ulp_data = {
+ .have_dual_base = false,
+};
static const struct udevice_id imx_rgpio2p_ids[] = {
- { .compatible = "fsl,imx7ulp-gpio" },
+ { .compatible = "fsl,imx7ulp-gpio", .data = (ulong)&imx7ulp_data },
+ { .compatible = "fsl,imx8ulp-gpio", .data = (ulong)&imx8ulp_data },
{ }
};
--
2.35.3
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 2/6] serial: lpuart: use ipg clk for i.MX7ULP
2024-03-28 0:52 [PATCH v3 0/6] imx93-11x11-evk: convert to OF_UPSTREAM Peng Fan (OSS)
2024-03-28 0:52 ` [PATCH v3 1/6] gpio: imx_rgpio2p: support one address Peng Fan (OSS)
@ 2024-03-28 0:52 ` Peng Fan (OSS)
2024-03-28 0:09 ` Fabio Estevam
2024-03-28 0:53 ` [PATCH v3 3/6] cpu: drop imx9_cpu Peng Fan (OSS)
` (3 subsequent siblings)
5 siblings, 1 reply; 13+ messages in thread
From: Peng Fan (OSS) @ 2024-03-28 0:52 UTC (permalink / raw)
To: Stefano Babic, Fabio Estevam, NXP i.MX U-Boot Team
Cc: Sumit Garg, Tom Rini, u-boot, Peng Fan
From: Peng Fan <peng.fan@nxp.com>
To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk.
So add a devtype check for i.MX7ULP.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
drivers/serial/serial_lpuart.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index ce08a6b4486..653ff99e67b 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -111,11 +111,18 @@ u32 __weak get_lpuart_clk(void)
#if CONFIG_IS_ENABLED(CLK)
static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
{
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct clk per_clk;
ulong rate;
int ret;
+ char *name;
- ret = clk_get_by_name(dev, "per", &per_clk);
+ if (plat->devtype == DEV_MX7ULP)
+ name = "ipg";
+ else
+ name = "per";
+
+ ret = clk_get_by_name(dev, name, &per_clk);
if (ret) {
dev_err(dev, "Failed to get per clk: %d\n", ret);
return ret;
--
2.35.3
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 3/6] cpu: drop imx9_cpu
2024-03-28 0:52 [PATCH v3 0/6] imx93-11x11-evk: convert to OF_UPSTREAM Peng Fan (OSS)
2024-03-28 0:52 ` [PATCH v3 1/6] gpio: imx_rgpio2p: support one address Peng Fan (OSS)
2024-03-28 0:52 ` [PATCH v3 2/6] serial: lpuart: use ipg clk for i.MX7ULP Peng Fan (OSS)
@ 2024-03-28 0:53 ` Peng Fan (OSS)
2024-03-28 0:53 ` [PATCH v3 4/6] clk: imx93: fix anatop base Peng Fan (OSS)
` (2 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Peng Fan (OSS) @ 2024-03-28 0:53 UTC (permalink / raw)
To: Stefano Babic, Fabio Estevam, NXP i.MX U-Boot Team
Cc: Sumit Garg, Tom Rini, u-boot, Peng Fan
From: Peng Fan <peng.fan@nxp.com>
This was wrongly committed, no user, remove it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
drivers/cpu/imx9_cpu.c | 224 -------------------------------------------------
1 file changed, 224 deletions(-)
diff --git a/drivers/cpu/imx9_cpu.c b/drivers/cpu/imx9_cpu.c
deleted file mode 100644
index 66534fe6d17..00000000000
--- a/drivers/cpu/imx9_cpu.c
+++ /dev/null
@@ -1,224 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2019 NXP
- */
-
-#include <common.h>
-#include <cpu.h>
-#include <dm.h>
-#include <thermal.h>
-#include <asm/global_data.h>
-#include <asm/system.h>
-#include <firmware/linux/imx/sci/sci.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch-imx/cpu.h>
-#include <asm/armv8/cpu.h>
-#include <linux/bitops.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct cpu_imx_plat {
- const char *name;
- const char *rev;
- const char *type;
- u32 cpu_rsrc;
- u32 cpurev;
- u32 freq_mhz;
- u32 mpidr;
-};
-
-const char *get_imx9_type(u32 imxtype)
-{
- switch (imxtype) {
- case MXC_CPU_IMX93:
- return "93";
- default:
- return "??";
- }
-}
-
-const char *get_imx9_rev(u32 rev)
-{
- switch (rev) {
- case CHIP_REV_1_0:
- return "1.";
- case CHIP_REV_B:
- return "B";
- case CHIP_REV_C:
- return "C";
- default:
- return "?";
- }
-}
-
-static void set_core_data(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (device_is_compatible(dev, "arm,cortex-a35"))
- plat->name = "A35";
- else
- plat->name = "?";
-}
-
-#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- struct udevice *thermal_dev;
- int cpu_tmp, ret;
- int idx = 1; /* use "cpu-thermal0" device */
-
- if (plat->cpu_rsrc == SC_R_A72)
- idx = 2; /* use "cpu-thermal1" device */
-
- ret = uclass_get_device(UCLASS_THERMAL, idx, &thermal_dev);
- if (!ret) {
- ret = thermal_get_temp(thermal_dev, &cpu_tmp);
- if (ret)
- return 0xdeadbeef;
- } else {
- return 0xdeadbeef;
- }
-
- return cpu_tmp;
-}
-#else
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- return 0;
-}
-#endif
-
-int cpu_imx_get_desc(const struct udevice *dev, char *buf, int size)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- int ret, temp;
-
- if (size < 100)
- return -ENOSPC;
-
- ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
- plat->type, plat->rev, plat->name, plat->freq_mhz);
-
- if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
- temp = cpu_imx_get_temp(plat);
- buf = buf + ret;
- size = size - ret;
- if (temp != 0xdeadbeef)
- ret = snprintf(buf, size, " at %dC", temp);
- else
- ret = snprintf(buf, size, " - invalid sensor data");
- }
-
- snprintf(buf + ret, size - ret, "\n");
-
- return 0;
-}
-
-static int cpu_imx_get_info(const struct udevice *dev, struct cpu_info *info)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- info->cpu_freq = plat->freq_mhz * 1000;
- info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
- return 0;
-}
-
-static int cpu_imx_get_count(const struct udevice *dev)
-{
- ofnode node;
- int num = 0;
-
- ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
- const char *device_type;
-
- if (!ofnode_is_enabled(node))
- continue;
-
- device_type = ofnode_read_string(node, "device_type");
- if (!device_type)
- continue;
-
- if (!strcmp(device_type, "cpu"))
- num++;
- }
-
- return num;
-}
-
-static int cpu_imx_get_vendor(const struct udevice *dev, char *buf, int size)
-{
- snprintf(buf, size, "NXP");
- return 0;
-}
-
-static int cpu_imx_is_current(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (plat->mpidr == (read_mpidr() & 0xffff))
- return 1;
-
- return 0;
-}
-
-static const struct cpu_ops cpu_imx9_ops = {
- .get_desc = cpu_imx_get_desc,
- .get_info = cpu_imx_get_info,
- .get_count = cpu_imx_get_count,
- .get_vendor = cpu_imx_get_vendor,
- .is_current = cpu_imx_is_current,
-};
-
-static const struct udevice_id cpu_imx9_ids[] = {
- { .compatible = "arm,cortex-a35" },
- { .compatible = "arm,cortex-a53" },
- { .compatible = "arm,cortex-a72" },
- { }
-};
-
-static ulong imx9_get_cpu_rate(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- ulong rate;
- int ret;
-
- ret = sc_pm_get_clock_rate(-1, plat->cpu_rsrc, SC_PM_CLK_CPU,
- (sc_pm_clock_rate_t *)&rate);
- if (ret) {
- printf("Could not read CPU frequency: %d\n", ret);
- return 0;
- }
-
- return rate;
-}
-
-static int imx9_cpu_probe(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- u32 cpurev;
-
- set_core_data(dev);
- cpurev = get_cpu_rev();
- plat->cpurev = cpurev;
- plat->rev = get_imx9_rev(cpurev & 0xFFF);
- plat->type = get_imx9_type((cpurev & 0xFF000) >> 12);
- plat->freq_mhz = imx9_get_cpu_rate(dev) / 1000000;
- plat->mpidr = dev_read_addr(dev);
- if (plat->mpidr == FDT_ADDR_T_NONE) {
- printf("%s: Failed to get CPU reg property\n", __func__);
- return -EINVAL;
- }
-
- return 0;
-}
-
-U_BOOT_DRIVER(cpu_imx9_drv) = {
- .name = "imx9x_cpu",
- .id = UCLASS_CPU,
- .of_match = cpu_imx9_ids,
- .ops = &cpu_imx9_ops,
- .probe = imx9_cpu_probe,
- .plat_auto = sizeof(struct cpu_imx_plat),
- .flags = DM_FLAG_PRE_RELOC,
-};
--
2.35.3
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 4/6] clk: imx93: fix anatop base
2024-03-28 0:52 [PATCH v3 0/6] imx93-11x11-evk: convert to OF_UPSTREAM Peng Fan (OSS)
` (2 preceding siblings ...)
2024-03-28 0:53 ` [PATCH v3 3/6] cpu: drop imx9_cpu Peng Fan (OSS)
@ 2024-03-28 0:53 ` Peng Fan (OSS)
2024-03-28 0:53 ` [PATCH v3 5/6] dt-bindings: imx93: sync clock header Peng Fan (OSS)
2024-03-28 0:53 ` [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM Peng Fan (OSS)
5 siblings, 0 replies; 13+ messages in thread
From: Peng Fan (OSS) @ 2024-03-28 0:53 UTC (permalink / raw)
To: Stefano Babic, Fabio Estevam, NXP i.MX U-Boot Team
Cc: Sumit Garg, Tom Rini, u-boot, Peng Fan
From: Peng Fan <peng.fan@nxp.com>
The PLL clk needs use anatop base, otherwise wrong PLL address will
be used.
Fixes: 9c153e46661b ("clk: imx: add i.MX93 CCF driver")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
drivers/clk/imx/clk-imx93.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index ce10d795316..f0cb797d975 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -289,7 +289,7 @@ static int imx93_clk_probe(struct udevice *dev)
clk_dm(IMX93_CLK_SYS_PLL_PFD2_DIV2,
imx_clk_fixed_factor("sys_pll_pfd2_div2", "sys_pll_pfd2", 1, 2));
- base = (void *)ANATOP_BASE_ADDR;
+ anatop_base = (void *)ANATOP_BASE_ADDR;
clk_dm(IMX93_CLK_ARM_PLL,
imx_clk_fracn_gppll_integer("arm_pll", "clock-osc-24m",
--
2.35.3
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 5/6] dt-bindings: imx93: sync clock header
2024-03-28 0:52 [PATCH v3 0/6] imx93-11x11-evk: convert to OF_UPSTREAM Peng Fan (OSS)
` (3 preceding siblings ...)
2024-03-28 0:53 ` [PATCH v3 4/6] clk: imx93: fix anatop base Peng Fan (OSS)
@ 2024-03-28 0:53 ` Peng Fan (OSS)
2024-03-28 0:53 ` [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM Peng Fan (OSS)
5 siblings, 0 replies; 13+ messages in thread
From: Peng Fan (OSS) @ 2024-03-28 0:53 UTC (permalink / raw)
To: Stefano Babic, Fabio Estevam, NXP i.MX U-Boot Team
Cc: Sumit Garg, Tom Rini, u-boot, Peng Fan
From: Peng Fan <peng.fan@nxp.com>
Sync clock header with kernel 6.8
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
include/dt-bindings/clock/imx93-clock.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/imx93-clock.h b/include/dt-bindings/clock/imx93-clock.h
index 35a1f62053a..787c9e74dc9 100644
--- a/include/dt-bindings/clock/imx93-clock.h
+++ b/include/dt-bindings/clock/imx93-clock.h
@@ -203,6 +203,7 @@
#define IMX93_CLK_ARM_PLL 198
#define IMX93_CLK_A55_SEL 199
#define IMX93_CLK_A55_CORE 200
-#define IMX93_CLK_END 201
+#define IMX93_CLK_PDM_IPG 201
+#define IMX93_CLK_END 202
#endif
--
2.35.3
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
2024-03-28 0:52 [PATCH v3 0/6] imx93-11x11-evk: convert to OF_UPSTREAM Peng Fan (OSS)
` (4 preceding siblings ...)
2024-03-28 0:53 ` [PATCH v3 5/6] dt-bindings: imx93: sync clock header Peng Fan (OSS)
@ 2024-03-28 0:53 ` Peng Fan (OSS)
2024-03-28 0:13 ` Fabio Estevam
5 siblings, 1 reply; 13+ messages in thread
From: Peng Fan (OSS) @ 2024-03-28 0:53 UTC (permalink / raw)
To: Stefano Babic, Fabio Estevam, NXP i.MX U-Boot Team
Cc: Sumit Garg, Tom Rini, u-boot, Peng Fan
From: Peng Fan <peng.fan@nxp.com>
Convert to OF_UPSTREAM for i.MX93 11x11 EVK.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 +++++++++++
arch/arm/dts/imx93-11x11-evk.dts | 322 -------------------------------
arch/arm/dts/imx93-u-boot.dtsi | 15 ++
arch/arm/mach-imx/imx9/Kconfig | 1 +
configs/imx93_11x11_evk_defconfig | 2 +-
configs/imx93_11x11_evk_ld_defconfig | 2 +-
7 files changed, 136 insertions(+), 325 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c9..71c2facfb5e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1115,7 +1115,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-librem5-r4.dtb
dtb-$(CONFIG_ARCH_IMX9) += \
- imx93-11x11-evk.dtb \
imx93-var-som-symphony.dtb \
imx93-phyboard-segin.dtb
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb4..408e601bc90 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -26,6 +26,111 @@
bootph-pre-ram;
};
+&lpi2c2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_lpi2c2>;
+ pinctrl-1 = <&pinctrl_lpi2c2>;
+ status = "okay";
+
+ pmic@25 {
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ interrupt-parent = <&pcal6524>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-name = "BUCK1";
+ regulator-min-microvolt = <650000>;
+ regulator-max-microvolt = <2237500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "BUCK2";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4{
+ regulator-name = "BUCK4";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5{
+ regulator-name = "BUCK5";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "BUCK6";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+ regulator-name = "LDO1";
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4: LDO4 {
+ regulator-name = "LDO4";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5: LDO5 {
+ regulator-name = "LDO5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+
+ pcal6524: gpio@22 {
+ compatible = "nxp,pcal6524";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcal6524>;
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ adp5585gpio: gpio@34 {
+ compatible = "adp5585";
+ reg = <0x34>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
&aips1 {
bootph-pre-ram;
bootph-all;
@@ -44,6 +149,19 @@
&iomuxc {
bootph-pre-ram;
bootph-some-ram;
+
+ pinctrl_lpi2c2: lpi2c2grp {
+ fsl,pins = <
+ MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
+ MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
+ >;
+ };
+
+ pinctrl_pcal6524: pcal6524grp {
+ fsl,pins = <
+ MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e
+ >;
+ };
};
®_usdhc2_vmmc {
diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts
deleted file mode 100644
index 4322cc3e11b..00000000000
--- a/arch/arm/dts/imx93-11x11-evk.dts
+++ /dev/null
@@ -1,322 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 NXP
- */
-
-/dts-v1/;
-
-#include "imx93.dtsi"
-
-/ {
- model = "NXP i.MX93 11X11 EVK board";
- compatible = "fsl,imx93-11x11-evk", "fsl,imx93";
-
- chosen {
- stdout-path = &lpuart1;
- };
-
- reg_vref_1v8: regulator-adc-vref {
- compatible = "regulator-fixed";
- regulator-name = "vref_1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-&adc1 {
- vref-supply = <®_vref_1v8>;
- status = "okay";
-};
-
-&mu1 {
- status = "okay";
-};
-
-&mu2 {
- status = "okay";
-};
-
-&eqos {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_eqos>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy1>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
- clock-frequency = <5000000>;
-
- ethphy1: ethernet-phy@1 {
- reg = <1>;
- eee-broken-1000t;
- };
- };
-};
-
-&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_fec>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy2>;
- fsl,magic-packet;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- clock-frequency = <5000000>;
-
- ethphy2: ethernet-phy@2 {
- reg = <2>;
- eee-broken-1000t;
- };
- };
-};
-
-&lpi2c2 {
- #address-cells = <1>;
- #size-cells = <0>;
- clock-frequency = <400000>;
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pinctrl_lpi2c2>;
- pinctrl-1 = <&pinctrl_lpi2c2>;
- status = "okay";
-
- pmic@25 {
- compatible = "nxp,pca9451a";
- reg = <0x25>;
- interrupt-parent = <&pcal6524>;
- interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
-
- regulators {
- buck1: BUCK1 {
- regulator-name = "BUCK1";
- regulator-min-microvolt = <650000>;
- regulator-max-microvolt = <2237500>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <3125>;
- };
-
- buck2: BUCK2 {
- regulator-name = "BUCK2";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <2187500>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <3125>;
- };
-
- buck4: BUCK4{
- regulator-name = "BUCK4";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <3400000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck5: BUCK5{
- regulator-name = "BUCK5";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <3400000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck6: BUCK6 {
- regulator-name = "BUCK6";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <3400000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo1: LDO1 {
- regulator-name = "LDO1";
- regulator-min-microvolt = <1600000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo4: LDO4 {
- regulator-name = "LDO4";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo5: LDO5 {
- regulator-name = "LDO5";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
- };
- };
-
- pcal6524: gpio@22 {
- compatible = "nxp,pcal6524";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcal6524>;
- reg = <0x22>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupt-parent = <&gpio3>;
- interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
- };
-
- adp5585gpio: gpio@34 {
- compatible = "adp5585";
- reg = <0x34>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-};
-
-&lpuart1 { /* console */
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- status = "okay";
-};
-
-&usdhc1 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1>;
- pinctrl-2 = <&pinctrl_usdhc1>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&usdhc2 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
- pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
- pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
- cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
- vmmc-supply = <®_usdhc2_vmmc>;
- bus-width = <4>;
- status = "okay";
- no-sdio;
- no-mmc;
-};
-
-&iomuxc {
- pinctrl_lpi2c2: lpi2c2grp {
- fsl,pins = <
- MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
- MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
- >;
- };
-
- pinctrl_pcal6524: pcal6524grp {
- fsl,pins = <
- MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e
- >;
- };
-
- pinctrl_eqos: eqosgrp {
- fsl,pins = <
- MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e
- MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e
- MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e
- MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e
- MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e
- MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e
- MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x5fe
- MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e
- MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e
- MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e
- MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e
- MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e
- MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x5fe
- MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e
- >;
- };
-
- pinctrl_fec: fecgrp {
- fsl,pins = <
- MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e
- MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x57e
- MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e
- MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e
- MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e
- MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e
- MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x5fe
- MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
- MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e
- MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e
- MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e
- MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e
- MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x5fe
- MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
- MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe
- MX93_PAD_SD1_CMD__USDHC1_CMD 0x13fe
- MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe
- MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe
- MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe
- MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe
- MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe
- MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe
- MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe
- MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe
- MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe
- >;
- };
-
- pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
- fsl,pins = <
- MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e
- >;
- };
-
- pinctrl_usdhc2_gpio: usdhc2gpiogrp {
- fsl,pins = <
- MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
- >;
- };
-
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe
- MX93_PAD_SD2_CMD__USDHC2_CMD 0x13fe
- MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe
- MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe
- MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe
- MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe
- MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
- >;
- };
-};
diff --git a/arch/arm/dts/imx93-u-boot.dtsi b/arch/arm/dts/imx93-u-boot.dtsi
index 40e17bbc5ae..289aba17584 100644
--- a/arch/arm/dts/imx93-u-boot.dtsi
+++ b/arch/arm/dts/imx93-u-boot.dtsi
@@ -86,3 +86,18 @@
};
};
};
+
+&tmu {
+ compatible = "fsl,imx93-tmu";
+ reg = <0x44482000 0x1000>;
+ clocks = <&clk IMX93_CLK_TMC_GATE>;
+ little-endian;
+ fsl,tmu-calibration = <0x0000000e 0x800000da
+ 0x00000029 0x800000e9
+ 0x00000056 0x80000102
+ 0x000000a2 0x8000012a
+ 0x00000116 0x80000166
+ 0x00000195 0x800001a7
+ 0x000001b2 0x800001b6>;
+ #thermal-sensor-cells = <1>;
+};
diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig
index b79485f1f75..e892da80fe8 100644
--- a/arch/arm/mach-imx/imx9/Kconfig
+++ b/arch/arm/mach-imx/imx9/Kconfig
@@ -31,6 +31,7 @@ choice
config TARGET_IMX93_11X11_EVK
bool "imx93_11x11_evk"
select IMX93
+ imply OF_UPSTREAM
config TARGET_IMX93_VAR_SOM
bool "imx93_var_som"
diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig
index 63613477c7f..a671de7ca40 100644
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -10,7 +10,7 @@ CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x700000
CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx93-11x11-evk"
CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_TARGET_IMX93_11X11_EVK=y
CONFIG_SYS_MONITOR_LEN=524288
diff --git a/configs/imx93_11x11_evk_ld_defconfig b/configs/imx93_11x11_evk_ld_defconfig
index 4e3bbdd0cf5..4e1f162e35a 100644
--- a/configs/imx93_11x11_evk_ld_defconfig
+++ b/configs/imx93_11x11_evk_ld_defconfig
@@ -10,7 +10,7 @@ CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x400000
CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx93-11x11-evk"
CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_IMX9_LOW_DRIVE_MODE=y
CONFIG_TARGET_IMX93_11X11_EVK=y
--
2.35.3
^ permalink raw reply related [flat|nested] 13+ messages in thread
* RE: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
2024-03-28 0:44 ` Fabio Estevam
@ 2024-03-28 1:46 ` Peng Fan
0 siblings, 0 replies; 13+ messages in thread
From: Peng Fan @ 2024-03-28 1:46 UTC (permalink / raw)
To: Fabio Estevam
Cc: Peng Fan (OSS),
Stefano Babic, dl-uboot-imx, Sumit Garg, Tom Rini, u-boot
> Subject: Re: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to
> OF_UPSTREAM
>
> Hi Peng,
>
> On Wed, Mar 27, 2024 at 9:40 PM Peng Fan <peng.fan@nxp.com> wrote:
>
> > I could help convert all imx93 boards, but I could only test nxp
> > imx93 boards, not able to test others.
>
> Just copy the board maintainers in your patch and they could help test the
> conversion to OF_UPSTREAM.
ok, I need use v6.9-rc1-dts for the dts upstream. Some dts not in v6.8-dts.
Thanks,
Peng.
>
> Thanks!
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM
2024-03-28 0:13 ` Fabio Estevam
2024-03-28 0:40 ` Peng Fan
@ 2024-03-28 1:55 ` Peng Fan
1 sibling, 0 replies; 13+ messages in thread
From: Peng Fan @ 2024-03-28 1:55 UTC (permalink / raw)
To: Fabio Estevam, Peng Fan (OSS)
Cc: Stefano Babic, dl-uboot-imx, Sumit Garg, Tom Rini, u-boot
> Subject: Re: [PATCH v3 6/6] imx: imx93-11x11-evk: convert to
> OF_UPSTREAM
>
> On Wed, Mar 27, 2024 at 8:53 PM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
>
> > +&lpi2c2 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + clock-frequency = <400000>;
> > + pinctrl-names = "default", "sleep";
> > + pinctrl-0 = <&pinctrl_lpi2c2>;
> > + pinctrl-1 = <&pinctrl_lpi2c2>;
> > + status = "okay";
> > +
> > + pmic@25 {
> ....
> > + adp5585gpio: gpio@34 {
> > + compatible = "adp5585";
> > + reg = <0x34>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
>
> Please add a comment saying these nodes are already available in 6.9-rc1.
Just gave a check on linux-next/master, the nodes are not there.
Thanks,
Peng
>
> > --- a/arch/arm/mach-imx/imx9/Kconfig
> > +++ b/arch/arm/mach-imx/imx9/Kconfig
> > @@ -31,6 +31,7 @@ choice
> > config TARGET_IMX93_11X11_EVK
> > bool "imx93_11x11_evk"
> > select IMX93
> > + imply OF_UPSTREAM
>
> Sumit and I asked you to add OF_UPSTREAM to all imx93 boards, not just this
> one.
>
> Please don't ignore review comments.
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2024-03-28 1:55 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-03-28 0:52 [PATCH v3 0/6] imx93-11x11-evk: convert to OF_UPSTREAM Peng Fan (OSS)
2024-03-28 0:52 ` [PATCH v3 1/6] gpio: imx_rgpio2p: support one address Peng Fan (OSS)
2024-03-28 0:52 ` [PATCH v3 2/6] serial: lpuart: use ipg clk for i.MX7ULP Peng Fan (OSS)
2024-03-28 0:09 ` Fabio Estevam
2024-03-28 0:53 ` [PATCH v3 3/6] cpu: drop imx9_cpu Peng Fan (OSS)
2024-03-28 0:53 ` [PATCH v3 4/6] clk: imx93: fix anatop base Peng Fan (OSS)
2024-03-28 0:53 ` [PATCH v3 5/6] dt-bindings: imx93: sync clock header Peng Fan (OSS)
2024-03-28 0:53 ` [PATCH v3 6/6] imx: imx93-11x11-evk: convert to OF_UPSTREAM Peng Fan (OSS)
2024-03-28 0:13 ` Fabio Estevam
2024-03-28 0:40 ` Peng Fan
2024-03-28 0:44 ` Fabio Estevam
2024-03-28 1:46 ` Peng Fan
2024-03-28 1:55 ` Peng Fan
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