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* [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9
@ 2024-04-17  2:17 Anshuman Khandual
  2024-04-17  2:17   ` Anshuman Khandual
                   ` (4 more replies)
  0 siblings, 5 replies; 12+ messages in thread
From: Anshuman Khandual @ 2024-04-17  2:17 UTC (permalink / raw)
  To: linux-arm-kernel, catalin.marinas; +Cc: Anshuman Khandual

This series adds relevant registers and their fields which are required for
enabling FEAT_Debugv8p9. These patches have been split out from the earlier
series discussed below. This series applies on v6.9-rc4

https://lore.kernel.org/all/20240405080008.1225223-1-anshuman.khandual@arm.com/

Changes from RFC:

- Updated the document number from DDI0601 2023-12 to 2024-03

Anshuman Khandual (4):
  arm64/sysreg: Add register fields for MDSELR_EL1
  arm64/sysreg: Add register fields for HDFGRTR2_EL2
  arm64/sysreg: Add register fields for HDFGWTR2_EL2
  arm64/sysreg: Update ID_AA64MMFR0_EL1 register

 arch/arm64/tools/sysreg | 68 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)

-- 
2.25.1


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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 12+ messages in thread
* [PATCH 1/4] arm64/sysreg: Add register fields for MDSELR_EL1
  2024-04-17  2:17 [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9 Anshuman Khandual
@ 2024-04-17  2:17   ` Anshuman Khandual
  2024-04-17  2:17   ` Anshuman Khandual
                     ` (3 subsequent siblings)
  4 siblings, 0 replies; 12+ messages in thread
From: Anshuman Khandual @ 2024-04-17  2:17 UTC (permalink / raw)
  To: linux-arm-kernel, catalin.marinas
  Cc: Anshuman Khandual, Will Deacon, Mark Brown, linux-kernel

This adds register fields for MDSELR_EL1 as per the definitions based
on DDI0601 2024-03.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index a4c1dd4741a4..4c58fd7a70e6 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -93,6 +93,17 @@ Res0	63:32
 Field	31:0	DTRTX
 EndSysreg
 
+Sysreg	MDSELR_EL1	2	0	0	4	2
+Res0	63:6
+Enum	5:4	BANK
+	0b00	BANK_0
+	0b01	BANK_1
+	0b10	BANK_2
+	0b11	BANK_3
+EndEnum
+Res0	3:0
+EndSysreg
+
 Sysreg	OSECCR_EL1	2	0	0	6	2
 Res0	63:32
 Field	31:0	EDECCR
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 12+ messages in thread
* [PATCH 1/4] arm64/sysreg: Add register fields for MDSELR_EL1
@ 2024-04-17  2:17   ` Anshuman Khandual
  0 siblings, 0 replies; 12+ messages in thread
From: Anshuman Khandual @ 2024-04-17  2:17 UTC (permalink / raw)
  To: linux-arm-kernel, catalin.marinas
  Cc: Anshuman Khandual, Will Deacon, Mark Brown, linux-kernel

This adds register fields for MDSELR_EL1 as per the definitions based
on DDI0601 2024-03.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index a4c1dd4741a4..4c58fd7a70e6 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -93,6 +93,17 @@ Res0	63:32
 Field	31:0	DTRTX
 EndSysreg
 
+Sysreg	MDSELR_EL1	2	0	0	4	2
+Res0	63:6
+Enum	5:4	BANK
+	0b00	BANK_0
+	0b01	BANK_1
+	0b10	BANK_2
+	0b11	BANK_3
+EndEnum
+Res0	3:0
+EndSysreg
+
 Sysreg	OSECCR_EL1	2	0	0	6	2
 Res0	63:32
 Field	31:0	EDECCR
-- 
2.25.1


_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 12+ messages in thread
* [PATCH 2/4] arm64/sysreg: Add register fields for HDFGRTR2_EL2
  2024-04-17  2:17 [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9 Anshuman Khandual
@ 2024-04-17  2:17   ` Anshuman Khandual
  2024-04-17  2:17   ` Anshuman Khandual
                     ` (3 subsequent siblings)
  4 siblings, 0 replies; 12+ messages in thread
From: Anshuman Khandual @ 2024-04-17  2:17 UTC (permalink / raw)
  To: linux-arm-kernel, catalin.marinas
  Cc: Anshuman Khandual, Will Deacon, Mark Brown, linux-kernel

This adds register fields for HDFGRTR2_EL2 as per the definitions based
on DDI0601 2024-03.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 4c58fd7a70e6..9bcd8a0d55c4 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2444,6 +2444,34 @@ Field	1	ICIALLU
 Field	0	ICIALLUIS
 EndSysreg
 
+Sysreg HDFGRTR2_EL2	3	4	3	1	0
+Res0	63:24
+Field	23 nMDSTEPOP_EL1
+Field	22 nTRBMPAM_EL1
+Res0	21
+Field	20 nTRCITECR_EL1
+Field	19 nPMSDSFR_EL1
+Field	18 nSPMDEVAFF_EL1
+Field	17 nSPMID
+Field	16 nSPMSCR_EL1
+Field	15 nSPMACCESSR_EL1
+Field	14 nSPMCR_EL0
+Field	13 nSPMOVS
+Field	12 nSPMINTEN
+Field	11 nSPMCNTEN
+Field	10 nSPMSELR_EL0
+Field	9 nSPMEVTYPERn_EL0
+Field	8 nSPMEVCNTRn_EL0
+Field	7 nPMSSCR_EL1
+Field	6 nPMSSDATA
+Field	5 nMDSELR_EL1
+Field	4 nPMUACR_EL1
+Field	3 nPMICFILTR_EL0
+Field	2 nPMICNTR_EL0
+Field	1 nPMIAR_EL1
+Field	0 nPMECR_EL1
+EndSysreg
+
 Sysreg HDFGRTR_EL2	3	4	3	1	4
 Field	63	PMBIDR_EL1
 Field	62	nPMSNEVFR_EL1
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 12+ messages in thread
* [PATCH 2/4] arm64/sysreg: Add register fields for HDFGRTR2_EL2
@ 2024-04-17  2:17   ` Anshuman Khandual
  0 siblings, 0 replies; 12+ messages in thread
From: Anshuman Khandual @ 2024-04-17  2:17 UTC (permalink / raw)
  To: linux-arm-kernel, catalin.marinas
  Cc: Anshuman Khandual, Will Deacon, Mark Brown, linux-kernel

This adds register fields for HDFGRTR2_EL2 as per the definitions based
on DDI0601 2024-03.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 4c58fd7a70e6..9bcd8a0d55c4 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2444,6 +2444,34 @@ Field	1	ICIALLU
 Field	0	ICIALLUIS
 EndSysreg
 
+Sysreg HDFGRTR2_EL2	3	4	3	1	0
+Res0	63:24
+Field	23 nMDSTEPOP_EL1
+Field	22 nTRBMPAM_EL1
+Res0	21
+Field	20 nTRCITECR_EL1
+Field	19 nPMSDSFR_EL1
+Field	18 nSPMDEVAFF_EL1
+Field	17 nSPMID
+Field	16 nSPMSCR_EL1
+Field	15 nSPMACCESSR_EL1
+Field	14 nSPMCR_EL0
+Field	13 nSPMOVS
+Field	12 nSPMINTEN
+Field	11 nSPMCNTEN
+Field	10 nSPMSELR_EL0
+Field	9 nSPMEVTYPERn_EL0
+Field	8 nSPMEVCNTRn_EL0
+Field	7 nPMSSCR_EL1
+Field	6 nPMSSDATA
+Field	5 nMDSELR_EL1
+Field	4 nPMUACR_EL1
+Field	3 nPMICFILTR_EL0
+Field	2 nPMICNTR_EL0
+Field	1 nPMIAR_EL1
+Field	0 nPMECR_EL1
+EndSysreg
+
 Sysreg HDFGRTR_EL2	3	4	3	1	4
 Field	63	PMBIDR_EL1
 Field	62	nPMSNEVFR_EL1
-- 
2.25.1


_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 12+ messages in thread
* [PATCH 3/4] arm64/sysreg: Add register fields for HDFGWTR2_EL2
  2024-04-17  2:17 [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9 Anshuman Khandual
@ 2024-04-17  2:17   ` Anshuman Khandual
  2024-04-17  2:17   ` Anshuman Khandual
                     ` (3 subsequent siblings)
  4 siblings, 0 replies; 12+ messages in thread
From: Anshuman Khandual @ 2024-04-17  2:17 UTC (permalink / raw)
  To: linux-arm-kernel, catalin.marinas
  Cc: Anshuman Khandual, Will Deacon, Mark Brown, linux-kernel

This adds register fields for HDFGWTR2_EL2 as per the definitions based
on DDI0601 2024-03.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 9bcd8a0d55c4..c38414352dd8 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2472,6 +2472,33 @@ Field	1 nPMIAR_EL1
 Field	0 nPMECR_EL1
 EndSysreg
 
+Sysreg HDFGWTR2_EL2	3	4	3	1	1
+Res0	63:24
+Field	23 nMDSTEPOP_EL1
+Field	22 nTRBMPAM_EL1
+Field	21 nPMZR_EL0
+Field	20 nTRCITECR_EL1
+Field	19 nPMSDSFR_EL1
+Res0	18:17
+Field	16 nSPMSCR_EL1
+Field	15 nSPMACCESSR_EL1
+Field	14 nSPMCR_EL0
+Field	13 nSPMOVS
+Field	12 nSPMINTEN
+Field	11 nSPMCNTEN
+Field	10 nSPMSELR_EL0
+Field	9 nSPMEVTYPERn_EL0
+Field	8 nSPMEVCNTRn_EL0
+Field	7 nPMSSCR_EL1
+Res0	6
+Field	5 nMDSELR_EL1
+Field	4 nPMUACR_EL1
+Field	3 nPMICFILTR_EL0
+Field	2 nPMICNTR_EL0
+Field	1 nPMIAR_EL1
+Field	0 nPMECR_EL1
+EndSysreg
+
 Sysreg HDFGRTR_EL2	3	4	3	1	4
 Field	63	PMBIDR_EL1
 Field	62	nPMSNEVFR_EL1
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 12+ messages in thread
* [PATCH 3/4] arm64/sysreg: Add register fields for HDFGWTR2_EL2
@ 2024-04-17  2:17   ` Anshuman Khandual
  0 siblings, 0 replies; 12+ messages in thread
From: Anshuman Khandual @ 2024-04-17  2:17 UTC (permalink / raw)
  To: linux-arm-kernel, catalin.marinas
  Cc: Anshuman Khandual, Will Deacon, Mark Brown, linux-kernel

This adds register fields for HDFGWTR2_EL2 as per the definitions based
on DDI0601 2024-03.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 9bcd8a0d55c4..c38414352dd8 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2472,6 +2472,33 @@ Field	1 nPMIAR_EL1
 Field	0 nPMECR_EL1
 EndSysreg
 
+Sysreg HDFGWTR2_EL2	3	4	3	1	1
+Res0	63:24
+Field	23 nMDSTEPOP_EL1
+Field	22 nTRBMPAM_EL1
+Field	21 nPMZR_EL0
+Field	20 nTRCITECR_EL1
+Field	19 nPMSDSFR_EL1
+Res0	18:17
+Field	16 nSPMSCR_EL1
+Field	15 nSPMACCESSR_EL1
+Field	14 nSPMCR_EL0
+Field	13 nSPMOVS
+Field	12 nSPMINTEN
+Field	11 nSPMCNTEN
+Field	10 nSPMSELR_EL0
+Field	9 nSPMEVTYPERn_EL0
+Field	8 nSPMEVCNTRn_EL0
+Field	7 nPMSSCR_EL1
+Res0	6
+Field	5 nMDSELR_EL1
+Field	4 nPMUACR_EL1
+Field	3 nPMICFILTR_EL0
+Field	2 nPMICNTR_EL0
+Field	1 nPMIAR_EL1
+Field	0 nPMECR_EL1
+EndSysreg
+
 Sysreg HDFGRTR_EL2	3	4	3	1	4
 Field	63	PMBIDR_EL1
 Field	62	nPMSNEVFR_EL1
-- 
2.25.1


_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 12+ messages in thread
* [PATCH 4/4] arm64/sysreg: Update ID_AA64MMFR0_EL1 register
  2024-04-17  2:17 [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9 Anshuman Khandual
@ 2024-04-17  2:17   ` Anshuman Khandual
  2024-04-17  2:17   ` Anshuman Khandual
                     ` (3 subsequent siblings)
  4 siblings, 0 replies; 12+ messages in thread
From: Anshuman Khandual @ 2024-04-17  2:17 UTC (permalink / raw)
  To: linux-arm-kernel, catalin.marinas
  Cc: Anshuman Khandual, Will Deacon, Mark Brown, linux-kernel

This updates ID_AA64MMFR0_EL1.FGT and ID_AA64MMFR0_EL1.PARANGE register
fields as per the definitions based on DDI0601 2024-03.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index c38414352dd8..7ba4fa99c160 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -1567,6 +1567,7 @@ EndEnum
 UnsignedEnum	59:56	FGT
 	0b0000	NI
 	0b0001	IMP
+	0b0010	FGT2
 EndEnum
 Res0	55:48
 UnsignedEnum	47:44	EXS
@@ -1628,6 +1629,7 @@ Enum	3:0	PARANGE
 	0b0100	44
 	0b0101	48
 	0b0110	52
+	0b0111	56
 EndEnum
 EndSysreg
 
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 12+ messages in thread
* [PATCH 4/4] arm64/sysreg: Update ID_AA64MMFR0_EL1 register
@ 2024-04-17  2:17   ` Anshuman Khandual
  0 siblings, 0 replies; 12+ messages in thread
From: Anshuman Khandual @ 2024-04-17  2:17 UTC (permalink / raw)
  To: linux-arm-kernel, catalin.marinas
  Cc: Anshuman Khandual, Will Deacon, Mark Brown, linux-kernel

This updates ID_AA64MMFR0_EL1.FGT and ID_AA64MMFR0_EL1.PARANGE register
fields as per the definitions based on DDI0601 2024-03.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index c38414352dd8..7ba4fa99c160 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -1567,6 +1567,7 @@ EndEnum
 UnsignedEnum	59:56	FGT
 	0b0000	NI
 	0b0001	IMP
+	0b0010	FGT2
 EndEnum
 Res0	55:48
 UnsignedEnum	47:44	EXS
@@ -1628,6 +1629,7 @@ Enum	3:0	PARANGE
 	0b0100	44
 	0b0101	48
 	0b0110	52
+	0b0111	56
 EndEnum
 EndSysreg
 
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9
  2024-04-17  2:17 [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9 Anshuman Khandual
                   ` (3 preceding siblings ...)
  2024-04-17  2:17   ` Anshuman Khandual
@ 2024-04-29  1:56 ` Anshuman Khandual
  2024-04-30 12:27   ` Will Deacon
  4 siblings, 1 reply; 12+ messages in thread
From: Anshuman Khandual @ 2024-04-29  1:56 UTC (permalink / raw)
  To: linux-arm-kernel, catalin.marinas

On 4/17/24 07:47, Anshuman Khandual wrote:
> This series adds relevant registers and their fields which are required for
> enabling FEAT_Debugv8p9. These patches have been split out from the earlier
> series discussed below. This series applies on v6.9-rc4
> 
> https://lore.kernel.org/all/20240405080008.1225223-1-anshuman.khandual@arm.com/
> 
> Changes from RFC:
> 
> - Updated the document number from DDI0601 2023-12 to 2024-03
> 
> Anshuman Khandual (4):
>   arm64/sysreg: Add register fields for MDSELR_EL1
>   arm64/sysreg: Add register fields for HDFGRTR2_EL2
>   arm64/sysreg: Add register fields for HDFGWTR2_EL2
>   arm64/sysreg: Update ID_AA64MMFR0_EL1 register
> 
>  arch/arm64/tools/sysreg | 68 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 68 insertions(+)
> 

Gentle ping, any updates on this series ?

_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9
  2024-04-29  1:56 ` [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9 Anshuman Khandual
@ 2024-04-30 12:27   ` Will Deacon
  2024-04-30 12:38     ` Anshuman Khandual
  0 siblings, 1 reply; 12+ messages in thread
From: Will Deacon @ 2024-04-30 12:27 UTC (permalink / raw)
  To: Anshuman Khandual; +Cc: linux-arm-kernel, catalin.marinas

On Mon, Apr 29, 2024 at 07:26:34AM +0530, Anshuman Khandual wrote:
> On 4/17/24 07:47, Anshuman Khandual wrote:
> > This series adds relevant registers and their fields which are required for
> > enabling FEAT_Debugv8p9. These patches have been split out from the earlier
> > series discussed below. This series applies on v6.9-rc4
> > 
> > https://lore.kernel.org/all/20240405080008.1225223-1-anshuman.khandual@arm.com/
> > 
> > Changes from RFC:
> > 
> > - Updated the document number from DDI0601 2023-12 to 2024-03
> > 
> > Anshuman Khandual (4):
> >   arm64/sysreg: Add register fields for MDSELR_EL1
> >   arm64/sysreg: Add register fields for HDFGRTR2_EL2
> >   arm64/sysreg: Add register fields for HDFGWTR2_EL2
> >   arm64/sysreg: Update ID_AA64MMFR0_EL1 register
> > 
> >  arch/arm64/tools/sysreg | 68 +++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 68 insertions(+)
> > 
> 
> Gentle ping, any updates on this series ?

Not sure why you dropped me from cc but, as with your other change [1],
I don't see the point in taking these on their own. Just keep them with
your hw_breakpoint series [2] when you post a new version taking into
account the feedback from Marc.

Will

[1] https://lore.kernel.org/all/20240419021325.2880384-1-anshuman.khandual@arm.com/
[2] https://lore.kernel.org/all/20240405080008.1225223-1-anshuman.khandual@arm.com/

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^ permalink raw reply	[flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9
  2024-04-30 12:27   ` Will Deacon
@ 2024-04-30 12:38     ` Anshuman Khandual
  0 siblings, 0 replies; 12+ messages in thread
From: Anshuman Khandual @ 2024-04-30 12:38 UTC (permalink / raw)
  To: Will Deacon; +Cc: linux-arm-kernel, catalin.marinas



On 4/30/24 17:57, Will Deacon wrote:
> On Mon, Apr 29, 2024 at 07:26:34AM +0530, Anshuman Khandual wrote:
>> On 4/17/24 07:47, Anshuman Khandual wrote:
>>> This series adds relevant registers and their fields which are required for
>>> enabling FEAT_Debugv8p9. These patches have been split out from the earlier
>>> series discussed below. This series applies on v6.9-rc4
>>>
>>> https://lore.kernel.org/all/20240405080008.1225223-1-anshuman.khandual@arm.com/
>>>
>>> Changes from RFC:
>>>
>>> - Updated the document number from DDI0601 2023-12 to 2024-03
>>>
>>> Anshuman Khandual (4):
>>>   arm64/sysreg: Add register fields for MDSELR_EL1
>>>   arm64/sysreg: Add register fields for HDFGRTR2_EL2
>>>   arm64/sysreg: Add register fields for HDFGWTR2_EL2
>>>   arm64/sysreg: Update ID_AA64MMFR0_EL1 register
>>>
>>>  arch/arm64/tools/sysreg | 68 +++++++++++++++++++++++++++++++++++++++++
>>>  1 file changed, 68 insertions(+)
>>>
>>
>> Gentle ping, any updates on this series ?
> 
> Not sure why you dropped me from cc but, as with your other change [1],

Ahh that was my bad ! All individual patches here have your email marked in
their CC but then forgot to add the combined email set (what I normally do),
in the cover letter itself, making original --cc-cover pointless. This email
was in response to the cover-letter email thread, thus repeating the same
problem all over again. Apologies for the same.

> I don't see the point in taking these on their own. Just keep them with
> your hw_breakpoint series [2] when you post a new version taking into
> account the feedback from Marc.

Sure, will do that.

> 
> Will
> 
> [1] https://lore.kernel.org/all/20240419021325.2880384-1-anshuman.khandual@arm.com/
> [2] https://lore.kernel.org/all/20240405080008.1225223-1-anshuman.khandual@arm.com/

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^ permalink raw reply	[flat|nested] 12+ messages in thread
end of thread, other threads:[~2024-04-30 12:39 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-04-17  2:17 [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9 Anshuman Khandual
2024-04-17  2:17 ` [PATCH 1/4] arm64/sysreg: Add register fields for MDSELR_EL1 Anshuman Khandual
2024-04-17  2:17   ` Anshuman Khandual
2024-04-17  2:17 ` [PATCH 2/4] arm64/sysreg: Add register fields for HDFGRTR2_EL2 Anshuman Khandual
2024-04-17  2:17   ` Anshuman Khandual
2024-04-17  2:17 ` [PATCH 3/4] arm64/sysreg: Add register fields for HDFGWTR2_EL2 Anshuman Khandual
2024-04-17  2:17   ` Anshuman Khandual
2024-04-17  2:17 ` [PATCH 4/4] arm64/sysreg: Update ID_AA64MMFR0_EL1 register Anshuman Khandual
2024-04-17  2:17   ` Anshuman Khandual
2024-04-29  1:56 ` [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9 Anshuman Khandual
2024-04-30 12:27   ` Will Deacon
2024-04-30 12:38     ` Anshuman Khandual

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