[PATCH 0/4] Add I2C support on TH1520

[PATCH 0/4] Add I2C support on TH1520

[Thomas Bonnefille]

This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
and a default configuration for the BeagleV-Ahead. It appears that the
TH1520 I2C is already supported in the upstream kernel through the
Synopsis Designware I2C adapter driver.
As there is no clock driver for this board as of today, this patch
series uses a fixed-clock named i2c_ic_clk.
There is also no pinctrl driver yet so pinmux must be handled manually
for now.
It also fixes the order of the nodes in the device tree to comply with
device-tree coding-style.

Thomas Bonnefille (4):
  dt-bindings: i2c: dw: Document compatible thead,th1520-i2c
  riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
  riscv: dts: thead: Add TH1520 I2C nodes
  riscv: dts: thead: Enable I2C on the BeagleV-Ahead

 .../bindings/i2c/snps,designware-i2c.yaml     |  12 ++
 .../boot/dts/thead/th1520-beaglev-ahead.dts   |  22 ++++
 arch/riscv/boot/dts/thead/th1520.dtsi         | 120 ++++++++++++++----
 3 files changed, 127 insertions(+), 27 deletions(-)

-- 
2.44.0

[PATCH 0/4] Add I2C support on TH1520

[Thomas Bonnefille]

This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
and a default configuration for the BeagleV-Ahead. It appears that the
TH1520 I2C is already supported in the upstream kernel through the
Synopsis Designware I2C adapter driver.
As there is no clock driver for this board as of today, this patch
series uses a fixed-clock named i2c_ic_clk.
There is also no pinctrl driver yet so pinmux must be handled manually
for now.
It also fixes the order of the nodes in the device tree to comply with
device-tree coding-style.

Thomas Bonnefille (4):
  dt-bindings: i2c: dw: Document compatible thead,th1520-i2c
  riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
  riscv: dts: thead: Add TH1520 I2C nodes
  riscv: dts: thead: Enable I2C on the BeagleV-Ahead

 .../bindings/i2c/snps,designware-i2c.yaml     |  12 ++
 .../boot/dts/thead/th1520-beaglev-ahead.dts   |  22 ++++
 arch/riscv/boot/dts/thead/th1520.dtsi         | 120 ++++++++++++++----
 3 files changed, 127 insertions(+), 27 deletions(-)

-- 
2.44.0


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[PATCH 1/4] dt-bindings: i2c: dw: Document compatible thead,th1520-i2c

[Thomas Bonnefille]

Add documentation for compatible string thead,th1520-i2c which can be
used specifically for the TH1520 SoC.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 .../devicetree/bindings/i2c/snps,designware-i2c.yaml | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
index d9293c57f573..a7fa191fefd6 100644
--- a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
@@ -33,6 +33,10 @@ properties:
           - const: snps,designware-i2c
       - description: Baikal-T1 SoC System I2C controller
         const: baikal,bt1-sys-i2c
+      - description: T-HEAD TH1520 SoCs I2C controller
+        items:
+          - const: thead,th1520-i2c
+          - const: snps,designware-i2c
 
   reg:
     minItems: 1
@@ -142,4 +146,12 @@ examples:
       interrupts = <8>;
       clocks = <&ahb_clk>;
     };
+  - |
+    i2c@e7f20000 {
+      compatible = "thead,th1520-i2c", "snps,designware-i2c";
+      reg = <0xe7f20000 0x4000>;
+      interrupts = <44>;
+      clocks = <&i2c_ic_clk>;
+      status = "disabled";
+    };
 ...
-- 
2.44.0

[PATCH 1/4] dt-bindings: i2c: dw: Document compatible thead,th1520-i2c

[Thomas Bonnefille]

Add documentation for compatible string thead,th1520-i2c which can be
used specifically for the TH1520 SoC.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 .../devicetree/bindings/i2c/snps,designware-i2c.yaml | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
index d9293c57f573..a7fa191fefd6 100644
--- a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml
@@ -33,6 +33,10 @@ properties:
           - const: snps,designware-i2c
       - description: Baikal-T1 SoC System I2C controller
         const: baikal,bt1-sys-i2c
+      - description: T-HEAD TH1520 SoCs I2C controller
+        items:
+          - const: thead,th1520-i2c
+          - const: snps,designware-i2c
 
   reg:
     minItems: 1
@@ -142,4 +146,12 @@ examples:
       interrupts = <8>;
       clocks = <&ahb_clk>;
     };
+  - |
+    i2c@e7f20000 {
+      compatible = "thead,th1520-i2c", "snps,designware-i2c";
+      reg = <0xe7f20000 0x4000>;
+      interrupts = <44>;
+      clocks = <&i2c_ic_clk>;
+      status = "disabled";
+    };
 ...
-- 
2.44.0


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[PATCH 2/4] riscv: boot: dts: thead: Fix node ordering in TH1520 device tree

[Thomas Bonnefille]

According to the device tree coding style, nodes shall be ordered by
unit address in ascending order.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 arch/riscv/boot/dts/thead/th1520.dtsi | 54 +++++++++++++--------------
 1 file changed, 27 insertions(+), 27 deletions(-)

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index 8b915e206f3a..d2fa25839012 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -193,6 +193,33 @@ uart0: serial@ffe7014000 {
 			status = "disabled";
 		};
 
+		emmc: mmc@ffe7080000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe7080000 0x0 0x10000>;
+			interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
+		sdio0: mmc@ffe7090000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe7090000 0x0 0x10000>;
+			interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
+		sdio1: mmc@ffe70a0000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe70a0000 0x0 0x10000>;
+			interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
 		uart1: serial@ffe7f00000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0xff 0xe7f00000 0x0 0x100>;
@@ -311,33 +338,6 @@ dmac0: dma-controller@ffefc00000 {
 			status = "disabled";
 		};
 
-		emmc: mmc@ffe7080000 {
-			compatible = "thead,th1520-dwcmshc";
-			reg = <0xff 0xe7080000 0x0 0x10000>;
-			interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&sdhci_clk>;
-			clock-names = "core";
-			status = "disabled";
-		};
-
-		sdio0: mmc@ffe7090000 {
-			compatible = "thead,th1520-dwcmshc";
-			reg = <0xff 0xe7090000 0x0 0x10000>;
-			interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&sdhci_clk>;
-			clock-names = "core";
-			status = "disabled";
-		};
-
-		sdio1: mmc@ffe70a0000 {
-			compatible = "thead,th1520-dwcmshc";
-			reg = <0xff 0xe70a0000 0x0 0x10000>;
-			interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&sdhci_clk>;
-			clock-names = "core";
-			status = "disabled";
-		};
-
 		timer0: timer@ffefc32000 {
 			compatible = "snps,dw-apb-timer";
 			reg = <0xff 0xefc32000 0x0 0x14>;
-- 
2.44.0

[PATCH 2/4] riscv: boot: dts: thead: Fix node ordering in TH1520 device tree

[Thomas Bonnefille]

According to the device tree coding style, nodes shall be ordered by
unit address in ascending order.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 arch/riscv/boot/dts/thead/th1520.dtsi | 54 +++++++++++++--------------
 1 file changed, 27 insertions(+), 27 deletions(-)

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index 8b915e206f3a..d2fa25839012 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -193,6 +193,33 @@ uart0: serial@ffe7014000 {
 			status = "disabled";
 		};
 
+		emmc: mmc@ffe7080000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe7080000 0x0 0x10000>;
+			interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
+		sdio0: mmc@ffe7090000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe7090000 0x0 0x10000>;
+			interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
+		sdio1: mmc@ffe70a0000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe70a0000 0x0 0x10000>;
+			interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
 		uart1: serial@ffe7f00000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0xff 0xe7f00000 0x0 0x100>;
@@ -311,33 +338,6 @@ dmac0: dma-controller@ffefc00000 {
 			status = "disabled";
 		};
 
-		emmc: mmc@ffe7080000 {
-			compatible = "thead,th1520-dwcmshc";
-			reg = <0xff 0xe7080000 0x0 0x10000>;
-			interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&sdhci_clk>;
-			clock-names = "core";
-			status = "disabled";
-		};
-
-		sdio0: mmc@ffe7090000 {
-			compatible = "thead,th1520-dwcmshc";
-			reg = <0xff 0xe7090000 0x0 0x10000>;
-			interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&sdhci_clk>;
-			clock-names = "core";
-			status = "disabled";
-		};
-
-		sdio1: mmc@ffe70a0000 {
-			compatible = "thead,th1520-dwcmshc";
-			reg = <0xff 0xe70a0000 0x0 0x10000>;
-			interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&sdhci_clk>;
-			clock-names = "core";
-			status = "disabled";
-		};
-
 		timer0: timer@ffefc32000 {
 			compatible = "snps,dw-apb-timer";
 			reg = <0xff 0xefc32000 0x0 0x14>;
-- 
2.44.0


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[PATCH 3/4] riscv: dts: thead: Add TH1520 I2C nodes

[Thomas Bonnefille]

Add nodes for the five I2C on the T-Head TH1520 RISCV SoC.
All the I2C nodes are fed with the same clock named i2c_ic_clk.
As there is currently no clock support, the i2c_ic_clk is exposed
through a fixed-clock to mimic the existing nodes.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 arch/riscv/boot/dts/thead/th1520.dtsi | 66 +++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index d2fa25839012..86ae507576dc 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -153,6 +153,12 @@ sdhci_clk: sdhci-clock {
 		#clock-cells = <0>;
 	};
 
+	i2c_ic_clk: i2c-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <50000000>;
+		#clock-cells = <0>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		interrupt-parent = <&plic>;
@@ -258,6 +264,36 @@ portc: gpio-controller@0 {
 			};
 		};
 
+		i2c0: i2c@ffe7f20000 {
+			compatible = "thead,th1520-i2c", "snps,designware-i2c";
+			reg = <0xff 0xe7f20000 0x0 0x4000>;
+			interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_ic_clk>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@ffe7f24000 {
+			compatible = "thead,th1520-i2c", "snps,designware-i2c";
+			reg = <0xff 0xe7f24000 0x0 0x4000>;
+			interrupts = <45 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_ic_clk>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c4: i2c@ffe7f28000 {
+			compatible = "thead,th1520-i2c", "snps,designware-i2c";
+			reg = <0xff 0xe7f28000 0x0 0x4000>;
+			interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_ic_clk>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gpio3: gpio@ffe7f38000 {
 			compatible = "snps,dw-apb-gpio";
 			reg = <0xff 0xe7f38000 0x0 0x1000>;
@@ -312,6 +348,16 @@ portb: gpio-controller@0 {
 			};
 		};
 
+		i2c2: i2c@ffec00c000 {
+			compatible = "thead,th1520-i2c", "snps,designware-i2c";
+			reg = <0xff 0xec00c000 0x0 0x4000>;
+			interrupts = <46 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_ic_clk>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		uart2: serial@ffec010000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0xff 0xec010000 0x0 0x4000>;
@@ -322,6 +368,16 @@ uart2: serial@ffec010000 {
 			status = "disabled";
 		};
 
+		i2c3: i2c@ffec014000 {
+			compatible = "thead,th1520-i2c", "snps,designware-i2c";
+			reg = <0xff 0xec014000 0x0 0x4000>;
+			interrupts = <47 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_ic_clk>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		dmac0: dma-controller@ffefc00000 {
 			compatible = "snps,axi-dma-1.01a";
 			reg = <0xff 0xefc00000 0x0 0x1000>;
@@ -394,6 +450,16 @@ uart5: serial@fff7f0c000 {
 			status = "disabled";
 		};
 
+		i2c5: i2c@fff7f2c000 {
+			compatible = "thead,th1520-i2c", "snps,designware-i2c";
+			reg = <0xff 0xf7f2c000 0x0 0x4000>;
+			interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_ic_clk>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		timer4: timer@ffffc33000 {
 			compatible = "snps,dw-apb-timer";
 			reg = <0xff 0xffc33000 0x0 0x14>;
-- 
2.44.0

[PATCH 3/4] riscv: dts: thead: Add TH1520 I2C nodes

[Thomas Bonnefille]

Add nodes for the five I2C on the T-Head TH1520 RISCV SoC.
All the I2C nodes are fed with the same clock named i2c_ic_clk.
As there is currently no clock support, the i2c_ic_clk is exposed
through a fixed-clock to mimic the existing nodes.

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 arch/riscv/boot/dts/thead/th1520.dtsi | 66 +++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index d2fa25839012..86ae507576dc 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -153,6 +153,12 @@ sdhci_clk: sdhci-clock {
 		#clock-cells = <0>;
 	};
 
+	i2c_ic_clk: i2c-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <50000000>;
+		#clock-cells = <0>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		interrupt-parent = <&plic>;
@@ -258,6 +264,36 @@ portc: gpio-controller@0 {
 			};
 		};
 
+		i2c0: i2c@ffe7f20000 {
+			compatible = "thead,th1520-i2c", "snps,designware-i2c";
+			reg = <0xff 0xe7f20000 0x0 0x4000>;
+			interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_ic_clk>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@ffe7f24000 {
+			compatible = "thead,th1520-i2c", "snps,designware-i2c";
+			reg = <0xff 0xe7f24000 0x0 0x4000>;
+			interrupts = <45 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_ic_clk>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c4: i2c@ffe7f28000 {
+			compatible = "thead,th1520-i2c", "snps,designware-i2c";
+			reg = <0xff 0xe7f28000 0x0 0x4000>;
+			interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_ic_clk>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gpio3: gpio@ffe7f38000 {
 			compatible = "snps,dw-apb-gpio";
 			reg = <0xff 0xe7f38000 0x0 0x1000>;
@@ -312,6 +348,16 @@ portb: gpio-controller@0 {
 			};
 		};
 
+		i2c2: i2c@ffec00c000 {
+			compatible = "thead,th1520-i2c", "snps,designware-i2c";
+			reg = <0xff 0xec00c000 0x0 0x4000>;
+			interrupts = <46 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_ic_clk>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		uart2: serial@ffec010000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0xff 0xec010000 0x0 0x4000>;
@@ -322,6 +368,16 @@ uart2: serial@ffec010000 {
 			status = "disabled";
 		};
 
+		i2c3: i2c@ffec014000 {
+			compatible = "thead,th1520-i2c", "snps,designware-i2c";
+			reg = <0xff 0xec014000 0x0 0x4000>;
+			interrupts = <47 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_ic_clk>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		dmac0: dma-controller@ffefc00000 {
 			compatible = "snps,axi-dma-1.01a";
 			reg = <0xff 0xefc00000 0x0 0x1000>;
@@ -394,6 +450,16 @@ uart5: serial@fff7f0c000 {
 			status = "disabled";
 		};
 
+		i2c5: i2c@fff7f2c000 {
+			compatible = "thead,th1520-i2c", "snps,designware-i2c";
+			reg = <0xff 0xf7f2c000 0x0 0x4000>;
+			interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_ic_clk>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		timer4: timer@ffffc33000 {
 			compatible = "snps,dw-apb-timer";
 			reg = <0xff 0xffc33000 0x0 0x14>;
-- 
2.44.0


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[PATCH 4/4] riscv: dts: thead: Enable I2C on the BeagleV-Ahead

[Thomas Bonnefille]

This commit enables the I2C0 controller of the TH1520, together with
the FT24C32A EEPROM that is connected to it.
In addition, this commit also enables the I2C controllers I2C2, I2C4
and I2C5 as they are all three exposed on headers (P9 19 and 20 for I2C2,
P9 17 and 18 for I2C5 and MikroBus 7 and 5 for I2C4).

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 .../boot/dts/thead/th1520-beaglev-ahead.dts   | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
index d9b4de9e4757..22a6935e7204 100644
--- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
+++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
@@ -79,3 +79,25 @@ &sdio0 {
 &uart0 {
 	status = "okay";
 };
+
+&i2c0 {
+	status = "okay";
+	clock-frequency = <100000>;
+
+	eeprom: eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+	};
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c4 {
+	status = "okay";
+};
+
+&i2c5 {
+	status = "okay";
+};
-- 
2.44.0

[PATCH 4/4] riscv: dts: thead: Enable I2C on the BeagleV-Ahead

[Thomas Bonnefille]

This commit enables the I2C0 controller of the TH1520, together with
the FT24C32A EEPROM that is connected to it.
In addition, this commit also enables the I2C controllers I2C2, I2C4
and I2C5 as they are all three exposed on headers (P9 19 and 20 for I2C2,
P9 17 and 18 for I2C5 and MikroBus 7 and 5 for I2C4).

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
 .../boot/dts/thead/th1520-beaglev-ahead.dts   | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
index d9b4de9e4757..22a6935e7204 100644
--- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
+++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
@@ -79,3 +79,25 @@ &sdio0 {
 &uart0 {
 	status = "okay";
 };
+
+&i2c0 {
+	status = "okay";
+	clock-frequency = <100000>;
+
+	eeprom: eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+	};
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c4 {
+	status = "okay";
+};
+
+&i2c5 {
+	status = "okay";
+};
-- 
2.44.0


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Re: [PATCH 0/4] Add I2C support on TH1520

[Conor Dooley]

[-- Attachment #1.1: Type: text/plain, Size: 866 bytes --]

On Thu, Apr 25, 2024 at 10:21:31AM +0200, Thomas Bonnefille wrote:
> This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
> and a default configuration for the BeagleV-Ahead. It appears that the
> TH1520 I2C is already supported in the upstream kernel through the
> Synopsis Designware I2C adapter driver.

> As there is no clock driver for this board as of today, this patch
> series uses a fixed-clock named i2c_ic_clk.
> There is also no pinctrl driver yet so pinmux must be handled manually
> for now.

https://lore.kernel.org/linux-riscv/20240103132852.298964-1-emil.renner.berthing@canonical.com/
https://lore.kernel.org/linux-riscv/20240110-clk-th1520-v1-0-8b0682567984@tenstorrent.com/

These seem to be the most recent versions of each. I guess they're both
just waiting for their authors to have the time to get another version
written.

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Re: [PATCH 0/4] Add I2C support on TH1520

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 866 bytes --]

On Thu, Apr 25, 2024 at 10:21:31AM +0200, Thomas Bonnefille wrote:
> This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
> and a default configuration for the BeagleV-Ahead. It appears that the
> TH1520 I2C is already supported in the upstream kernel through the
> Synopsis Designware I2C adapter driver.

> As there is no clock driver for this board as of today, this patch
> series uses a fixed-clock named i2c_ic_clk.
> There is also no pinctrl driver yet so pinmux must be handled manually
> for now.

https://lore.kernel.org/linux-riscv/20240103132852.298964-1-emil.renner.berthing@canonical.com/
https://lore.kernel.org/linux-riscv/20240110-clk-th1520-v1-0-8b0682567984@tenstorrent.com/

These seem to be the most recent versions of each. I guess they're both
just waiting for their authors to have the time to get another version
written.

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Re: [PATCH 0/4] Add I2C support on TH1520

[Thomas Bonnefille]

On 4/25/24 11:00 AM, Conor Dooley wrote:
> On Thu, Apr 25, 2024 at 10:21:31AM +0200, Thomas Bonnefille wrote:
>> This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
>> and a default configuration for the BeagleV-Ahead. It appears that the
>> TH1520 I2C is already supported in the upstream kernel through the
>> Synopsis Designware I2C adapter driver.
> 
>> As there is no clock driver for this board as of today, this patch
>> series uses a fixed-clock named i2c_ic_clk.
>> There is also no pinctrl driver yet so pinmux must be handled manually
>> for now.
> 
> https://lore.kernel.org/linux-riscv/20240103132852.298964-1-emil.renner.berthing@canonical.com/
> https://lore.kernel.org/linux-riscv/20240110-clk-th1520-v1-0-8b0682567984@tenstorrent.com/
> 
> These seem to be the most recent versions of each. I guess they're both
> just waiting for their authors to have the time to get another version
> written.

Yes, actually, I used Emil's patch with a custom pinctrl configuration 
to test the I2C. It appeared to be ready enough for my use.

Re: [PATCH 0/4] Add I2C support on TH1520

[Thomas Bonnefille]

On 4/25/24 11:00 AM, Conor Dooley wrote:
> On Thu, Apr 25, 2024 at 10:21:31AM +0200, Thomas Bonnefille wrote:
>> This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
>> and a default configuration for the BeagleV-Ahead. It appears that the
>> TH1520 I2C is already supported in the upstream kernel through the
>> Synopsis Designware I2C adapter driver.
> 
>> As there is no clock driver for this board as of today, this patch
>> series uses a fixed-clock named i2c_ic_clk.
>> There is also no pinctrl driver yet so pinmux must be handled manually
>> for now.
> 
> https://lore.kernel.org/linux-riscv/20240103132852.298964-1-emil.renner.berthing@canonical.com/
> https://lore.kernel.org/linux-riscv/20240110-clk-th1520-v1-0-8b0682567984@tenstorrent.com/
> 
> These seem to be the most recent versions of each. I guess they're both
> just waiting for their authors to have the time to get another version
> written.

Yes, actually, I used Emil's patch with a custom pinctrl configuration 
to test the I2C. It appeared to be ready enough for my use.

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Re: [PATCH 1/4] dt-bindings: i2c: dw: Document compatible thead,th1520-i2c

[Krzysztof Kozlowski]

On 25/04/2024 10:21, Thomas Bonnefille wrote:
> Add documentation for compatible string thead,th1520-i2c which can be
> used specifically for the TH1520 SoC.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> ---

...

>      };
> +  - |
> +    i2c@e7f20000 {
> +      compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +      reg = <0xe7f20000 0x4000>;
> +      interrupts = <44>;
> +      clocks = <&i2c_ic_clk>;
> +      status = "disabled";

No need for new example. No differences.

Best regards,
Krzysztof


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Re: [PATCH 1/4] dt-bindings: i2c: dw: Document compatible thead,th1520-i2c

[Krzysztof Kozlowski]

On 25/04/2024 10:21, Thomas Bonnefille wrote:
> Add documentation for compatible string thead,th1520-i2c which can be
> used specifically for the TH1520 SoC.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> ---

...

>      };
> +  - |
> +    i2c@e7f20000 {
> +      compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +      reg = <0xe7f20000 0x4000>;
> +      interrupts = <44>;
> +      clocks = <&i2c_ic_clk>;
> +      status = "disabled";

No need for new example. No differences.

Best regards,
Krzysztof

Re: [PATCH 2/4] riscv: boot: dts: thead: Fix node ordering in TH1520 device tree

[Krzysztof Kozlowski]

On 25/04/2024 10:21, Thomas Bonnefille wrote:
> According to the device tree coding style, nodes shall be ordered by
> unit address in ascending order.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>

Please use subject prefixes matching the subsystem. You can get them for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching.



Best regards,
Krzysztof

Re: [PATCH 2/4] riscv: boot: dts: thead: Fix node ordering in TH1520 device tree

[Krzysztof Kozlowski]

On 25/04/2024 10:21, Thomas Bonnefille wrote:
> According to the device tree coding style, nodes shall be ordered by
> unit address in ascending order.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>

Please use subject prefixes matching the subsystem. You can get them for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching.



Best regards,
Krzysztof


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Re: [PATCH 0/4] Add I2C support on TH1520

[Rob Herring]

On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:
> This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
> and a default configuration for the BeagleV-Ahead. It appears that the
> TH1520 I2C is already supported in the upstream kernel through the
> Synopsis Designware I2C adapter driver.
> As there is no clock driver for this board as of today, this patch
> series uses a fixed-clock named i2c_ic_clk.
> There is also no pinctrl driver yet so pinmux must be handled manually
> for now.
> It also fixes the order of the nodes in the device tree to comply with
> device-tree coding-style.
> 
> Thomas Bonnefille (4):
>   dt-bindings: i2c: dw: Document compatible thead,th1520-i2c
>   riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
>   riscv: dts: thead: Add TH1520 I2C nodes
>   riscv: dts: thead: Enable I2C on the BeagleV-Ahead
> 
>  .../bindings/i2c/snps,designware-i2c.yaml     |  12 ++
>  .../boot/dts/thead/th1520-beaglev-ahead.dts   |  22 ++++
>  arch/riscv/boot/dts/thead/th1520.dtsi         | 120 ++++++++++++++----
>  3 files changed, 127 insertions(+), 27 deletions(-)
> 
> --
> 2.44.0
> 
> 
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


New warnings running 'make CHECK_DTBS=y thead/th1520-beaglev-ahead.dtb' for 20240425082138.374445-1-thomas.bonnefille@bootlin.com:

arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: i2c-clock: clock-frequency:0:0: 50000000 is greater than the maximum of 5000000
	from schema $id: http://devicetree.org/schemas/i2c/i2c-controller.yaml#

Re: [PATCH 0/4] Add I2C support on TH1520

[Rob Herring]

On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:
> This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
> and a default configuration for the BeagleV-Ahead. It appears that the
> TH1520 I2C is already supported in the upstream kernel through the
> Synopsis Designware I2C adapter driver.
> As there is no clock driver for this board as of today, this patch
> series uses a fixed-clock named i2c_ic_clk.
> There is also no pinctrl driver yet so pinmux must be handled manually
> for now.
> It also fixes the order of the nodes in the device tree to comply with
> device-tree coding-style.
> 
> Thomas Bonnefille (4):
>   dt-bindings: i2c: dw: Document compatible thead,th1520-i2c
>   riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
>   riscv: dts: thead: Add TH1520 I2C nodes
>   riscv: dts: thead: Enable I2C on the BeagleV-Ahead
> 
>  .../bindings/i2c/snps,designware-i2c.yaml     |  12 ++
>  .../boot/dts/thead/th1520-beaglev-ahead.dts   |  22 ++++
>  arch/riscv/boot/dts/thead/th1520.dtsi         | 120 ++++++++++++++----
>  3 files changed, 127 insertions(+), 27 deletions(-)
> 
> --
> 2.44.0
> 
> 
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


New warnings running 'make CHECK_DTBS=y thead/th1520-beaglev-ahead.dtb' for 20240425082138.374445-1-thomas.bonnefille@bootlin.com:

arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: i2c-clock: clock-frequency:0:0: 50000000 is greater than the maximum of 5000000
	from schema $id: http://devicetree.org/schemas/i2c/i2c-controller.yaml#






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Re: [PATCH 0/4] Add I2C support on TH1520

[Drew Fustini]

On Thu, Apr 25, 2024 at 10:00:10AM +0100, Conor Dooley wrote:
> On Thu, Apr 25, 2024 at 10:21:31AM +0200, Thomas Bonnefille wrote:
> > This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
> > and a default configuration for the BeagleV-Ahead. It appears that the
> > TH1520 I2C is already supported in the upstream kernel through the
> > Synopsis Designware I2C adapter driver.
> 
> > As there is no clock driver for this board as of today, this patch
> > series uses a fixed-clock named i2c_ic_clk.
> > There is also no pinctrl driver yet so pinmux must be handled manually
> > for now.
> 
> https://lore.kernel.org/linux-riscv/20240103132852.298964-1-emil.renner.berthing@canonical.com/
> https://lore.kernel.org/linux-riscv/20240110-clk-th1520-v1-0-8b0682567984@tenstorrent.com/
> 
> These seem to be the most recent versions of each. I guess they're both
> just waiting for their authors to have the time to get another version
> written.

Thanks for the impetus. I've been meaning to post but it keeps getting
pushed down the stack.

I'll post an updated clk series today. I do now have the emmc working
with a real clock property.

thanks,
drew

Re: [PATCH 0/4] Add I2C support on TH1520

[Drew Fustini]

On Thu, Apr 25, 2024 at 10:00:10AM +0100, Conor Dooley wrote:
> On Thu, Apr 25, 2024 at 10:21:31AM +0200, Thomas Bonnefille wrote:
> > This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
> > and a default configuration for the BeagleV-Ahead. It appears that the
> > TH1520 I2C is already supported in the upstream kernel through the
> > Synopsis Designware I2C adapter driver.
> 
> > As there is no clock driver for this board as of today, this patch
> > series uses a fixed-clock named i2c_ic_clk.
> > There is also no pinctrl driver yet so pinmux must be handled manually
> > for now.
> 
> https://lore.kernel.org/linux-riscv/20240103132852.298964-1-emil.renner.berthing@canonical.com/
> https://lore.kernel.org/linux-riscv/20240110-clk-th1520-v1-0-8b0682567984@tenstorrent.com/
> 
> These seem to be the most recent versions of each. I guess they're both
> just waiting for their authors to have the time to get another version
> written.

Thanks for the impetus. I've been meaning to post but it keeps getting
pushed down the stack.

I'll post an updated clk series today. I do now have the emmc working
with a real clock property.

thanks,
drew


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Re: [PATCH 0/4] Add I2C support on TH1520

[Conor Dooley]

[-- Attachment #1.1: Type: text/plain, Size: 2178 bytes --]

On Thu, Apr 25, 2024 at 09:51:26AM -0500, Rob Herring wrote:
> 
> On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:
> > This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
> > and a default configuration for the BeagleV-Ahead. It appears that the
> > TH1520 I2C is already supported in the upstream kernel through the
> > Synopsis Designware I2C adapter driver.
> > As there is no clock driver for this board as of today, this patch
> > series uses a fixed-clock named i2c_ic_clk.
> > There is also no pinctrl driver yet so pinmux must be handled manually
> > for now.
> > It also fixes the order of the nodes in the device tree to comply with
> > device-tree coding-style.
> > 
> > Thomas Bonnefille (4):
> >   dt-bindings: i2c: dw: Document compatible thead,th1520-i2c
> >   riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
> >   riscv: dts: thead: Add TH1520 I2C nodes
> >   riscv: dts: thead: Enable I2C on the BeagleV-Ahead
> > 
> >  .../bindings/i2c/snps,designware-i2c.yaml     |  12 ++
> >  .../boot/dts/thead/th1520-beaglev-ahead.dts   |  22 ++++
> >  arch/riscv/boot/dts/thead/th1520.dtsi         | 120 ++++++++++++++----
> >  3 files changed, 127 insertions(+), 27 deletions(-)
> > 
> > --
> > 2.44.0
> > 
> > 
> > 
> 
> 
> My bot found new DTB warnings on the .dts files added or changed in this
> series.
> 
> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
> are fixed by another series. Ultimately, it is up to the platform
> maintainer whether these warnings are acceptable or not. No need to reply
> unless the platform maintainer has comments.
> 
> If you already ran DT checks and didn't see these error(s), then
> make sure dt-schema is up to date:
> 
>   pip3 install dtschema --upgrade
> 
> 
> New warnings running 'make CHECK_DTBS=y thead/th1520-beaglev-ahead.dtb' for 20240425082138.374445-1-thomas.bonnefille@bootlin.com:
> 
> arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: i2c-clock: clock-frequency:0:0: 50000000 is greater than the maximum of 5000000

The bot is not freaking out here, 50 MHz is indeed more than 5 MHz :)

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[-- Attachment #2: Type: text/plain, Size: 161 bytes --]

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Re: [PATCH 0/4] Add I2C support on TH1520

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 2178 bytes --]

On Thu, Apr 25, 2024 at 09:51:26AM -0500, Rob Herring wrote:
> 
> On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:
> > This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
> > and a default configuration for the BeagleV-Ahead. It appears that the
> > TH1520 I2C is already supported in the upstream kernel through the
> > Synopsis Designware I2C adapter driver.
> > As there is no clock driver for this board as of today, this patch
> > series uses a fixed-clock named i2c_ic_clk.
> > There is also no pinctrl driver yet so pinmux must be handled manually
> > for now.
> > It also fixes the order of the nodes in the device tree to comply with
> > device-tree coding-style.
> > 
> > Thomas Bonnefille (4):
> >   dt-bindings: i2c: dw: Document compatible thead,th1520-i2c
> >   riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
> >   riscv: dts: thead: Add TH1520 I2C nodes
> >   riscv: dts: thead: Enable I2C on the BeagleV-Ahead
> > 
> >  .../bindings/i2c/snps,designware-i2c.yaml     |  12 ++
> >  .../boot/dts/thead/th1520-beaglev-ahead.dts   |  22 ++++
> >  arch/riscv/boot/dts/thead/th1520.dtsi         | 120 ++++++++++++++----
> >  3 files changed, 127 insertions(+), 27 deletions(-)
> > 
> > --
> > 2.44.0
> > 
> > 
> > 
> 
> 
> My bot found new DTB warnings on the .dts files added or changed in this
> series.
> 
> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
> are fixed by another series. Ultimately, it is up to the platform
> maintainer whether these warnings are acceptable or not. No need to reply
> unless the platform maintainer has comments.
> 
> If you already ran DT checks and didn't see these error(s), then
> make sure dt-schema is up to date:
> 
>   pip3 install dtschema --upgrade
> 
> 
> New warnings running 'make CHECK_DTBS=y thead/th1520-beaglev-ahead.dtb' for 20240425082138.374445-1-thomas.bonnefille@bootlin.com:
> 
> arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: i2c-clock: clock-frequency:0:0: 50000000 is greater than the maximum of 5000000

The bot is not freaking out here, 50 MHz is indeed more than 5 MHz :)

[-- Attachment #2: signature.asc --]
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Re: (subset) [PATCH 0/4] Add I2C support on TH1520

[Conor Dooley]

From: Conor Dooley <conor.dooley@microchip.com>

On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:
> This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
> and a default configuration for the BeagleV-Ahead. It appears that the
> TH1520 I2C is already supported in the upstream kernel through the
> Synopsis Designware I2C adapter driver.
> As there is no clock driver for this board as of today, this patch
> series uses a fixed-clock named i2c_ic_clk.
> There is also no pinctrl driver yet so pinmux must be handled manually
> for now.
> It also fixes the order of the nodes in the device tree to comply with
> device-tree coding-style.
> 
> [...]

Applied to riscv-dt-for-next, thanks!

[2/4] riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
      (no commit info)

I removed the "boot:" so b4 is probably confused.

Thanks,
Conor.

Re: (subset) [PATCH 0/4] Add I2C support on TH1520

[Conor Dooley]

From: Conor Dooley <conor.dooley@microchip.com>

On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:
> This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
> and a default configuration for the BeagleV-Ahead. It appears that the
> TH1520 I2C is already supported in the upstream kernel through the
> Synopsis Designware I2C adapter driver.
> As there is no clock driver for this board as of today, this patch
> series uses a fixed-clock named i2c_ic_clk.
> There is also no pinctrl driver yet so pinmux must be handled manually
> for now.
> It also fixes the order of the nodes in the device tree to comply with
> device-tree coding-style.
> 
> [...]

Applied to riscv-dt-for-next, thanks!

[2/4] riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
      (no commit info)

I removed the "boot:" so b4 is probably confused.

Thanks,
Conor.

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Re: [PATCH 2/4] riscv: boot: dts: thead: Fix node ordering in TH1520 device tree

[Conor Dooley]

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On Thu, Apr 25, 2024 at 11:49:10AM +0200, Krzysztof Kozlowski wrote:
> On 25/04/2024 10:21, Thomas Bonnefille wrote:
> > According to the device tree coding style, nodes shall be ordered by
> > unit address in ascending order.
> > 
> > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> 
> Please use subject prefixes matching the subsystem. You can get them for
> example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
> your patch is touching.

Ye, odd when the rest of the commits don't have it :)
I picked up this patch cos I'm prob gonna finalise what I'm sending
for 6.10 by the end of the week and saw no reason to not take the
cleanup.

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Re: [PATCH 2/4] riscv: boot: dts: thead: Fix node ordering in TH1520 device tree

[Conor Dooley]

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On Thu, Apr 25, 2024 at 11:49:10AM +0200, Krzysztof Kozlowski wrote:
> On 25/04/2024 10:21, Thomas Bonnefille wrote:
> > According to the device tree coding style, nodes shall be ordered by
> > unit address in ascending order.
> > 
> > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> 
> Please use subject prefixes matching the subsystem. You can get them for
> example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
> your patch is touching.

Ye, odd when the rest of the commits don't have it :)
I picked up this patch cos I'm prob gonna finalise what I'm sending
for 6.10 by the end of the week and saw no reason to not take the
cleanup.

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[-- Attachment #2: Type: text/plain, Size: 161 bytes --]

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Re: [PATCH 0/4] Add I2C support on TH1520

[Thomas Bonnefille]

On 4/25/24 6:35 PM, Conor Dooley wrote:
> On Thu, Apr 25, 2024 at 09:51:26AM -0500, Rob Herring wrote:
>>
>> On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:
>>> This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
>>> and a default configuration for the BeagleV-Ahead. It appears that the
>>> TH1520 I2C is already supported in the upstream kernel through the
>>> Synopsis Designware I2C adapter driver.
>>> As there is no clock driver for this board as of today, this patch
>>> series uses a fixed-clock named i2c_ic_clk.
>>> There is also no pinctrl driver yet so pinmux must be handled manually
>>> for now.
>>> It also fixes the order of the nodes in the device tree to comply with
>>> device-tree coding-style.
>>>
>>> Thomas Bonnefille (4):
>>>    dt-bindings: i2c: dw: Document compatible thead,th1520-i2c
>>>    riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
>>>    riscv: dts: thead: Add TH1520 I2C nodes
>>>    riscv: dts: thead: Enable I2C on the BeagleV-Ahead
>>>
>>>   .../bindings/i2c/snps,designware-i2c.yaml     |  12 ++
>>>   .../boot/dts/thead/th1520-beaglev-ahead.dts   |  22 ++++
>>>   arch/riscv/boot/dts/thead/th1520.dtsi         | 120 ++++++++++++++----
>>>   3 files changed, 127 insertions(+), 27 deletions(-)
>>>
>>> --
>>> 2.44.0
>>>
>>>
>>>
>>
>>
>> My bot found new DTB warnings on the .dts files added or changed in this
>> series.
>>
>> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
>> are fixed by another series. Ultimately, it is up to the platform
>> maintainer whether these warnings are acceptable or not. No need to reply
>> unless the platform maintainer has comments.
>>
>> If you already ran DT checks and didn't see these error(s), then
>> make sure dt-schema is up to date:
>>
>>    pip3 install dtschema --upgrade
>>
>>
>> New warnings running 'make CHECK_DTBS=y thead/th1520-beaglev-ahead.dtb' for 20240425082138.374445-1-thomas.bonnefille@bootlin.com:
>>
>> arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: i2c-clock: clock-frequency:0:0: 50000000 is greater than the maximum of 5000000
> 
> The bot is not freaking out here, 50 MHz is indeed more than 5 MHz :)

5MHz is the maximum clock-frequency, ie. the I2C bus frequency.
This is actually set to 100kHz for I2C0 in the DT:

&i2c0 {
     status = "okay";
     clock-frequency = <100000>; <----
...
};

50MHz is the "fixed-clock" frequency, that is the clock feeding the I2C
IP block:

i2c_ic_clk: i2c-clock {
     compatible = "fixed-clock";
     clock-frequency = <50000000>; <-----
     #clock-cells = <0>;
};

My guess is that the bot confused the clock-frequency parameter for the 
bus clock (SCL) with the i2c-ic-clock value for the controller itself 
during the checks.

Do you agree with this or am I misunderstanding the error ?

If I lower the fixed-clock frequency to eg. 100kHz, the error is gone. 
But I guess the 5MHz limit should probably not apply to the input clock?

Best regards,
Thomas

Re: [PATCH 0/4] Add I2C support on TH1520

[Thomas Bonnefille]

On 4/25/24 6:35 PM, Conor Dooley wrote:
> On Thu, Apr 25, 2024 at 09:51:26AM -0500, Rob Herring wrote:
>>
>> On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:
>>> This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
>>> and a default configuration for the BeagleV-Ahead. It appears that the
>>> TH1520 I2C is already supported in the upstream kernel through the
>>> Synopsis Designware I2C adapter driver.
>>> As there is no clock driver for this board as of today, this patch
>>> series uses a fixed-clock named i2c_ic_clk.
>>> There is also no pinctrl driver yet so pinmux must be handled manually
>>> for now.
>>> It also fixes the order of the nodes in the device tree to comply with
>>> device-tree coding-style.
>>>
>>> Thomas Bonnefille (4):
>>>    dt-bindings: i2c: dw: Document compatible thead,th1520-i2c
>>>    riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
>>>    riscv: dts: thead: Add TH1520 I2C nodes
>>>    riscv: dts: thead: Enable I2C on the BeagleV-Ahead
>>>
>>>   .../bindings/i2c/snps,designware-i2c.yaml     |  12 ++
>>>   .../boot/dts/thead/th1520-beaglev-ahead.dts   |  22 ++++
>>>   arch/riscv/boot/dts/thead/th1520.dtsi         | 120 ++++++++++++++----
>>>   3 files changed, 127 insertions(+), 27 deletions(-)
>>>
>>> --
>>> 2.44.0
>>>
>>>
>>>
>>
>>
>> My bot found new DTB warnings on the .dts files added or changed in this
>> series.
>>
>> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
>> are fixed by another series. Ultimately, it is up to the platform
>> maintainer whether these warnings are acceptable or not. No need to reply
>> unless the platform maintainer has comments.
>>
>> If you already ran DT checks and didn't see these error(s), then
>> make sure dt-schema is up to date:
>>
>>    pip3 install dtschema --upgrade
>>
>>
>> New warnings running 'make CHECK_DTBS=y thead/th1520-beaglev-ahead.dtb' for 20240425082138.374445-1-thomas.bonnefille@bootlin.com:
>>
>> arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: i2c-clock: clock-frequency:0:0: 50000000 is greater than the maximum of 5000000
> 
> The bot is not freaking out here, 50 MHz is indeed more than 5 MHz :)

5MHz is the maximum clock-frequency, ie. the I2C bus frequency.
This is actually set to 100kHz for I2C0 in the DT:

&i2c0 {
     status = "okay";
     clock-frequency = <100000>; <----
...
};

50MHz is the "fixed-clock" frequency, that is the clock feeding the I2C
IP block:

i2c_ic_clk: i2c-clock {
     compatible = "fixed-clock";
     clock-frequency = <50000000>; <-----
     #clock-cells = <0>;
};

My guess is that the bot confused the clock-frequency parameter for the 
bus clock (SCL) with the i2c-ic-clock value for the controller itself 
during the checks.

Do you agree with this or am I misunderstanding the error ?

If I lower the fixed-clock frequency to eg. 100kHz, the error is gone. 
But I guess the 5MHz limit should probably not apply to the input clock?

Best regards,
Thomas

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Re: [PATCH 0/4] Add I2C support on TH1520

[Conor Dooley]

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On Fri, Apr 26, 2024 at 04:12:00PM +0200, Thomas Bonnefille wrote:
> 
> 
> On 4/25/24 6:35 PM, Conor Dooley wrote:
> > On Thu, Apr 25, 2024 at 09:51:26AM -0500, Rob Herring wrote:
> > > 
> > > On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:
> > > > This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
> > > > and a default configuration for the BeagleV-Ahead. It appears that the
> > > > TH1520 I2C is already supported in the upstream kernel through the
> > > > Synopsis Designware I2C adapter driver.
> > > > As there is no clock driver for this board as of today, this patch
> > > > series uses a fixed-clock named i2c_ic_clk.
> > > > There is also no pinctrl driver yet so pinmux must be handled manually
> > > > for now.
> > > > It also fixes the order of the nodes in the device tree to comply with
> > > > device-tree coding-style.
> > > > 
> > > > Thomas Bonnefille (4):
> > > >    dt-bindings: i2c: dw: Document compatible thead,th1520-i2c
> > > >    riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
> > > >    riscv: dts: thead: Add TH1520 I2C nodes
> > > >    riscv: dts: thead: Enable I2C on the BeagleV-Ahead
> > > > 
> > > >   .../bindings/i2c/snps,designware-i2c.yaml     |  12 ++
> > > >   .../boot/dts/thead/th1520-beaglev-ahead.dts   |  22 ++++
> > > >   arch/riscv/boot/dts/thead/th1520.dtsi         | 120 ++++++++++++++----
> > > >   3 files changed, 127 insertions(+), 27 deletions(-)
> > > > 
> > > > --
> > > > 2.44.0
> > > > 
> > > > 
> > > > 
> > > 
> > > 
> > > My bot found new DTB warnings on the .dts files added or changed in this
> > > series.
> > > 
> > > Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
> > > are fixed by another series. Ultimately, it is up to the platform
> > > maintainer whether these warnings are acceptable or not. No need to reply
> > > unless the platform maintainer has comments.
> > > 
> > > If you already ran DT checks and didn't see these error(s), then
> > > make sure dt-schema is up to date:
> > > 
> > >    pip3 install dtschema --upgrade
> > > 
> > > 
> > > New warnings running 'make CHECK_DTBS=y thead/th1520-beaglev-ahead.dtb' for 20240425082138.374445-1-thomas.bonnefille@bootlin.com:
> > > 
> > > arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: i2c-clock: clock-frequency:0:0: 50000000 is greater than the maximum of 5000000
> > 
> > The bot is not freaking out here, 50 MHz is indeed more than 5 MHz :)
> 
> 5MHz is the maximum clock-frequency, ie. the I2C bus frequency.
> This is actually set to 100kHz for I2C0 in the DT:
> 
> &i2c0 {
>     status = "okay";
>     clock-frequency = <100000>; <----
> ...
> };
> 
> 50MHz is the "fixed-clock" frequency, that is the clock feeding the I2C
> IP block:
> 
> i2c_ic_clk: i2c-clock {
>     compatible = "fixed-clock";
>     clock-frequency = <50000000>; <-----
>     #clock-cells = <0>;
> };
> 
> My guess is that the bot confused the clock-frequency parameter for the bus
> clock (SCL) with the i2c-ic-clock value for the controller itself during the
> checks.
> 
> Do you agree with this or am I misunderstanding the error ?
> 
> If I lower the fixed-clock frequency to eg. 100kHz, the error is gone. But I
> guess the 5MHz limit should probably not apply to the input clock?

Heh, I know why that's happening - it's your node name.
The pattern for i2c controllers is "^i2c(@.*)?":
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/i2c/i2c-controller.yaml

Rob co-incidentally (or maybe not) put out a patch for fixed-frequency
clock names, suggesting using clock as a prefix:
https://lore.kernel.org/all/20240425183810.3079069-1-robh@kernel.org/
If we switched to that format, I believe your problem goes away.

Cheers,
Conor.

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Re: [PATCH 0/4] Add I2C support on TH1520

[Conor Dooley]

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On Fri, Apr 26, 2024 at 04:12:00PM +0200, Thomas Bonnefille wrote:
> 
> 
> On 4/25/24 6:35 PM, Conor Dooley wrote:
> > On Thu, Apr 25, 2024 at 09:51:26AM -0500, Rob Herring wrote:
> > > 
> > > On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:
> > > > This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
> > > > and a default configuration for the BeagleV-Ahead. It appears that the
> > > > TH1520 I2C is already supported in the upstream kernel through the
> > > > Synopsis Designware I2C adapter driver.
> > > > As there is no clock driver for this board as of today, this patch
> > > > series uses a fixed-clock named i2c_ic_clk.
> > > > There is also no pinctrl driver yet so pinmux must be handled manually
> > > > for now.
> > > > It also fixes the order of the nodes in the device tree to comply with
> > > > device-tree coding-style.
> > > > 
> > > > Thomas Bonnefille (4):
> > > >    dt-bindings: i2c: dw: Document compatible thead,th1520-i2c
> > > >    riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
> > > >    riscv: dts: thead: Add TH1520 I2C nodes
> > > >    riscv: dts: thead: Enable I2C on the BeagleV-Ahead
> > > > 
> > > >   .../bindings/i2c/snps,designware-i2c.yaml     |  12 ++
> > > >   .../boot/dts/thead/th1520-beaglev-ahead.dts   |  22 ++++
> > > >   arch/riscv/boot/dts/thead/th1520.dtsi         | 120 ++++++++++++++----
> > > >   3 files changed, 127 insertions(+), 27 deletions(-)
> > > > 
> > > > --
> > > > 2.44.0
> > > > 
> > > > 
> > > > 
> > > 
> > > 
> > > My bot found new DTB warnings on the .dts files added or changed in this
> > > series.
> > > 
> > > Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
> > > are fixed by another series. Ultimately, it is up to the platform
> > > maintainer whether these warnings are acceptable or not. No need to reply
> > > unless the platform maintainer has comments.
> > > 
> > > If you already ran DT checks and didn't see these error(s), then
> > > make sure dt-schema is up to date:
> > > 
> > >    pip3 install dtschema --upgrade
> > > 
> > > 
> > > New warnings running 'make CHECK_DTBS=y thead/th1520-beaglev-ahead.dtb' for 20240425082138.374445-1-thomas.bonnefille@bootlin.com:
> > > 
> > > arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: i2c-clock: clock-frequency:0:0: 50000000 is greater than the maximum of 5000000
> > 
> > The bot is not freaking out here, 50 MHz is indeed more than 5 MHz :)
> 
> 5MHz is the maximum clock-frequency, ie. the I2C bus frequency.
> This is actually set to 100kHz for I2C0 in the DT:
> 
> &i2c0 {
>     status = "okay";
>     clock-frequency = <100000>; <----
> ...
> };
> 
> 50MHz is the "fixed-clock" frequency, that is the clock feeding the I2C
> IP block:
> 
> i2c_ic_clk: i2c-clock {
>     compatible = "fixed-clock";
>     clock-frequency = <50000000>; <-----
>     #clock-cells = <0>;
> };
> 
> My guess is that the bot confused the clock-frequency parameter for the bus
> clock (SCL) with the i2c-ic-clock value for the controller itself during the
> checks.
> 
> Do you agree with this or am I misunderstanding the error ?
> 
> If I lower the fixed-clock frequency to eg. 100kHz, the error is gone. But I
> guess the 5MHz limit should probably not apply to the input clock?

Heh, I know why that's happening - it's your node name.
The pattern for i2c controllers is "^i2c(@.*)?":
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/i2c/i2c-controller.yaml

Rob co-incidentally (or maybe not) put out a patch for fixed-frequency
clock names, suggesting using clock as a prefix:
https://lore.kernel.org/all/20240425183810.3079069-1-robh@kernel.org/
If we switched to that format, I believe your problem goes away.

Cheers,
Conor.

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Re: [PATCH 0/4] Add I2C support on TH1520

[Thomas Bonnefille]

On 4/26/24 4:42 PM, Conor Dooley wrote:
> On Fri, Apr 26, 2024 at 04:12:00PM +0200, Thomas Bonnefille wrote:
>>
>>
>> On 4/25/24 6:35 PM, Conor Dooley wrote:
>>> On Thu, Apr 25, 2024 at 09:51:26AM -0500, Rob Herring wrote:
>>>>
>>>> On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:
>>>>> This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
>>>>> and a default configuration for the BeagleV-Ahead. It appears that the
>>>>> TH1520 I2C is already supported in the upstream kernel through the
>>>>> Synopsis Designware I2C adapter driver.
>>>>> As there is no clock driver for this board as of today, this patch
>>>>> series uses a fixed-clock named i2c_ic_clk.
>>>>> There is also no pinctrl driver yet so pinmux must be handled manually
>>>>> for now.
>>>>> It also fixes the order of the nodes in the device tree to comply with
>>>>> device-tree coding-style.
>>>>>
>>>>> Thomas Bonnefille (4):
>>>>>     dt-bindings: i2c: dw: Document compatible thead,th1520-i2c
>>>>>     riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
>>>>>     riscv: dts: thead: Add TH1520 I2C nodes
>>>>>     riscv: dts: thead: Enable I2C on the BeagleV-Ahead
>>>>>
>>>>>    .../bindings/i2c/snps,designware-i2c.yaml     |  12 ++
>>>>>    .../boot/dts/thead/th1520-beaglev-ahead.dts   |  22 ++++
>>>>>    arch/riscv/boot/dts/thead/th1520.dtsi         | 120 ++++++++++++++----
>>>>>    3 files changed, 127 insertions(+), 27 deletions(-)
>>>>>
>>>>> --
>>>>> 2.44.0
>>>>>
>>>>>
>>>>>
>>>>
>>>>
>>>> My bot found new DTB warnings on the .dts files added or changed in this
>>>> series.
>>>>
>>>> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
>>>> are fixed by another series. Ultimately, it is up to the platform
>>>> maintainer whether these warnings are acceptable or not. No need to reply
>>>> unless the platform maintainer has comments.
>>>>
>>>> If you already ran DT checks and didn't see these error(s), then
>>>> make sure dt-schema is up to date:
>>>>
>>>>     pip3 install dtschema --upgrade
>>>>
>>>>
>>>> New warnings running 'make CHECK_DTBS=y thead/th1520-beaglev-ahead.dtb' for 20240425082138.374445-1-thomas.bonnefille@bootlin.com:
>>>>
>>>> arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: i2c-clock: clock-frequency:0:0: 50000000 is greater than the maximum of 5000000
>>>
>>> The bot is not freaking out here, 50 MHz is indeed more than 5 MHz :)
>>
>> 5MHz is the maximum clock-frequency, ie. the I2C bus frequency.
>> This is actually set to 100kHz for I2C0 in the DT:
>>
>> &i2c0 {
>>      status = "okay";
>>      clock-frequency = <100000>; <----
>> ...
>> };
>>
>> 50MHz is the "fixed-clock" frequency, that is the clock feeding the I2C
>> IP block:
>>
>> i2c_ic_clk: i2c-clock {
>>      compatible = "fixed-clock";
>>      clock-frequency = <50000000>; <-----
>>      #clock-cells = <0>;
>> };
>>
>> My guess is that the bot confused the clock-frequency parameter for the bus
>> clock (SCL) with the i2c-ic-clock value for the controller itself during the
>> checks.
>>
>> Do you agree with this or am I misunderstanding the error ?
>>
>> If I lower the fixed-clock frequency to eg. 100kHz, the error is gone. But I
>> guess the 5MHz limit should probably not apply to the input clock?
> 
> Heh, I know why that's happening - it's your node name.
> The pattern for i2c controllers is "^i2c(@.*)?":
> https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/i2c/i2c-controller.yaml
> 
> Rob co-incidentally (or maybe not) put out a patch for fixed-frequency
> clock names, suggesting using clock as a prefix:
> https://lore.kernel.org/all/20240425183810.3079069-1-robh@kernel.org/
> If we switched to that format, I believe your problem goes away.
> 
> Cheers,
> Conor.
> 

Indeed it was the node name, when I switched the name of the fixed clock 
to clock-i2c-ic, the error was gone, thank you. :)
But i2c_ic_clk shouldn't match "^i2c(@.*)?", one of my teammates 
suggested that the error may instead come from this line 
https://elixir.bootlin.com/linux/latest/source/scripts/dtc/checks.c#L1023.

But as Drew is working on new iterations of the TH1520's clock driver I 
will just delete this fixed clock and publish a second version depending 
on his patch.

Thank you,
Thomas

Re: [PATCH 0/4] Add I2C support on TH1520

[Thomas Bonnefille]

On 4/26/24 4:42 PM, Conor Dooley wrote:
> On Fri, Apr 26, 2024 at 04:12:00PM +0200, Thomas Bonnefille wrote:
>>
>>
>> On 4/25/24 6:35 PM, Conor Dooley wrote:
>>> On Thu, Apr 25, 2024 at 09:51:26AM -0500, Rob Herring wrote:
>>>>
>>>> On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:
>>>>> This adds I2C support in the device tree of the T-Head TH1520 RISCV-SoC
>>>>> and a default configuration for the BeagleV-Ahead. It appears that the
>>>>> TH1520 I2C is already supported in the upstream kernel through the
>>>>> Synopsis Designware I2C adapter driver.
>>>>> As there is no clock driver for this board as of today, this patch
>>>>> series uses a fixed-clock named i2c_ic_clk.
>>>>> There is also no pinctrl driver yet so pinmux must be handled manually
>>>>> for now.
>>>>> It also fixes the order of the nodes in the device tree to comply with
>>>>> device-tree coding-style.
>>>>>
>>>>> Thomas Bonnefille (4):
>>>>>     dt-bindings: i2c: dw: Document compatible thead,th1520-i2c
>>>>>     riscv: boot: dts: thead: Fix node ordering in TH1520 device tree
>>>>>     riscv: dts: thead: Add TH1520 I2C nodes
>>>>>     riscv: dts: thead: Enable I2C on the BeagleV-Ahead
>>>>>
>>>>>    .../bindings/i2c/snps,designware-i2c.yaml     |  12 ++
>>>>>    .../boot/dts/thead/th1520-beaglev-ahead.dts   |  22 ++++
>>>>>    arch/riscv/boot/dts/thead/th1520.dtsi         | 120 ++++++++++++++----
>>>>>    3 files changed, 127 insertions(+), 27 deletions(-)
>>>>>
>>>>> --
>>>>> 2.44.0
>>>>>
>>>>>
>>>>>
>>>>
>>>>
>>>> My bot found new DTB warnings on the .dts files added or changed in this
>>>> series.
>>>>
>>>> Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
>>>> are fixed by another series. Ultimately, it is up to the platform
>>>> maintainer whether these warnings are acceptable or not. No need to reply
>>>> unless the platform maintainer has comments.
>>>>
>>>> If you already ran DT checks and didn't see these error(s), then
>>>> make sure dt-schema is up to date:
>>>>
>>>>     pip3 install dtschema --upgrade
>>>>
>>>>
>>>> New warnings running 'make CHECK_DTBS=y thead/th1520-beaglev-ahead.dtb' for 20240425082138.374445-1-thomas.bonnefille@bootlin.com:
>>>>
>>>> arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: i2c-clock: clock-frequency:0:0: 50000000 is greater than the maximum of 5000000
>>>
>>> The bot is not freaking out here, 50 MHz is indeed more than 5 MHz :)
>>
>> 5MHz is the maximum clock-frequency, ie. the I2C bus frequency.
>> This is actually set to 100kHz for I2C0 in the DT:
>>
>> &i2c0 {
>>      status = "okay";
>>      clock-frequency = <100000>; <----
>> ...
>> };
>>
>> 50MHz is the "fixed-clock" frequency, that is the clock feeding the I2C
>> IP block:
>>
>> i2c_ic_clk: i2c-clock {
>>      compatible = "fixed-clock";
>>      clock-frequency = <50000000>; <-----
>>      #clock-cells = <0>;
>> };
>>
>> My guess is that the bot confused the clock-frequency parameter for the bus
>> clock (SCL) with the i2c-ic-clock value for the controller itself during the
>> checks.
>>
>> Do you agree with this or am I misunderstanding the error ?
>>
>> If I lower the fixed-clock frequency to eg. 100kHz, the error is gone. But I
>> guess the 5MHz limit should probably not apply to the input clock?
> 
> Heh, I know why that's happening - it's your node name.
> The pattern for i2c controllers is "^i2c(@.*)?":
> https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/i2c/i2c-controller.yaml
> 
> Rob co-incidentally (or maybe not) put out a patch for fixed-frequency
> clock names, suggesting using clock as a prefix:
> https://lore.kernel.org/all/20240425183810.3079069-1-robh@kernel.org/
> If we switched to that format, I believe your problem goes away.
> 
> Cheers,
> Conor.
> 

Indeed it was the node name, when I switched the name of the fixed clock 
to clock-i2c-ic, the error was gone, thank you. :)
But i2c_ic_clk shouldn't match "^i2c(@.*)?", one of my teammates 
suggested that the error may instead come from this line 
https://elixir.bootlin.com/linux/latest/source/scripts/dtc/checks.c#L1023.

But as Drew is working on new iterations of the TH1520's clock driver I 
will just delete this fixed clock and publish a second version depending 
on his patch.

Thank you,
Thomas

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Re: [PATCH 0/4] Add I2C support on TH1520

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 2963 bytes --]

On Mon, Apr 29, 2024 at 03:07:55PM +0200, Thomas Bonnefille wrote:
> On 4/26/24 4:42 PM, Conor Dooley wrote:
> > On Fri, Apr 26, 2024 at 04:12:00PM +0200, Thomas Bonnefille wrote:
> > > On 4/25/24 6:35 PM, Conor Dooley wrote:
> > > > On Thu, Apr 25, 2024 at 09:51:26AM -0500, Rob Herring wrote:
> > > > > On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:

> > > > > New warnings running 'make CHECK_DTBS=y thead/th1520-beaglev-ahead.dtb' for 20240425082138.374445-1-thomas.bonnefille@bootlin.com:
> > > > > 
> > > > > arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: i2c-clock: clock-frequency:0:0: 50000000 is greater than the maximum of 5000000
> > > > 
> > > > The bot is not freaking out here, 50 MHz is indeed more than 5 MHz :)
> > > 
> > > 5MHz is the maximum clock-frequency, ie. the I2C bus frequency.
> > > This is actually set to 100kHz for I2C0 in the DT:
> > > 
> > > &i2c0 {
> > >      status = "okay";
> > >      clock-frequency = <100000>; <----
> > > ...
> > > };
> > > 
> > > 50MHz is the "fixed-clock" frequency, that is the clock feeding the I2C
> > > IP block:
> > > 
> > > i2c_ic_clk: i2c-clock {
> > >      compatible = "fixed-clock";
> > >      clock-frequency = <50000000>; <-----
> > >      #clock-cells = <0>;
> > > };
> > > 
> > > My guess is that the bot confused the clock-frequency parameter for the bus
> > > clock (SCL) with the i2c-ic-clock value for the controller itself during the
> > > checks.
> > > 
> > > Do you agree with this or am I misunderstanding the error ?
> > > 
> > > If I lower the fixed-clock frequency to eg. 100kHz, the error is gone. But I
> > > guess the 5MHz limit should probably not apply to the input clock?
> > 
> > Heh, I know why that's happening - it's your node name.
> > The pattern for i2c controllers is "^i2c(@.*)?":
> > https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/i2c/i2c-controller.yaml
> > 
> > Rob co-incidentally (or maybe not) put out a patch for fixed-frequency
> > clock names, suggesting using clock as a prefix:
> > https://lore.kernel.org/all/20240425183810.3079069-1-robh@kernel.org/
> > If we switched to that format, I believe your problem goes away.

> Indeed it was the node name, when I switched the name of the fixed clock to
> clock-i2c-ic, the error was gone, thank you. :)
> But i2c_ic_clk shouldn't match "^i2c(@.*)?", one of my teammates suggested

The pattern in i2c-controller.yaml is only applied to nodenames, the label
(which is what i2c_ic_clk is) doesn't matter and could be left as-is.

> that the error may instead come from this line
> https://elixir.bootlin.com/linux/latest/source/scripts/dtc/checks.c#L1023.
> 
> But as Drew is working on new iterations of the TH1520's clock driver I will
> just delete this fixed clock and publish a second version depending on his
> patch.

Sure, but you may be waiting a while for that to land :)

Cheers,
Conor.

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Re: [PATCH 0/4] Add I2C support on TH1520

[Conor Dooley]

[-- Attachment #1.1: Type: text/plain, Size: 2963 bytes --]

On Mon, Apr 29, 2024 at 03:07:55PM +0200, Thomas Bonnefille wrote:
> On 4/26/24 4:42 PM, Conor Dooley wrote:
> > On Fri, Apr 26, 2024 at 04:12:00PM +0200, Thomas Bonnefille wrote:
> > > On 4/25/24 6:35 PM, Conor Dooley wrote:
> > > > On Thu, Apr 25, 2024 at 09:51:26AM -0500, Rob Herring wrote:
> > > > > On Thu, 25 Apr 2024 10:21:31 +0200, Thomas Bonnefille wrote:

> > > > > New warnings running 'make CHECK_DTBS=y thead/th1520-beaglev-ahead.dtb' for 20240425082138.374445-1-thomas.bonnefille@bootlin.com:
> > > > > 
> > > > > arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: i2c-clock: clock-frequency:0:0: 50000000 is greater than the maximum of 5000000
> > > > 
> > > > The bot is not freaking out here, 50 MHz is indeed more than 5 MHz :)
> > > 
> > > 5MHz is the maximum clock-frequency, ie. the I2C bus frequency.
> > > This is actually set to 100kHz for I2C0 in the DT:
> > > 
> > > &i2c0 {
> > >      status = "okay";
> > >      clock-frequency = <100000>; <----
> > > ...
> > > };
> > > 
> > > 50MHz is the "fixed-clock" frequency, that is the clock feeding the I2C
> > > IP block:
> > > 
> > > i2c_ic_clk: i2c-clock {
> > >      compatible = "fixed-clock";
> > >      clock-frequency = <50000000>; <-----
> > >      #clock-cells = <0>;
> > > };
> > > 
> > > My guess is that the bot confused the clock-frequency parameter for the bus
> > > clock (SCL) with the i2c-ic-clock value for the controller itself during the
> > > checks.
> > > 
> > > Do you agree with this or am I misunderstanding the error ?
> > > 
> > > If I lower the fixed-clock frequency to eg. 100kHz, the error is gone. But I
> > > guess the 5MHz limit should probably not apply to the input clock?
> > 
> > Heh, I know why that's happening - it's your node name.
> > The pattern for i2c controllers is "^i2c(@.*)?":
> > https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/i2c/i2c-controller.yaml
> > 
> > Rob co-incidentally (or maybe not) put out a patch for fixed-frequency
> > clock names, suggesting using clock as a prefix:
> > https://lore.kernel.org/all/20240425183810.3079069-1-robh@kernel.org/
> > If we switched to that format, I believe your problem goes away.

> Indeed it was the node name, when I switched the name of the fixed clock to
> clock-i2c-ic, the error was gone, thank you. :)
> But i2c_ic_clk shouldn't match "^i2c(@.*)?", one of my teammates suggested

The pattern in i2c-controller.yaml is only applied to nodenames, the label
(which is what i2c_ic_clk is) doesn't matter and could be left as-is.

> that the error may instead come from this line
> https://elixir.bootlin.com/linux/latest/source/scripts/dtc/checks.c#L1023.
> 
> But as Drew is working on new iterations of the TH1520's clock driver I will
> just delete this fixed clock and publish a second version depending on his
> patch.

Sure, but you may be waiting a while for that to land :)

Cheers,
Conor.

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Re: [PATCH 3/4] riscv: dts: thead: Add TH1520 I2C nodes

[Emil Renner Berthing]

Thomas Bonnefille wrote:
> Add nodes for the five I2C on the T-Head TH1520 RISCV SoC.
> All the I2C nodes are fed with the same clock named i2c_ic_clk.
> As there is currently no clock support, the i2c_ic_clk is exposed
> through a fixed-clock to mimic the existing nodes.
>

Thanks!

Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Tested-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>

> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> ---
>  arch/riscv/boot/dts/thead/th1520.dtsi | 66 +++++++++++++++++++++++++++
>  1 file changed, 66 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index d2fa25839012..86ae507576dc 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -153,6 +153,12 @@ sdhci_clk: sdhci-clock {
>  		#clock-cells = <0>;
>  	};
>
> +	i2c_ic_clk: i2c-clock {
> +		compatible = "fixed-clock";
> +		clock-frequency = <50000000>;
> +		#clock-cells = <0>;
> +	};
> +
>  	soc {
>  		compatible = "simple-bus";
>  		interrupt-parent = <&plic>;
> @@ -258,6 +264,36 @@ portc: gpio-controller@0 {
>  			};
>  		};
>
> +		i2c0: i2c@ffe7f20000 {
> +			compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +			reg = <0xff 0xe7f20000 0x0 0x4000>;
> +			interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&i2c_ic_clk>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		i2c1: i2c@ffe7f24000 {
> +			compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +			reg = <0xff 0xe7f24000 0x0 0x4000>;
> +			interrupts = <45 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&i2c_ic_clk>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		i2c4: i2c@ffe7f28000 {
> +			compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +			reg = <0xff 0xe7f28000 0x0 0x4000>;
> +			interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&i2c_ic_clk>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		gpio3: gpio@ffe7f38000 {
>  			compatible = "snps,dw-apb-gpio";
>  			reg = <0xff 0xe7f38000 0x0 0x1000>;
> @@ -312,6 +348,16 @@ portb: gpio-controller@0 {
>  			};
>  		};
>
> +		i2c2: i2c@ffec00c000 {
> +			compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +			reg = <0xff 0xec00c000 0x0 0x4000>;
> +			interrupts = <46 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&i2c_ic_clk>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		uart2: serial@ffec010000 {
>  			compatible = "snps,dw-apb-uart";
>  			reg = <0xff 0xec010000 0x0 0x4000>;
> @@ -322,6 +368,16 @@ uart2: serial@ffec010000 {
>  			status = "disabled";
>  		};
>
> +		i2c3: i2c@ffec014000 {
> +			compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +			reg = <0xff 0xec014000 0x0 0x4000>;
> +			interrupts = <47 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&i2c_ic_clk>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		dmac0: dma-controller@ffefc00000 {
>  			compatible = "snps,axi-dma-1.01a";
>  			reg = <0xff 0xefc00000 0x0 0x1000>;
> @@ -394,6 +450,16 @@ uart5: serial@fff7f0c000 {
>  			status = "disabled";
>  		};
>
> +		i2c5: i2c@fff7f2c000 {
> +			compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +			reg = <0xff 0xf7f2c000 0x0 0x4000>;
> +			interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&i2c_ic_clk>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		timer4: timer@ffffc33000 {
>  			compatible = "snps,dw-apb-timer";
>  			reg = <0xff 0xffc33000 0x0 0x14>;
> --
> 2.44.0
>
>
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> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH 3/4] riscv: dts: thead: Add TH1520 I2C nodes

[Emil Renner Berthing]

Thomas Bonnefille wrote:
> Add nodes for the five I2C on the T-Head TH1520 RISCV SoC.
> All the I2C nodes are fed with the same clock named i2c_ic_clk.
> As there is currently no clock support, the i2c_ic_clk is exposed
> through a fixed-clock to mimic the existing nodes.
>

Thanks!

Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Tested-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>

> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> ---
>  arch/riscv/boot/dts/thead/th1520.dtsi | 66 +++++++++++++++++++++++++++
>  1 file changed, 66 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index d2fa25839012..86ae507576dc 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -153,6 +153,12 @@ sdhci_clk: sdhci-clock {
>  		#clock-cells = <0>;
>  	};
>
> +	i2c_ic_clk: i2c-clock {
> +		compatible = "fixed-clock";
> +		clock-frequency = <50000000>;
> +		#clock-cells = <0>;
> +	};
> +
>  	soc {
>  		compatible = "simple-bus";
>  		interrupt-parent = <&plic>;
> @@ -258,6 +264,36 @@ portc: gpio-controller@0 {
>  			};
>  		};
>
> +		i2c0: i2c@ffe7f20000 {
> +			compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +			reg = <0xff 0xe7f20000 0x0 0x4000>;
> +			interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&i2c_ic_clk>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		i2c1: i2c@ffe7f24000 {
> +			compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +			reg = <0xff 0xe7f24000 0x0 0x4000>;
> +			interrupts = <45 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&i2c_ic_clk>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		i2c4: i2c@ffe7f28000 {
> +			compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +			reg = <0xff 0xe7f28000 0x0 0x4000>;
> +			interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&i2c_ic_clk>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		gpio3: gpio@ffe7f38000 {
>  			compatible = "snps,dw-apb-gpio";
>  			reg = <0xff 0xe7f38000 0x0 0x1000>;
> @@ -312,6 +348,16 @@ portb: gpio-controller@0 {
>  			};
>  		};
>
> +		i2c2: i2c@ffec00c000 {
> +			compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +			reg = <0xff 0xec00c000 0x0 0x4000>;
> +			interrupts = <46 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&i2c_ic_clk>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		uart2: serial@ffec010000 {
>  			compatible = "snps,dw-apb-uart";
>  			reg = <0xff 0xec010000 0x0 0x4000>;
> @@ -322,6 +368,16 @@ uart2: serial@ffec010000 {
>  			status = "disabled";
>  		};
>
> +		i2c3: i2c@ffec014000 {
> +			compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +			reg = <0xff 0xec014000 0x0 0x4000>;
> +			interrupts = <47 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&i2c_ic_clk>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		dmac0: dma-controller@ffefc00000 {
>  			compatible = "snps,axi-dma-1.01a";
>  			reg = <0xff 0xefc00000 0x0 0x1000>;
> @@ -394,6 +450,16 @@ uart5: serial@fff7f0c000 {
>  			status = "disabled";
>  		};
>
> +		i2c5: i2c@fff7f2c000 {
> +			compatible = "thead,th1520-i2c", "snps,designware-i2c";
> +			reg = <0xff 0xf7f2c000 0x0 0x4000>;
> +			interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&i2c_ic_clk>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		timer4: timer@ffffc33000 {
>  			compatible = "snps,dw-apb-timer";
>  			reg = <0xff 0xffc33000 0x0 0x14>;
> --
> 2.44.0
>
>
> _______________________________________________
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> linux-riscv@lists.infradead.org
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Re: [PATCH 4/4] riscv: dts: thead: Enable I2C on the BeagleV-Ahead

[Emil Renner Berthing]

Thomas Bonnefille wrote:
> This commit enables the I2C0 controller of the TH1520, together with
> the FT24C32A EEPROM that is connected to it.
> In addition, this commit also enables the I2C controllers I2C2, I2C4
> and I2C5 as they are all three exposed on headers (P9 19 and 20 for I2C2,
> P9 17 and 18 for I2C5 and MikroBus 7 and 5 for I2C4).
>
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> ---
>  .../boot/dts/thead/th1520-beaglev-ahead.dts   | 22 +++++++++++++++++++
>  1 file changed, 22 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
> index d9b4de9e4757..22a6935e7204 100644
> --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
> +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
> @@ -79,3 +79,25 @@ &sdio0 {
>  &uart0 {
>  	status = "okay";
>  };
> +
> +&i2c0 {
> +	status = "okay";
> +	clock-frequency = <100000>;
> +
> +	eeprom: eeprom@50 {

Nothing seems to reference this. Are you planning on adding adding some code
that needs to read this? Otherwise the label is not really needed.

> +		compatible = "atmel,24c32";
> +		reg = <0x50>;
> +	};
> +};
> +
> +&i2c2 {
> +	status = "okay";
> +};
> +
> +&i2c4 {
> +	status = "okay";
> +};
> +
> +&i2c5 {
> +	status = "okay";
> +};

Does u-boot or some other firmware set up pinctrl for these 3 I2Cs? Otherwise
enabling them doesn't really make sense before we have the pinctrl settings for
them.

/Emil

> --
> 2.44.0
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH 4/4] riscv: dts: thead: Enable I2C on the BeagleV-Ahead

[Emil Renner Berthing]

Thomas Bonnefille wrote:
> This commit enables the I2C0 controller of the TH1520, together with
> the FT24C32A EEPROM that is connected to it.
> In addition, this commit also enables the I2C controllers I2C2, I2C4
> and I2C5 as they are all three exposed on headers (P9 19 and 20 for I2C2,
> P9 17 and 18 for I2C5 and MikroBus 7 and 5 for I2C4).
>
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> ---
>  .../boot/dts/thead/th1520-beaglev-ahead.dts   | 22 +++++++++++++++++++
>  1 file changed, 22 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
> index d9b4de9e4757..22a6935e7204 100644
> --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
> +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
> @@ -79,3 +79,25 @@ &sdio0 {
>  &uart0 {
>  	status = "okay";
>  };
> +
> +&i2c0 {
> +	status = "okay";
> +	clock-frequency = <100000>;
> +
> +	eeprom: eeprom@50 {

Nothing seems to reference this. Are you planning on adding adding some code
that needs to read this? Otherwise the label is not really needed.

> +		compatible = "atmel,24c32";
> +		reg = <0x50>;
> +	};
> +};
> +
> +&i2c2 {
> +	status = "okay";
> +};
> +
> +&i2c4 {
> +	status = "okay";
> +};
> +
> +&i2c5 {
> +	status = "okay";
> +};

Does u-boot or some other firmware set up pinctrl for these 3 I2Cs? Otherwise
enabling them doesn't really make sense before we have the pinctrl settings for
them.

/Emil

> --
> 2.44.0
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

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