[PATCH] i40e: fix the issue of port initialization failure

* [PATCH] i40e: fix the issue of port initialization failure
@ 2015-12-23  5:32 Helin Zhang
  2016-02-03 16:31 ` Bruce Richardson
  2016-02-05  1:20 ` Zhang, Helin
  0 siblings, 2 replies; 6+ messages in thread
From: Helin Zhang @ 2015-12-23  5:32 UTC (permalink / raw)
  To: dev

Workaround for the issue of cannot processing adminq commands during
initialization, when 2x40G or 4x10G is receiving packets in highest
throughput. Register 0x002698a8 and 0x002698ac should be cleared at
first, and restored with the default values at the end. No more
details, as they are not exposed registers.

Signed-off-by: Helin Zhang <helin.zhang@intel.com>
---
 drivers/net/i40e/i40e_ethdev.c | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index bf6220d..149a31e 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -712,6 +712,41 @@ i40e_add_tx_flow_control_drop_filter(struct i40e_pf *pf)
 				  " frames from VSIs.");
 }
 
+/* Workaround for the issue of cannot processing adminq commands during
+ * initialization, when 2x40G or 4x10G is receiving packets in highest
+ * throughput. Register 0x002698a8 and 0x002698ac should be cleared at
+ * first, and restored with the default values at the end. No more details,
+ * as they are not exposed registers.
+ */
+static void
+i40e_clear_fdena(struct i40e_hw *hw)
+{
+	uint32_t fdena0, fdena1;
+
+	fdena0 = I40E_READ_REG(hw, 0x002698a8);
+	fdena1 = I40E_READ_REG(hw, 0x002698ac);
+	PMD_INIT_LOG(DEBUG, "[0x002698a8]: 0x%08x, [0x002698ac]: 0x%08x",
+		     fdena0, fdena1);
+
+	I40E_WRITE_REG(hw, 0x002698a8, 0x0);
+	I40E_WRITE_REG(hw, 0x002698ac, 0x0);
+	I40E_WRITE_FLUSH(hw);
+}
+
+/* Workaround for the issue of cannot processing adminq commands during
+ * initialization, when 2x40G or 4x10G is receiving packets in highest
+ * throughput. Register 0x002698a8 and 0x002698ac should be cleared at
+ * first, and restored with the default values at the end. No more details,
+ * as they are not exposed registers.
+ */
+static void
+i40e_restore_fdena(struct i40e_hw *hw)
+{
+	I40E_WRITE_REG(hw, 0x002698a8, 0xfc000000);
+	I40E_WRITE_REG(hw, 0x002698ac, 0x80007fdf);
+	I40E_WRITE_FLUSH(hw);
+}
+
 static int
 eth_i40e_dev_init(struct rte_eth_dev *dev)
 {
@@ -774,6 +809,8 @@ eth_i40e_dev_init(struct rte_eth_dev *dev)
 		return ret;
 	}
 
+	i40e_clear_fdena(hw);
+
 	/* Initialize the shared code (base driver) */
 	ret = i40e_init_shared_code(hw);
 	if (ret) {
@@ -934,6 +971,8 @@ eth_i40e_dev_init(struct rte_eth_dev *dev)
 		pf->flags &= ~I40E_FLAG_DCB;
 	}
 
+	i40e_restore_fdena(hw);
+
 	return 0;
 
 err_mac_alloc:
-- 
1.9.3

^ permalink raw reply related	[flat|nested] 6+ messages in thread