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From: Robin Murphy <robin.murphy@arm.com>
To: Lu Baolu <baolu.lu@linux.intel.com>,
	Joerg Roedel <joro@8bytes.org>,
	Sanjay Kumar <sanjay.k.kumar@intel.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Ashok Raj <ashok.raj@intel.com>,
	Jacob Pan <jacob.jun.pan@linux.intel.com>,
	Dave Jiang <dave.jiang@intel.com>, Liu Yi L <yi.l.liu@intel.com>
Cc: iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/5] iommu/vt-d: Disallow SVA if devices don't support 64-bit address
Date: Tue, 20 Jul 2021 10:27:16 +0100	[thread overview]
Message-ID: <22302277-0470-db41-7a19-41b5f73bd2c5@arm.com> (raw)
In-Reply-To: <20210720013856.4143880-5-baolu.lu@linux.intel.com>

On 2021-07-20 02:38, Lu Baolu wrote:
> When the device and CPU share an address space (such as SVA), the device
> must support the same addressing capability as the CPU. The CPU does not
> consider the addressing ability of any device when managing the page table
> of a process, so the device must have enough addressing ability to bind
> the page table of the process.
> 
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> ---
>   drivers/iommu/intel/iommu.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index f45c80ce2381..f3cca1dd384d 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -5372,6 +5372,9 @@ static int intel_iommu_enable_sva(struct device *dev)
>   	if (!(iommu->flags & VTD_FLAG_SVM_CAPABLE))
>   		return -ENODEV;
>   
> +	if (!dev->dma_mask || *dev->dma_mask != DMA_BIT_MASK(64))

Careful - VFIO doesn't set DMA masks (since it doesn't use the DMA API), 
so this appears to be relying on another driver having bound previously, 
otherwise the mask would still be the default 32-bit one from 
pci_setup_device(). I'm not sure that's an entirely robust assumption.

Robin.

> +		return -ENODEV;
> +
>   	if (intel_iommu_enable_pasid(iommu, dev))
>   		return -ENODEV;
>   
> 

WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Lu Baolu <baolu.lu@linux.intel.com>,
	Joerg Roedel <joro@8bytes.org>,
	Sanjay Kumar <sanjay.k.kumar@intel.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Ashok Raj <ashok.raj@intel.com>,
	Jacob Pan <jacob.jun.pan@linux.intel.com>,
	Dave Jiang <dave.jiang@intel.com>, Liu Yi L <yi.l.liu@intel.com>
Cc: iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/5] iommu/vt-d: Disallow SVA if devices don't support 64-bit address
Date: Tue, 20 Jul 2021 10:27:16 +0100	[thread overview]
Message-ID: <22302277-0470-db41-7a19-41b5f73bd2c5@arm.com> (raw)
In-Reply-To: <20210720013856.4143880-5-baolu.lu@linux.intel.com>

On 2021-07-20 02:38, Lu Baolu wrote:
> When the device and CPU share an address space (such as SVA), the device
> must support the same addressing capability as the CPU. The CPU does not
> consider the addressing ability of any device when managing the page table
> of a process, so the device must have enough addressing ability to bind
> the page table of the process.
> 
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> ---
>   drivers/iommu/intel/iommu.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index f45c80ce2381..f3cca1dd384d 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -5372,6 +5372,9 @@ static int intel_iommu_enable_sva(struct device *dev)
>   	if (!(iommu->flags & VTD_FLAG_SVM_CAPABLE))
>   		return -ENODEV;
>   
> +	if (!dev->dma_mask || *dev->dma_mask != DMA_BIT_MASK(64))

Careful - VFIO doesn't set DMA masks (since it doesn't use the DMA API), 
so this appears to be relying on another driver having bound previously, 
otherwise the mask would still be the default 32-bit one from 
pci_setup_device(). I'm not sure that's an entirely robust assumption.

Robin.

> +		return -ENODEV;
> +
>   	if (intel_iommu_enable_pasid(iommu, dev))
>   		return -ENODEV;
>   
> 
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

  reply	other threads:[~2021-07-20  9:27 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-20  1:38 [PATCH 0/5] iommu/vt-d: Several minor adjustments Lu Baolu
2021-07-20  1:38 ` Lu Baolu
2021-07-20  1:38 ` [PATCH 1/5] iommu/vt-d: Refactor Kconfig a bit Lu Baolu
2021-07-20  1:38   ` Lu Baolu
2021-07-20  1:38 ` [PATCH 2/5] iommu/vt-d: Enable Intel IOMMU scalable mode by default Lu Baolu
2021-07-20  1:38   ` Lu Baolu
2021-07-20  1:38 ` [PATCH 3/5] iommu/vt-d: Preset A/D bits for user space DMA usage Lu Baolu
2021-07-20  1:38   ` Lu Baolu
2021-07-20  1:38 ` [PATCH 4/5] iommu/vt-d: Disallow SVA if devices don't support 64-bit address Lu Baolu
2021-07-20  1:38   ` Lu Baolu
2021-07-20  9:27   ` Robin Murphy [this message]
2021-07-20  9:27     ` Robin Murphy
2021-07-21  1:50     ` Lu Baolu
2021-07-21  1:50       ` Lu Baolu
2021-07-21 11:12       ` Robin Murphy
2021-07-21 11:12         ` Robin Murphy
2021-07-21 14:17         ` Lu Baolu
2021-07-21 14:17           ` Lu Baolu
2021-07-20  1:38 ` [PATCH 5/5] iommu/vt-d: Allow devices to have more than 32 outstanding PRs Lu Baolu
2021-07-20  1:38   ` Lu Baolu

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