* [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf
@ 2024-02-18 9:17 Kunal Joshi
2024-02-18 9:17 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi
` (6 more replies)
0 siblings, 7 replies; 22+ messages in thread
From: Kunal Joshi @ 2024-02-18 9:17 UTC (permalink / raw)
To: igt-dev; +Cc: Kunal Joshi
kmd series [1] adds supports for panel replay selective fetch,
modify lib and kms_psr2_sf to extend kms_psr2_sf tests to validate
panel replay selective fetch as well.
[1] https://patchwork.freedesktop.org/patch/575163/?series=128193&rev=3
Kunal Joshi (3):
lib/igt_psr: modify library to support multiple PSR/PR outputs
lib/igt_psr: add support for PR selective update
tests/intel/kms_psr2_sf: extend tests for panel replay sf
lib/igt_psr.c | 98 +++++++++-------
lib/igt_psr.h | 14 +--
tests/intel/kms_dirtyfb.c | 4 +-
tests/intel/kms_fbcon_fbt.c | 4 +-
tests/intel/kms_frontbuffer_tracking.c | 4 +-
tests/intel/kms_pm_dc.c | 6 +-
tests/intel/kms_psr.c | 4 +-
tests/intel/kms_psr2_sf.c | 155 +++++++++++++++++++------
tests/intel/kms_psr2_su.c | 2 +-
tests/intel/kms_psr_stress_test.c | 4 +-
tests/kms_async_flips.c | 4 +-
tests/kms_cursor_legacy.c | 4 +-
12 files changed, 204 insertions(+), 99 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs 2024-02-18 9:17 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi @ 2024-02-18 9:17 ` Kunal Joshi 2024-02-19 7:45 ` Hogander, Jouni 2024-02-18 9:17 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi ` (5 subsequent siblings) 6 siblings, 1 reply; 22+ messages in thread From: Kunal Joshi @ 2024-02-18 9:17 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy We can have multiple panels connected to the system so PSR information should be exposed per output. changes provide support for multiple PSR/PR to be tested simultaneously. Cc: Jouni Högander <jouni.hogander@intel.com> Cc: Animesh Manna <animesh.manna@intel.com> Cc: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> --- lib/igt_psr.c | 76 ++++++++++++++------------ lib/igt_psr.h | 14 ++--- tests/intel/kms_dirtyfb.c | 4 +- tests/intel/kms_fbcon_fbt.c | 4 +- tests/intel/kms_frontbuffer_tracking.c | 4 +- tests/intel/kms_pm_dc.c | 6 +- tests/intel/kms_psr.c | 4 +- tests/intel/kms_psr2_sf.c | 8 --- tests/intel/kms_psr2_su.c | 2 +- tests/intel/kms_psr_stress_test.c | 4 +- tests/kms_async_flips.c | 4 +- tests/kms_cursor_legacy.c | 4 +- 12 files changed, 65 insertions(+), 69 deletions(-) diff --git a/lib/igt_psr.c b/lib/igt_psr.c index ac214fcfc..cad8cce05 100644 --- a/lib/igt_psr.c +++ b/lib/igt_psr.c @@ -27,6 +27,10 @@ #include "igt_sysfs.h" #include <errno.h> +#define SET_DEBUGFS_PATH(output, path) \ + sprintf(path, "%s%s%s", output ? output->name : "", output ? "/" : "", \ + output ? "i915_psr_status" : "i915_edp_psr_status") + bool psr_disabled_check(int debugfs_fd) { char buf[PSR_STATUS_MAX_LEN]; @@ -37,11 +41,13 @@ bool psr_disabled_check(int debugfs_fd) return strstr(buf, "PSR mode: disabled\n"); } -bool psr2_selective_fetch_check(int debugfs_fd) +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output) { char buf[PSR_STATUS_MAX_LEN]; + char debugfs_file[128] = {0}; - igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf, + SET_DEBUGFS_PATH(output, debugfs_file); + igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); return strstr(buf, "PSR2 selective fetch: enabled"); @@ -54,11 +60,7 @@ static bool psr_active_check(int debugfs_fd, enum psr_mode mode, igt_output_t *o const char *state = (mode == PSR_MODE_1 || mode == PR_MODE) ? "SRDENT" : "DEEP_SLEEP"; int ret; - if (output) - sprintf(debugfs_file, "%s/i915_psr_status", output->name); - else - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); - + SET_DEBUGFS_PATH(output, debugfs_file); ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); if (ret < 0) { @@ -90,13 +92,18 @@ bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *outp return igt_wait(!psr_active_check(debugfs_fd, mode, output), 500, 10); } -static ssize_t psr_write(int debugfs_fd, const char *buf) +static ssize_t psr_write(int debugfs_fd, const char *buf, igt_output_t *output) { + /* + * FIXME: Currently we don't have separate psr_debug file for each output. + * so, we are using i915_edp_psr_debug file for all outputs. + * Later we need to add support for separate psr_debug file for each output. + */ return igt_sysfs_write(debugfs_fd, "i915_edp_psr_debug", buf, - strlen(buf)); + strlen(buf)); } -static int has_psr_debugfs(int debugfs_fd) +static int has_psr_debugfs(int debugfs_fd, igt_output_t *output) { int ret; @@ -105,7 +112,7 @@ static int has_psr_debugfs(int debugfs_fd) * Legacy mode will return OK here, debugfs api will return -EINVAL. * -ENODEV is returned when PSR is unavailable. */ - ret = psr_write(debugfs_fd, "0xf"); + ret = psr_write(debugfs_fd, "0xf", output); if (ret == -EINVAL) { errno = 0; return 0; @@ -113,7 +120,7 @@ static int has_psr_debugfs(int debugfs_fd) return ret; /* legacy debugfs api, we enabled irqs by writing, disable them. */ - psr_write(debugfs_fd, "0"); + psr_write(debugfs_fd, "0", output); return -EINVAL; } @@ -134,14 +141,14 @@ static int psr_restore_debugfs_fd = -1; static void restore_psr_debugfs(int sig) { - psr_write(psr_restore_debugfs_fd, "0"); + psr_write(psr_restore_debugfs_fd, "0", NULL); } -static bool psr_set(int device, int debugfs_fd, int mode) +static bool psr_set(int device, int debugfs_fd, int mode, igt_output_t *output) { int ret; - ret = has_psr_debugfs(debugfs_fd); + ret = has_psr_debugfs(debugfs_fd, output); if (ret == -ENODEV) { igt_skip("PSR not available\n"); return false; @@ -179,7 +186,7 @@ static bool psr_set(int device, int debugfs_fd, int mode) debug_val = "0x1"; } - ret = psr_write(debugfs_fd, debug_val); + ret = psr_write(debugfs_fd, debug_val, output); igt_require_f(ret > 0, "PSR2 SF feature not available\n"); } @@ -193,15 +200,15 @@ static bool psr_set(int device, int debugfs_fd, int mode) return ret; } -bool psr_enable(int device, int debugfs_fd, enum psr_mode mode) +bool psr_enable(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output) { - return psr_set(device, debugfs_fd, mode); + return psr_set(device, debugfs_fd, mode, output); } -bool psr_disable(int device, int debugfs_fd) +bool psr_disable(int device, int debugfs_fd, igt_output_t *output) { /* Any mode different than PSR_MODE_1/2 will disable PSR */ - return psr_set(device, debugfs_fd, -1); + return psr_set(device, debugfs_fd, -1, output); } bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output) @@ -211,11 +218,7 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output char buf[PSR_STATUS_MAX_LEN]; int ret; - if (output) - sprintf(debugfs_file, "%s/i915_psr_status", output->name); - else - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); - + SET_DEBUGFS_PATH(output, debugfs_file); ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); if (ret < 1) @@ -305,7 +308,7 @@ void psr_print_debugfs(int debugfs_fd) igt_info("%s", buf); } -bool i915_psr2_selective_fetch_check(int drm_fd) +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output) { int debugfs_fd; bool ret; @@ -314,7 +317,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) return false; debugfs_fd = igt_debugfs_dir(drm_fd); - ret = psr2_selective_fetch_check(debugfs_fd); + ret = psr2_selective_fetch_check(debugfs_fd, output); close(debugfs_fd); return ret; @@ -331,7 +334,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) * Returns: * True if PSR mode changed to PSR1, false otherwise. */ -bool i915_psr2_sel_fetch_to_psr1(int drm_fd) +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) { int debugfs_fd; bool ret = false; @@ -340,8 +343,8 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) return ret; debugfs_fd = igt_debugfs_dir(drm_fd); - if (psr2_selective_fetch_check(debugfs_fd)) { - psr_set(drm_fd, debugfs_fd, PSR_MODE_1); + if (psr2_selective_fetch_check(debugfs_fd, output)) { + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); ret = true; } @@ -355,12 +358,12 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) * Restore PSR2 selective fetch after tests were executed, this function should * only be called if i915_psr2_sel_fetch_to_psr1() returned true. */ -void i915_psr2_sel_fetch_restore(int drm_fd) +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) { int debugfs_fd; debugfs_fd = igt_debugfs_dir(drm_fd); - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH); + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); close(debugfs_fd); } @@ -369,16 +372,17 @@ void i915_psr2_sel_fetch_restore(int drm_fd) * * Return the current PSR mode. */ -enum psr_mode psr_get_mode(int debugfs_fd) +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) { char buf[PSR_STATUS_MAX_LEN]; + char debugfs_file[128] = {0}; int ret; - - ret = igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf, + SET_DEBUGFS_PATH(output, debugfs_file); + ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); if (ret < 0) { - igt_info("Could not read i915_edp_psr_status: %s\n", + igt_info("Could not read psr status: %s\n", strerror(-ret)); return PSR_DISABLED; } diff --git a/lib/igt_psr.h b/lib/igt_psr.h index 82a4e8c5e..372bef2b2 100644 --- a/lib/igt_psr.h +++ b/lib/igt_psr.h @@ -46,21 +46,21 @@ enum fbc_mode { }; bool psr_disabled_check(int debugfs_fd); -bool psr2_selective_fetch_check(int debugfs_fd); +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output); bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); -bool psr_enable(int device, int debugfs_fd, enum psr_mode); -bool psr_disable(int device, int debugfs_fd); +bool psr_enable(int device, int debugfs_fd, enum psr_mode, igt_output_t *output); +bool psr_disable(int device, int debugfs_fd, igt_output_t *output); bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr2_wait_su(int debugfs_fd, uint16_t *num_su_blocks); void psr_print_debugfs(int debugfs_fd); -enum psr_mode psr_get_mode(int debugfs_fd); +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output); -bool i915_psr2_selective_fetch_check(int drm_fd); +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output); -bool i915_psr2_sel_fetch_to_psr1(int drm_fd); -void i915_psr2_sel_fetch_restore(int drm_fd); +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output); +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); #endif diff --git a/tests/intel/kms_dirtyfb.c b/tests/intel/kms_dirtyfb.c index 26b82e50a..c2411c824 100644 --- a/tests/intel/kms_dirtyfb.c +++ b/tests/intel/kms_dirtyfb.c @@ -127,7 +127,7 @@ static void enable_feature(data_t *data) intel_fbc_enable(data->drm_fd); break; case FEATURE_PSR: - psr_enable(data->drm_fd, data->debugfs_fd, PSR_MODE_1); + psr_enable(data->drm_fd, data->debugfs_fd, PSR_MODE_1, NULL); break; case FEATURE_DRRS: intel_drrs_enable(data->drm_fd, data->pipe); @@ -167,7 +167,7 @@ static void check_feature(data_t *data) static void disable_features(data_t *data) { intel_fbc_disable(data->drm_fd); - psr_disable(data->drm_fd, data->debugfs_fd); + psr_disable(data->drm_fd, data->debugfs_fd, NULL); intel_drrs_disable(data->drm_fd, data->pipe); } diff --git a/tests/intel/kms_fbcon_fbt.c b/tests/intel/kms_fbcon_fbt.c index 90484dccf..71e42f19c 100644 --- a/tests/intel/kms_fbcon_fbt.c +++ b/tests/intel/kms_fbcon_fbt.c @@ -277,7 +277,7 @@ static void disable_features(int device, int debugfs_fd) { igt_set_module_param_int(device, "enable_fbc", 0); if (psr_sink_support(device, debugfs_fd, PSR_MODE_1, NULL)) - psr_disable(device, debugfs_fd); + psr_disable(device, debugfs_fd, NULL); } static inline void fbc_modparam_enable(int device, int debugfs_fd) @@ -287,7 +287,7 @@ static inline void fbc_modparam_enable(int device, int debugfs_fd) static inline void psr_debugfs_enable(int device, int debugfs_fd) { - psr_enable(device, debugfs_fd, PSR_MODE_1); + psr_enable(device, debugfs_fd, PSR_MODE_1, NULL); } static void fbc_skips_on_fbcon(int debugfs_fd) diff --git a/tests/intel/kms_frontbuffer_tracking.c b/tests/intel/kms_frontbuffer_tracking.c index 912cca3f8..023843161 100644 --- a/tests/intel/kms_frontbuffer_tracking.c +++ b/tests/intel/kms_frontbuffer_tracking.c @@ -2234,7 +2234,7 @@ static bool disable_features(const struct test_mode *t) intel_fbc_disable(drm.fd); intel_drrs_disable(drm.fd, prim_mode_params.pipe); - return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : false; + return psr.can_test ? psr_disable(drm.fd, drm.debugfs, NULL) : false; } static void *busy_thread_func(void *data) @@ -2867,7 +2867,7 @@ static bool enable_features_for_test(const struct test_mode *t) if (t->feature & FEATURE_FBC) intel_fbc_enable(drm.fd); if (t->feature & FEATURE_PSR) - ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1); + ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1, NULL); if (t->feature & FEATURE_DRRS) intel_drrs_enable(drm.fd, prim_mode_params.pipe); diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c index 0d5824e67..7deebf83d 100644 --- a/tests/intel/kms_pm_dc.c +++ b/tests/intel/kms_pm_dc.c @@ -362,7 +362,7 @@ static void require_dc_counter(int debugfs_fd, int dc_flag) static void setup_dc3co(data_t *data) { data->op_psr_mode = PSR_MODE_2; - psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode); + psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, NULL); igt_require_f(psr_wait_entry(data->debugfs_fd, data->op_psr_mode, NULL), "PSR2 is not enabled\n"); } @@ -665,7 +665,7 @@ igt_main igt_require(psr_sink_support(data.drm_fd, data.debugfs_fd, PSR_MODE_1, NULL)); data.op_psr_mode = PSR_MODE_1; - psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode); + psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode, NULL); test_dc_state_psr(&data, CHECK_DC5); } @@ -675,7 +675,7 @@ igt_main igt_require(psr_sink_support(data.drm_fd, data.debugfs_fd, PSR_MODE_1, NULL)); data.op_psr_mode = PSR_MODE_1; - psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode); + psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode, NULL); igt_require_f(igt_pm_pc8_plus_residencies_enabled(data.msr_fd), "PC8+ residencies not supported\n"); if (intel_display_ver(data.devid) >= 14) diff --git a/tests/intel/kms_psr.c b/tests/intel/kms_psr.c index 521d4c708..3822b3081 100644 --- a/tests/intel/kms_psr.c +++ b/tests/intel/kms_psr.c @@ -519,7 +519,7 @@ static bool psr_enable_if_enabled(data_t *data) igt_skip("enable_psr modparam doesn't allow psr mode %d\n", data->op_psr_mode); - return psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode); + return psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, data->output); } static inline void manual(const char *expected) @@ -658,6 +658,7 @@ static void test_cleanup(data_t *data) igt_remove_fb(data->drm_fd, &data->fb_green); igt_remove_fb(data->drm_fd, &data->fb_white); + psr_disable(data->drm_fd, data->debugfs_fd, data->output); } static void setup_test_plane(data_t *data, int test_plane) @@ -976,7 +977,6 @@ igt_main } igt_fixture { - psr_disable(data.drm_fd, data.debugfs_fd); close(data.debugfs_fd); buf_ops_destroy(data.bops); diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c index ecf9ad77f..8e6a9e02c 100644 --- a/tests/intel/kms_psr2_sf.c +++ b/tests/intel/kms_psr2_sf.c @@ -1012,11 +1012,6 @@ igt_main data.fbc_flag = true; } - /* Test if PSR2 can be enabled */ - igt_require_f(psr_enable(data.drm_fd, - data.debugfs_fd, PSR_MODE_2_SEL_FETCH), - "Error enabling PSR2\n"); - data.damage_area_count = MAX_DAMAGE_AREAS; data.primary_format = DRM_FORMAT_XRGB8888; @@ -1026,9 +1021,6 @@ igt_main igt_info("Big framebuffer size %dx%d\n", data.big_fb_width, data.big_fb_height); - igt_require_f(psr2_selective_fetch_check(data.debugfs_fd), - "PSR2 selective fetch not enabled\n"); - for_each_pipe_with_valid_output(&data.display, data.pipe, data.output) { coexist_features[n_pipes] = 0; if (check_psr2_support(&data)) { diff --git a/tests/intel/kms_psr2_su.c b/tests/intel/kms_psr2_su.c index 936b5beb3..437ee36f6 100644 --- a/tests/intel/kms_psr2_su.c +++ b/tests/intel/kms_psr2_su.c @@ -338,7 +338,7 @@ igt_main /* Test if PSR2 can be enabled */ igt_require_f(psr_enable(data.drm_fd, - data.debugfs_fd, PSR_MODE_2), + data.debugfs_fd, PSR_MODE_2, NULL), "Error enabling PSR2\n"); data.op = FRONTBUFFER; data.format = DRM_FORMAT_XRGB8888; diff --git a/tests/intel/kms_psr_stress_test.c b/tests/intel/kms_psr_stress_test.c index 7aea8e8a5..bca3bd513 100644 --- a/tests/intel/kms_psr_stress_test.c +++ b/tests/intel/kms_psr_stress_test.c @@ -230,7 +230,7 @@ static void prepare(data_t *data) r = timerfd_settime(data->completed_timerfd, 0, &interval, NULL); igt_require_f(r != -1, "Error setting completed_timerfd\n"); - data->initial_state = psr_get_mode(data->debugfs_fd); + data->initial_state = psr_get_mode(data->debugfs_fd, NULL); igt_require(data->initial_state != PSR_DISABLED); igt_require(psr_wait_entry(data->debugfs_fd, data->initial_state, NULL)); } @@ -343,7 +343,7 @@ static void run(data_t *data) } /* Check if after all this stress the PSR is still in the same state */ - igt_assert(psr_get_mode(data->debugfs_fd) == data->initial_state); + igt_assert(psr_get_mode(data->debugfs_fd, NULL) == data->initial_state); } igt_main diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c index a0349fa03..2895168f7 100644 --- a/tests/kms_async_flips.c +++ b/tests/kms_async_flips.c @@ -391,7 +391,7 @@ static void test_cursor(data_t *data) * necessary, causing the async flip to fail because async flip is not * supported in cursor plane. */ - igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd), + igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd, NULL), "PSR2 sel fetch causes cursor to be added to primary plane " \ "pages flips and async flip is not supported in cursor\n"); @@ -704,7 +704,7 @@ igt_main * necessary, causing the async flip to fail because async flip is not * supported in cursor plane. */ - igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_fd), + igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_fd, NULL), "PSR2 sel fetch causes cursor to be added to primary plane " \ "pages flips and async flip is not supported in cursor\n"); diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c index 0017659d4..a430f735a 100644 --- a/tests/kms_cursor_legacy.c +++ b/tests/kms_cursor_legacy.c @@ -1849,7 +1849,7 @@ igt_main * page flip with cursor legacy APIS when Intel's PSR2 selective * fetch is enabled, so switching PSR1 for this whole test. */ - intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd); + intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); } igt_describe("Test checks how many cursor updates we can fit between vblanks " @@ -2074,7 +2074,7 @@ igt_main igt_fixture { if (intel_psr2_restore) - i915_psr2_sel_fetch_restore(display.drm_fd); + i915_psr2_sel_fetch_restore(display.drm_fd, NULL); igt_display_fini(&display); drm_close_driver(display.drm_fd); } -- 2.25.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs 2024-02-18 9:17 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi @ 2024-02-19 7:45 ` Hogander, Jouni 2024-02-19 8:07 ` Joshi, Kunal1 0 siblings, 1 reply; 22+ messages in thread From: Hogander, Jouni @ 2024-02-19 7:45 UTC (permalink / raw) To: Joshi, Kunal1, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote: > We can have multiple panels connected to the system so PSR > information > should be exposed per output. changes provide support for multiple > PSR/PR to be tested simultaneously. > > Cc: Jouni Högander <jouni.hogander@intel.com> > Cc: Animesh Manna <animesh.manna@intel.com> > Cc: Arun R Murthy <arun.r.murthy@intel.com> > Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> > --- > lib/igt_psr.c | 76 ++++++++++++++---------- > -- > lib/igt_psr.h | 14 ++--- > tests/intel/kms_dirtyfb.c | 4 +- > tests/intel/kms_fbcon_fbt.c | 4 +- > tests/intel/kms_frontbuffer_tracking.c | 4 +- > tests/intel/kms_pm_dc.c | 6 +- > tests/intel/kms_psr.c | 4 +- > tests/intel/kms_psr2_sf.c | 8 --- > tests/intel/kms_psr2_su.c | 2 +- > tests/intel/kms_psr_stress_test.c | 4 +- > tests/kms_async_flips.c | 4 +- > tests/kms_cursor_legacy.c | 4 +- > 12 files changed, 65 insertions(+), 69 deletions(-) > > diff --git a/lib/igt_psr.c b/lib/igt_psr.c > index ac214fcfc..cad8cce05 100644 > --- a/lib/igt_psr.c > +++ b/lib/igt_psr.c > @@ -27,6 +27,10 @@ > #include "igt_sysfs.h" > #include <errno.h> > > +#define SET_DEBUGFS_PATH(output, path) \ > + sprintf(path, "%s%s%s", output ? output->name : "", output ? > "/" : "", \ > + output ? "i915_psr_status" : > "i915_edp_psr_status") > + > bool psr_disabled_check(int debugfs_fd) > { > char buf[PSR_STATUS_MAX_LEN]; > @@ -37,11 +41,13 @@ bool psr_disabled_check(int debugfs_fd) > return strstr(buf, "PSR mode: disabled\n"); > } > > -bool psr2_selective_fetch_check(int debugfs_fd) > +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > *output) > { > char buf[PSR_STATUS_MAX_LEN]; > + char debugfs_file[128] = {0}; > > - igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", > buf, > + SET_DEBUGFS_PATH(output, debugfs_file); > + igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, > sizeof(buf)); > > return strstr(buf, "PSR2 selective fetch: enabled"); > @@ -54,11 +60,7 @@ static bool psr_active_check(int debugfs_fd, enum > psr_mode mode, igt_output_t *o > const char *state = (mode == PSR_MODE_1 || mode == PR_MODE) ? > "SRDENT" : "DEEP_SLEEP"; > int ret; > > - if (output) > - sprintf(debugfs_file, "%s/i915_psr_status", output- > >name); > - else > - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); > - > + SET_DEBUGFS_PATH(output, debugfs_file); > ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, > buf, sizeof(buf)); > if (ret < 0) { > @@ -90,13 +92,18 @@ bool psr_long_wait_update(int debugfs_fd, enum > psr_mode mode, igt_output_t *outp > return igt_wait(!psr_active_check(debugfs_fd, mode, output), > 500, 10); > } > > -static ssize_t psr_write(int debugfs_fd, const char *buf) > +static ssize_t psr_write(int debugfs_fd, const char *buf, > igt_output_t *output) > { > + /* > + * FIXME: Currently we don't have separate psr_debug file for > each output. > + * so, we are using i915_edp_psr_debug file for all outputs. > + * Later we need to add support for separate psr_debug file > for each output. > + */ > return igt_sysfs_write(debugfs_fd, "i915_edp_psr_debug", buf, > - strlen(buf)); > + strlen(buf)); > } > > -static int has_psr_debugfs(int debugfs_fd) > +static int has_psr_debugfs(int debugfs_fd, igt_output_t *output) > { > int ret; > > @@ -105,7 +112,7 @@ static int has_psr_debugfs(int debugfs_fd) > * Legacy mode will return OK here, debugfs api will return - > EINVAL. > * -ENODEV is returned when PSR is unavailable. > */ > - ret = psr_write(debugfs_fd, "0xf"); > + ret = psr_write(debugfs_fd, "0xf", output); > if (ret == -EINVAL) { > errno = 0; > return 0; > @@ -113,7 +120,7 @@ static int has_psr_debugfs(int debugfs_fd) > return ret; > > /* legacy debugfs api, we enabled irqs by writing, disable > them. */ > - psr_write(debugfs_fd, "0"); > + psr_write(debugfs_fd, "0", output); > return -EINVAL; > } > > @@ -134,14 +141,14 @@ static int psr_restore_debugfs_fd = -1; > > static void restore_psr_debugfs(int sig) > { > - psr_write(psr_restore_debugfs_fd, "0"); > + psr_write(psr_restore_debugfs_fd, "0", NULL); > } > > -static bool psr_set(int device, int debugfs_fd, int mode) > +static bool psr_set(int device, int debugfs_fd, int mode, > igt_output_t *output) > { > int ret; > > - ret = has_psr_debugfs(debugfs_fd); > + ret = has_psr_debugfs(debugfs_fd, output); > if (ret == -ENODEV) { > igt_skip("PSR not available\n"); > return false; > @@ -179,7 +186,7 @@ static bool psr_set(int device, int debugfs_fd, > int mode) > debug_val = "0x1"; > } > > - ret = psr_write(debugfs_fd, debug_val); > + ret = psr_write(debugfs_fd, debug_val, output); > igt_require_f(ret > 0, "PSR2 SF feature not > available\n"); > } > > @@ -193,15 +200,15 @@ static bool psr_set(int device, int debugfs_fd, > int mode) > return ret; > } > > -bool psr_enable(int device, int debugfs_fd, enum psr_mode mode) > +bool psr_enable(int device, int debugfs_fd, enum psr_mode mode, > igt_output_t *output) > { > - return psr_set(device, debugfs_fd, mode); > + return psr_set(device, debugfs_fd, mode, output); > } > > -bool psr_disable(int device, int debugfs_fd) > +bool psr_disable(int device, int debugfs_fd, igt_output_t *output) > { > /* Any mode different than PSR_MODE_1/2 will disable PSR */ > - return psr_set(device, debugfs_fd, -1); > + return psr_set(device, debugfs_fd, -1, output); > } > > bool psr_sink_support(int device, int debugfs_fd, enum psr_mode > mode, igt_output_t *output) > @@ -211,11 +218,7 @@ bool psr_sink_support(int device, int > debugfs_fd, enum psr_mode mode, igt_output > char buf[PSR_STATUS_MAX_LEN]; > int ret; > > - if (output) > - sprintf(debugfs_file, "%s/i915_psr_status", output- > >name); > - else > - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); > - > + SET_DEBUGFS_PATH(output, debugfs_file); > ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, > sizeof(buf)); > if (ret < 1) > @@ -305,7 +308,7 @@ void psr_print_debugfs(int debugfs_fd) > igt_info("%s", buf); > } > > -bool i915_psr2_selective_fetch_check(int drm_fd) > +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t > *output) > { > int debugfs_fd; > bool ret; > @@ -314,7 +317,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) > return false; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - ret = psr2_selective_fetch_check(debugfs_fd); > + ret = psr2_selective_fetch_check(debugfs_fd, output); > close(debugfs_fd); > > return ret; > @@ -331,7 +334,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) > * Returns: > * True if PSR mode changed to PSR1, false otherwise. > */ > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd) > +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) > { > int debugfs_fd; > bool ret = false; > @@ -340,8 +343,8 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) > return ret; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - if (psr2_selective_fetch_check(debugfs_fd)) { > - psr_set(drm_fd, debugfs_fd, PSR_MODE_1); > + if (psr2_selective_fetch_check(debugfs_fd, output)) { > + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); > ret = true; > } > > @@ -355,12 +358,12 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) > * Restore PSR2 selective fetch after tests were executed, this > function should > * only be called if i915_psr2_sel_fetch_to_psr1() returned true. > */ > -void i915_psr2_sel_fetch_restore(int drm_fd) > +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) > { > int debugfs_fd; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH); > + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); > close(debugfs_fd); > } > > @@ -369,16 +372,17 @@ void i915_psr2_sel_fetch_restore(int drm_fd) > * > * Return the current PSR mode. > */ > -enum psr_mode psr_get_mode(int debugfs_fd) > +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) > { > char buf[PSR_STATUS_MAX_LEN]; > + char debugfs_file[128] = {0}; > int ret; > > - > - ret = igt_debugfs_simple_read(debugfs_fd, > "i915_edp_psr_status", buf, > + SET_DEBUGFS_PATH(output, debugfs_file); > + ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, > sizeof(buf)); > if (ret < 0) { > - igt_info("Could not read i915_edp_psr_status: %s\n", > + igt_info("Could not read psr status: %s\n", > strerror(-ret)); > return PSR_DISABLED; > } > diff --git a/lib/igt_psr.h b/lib/igt_psr.h > index 82a4e8c5e..372bef2b2 100644 > --- a/lib/igt_psr.h > +++ b/lib/igt_psr.h > @@ -46,21 +46,21 @@ enum fbc_mode { > }; > > bool psr_disabled_check(int debugfs_fd); > -bool psr2_selective_fetch_check(int debugfs_fd); > +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > *output); > bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t > *output); > bool psr_wait_update(int debugfs_fd, enum psr_mode mode, > igt_output_t *output); > bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, > igt_output_t *output); > -bool psr_enable(int device, int debugfs_fd, enum psr_mode); > -bool psr_disable(int device, int debugfs_fd); > +bool psr_enable(int device, int debugfs_fd, enum psr_mode, > igt_output_t *output); > +bool psr_disable(int device, int debugfs_fd, igt_output_t *output); > bool psr_sink_support(int device, int debugfs_fd, enum psr_mode > mode, igt_output_t *output); > bool psr2_wait_su(int debugfs_fd, uint16_t *num_su_blocks); > void psr_print_debugfs(int debugfs_fd); > -enum psr_mode psr_get_mode(int debugfs_fd); > +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output); > > -bool i915_psr2_selective_fetch_check(int drm_fd); > +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t > *output); > > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd); > -void i915_psr2_sel_fetch_restore(int drm_fd); > +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output); > +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); > bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); > > #endif > diff --git a/tests/intel/kms_dirtyfb.c b/tests/intel/kms_dirtyfb.c > index 26b82e50a..c2411c824 100644 > --- a/tests/intel/kms_dirtyfb.c > +++ b/tests/intel/kms_dirtyfb.c > @@ -127,7 +127,7 @@ static void enable_feature(data_t *data) > intel_fbc_enable(data->drm_fd); > break; > case FEATURE_PSR: > - psr_enable(data->drm_fd, data->debugfs_fd, > PSR_MODE_1); > + psr_enable(data->drm_fd, data->debugfs_fd, > PSR_MODE_1, NULL); > break; > case FEATURE_DRRS: > intel_drrs_enable(data->drm_fd, data->pipe); > @@ -167,7 +167,7 @@ static void check_feature(data_t *data) > static void disable_features(data_t *data) > { > intel_fbc_disable(data->drm_fd); > - psr_disable(data->drm_fd, data->debugfs_fd); > + psr_disable(data->drm_fd, data->debugfs_fd, NULL); > intel_drrs_disable(data->drm_fd, data->pipe); > } > > diff --git a/tests/intel/kms_fbcon_fbt.c > b/tests/intel/kms_fbcon_fbt.c > index 90484dccf..71e42f19c 100644 > --- a/tests/intel/kms_fbcon_fbt.c > +++ b/tests/intel/kms_fbcon_fbt.c > @@ -277,7 +277,7 @@ static void disable_features(int device, int > debugfs_fd) > { > igt_set_module_param_int(device, "enable_fbc", 0); > if (psr_sink_support(device, debugfs_fd, PSR_MODE_1, NULL)) > - psr_disable(device, debugfs_fd); > + psr_disable(device, debugfs_fd, NULL); > } > > static inline void fbc_modparam_enable(int device, int debugfs_fd) > @@ -287,7 +287,7 @@ static inline void fbc_modparam_enable(int > device, int debugfs_fd) > > static inline void psr_debugfs_enable(int device, int debugfs_fd) > { > - psr_enable(device, debugfs_fd, PSR_MODE_1); > + psr_enable(device, debugfs_fd, PSR_MODE_1, NULL); > } > > static void fbc_skips_on_fbcon(int debugfs_fd) > diff --git a/tests/intel/kms_frontbuffer_tracking.c > b/tests/intel/kms_frontbuffer_tracking.c > index 912cca3f8..023843161 100644 > --- a/tests/intel/kms_frontbuffer_tracking.c > +++ b/tests/intel/kms_frontbuffer_tracking.c > @@ -2234,7 +2234,7 @@ static bool disable_features(const struct > test_mode *t) > intel_fbc_disable(drm.fd); > intel_drrs_disable(drm.fd, prim_mode_params.pipe); > > - return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : > false; > + return psr.can_test ? psr_disable(drm.fd, drm.debugfs, NULL) > : false; > } > > static void *busy_thread_func(void *data) > @@ -2867,7 +2867,7 @@ static bool enable_features_for_test(const > struct test_mode *t) > if (t->feature & FEATURE_FBC) > intel_fbc_enable(drm.fd); > if (t->feature & FEATURE_PSR) > - ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1); > + ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1, > NULL); > if (t->feature & FEATURE_DRRS) > intel_drrs_enable(drm.fd, prim_mode_params.pipe); > > diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c > index 0d5824e67..7deebf83d 100644 > --- a/tests/intel/kms_pm_dc.c > +++ b/tests/intel/kms_pm_dc.c > @@ -362,7 +362,7 @@ static void require_dc_counter(int debugfs_fd, > int dc_flag) > static void setup_dc3co(data_t *data) > { > data->op_psr_mode = PSR_MODE_2; > - psr_enable(data->drm_fd, data->debugfs_fd, data- > >op_psr_mode); > + psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, > NULL); > igt_require_f(psr_wait_entry(data->debugfs_fd, data- > >op_psr_mode, NULL), > "PSR2 is not enabled\n"); > } > @@ -665,7 +665,7 @@ igt_main > igt_require(psr_sink_support(data.drm_fd, > data.debugfs_fd, > PSR_MODE_1, NULL)); > data.op_psr_mode = PSR_MODE_1; > - psr_enable(data.drm_fd, data.debugfs_fd, > data.op_psr_mode); > + psr_enable(data.drm_fd, data.debugfs_fd, > data.op_psr_mode, NULL); > test_dc_state_psr(&data, CHECK_DC5); > } > > @@ -675,7 +675,7 @@ igt_main > igt_require(psr_sink_support(data.drm_fd, > data.debugfs_fd, > PSR_MODE_1, NULL)); > data.op_psr_mode = PSR_MODE_1; > - psr_enable(data.drm_fd, data.debugfs_fd, > data.op_psr_mode); > + psr_enable(data.drm_fd, data.debugfs_fd, > data.op_psr_mode, NULL); > igt_require_f(igt_pm_pc8_plus_residencies_enabled(dat > a.msr_fd), > "PC8+ residencies not supported\n"); > if (intel_display_ver(data.devid) >= 14) > diff --git a/tests/intel/kms_psr.c b/tests/intel/kms_psr.c > index 521d4c708..3822b3081 100644 > --- a/tests/intel/kms_psr.c > +++ b/tests/intel/kms_psr.c > @@ -519,7 +519,7 @@ static bool psr_enable_if_enabled(data_t *data) > igt_skip("enable_psr modparam doesn't allow psr mode > %d\n", > data->op_psr_mode); > > - return psr_enable(data->drm_fd, data->debugfs_fd, data- > >op_psr_mode); > + return psr_enable(data->drm_fd, data->debugfs_fd, data- > >op_psr_mode, data->output); > } > > static inline void manual(const char *expected) > @@ -658,6 +658,7 @@ static void test_cleanup(data_t *data) > > igt_remove_fb(data->drm_fd, &data->fb_green); > igt_remove_fb(data->drm_fd, &data->fb_white); > + psr_disable(data->drm_fd, data->debugfs_fd, data->output); > } > > static void setup_test_plane(data_t *data, int test_plane) > @@ -976,7 +977,6 @@ igt_main > } > > igt_fixture { > - psr_disable(data.drm_fd, data.debugfs_fd); > close(data.debugfs_fd); > buf_ops_destroy(data.bops); > diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c > index ecf9ad77f..8e6a9e02c 100644 > --- a/tests/intel/kms_psr2_sf.c > +++ b/tests/intel/kms_psr2_sf.c > @@ -1012,11 +1012,6 @@ igt_main > data.fbc_flag = true; > } > > - /* Test if PSR2 can be enabled */ > - igt_require_f(psr_enable(data.drm_fd, > - data.debugfs_fd, > PSR_MODE_2_SEL_FETCH), > - "Error enabling PSR2\n"); > - I started to think it might actually not make sense to remove this. Currently kms_psr2_sf is skipped if psr debugfs interface doesn't exist. I.e. PSR is not supported by the platform. This is with reasonable info "PSR not available". After your change it will assert below as debugfs entry can't be opened. BR, Jouni Högander > data.damage_area_count = MAX_DAMAGE_AREAS; > data.primary_format = DRM_FORMAT_XRGB8888; > > @@ -1026,9 +1021,6 @@ igt_main > igt_info("Big framebuffer size %dx%d\n", > data.big_fb_width, data.big_fb_height); > > - > igt_require_f(psr2_selective_fetch_check(data.debugfs_f > d), > - "PSR2 selective fetch not enabled\n"); > - > for_each_pipe_with_valid_output(&data.display, > data.pipe, data.output) { > coexist_features[n_pipes] = 0; > if (check_psr2_support(&data)) { > diff --git a/tests/intel/kms_psr2_su.c b/tests/intel/kms_psr2_su.c > index 936b5beb3..437ee36f6 100644 > --- a/tests/intel/kms_psr2_su.c > +++ b/tests/intel/kms_psr2_su.c > @@ -338,7 +338,7 @@ igt_main > > /* Test if PSR2 can be enabled */ > igt_require_f(psr_enable(data.drm_fd, > - data.debugfs_fd, > PSR_MODE_2), > + data.debugfs_fd, PSR_MODE_2, > NULL), > "Error enabling PSR2\n"); > data.op = FRONTBUFFER; > data.format = DRM_FORMAT_XRGB8888; > diff --git a/tests/intel/kms_psr_stress_test.c > b/tests/intel/kms_psr_stress_test.c > index 7aea8e8a5..bca3bd513 100644 > --- a/tests/intel/kms_psr_stress_test.c > +++ b/tests/intel/kms_psr_stress_test.c > @@ -230,7 +230,7 @@ static void prepare(data_t *data) > r = timerfd_settime(data->completed_timerfd, 0, &interval, > NULL); > igt_require_f(r != -1, "Error setting completed_timerfd\n"); > > - data->initial_state = psr_get_mode(data->debugfs_fd); > + data->initial_state = psr_get_mode(data->debugfs_fd, NULL); > igt_require(data->initial_state != PSR_DISABLED); > igt_require(psr_wait_entry(data->debugfs_fd, data- > >initial_state, NULL)); > } > @@ -343,7 +343,7 @@ static void run(data_t *data) > } > > /* Check if after all this stress the PSR is still in the > same state */ > - igt_assert(psr_get_mode(data->debugfs_fd) == data- > >initial_state); > + igt_assert(psr_get_mode(data->debugfs_fd, NULL) == data- > >initial_state); > } > > igt_main > diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c > index a0349fa03..2895168f7 100644 > --- a/tests/kms_async_flips.c > +++ b/tests/kms_async_flips.c > @@ -391,7 +391,7 @@ static void test_cursor(data_t *data) > * necessary, causing the async flip to fail because async > flip is not > * supported in cursor plane. > */ > - igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd), > + igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd, > NULL), > "PSR2 sel fetch causes cursor to be added to > primary plane " \ > "pages flips and async flip is not supported in > cursor\n"); > > @@ -704,7 +704,7 @@ igt_main > * necessary, causing the async flip to fail because > async flip is not > * supported in cursor plane. > */ > - > igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_ > fd), > + igt_skip_on_f(i915_psr2_selective_fetch_check(data.dr > m_fd, NULL), > "PSR2 sel fetch causes cursor to be > added to primary plane " \ > "pages flips and async flip is not > supported in cursor\n"); > > diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c > index 0017659d4..a430f735a 100644 > --- a/tests/kms_cursor_legacy.c > +++ b/tests/kms_cursor_legacy.c > @@ -1849,7 +1849,7 @@ igt_main > * page flip with cursor legacy APIS when Intel's > PSR2 selective > * fetch is enabled, so switching PSR1 for this whole > test. > */ > - intel_psr2_restore = > i915_psr2_sel_fetch_to_psr1(display.drm_fd); > + intel_psr2_restore = > i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); > } > > igt_describe("Test checks how many cursor updates we can fit > between vblanks " > @@ -2074,7 +2074,7 @@ igt_main > > igt_fixture { > if (intel_psr2_restore) > - i915_psr2_sel_fetch_restore(display.drm_fd); > + i915_psr2_sel_fetch_restore(display.drm_fd, > NULL); > igt_display_fini(&display); > drm_close_driver(display.drm_fd); > } ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs 2024-02-19 7:45 ` Hogander, Jouni @ 2024-02-19 8:07 ` Joshi, Kunal1 2024-02-19 8:33 ` Hogander, Jouni 0 siblings, 1 reply; 22+ messages in thread From: Joshi, Kunal1 @ 2024-02-19 8:07 UTC (permalink / raw) To: Hogander, Jouni, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh Hello Jouni, On 2/19/2024 1:15 PM, Hogander, Jouni wrote: > On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote: >> We can have multiple panels connected to the system so PSR >> information >> should be exposed per output. changes provide support for multiple >> PSR/PR to be tested simultaneously. >> >> Cc: Jouni Högander <jouni.hogander@intel.com> >> Cc: Animesh Manna <animesh.manna@intel.com> >> Cc: Arun R Murthy <arun.r.murthy@intel.com> >> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> >> --- >> lib/igt_psr.c | 76 ++++++++++++++---------- >> -- >> lib/igt_psr.h | 14 ++--- >> tests/intel/kms_dirtyfb.c | 4 +- >> tests/intel/kms_fbcon_fbt.c | 4 +- >> tests/intel/kms_frontbuffer_tracking.c | 4 +- >> tests/intel/kms_pm_dc.c | 6 +- >> tests/intel/kms_psr.c | 4 +- >> tests/intel/kms_psr2_sf.c | 8 --- >> tests/intel/kms_psr2_su.c | 2 +- >> tests/intel/kms_psr_stress_test.c | 4 +- >> tests/kms_async_flips.c | 4 +- >> tests/kms_cursor_legacy.c | 4 +- >> 12 files changed, 65 insertions(+), 69 deletions(-) >> >> diff --git a/lib/igt_psr.c b/lib/igt_psr.c >> index ac214fcfc..cad8cce05 100644 >> --- a/lib/igt_psr.c >> +++ b/lib/igt_psr.c >> @@ -27,6 +27,10 @@ >> #include "igt_sysfs.h" >> #include <errno.h> >> >> +#define SET_DEBUGFS_PATH(output, path) \ >> + sprintf(path, "%s%s%s", output ? output->name : "", output ? >> "/" : "", \ >> + output ? "i915_psr_status" : >> "i915_edp_psr_status") >> + >> bool psr_disabled_check(int debugfs_fd) >> { >> char buf[PSR_STATUS_MAX_LEN]; >> @@ -37,11 +41,13 @@ bool psr_disabled_check(int debugfs_fd) >> return strstr(buf, "PSR mode: disabled\n"); >> } >> >> -bool psr2_selective_fetch_check(int debugfs_fd) >> +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t >> *output) >> { >> char buf[PSR_STATUS_MAX_LEN]; >> + char debugfs_file[128] = {0}; >> >> - igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", >> buf, >> + SET_DEBUGFS_PATH(output, debugfs_file); >> + igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, >> sizeof(buf)); >> >> return strstr(buf, "PSR2 selective fetch: enabled"); >> @@ -54,11 +60,7 @@ static bool psr_active_check(int debugfs_fd, enum >> psr_mode mode, igt_output_t *o >> const char *state = (mode == PSR_MODE_1 || mode == PR_MODE) ? >> "SRDENT" : "DEEP_SLEEP"; >> int ret; >> >> - if (output) >> - sprintf(debugfs_file, "%s/i915_psr_status", output- >>> name); >> - else >> - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); >> - >> + SET_DEBUGFS_PATH(output, debugfs_file); >> ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, >> buf, sizeof(buf)); >> if (ret < 0) { >> @@ -90,13 +92,18 @@ bool psr_long_wait_update(int debugfs_fd, enum >> psr_mode mode, igt_output_t *outp >> return igt_wait(!psr_active_check(debugfs_fd, mode, output), >> 500, 10); >> } >> >> -static ssize_t psr_write(int debugfs_fd, const char *buf) >> +static ssize_t psr_write(int debugfs_fd, const char *buf, >> igt_output_t *output) >> { >> + /* >> + * FIXME: Currently we don't have separate psr_debug file for >> each output. >> + * so, we are using i915_edp_psr_debug file for all outputs. >> + * Later we need to add support for separate psr_debug file >> for each output. >> + */ >> return igt_sysfs_write(debugfs_fd, "i915_edp_psr_debug", buf, >> - strlen(buf)); >> + strlen(buf)); >> } >> >> -static int has_psr_debugfs(int debugfs_fd) >> +static int has_psr_debugfs(int debugfs_fd, igt_output_t *output) >> { >> int ret; >> >> @@ -105,7 +112,7 @@ static int has_psr_debugfs(int debugfs_fd) >> * Legacy mode will return OK here, debugfs api will return - >> EINVAL. >> * -ENODEV is returned when PSR is unavailable. >> */ >> - ret = psr_write(debugfs_fd, "0xf"); >> + ret = psr_write(debugfs_fd, "0xf", output); >> if (ret == -EINVAL) { >> errno = 0; >> return 0; >> @@ -113,7 +120,7 @@ static int has_psr_debugfs(int debugfs_fd) >> return ret; >> >> /* legacy debugfs api, we enabled irqs by writing, disable >> them. */ >> - psr_write(debugfs_fd, "0"); >> + psr_write(debugfs_fd, "0", output); >> return -EINVAL; >> } >> >> @@ -134,14 +141,14 @@ static int psr_restore_debugfs_fd = -1; >> >> static void restore_psr_debugfs(int sig) >> { >> - psr_write(psr_restore_debugfs_fd, "0"); >> + psr_write(psr_restore_debugfs_fd, "0", NULL); >> } >> >> -static bool psr_set(int device, int debugfs_fd, int mode) >> +static bool psr_set(int device, int debugfs_fd, int mode, >> igt_output_t *output) >> { >> int ret; >> >> - ret = has_psr_debugfs(debugfs_fd); >> + ret = has_psr_debugfs(debugfs_fd, output); >> if (ret == -ENODEV) { >> igt_skip("PSR not available\n"); >> return false; >> @@ -179,7 +186,7 @@ static bool psr_set(int device, int debugfs_fd, >> int mode) >> debug_val = "0x1"; >> } >> >> - ret = psr_write(debugfs_fd, debug_val); >> + ret = psr_write(debugfs_fd, debug_val, output); >> igt_require_f(ret > 0, "PSR2 SF feature not >> available\n"); >> } >> >> @@ -193,15 +200,15 @@ static bool psr_set(int device, int debugfs_fd, >> int mode) >> return ret; >> } >> >> -bool psr_enable(int device, int debugfs_fd, enum psr_mode mode) >> +bool psr_enable(int device, int debugfs_fd, enum psr_mode mode, >> igt_output_t *output) >> { >> - return psr_set(device, debugfs_fd, mode); >> + return psr_set(device, debugfs_fd, mode, output); >> } >> >> -bool psr_disable(int device, int debugfs_fd) >> +bool psr_disable(int device, int debugfs_fd, igt_output_t *output) >> { >> /* Any mode different than PSR_MODE_1/2 will disable PSR */ >> - return psr_set(device, debugfs_fd, -1); >> + return psr_set(device, debugfs_fd, -1, output); >> } >> >> bool psr_sink_support(int device, int debugfs_fd, enum psr_mode >> mode, igt_output_t *output) >> @@ -211,11 +218,7 @@ bool psr_sink_support(int device, int >> debugfs_fd, enum psr_mode mode, igt_output >> char buf[PSR_STATUS_MAX_LEN]; >> int ret; >> >> - if (output) >> - sprintf(debugfs_file, "%s/i915_psr_status", output- >>> name); >> - else >> - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); >> - >> + SET_DEBUGFS_PATH(output, debugfs_file); >> ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, >> sizeof(buf)); >> if (ret < 1) >> @@ -305,7 +308,7 @@ void psr_print_debugfs(int debugfs_fd) >> igt_info("%s", buf); >> } >> >> -bool i915_psr2_selective_fetch_check(int drm_fd) >> +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t >> *output) >> { >> int debugfs_fd; >> bool ret; >> @@ -314,7 +317,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) >> return false; >> >> debugfs_fd = igt_debugfs_dir(drm_fd); >> - ret = psr2_selective_fetch_check(debugfs_fd); >> + ret = psr2_selective_fetch_check(debugfs_fd, output); >> close(debugfs_fd); >> >> return ret; >> @@ -331,7 +334,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) >> * Returns: >> * True if PSR mode changed to PSR1, false otherwise. >> */ >> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd) >> +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) >> { >> int debugfs_fd; >> bool ret = false; >> @@ -340,8 +343,8 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) >> return ret; >> >> debugfs_fd = igt_debugfs_dir(drm_fd); >> - if (psr2_selective_fetch_check(debugfs_fd)) { >> - psr_set(drm_fd, debugfs_fd, PSR_MODE_1); >> + if (psr2_selective_fetch_check(debugfs_fd, output)) { >> + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); >> ret = true; >> } >> >> @@ -355,12 +358,12 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) >> * Restore PSR2 selective fetch after tests were executed, this >> function should >> * only be called if i915_psr2_sel_fetch_to_psr1() returned true. >> */ >> -void i915_psr2_sel_fetch_restore(int drm_fd) >> +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) >> { >> int debugfs_fd; >> >> debugfs_fd = igt_debugfs_dir(drm_fd); >> - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH); >> + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); >> close(debugfs_fd); >> } >> >> @@ -369,16 +372,17 @@ void i915_psr2_sel_fetch_restore(int drm_fd) >> * >> * Return the current PSR mode. >> */ >> -enum psr_mode psr_get_mode(int debugfs_fd) >> +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) >> { >> char buf[PSR_STATUS_MAX_LEN]; >> + char debugfs_file[128] = {0}; >> int ret; >> >> - >> - ret = igt_debugfs_simple_read(debugfs_fd, >> "i915_edp_psr_status", buf, >> + SET_DEBUGFS_PATH(output, debugfs_file); >> + ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, >> sizeof(buf)); >> if (ret < 0) { >> - igt_info("Could not read i915_edp_psr_status: %s\n", >> + igt_info("Could not read psr status: %s\n", >> strerror(-ret)); >> return PSR_DISABLED; >> } >> diff --git a/lib/igt_psr.h b/lib/igt_psr.h >> index 82a4e8c5e..372bef2b2 100644 >> --- a/lib/igt_psr.h >> +++ b/lib/igt_psr.h >> @@ -46,21 +46,21 @@ enum fbc_mode { >> }; >> >> bool psr_disabled_check(int debugfs_fd); >> -bool psr2_selective_fetch_check(int debugfs_fd); >> +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t >> *output); >> bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t >> *output); >> bool psr_wait_update(int debugfs_fd, enum psr_mode mode, >> igt_output_t *output); >> bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, >> igt_output_t *output); >> -bool psr_enable(int device, int debugfs_fd, enum psr_mode); >> -bool psr_disable(int device, int debugfs_fd); >> +bool psr_enable(int device, int debugfs_fd, enum psr_mode, >> igt_output_t *output); >> +bool psr_disable(int device, int debugfs_fd, igt_output_t *output); >> bool psr_sink_support(int device, int debugfs_fd, enum psr_mode >> mode, igt_output_t *output); >> bool psr2_wait_su(int debugfs_fd, uint16_t *num_su_blocks); >> void psr_print_debugfs(int debugfs_fd); >> -enum psr_mode psr_get_mode(int debugfs_fd); >> +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output); >> >> -bool i915_psr2_selective_fetch_check(int drm_fd); >> +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t >> *output); >> >> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd); >> -void i915_psr2_sel_fetch_restore(int drm_fd); >> +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output); >> +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); >> bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); >> >> #endif >> diff --git a/tests/intel/kms_dirtyfb.c b/tests/intel/kms_dirtyfb.c >> index 26b82e50a..c2411c824 100644 >> --- a/tests/intel/kms_dirtyfb.c >> +++ b/tests/intel/kms_dirtyfb.c >> @@ -127,7 +127,7 @@ static void enable_feature(data_t *data) >> intel_fbc_enable(data->drm_fd); >> break; >> case FEATURE_PSR: >> - psr_enable(data->drm_fd, data->debugfs_fd, >> PSR_MODE_1); >> + psr_enable(data->drm_fd, data->debugfs_fd, >> PSR_MODE_1, NULL); >> break; >> case FEATURE_DRRS: >> intel_drrs_enable(data->drm_fd, data->pipe); >> @@ -167,7 +167,7 @@ static void check_feature(data_t *data) >> static void disable_features(data_t *data) >> { >> intel_fbc_disable(data->drm_fd); >> - psr_disable(data->drm_fd, data->debugfs_fd); >> + psr_disable(data->drm_fd, data->debugfs_fd, NULL); >> intel_drrs_disable(data->drm_fd, data->pipe); >> } >> >> diff --git a/tests/intel/kms_fbcon_fbt.c >> b/tests/intel/kms_fbcon_fbt.c >> index 90484dccf..71e42f19c 100644 >> --- a/tests/intel/kms_fbcon_fbt.c >> +++ b/tests/intel/kms_fbcon_fbt.c >> @@ -277,7 +277,7 @@ static void disable_features(int device, int >> debugfs_fd) >> { >> igt_set_module_param_int(device, "enable_fbc", 0); >> if (psr_sink_support(device, debugfs_fd, PSR_MODE_1, NULL)) >> - psr_disable(device, debugfs_fd); >> + psr_disable(device, debugfs_fd, NULL); >> } >> >> static inline void fbc_modparam_enable(int device, int debugfs_fd) >> @@ -287,7 +287,7 @@ static inline void fbc_modparam_enable(int >> device, int debugfs_fd) >> >> static inline void psr_debugfs_enable(int device, int debugfs_fd) >> { >> - psr_enable(device, debugfs_fd, PSR_MODE_1); >> + psr_enable(device, debugfs_fd, PSR_MODE_1, NULL); >> } >> >> static void fbc_skips_on_fbcon(int debugfs_fd) >> diff --git a/tests/intel/kms_frontbuffer_tracking.c >> b/tests/intel/kms_frontbuffer_tracking.c >> index 912cca3f8..023843161 100644 >> --- a/tests/intel/kms_frontbuffer_tracking.c >> +++ b/tests/intel/kms_frontbuffer_tracking.c >> @@ -2234,7 +2234,7 @@ static bool disable_features(const struct >> test_mode *t) >> intel_fbc_disable(drm.fd); >> intel_drrs_disable(drm.fd, prim_mode_params.pipe); >> >> - return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : >> false; >> + return psr.can_test ? psr_disable(drm.fd, drm.debugfs, NULL) >> : false; >> } >> >> static void *busy_thread_func(void *data) >> @@ -2867,7 +2867,7 @@ static bool enable_features_for_test(const >> struct test_mode *t) >> if (t->feature & FEATURE_FBC) >> intel_fbc_enable(drm.fd); >> if (t->feature & FEATURE_PSR) >> - ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1); >> + ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1, >> NULL); >> if (t->feature & FEATURE_DRRS) >> intel_drrs_enable(drm.fd, prim_mode_params.pipe); >> >> diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c >> index 0d5824e67..7deebf83d 100644 >> --- a/tests/intel/kms_pm_dc.c >> +++ b/tests/intel/kms_pm_dc.c >> @@ -362,7 +362,7 @@ static void require_dc_counter(int debugfs_fd, >> int dc_flag) >> static void setup_dc3co(data_t *data) >> { >> data->op_psr_mode = PSR_MODE_2; >> - psr_enable(data->drm_fd, data->debugfs_fd, data- >>> op_psr_mode); >> + psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, >> NULL); >> igt_require_f(psr_wait_entry(data->debugfs_fd, data- >>> op_psr_mode, NULL), >> "PSR2 is not enabled\n"); >> } >> @@ -665,7 +665,7 @@ igt_main >> igt_require(psr_sink_support(data.drm_fd, >> data.debugfs_fd, >> PSR_MODE_1, NULL)); >> data.op_psr_mode = PSR_MODE_1; >> - psr_enable(data.drm_fd, data.debugfs_fd, >> data.op_psr_mode); >> + psr_enable(data.drm_fd, data.debugfs_fd, >> data.op_psr_mode, NULL); >> test_dc_state_psr(&data, CHECK_DC5); >> } >> >> @@ -675,7 +675,7 @@ igt_main >> igt_require(psr_sink_support(data.drm_fd, >> data.debugfs_fd, >> PSR_MODE_1, NULL)); >> data.op_psr_mode = PSR_MODE_1; >> - psr_enable(data.drm_fd, data.debugfs_fd, >> data.op_psr_mode); >> + psr_enable(data.drm_fd, data.debugfs_fd, >> data.op_psr_mode, NULL); >> igt_require_f(igt_pm_pc8_plus_residencies_enabled(dat >> a.msr_fd), >> "PC8+ residencies not supported\n"); >> if (intel_display_ver(data.devid) >= 14) >> diff --git a/tests/intel/kms_psr.c b/tests/intel/kms_psr.c >> index 521d4c708..3822b3081 100644 >> --- a/tests/intel/kms_psr.c >> +++ b/tests/intel/kms_psr.c >> @@ -519,7 +519,7 @@ static bool psr_enable_if_enabled(data_t *data) >> igt_skip("enable_psr modparam doesn't allow psr mode >> %d\n", >> data->op_psr_mode); >> >> - return psr_enable(data->drm_fd, data->debugfs_fd, data- >>> op_psr_mode); >> + return psr_enable(data->drm_fd, data->debugfs_fd, data- >>> op_psr_mode, data->output); >> } >> >> static inline void manual(const char *expected) >> @@ -658,6 +658,7 @@ static void test_cleanup(data_t *data) >> >> igt_remove_fb(data->drm_fd, &data->fb_green); >> igt_remove_fb(data->drm_fd, &data->fb_white); >> + psr_disable(data->drm_fd, data->debugfs_fd, data->output); >> } >> >> static void setup_test_plane(data_t *data, int test_plane) >> @@ -976,7 +977,6 @@ igt_main >> } >> >> igt_fixture { >> - psr_disable(data.drm_fd, data.debugfs_fd); >> close(data.debugfs_fd); >> buf_ops_destroy(data.bops); >> diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c >> index ecf9ad77f..8e6a9e02c 100644 >> --- a/tests/intel/kms_psr2_sf.c >> +++ b/tests/intel/kms_psr2_sf.c >> @@ -1012,11 +1012,6 @@ igt_main >> data.fbc_flag = true; >> } >> >> - /* Test if PSR2 can be enabled */ >> - igt_require_f(psr_enable(data.drm_fd, >> - data.debugfs_fd, >> PSR_MODE_2_SEL_FETCH), >> - "Error enabling PSR2\n"); >> - > I started to think it might actually not make sense to remove this. > Currently kms_psr2_sf is skipped if psr debugfs interface doesn't > exist. I.e. PSR is not supported by the platform. This is with > reasonable info "PSR not available". After your change it will assert > below as debugfs entry can't be opened. > > BR, > > Jouni Högander Thanks for catching this, How about having a check before looping on all output to check if we have psr_debug interface present? Thanks and Regards Kunal Joshi >> data.damage_area_count = MAX_DAMAGE_AREAS; >> data.primary_format = DRM_FORMAT_XRGB8888; >> >> @@ -1026,9 +1021,6 @@ igt_main >> igt_info("Big framebuffer size %dx%d\n", >> data.big_fb_width, data.big_fb_height); >> >> - >> igt_require_f(psr2_selective_fetch_check(data.debugfs_f >> d), >> - "PSR2 selective fetch not enabled\n"); >> - >> for_each_pipe_with_valid_output(&data.display, >> data.pipe, data.output) { >> coexist_features[n_pipes] = 0; >> if (check_psr2_support(&data)) { >> diff --git a/tests/intel/kms_psr2_su.c b/tests/intel/kms_psr2_su.c >> index 936b5beb3..437ee36f6 100644 >> --- a/tests/intel/kms_psr2_su.c >> +++ b/tests/intel/kms_psr2_su.c >> @@ -338,7 +338,7 @@ igt_main >> >> /* Test if PSR2 can be enabled */ >> igt_require_f(psr_enable(data.drm_fd, >> - data.debugfs_fd, >> PSR_MODE_2), >> + data.debugfs_fd, PSR_MODE_2, >> NULL), >> "Error enabling PSR2\n"); >> data.op = FRONTBUFFER; >> data.format = DRM_FORMAT_XRGB8888; >> diff --git a/tests/intel/kms_psr_stress_test.c >> b/tests/intel/kms_psr_stress_test.c >> index 7aea8e8a5..bca3bd513 100644 >> --- a/tests/intel/kms_psr_stress_test.c >> +++ b/tests/intel/kms_psr_stress_test.c >> @@ -230,7 +230,7 @@ static void prepare(data_t *data) >> r = timerfd_settime(data->completed_timerfd, 0, &interval, >> NULL); >> igt_require_f(r != -1, "Error setting completed_timerfd\n"); >> >> - data->initial_state = psr_get_mode(data->debugfs_fd); >> + data->initial_state = psr_get_mode(data->debugfs_fd, NULL); >> igt_require(data->initial_state != PSR_DISABLED); >> igt_require(psr_wait_entry(data->debugfs_fd, data- >>> initial_state, NULL)); >> } >> @@ -343,7 +343,7 @@ static void run(data_t *data) >> } >> >> /* Check if after all this stress the PSR is still in the >> same state */ >> - igt_assert(psr_get_mode(data->debugfs_fd) == data- >>> initial_state); >> + igt_assert(psr_get_mode(data->debugfs_fd, NULL) == data- >>> initial_state); >> } >> >> igt_main >> diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c >> index a0349fa03..2895168f7 100644 >> --- a/tests/kms_async_flips.c >> +++ b/tests/kms_async_flips.c >> @@ -391,7 +391,7 @@ static void test_cursor(data_t *data) >> * necessary, causing the async flip to fail because async >> flip is not >> * supported in cursor plane. >> */ >> - igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd), >> + igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd, >> NULL), >> "PSR2 sel fetch causes cursor to be added to >> primary plane " \ >> "pages flips and async flip is not supported in >> cursor\n"); >> >> @@ -704,7 +704,7 @@ igt_main >> * necessary, causing the async flip to fail because >> async flip is not >> * supported in cursor plane. >> */ >> - >> igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_ >> fd), >> + igt_skip_on_f(i915_psr2_selective_fetch_check(data.dr >> m_fd, NULL), >> "PSR2 sel fetch causes cursor to be >> added to primary plane " \ >> "pages flips and async flip is not >> supported in cursor\n"); >> >> diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c >> index 0017659d4..a430f735a 100644 >> --- a/tests/kms_cursor_legacy.c >> +++ b/tests/kms_cursor_legacy.c >> @@ -1849,7 +1849,7 @@ igt_main >> * page flip with cursor legacy APIS when Intel's >> PSR2 selective >> * fetch is enabled, so switching PSR1 for this whole >> test. >> */ >> - intel_psr2_restore = >> i915_psr2_sel_fetch_to_psr1(display.drm_fd); >> + intel_psr2_restore = >> i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); >> } >> >> igt_describe("Test checks how many cursor updates we can fit >> between vblanks " >> @@ -2074,7 +2074,7 @@ igt_main >> >> igt_fixture { >> if (intel_psr2_restore) >> - i915_psr2_sel_fetch_restore(display.drm_fd); >> + i915_psr2_sel_fetch_restore(display.drm_fd, >> NULL); >> igt_display_fini(&display); >> drm_close_driver(display.drm_fd); >> } ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs 2024-02-19 8:07 ` Joshi, Kunal1 @ 2024-02-19 8:33 ` Hogander, Jouni 2024-02-19 8:36 ` Joshi, Kunal1 0 siblings, 1 reply; 22+ messages in thread From: Hogander, Jouni @ 2024-02-19 8:33 UTC (permalink / raw) To: Joshi, Kunal1, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh On Mon, 2024-02-19 at 13:37 +0530, Joshi, Kunal1 wrote: > Hello Jouni, > > On 2/19/2024 1:15 PM, Hogander, Jouni wrote: > > On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote: > > > We can have multiple panels connected to the system so PSR > > > information > > > should be exposed per output. changes provide support for > > > multiple > > > PSR/PR to be tested simultaneously. > > > > > > Cc: Jouni Högander <jouni.hogander@intel.com> > > > Cc: Animesh Manna <animesh.manna@intel.com> > > > Cc: Arun R Murthy <arun.r.murthy@intel.com> > > > Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> > > > --- > > > lib/igt_psr.c | 76 ++++++++++++++----- > > > ----- > > > -- > > > lib/igt_psr.h | 14 ++--- > > > tests/intel/kms_dirtyfb.c | 4 +- > > > tests/intel/kms_fbcon_fbt.c | 4 +- > > > tests/intel/kms_frontbuffer_tracking.c | 4 +- > > > tests/intel/kms_pm_dc.c | 6 +- > > > tests/intel/kms_psr.c | 4 +- > > > tests/intel/kms_psr2_sf.c | 8 --- > > > tests/intel/kms_psr2_su.c | 2 +- > > > tests/intel/kms_psr_stress_test.c | 4 +- > > > tests/kms_async_flips.c | 4 +- > > > tests/kms_cursor_legacy.c | 4 +- > > > 12 files changed, 65 insertions(+), 69 deletions(-) > > > > > > diff --git a/lib/igt_psr.c b/lib/igt_psr.c > > > index ac214fcfc..cad8cce05 100644 > > > --- a/lib/igt_psr.c > > > +++ b/lib/igt_psr.c > > > @@ -27,6 +27,10 @@ > > > #include "igt_sysfs.h" > > > #include <errno.h> > > > > > > +#define SET_DEBUGFS_PATH(output, path) \ > > > + sprintf(path, "%s%s%s", output ? output->name : "", > > > output ? > > > "/" : "", \ > > > + output ? "i915_psr_status" : > > > "i915_edp_psr_status") > > > + > > > bool psr_disabled_check(int debugfs_fd) > > > { > > > char buf[PSR_STATUS_MAX_LEN]; > > > @@ -37,11 +41,13 @@ bool psr_disabled_check(int debugfs_fd) > > > return strstr(buf, "PSR mode: disabled\n"); > > > } > > > > > > -bool psr2_selective_fetch_check(int debugfs_fd) > > > +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > > > *output) > > > { > > > char buf[PSR_STATUS_MAX_LEN]; > > > + char debugfs_file[128] = {0}; > > > > > > - igt_debugfs_simple_read(debugfs_fd, > > > "i915_edp_psr_status", > > > buf, > > > + SET_DEBUGFS_PATH(output, debugfs_file); > > > + igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, > > > sizeof(buf)); > > > > > > return strstr(buf, "PSR2 selective fetch: enabled"); > > > @@ -54,11 +60,7 @@ static bool psr_active_check(int debugfs_fd, > > > enum > > > psr_mode mode, igt_output_t *o > > > const char *state = (mode == PSR_MODE_1 || mode == > > > PR_MODE) ? > > > "SRDENT" : "DEEP_SLEEP"; > > > int ret; > > > > > > - if (output) > > > - sprintf(debugfs_file, "%s/i915_psr_status", > > > output- > > > > name); > > > - else > > > - sprintf(debugfs_file, "%s", > > > "i915_edp_psr_status"); > > > - > > > + SET_DEBUGFS_PATH(output, debugfs_file); > > > ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, > > > buf, sizeof(buf)); > > > if (ret < 0) { > > > @@ -90,13 +92,18 @@ bool psr_long_wait_update(int debugfs_fd, > > > enum > > > psr_mode mode, igt_output_t *outp > > > return igt_wait(!psr_active_check(debugfs_fd, mode, > > > output), > > > 500, 10); > > > } > > > > > > -static ssize_t psr_write(int debugfs_fd, const char *buf) > > > +static ssize_t psr_write(int debugfs_fd, const char *buf, > > > igt_output_t *output) > > > { > > > + /* > > > + * FIXME: Currently we don't have separate psr_debug file > > > for > > > each output. > > > + * so, we are using i915_edp_psr_debug file for all > > > outputs. > > > + * Later we need to add support for separate psr_debug > > > file > > > for each output. > > > + */ > > > return igt_sysfs_write(debugfs_fd, "i915_edp_psr_debug", > > > buf, > > > - strlen(buf)); > > > + strlen(buf)); > > > } > > > > > > -static int has_psr_debugfs(int debugfs_fd) > > > +static int has_psr_debugfs(int debugfs_fd, igt_output_t *output) > > > { > > > int ret; > > > > > > @@ -105,7 +112,7 @@ static int has_psr_debugfs(int debugfs_fd) > > > * Legacy mode will return OK here, debugfs api will > > > return - > > > EINVAL. > > > * -ENODEV is returned when PSR is unavailable. > > > */ > > > - ret = psr_write(debugfs_fd, "0xf"); > > > + ret = psr_write(debugfs_fd, "0xf", output); > > > if (ret == -EINVAL) { > > > errno = 0; > > > return 0; > > > @@ -113,7 +120,7 @@ static int has_psr_debugfs(int debugfs_fd) > > > return ret; > > > > > > /* legacy debugfs api, we enabled irqs by writing, > > > disable > > > them. */ > > > - psr_write(debugfs_fd, "0"); > > > + psr_write(debugfs_fd, "0", output); > > > return -EINVAL; > > > } > > > > > > @@ -134,14 +141,14 @@ static int psr_restore_debugfs_fd = -1; > > > > > > static void restore_psr_debugfs(int sig) > > > { > > > - psr_write(psr_restore_debugfs_fd, "0"); > > > + psr_write(psr_restore_debugfs_fd, "0", NULL); > > > } > > > > > > -static bool psr_set(int device, int debugfs_fd, int mode) > > > +static bool psr_set(int device, int debugfs_fd, int mode, > > > igt_output_t *output) > > > { > > > int ret; > > > > > > - ret = has_psr_debugfs(debugfs_fd); > > > + ret = has_psr_debugfs(debugfs_fd, output); > > > if (ret == -ENODEV) { > > > igt_skip("PSR not available\n"); > > > return false; > > > @@ -179,7 +186,7 @@ static bool psr_set(int device, int > > > debugfs_fd, > > > int mode) > > > debug_val = "0x1"; > > > } > > > > > > - ret = psr_write(debugfs_fd, debug_val); > > > + ret = psr_write(debugfs_fd, debug_val, output); > > > igt_require_f(ret > 0, "PSR2 SF feature not > > > available\n"); > > > } > > > > > > @@ -193,15 +200,15 @@ static bool psr_set(int device, int > > > debugfs_fd, > > > int mode) > > > return ret; > > > } > > > > > > -bool psr_enable(int device, int debugfs_fd, enum psr_mode mode) > > > +bool psr_enable(int device, int debugfs_fd, enum psr_mode mode, > > > igt_output_t *output) > > > { > > > - return psr_set(device, debugfs_fd, mode); > > > + return psr_set(device, debugfs_fd, mode, output); > > > } > > > > > > -bool psr_disable(int device, int debugfs_fd) > > > +bool psr_disable(int device, int debugfs_fd, igt_output_t > > > *output) > > > { > > > /* Any mode different than PSR_MODE_1/2 will disable PSR > > > */ > > > - return psr_set(device, debugfs_fd, -1); > > > + return psr_set(device, debugfs_fd, -1, output); > > > } > > > > > > bool psr_sink_support(int device, int debugfs_fd, enum psr_mode > > > mode, igt_output_t *output) > > > @@ -211,11 +218,7 @@ bool psr_sink_support(int device, int > > > debugfs_fd, enum psr_mode mode, igt_output > > > char buf[PSR_STATUS_MAX_LEN]; > > > int ret; > > > > > > - if (output) > > > - sprintf(debugfs_file, "%s/i915_psr_status", > > > output- > > > > name); > > > - else > > > - sprintf(debugfs_file, "%s", > > > "i915_edp_psr_status"); > > > - > > > + SET_DEBUGFS_PATH(output, debugfs_file); > > > ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, > > > buf, > > > sizeof(buf)); > > > if (ret < 1) > > > @@ -305,7 +308,7 @@ void psr_print_debugfs(int debugfs_fd) > > > igt_info("%s", buf); > > > } > > > > > > -bool i915_psr2_selective_fetch_check(int drm_fd) > > > +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t > > > *output) > > > { > > > int debugfs_fd; > > > bool ret; > > > @@ -314,7 +317,7 @@ bool i915_psr2_selective_fetch_check(int > > > drm_fd) > > > return false; > > > > > > debugfs_fd = igt_debugfs_dir(drm_fd); > > > - ret = psr2_selective_fetch_check(debugfs_fd); > > > + ret = psr2_selective_fetch_check(debugfs_fd, output); > > > close(debugfs_fd); > > > > > > return ret; > > > @@ -331,7 +334,7 @@ bool i915_psr2_selective_fetch_check(int > > > drm_fd) > > > * Returns: > > > * True if PSR mode changed to PSR1, false otherwise. > > > */ > > > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd) > > > +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t > > > *output) > > > { > > > int debugfs_fd; > > > bool ret = false; > > > @@ -340,8 +343,8 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) > > > return ret; > > > > > > debugfs_fd = igt_debugfs_dir(drm_fd); > > > - if (psr2_selective_fetch_check(debugfs_fd)) { > > > - psr_set(drm_fd, debugfs_fd, PSR_MODE_1); > > > + if (psr2_selective_fetch_check(debugfs_fd, output)) { > > > + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); > > > ret = true; > > > } > > > > > > @@ -355,12 +358,12 @@ bool i915_psr2_sel_fetch_to_psr1(int > > > drm_fd) > > > * Restore PSR2 selective fetch after tests were executed, this > > > function should > > > * only be called if i915_psr2_sel_fetch_to_psr1() returned > > > true. > > > */ > > > -void i915_psr2_sel_fetch_restore(int drm_fd) > > > +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t > > > *output) > > > { > > > int debugfs_fd; > > > > > > debugfs_fd = igt_debugfs_dir(drm_fd); > > > - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH); > > > + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, > > > output); > > > close(debugfs_fd); > > > } > > > > > > @@ -369,16 +372,17 @@ void i915_psr2_sel_fetch_restore(int > > > drm_fd) > > > * > > > * Return the current PSR mode. > > > */ > > > -enum psr_mode psr_get_mode(int debugfs_fd) > > > +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) > > > { > > > char buf[PSR_STATUS_MAX_LEN]; > > > + char debugfs_file[128] = {0}; > > > int ret; > > > > > > - > > > - ret = igt_debugfs_simple_read(debugfs_fd, > > > "i915_edp_psr_status", buf, > > > + SET_DEBUGFS_PATH(output, debugfs_file); > > > + ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, > > > buf, > > > sizeof(buf)); > > > if (ret < 0) { > > > - igt_info("Could not read i915_edp_psr_status: > > > %s\n", > > > + igt_info("Could not read psr status: %s\n", > > > strerror(-ret)); > > > return PSR_DISABLED; > > > } > > > diff --git a/lib/igt_psr.h b/lib/igt_psr.h > > > index 82a4e8c5e..372bef2b2 100644 > > > --- a/lib/igt_psr.h > > > +++ b/lib/igt_psr.h > > > @@ -46,21 +46,21 @@ enum fbc_mode { > > > }; > > > > > > bool psr_disabled_check(int debugfs_fd); > > > -bool psr2_selective_fetch_check(int debugfs_fd); > > > +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > > > *output); > > > bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, > > > igt_output_t > > > *output); > > > bool psr_wait_update(int debugfs_fd, enum psr_mode mode, > > > igt_output_t *output); > > > bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, > > > igt_output_t *output); > > > -bool psr_enable(int device, int debugfs_fd, enum psr_mode); > > > -bool psr_disable(int device, int debugfs_fd); > > > +bool psr_enable(int device, int debugfs_fd, enum psr_mode, > > > igt_output_t *output); > > > +bool psr_disable(int device, int debugfs_fd, igt_output_t > > > *output); > > > bool psr_sink_support(int device, int debugfs_fd, enum psr_mode > > > mode, igt_output_t *output); > > > bool psr2_wait_su(int debugfs_fd, uint16_t *num_su_blocks); > > > void psr_print_debugfs(int debugfs_fd); > > > -enum psr_mode psr_get_mode(int debugfs_fd); > > > +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t > > > *output); > > > > > > -bool i915_psr2_selective_fetch_check(int drm_fd); > > > +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t > > > *output); > > > > > > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd); > > > -void i915_psr2_sel_fetch_restore(int drm_fd); > > > +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t > > > *output); > > > +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t > > > *output); > > > bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); > > > > > > #endif > > > diff --git a/tests/intel/kms_dirtyfb.c > > > b/tests/intel/kms_dirtyfb.c > > > index 26b82e50a..c2411c824 100644 > > > --- a/tests/intel/kms_dirtyfb.c > > > +++ b/tests/intel/kms_dirtyfb.c > > > @@ -127,7 +127,7 @@ static void enable_feature(data_t *data) > > > intel_fbc_enable(data->drm_fd); > > > break; > > > case FEATURE_PSR: > > > - psr_enable(data->drm_fd, data->debugfs_fd, > > > PSR_MODE_1); > > > + psr_enable(data->drm_fd, data->debugfs_fd, > > > PSR_MODE_1, NULL); > > > break; > > > case FEATURE_DRRS: > > > intel_drrs_enable(data->drm_fd, data->pipe); > > > @@ -167,7 +167,7 @@ static void check_feature(data_t *data) > > > static void disable_features(data_t *data) > > > { > > > intel_fbc_disable(data->drm_fd); > > > - psr_disable(data->drm_fd, data->debugfs_fd); > > > + psr_disable(data->drm_fd, data->debugfs_fd, NULL); > > > intel_drrs_disable(data->drm_fd, data->pipe); > > > } > > > > > > diff --git a/tests/intel/kms_fbcon_fbt.c > > > b/tests/intel/kms_fbcon_fbt.c > > > index 90484dccf..71e42f19c 100644 > > > --- a/tests/intel/kms_fbcon_fbt.c > > > +++ b/tests/intel/kms_fbcon_fbt.c > > > @@ -277,7 +277,7 @@ static void disable_features(int device, int > > > debugfs_fd) > > > { > > > igt_set_module_param_int(device, "enable_fbc", 0); > > > if (psr_sink_support(device, debugfs_fd, PSR_MODE_1, > > > NULL)) > > > - psr_disable(device, debugfs_fd); > > > + psr_disable(device, debugfs_fd, NULL); > > > } > > > > > > static inline void fbc_modparam_enable(int device, int > > > debugfs_fd) > > > @@ -287,7 +287,7 @@ static inline void fbc_modparam_enable(int > > > device, int debugfs_fd) > > > > > > static inline void psr_debugfs_enable(int device, int > > > debugfs_fd) > > > { > > > - psr_enable(device, debugfs_fd, PSR_MODE_1); > > > + psr_enable(device, debugfs_fd, PSR_MODE_1, NULL); > > > } > > > > > > static void fbc_skips_on_fbcon(int debugfs_fd) > > > diff --git a/tests/intel/kms_frontbuffer_tracking.c > > > b/tests/intel/kms_frontbuffer_tracking.c > > > index 912cca3f8..023843161 100644 > > > --- a/tests/intel/kms_frontbuffer_tracking.c > > > +++ b/tests/intel/kms_frontbuffer_tracking.c > > > @@ -2234,7 +2234,7 @@ static bool disable_features(const struct > > > test_mode *t) > > > intel_fbc_disable(drm.fd); > > > intel_drrs_disable(drm.fd, prim_mode_params.pipe); > > > > > > - return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : > > > false; > > > + return psr.can_test ? psr_disable(drm.fd, drm.debugfs, > > > NULL) > > > : false; > > > } > > > > > > static void *busy_thread_func(void *data) > > > @@ -2867,7 +2867,7 @@ static bool enable_features_for_test(const > > > struct test_mode *t) > > > if (t->feature & FEATURE_FBC) > > > intel_fbc_enable(drm.fd); > > > if (t->feature & FEATURE_PSR) > > > - ret = psr_enable(drm.fd, drm.debugfs, > > > PSR_MODE_1); > > > + ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1, > > > NULL); > > > if (t->feature & FEATURE_DRRS) > > > intel_drrs_enable(drm.fd, > > > prim_mode_params.pipe); > > > > > > diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c > > > index 0d5824e67..7deebf83d 100644 > > > --- a/tests/intel/kms_pm_dc.c > > > +++ b/tests/intel/kms_pm_dc.c > > > @@ -362,7 +362,7 @@ static void require_dc_counter(int > > > debugfs_fd, > > > int dc_flag) > > > static void setup_dc3co(data_t *data) > > > { > > > data->op_psr_mode = PSR_MODE_2; > > > - psr_enable(data->drm_fd, data->debugfs_fd, data- > > > > op_psr_mode); > > > + psr_enable(data->drm_fd, data->debugfs_fd, data- > > > >op_psr_mode, > > > NULL); > > > igt_require_f(psr_wait_entry(data->debugfs_fd, data- > > > > op_psr_mode, NULL), > > > "PSR2 is not enabled\n"); > > > } > > > @@ -665,7 +665,7 @@ igt_main > > > igt_require(psr_sink_support(data.drm_fd, > > > data.debugfs_fd, > > > PSR_MODE_1, NULL)); > > > data.op_psr_mode = PSR_MODE_1; > > > - psr_enable(data.drm_fd, data.debugfs_fd, > > > data.op_psr_mode); > > > + psr_enable(data.drm_fd, data.debugfs_fd, > > > data.op_psr_mode, NULL); > > > test_dc_state_psr(&data, CHECK_DC5); > > > } > > > > > > @@ -675,7 +675,7 @@ igt_main > > > igt_require(psr_sink_support(data.drm_fd, > > > data.debugfs_fd, > > > PSR_MODE_1, NULL)); > > > data.op_psr_mode = PSR_MODE_1; > > > - psr_enable(data.drm_fd, data.debugfs_fd, > > > data.op_psr_mode); > > > + psr_enable(data.drm_fd, data.debugfs_fd, > > > data.op_psr_mode, NULL); > > > igt_require_f(igt_pm_pc8_plus_residencies_enable > > > d(dat > > > a.msr_fd), > > > "PC8+ residencies not > > > supported\n"); > > > if (intel_display_ver(data.devid) >= 14) > > > diff --git a/tests/intel/kms_psr.c b/tests/intel/kms_psr.c > > > index 521d4c708..3822b3081 100644 > > > --- a/tests/intel/kms_psr.c > > > +++ b/tests/intel/kms_psr.c > > > @@ -519,7 +519,7 @@ static bool psr_enable_if_enabled(data_t > > > *data) > > > igt_skip("enable_psr modparam doesn't allow psr > > > mode > > > %d\n", > > > data->op_psr_mode); > > > > > > - return psr_enable(data->drm_fd, data->debugfs_fd, data- > > > > op_psr_mode); > > > + return psr_enable(data->drm_fd, data->debugfs_fd, data- > > > > op_psr_mode, data->output); > > > } > > > > > > static inline void manual(const char *expected) > > > @@ -658,6 +658,7 @@ static void test_cleanup(data_t *data) > > > > > > igt_remove_fb(data->drm_fd, &data->fb_green); > > > igt_remove_fb(data->drm_fd, &data->fb_white); > > > + psr_disable(data->drm_fd, data->debugfs_fd, data- > > > >output); > > > } > > > > > > static void setup_test_plane(data_t *data, int test_plane) > > > @@ -976,7 +977,6 @@ igt_main > > > } > > > > > > igt_fixture { > > > - psr_disable(data.drm_fd, data.debugfs_fd); > > > close(data.debugfs_fd); > > > buf_ops_destroy(data.bops); > > > diff --git a/tests/intel/kms_psr2_sf.c > > > b/tests/intel/kms_psr2_sf.c > > > index ecf9ad77f..8e6a9e02c 100644 > > > --- a/tests/intel/kms_psr2_sf.c > > > +++ b/tests/intel/kms_psr2_sf.c > > > @@ -1012,11 +1012,6 @@ igt_main > > > data.fbc_flag = true; > > > } > > > > > > - /* Test if PSR2 can be enabled */ > > > - igt_require_f(psr_enable(data.drm_fd, > > > - data.debugfs_fd, > > > PSR_MODE_2_SEL_FETCH), > > > - "Error enabling PSR2\n"); > > > - > > I started to think it might actually not make sense to remove this. > > Currently kms_psr2_sf is skipped if psr debugfs interface doesn't > > exist. I.e. PSR is not supported by the platform. This is with > > reasonable info "PSR not available". After your change it will > > assert > > below as debugfs entry can't be opened. > > > > BR, > > > > Jouni Högander > > > Thanks for catching this, > How about having a check before looping on all output to check if we > have psr_debug interface present? I think that is ok as well. But you can drop this change completely as well. BR, Jouni Högander > > Thanks and Regards > Kunal Joshi > > > > data.damage_area_count = MAX_DAMAGE_AREAS; > > > data.primary_format = DRM_FORMAT_XRGB8888; > > > > > > @@ -1026,9 +1021,6 @@ igt_main > > > igt_info("Big framebuffer size %dx%d\n", > > > data.big_fb_width, data.big_fb_height); > > > > > > - > > > igt_require_f(psr2_selective_fetch_check(data.deb > > > ugfs_f > > > d), > > > - "PSR2 selective fetch not > > > enabled\n"); > > > - > > > for_each_pipe_with_valid_output(&data.display, > > > data.pipe, data.output) { > > > coexist_features[n_pipes] = 0; > > > if (check_psr2_support(&data)) { > > > diff --git a/tests/intel/kms_psr2_su.c > > > b/tests/intel/kms_psr2_su.c > > > index 936b5beb3..437ee36f6 100644 > > > --- a/tests/intel/kms_psr2_su.c > > > +++ b/tests/intel/kms_psr2_su.c > > > @@ -338,7 +338,7 @@ igt_main > > > > > > /* Test if PSR2 can be enabled */ > > > igt_require_f(psr_enable(data.drm_fd, > > > - data.debugfs_fd, > > > PSR_MODE_2), > > > + data.debugfs_fd, > > > PSR_MODE_2, > > > NULL), > > > "Error enabling PSR2\n"); > > > data.op = FRONTBUFFER; > > > data.format = DRM_FORMAT_XRGB8888; > > > diff --git a/tests/intel/kms_psr_stress_test.c > > > b/tests/intel/kms_psr_stress_test.c > > > index 7aea8e8a5..bca3bd513 100644 > > > --- a/tests/intel/kms_psr_stress_test.c > > > +++ b/tests/intel/kms_psr_stress_test.c > > > @@ -230,7 +230,7 @@ static void prepare(data_t *data) > > > r = timerfd_settime(data->completed_timerfd, 0, > > > &interval, > > > NULL); > > > igt_require_f(r != -1, "Error setting > > > completed_timerfd\n"); > > > > > > - data->initial_state = psr_get_mode(data->debugfs_fd); > > > + data->initial_state = psr_get_mode(data->debugfs_fd, > > > NULL); > > > igt_require(data->initial_state != PSR_DISABLED); > > > igt_require(psr_wait_entry(data->debugfs_fd, data- > > > > initial_state, NULL)); > > > } > > > @@ -343,7 +343,7 @@ static void run(data_t *data) > > > } > > > > > > /* Check if after all this stress the PSR is still in > > > the > > > same state */ > > > - igt_assert(psr_get_mode(data->debugfs_fd) == data- > > > > initial_state); > > > + igt_assert(psr_get_mode(data->debugfs_fd, NULL) == data- > > > > initial_state); > > > } > > > > > > igt_main > > > diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c > > > index a0349fa03..2895168f7 100644 > > > --- a/tests/kms_async_flips.c > > > +++ b/tests/kms_async_flips.c > > > @@ -391,7 +391,7 @@ static void test_cursor(data_t *data) > > > * necessary, causing the async flip to fail because > > > async > > > flip is not > > > * supported in cursor plane. > > > */ > > > - igt_skip_on_f(i915_psr2_selective_fetch_check(data- > > > >drm_fd), > > > + igt_skip_on_f(i915_psr2_selective_fetch_check(data- > > > >drm_fd, > > > NULL), > > > "PSR2 sel fetch causes cursor to be added > > > to > > > primary plane " \ > > > "pages flips and async flip is not > > > supported in > > > cursor\n"); > > > > > > @@ -704,7 +704,7 @@ igt_main > > > * necessary, causing the async flip to fail > > > because > > > async flip is not > > > * supported in cursor plane. > > > */ > > > - > > > igt_skip_on_f(i915_psr2_selective_fetch_check(dat > > > a.drm_ > > > fd), > > > + igt_skip_on_f(i915_psr2_selective_fetch_check(dat > > > a.dr > > > m_fd, NULL), > > > "PSR2 sel fetch causes cursor to > > > be > > > added to primary plane " \ > > > "pages flips and async flip is not > > > supported in cursor\n"); > > > > > > diff --git a/tests/kms_cursor_legacy.c > > > b/tests/kms_cursor_legacy.c > > > index 0017659d4..a430f735a 100644 > > > --- a/tests/kms_cursor_legacy.c > > > +++ b/tests/kms_cursor_legacy.c > > > @@ -1849,7 +1849,7 @@ igt_main > > > * page flip with cursor legacy APIS when > > > Intel's > > > PSR2 selective > > > * fetch is enabled, so switching PSR1 for this > > > whole > > > test. > > > */ > > > - intel_psr2_restore = > > > i915_psr2_sel_fetch_to_psr1(display.drm_fd); > > > + intel_psr2_restore = > > > i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); > > > } > > > > > > igt_describe("Test checks how many cursor updates we can > > > fit > > > between vblanks " > > > @@ -2074,7 +2074,7 @@ igt_main > > > > > > igt_fixture { > > > if (intel_psr2_restore) > > > - > > > i915_psr2_sel_fetch_restore(display.drm_fd) > > > ; > > > + i915_psr2_sel_fetch_restore(display.drm_f > > > d, > > > NULL); > > > igt_display_fini(&display); > > > drm_close_driver(display.drm_fd); > > > } ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs 2024-02-19 8:33 ` Hogander, Jouni @ 2024-02-19 8:36 ` Joshi, Kunal1 0 siblings, 0 replies; 22+ messages in thread From: Joshi, Kunal1 @ 2024-02-19 8:36 UTC (permalink / raw) To: Hogander, Jouni, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh [-- Attachment #1: Type: text/plain, Size: 29624 bytes --] Hello Jouni, On 2/19/2024 2:03 PM, Hogander, Jouni wrote: > On Mon, 2024-02-19 at 13:37 +0530, Joshi, Kunal1 wrote: >> Hello Jouni, >> >> On 2/19/2024 1:15 PM, Hogander, Jouni wrote: >>> On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote: >>>> We can have multiple panels connected to the system so PSR >>>> information >>>> should be exposed per output. changes provide support for >>>> multiple >>>> PSR/PR to be tested simultaneously. >>>> >>>> Cc: Jouni Högander<jouni.hogander@intel.com> >>>> Cc: Animesh Manna<animesh.manna@intel.com> >>>> Cc: Arun R Murthy<arun.r.murthy@intel.com> >>>> Signed-off-by: Kunal Joshi<kunal1.joshi@intel.com> >>>> --- >>>> lib/igt_psr.c | 76 ++++++++++++++----- >>>> ----- >>>> -- >>>> lib/igt_psr.h | 14 ++--- >>>> tests/intel/kms_dirtyfb.c | 4 +- >>>> tests/intel/kms_fbcon_fbt.c | 4 +- >>>> tests/intel/kms_frontbuffer_tracking.c | 4 +- >>>> tests/intel/kms_pm_dc.c | 6 +- >>>> tests/intel/kms_psr.c | 4 +- >>>> tests/intel/kms_psr2_sf.c | 8 --- >>>> tests/intel/kms_psr2_su.c | 2 +- >>>> tests/intel/kms_psr_stress_test.c | 4 +- >>>> tests/kms_async_flips.c | 4 +- >>>> tests/kms_cursor_legacy.c | 4 +- >>>> 12 files changed, 65 insertions(+), 69 deletions(-) >>>> >>>> diff --git a/lib/igt_psr.c b/lib/igt_psr.c >>>> index ac214fcfc..cad8cce05 100644 >>>> --- a/lib/igt_psr.c >>>> +++ b/lib/igt_psr.c >>>> @@ -27,6 +27,10 @@ >>>> #include "igt_sysfs.h" >>>> #include <errno.h> >>>> >>>> +#define SET_DEBUGFS_PATH(output, path) \ >>>> + sprintf(path, "%s%s%s", output ? output->name : "", >>>> output ? >>>> "/" : "", \ >>>> + output ? "i915_psr_status" : >>>> "i915_edp_psr_status") >>>> + >>>> bool psr_disabled_check(int debugfs_fd) >>>> { >>>> char buf[PSR_STATUS_MAX_LEN]; >>>> @@ -37,11 +41,13 @@ bool psr_disabled_check(int debugfs_fd) >>>> return strstr(buf, "PSR mode: disabled\n"); >>>> } >>>> >>>> -bool psr2_selective_fetch_check(int debugfs_fd) >>>> +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t >>>> *output) >>>> { >>>> char buf[PSR_STATUS_MAX_LEN]; >>>> + char debugfs_file[128] = {0}; >>>> >>>> - igt_debugfs_simple_read(debugfs_fd, >>>> "i915_edp_psr_status", >>>> buf, >>>> + SET_DEBUGFS_PATH(output, debugfs_file); >>>> + igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, >>>> sizeof(buf)); >>>> >>>> return strstr(buf, "PSR2 selective fetch: enabled"); >>>> @@ -54,11 +60,7 @@ static bool psr_active_check(int debugfs_fd, >>>> enum >>>> psr_mode mode, igt_output_t *o >>>> const char *state = (mode == PSR_MODE_1 || mode == >>>> PR_MODE) ? >>>> "SRDENT" : "DEEP_SLEEP"; >>>> int ret; >>>> >>>> - if (output) >>>> - sprintf(debugfs_file, "%s/i915_psr_status", >>>> output- >>>>> name); >>>> - else >>>> - sprintf(debugfs_file, "%s", >>>> "i915_edp_psr_status"); >>>> - >>>> + SET_DEBUGFS_PATH(output, debugfs_file); >>>> ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, >>>> buf, sizeof(buf)); >>>> if (ret < 0) { >>>> @@ -90,13 +92,18 @@ bool psr_long_wait_update(int debugfs_fd, >>>> enum >>>> psr_mode mode, igt_output_t *outp >>>> return igt_wait(!psr_active_check(debugfs_fd, mode, >>>> output), >>>> 500, 10); >>>> } >>>> >>>> -static ssize_t psr_write(int debugfs_fd, const char *buf) >>>> +static ssize_t psr_write(int debugfs_fd, const char *buf, >>>> igt_output_t *output) >>>> { >>>> + /* >>>> + * FIXME: Currently we don't have separate psr_debug file >>>> for >>>> each output. >>>> + * so, we are using i915_edp_psr_debug file for all >>>> outputs. >>>> + * Later we need to add support for separate psr_debug >>>> file >>>> for each output. >>>> + */ >>>> return igt_sysfs_write(debugfs_fd, "i915_edp_psr_debug", >>>> buf, >>>> - strlen(buf)); >>>> + strlen(buf)); >>>> } >>>> >>>> -static int has_psr_debugfs(int debugfs_fd) >>>> +static int has_psr_debugfs(int debugfs_fd, igt_output_t *output) >>>> { >>>> int ret; >>>> >>>> @@ -105,7 +112,7 @@ static int has_psr_debugfs(int debugfs_fd) >>>> * Legacy mode will return OK here, debugfs api will >>>> return - >>>> EINVAL. >>>> * -ENODEV is returned when PSR is unavailable. >>>> */ >>>> - ret = psr_write(debugfs_fd, "0xf"); >>>> + ret = psr_write(debugfs_fd, "0xf", output); >>>> if (ret == -EINVAL) { >>>> errno = 0; >>>> return 0; >>>> @@ -113,7 +120,7 @@ static int has_psr_debugfs(int debugfs_fd) >>>> return ret; >>>> >>>> /* legacy debugfs api, we enabled irqs by writing, >>>> disable >>>> them. */ >>>> - psr_write(debugfs_fd, "0"); >>>> + psr_write(debugfs_fd, "0", output); >>>> return -EINVAL; >>>> } >>>> >>>> @@ -134,14 +141,14 @@ static int psr_restore_debugfs_fd = -1; >>>> >>>> static void restore_psr_debugfs(int sig) >>>> { >>>> - psr_write(psr_restore_debugfs_fd, "0"); >>>> + psr_write(psr_restore_debugfs_fd, "0", NULL); >>>> } >>>> >>>> -static bool psr_set(int device, int debugfs_fd, int mode) >>>> +static bool psr_set(int device, int debugfs_fd, int mode, >>>> igt_output_t *output) >>>> { >>>> int ret; >>>> >>>> - ret = has_psr_debugfs(debugfs_fd); >>>> + ret = has_psr_debugfs(debugfs_fd, output); >>>> if (ret == -ENODEV) { >>>> igt_skip("PSR not available\n"); >>>> return false; >>>> @@ -179,7 +186,7 @@ static bool psr_set(int device, int >>>> debugfs_fd, >>>> int mode) >>>> debug_val = "0x1"; >>>> } >>>> >>>> - ret = psr_write(debugfs_fd, debug_val); >>>> + ret = psr_write(debugfs_fd, debug_val, output); >>>> igt_require_f(ret > 0, "PSR2 SF feature not >>>> available\n"); >>>> } >>>> >>>> @@ -193,15 +200,15 @@ static bool psr_set(int device, int >>>> debugfs_fd, >>>> int mode) >>>> return ret; >>>> } >>>> >>>> -bool psr_enable(int device, int debugfs_fd, enum psr_mode mode) >>>> +bool psr_enable(int device, int debugfs_fd, enum psr_mode mode, >>>> igt_output_t *output) >>>> { >>>> - return psr_set(device, debugfs_fd, mode); >>>> + return psr_set(device, debugfs_fd, mode, output); >>>> } >>>> >>>> -bool psr_disable(int device, int debugfs_fd) >>>> +bool psr_disable(int device, int debugfs_fd, igt_output_t >>>> *output) >>>> { >>>> /* Any mode different than PSR_MODE_1/2 will disable PSR >>>> */ >>>> - return psr_set(device, debugfs_fd, -1); >>>> + return psr_set(device, debugfs_fd, -1, output); >>>> } >>>> >>>> bool psr_sink_support(int device, int debugfs_fd, enum psr_mode >>>> mode, igt_output_t *output) >>>> @@ -211,11 +218,7 @@ bool psr_sink_support(int device, int >>>> debugfs_fd, enum psr_mode mode, igt_output >>>> char buf[PSR_STATUS_MAX_LEN]; >>>> int ret; >>>> >>>> - if (output) >>>> - sprintf(debugfs_file, "%s/i915_psr_status", >>>> output- >>>>> name); >>>> - else >>>> - sprintf(debugfs_file, "%s", >>>> "i915_edp_psr_status"); >>>> - >>>> + SET_DEBUGFS_PATH(output, debugfs_file); >>>> ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, >>>> buf, >>>> sizeof(buf)); >>>> if (ret < 1) >>>> @@ -305,7 +308,7 @@ void psr_print_debugfs(int debugfs_fd) >>>> igt_info("%s", buf); >>>> } >>>> >>>> -bool i915_psr2_selective_fetch_check(int drm_fd) >>>> +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t >>>> *output) >>>> { >>>> int debugfs_fd; >>>> bool ret; >>>> @@ -314,7 +317,7 @@ bool i915_psr2_selective_fetch_check(int >>>> drm_fd) >>>> return false; >>>> >>>> debugfs_fd = igt_debugfs_dir(drm_fd); >>>> - ret = psr2_selective_fetch_check(debugfs_fd); >>>> + ret = psr2_selective_fetch_check(debugfs_fd, output); >>>> close(debugfs_fd); >>>> >>>> return ret; >>>> @@ -331,7 +334,7 @@ bool i915_psr2_selective_fetch_check(int >>>> drm_fd) >>>> * Returns: >>>> * True if PSR mode changed to PSR1, false otherwise. >>>> */ >>>> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd) >>>> +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t >>>> *output) >>>> { >>>> int debugfs_fd; >>>> bool ret = false; >>>> @@ -340,8 +343,8 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) >>>> return ret; >>>> >>>> debugfs_fd = igt_debugfs_dir(drm_fd); >>>> - if (psr2_selective_fetch_check(debugfs_fd)) { >>>> - psr_set(drm_fd, debugfs_fd, PSR_MODE_1); >>>> + if (psr2_selective_fetch_check(debugfs_fd, output)) { >>>> + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); >>>> ret = true; >>>> } >>>> >>>> @@ -355,12 +358,12 @@ bool i915_psr2_sel_fetch_to_psr1(int >>>> drm_fd) >>>> * Restore PSR2 selective fetch after tests were executed, this >>>> function should >>>> * only be called if i915_psr2_sel_fetch_to_psr1() returned >>>> true. >>>> */ >>>> -void i915_psr2_sel_fetch_restore(int drm_fd) >>>> +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t >>>> *output) >>>> { >>>> int debugfs_fd; >>>> >>>> debugfs_fd = igt_debugfs_dir(drm_fd); >>>> - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH); >>>> + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, >>>> output); >>>> close(debugfs_fd); >>>> } >>>> >>>> @@ -369,16 +372,17 @@ void i915_psr2_sel_fetch_restore(int >>>> drm_fd) >>>> * >>>> * Return the current PSR mode. >>>> */ >>>> -enum psr_mode psr_get_mode(int debugfs_fd) >>>> +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) >>>> { >>>> char buf[PSR_STATUS_MAX_LEN]; >>>> + char debugfs_file[128] = {0}; >>>> int ret; >>>> >>>> - >>>> - ret = igt_debugfs_simple_read(debugfs_fd, >>>> "i915_edp_psr_status", buf, >>>> + SET_DEBUGFS_PATH(output, debugfs_file); >>>> + ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, >>>> buf, >>>> sizeof(buf)); >>>> if (ret < 0) { >>>> - igt_info("Could not read i915_edp_psr_status: >>>> %s\n", >>>> + igt_info("Could not read psr status: %s\n", >>>> strerror(-ret)); >>>> return PSR_DISABLED; >>>> } >>>> diff --git a/lib/igt_psr.h b/lib/igt_psr.h >>>> index 82a4e8c5e..372bef2b2 100644 >>>> --- a/lib/igt_psr.h >>>> +++ b/lib/igt_psr.h >>>> @@ -46,21 +46,21 @@ enum fbc_mode { >>>> }; >>>> >>>> bool psr_disabled_check(int debugfs_fd); >>>> -bool psr2_selective_fetch_check(int debugfs_fd); >>>> +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t >>>> *output); >>>> bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, >>>> igt_output_t >>>> *output); >>>> bool psr_wait_update(int debugfs_fd, enum psr_mode mode, >>>> igt_output_t *output); >>>> bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, >>>> igt_output_t *output); >>>> -bool psr_enable(int device, int debugfs_fd, enum psr_mode); >>>> -bool psr_disable(int device, int debugfs_fd); >>>> +bool psr_enable(int device, int debugfs_fd, enum psr_mode, >>>> igt_output_t *output); >>>> +bool psr_disable(int device, int debugfs_fd, igt_output_t >>>> *output); >>>> bool psr_sink_support(int device, int debugfs_fd, enum psr_mode >>>> mode, igt_output_t *output); >>>> bool psr2_wait_su(int debugfs_fd, uint16_t *num_su_blocks); >>>> void psr_print_debugfs(int debugfs_fd); >>>> -enum psr_mode psr_get_mode(int debugfs_fd); >>>> +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t >>>> *output); >>>> >>>> -bool i915_psr2_selective_fetch_check(int drm_fd); >>>> +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t >>>> *output); >>>> >>>> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd); >>>> -void i915_psr2_sel_fetch_restore(int drm_fd); >>>> +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t >>>> *output); >>>> +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t >>>> *output); >>>> bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); >>>> >>>> #endif >>>> diff --git a/tests/intel/kms_dirtyfb.c >>>> b/tests/intel/kms_dirtyfb.c >>>> index 26b82e50a..c2411c824 100644 >>>> --- a/tests/intel/kms_dirtyfb.c >>>> +++ b/tests/intel/kms_dirtyfb.c >>>> @@ -127,7 +127,7 @@ static void enable_feature(data_t *data) >>>> intel_fbc_enable(data->drm_fd); >>>> break; >>>> case FEATURE_PSR: >>>> - psr_enable(data->drm_fd, data->debugfs_fd, >>>> PSR_MODE_1); >>>> + psr_enable(data->drm_fd, data->debugfs_fd, >>>> PSR_MODE_1, NULL); >>>> break; >>>> case FEATURE_DRRS: >>>> intel_drrs_enable(data->drm_fd, data->pipe); >>>> @@ -167,7 +167,7 @@ static void check_feature(data_t *data) >>>> static void disable_features(data_t *data) >>>> { >>>> intel_fbc_disable(data->drm_fd); >>>> - psr_disable(data->drm_fd, data->debugfs_fd); >>>> + psr_disable(data->drm_fd, data->debugfs_fd, NULL); >>>> intel_drrs_disable(data->drm_fd, data->pipe); >>>> } >>>> >>>> diff --git a/tests/intel/kms_fbcon_fbt.c >>>> b/tests/intel/kms_fbcon_fbt.c >>>> index 90484dccf..71e42f19c 100644 >>>> --- a/tests/intel/kms_fbcon_fbt.c >>>> +++ b/tests/intel/kms_fbcon_fbt.c >>>> @@ -277,7 +277,7 @@ static void disable_features(int device, int >>>> debugfs_fd) >>>> { >>>> igt_set_module_param_int(device, "enable_fbc", 0); >>>> if (psr_sink_support(device, debugfs_fd, PSR_MODE_1, >>>> NULL)) >>>> - psr_disable(device, debugfs_fd); >>>> + psr_disable(device, debugfs_fd, NULL); >>>> } >>>> >>>> static inline void fbc_modparam_enable(int device, int >>>> debugfs_fd) >>>> @@ -287,7 +287,7 @@ static inline void fbc_modparam_enable(int >>>> device, int debugfs_fd) >>>> >>>> static inline void psr_debugfs_enable(int device, int >>>> debugfs_fd) >>>> { >>>> - psr_enable(device, debugfs_fd, PSR_MODE_1); >>>> + psr_enable(device, debugfs_fd, PSR_MODE_1, NULL); >>>> } >>>> >>>> static void fbc_skips_on_fbcon(int debugfs_fd) >>>> diff --git a/tests/intel/kms_frontbuffer_tracking.c >>>> b/tests/intel/kms_frontbuffer_tracking.c >>>> index 912cca3f8..023843161 100644 >>>> --- a/tests/intel/kms_frontbuffer_tracking.c >>>> +++ b/tests/intel/kms_frontbuffer_tracking.c >>>> @@ -2234,7 +2234,7 @@ static bool disable_features(const struct >>>> test_mode *t) >>>> intel_fbc_disable(drm.fd); >>>> intel_drrs_disable(drm.fd, prim_mode_params.pipe); >>>> >>>> - return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : >>>> false; >>>> + return psr.can_test ? psr_disable(drm.fd, drm.debugfs, >>>> NULL) >>>> : false; >>>> } >>>> >>>> static void *busy_thread_func(void *data) >>>> @@ -2867,7 +2867,7 @@ static bool enable_features_for_test(const >>>> struct test_mode *t) >>>> if (t->feature & FEATURE_FBC) >>>> intel_fbc_enable(drm.fd); >>>> if (t->feature & FEATURE_PSR) >>>> - ret = psr_enable(drm.fd, drm.debugfs, >>>> PSR_MODE_1); >>>> + ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1, >>>> NULL); >>>> if (t->feature & FEATURE_DRRS) >>>> intel_drrs_enable(drm.fd, >>>> prim_mode_params.pipe); >>>> >>>> diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c >>>> index 0d5824e67..7deebf83d 100644 >>>> --- a/tests/intel/kms_pm_dc.c >>>> +++ b/tests/intel/kms_pm_dc.c >>>> @@ -362,7 +362,7 @@ static void require_dc_counter(int >>>> debugfs_fd, >>>> int dc_flag) >>>> static void setup_dc3co(data_t *data) >>>> { >>>> data->op_psr_mode = PSR_MODE_2; >>>> - psr_enable(data->drm_fd, data->debugfs_fd, data- >>>>> op_psr_mode); >>>> + psr_enable(data->drm_fd, data->debugfs_fd, data- >>>>> op_psr_mode, >>>> NULL); >>>> igt_require_f(psr_wait_entry(data->debugfs_fd, data- >>>>> op_psr_mode, NULL), >>>> "PSR2 is not enabled\n"); >>>> } >>>> @@ -665,7 +665,7 @@ igt_main >>>> igt_require(psr_sink_support(data.drm_fd, >>>> data.debugfs_fd, >>>> PSR_MODE_1, NULL)); >>>> data.op_psr_mode = PSR_MODE_1; >>>> - psr_enable(data.drm_fd, data.debugfs_fd, >>>> data.op_psr_mode); >>>> + psr_enable(data.drm_fd, data.debugfs_fd, >>>> data.op_psr_mode, NULL); >>>> test_dc_state_psr(&data, CHECK_DC5); >>>> } >>>> >>>> @@ -675,7 +675,7 @@ igt_main >>>> igt_require(psr_sink_support(data.drm_fd, >>>> data.debugfs_fd, >>>> PSR_MODE_1, NULL)); >>>> data.op_psr_mode = PSR_MODE_1; >>>> - psr_enable(data.drm_fd, data.debugfs_fd, >>>> data.op_psr_mode); >>>> + psr_enable(data.drm_fd, data.debugfs_fd, >>>> data.op_psr_mode, NULL); >>>> igt_require_f(igt_pm_pc8_plus_residencies_enable >>>> d(dat >>>> a.msr_fd), >>>> "PC8+ residencies not >>>> supported\n"); >>>> if (intel_display_ver(data.devid) >= 14) >>>> diff --git a/tests/intel/kms_psr.c b/tests/intel/kms_psr.c >>>> index 521d4c708..3822b3081 100644 >>>> --- a/tests/intel/kms_psr.c >>>> +++ b/tests/intel/kms_psr.c >>>> @@ -519,7 +519,7 @@ static bool psr_enable_if_enabled(data_t >>>> *data) >>>> igt_skip("enable_psr modparam doesn't allow psr >>>> mode >>>> %d\n", >>>> data->op_psr_mode); >>>> >>>> - return psr_enable(data->drm_fd, data->debugfs_fd, data- >>>>> op_psr_mode); >>>> + return psr_enable(data->drm_fd, data->debugfs_fd, data- >>>>> op_psr_mode, data->output); >>>> } >>>> >>>> static inline void manual(const char *expected) >>>> @@ -658,6 +658,7 @@ static void test_cleanup(data_t *data) >>>> >>>> igt_remove_fb(data->drm_fd, &data->fb_green); >>>> igt_remove_fb(data->drm_fd, &data->fb_white); >>>> + psr_disable(data->drm_fd, data->debugfs_fd, data- >>>>> output); >>>> } >>>> >>>> static void setup_test_plane(data_t *data, int test_plane) >>>> @@ -976,7 +977,6 @@ igt_main >>>> } >>>> >>>> igt_fixture { >>>> - psr_disable(data.drm_fd, data.debugfs_fd); >>>> close(data.debugfs_fd); >>>> buf_ops_destroy(data.bops); >>>> diff --git a/tests/intel/kms_psr2_sf.c >>>> b/tests/intel/kms_psr2_sf.c >>>> index ecf9ad77f..8e6a9e02c 100644 >>>> --- a/tests/intel/kms_psr2_sf.c >>>> +++ b/tests/intel/kms_psr2_sf.c >>>> @@ -1012,11 +1012,6 @@ igt_main >>>> data.fbc_flag = true; >>>> } >>>> >>>> - /* Test if PSR2 can be enabled */ >>>> - igt_require_f(psr_enable(data.drm_fd, >>>> - data.debugfs_fd, >>>> PSR_MODE_2_SEL_FETCH), >>>> - "Error enabling PSR2\n"); >>>> - >>> I started to think it might actually not make sense to remove this. >>> Currently kms_psr2_sf is skipped if psr debugfs interface doesn't >>> exist. I.e. PSR is not supported by the platform. This is with >>> reasonable info "PSR not available". After your change it will >>> assert >>> below as debugfs entry can't be opened. >>> >>> BR, >>> >>> Jouni Högander >> >> Thanks for catching this, >> How about having a check before looping on all output to check if we >> have psr_debug interface present? > I think that is ok as well. But you can drop this change completely as > well. > > BR, > > Jouni Högander I think we need to remove this check as we check specifically for PSR_MODE_2_SEL_FETCH Even though it doesn't matter but for readability purpose. Let me know if you think otherwise. Thanks and Regards Kunal Joshi > >> Thanks and Regards >> Kunal Joshi >> >>>> data.damage_area_count = MAX_DAMAGE_AREAS; >>>> data.primary_format = DRM_FORMAT_XRGB8888; >>>> >>>> @@ -1026,9 +1021,6 @@ igt_main >>>> igt_info("Big framebuffer size %dx%d\n", >>>> data.big_fb_width, data.big_fb_height); >>>> >>>> - >>>> igt_require_f(psr2_selective_fetch_check(data.deb >>>> ugfs_f >>>> d), >>>> - "PSR2 selective fetch not >>>> enabled\n"); >>>> - >>>> for_each_pipe_with_valid_output(&data.display, >>>> data.pipe, data.output) { >>>> coexist_features[n_pipes] = 0; >>>> if (check_psr2_support(&data)) { >>>> diff --git a/tests/intel/kms_psr2_su.c >>>> b/tests/intel/kms_psr2_su.c >>>> index 936b5beb3..437ee36f6 100644 >>>> --- a/tests/intel/kms_psr2_su.c >>>> +++ b/tests/intel/kms_psr2_su.c >>>> @@ -338,7 +338,7 @@ igt_main >>>> >>>> /* Test if PSR2 can be enabled */ >>>> igt_require_f(psr_enable(data.drm_fd, >>>> - data.debugfs_fd, >>>> PSR_MODE_2), >>>> + data.debugfs_fd, >>>> PSR_MODE_2, >>>> NULL), >>>> "Error enabling PSR2\n"); >>>> data.op = FRONTBUFFER; >>>> data.format = DRM_FORMAT_XRGB8888; >>>> diff --git a/tests/intel/kms_psr_stress_test.c >>>> b/tests/intel/kms_psr_stress_test.c >>>> index 7aea8e8a5..bca3bd513 100644 >>>> --- a/tests/intel/kms_psr_stress_test.c >>>> +++ b/tests/intel/kms_psr_stress_test.c >>>> @@ -230,7 +230,7 @@ static void prepare(data_t *data) >>>> r = timerfd_settime(data->completed_timerfd, 0, >>>> &interval, >>>> NULL); >>>> igt_require_f(r != -1, "Error setting >>>> completed_timerfd\n"); >>>> >>>> - data->initial_state = psr_get_mode(data->debugfs_fd); >>>> + data->initial_state = psr_get_mode(data->debugfs_fd, >>>> NULL); >>>> igt_require(data->initial_state != PSR_DISABLED); >>>> igt_require(psr_wait_entry(data->debugfs_fd, data- >>>>> initial_state, NULL)); >>>> } >>>> @@ -343,7 +343,7 @@ static void run(data_t *data) >>>> } >>>> >>>> /* Check if after all this stress the PSR is still in >>>> the >>>> same state */ >>>> - igt_assert(psr_get_mode(data->debugfs_fd) == data- >>>>> initial_state); >>>> + igt_assert(psr_get_mode(data->debugfs_fd, NULL) == data- >>>>> initial_state); >>>> } >>>> >>>> igt_main >>>> diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c >>>> index a0349fa03..2895168f7 100644 >>>> --- a/tests/kms_async_flips.c >>>> +++ b/tests/kms_async_flips.c >>>> @@ -391,7 +391,7 @@ static void test_cursor(data_t *data) >>>> * necessary, causing the async flip to fail because >>>> async >>>> flip is not >>>> * supported in cursor plane. >>>> */ >>>> - igt_skip_on_f(i915_psr2_selective_fetch_check(data- >>>>> drm_fd), >>>> + igt_skip_on_f(i915_psr2_selective_fetch_check(data- >>>>> drm_fd, >>>> NULL), >>>> "PSR2 sel fetch causes cursor to be added >>>> to >>>> primary plane " \ >>>> "pages flips and async flip is not >>>> supported in >>>> cursor\n"); >>>> >>>> @@ -704,7 +704,7 @@ igt_main >>>> * necessary, causing the async flip to fail >>>> because >>>> async flip is not >>>> * supported in cursor plane. >>>> */ >>>> - >>>> igt_skip_on_f(i915_psr2_selective_fetch_check(dat >>>> a.drm_ >>>> fd), >>>> + igt_skip_on_f(i915_psr2_selective_fetch_check(dat >>>> a.dr >>>> m_fd, NULL), >>>> "PSR2 sel fetch causes cursor to >>>> be >>>> added to primary plane " \ >>>> "pages flips and async flip is not >>>> supported in cursor\n"); >>>> >>>> diff --git a/tests/kms_cursor_legacy.c >>>> b/tests/kms_cursor_legacy.c >>>> index 0017659d4..a430f735a 100644 >>>> --- a/tests/kms_cursor_legacy.c >>>> +++ b/tests/kms_cursor_legacy.c >>>> @@ -1849,7 +1849,7 @@ igt_main >>>> * page flip with cursor legacy APIS when >>>> Intel's >>>> PSR2 selective >>>> * fetch is enabled, so switching PSR1 for this >>>> whole >>>> test. >>>> */ >>>> - intel_psr2_restore = >>>> i915_psr2_sel_fetch_to_psr1(display.drm_fd); >>>> + intel_psr2_restore = >>>> i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); >>>> } >>>> >>>> igt_describe("Test checks how many cursor updates we can >>>> fit >>>> between vblanks " >>>> @@ -2074,7 +2074,7 @@ igt_main >>>> >>>> igt_fixture { >>>> if (intel_psr2_restore) >>>> - >>>> i915_psr2_sel_fetch_restore(display.drm_fd) >>>> ; >>>> + i915_psr2_sel_fetch_restore(display.drm_f >>>> d, >>>> NULL); >>>> igt_display_fini(&display); >>>> drm_close_driver(display.drm_fd); >>>> } [-- Attachment #2: Type: text/html, Size: 44778 bytes --] ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update 2024-02-18 9:17 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi 2024-02-18 9:17 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi @ 2024-02-18 9:17 ` Kunal Joshi 2024-02-19 8:00 ` Hogander, Jouni 2024-02-19 10:01 ` Joshi, Kunal1 2024-02-18 9:17 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi ` (4 subsequent siblings) 6 siblings, 2 replies; 22+ messages in thread From: Kunal Joshi @ 2024-02-18 9:17 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy Extend the tests to cover panel replay selective fetch feature. From kms_psr2_sf test point of view we have check_pr_psr2_sel_fetch_support function to check if PR/PSR2 selective fetch is supported for an output if output supports selective fetch then we check we enter DEEP_SLEEP mode in run function v2: fixed dynamic test name v3: use check_psr2_support (Jouni) v4: split patches (Jouni) Cc: Jouni Högander <jouni.hogander@intel.com> Cc: Animesh Manna <animesh.manna@intel.com> Cc: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> --- lib/igt_psr.c | 36 ++++++++++++++++++++++++++---------- lib/igt_psr.h | 6 +++--- tests/kms_cursor_legacy.c | 4 ++-- 3 files changed, 31 insertions(+), 15 deletions(-) diff --git a/lib/igt_psr.c b/lib/igt_psr.c index cad8cce05..9accd2047 100644 --- a/lib/igt_psr.c +++ b/lib/igt_psr.c @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd) return strstr(buf, "PSR mode: disabled\n"); } -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output) +bool selective_fetch_check(int debugfs_fd, igt_output_t *output) { char buf[PSR_STATUS_MAX_LEN]; char debugfs_file[128] = {0}; @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output (strstr(line, "PSR = yes") && (strstr(line, "[0x03]") || strstr(line, "[0x04]"))); case PR_MODE: - return strstr(line, "Panel Replay = yes"); + return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no"); + case PR_MODE_SEL_FETCH: + return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes"); default: igt_assert_f(false, "Invalid psr mode\n"); return false; @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output) return false; debugfs_fd = igt_debugfs_dir(drm_fd); - ret = psr2_selective_fetch_check(debugfs_fd, output); + ret = selective_fetch_check(debugfs_fd, output); close(debugfs_fd); return ret; @@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output) * Returns: * True if PSR mode changed to PSR1, false otherwise. */ -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t *output) { int debugfs_fd; bool ret = false; + enum psr_mode mode; if (!is_intel_device(drm_fd)) return ret; debugfs_fd = igt_debugfs_dir(drm_fd); - if (psr2_selective_fetch_check(debugfs_fd, output)) { - psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); + if (selective_fetch_check(debugfs_fd, output)) { + mode = psr_get_mode(debugfs_fd, output); + if (mode == PR_MODE_SEL_FETCH) + psr_set(drm_fd, debugfs_fd, PR_MODE, output); + else if (mode == PSR_MODE_2_SEL_FETCH) + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); + else + igt_assert("switch not possible from current psr mode\n"); ret = true; } @@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) * Restore PSR2 selective fetch after tests were executed, this function should * only be called if i915_psr2_sel_fetch_to_psr1() returned true. */ -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) { int debugfs_fd; + enum psr_mode mode; debugfs_fd = igt_debugfs_dir(drm_fd); - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); + mode = psr_get_mode(debugfs_fd, output); + if (mode == PR_MODE) + psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH, output); + else + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); close(debugfs_fd); } @@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) if (strstr(buf, "Panel Replay Enabled")) return PR_MODE; + else if (strstr(buf, "Panel Replay Selective Update Enabled")) + return PR_MODE_SEL_FETCH; else if (strstr(buf, "PSR2 selective fetch: enabled")) return PSR_MODE_2_SEL_FETCH; - else if (strstr(buf, "PSR2 enabled")) + else if (strstr(buf, "PSR2")) return PSR_MODE_2; - else if (strstr(buf, "PSR1 enabled")) + else if (strstr(buf, "PSR1")) return PSR_MODE_1; return PSR_DISABLED; diff --git a/lib/igt_psr.h b/lib/igt_psr.h index 372bef2b2..36ba7f068 100644 --- a/lib/igt_psr.h +++ b/lib/igt_psr.h @@ -46,7 +46,7 @@ enum fbc_mode { }; bool psr_disabled_check(int debugfs_fd); -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output); +bool selective_fetch_check(int debugfs_fd, igt_output_t *output); bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); @@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output); bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output); -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output); -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t *output); +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); #endif diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c index a430f735a..91e5e9b07 100644 --- a/tests/kms_cursor_legacy.c +++ b/tests/kms_cursor_legacy.c @@ -1849,7 +1849,7 @@ igt_main * page flip with cursor legacy APIS when Intel's PSR2 selective * fetch is enabled, so switching PSR1 for this whole test. */ - intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); + intel_psr2_restore = i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL); } igt_describe("Test checks how many cursor updates we can fit between vblanks " @@ -2074,7 +2074,7 @@ igt_main igt_fixture { if (intel_psr2_restore) - i915_psr2_sel_fetch_restore(display.drm_fd, NULL); + i915_pr_psr2_sel_fetch_restore(display.drm_fd, NULL); igt_display_fini(&display); drm_close_driver(display.drm_fd); } -- 2.25.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update 2024-02-18 9:17 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi @ 2024-02-19 8:00 ` Hogander, Jouni 2024-02-19 8:12 ` Joshi, Kunal1 2024-02-19 10:01 ` Joshi, Kunal1 1 sibling, 1 reply; 22+ messages in thread From: Hogander, Jouni @ 2024-02-19 8:00 UTC (permalink / raw) To: Joshi, Kunal1, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote: > Extend the tests to cover panel replay selective fetch feature. > > From kms_psr2_sf test point of view we have > check_pr_psr2_sel_fetch_support > function to check if PR/PSR2 selective fetch is supported for an > output > if output supports selective fetch then we check we enter DEEP_SLEEP > mode > in run function > > v2: fixed dynamic test name > v3: use check_psr2_support (Jouni) > v4: split patches (Jouni) > > Cc: Jouni Högander <jouni.hogander@intel.com> > Cc: Animesh Manna <animesh.manna@intel.com> > Cc: Arun R Murthy <arun.r.murthy@intel.com> > Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> > --- > lib/igt_psr.c | 36 ++++++++++++++++++++++++++---------- > lib/igt_psr.h | 6 +++--- > tests/kms_cursor_legacy.c | 4 ++-- > 3 files changed, 31 insertions(+), 15 deletions(-) > > diff --git a/lib/igt_psr.c b/lib/igt_psr.c > index cad8cce05..9accd2047 100644 > --- a/lib/igt_psr.c > +++ b/lib/igt_psr.c > @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd) > return strstr(buf, "PSR mode: disabled\n"); > } > > -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > *output) > +bool selective_fetch_check(int debugfs_fd, igt_output_t *output) > { > char buf[PSR_STATUS_MAX_LEN]; > char debugfs_file[128] = {0}; > @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd, > enum psr_mode mode, igt_output > (strstr(line, "PSR = yes") && > (strstr(line, "[0x03]") || strstr(line, > "[0x04]"))); > case PR_MODE: > - return strstr(line, "Panel Replay = yes"); > + return strstr(line, "Panel Replay = yes, Panel Replay > Selective Update = no"); > + case PR_MODE_SEL_FETCH: > + return strstr(line, "Panel Replay = yes, Panel Replay > Selective Update = yes"); > default: > igt_assert_f(false, "Invalid psr mode\n"); > return false; > @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd, > igt_output_t *output) > return false; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - ret = psr2_selective_fetch_check(debugfs_fd, output); > + ret = selective_fetch_check(debugfs_fd, output); > close(debugfs_fd); > > return ret; > @@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int > drm_fd, igt_output_t *output) > * Returns: > * True if PSR mode changed to PSR1, false otherwise. > */ > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) > +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t > *output) > { > int debugfs_fd; > bool ret = false; > + enum psr_mode mode; > > if (!is_intel_device(drm_fd)) > return ret; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - if (psr2_selective_fetch_check(debugfs_fd, output)) { > - psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); > + if (selective_fetch_check(debugfs_fd, output)) { > + mode = psr_get_mode(debugfs_fd, output); > + if (mode == PR_MODE_SEL_FETCH) > + psr_set(drm_fd, debugfs_fd, PR_MODE, output); > + else if (mode == PSR_MODE_2_SEL_FETCH) > + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, > output); > + else > + igt_assert("switch not possible from current > psr mode\n"); There is no need to change this function. psr2_selective_fetch_check (now selective_fetch_check) works for PR and PSR. BR, Jouni Högander > ret = true; > } > > @@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd, > igt_output_t *output) > * Restore PSR2 selective fetch after tests were executed, this > function should > * only be called if i915_psr2_sel_fetch_to_psr1() returned true. > */ > -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) > +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t > *output) > { > int debugfs_fd; > + enum psr_mode mode; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); > + mode = psr_get_mode(debugfs_fd, output); > + if (mode == PR_MODE) > + psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH, > output); > + else > + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, > output); > close(debugfs_fd); > } > > @@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, > igt_output_t *output) > > if (strstr(buf, "Panel Replay Enabled")) > return PR_MODE; > + else if (strstr(buf, "Panel Replay Selective Update > Enabled")) > + return PR_MODE_SEL_FETCH; > else if (strstr(buf, "PSR2 selective fetch: enabled")) > return PSR_MODE_2_SEL_FETCH; > - else if (strstr(buf, "PSR2 enabled")) > + else if (strstr(buf, "PSR2")) > return PSR_MODE_2; > - else if (strstr(buf, "PSR1 enabled")) > + else if (strstr(buf, "PSR1")) > return PSR_MODE_1; > > return PSR_DISABLED; > diff --git a/lib/igt_psr.h b/lib/igt_psr.h > index 372bef2b2..36ba7f068 100644 > --- a/lib/igt_psr.h > +++ b/lib/igt_psr.h > @@ -46,7 +46,7 @@ enum fbc_mode { > }; > > bool psr_disabled_check(int debugfs_fd); > -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > *output); > +bool selective_fetch_check(int debugfs_fd, igt_output_t *output); > bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t > *output); > bool psr_wait_update(int debugfs_fd, enum psr_mode mode, > igt_output_t *output); > bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, > igt_output_t *output); > @@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd, > igt_output_t *output); > > bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t > *output); > > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output); > -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); > +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t > *output); > +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t > *output); > bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); > > #endif > diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c > index a430f735a..91e5e9b07 100644 > --- a/tests/kms_cursor_legacy.c > +++ b/tests/kms_cursor_legacy.c > @@ -1849,7 +1849,7 @@ igt_main > * page flip with cursor legacy APIS when Intel's > PSR2 selective > * fetch is enabled, so switching PSR1 for this whole > test. > */ > - intel_psr2_restore = > i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); > + intel_psr2_restore = > i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL); > } > > igt_describe("Test checks how many cursor updates we can fit > between vblanks " > @@ -2074,7 +2074,7 @@ igt_main > > igt_fixture { > if (intel_psr2_restore) > - i915_psr2_sel_fetch_restore(display.drm_fd, > NULL); > + i915_pr_psr2_sel_fetch_restore(display.drm_fd > , NULL); > igt_display_fini(&display); > drm_close_driver(display.drm_fd); > } ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update 2024-02-19 8:00 ` Hogander, Jouni @ 2024-02-19 8:12 ` Joshi, Kunal1 2024-02-19 8:56 ` Hogander, Jouni 0 siblings, 1 reply; 22+ messages in thread From: Joshi, Kunal1 @ 2024-02-19 8:12 UTC (permalink / raw) To: Hogander, Jouni, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh Hello Jouni, On 2/19/2024 1:30 PM, Hogander, Jouni wrote: > On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote: >> Extend the tests to cover panel replay selective fetch feature. >> >> From kms_psr2_sf test point of view we have >> check_pr_psr2_sel_fetch_support >> function to check if PR/PSR2 selective fetch is supported for an >> output >> if output supports selective fetch then we check we enter DEEP_SLEEP >> mode >> in run function >> >> v2: fixed dynamic test name >> v3: use check_psr2_support (Jouni) >> v4: split patches (Jouni) >> >> Cc: Jouni Högander <jouni.hogander@intel.com> >> Cc: Animesh Manna <animesh.manna@intel.com> >> Cc: Arun R Murthy <arun.r.murthy@intel.com> >> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> >> --- >> lib/igt_psr.c | 36 ++++++++++++++++++++++++++---------- >> lib/igt_psr.h | 6 +++--- >> tests/kms_cursor_legacy.c | 4 ++-- >> 3 files changed, 31 insertions(+), 15 deletions(-) >> >> diff --git a/lib/igt_psr.c b/lib/igt_psr.c >> index cad8cce05..9accd2047 100644 >> --- a/lib/igt_psr.c >> +++ b/lib/igt_psr.c >> @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd) >> return strstr(buf, "PSR mode: disabled\n"); >> } >> >> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t >> *output) >> +bool selective_fetch_check(int debugfs_fd, igt_output_t *output) >> { >> char buf[PSR_STATUS_MAX_LEN]; >> char debugfs_file[128] = {0}; >> @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd, >> enum psr_mode mode, igt_output >> (strstr(line, "PSR = yes") && >> (strstr(line, "[0x03]") || strstr(line, >> "[0x04]"))); >> case PR_MODE: >> - return strstr(line, "Panel Replay = yes"); >> + return strstr(line, "Panel Replay = yes, Panel Replay >> Selective Update = no"); >> + case PR_MODE_SEL_FETCH: >> + return strstr(line, "Panel Replay = yes, Panel Replay >> Selective Update = yes"); >> default: >> igt_assert_f(false, "Invalid psr mode\n"); >> return false; >> @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd, >> igt_output_t *output) >> return false; >> >> debugfs_fd = igt_debugfs_dir(drm_fd); >> - ret = psr2_selective_fetch_check(debugfs_fd, output); >> + ret = selective_fetch_check(debugfs_fd, output); >> close(debugfs_fd); >> >> return ret; >> @@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int >> drm_fd, igt_output_t *output) >> * Returns: >> * True if PSR mode changed to PSR1, false otherwise. >> */ >> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) >> +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t >> *output) >> { >> int debugfs_fd; >> bool ret = false; >> + enum psr_mode mode; >> >> if (!is_intel_device(drm_fd)) >> return ret; >> >> debugfs_fd = igt_debugfs_dir(drm_fd); >> - if (psr2_selective_fetch_check(debugfs_fd, output)) { >> - psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); >> + if (selective_fetch_check(debugfs_fd, output)) { >> + mode = psr_get_mode(debugfs_fd, output); >> + if (mode == PR_MODE_SEL_FETCH) >> + psr_set(drm_fd, debugfs_fd, PR_MODE, output); >> + else if (mode == PSR_MODE_2_SEL_FETCH) >> + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, >> output); >> + else >> + igt_assert("switch not possible from current >> psr mode\n"); > There is no need to change this function. psr2_selective_fetch_check > (now selective_fetch_check) works for PR and PSR. > > BR, > > Jouni Högander Have modified selective_fetch_check to check for a particular output, bool selective_fetch_check(int debugfs_fd, igt_output_t *output) { char buf[PSR_STATUS_MAX_LEN]; char debugfs_file[128] = {0}; SET_DEBUGFS_PATH(output, debugfs_file); igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); return strstr(buf, "PSR2 selective fetch: enabled"); } Will this be not required? Thanks and Regards Kunal Joshi > >> ret = true; >> } >> >> @@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd, >> igt_output_t *output) >> * Restore PSR2 selective fetch after tests were executed, this >> function should >> * only be called if i915_psr2_sel_fetch_to_psr1() returned true. >> */ >> -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) >> +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t >> *output) >> { >> int debugfs_fd; >> + enum psr_mode mode; >> >> debugfs_fd = igt_debugfs_dir(drm_fd); >> - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); >> + mode = psr_get_mode(debugfs_fd, output); >> + if (mode == PR_MODE) >> + psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH, >> output); >> + else >> + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, >> output); >> close(debugfs_fd); >> } >> >> @@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, >> igt_output_t *output) >> >> if (strstr(buf, "Panel Replay Enabled")) >> return PR_MODE; >> + else if (strstr(buf, "Panel Replay Selective Update >> Enabled")) >> + return PR_MODE_SEL_FETCH; >> else if (strstr(buf, "PSR2 selective fetch: enabled")) >> return PSR_MODE_2_SEL_FETCH; >> - else if (strstr(buf, "PSR2 enabled")) >> + else if (strstr(buf, "PSR2")) >> return PSR_MODE_2; >> - else if (strstr(buf, "PSR1 enabled")) >> + else if (strstr(buf, "PSR1")) >> return PSR_MODE_1; >> >> return PSR_DISABLED; >> diff --git a/lib/igt_psr.h b/lib/igt_psr.h >> index 372bef2b2..36ba7f068 100644 >> --- a/lib/igt_psr.h >> +++ b/lib/igt_psr.h >> @@ -46,7 +46,7 @@ enum fbc_mode { >> }; >> >> bool psr_disabled_check(int debugfs_fd); >> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t >> *output); >> +bool selective_fetch_check(int debugfs_fd, igt_output_t *output); >> bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t >> *output); >> bool psr_wait_update(int debugfs_fd, enum psr_mode mode, >> igt_output_t *output); >> bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, >> igt_output_t *output); >> @@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd, >> igt_output_t *output); >> >> bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t >> *output); >> >> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output); >> -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); >> +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t >> *output); >> +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t >> *output); >> bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); >> >> #endif >> diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c >> index a430f735a..91e5e9b07 100644 >> --- a/tests/kms_cursor_legacy.c >> +++ b/tests/kms_cursor_legacy.c >> @@ -1849,7 +1849,7 @@ igt_main >> * page flip with cursor legacy APIS when Intel's >> PSR2 selective >> * fetch is enabled, so switching PSR1 for this whole >> test. >> */ >> - intel_psr2_restore = >> i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); >> + intel_psr2_restore = >> i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL); >> } >> >> igt_describe("Test checks how many cursor updates we can fit >> between vblanks " >> @@ -2074,7 +2074,7 @@ igt_main >> >> igt_fixture { >> if (intel_psr2_restore) >> - i915_psr2_sel_fetch_restore(display.drm_fd, >> NULL); >> + i915_pr_psr2_sel_fetch_restore(display.drm_fd >> , NULL); >> igt_display_fini(&display); >> drm_close_driver(display.drm_fd); >> } ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update 2024-02-19 8:12 ` Joshi, Kunal1 @ 2024-02-19 8:56 ` Hogander, Jouni 2024-02-19 9:01 ` Joshi, Kunal1 0 siblings, 1 reply; 22+ messages in thread From: Hogander, Jouni @ 2024-02-19 8:56 UTC (permalink / raw) To: Joshi, Kunal1, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh On Mon, 2024-02-19 at 13:42 +0530, Joshi, Kunal1 wrote: > Hello Jouni, > > On 2/19/2024 1:30 PM, Hogander, Jouni wrote: > > On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote: > > > Extend the tests to cover panel replay selective fetch feature. > > > > > > From kms_psr2_sf test point of view we have > > > check_pr_psr2_sel_fetch_support > > > function to check if PR/PSR2 selective fetch is supported for an > > > output > > > if output supports selective fetch then we check we enter > > > DEEP_SLEEP > > > mode > > > in run function > > > > > > v2: fixed dynamic test name > > > v3: use check_psr2_support (Jouni) > > > v4: split patches (Jouni) > > > > > > Cc: Jouni Högander <jouni.hogander@intel.com> > > > Cc: Animesh Manna <animesh.manna@intel.com> > > > Cc: Arun R Murthy <arun.r.murthy@intel.com> > > > Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> > > > --- > > > lib/igt_psr.c | 36 ++++++++++++++++++++++++++------ > > > ---- > > > lib/igt_psr.h | 6 +++--- > > > tests/kms_cursor_legacy.c | 4 ++-- > > > 3 files changed, 31 insertions(+), 15 deletions(-) > > > > > > diff --git a/lib/igt_psr.c b/lib/igt_psr.c > > > index cad8cce05..9accd2047 100644 > > > --- a/lib/igt_psr.c > > > +++ b/lib/igt_psr.c > > > @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd) > > > return strstr(buf, "PSR mode: disabled\n"); > > > } > > > > > > -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > > > *output) > > > +bool selective_fetch_check(int debugfs_fd, igt_output_t *output) > > > { > > > char buf[PSR_STATUS_MAX_LEN]; > > > char debugfs_file[128] = {0}; > > > @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int > > > debugfs_fd, > > > enum psr_mode mode, igt_output > > > (strstr(line, "PSR = yes") && > > > (strstr(line, "[0x03]") || strstr(line, > > > "[0x04]"))); > > > case PR_MODE: > > > - return strstr(line, "Panel Replay = yes"); > > > + return strstr(line, "Panel Replay = yes, Panel > > > Replay > > > Selective Update = no"); > > > + case PR_MODE_SEL_FETCH: > > > + return strstr(line, "Panel Replay = yes, Panel > > > Replay > > > Selective Update = yes"); > > > default: > > > igt_assert_f(false, "Invalid psr mode\n"); > > > return false; > > > @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int > > > drm_fd, > > > igt_output_t *output) > > > return false; > > > > > > debugfs_fd = igt_debugfs_dir(drm_fd); > > > - ret = psr2_selective_fetch_check(debugfs_fd, output); > > > + ret = selective_fetch_check(debugfs_fd, output); > > > close(debugfs_fd); > > > > > > return ret; > > > @@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int > > > drm_fd, igt_output_t *output) > > > * Returns: > > > * True if PSR mode changed to PSR1, false otherwise. > > > */ > > > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t > > > *output) > > > +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t > > > *output) > > > { > > > int debugfs_fd; > > > bool ret = false; > > > + enum psr_mode mode; > > > > > > if (!is_intel_device(drm_fd)) > > > return ret; > > > > > > debugfs_fd = igt_debugfs_dir(drm_fd); > > > - if (psr2_selective_fetch_check(debugfs_fd, output)) { > > > - psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); > > > + if (selective_fetch_check(debugfs_fd, output)) { > > > + mode = psr_get_mode(debugfs_fd, output); > > > + if (mode == PR_MODE_SEL_FETCH) > > > + psr_set(drm_fd, debugfs_fd, PR_MODE, > > > output); > > > + else if (mode == PSR_MODE_2_SEL_FETCH) > > > + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, > > > output); > > > + else > > > + igt_assert("switch not possible from > > > current > > > psr mode\n"); > > There is no need to change this function. > > psr2_selective_fetch_check > > (now selective_fetch_check) works for PR and PSR. > > > > BR, > > > > Jouni Högander > Have modified selective_fetch_check to check for a particular output, > > bool selective_fetch_check(int debugfs_fd, igt_output_t *output) > { > char buf[PSR_STATUS_MAX_LEN]; > char debugfs_file[128] = {0}; > > SET_DEBUGFS_PATH(output, debugfs_file); > igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, > sizeof(buf)); > > return strstr(buf, "PSR2 selective fetch: enabled"); > } > > Will this be not required? No it has to support providing ouput as parameter. My point is that selective_fetch_check works for PR as well. and: psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); Will switch to Panel Replay Full Frame update for Panel Replay and PSR1 for PSR. If we ever need to take into account panel supporting both I think we should do that by adding disable flag for Panel Replay instead of setting the mode. See: https://patchwork.freedesktop.org/series/128193/ and specifically: https://patchwork.freedesktop.org/patch/575161/?series=128193&rev=3 In practice no need to touch contents of i915_pr_psr2_sel_fetch_to_pr_psr1 at all. It will switch to PSR1 in case of PSR and Panel Replay Full Frame update in case of Panel Replay. Also psr_set should use same values for Panel Replay as are used for PSR. I'm sorry if I have instructed otherwise earlier. This has somehow evolved during writing the code. BR, Jouni Högander > > Thanks and Regards > Kunal Joshi > > > > > ret = true; > > > } > > > > > > @@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int > > > drm_fd, > > > igt_output_t *output) > > > * Restore PSR2 selective fetch after tests were executed, this > > > function should > > > * only be called if i915_psr2_sel_fetch_to_psr1() returned > > > true. > > > */ > > > -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t > > > *output) > > > +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t > > > *output) > > > { > > > int debugfs_fd; > > > + enum psr_mode mode; > > > > > > debugfs_fd = igt_debugfs_dir(drm_fd); > > > - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, > > > output); > > > + mode = psr_get_mode(debugfs_fd, output); > > > + if (mode == PR_MODE) > > > + psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH, > > > output); > > > + else > > > + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, > > > output); > > > close(debugfs_fd); > > > } > > > > > > @@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, > > > igt_output_t *output) > > > > > > if (strstr(buf, "Panel Replay Enabled")) > > > return PR_MODE; > > > + else if (strstr(buf, "Panel Replay Selective Update > > > Enabled")) > > > + return PR_MODE_SEL_FETCH; > > > else if (strstr(buf, "PSR2 selective fetch: enabled")) > > > return PSR_MODE_2_SEL_FETCH; > > > - else if (strstr(buf, "PSR2 enabled")) > > > + else if (strstr(buf, "PSR2")) > > > return PSR_MODE_2; > > > - else if (strstr(buf, "PSR1 enabled")) > > > + else if (strstr(buf, "PSR1")) > > > return PSR_MODE_1; > > > > > > return PSR_DISABLED; > > > diff --git a/lib/igt_psr.h b/lib/igt_psr.h > > > index 372bef2b2..36ba7f068 100644 > > > --- a/lib/igt_psr.h > > > +++ b/lib/igt_psr.h > > > @@ -46,7 +46,7 @@ enum fbc_mode { > > > }; > > > > > > bool psr_disabled_check(int debugfs_fd); > > > -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > > > *output); > > > +bool selective_fetch_check(int debugfs_fd, igt_output_t > > > *output); > > > bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, > > > igt_output_t > > > *output); > > > bool psr_wait_update(int debugfs_fd, enum psr_mode mode, > > > igt_output_t *output); > > > bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, > > > igt_output_t *output); > > > @@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd, > > > igt_output_t *output); > > > > > > bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t > > > *output); > > > > > > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t > > > *output); > > > -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t > > > *output); > > > +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t > > > *output); > > > +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t > > > *output); > > > bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); > > > > > > #endif > > > diff --git a/tests/kms_cursor_legacy.c > > > b/tests/kms_cursor_legacy.c > > > index a430f735a..91e5e9b07 100644 > > > --- a/tests/kms_cursor_legacy.c > > > +++ b/tests/kms_cursor_legacy.c > > > @@ -1849,7 +1849,7 @@ igt_main > > > * page flip with cursor legacy APIS when > > > Intel's > > > PSR2 selective > > > * fetch is enabled, so switching PSR1 for this > > > whole > > > test. > > > */ > > > - intel_psr2_restore = > > > i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); > > > + intel_psr2_restore = > > > i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL); > > > } > > > > > > igt_describe("Test checks how many cursor updates we can > > > fit > > > between vblanks " > > > @@ -2074,7 +2074,7 @@ igt_main > > > > > > igt_fixture { > > > if (intel_psr2_restore) > > > - > > > i915_psr2_sel_fetch_restore(display.drm_fd, > > > NULL); > > > + i915_pr_psr2_sel_fetch_restore(display.dr > > > m_fd > > > , NULL); > > > igt_display_fini(&display); > > > drm_close_driver(display.drm_fd); > > > } ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update 2024-02-19 8:56 ` Hogander, Jouni @ 2024-02-19 9:01 ` Joshi, Kunal1 0 siblings, 0 replies; 22+ messages in thread From: Joshi, Kunal1 @ 2024-02-19 9:01 UTC (permalink / raw) To: Hogander, Jouni, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh Hello Jouni, On 2/19/2024 2:26 PM, Hogander, Jouni wrote: > On Mon, 2024-02-19 at 13:42 +0530, Joshi, Kunal1 wrote: >> Hello Jouni, >> >> On 2/19/2024 1:30 PM, Hogander, Jouni wrote: >>> On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote: >>>> Extend the tests to cover panel replay selective fetch feature. >>>> >>>> From kms_psr2_sf test point of view we have >>>> check_pr_psr2_sel_fetch_support >>>> function to check if PR/PSR2 selective fetch is supported for an >>>> output >>>> if output supports selective fetch then we check we enter >>>> DEEP_SLEEP >>>> mode >>>> in run function >>>> >>>> v2: fixed dynamic test name >>>> v3: use check_psr2_support (Jouni) >>>> v4: split patches (Jouni) >>>> >>>> Cc: Jouni Högander <jouni.hogander@intel.com> >>>> Cc: Animesh Manna <animesh.manna@intel.com> >>>> Cc: Arun R Murthy <arun.r.murthy@intel.com> >>>> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> >>>> --- >>>> lib/igt_psr.c | 36 ++++++++++++++++++++++++++------ >>>> ---- >>>> lib/igt_psr.h | 6 +++--- >>>> tests/kms_cursor_legacy.c | 4 ++-- >>>> 3 files changed, 31 insertions(+), 15 deletions(-) >>>> >>>> diff --git a/lib/igt_psr.c b/lib/igt_psr.c >>>> index cad8cce05..9accd2047 100644 >>>> --- a/lib/igt_psr.c >>>> +++ b/lib/igt_psr.c >>>> @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd) >>>> return strstr(buf, "PSR mode: disabled\n"); >>>> } >>>> >>>> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t >>>> *output) >>>> +bool selective_fetch_check(int debugfs_fd, igt_output_t *output) >>>> { >>>> char buf[PSR_STATUS_MAX_LEN]; >>>> char debugfs_file[128] = {0}; >>>> @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int >>>> debugfs_fd, >>>> enum psr_mode mode, igt_output >>>> (strstr(line, "PSR = yes") && >>>> (strstr(line, "[0x03]") || strstr(line, >>>> "[0x04]"))); >>>> case PR_MODE: >>>> - return strstr(line, "Panel Replay = yes"); >>>> + return strstr(line, "Panel Replay = yes, Panel >>>> Replay >>>> Selective Update = no"); >>>> + case PR_MODE_SEL_FETCH: >>>> + return strstr(line, "Panel Replay = yes, Panel >>>> Replay >>>> Selective Update = yes"); >>>> default: >>>> igt_assert_f(false, "Invalid psr mode\n"); >>>> return false; >>>> @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int >>>> drm_fd, >>>> igt_output_t *output) >>>> return false; >>>> >>>> debugfs_fd = igt_debugfs_dir(drm_fd); >>>> - ret = psr2_selective_fetch_check(debugfs_fd, output); >>>> + ret = selective_fetch_check(debugfs_fd, output); >>>> close(debugfs_fd); >>>> >>>> return ret; >>>> @@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int >>>> drm_fd, igt_output_t *output) >>>> * Returns: >>>> * True if PSR mode changed to PSR1, false otherwise. >>>> */ >>>> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t >>>> *output) >>>> +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t >>>> *output) >>>> { >>>> int debugfs_fd; >>>> bool ret = false; >>>> + enum psr_mode mode; >>>> >>>> if (!is_intel_device(drm_fd)) >>>> return ret; >>>> >>>> debugfs_fd = igt_debugfs_dir(drm_fd); >>>> - if (psr2_selective_fetch_check(debugfs_fd, output)) { >>>> - psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); >>>> + if (selective_fetch_check(debugfs_fd, output)) { >>>> + mode = psr_get_mode(debugfs_fd, output); >>>> + if (mode == PR_MODE_SEL_FETCH) >>>> + psr_set(drm_fd, debugfs_fd, PR_MODE, >>>> output); >>>> + else if (mode == PSR_MODE_2_SEL_FETCH) >>>> + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, >>>> output); >>>> + else >>>> + igt_assert("switch not possible from >>>> current >>>> psr mode\n"); >>> There is no need to change this function. >>> psr2_selective_fetch_check >>> (now selective_fetch_check) works for PR and PSR. >>> >>> BR, >>> >>> Jouni Högander >> Have modified selective_fetch_check to check for a particular output, >> >> bool selective_fetch_check(int debugfs_fd, igt_output_t *output) >> { >> char buf[PSR_STATUS_MAX_LEN]; >> char debugfs_file[128] = {0}; >> >> SET_DEBUGFS_PATH(output, debugfs_file); >> igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, >> sizeof(buf)); >> >> return strstr(buf, "PSR2 selective fetch: enabled"); >> } >> >> Will this be not required? > No it has to support providing ouput as parameter. My point is that > > selective_fetch_check works for PR as well. and: > > psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); > > Will switch to Panel Replay Full Frame update for Panel Replay and PSR1 > for PSR. If we ever need to take into account panel supporting both I > think we should do that by adding disable flag for Panel Replay > instead of setting the mode. See: > > https://patchwork.freedesktop.org/series/128193/ > > and specifically: > > https://patchwork.freedesktop.org/patch/575161/?series=128193&rev=3 > > In practice no need to touch contents of > i915_pr_psr2_sel_fetch_to_pr_psr1 at all. It will switch to PSR1 in > case of PSR and Panel Replay Full Frame update in case of Panel > Replay. > > Also psr_set should use same values for Panel Replay as are used for > PSR. I'm sorry if I have instructed otherwise earlier. This has somehow > evolved during writing the code. > > BR, > > Jouni Högander Ok got your point. Will add your comment as a comment so nobody gets confused. It will switch to PSR1 incase of PSR and Panel Replay Full Frame update in case of Panel Replay. Thanks and Regards Kunal Joshi >> Thanks and Regards >> Kunal Joshi >>>> ret = true; >>>> } >>>> >>>> @@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int >>>> drm_fd, >>>> igt_output_t *output) >>>> * Restore PSR2 selective fetch after tests were executed, this >>>> function should >>>> * only be called if i915_psr2_sel_fetch_to_psr1() returned >>>> true. >>>> */ >>>> -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t >>>> *output) >>>> +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t >>>> *output) >>>> { >>>> int debugfs_fd; >>>> + enum psr_mode mode; >>>> >>>> debugfs_fd = igt_debugfs_dir(drm_fd); >>>> - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, >>>> output); >>>> + mode = psr_get_mode(debugfs_fd, output); >>>> + if (mode == PR_MODE) >>>> + psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH, >>>> output); >>>> + else >>>> + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, >>>> output); >>>> close(debugfs_fd); >>>> } >>>> >>>> @@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, >>>> igt_output_t *output) >>>> >>>> if (strstr(buf, "Panel Replay Enabled")) >>>> return PR_MODE; >>>> + else if (strstr(buf, "Panel Replay Selective Update >>>> Enabled")) >>>> + return PR_MODE_SEL_FETCH; >>>> else if (strstr(buf, "PSR2 selective fetch: enabled")) >>>> return PSR_MODE_2_SEL_FETCH; >>>> - else if (strstr(buf, "PSR2 enabled")) >>>> + else if (strstr(buf, "PSR2")) >>>> return PSR_MODE_2; >>>> - else if (strstr(buf, "PSR1 enabled")) >>>> + else if (strstr(buf, "PSR1")) >>>> return PSR_MODE_1; >>>> >>>> return PSR_DISABLED; >>>> diff --git a/lib/igt_psr.h b/lib/igt_psr.h >>>> index 372bef2b2..36ba7f068 100644 >>>> --- a/lib/igt_psr.h >>>> +++ b/lib/igt_psr.h >>>> @@ -46,7 +46,7 @@ enum fbc_mode { >>>> }; >>>> >>>> bool psr_disabled_check(int debugfs_fd); >>>> -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t >>>> *output); >>>> +bool selective_fetch_check(int debugfs_fd, igt_output_t >>>> *output); >>>> bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, >>>> igt_output_t >>>> *output); >>>> bool psr_wait_update(int debugfs_fd, enum psr_mode mode, >>>> igt_output_t *output); >>>> bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, >>>> igt_output_t *output); >>>> @@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd, >>>> igt_output_t *output); >>>> >>>> bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t >>>> *output); >>>> >>>> -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t >>>> *output); >>>> -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t >>>> *output); >>>> +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t >>>> *output); >>>> +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t >>>> *output); >>>> bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); >>>> >>>> #endif >>>> diff --git a/tests/kms_cursor_legacy.c >>>> b/tests/kms_cursor_legacy.c >>>> index a430f735a..91e5e9b07 100644 >>>> --- a/tests/kms_cursor_legacy.c >>>> +++ b/tests/kms_cursor_legacy.c >>>> @@ -1849,7 +1849,7 @@ igt_main >>>> * page flip with cursor legacy APIS when >>>> Intel's >>>> PSR2 selective >>>> * fetch is enabled, so switching PSR1 for this >>>> whole >>>> test. >>>> */ >>>> - intel_psr2_restore = >>>> i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); >>>> + intel_psr2_restore = >>>> i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL); >>>> } >>>> >>>> igt_describe("Test checks how many cursor updates we can >>>> fit >>>> between vblanks " >>>> @@ -2074,7 +2074,7 @@ igt_main >>>> >>>> igt_fixture { >>>> if (intel_psr2_restore) >>>> - >>>> i915_psr2_sel_fetch_restore(display.drm_fd, >>>> NULL); >>>> + i915_pr_psr2_sel_fetch_restore(display.dr >>>> m_fd >>>> , NULL); >>>> igt_display_fini(&display); >>>> drm_close_driver(display.drm_fd); >>>> } ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update 2024-02-18 9:17 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi 2024-02-19 8:00 ` Hogander, Jouni @ 2024-02-19 10:01 ` Joshi, Kunal1 2024-02-19 10:29 ` Hogander, Jouni 1 sibling, 1 reply; 22+ messages in thread From: Joshi, Kunal1 @ 2024-02-19 10:01 UTC (permalink / raw) To: igt-dev; +Cc: Jouni Högander, Animesh Manna, Arun R Murthy [-- Attachment #1: Type: text/plain, Size: 6816 bytes --] Hello Jouni, On 2/18/2024 2:47 PM, Kunal Joshi wrote: > Extend the tests to cover panel replay selective fetch feature. > > From kms_psr2_sf test point of view we have check_pr_psr2_sel_fetch_support > function to check if PR/PSR2 selective fetch is supported for an output > if output supports selective fetch then we check we enter DEEP_SLEEP mode > in run function > > v2: fixed dynamic test name > v3: use check_psr2_support (Jouni) > v4: split patches (Jouni) > > Cc: Jouni Högander<jouni.hogander@intel.com> > Cc: Animesh Manna<animesh.manna@intel.com> > Cc: Arun R Murthy<arun.r.murthy@intel.com> > Signed-off-by: Kunal Joshi<kunal1.joshi@intel.com> > --- > lib/igt_psr.c | 36 ++++++++++++++++++++++++++---------- > lib/igt_psr.h | 6 +++--- > tests/kms_cursor_legacy.c | 4 ++-- > 3 files changed, 31 insertions(+), 15 deletions(-) > > diff --git a/lib/igt_psr.c b/lib/igt_psr.c > index cad8cce05..9accd2047 100644 > --- a/lib/igt_psr.c > +++ b/lib/igt_psr.c > @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd) > return strstr(buf, "PSR mode: disabled\n"); > } > > -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output) > +bool selective_fetch_check(int debugfs_fd, igt_output_t *output) > { > char buf[PSR_STATUS_MAX_LEN]; > char debugfs_file[128] = {0}; > @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output > (strstr(line, "PSR = yes") && > (strstr(line, "[0x03]") || strstr(line, "[0x04]"))); > case PR_MODE: > - return strstr(line, "Panel Replay = yes"); > + return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no"); > + case PR_MODE_SEL_FETCH: > + return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes"); > default: > igt_assert_f(false, "Invalid psr mode\n"); > return false; > @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output) > return false; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - ret = psr2_selective_fetch_check(debugfs_fd, output); > + ret = selective_fetch_check(debugfs_fd, output); > close(debugfs_fd); > > return ret; > @@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output) > * Returns: > * True if PSR mode changed to PSR1, false otherwise. > */ > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) > +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t *output) > { > int debugfs_fd; > bool ret = false; > + enum psr_mode mode; > > if (!is_intel_device(drm_fd)) > return ret; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - if (psr2_selective_fetch_check(debugfs_fd, output)) { > - psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); > + if (selective_fetch_check(debugfs_fd, output)) { > + mode = psr_get_mode(debugfs_fd, output); > + if (mode == PR_MODE_SEL_FETCH) > + psr_set(drm_fd, debugfs_fd, PR_MODE, output); > + else if (mode == PSR_MODE_2_SEL_FETCH) > + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); > + else > + igt_assert("switch not possible from current psr mode\n"); > ret = true; > } > > @@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) > * Restore PSR2 selective fetch after tests were executed, this function should > * only be called if i915_psr2_sel_fetch_to_psr1() returned true. > */ > -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) > +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) > { > int debugfs_fd; > + enum psr_mode mode; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); > + mode = psr_get_mode(debugfs_fd, output); > + if (mode == PR_MODE) > + psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH, output); > + else > + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); > close(debugfs_fd); > } What do you think of this change, do we need to care about PR/PSR2 Selective fetch or just write PSR_MODE_2_SEL_FETCH? Thanks and Regards Kunal Joshi > > @@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) > > if (strstr(buf, "Panel Replay Enabled")) > return PR_MODE; > + else if (strstr(buf, "Panel Replay Selective Update Enabled")) > + return PR_MODE_SEL_FETCH; > else if (strstr(buf, "PSR2 selective fetch: enabled")) > return PSR_MODE_2_SEL_FETCH; > - else if (strstr(buf, "PSR2 enabled")) > + else if (strstr(buf, "PSR2")) > return PSR_MODE_2; > - else if (strstr(buf, "PSR1 enabled")) > + else if (strstr(buf, "PSR1")) > return PSR_MODE_1; > > return PSR_DISABLED; > diff --git a/lib/igt_psr.h b/lib/igt_psr.h > index 372bef2b2..36ba7f068 100644 > --- a/lib/igt_psr.h > +++ b/lib/igt_psr.h > @@ -46,7 +46,7 @@ enum fbc_mode { > }; > > bool psr_disabled_check(int debugfs_fd); > -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output); > +bool selective_fetch_check(int debugfs_fd, igt_output_t *output); > bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output); > bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); > bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); > @@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output); > > bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output); > > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output); > -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); > +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t *output); > +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); > bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); > > #endif > diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c > index a430f735a..91e5e9b07 100644 > --- a/tests/kms_cursor_legacy.c > +++ b/tests/kms_cursor_legacy.c > @@ -1849,7 +1849,7 @@ igt_main > * page flip with cursor legacy APIS when Intel's PSR2 selective > * fetch is enabled, so switching PSR1 for this whole test. > */ > - intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); > + intel_psr2_restore = i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL); > } > > igt_describe("Test checks how many cursor updates we can fit between vblanks " > @@ -2074,7 +2074,7 @@ igt_main > > igt_fixture { > if (intel_psr2_restore) > - i915_psr2_sel_fetch_restore(display.drm_fd, NULL); > + i915_pr_psr2_sel_fetch_restore(display.drm_fd, NULL); > igt_display_fini(&display); > drm_close_driver(display.drm_fd); > } [-- Attachment #2: Type: text/html, Size: 7506 bytes --] ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update 2024-02-19 10:01 ` Joshi, Kunal1 @ 2024-02-19 10:29 ` Hogander, Jouni 0 siblings, 0 replies; 22+ messages in thread From: Hogander, Jouni @ 2024-02-19 10:29 UTC (permalink / raw) To: Joshi, Kunal1, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh [-- Attachment #1: Type: text/plain, Size: 7903 bytes --] On Mon, 2024-02-19 at 15:31 +0530, Joshi, Kunal1 wrote: Hello Jouni, On 2/18/2024 2:47 PM, Kunal Joshi wrote: Extend the tests to cover panel replay selective fetch feature. From kms_psr2_sf test point of view we have check_pr_psr2_sel_fetch_support function to check if PR/PSR2 selective fetch is supported for an output if output supports selective fetch then we check we enter DEEP_SLEEP mode in run function v2: fixed dynamic test name v3: use check_psr2_support (Jouni) v4: split patches (Jouni) Cc: Jouni Högander <jouni.hogander@intel.com><mailto:jouni.hogander@intel.com> Cc: Animesh Manna <animesh.manna@intel.com><mailto:animesh.manna@intel.com> Cc: Arun R Murthy <arun.r.murthy@intel.com><mailto:arun.r.murthy@intel.com> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com><mailto:kunal1.joshi@intel.com> --- lib/igt_psr.c | 36 ++++++++++++++++++++++++++---------- lib/igt_psr.h | 6 +++--- tests/kms_cursor_legacy.c | 4 ++-- 3 files changed, 31 insertions(+), 15 deletions(-) diff --git a/lib/igt_psr.c b/lib/igt_psr.c index cad8cce05..9accd2047 100644 --- a/lib/igt_psr.c +++ b/lib/igt_psr.c @@ -41,7 +41,7 @@ bool psr_disabled_check(int debugfs_fd) return strstr(buf, "PSR mode: disabled\n"); } -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output) +bool selective_fetch_check(int debugfs_fd, igt_output_t *output) { char buf[PSR_STATUS_MAX_LEN]; char debugfs_file[128] = {0}; @@ -248,7 +248,9 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output (strstr(line, "PSR = yes") && (strstr(line, "[0x03]") || strstr(line, "[0x04]"))); case PR_MODE: - return strstr(line, "Panel Replay = yes"); + return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no"); + case PR_MODE_SEL_FETCH: + return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes"); default: igt_assert_f(false, "Invalid psr mode\n"); return false; @@ -317,7 +319,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output) return false; debugfs_fd = igt_debugfs_dir(drm_fd); - ret = psr2_selective_fetch_check(debugfs_fd, output); + ret = selective_fetch_check(debugfs_fd, output); close(debugfs_fd); return ret; @@ -334,17 +336,24 @@ bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output) * Returns: * True if PSR mode changed to PSR1, false otherwise. */ -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t *output) { int debugfs_fd; bool ret = false; + enum psr_mode mode; if (!is_intel_device(drm_fd)) return ret; debugfs_fd = igt_debugfs_dir(drm_fd); - if (psr2_selective_fetch_check(debugfs_fd, output)) { - psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); + if (selective_fetch_check(debugfs_fd, output)) { + mode = psr_get_mode(debugfs_fd, output); + if (mode == PR_MODE_SEL_FETCH) + psr_set(drm_fd, debugfs_fd, PR_MODE, output); + else if (mode == PSR_MODE_2_SEL_FETCH) + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); + else + igt_assert("switch not possible from current psr mode\n"); ret = true; } @@ -358,12 +367,17 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) * Restore PSR2 selective fetch after tests were executed, this function should * only be called if i915_psr2_sel_fetch_to_psr1() returned true. */ -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) { int debugfs_fd; + enum psr_mode mode; debugfs_fd = igt_debugfs_dir(drm_fd); - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); + mode = psr_get_mode(debugfs_fd, output); + if (mode == PR_MODE) + psr_set(drm_fd, debugfs_fd, PR_MODE_SEL_FETCH, output); + else + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); close(debugfs_fd); } What do you think of this change, do we need to care about PR/PSR2 Selective fetch or just write PSR_MODE_2_SEL_FETCH? Good point. I think this function can be left untouched as well. BR, Jouni Högander Thanks and Regards Kunal Joshi @@ -389,11 +403,13 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) if (strstr(buf, "Panel Replay Enabled")) return PR_MODE; + else if (strstr(buf, "Panel Replay Selective Update Enabled")) + return PR_MODE_SEL_FETCH; else if (strstr(buf, "PSR2 selective fetch: enabled")) return PSR_MODE_2_SEL_FETCH; - else if (strstr(buf, "PSR2 enabled")) + else if (strstr(buf, "PSR2")) return PSR_MODE_2; - else if (strstr(buf, "PSR1 enabled")) + else if (strstr(buf, "PSR1")) return PSR_MODE_1; return PSR_DISABLED; diff --git a/lib/igt_psr.h b/lib/igt_psr.h index 372bef2b2..36ba7f068 100644 --- a/lib/igt_psr.h +++ b/lib/igt_psr.h @@ -46,7 +46,7 @@ enum fbc_mode { }; bool psr_disabled_check(int debugfs_fd); -bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output); +bool selective_fetch_check(int debugfs_fd, igt_output_t *output); bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); @@ -59,8 +59,8 @@ enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output); bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output); -bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output); -void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); +bool i915_pr_psr2_sel_fetch_to_pr_psr1(int drm_fd, igt_output_t *output); +void i915_pr_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); #endif diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c index a430f735a..91e5e9b07 100644 --- a/tests/kms_cursor_legacy.c +++ b/tests/kms_cursor_legacy.c @@ -1849,7 +1849,7 @@ igt_main * page flip with cursor legacy APIS when Intel's PSR2 selective * fetch is enabled, so switching PSR1 for this whole test. */ - intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); + intel_psr2_restore = i915_pr_psr2_sel_fetch_to_pr_psr1(display.drm_fd, NULL); } igt_describe("Test checks how many cursor updates we can fit between vblanks " @@ -2074,7 +2074,7 @@ igt_main igt_fixture { if (intel_psr2_restore) - i915_psr2_sel_fetch_restore(display.drm_fd, NULL); + i915_pr_psr2_sel_fetch_restore(display.drm_fd, NULL); igt_display_fini(&display); drm_close_driver(display.drm_fd); } [-- Attachment #2: Type: text/html, Size: 10140 bytes --] ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf 2024-02-18 9:17 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi 2024-02-18 9:17 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi 2024-02-18 9:17 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi @ 2024-02-18 9:17 ` Kunal Joshi 2024-02-19 8:31 ` Hogander, Jouni 2024-02-18 9:36 ` ✗ GitLab.Pipeline: warning for extend psr2_sf test for pr_sf (rev5) Patchwork ` (3 subsequent siblings) 6 siblings, 1 reply; 22+ messages in thread From: Kunal Joshi @ 2024-02-18 9:17 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy Extend the tests to cover panel replay selective fetch feature. From kms_psr2_sf test point of view we have check_pr_psr2_sel_fetch_support function to check if PR/PSR2 selective fetch is supported for an output if output supports selective fetch then we check we enter DEEP_SLEEP mode in run function v2: fixed dynamic test name v3: use check_psr2_support (Jouni) v4: correct order of checks in check_pr_psr2_sel_fetch_support (Jouni) use appropriate psr mode in psr_wait_entry (Jouni) v5: use static in get_psr_mode_str_for_output (Jouni) Cc: Jouni Högander <jouni.hogander@intel.com> Cc: Animesh Manna <animesh.manna@intel.com> Cc: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> --- tests/intel/kms_psr2_sf.c | 147 +++++++++++++++++++++++++++++++------- 1 file changed, 120 insertions(+), 27 deletions(-) diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c index 8e6a9e02c..c6d871dd8 100644 --- a/tests/intel/kms_psr2_sf.c +++ b/tests/intel/kms_psr2_sf.c @@ -172,6 +172,7 @@ typedef struct { uint32_t screen_changes; int cur_x, cur_y; enum pipe pipe; + enum psr_mode psr_mode; enum { FEATURE_NONE = 0, FEATURE_DSC = 1, @@ -179,6 +180,34 @@ typedef struct { } coexist_feature; } data_t; +static enum psr_mode get_sel_fetch_mode_for_output(data_t *data, igt_output_t *output) +{ + enum psr_mode mode = PSR_DISABLED; + + if (psr_sink_support(data->drm_fd, data->debugfs_fd, + PR_MODE_SEL_FETCH, output)) + mode = PR_MODE_SEL_FETCH; + else if (psr_sink_support(data->drm_fd, data->debugfs_fd, + PSR_MODE_2, output)) + mode = PSR_MODE_2; + else + igt_info("selective fetch not supported on output %s\n", output->name); + + return mode; +} + +static const char *get_psr_mode_str_for_output(data_t *data, igt_output_t *output) +{ + static const char *psr_mode = NULL; + + if (get_sel_fetch_mode_for_output(data, output) == PR_MODE_SEL_FETCH) + psr_mode = "pr"; + else if (get_sel_fetch_mode_for_output(data, output) == PSR_MODE_2) + psr_mode = "psr2"; + igt_assert_f(psr_mode, "Invalid psr mode\n"); + return psr_mode; +} + static const char *op_str(enum operations op) { static const char * const name[] = { @@ -688,7 +717,7 @@ static void damaged_plane_move(data_t *data) igt_display_commit2(&data->display, COMMIT_ATOMIC); - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); expected_output(data); } @@ -788,7 +817,7 @@ static void plane_move_continuous(data_t *data) { int target_x, target_y; - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); get_target_coords(data, &target_x, &target_y); @@ -865,7 +894,7 @@ static void damaged_plane_update(data_t *data) igt_plane_set_position(data->test_plane, 0, 0); igt_display_commit2(&data->display, COMMIT_ATOMIC); - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); expected_output(data); } @@ -874,7 +903,7 @@ static void run(data_t *data) { int i; - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL)); + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, data->output)); if (data->fbc_flag == true && data->op_fbc_mode == FBC_ENABLED) igt_assert_f(intel_fbc_wait_until_enabled(data->drm_fd, @@ -952,14 +981,24 @@ static void cleanup(data_t *data) igt_remove_fb(data->drm_fd, &data->fb_test); } -static int check_psr2_support(data_t *data) +static bool check_pr_psr2_sel_fetch_support(data_t *data) { - int status; + bool status = false; + enum psr_mode psr_mode; + + /* Check sink supports PR/PSR2 selective fetch */ + psr_mode = get_sel_fetch_mode_for_output(data, data->output); + if (psr_mode == PSR_DISABLED) + return false; + + /* Check if selective fetch can be enabled */ + if (!selective_fetch_check(data->debugfs_fd, data->output)) + igt_assert("Selective fetch is not enabled even though panel should support it\n"); prepare(data); - status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL); + /* We enter into DEEP_SLEEP for both PSR2 and PR sel fetch */ + status = psr_wait_entry(data->debugfs_fd, psr_mode, data->output); cleanup(data); - return status; } @@ -981,6 +1020,8 @@ pipe_output_combo_valid(igt_display_t *display, igt_main { + bool output_supports_pr_psr2_sel_fetch = false; + bool pr_psr2_sel_fetch_supported = false; data_t data = {}; igt_output_t *outputs[IGT_MAX_PIPES * IGT_MAX_PIPES]; int i, j, k, y; @@ -1000,11 +1041,6 @@ igt_main data.debugfs_fd = igt_debugfs_dir(data.drm_fd); kmstest_set_vt_graphics_mode(); - igt_require_f(psr_sink_support(data.drm_fd, - data.debugfs_fd, PSR_MODE_2, - NULL), - "Sink does not support PSR2\n"); - display_init(&data); if ((intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 20) && @@ -1023,7 +1059,8 @@ igt_main for_each_pipe_with_valid_output(&data.display, data.pipe, data.output) { coexist_features[n_pipes] = 0; - if (check_psr2_support(&data)) { + output_supports_pr_psr2_sel_fetch = check_pr_psr2_sel_fetch_support(&data); + if (output_supports_pr_psr2_sel_fetch) { pipes[n_pipes] = data.pipe; outputs[n_pipes] = data.output; @@ -1032,7 +1069,10 @@ igt_main n_pipes++; } + pr_psr2_sel_fetch_supported |= output_supports_pr_psr2_sel_fetch; } + igt_require_f(pr_psr2_sel_fetch_supported, + "No output supports selective fetch\n"); } for (y = 0; y < ARRAY_SIZE(fbc_status); y++) { @@ -1053,13 +1093,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_PRIMARY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { data.damage_area_count = k; prepare(&data); @@ -1086,7 +1130,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", + igt_dynamic_f("%s-pipe-%s-%s%s", + get_psr_mode_str_for_output(&data, outputs[i]), kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { @@ -1094,6 +1139,9 @@ igt_main data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_PRIMARY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { data.damage_area_count = k; prepare(&data); @@ -1118,13 +1166,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); for (k = 1; k <= MAX_DAMAGE_AREAS; k++) { data.damage_area_count = k; prepare(&data); @@ -1148,13 +1200,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1174,13 +1230,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1201,13 +1261,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1228,13 +1292,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_CURSOR; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1256,13 +1324,18 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", + get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); for (k = POS_TOP_LEFT; k <= POS_BOTTOM_RIGHT ; k++) { data.pos = k; prepare(&data); @@ -1285,13 +1358,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1312,13 +1389,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1339,13 +1420,17 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; data.output = outputs[i]; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1367,7 +1452,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + get_psr_mode_str_for_output(&data, outputs[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1376,6 +1462,9 @@ igt_main data.damage_area_count = k; data.test_plane_id = DRM_PLANE_TYPE_PRIMARY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); @@ -1400,7 +1489,8 @@ igt_main for (j = FEATURE_NONE; j < FEATURE_COUNT; j++) { if (j != FEATURE_NONE && !(coexist_features[i] & j)) continue; - igt_dynamic_f("pipe-%s-%s%s", kmstest_pipe_name(pipes[i]), + igt_dynamic_f("%s-pipe-%s-%s%s", get_psr_mode_str_for_output(&data, outputs[i]), + kmstest_pipe_name(pipes[i]), igt_output_name(outputs[i]), coexist_feature_str(j)) { data.pipe = pipes[i]; @@ -1412,6 +1502,9 @@ igt_main data.primary_format = DRM_FORMAT_NV12; data.test_plane_id = DRM_PLANE_TYPE_OVERLAY; data.coexist_feature = j; + data.psr_mode = get_sel_fetch_mode_for_output(&data, data.output); + igt_assert_f(data.psr_mode != PSR_DISABLED, + "Invalid psr mode\n"); prepare(&data); run(&data); cleanup(&data); -- 2.25.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf 2024-02-18 9:17 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi @ 2024-02-19 8:31 ` Hogander, Jouni 0 siblings, 0 replies; 22+ messages in thread From: Hogander, Jouni @ 2024-02-19 8:31 UTC (permalink / raw) To: Joshi, Kunal1, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh On Sun, 2024-02-18 at 14:47 +0530, Kunal Joshi wrote: > Extend the tests to cover panel replay selective fetch feature. > > From kms_psr2_sf test point of view we have > check_pr_psr2_sel_fetch_support > function to check if PR/PSR2 selective fetch is supported for an > output > if output supports selective fetch then we check we enter DEEP_SLEEP > mode > in run function > > v2: fixed dynamic test name > v3: use check_psr2_support (Jouni) > v4: correct order of checks in check_pr_psr2_sel_fetch_support > (Jouni) > use appropriate psr mode in psr_wait_entry (Jouni) > v5: use static in get_psr_mode_str_for_output (Jouni) > > Cc: Jouni Högander <jouni.hogander@intel.com> > Cc: Animesh Manna <animesh.manna@intel.com> > Cc: Arun R Murthy <arun.r.murthy@intel.com> > Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> > --- > tests/intel/kms_psr2_sf.c | 147 +++++++++++++++++++++++++++++++----- > -- > 1 file changed, 120 insertions(+), 27 deletions(-) > > diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c > index 8e6a9e02c..c6d871dd8 100644 > --- a/tests/intel/kms_psr2_sf.c > +++ b/tests/intel/kms_psr2_sf.c > @@ -172,6 +172,7 @@ typedef struct { > uint32_t screen_changes; > int cur_x, cur_y; > enum pipe pipe; > + enum psr_mode psr_mode; > enum { > FEATURE_NONE = 0, > FEATURE_DSC = 1, > @@ -179,6 +180,34 @@ typedef struct { > } coexist_feature; > } data_t; > > +static enum psr_mode get_sel_fetch_mode_for_output(data_t *data, > igt_output_t *output) output is already part of data? > +{ > + enum psr_mode mode = PSR_DISABLED; > + > + if (psr_sink_support(data->drm_fd, data->debugfs_fd, > + PR_MODE_SEL_FETCH, > output)) > + mode = PR_MODE_SEL_FETCH; > + else if (psr_sink_support(data->drm_fd, data->debugfs_fd, > + PSR_MODE_2, > output)) > + mode = PSR_MODE_2; > + else > + igt_info("selective fetch not supported on output > %s\n", output->name); > + > + return mode; I think it is somehow wrong to return PSR_DISABLED here. It could be PSR1 or PR full frame update. How about setting data->psr_mode and return true if it's PSR2 or PR_SELECTIVE_UPDATE. > +} > + > +static const char *get_psr_mode_str_for_output(data_t *data, > igt_output_t *output) > +{ > + static const char *psr_mode = NULL; > + > + if (get_sel_fetch_mode_for_output(data, output) == > PR_MODE_SEL_FETCH) > + psr_mode = "pr"; > + else if (get_sel_fetch_mode_for_output(data, output) == > PSR_MODE_2) > + psr_mode = "psr2"; > + igt_assert_f(psr_mode, "Invalid psr mode\n"); > + return psr_mode; > +} > + > static const char *op_str(enum operations op) > { > static const char * const name[] = { > @@ -688,7 +717,7 @@ static void damaged_plane_move(data_t *data) > > igt_display_commit2(&data->display, COMMIT_ATOMIC); > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > expected_output(data); > } > @@ -788,7 +817,7 @@ static void plane_move_continuous(data_t *data) > { > int target_x, target_y; > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > get_target_coords(data, &target_x, &target_y); > > @@ -865,7 +894,7 @@ static void damaged_plane_update(data_t *data) > igt_plane_set_position(data->test_plane, 0, 0); > igt_display_commit2(&data->display, COMMIT_ATOMIC); > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > expected_output(data); > } > @@ -874,7 +903,7 @@ static void run(data_t *data) > { > int i; > > - igt_assert(psr_wait_entry(data->debugfs_fd, PSR_MODE_2, > NULL)); > + igt_assert(psr_wait_entry(data->debugfs_fd, data->psr_mode, > data->output)); > > if (data->fbc_flag == true && data->op_fbc_mode == > FBC_ENABLED) > igt_assert_f(intel_fbc_wait_until_enabled(data- > >drm_fd, > @@ -952,14 +981,24 @@ static void cleanup(data_t *data) > igt_remove_fb(data->drm_fd, &data->fb_test); > } > > -static int check_psr2_support(data_t *data) > +static bool check_pr_psr2_sel_fetch_support(data_t *data) > { > - int status; > + bool status = false; > + enum psr_mode psr_mode; You have already psr_mode in data structure. BR, Jouni Högander > + > + /* Check sink supports PR/PSR2 selective fetch */ > + psr_mode = get_sel_fetch_mode_for_output(data, data->output); > + if (psr_mode == PSR_DISABLED) > + return false; > + > + /* Check if selective fetch can be enabled */ > + if (!selective_fetch_check(data->debugfs_fd, data->output)) > + igt_assert("Selective fetch is not enabled even > though panel should support it\n"); > > prepare(data); > - status = psr_wait_entry(data->debugfs_fd, PSR_MODE_2, NULL); > + /* We enter into DEEP_SLEEP for both PSR2 and PR sel fetch */ > + status = psr_wait_entry(data->debugfs_fd, psr_mode, data- > >output); > cleanup(data); > - > return status; > } > > @@ -981,6 +1020,8 @@ pipe_output_combo_valid(igt_display_t *display, > > igt_main > { > + bool output_supports_pr_psr2_sel_fetch = false; > + bool pr_psr2_sel_fetch_supported = false; > data_t data = {}; > igt_output_t *outputs[IGT_MAX_PIPES * IGT_MAX_PIPES]; > int i, j, k, y; > @@ -1000,11 +1041,6 @@ igt_main > data.debugfs_fd = igt_debugfs_dir(data.drm_fd); > kmstest_set_vt_graphics_mode(); > > - igt_require_f(psr_sink_support(data.drm_fd, > - data.debugfs_fd, > PSR_MODE_2, > - NULL), > - "Sink does not support PSR2\n"); > - > display_init(&data); > > if > ((intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 20) && > @@ -1023,7 +1059,8 @@ igt_main > > for_each_pipe_with_valid_output(&data.display, > data.pipe, data.output) { > coexist_features[n_pipes] = 0; > - if (check_psr2_support(&data)) { > + output_supports_pr_psr2_sel_fetch = > check_pr_psr2_sel_fetch_support(&data); > + if (output_supports_pr_psr2_sel_fetch) { > pipes[n_pipes] = data.pipe; > outputs[n_pipes] = data.output; > > @@ -1032,7 +1069,10 @@ igt_main > > n_pipes++; > } > + pr_psr2_sel_fetch_supported |= > output_supports_pr_psr2_sel_fetch; > } > + igt_require_f(pr_psr2_sel_fetch_supported, > + "No output supports > selective fetch\n"); > } > > for (y = 0; y < ARRAY_SIZE(fbc_status); y++) { > @@ -1053,13 +1093,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_PRIMARY; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > for (k = 1; k <= > MAX_DAMAGE_AREAS; k++) { > data.damage_a > rea_count = k; > prepare(&data > ); > @@ -1086,7 +1130,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE > && !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe- > %s-%s%s", > + igt_dynamic_f("%s- > pipe-%s-%s%s", > + > get_psr_mode_str_for_output(&data, outputs[i]), > > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > @@ -1094,6 +1139,9 @@ igt_main > data.output = > outputs[i]; > data.test_pla > ne_id = DRM_PLANE_TYPE_PRIMARY; > data.coexist_ > feature = j; > + data.psr_mode > = get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f( > data.psr_mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > for (k = 1; k > <= MAX_DAMAGE_AREAS; k++) { > data. > damage_area_count = k; > prepa > re(&data); > @@ -1118,13 +1166,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > for (k = 1; k <= > MAX_DAMAGE_AREAS; k++) { > data.damage_a > rea_count = k; > prepare(&data > ); > @@ -1148,13 +1200,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1174,13 +1230,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1201,13 +1261,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1228,13 +1292,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_CURSOR; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1256,13 +1324,18 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", > + > get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > for (k = > POS_TOP_LEFT; k <= POS_BOTTOM_RIGHT ; k++) { > data.pos = k; > prepare(&data > ); > @@ -1285,13 +1358,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr_mode != > PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1312,13 +1389,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1339,13 +1420,17 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > data.output = > outputs[i]; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); > @@ -1367,7 +1452,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", kmstest_pipe_name(pipes[i]), > + > get_psr_mode_str_for_output(&data, outputs[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1376,6 +1462,9 @@ igt_main > data.damage_a > rea_count = k; > data.test_pla > ne_id = DRM_PLANE_TYPE_PRIMARY; > data.coexist_ > feature = j; > + data.psr_mode > = get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f( > data.psr_mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data > ); > run(&data); > cleanup(&data > ); > @@ -1400,7 +1489,8 @@ igt_main > for (j = FEATURE_NONE; j < > FEATURE_COUNT; j++) { > if (j != FEATURE_NONE && > !(coexist_features[i] & j)) > continue; > - igt_dynamic_f("pipe-%s-%s%s", > kmstest_pipe_name(pipes[i]), > + igt_dynamic_f("%s-pipe-%s- > %s%s", get_psr_mode_str_for_output(&data, outputs[i]), > + > kmstest_pipe_name(pipes[i]), > > igt_output_name(outputs[i]), > > coexist_feature_str(j)) { > data.pipe = pipes[i]; > @@ -1412,6 +1502,9 @@ igt_main > data.primary_ > format = DRM_FORMAT_NV12; > data.test_plane_id = > DRM_PLANE_TYPE_OVERLAY; > data.coexist_feature > = j; > + data.psr_mode = > get_sel_fetch_mode_for_output(&data, data.output); > + igt_assert_f(data.psr > _mode != PSR_DISABLED, > + > "Invalid psr mode\n"); > prepare(&data); > run(&data); > cleanup(&data); ^ permalink raw reply [flat|nested] 22+ messages in thread
* ✗ GitLab.Pipeline: warning for extend psr2_sf test for pr_sf (rev5) 2024-02-18 9:17 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi ` (2 preceding siblings ...) 2024-02-18 9:17 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi @ 2024-02-18 9:36 ` Patchwork 2024-02-18 9:53 ` ✓ CI.xeBAT: success " Patchwork ` (2 subsequent siblings) 6 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2024-02-18 9:36 UTC (permalink / raw) To: Kunal Joshi; +Cc: igt-dev == Series Details == Series: extend psr2_sf test for pr_sf (rev5) URL : https://patchwork.freedesktop.org/series/129004/ State : warning == Summary == Pipeline status: FAILED. see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/1106237 for the overview. build-containers:build-debian has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/55179405): Checking if the user of the pipeline is allowed... Checking if the job's project is part of a well-known group... Thank you for contributing to freedesktop.org Fetching changes... Reinitialized existing Git repository in /builds/gfx-ci/igt-ci-tags/.git/ Checking out faa2ae77 as detached HEAD (ref is intel/IGTPW_10692)... Removing build/ Removing installdir/ Removing scripts/__pycache__/ Skipping Git submodules setup section_end:1708248800:get_sources section_start:1708248800:step_script Executing "step_script" stage of the job script Using docker image sha256:594aa868d31ee3304dee8cae8a3433c89a6fcfcf6c7d420c04cce22f60147176 for registry.freedesktop.org/wayland/ci-templates/buildah:2019-08-13.0 with digest registry.freedesktop.org/wayland/ci-templates/buildah@sha256:7dbcf22cd2c1c7d49db0dc7b4ab207c3d6a4a09bd81cc3b71a688d3727d8749f ... section_end:1708248801:step_script section_start:1708248801:cleanup_file_variables Cleaning up project directory and file based variables section_end:1708248802:cleanup_file_variables ERROR: Job failed (system failure): Error response from daemon: container 009e303e692f84c486a1cdd5c4a4e249f3838937949bc815fb608b1b86500d89 does not exist in database: no such container (exec.go:78:0s) build-containers:build-debian-armhf has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/55179406): Skipping Git submodules setup section_end:1708248800:get_sources section_start:1708248800:step_script Executing "step_script" stage of the job script Using docker image sha256:594aa868d31ee3304dee8cae8a3433c89a6fcfcf6c7d420c04cce22f60147176 for registry.freedesktop.org/wayland/ci-templates/buildah:2019-08-13.0 with digest registry.freedesktop.org/wayland/ci-templates/buildah@sha256:7dbcf22cd2c1c7d49db0dc7b4ab207c3d6a4a09bd81cc3b71a688d3727d8749f ... $ /host/bin/curl -s -L --cacert /host/ca-certificates.crt --retry 4 -f --retry-delay 60 https://gitlab.freedesktop.org/freedesktop/helm-gitlab-infra/-/raw/main/runner-gating/runner-gating.sh | sh sh: line 39: cat: command not found sh: line 40: cat: command not found sh: line 41: cat: command not found sh: line 42: cat: command not found sh: line 43: cat: command not found Something wrong happened while fetching the user of the job sh: line 48: cat: command not found section_end:1708248802:step_script section_start:1708248802:cleanup_file_variables Cleaning up project directory and file based variables section_end:1708248803:cleanup_file_variables ERROR: Job failed: exit code 1 build-containers:build-debian-mips has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/55179409): section_start:1708248798:get_sources Getting source from Git repository $ /host/bin/curl -s -L --cacert /host/ca-certificates.crt --retry 4 -f --retry-delay 60 https://gitlab.freedesktop.org/freedesktop/helm-gitlab-infra/-/raw/main/runner-gating/runner-gating.sh | sh -s -- pre_get_sources_script Checking if the user of the pipeline is allowed... Checking if the job's project is part of a well-known group... Thank you for contributing to freedesktop.org Fetching changes... Reinitialized existing Git repository in /builds/gfx-ci/igt-ci-tags/.git/ Checking out faa2ae77 as detached HEAD (ref is intel/IGTPW_10692)... Skipping Git submodules setup section_end:1708248801:get_sources section_start:1708248801:step_script Executing "step_script" stage of the job script Using docker image sha256:594aa868d31ee3304dee8cae8a3433c89a6fcfcf6c7d420c04cce22f60147176 for registry.freedesktop.org/wayland/ci-templates/buildah:2019-08-13.0 with digest registry.freedesktop.org/wayland/ci-templates/buildah@sha256:7dbcf22cd2c1c7d49db0dc7b4ab207c3d6a4a09bd81cc3b71a688d3727d8749f ... section_end:1708248801:step_script section_start:1708248801:cleanup_file_variables Cleaning up project directory and file based variables section_end:1708248802:cleanup_file_variables ERROR: Job failed (system failure): unable to upgrade to tcp, received 409 (exec.go:71:0s) == Logs == For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/1106237 ^ permalink raw reply [flat|nested] 22+ messages in thread
* ✓ CI.xeBAT: success for extend psr2_sf test for pr_sf (rev5) 2024-02-18 9:17 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi ` (3 preceding siblings ...) 2024-02-18 9:36 ` ✗ GitLab.Pipeline: warning for extend psr2_sf test for pr_sf (rev5) Patchwork @ 2024-02-18 9:53 ` Patchwork 2024-02-18 10:04 ` ✓ Fi.CI.BAT: " Patchwork 2024-02-18 11:26 ` ✗ Fi.CI.IGT: failure " Patchwork 6 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2024-02-18 9:53 UTC (permalink / raw) To: Kunal Joshi; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 965 bytes --] == Series Details == Series: extend psr2_sf test for pr_sf (rev5) URL : https://patchwork.freedesktop.org/series/129004/ State : success == Summary == CI Bug Log - changes from XEIGT_7716_BAT -> XEIGTPW_10692_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Changes ------- No changes found Build changes ------------- * IGT: IGT_7716 -> IGTPW_10692 * Linux: xe-789-55724f2a1075fcace79fd49ea0c2b7b5600d7ba8 -> xe-794-b09fd1bd9f8b4a8e5cd8c1de8dbba4d4eb15b4e9 IGTPW_10692: 10692 IGT_7716: 7716 xe-789-55724f2a1075fcace79fd49ea0c2b7b5600d7ba8: 55724f2a1075fcace79fd49ea0c2b7b5600d7ba8 xe-794-b09fd1bd9f8b4a8e5cd8c1de8dbba4d4eb15b4e9: b09fd1bd9f8b4a8e5cd8c1de8dbba4d4eb15b4e9 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10692/index.html [-- Attachment #2: Type: text/html, Size: 1524 bytes --] ^ permalink raw reply [flat|nested] 22+ messages in thread
* ✓ Fi.CI.BAT: success for extend psr2_sf test for pr_sf (rev5) 2024-02-18 9:17 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi ` (4 preceding siblings ...) 2024-02-18 9:53 ` ✓ CI.xeBAT: success " Patchwork @ 2024-02-18 10:04 ` Patchwork 2024-02-18 11:26 ` ✗ Fi.CI.IGT: failure " Patchwork 6 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2024-02-18 10:04 UTC (permalink / raw) To: Kunal Joshi; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 4429 bytes --] == Series Details == Series: extend psr2_sf test for pr_sf (rev5) URL : https://patchwork.freedesktop.org/series/129004/ State : success == Summary == CI Bug Log - changes from CI_DRM_14287 -> IGTPW_10692 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/index.html Participating hosts (36 -> 35) ------------------------------ Additional (1): bat-kbl-2 Missing (2): bat-atsm-1 fi-snb-2520m Known issues ------------ Here are the changes found in IGTPW_10692 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@debugfs_test@basic-hwmon: - bat-jsl-1: NOTRUN -> [SKIP][1] ([i915#9318]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/bat-jsl-1/igt@debugfs_test@basic-hwmon.html * igt@fbdev@info: - bat-kbl-2: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#1849]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/bat-kbl-2/igt@fbdev@info.html * igt@gem_huc_copy@huc-copy: - bat-jsl-1: NOTRUN -> [SKIP][3] ([i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/bat-jsl-1/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-kbl-2: NOTRUN -> [SKIP][4] ([fdo#109271]) +35 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/bat-kbl-2/igt@gem_lmem_swapping@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - bat-jsl-1: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/bat-jsl-1/igt@gem_lmem_swapping@verify-random.html * igt@i915_selftest@live@workarounds: - bat-dg2-8: [PASS][6] -> [DMESG-FAIL][7] ([i915#9500]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/bat-dg2-8/igt@i915_selftest@live@workarounds.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/bat-dg2-8/igt@i915_selftest@live@workarounds.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-jsl-1: NOTRUN -> [SKIP][8] ([i915#4103]) +1 other test skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/bat-jsl-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-jsl-1: NOTRUN -> [SKIP][9] ([i915#3555] / [i915#9886]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/bat-jsl-1/igt@kms_dsc@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-jsl-1: NOTRUN -> [SKIP][10] ([fdo#109285]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/bat-jsl-1/igt@kms_force_connector_basic@force-load-detect.html * igt@kms_setmode@basic-clone-single-crtc: - bat-jsl-1: NOTRUN -> [SKIP][11] ([i915#3555]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/bat-jsl-1/igt@kms_setmode@basic-clone-single-crtc.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [i915#10194]: https://gitlab.freedesktop.org/drm/intel/issues/10194 [i915#10213]: https://gitlab.freedesktop.org/drm/intel/issues/10213 [i915#10215]: https://gitlab.freedesktop.org/drm/intel/issues/10215 [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#9318]: https://gitlab.freedesktop.org/drm/intel/issues/9318 [i915#9500]: https://gitlab.freedesktop.org/drm/intel/issues/9500 [i915#9886]: https://gitlab.freedesktop.org/drm/intel/issues/9886 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_7716 -> IGTPW_10692 CI-20190529: 20190529 CI_DRM_14287: b09fd1bd9f8b4a8e5cd8c1de8dbba4d4eb15b4e9 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_10692: 10692 IGT_7716: 7716 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/index.html [-- Attachment #2: Type: text/html, Size: 5206 bytes --] ^ permalink raw reply [flat|nested] 22+ messages in thread
* ✗ Fi.CI.IGT: failure for extend psr2_sf test for pr_sf (rev5) 2024-02-18 9:17 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi ` (5 preceding siblings ...) 2024-02-18 10:04 ` ✓ Fi.CI.BAT: " Patchwork @ 2024-02-18 11:26 ` Patchwork 6 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2024-02-18 11:26 UTC (permalink / raw) To: Kunal Joshi; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 100256 bytes --] == Series Details == Series: extend psr2_sf test for pr_sf (rev5) URL : https://patchwork.freedesktop.org/series/129004/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14287_full -> IGTPW_10692_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_10692_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_10692_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/index.html Participating hosts (7 -> 7) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_10692_full: ### IGT changes ### #### Possible regressions #### * igt@api_intel_bb@render-ccs: - shard-dg2: NOTRUN -> [FAIL][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-1/igt@api_intel_bb@render-ccs.html * igt@kms_plane_alpha_blend@constant-alpha-mid: - shard-dg2: NOTRUN -> [INCOMPLETE][2] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-2/igt@kms_plane_alpha_blend@constant-alpha-mid.html * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf: - shard-rkl: NOTRUN -> [SKIP][3] +3 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf: - shard-dg2: NOTRUN -> [SKIP][4] +3 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html * {igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area@psr2-pipe-a-edp-1} (NEW): - shard-mtlp: NOTRUN -> [SKIP][5] +22 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-4/igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area@psr2-pipe-a-edp-1.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area: - shard-tglu: NOTRUN -> [SKIP][6] +1 other test skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-4/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html #### Warnings #### * igt@kms_async_flips@test-cursor: - shard-mtlp: [SKIP][7] ([i915#6229]) -> [SKIP][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-mtlp-7/igt@kms_async_flips@test-cursor.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-5/igt@kms_async_flips@test-cursor.html * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf: - shard-tglu: [SKIP][9] ([i915#9683]) -> [SKIP][10] +5 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-tglu-10/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-10/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html * igt@kms_psr2_sf@cursor-plane-move-continuous-sf: - shard-dg1: [SKIP][11] ([i915#9683]) -> [SKIP][12] +6 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg1-17/igt@kms_psr2_sf@cursor-plane-move-continuous-sf.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-15/igt@kms_psr2_sf@cursor-plane-move-continuous-sf.html * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf: - shard-dg2: [SKIP][13] ([i915#9683]) -> [SKIP][14] +3 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg2-1/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html - shard-rkl: [SKIP][15] ([i915#9683]) -> [SKIP][16] +4 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-rkl-1/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@overlay-plane-update-continuous-sf: - shard-tglu: [SKIP][17] ([fdo#111068] / [i915#9683]) -> [SKIP][18] +3 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-tglu-7/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-5/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area: - shard-rkl: [SKIP][19] ([fdo#111068] / [i915#9683]) -> [SKIP][20] +3 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-rkl-7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-4/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area: - shard-dg1: [SKIP][21] ([fdo#111068] / [i915#9683]) -> [SKIP][22] +5 other tests skip [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg1-16/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-15/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * {igt@kms_ccs@pipe-d-crc-sprite-planes-basic-4-tiled-xe2-ccs}: - shard-rkl: NOTRUN -> [SKIP][23] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-4-tiled-xe2-ccs.html * {igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-sf}: - shard-dg1: NOTRUN -> [SKIP][24] [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-18/igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-sf.html * {igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-fully-sf}: - shard-dg2: [SKIP][25] ([i915#9683]) -> [SKIP][26] +6 other tests skip [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg2-1/igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-fully-sf.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-3/igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-fully-sf.html * {igt@kms_psr2_sf@fbc-overlay-plane-update-continuous-sf}: - shard-dg2: NOTRUN -> [SKIP][27] +1 other test skip [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-6/igt@kms_psr2_sf@fbc-overlay-plane-update-continuous-sf.html * {igt@kms_psr2_sf@fbc-overlay-plane-update-sf-dmg-area}: - shard-dg1: [SKIP][28] ([i915#9683]) -> [SKIP][29] +10 other tests skip [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg1-15/igt@kms_psr2_sf@fbc-overlay-plane-update-sf-dmg-area.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-17/igt@kms_psr2_sf@fbc-overlay-plane-update-sf-dmg-area.html * {igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area}: - shard-tglu: [SKIP][30] ([i915#9683]) -> [SKIP][31] +10 other tests skip [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-tglu-4/igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-9/igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area.html * {igt@kms_psr2_sf@fbc-primary-plane-update-sf-dmg-area}: - shard-rkl: [SKIP][32] ([i915#9683]) -> [SKIP][33] +9 other tests skip [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-rkl-4/igt@kms_psr2_sf@fbc-primary-plane-update-sf-dmg-area.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@kms_psr2_sf@fbc-primary-plane-update-sf-dmg-area.html New tests --------- New tests have been introduced between CI_DRM_14287_full and IGTPW_10692_full: ### New IGT tests (108) ### * igt@gem_barrier_race@remote-request@rcs0: - Statuses : 6 pass(s) 1 skip(s) - Exec time: [0.00, 5.27] s * igt@kms_flip@basic-flip-vs-wf_vblank@d-hdmi-a3: - Statuses : 1 pass(s) - Exec time: [0.94] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling: - Statuses : 1 skip(s) - Exec time: [0.00] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.01] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-a-hdmi-a-1: - Statuses : 3 skip(s) - Exec time: [0.01, 0.07] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-b-hdmi-a-1: - Statuses : 3 skip(s) - Exec time: [0.02, 0.07] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-c-hdmi-a-1: - Statuses : 1 skip(s) - Exec time: [0.03] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-1: - Statuses : 1 skip(s) - Exec time: [0.03] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20: - Statuses : 1 skip(s) - Exec time: [0.00] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.01] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-a-hdmi-a-1: - Statuses : 2 skip(s) - Exec time: [0.01, 0.08] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-a-hdmi-a-2: - Statuses : 1 skip(s) - Exec time: [0.01] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-a-hdmi-a-4: - Statuses : 1 skip(s) - Exec time: [0.01] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [0.01] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-1: - Statuses : 2 skip(s) - Exec time: [0.03, 0.08] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-2: - Statuses : 1 skip(s) - Exec time: [0.02] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-4: - Statuses : 1 skip(s) - Exec time: [0.02] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-hdmi-a-1: - Statuses : 1 skip(s) - Exec time: [0.03] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-hdmi-a-4: - Statuses : 1 skip(s) - Exec time: [0.02] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d-hdmi-a-1: - Statuses : 1 skip(s) - Exec time: [0.03] s * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d-hdmi-a-4: - Statuses : 1 skip(s) - Exec time: [0.02] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling: - Statuses : 1 skip(s) - Exec time: [0.00] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.00] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-a-hdmi-a-1: - Statuses : 2 pass(s) - Exec time: [0.12, 0.29] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-a-hdmi-a-2: - Statuses : 1 pass(s) - Exec time: [0.16] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-a-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.14] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [0.01] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b-hdmi-a-1: - Statuses : 2 pass(s) - Exec time: [0.12, 0.34] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b-hdmi-a-2: - Statuses : 1 pass(s) - Exec time: [0.12] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.15] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-c-hdmi-a-1: - Statuses : 1 pass(s) - Exec time: [0.12] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-c-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.12] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-d-hdmi-a-1: - Statuses : 1 pass(s) - Exec time: [0.12] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-d-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.12] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20: - Statuses : 1 skip(s) - Exec time: [0.00] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.00] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-a-hdmi-a-1: - Statuses : 3 pass(s) - Exec time: [0.12, 0.30] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-a-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.14] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-b-hdmi-a-1: - Statuses : 3 pass(s) - Exec time: [0.11, 0.37] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-b-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.12] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-c-hdmi-a-1: - Statuses : 1 pass(s) - Exec time: [0.12] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-c-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.12] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-d-hdmi-a-1: - Statuses : 1 pass(s) - Exec time: [0.13] s * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-20x20@pipe-d-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.12] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling: - Statuses : 1 skip(s) - Exec time: [0.00] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling@pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [0.07] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling@pipe-a-hdmi-a-1: - Statuses : 3 pass(s) - Exec time: [0.06, 0.30] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling@pipe-a-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.11] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling@pipe-b-hdmi-a-1: - Statuses : 3 pass(s) - Exec time: [0.13, 0.40] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling@pipe-b-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.14] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling@pipe-c-hdmi-a-1: - Statuses : 1 pass(s) - Exec time: [0.12] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling@pipe-c-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.14] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling@pipe-d-hdmi-a-1: - Statuses : 1 pass(s) - Exec time: [0.13] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling@pipe-d-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.12] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-20x20: - Statuses : 1 skip(s) - Exec time: [0.00] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-20x20@pipe-a-hdmi-a-1: - Statuses : 2 pass(s) - Exec time: [0.05, 0.33] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-20x20@pipe-b-hdmi-a-1: - Statuses : 2 pass(s) - Exec time: [0.13, 0.40] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-20x20@pipe-c-hdmi-a-1: - Statuses : 1 pass(s) - Exec time: [0.12] s * igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-20x20@pipe-d-hdmi-a-1: - Statuses : 1 pass(s) - Exec time: [0.11] s * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [11.80] s * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [11.84] s * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [11.51] s * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [11.52] s * igt@kms_psr2_sf@cursor-plane-move-continuous-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [11.17] s * igt@kms_psr2_sf@cursor-plane-move-continuous-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [11.15] s * igt@kms_psr2_sf@cursor-plane-update-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [1.37] s * igt@kms_psr2_sf@cursor-plane-update-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [1.42] s * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.88] s * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-fully-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.21] s * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.84] s * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.23] s * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.84] s * igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.21] s * igt@kms_psr2_sf@fbc-cursor-plane-update-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.84] s * igt@kms_psr2_sf@fbc-cursor-plane-update-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.21] s * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.83] s * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.27] s * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.84] s * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-exceed-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.25] s * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.83] s * igt@kms_psr2_sf@fbc-overlay-plane-move-continuous-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.25] s * igt@kms_psr2_sf@fbc-overlay-plane-update-continuous-sf@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.84] s * igt@kms_psr2_sf@fbc-overlay-plane-update-continuous-sf@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.21] s * igt@kms_psr2_sf@fbc-overlay-plane-update-sf-dmg-area@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.87] s * igt@kms_psr2_sf@fbc-overlay-plane-update-sf-dmg-area@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.21] s * igt@kms_psr2_sf@fbc-overlay-primary-update-sf-dmg-area@a-pipe-psr2-edp-1: - Statuses : 1 skip(s) - Exec time: [0.83] s * igt@kms_psr2_sf@fbc-overlay-primary-update-sf-dmg-area@b-pipe-psr2-edp-1: - Statuses : 1 skip(s) - Exec time: [1.24] s * igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area@psr2-pipe-a-edp-1: - Statuses : 1 skip(s) - Exec time: [0.83] s * igt@kms_psr2_sf@fbc-plane-move-sf-dmg-area@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [1.24] s * igt@kms_psr2_sf@fbc-primary-plane-update-sf-dmg-area@psr2-pipe-b-edp-1: - Statuses : 1 skip(s) - Exec time: [0.84] s * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [17.27] s * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [17.28] s * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [12.11] s * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [12.09] s * igt@kms_psr2_sf@overlay-plane-move-continuous-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [6.76] s * igt@kms_psr2_sf@overlay-plane-move-continuous-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [6.77] s * igt@kms_psr2_sf@overlay-plane-update-continuous-sf@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [1.84] s * igt@kms_psr2_sf@overlay-plane-update-continuous-sf@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [1.83] s * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [6.81] s * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [6.93] s * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area@a-pipe-psr2-edp-1: - Statuses : 1 pass(s) - Exec time: [6.84] s * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area@b-pipe-psr2-edp-1: - Statuses : 1 pass(s) - Exec time: [6.83] s * igt@kms_psr2_sf@plane-move-sf-dmg-area@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [5.46] s * igt@kms_psr2_sf@plane-move-sf-dmg-area@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [5.51] s * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [7.26] s * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [7.61] s * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area@psr2-pipe-a-edp-1: - Statuses : 1 pass(s) - Exec time: [6.82] s * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area@psr2-pipe-b-edp-1: - Statuses : 1 pass(s) - Exec time: [6.83] s Known issues ------------ Here are the changes found in IGTPW_10692_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@api_intel_bb@crc32: - shard-tglu: NOTRUN -> [SKIP][34] ([i915#6230]) [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-10/igt@api_intel_bb@crc32.html * igt@drm_fdinfo@most-busy-check-all@bcs0: - shard-dg1: NOTRUN -> [SKIP][35] ([i915#8414]) +4 other tests skip [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-13/igt@drm_fdinfo@most-busy-check-all@bcs0.html * igt@drm_fdinfo@most-busy-idle-check-all@rcs0: - shard-rkl: [PASS][36] -> [FAIL][37] ([i915#7742]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-rkl-5/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html * igt@drm_fdinfo@virtual-busy-idle-all: - shard-dg2: NOTRUN -> [SKIP][38] ([i915#8414]) +3 other tests skip [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-2/igt@drm_fdinfo@virtual-busy-idle-all.html * igt@gem_basic@multigpu-create-close: - shard-dg1: NOTRUN -> [SKIP][39] ([i915#7697]) [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-19/igt@gem_basic@multigpu-create-close.html * igt@gem_caching@read-writes: - shard-mtlp: NOTRUN -> [SKIP][40] ([i915#4873]) [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-6/igt@gem_caching@read-writes.html * igt@gem_ccs@ctrl-surf-copy: - shard-rkl: NOTRUN -> [SKIP][41] ([i915#3555] / [i915#9323]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@gem_ccs@ctrl-surf-copy.html * igt@gem_create@create-ext-cpu-access-big: - shard-tglu: NOTRUN -> [SKIP][42] ([i915#6335]) [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-10/igt@gem_create@create-ext-cpu-access-big.html - shard-rkl: NOTRUN -> [SKIP][43] ([i915#6335]) [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@gem_create@create-ext-cpu-access-big.html * igt@gem_ctx_param@set-priority-not-supported: - shard-dg2: NOTRUN -> [SKIP][44] ([fdo#109314]) [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-6/igt@gem_ctx_param@set-priority-not-supported.html * igt@gem_ctx_persistence@engines-mixed-process: - shard-snb: NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#1099]) [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-snb1/igt@gem_ctx_persistence@engines-mixed-process.html * igt@gem_ctx_persistence@heartbeat-stop: - shard-dg2: NOTRUN -> [SKIP][46] ([i915#8555]) [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-2/igt@gem_ctx_persistence@heartbeat-stop.html * igt@gem_ctx_sseu@engines: - shard-rkl: NOTRUN -> [SKIP][47] ([i915#280]) +1 other test skip [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@gem_ctx_sseu@engines.html - shard-tglu: NOTRUN -> [SKIP][48] ([i915#280]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-10/igt@gem_ctx_sseu@engines.html * igt@gem_exec_balancer@parallel-keep-in-fence: - shard-rkl: NOTRUN -> [SKIP][49] ([i915#4525]) +1 other test skip [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@gem_exec_balancer@parallel-keep-in-fence.html * igt@gem_exec_capture@capture-invisible@smem0: - shard-rkl: NOTRUN -> [SKIP][50] ([i915#6334]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@gem_exec_capture@capture-invisible@smem0.html * igt@gem_exec_capture@many-4k-incremental: - shard-dg1: NOTRUN -> [FAIL][51] ([i915#9606]) [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-15/igt@gem_exec_capture@many-4k-incremental.html * igt@gem_exec_fair@basic-none: - shard-dg1: NOTRUN -> [SKIP][52] ([i915#3539] / [i915#4852]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-18/igt@gem_exec_fair@basic-none.html * igt@gem_exec_fair@basic-none-rrul: - shard-dg2: NOTRUN -> [SKIP][53] ([i915#3539] / [i915#4852]) +3 other tests skip [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-3/igt@gem_exec_fair@basic-none-rrul.html * igt@gem_exec_fair@basic-none@vcs0: - shard-rkl: [PASS][54] -> [FAIL][55] ([i915#2842]) +1 other test fail [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-rkl-4/igt@gem_exec_fair@basic-none@vcs0.html [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-4/igt@gem_exec_fair@basic-none@vcs0.html * igt@gem_exec_fair@basic-pace-share: - shard-mtlp: NOTRUN -> [SKIP][56] ([i915#4473] / [i915#4771]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-7/igt@gem_exec_fair@basic-pace-share.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][57] -> [FAIL][58] ([i915#2842]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-tglu: [PASS][59] -> [FAIL][60] ([i915#2842]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-tglu-5/igt@gem_exec_fair@basic-pace-solo@rcs0.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-10/igt@gem_exec_fair@basic-pace-solo@rcs0.html * igt@gem_exec_flush@basic-batch-kernel-default-cmd: - shard-rkl: NOTRUN -> [SKIP][61] ([fdo#109313]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html * igt@gem_exec_flush@basic-uc-prw-default: - shard-dg2: NOTRUN -> [SKIP][62] ([i915#3539]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-6/igt@gem_exec_flush@basic-uc-prw-default.html * igt@gem_exec_flush@basic-uc-set-default: - shard-dg1: NOTRUN -> [SKIP][63] ([i915#3539]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-19/igt@gem_exec_flush@basic-uc-set-default.html * igt@gem_exec_reloc@basic-cpu-read: - shard-dg2: NOTRUN -> [SKIP][64] ([i915#3281]) +8 other tests skip [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@gem_exec_reloc@basic-cpu-read.html * igt@gem_exec_reloc@basic-gtt-read-noreloc: - shard-rkl: NOTRUN -> [SKIP][65] ([i915#3281]) +4 other tests skip [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-read-noreloc.html * igt@gem_exec_reloc@basic-wc-read-active: - shard-mtlp: NOTRUN -> [SKIP][66] ([i915#3281]) [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-4/igt@gem_exec_reloc@basic-wc-read-active.html * igt@gem_exec_reloc@basic-write-read-active: - shard-dg1: NOTRUN -> [SKIP][67] ([i915#3281]) +3 other tests skip [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-18/igt@gem_exec_reloc@basic-write-read-active.html * igt@gem_exec_suspend@basic-s0@smem: - shard-dg2: [PASS][68] -> [INCOMPLETE][69] ([i915#9275]) [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg2-3/igt@gem_exec_suspend@basic-s0@smem.html [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-2/igt@gem_exec_suspend@basic-s0@smem.html * igt@gem_exec_suspend@basic-s4-devices@lmem0: - shard-dg2: NOTRUN -> [ABORT][70] ([i915#7975] / [i915#8213]) [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-1/igt@gem_exec_suspend@basic-s4-devices@lmem0.html * igt@gem_fenced_exec_thrash@2-spare-fences: - shard-dg2: NOTRUN -> [SKIP][71] ([i915#4860]) +2 other tests skip [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-2/igt@gem_fenced_exec_thrash@2-spare-fences.html * igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible: - shard-mtlp: NOTRUN -> [SKIP][72] ([i915#4860]) [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-8/igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible.html * igt@gem_lmem_swapping@parallel-random-verify-ccs: - shard-rkl: NOTRUN -> [SKIP][73] ([i915#4613]) +5 other tests skip [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@gem_lmem_swapping@parallel-random-verify-ccs.html * igt@gem_lmem_swapping@smem-oom@lmem0: - shard-dg2: [PASS][74] -> [TIMEOUT][75] ([i915#5493]) [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg2-6/igt@gem_lmem_swapping@smem-oom@lmem0.html [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-10/igt@gem_lmem_swapping@smem-oom@lmem0.html * igt@gem_lmem_swapping@verify-ccs: - shard-tglu: NOTRUN -> [SKIP][76] ([i915#4613]) +2 other tests skip [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-6/igt@gem_lmem_swapping@verify-ccs.html - shard-glk: NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#4613]) [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-glk2/igt@gem_lmem_swapping@verify-ccs.html * igt@gem_mmap_gtt@basic: - shard-mtlp: NOTRUN -> [SKIP][78] ([i915#4077]) +3 other tests skip [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-1/igt@gem_mmap_gtt@basic.html * igt@gem_mmap_gtt@basic-copy: - shard-dg2: NOTRUN -> [SKIP][79] ([i915#4077]) +9 other tests skip [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-10/igt@gem_mmap_gtt@basic-copy.html * igt@gem_mmap_gtt@cpuset-big-copy-odd: - shard-dg1: NOTRUN -> [SKIP][80] ([i915#4077]) [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-18/igt@gem_mmap_gtt@cpuset-big-copy-odd.html * igt@gem_mmap_wc@bad-size: - shard-dg2: NOTRUN -> [SKIP][81] ([i915#4083]) +5 other tests skip [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-1/igt@gem_mmap_wc@bad-size.html * igt@gem_mmap_wc@write-gtt-read-wc: - shard-mtlp: NOTRUN -> [SKIP][82] ([i915#4083]) +2 other tests skip [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-8/igt@gem_mmap_wc@write-gtt-read-wc.html * igt@gem_partial_pwrite_pread@write: - shard-dg2: NOTRUN -> [SKIP][83] ([i915#3282]) +1 other test skip [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@gem_partial_pwrite_pread@write.html * igt@gem_partial_pwrite_pread@write-display: - shard-mtlp: NOTRUN -> [SKIP][84] ([i915#3282]) +2 other tests skip [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-5/igt@gem_partial_pwrite_pread@write-display.html * igt@gem_partial_pwrite_pread@writes-after-reads: - shard-rkl: NOTRUN -> [SKIP][85] ([i915#3282]) +2 other tests skip [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@gem_partial_pwrite_pread@writes-after-reads.html * igt@gem_pxp@create-valid-protected-context: - shard-mtlp: NOTRUN -> [SKIP][86] ([i915#4270]) +1 other test skip [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-7/igt@gem_pxp@create-valid-protected-context.html * igt@gem_pxp@display-protected-crc: - shard-dg2: NOTRUN -> [SKIP][87] ([i915#4270]) +2 other tests skip [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-2/igt@gem_pxp@display-protected-crc.html * igt@gem_pxp@reject-modify-context-protection-off-3: - shard-dg1: NOTRUN -> [SKIP][88] ([i915#4270]) [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-19/igt@gem_pxp@reject-modify-context-protection-off-3.html * igt@gem_pxp@verify-pxp-execution-after-suspend-resume: - shard-rkl: NOTRUN -> [SKIP][89] ([i915#4270]) +1 other test skip [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html * igt@gem_render_copy@y-tiled-ccs-to-y-tiled: - shard-dg2: NOTRUN -> [SKIP][90] ([i915#5190]) +7 other tests skip [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-1/igt@gem_render_copy@y-tiled-ccs-to-y-tiled.html * igt@gem_set_tiling_vs_blt@tiled-to-untiled: - shard-dg1: NOTRUN -> [SKIP][91] ([i915#4079]) [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-16/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html * igt@gem_unfence_active_buffers: - shard-dg2: NOTRUN -> [SKIP][92] ([i915#4879]) [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-10/igt@gem_unfence_active_buffers.html * igt@gem_userptr_blits@access-control: - shard-dg1: NOTRUN -> [SKIP][93] ([i915#3297]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-13/igt@gem_userptr_blits@access-control.html * igt@gem_userptr_blits@coherency-sync: - shard-rkl: NOTRUN -> [SKIP][94] ([fdo#110542]) [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@gem_userptr_blits@coherency-sync.html * igt@gem_userptr_blits@create-destroy-unsync: - shard-rkl: NOTRUN -> [SKIP][95] ([i915#3297]) +1 other test skip [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-4/igt@gem_userptr_blits@create-destroy-unsync.html * igt@gem_userptr_blits@dmabuf-sync: - shard-rkl: NOTRUN -> [SKIP][96] ([i915#3323]) [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@gem_userptr_blits@dmabuf-sync.html * igt@gem_userptr_blits@dmabuf-unsync: - shard-dg2: NOTRUN -> [SKIP][97] ([i915#3297]) +3 other tests skip [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-2/igt@gem_userptr_blits@dmabuf-unsync.html * igt@gem_userptr_blits@forbidden-operations: - shard-dg1: NOTRUN -> [SKIP][98] ([i915#3282] / [i915#3297]) [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-12/igt@gem_userptr_blits@forbidden-operations.html * igt@gem_userptr_blits@invalid-mmap-offset-unsync: - shard-tglu: NOTRUN -> [SKIP][99] ([i915#3297]) [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-8/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html * igt@gem_userptr_blits@map-fixed-invalidate-busy: - shard-dg2: NOTRUN -> [SKIP][100] ([i915#3297] / [i915#4880]) [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-10/igt@gem_userptr_blits@map-fixed-invalidate-busy.html * igt@gem_userptr_blits@readonly-pwrite-unsync: - shard-mtlp: NOTRUN -> [SKIP][101] ([i915#3297]) [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-6/igt@gem_userptr_blits@readonly-pwrite-unsync.html * igt@gen7_exec_parse@basic-offset: - shard-dg2: NOTRUN -> [SKIP][102] ([fdo#109289]) +2 other tests skip [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-10/igt@gen7_exec_parse@basic-offset.html * igt@gen7_exec_parse@cmd-crossing-page: - shard-rkl: NOTRUN -> [SKIP][103] ([fdo#109289]) +1 other test skip [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@gen7_exec_parse@cmd-crossing-page.html * igt@gen9_exec_parse@batch-zero-length: - shard-mtlp: NOTRUN -> [SKIP][104] ([i915#2856]) [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-7/igt@gen9_exec_parse@batch-zero-length.html * igt@gen9_exec_parse@bb-secure: - shard-dg1: NOTRUN -> [SKIP][105] ([i915#2527]) +1 other test skip [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-19/igt@gen9_exec_parse@bb-secure.html * igt@gen9_exec_parse@secure-batches: - shard-dg2: NOTRUN -> [SKIP][106] ([i915#2856]) +3 other tests skip [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-2/igt@gen9_exec_parse@secure-batches.html * igt@gen9_exec_parse@shadow-peek: - shard-rkl: NOTRUN -> [SKIP][107] ([i915#2527]) +2 other tests skip [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-4/igt@gen9_exec_parse@shadow-peek.html * igt@i915_module_load@reload-with-fault-injection: - shard-mtlp: [PASS][108] -> [ABORT][109] ([i915#10131] / [i915#9820]) [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-mtlp-4/igt@i915_module_load@reload-with-fault-injection.html [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-8/igt@i915_module_load@reload-with-fault-injection.html * igt@i915_pm_freq_api@freq-reset-multiple: - shard-rkl: NOTRUN -> [SKIP][110] ([i915#8399]) +1 other test skip [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@i915_pm_freq_api@freq-reset-multiple.html * igt@i915_pm_rc6_residency@media-rc6-accuracy: - shard-dg1: NOTRUN -> [SKIP][111] ([fdo#109289]) [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-18/igt@i915_pm_rc6_residency@media-rc6-accuracy.html * igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0: - shard-dg1: [PASS][112] -> [FAIL][113] ([i915#3591]) [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg1-16/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html * igt@i915_pm_rps@thresholds-idle@gt0: - shard-mtlp: NOTRUN -> [SKIP][114] ([i915#8925]) [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-1/igt@i915_pm_rps@thresholds-idle@gt0.html * igt@i915_pm_rps@thresholds-idle@gt1: - shard-mtlp: NOTRUN -> [SKIP][115] ([i915#3555] / [i915#8925]) [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-1/igt@i915_pm_rps@thresholds-idle@gt1.html * igt@i915_pm_sseu@full-enable: - shard-dg2: NOTRUN -> [SKIP][116] ([i915#4387]) [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-1/igt@i915_pm_sseu@full-enable.html * igt@i915_power@sanity: - shard-rkl: NOTRUN -> [SKIP][117] ([i915#7984]) [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@i915_power@sanity.html * igt@i915_suspend@basic-s3-without-i915: - shard-rkl: [PASS][118] -> [FAIL][119] ([i915#10031]) [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-rkl-1/igt@i915_suspend@basic-s3-without-i915.html [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@i915_suspend@basic-s3-without-i915.html * igt@intel_hwmon@hwmon-read: - shard-rkl: NOTRUN -> [SKIP][120] ([i915#7707]) [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@intel_hwmon@hwmon-read.html * igt@kms_addfb_basic@basic-x-tiled-legacy: - shard-mtlp: NOTRUN -> [SKIP][121] ([i915#4212]) [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-4/igt@kms_addfb_basic@basic-x-tiled-legacy.html * igt@kms_addfb_basic@clobberred-modifier: - shard-dg2: NOTRUN -> [SKIP][122] ([i915#4212]) [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-3/igt@kms_addfb_basic@clobberred-modifier.html * igt@kms_addfb_basic@invalid-smem-bo-on-discrete: - shard-rkl: NOTRUN -> [SKIP][123] ([i915#3826]) [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html * igt@kms_async_flips@invalid-async-flip: - shard-dg2: NOTRUN -> [SKIP][124] ([i915#6228]) [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-1/igt@kms_async_flips@invalid-async-flip.html * igt@kms_atomic_transition@plane-all-modeset-transition: - shard-mtlp: NOTRUN -> [SKIP][125] ([i915#1769] / [i915#3555]) [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-5/igt@kms_atomic_transition@plane-all-modeset-transition.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels: - shard-dg2: NOTRUN -> [SKIP][126] ([i915#1769] / [i915#3555]) [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html * igt@kms_big_fb@4-tiled-32bpp-rotate-0: - shard-rkl: NOTRUN -> [SKIP][127] ([i915#5286]) +5 other tests skip [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip: - shard-dg1: NOTRUN -> [SKIP][128] ([i915#4538] / [i915#5286]) [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-12/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180: - shard-tglu: NOTRUN -> [SKIP][129] ([fdo#111615] / [i915#5286]) +2 other tests skip [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180.html * igt@kms_big_fb@linear-16bpp-rotate-90: - shard-rkl: NOTRUN -> [SKIP][130] ([fdo#111614] / [i915#3638]) [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-4/igt@kms_big_fb@linear-16bpp-rotate-90.html * igt@kms_big_fb@x-tiled-16bpp-rotate-270: - shard-dg1: NOTRUN -> [SKIP][131] ([i915#3638]) [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-19/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html * igt@kms_big_fb@x-tiled-16bpp-rotate-90: - shard-dg2: NOTRUN -> [SKIP][132] ([fdo#111614]) +3 other tests skip [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-3/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-mtlp: NOTRUN -> [SKIP][133] ([fdo#111615]) +2 other tests skip [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip: - shard-dg2: NOTRUN -> [SKIP][134] ([i915#4538] / [i915#5190]) +10 other tests skip [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html * igt@kms_big_fb@yf-tiled-32bpp-rotate-90: - shard-rkl: NOTRUN -> [SKIP][135] ([fdo#110723]) +3 other tests skip [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-3/igt@kms_big_fb@yf-tiled-32bpp-rotate-90.html * igt@kms_big_fb@yf-tiled-addfb: - shard-rkl: NOTRUN -> [SKIP][136] ([fdo#111615]) +1 other test skip [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@kms_big_fb@yf-tiled-addfb.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip: - shard-tglu: NOTRUN -> [SKIP][137] ([fdo#111615]) +3 other tests skip [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0: - shard-dg1: NOTRUN -> [SKIP][138] ([i915#4538]) +1 other test skip [138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-12/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html * igt@kms_big_joiner@invalid-modeset: - shard-rkl: NOTRUN -> [SKIP][139] ([i915#2705]) [139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@kms_big_joiner@invalid-modeset.html * igt@kms_ccs@pipe-a-bad-pixel-format-4-tiled-dg2-rc-ccs: - shard-rkl: NOTRUN -> [SKIP][140] ([i915#5354] / [i915#6095]) +21 other tests skip [140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-4/igt@kms_ccs@pipe-a-bad-pixel-format-4-tiled-dg2-rc-ccs.html * igt@kms_ccs@pipe-a-bad-pixel-format-4-tiled-dg2-rc-ccs-cc: - shard-mtlp: NOTRUN -> [SKIP][141] ([i915#5354] / [i915#6095]) +11 other tests skip [141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-2/igt@kms_ccs@pipe-a-bad-pixel-format-4-tiled-dg2-rc-ccs-cc.html * igt@kms_ccs@pipe-b-ccs-on-another-bo-y-tiled-gen12-mc-ccs: - shard-dg2: NOTRUN -> [SKIP][142] ([i915#5354]) +78 other tests skip [142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-6/igt@kms_ccs@pipe-b-ccs-on-another-bo-y-tiled-gen12-mc-ccs.html * igt@kms_ccs@pipe-b-random-ccs-data-4-tiled-mtl-rc-ccs-cc: - shard-dg1: NOTRUN -> [SKIP][143] ([i915#5354] / [i915#6095]) +13 other tests skip [143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-19/igt@kms_ccs@pipe-b-random-ccs-data-4-tiled-mtl-rc-ccs-cc.html * igt@kms_ccs@pipe-c-missing-ccs-buffer-y-tiled-gen12-mc-ccs: - shard-tglu: NOTRUN -> [SKIP][144] ([i915#5354] / [i915#6095]) +20 other tests skip [144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-6/igt@kms_ccs@pipe-c-missing-ccs-buffer-y-tiled-gen12-mc-ccs.html * igt@kms_ccs@pipe-d-bad-pixel-format-4-tiled-mtl-rc-ccs: - shard-snb: NOTRUN -> [SKIP][145] ([fdo#109271]) +114 other tests skip [145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-snb6/igt@kms_ccs@pipe-d-bad-pixel-format-4-tiled-mtl-rc-ccs.html * igt@kms_ccs@pipe-d-random-ccs-data-4-tiled-mtl-rc-ccs-cc: - shard-rkl: NOTRUN -> [SKIP][146] ([i915#5354]) +30 other tests skip [146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@kms_ccs@pipe-d-random-ccs-data-4-tiled-mtl-rc-ccs-cc.html * igt@kms_cdclk@mode-transition: - shard-dg1: NOTRUN -> [SKIP][147] ([i915#3742]) [147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-19/igt@kms_cdclk@mode-transition.html * igt@kms_cdclk@plane-scaling: - shard-rkl: NOTRUN -> [SKIP][148] ([i915#3742]) [148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@kms_cdclk@plane-scaling.html * igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3: - shard-dg2: NOTRUN -> [SKIP][149] ([i915#4087]) +3 other tests skip [149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-6/igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3.html * igt@kms_chamelium_audio@dp-audio: - shard-tglu: NOTRUN -> [SKIP][150] ([i915#7828]) +3 other tests skip [150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-7/igt@kms_chamelium_audio@dp-audio.html * igt@kms_chamelium_color@ctm-0-75: - shard-dg2: NOTRUN -> [SKIP][151] ([fdo#111827]) [151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-3/igt@kms_chamelium_color@ctm-0-75.html * igt@kms_chamelium_color@ctm-limited-range: - shard-rkl: NOTRUN -> [SKIP][152] ([fdo#111827]) [152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-3/igt@kms_chamelium_color@ctm-limited-range.html * igt@kms_chamelium_color@ctm-red-to-blue: - shard-mtlp: NOTRUN -> [SKIP][153] ([fdo#111827]) [153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-6/igt@kms_chamelium_color@ctm-red-to-blue.html * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k: - shard-dg1: NOTRUN -> [SKIP][154] ([i915#7828]) [154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-17/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html * igt@kms_chamelium_frames@dp-crc-fast: - shard-dg2: NOTRUN -> [SKIP][155] ([i915#7828]) +5 other tests skip [155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-2/igt@kms_chamelium_frames@dp-crc-fast.html * igt@kms_chamelium_hpd@hdmi-hpd-fast: - shard-rkl: NOTRUN -> [SKIP][156] ([i915#7828]) +8 other tests skip [156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-3/igt@kms_chamelium_hpd@hdmi-hpd-fast.html * igt@kms_chamelium_hpd@vga-hpd-without-ddc: - shard-mtlp: NOTRUN -> [SKIP][157] ([i915#7828]) +1 other test skip [157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-5/igt@kms_chamelium_hpd@vga-hpd-without-ddc.html * igt@kms_content_protection@atomic-dpms: - shard-rkl: NOTRUN -> [SKIP][158] ([i915#7118] / [i915#9424]) [158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@kms_content_protection@atomic-dpms.html * igt@kms_content_protection@content-type-change: - shard-tglu: NOTRUN -> [SKIP][159] ([i915#6944] / [i915#9424]) [159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-9/igt@kms_content_protection@content-type-change.html * igt@kms_content_protection@mei-interface: - shard-dg1: NOTRUN -> [SKIP][160] ([i915#9424]) [160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-15/igt@kms_content_protection@mei-interface.html * igt@kms_content_protection@srm: - shard-rkl: NOTRUN -> [SKIP][161] ([i915#7118]) [161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@kms_content_protection@srm.html * igt@kms_content_protection@type1: - shard-dg2: NOTRUN -> [SKIP][162] ([i915#7118] / [i915#9424]) [162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-6/igt@kms_content_protection@type1.html * igt@kms_cursor_crc@cursor-offscreen-512x170: - shard-dg2: NOTRUN -> [SKIP][163] ([i915#3359]) +1 other test skip [163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-10/igt@kms_cursor_crc@cursor-offscreen-512x170.html * igt@kms_cursor_crc@cursor-offscreen-512x512: - shard-dg1: NOTRUN -> [SKIP][164] ([i915#3359]) [164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-12/igt@kms_cursor_crc@cursor-offscreen-512x512.html * igt@kms_cursor_crc@cursor-random-32x10: - shard-mtlp: NOTRUN -> [SKIP][165] ([i915#3555] / [i915#8814]) [165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-6/igt@kms_cursor_crc@cursor-random-32x10.html * igt@kms_cursor_crc@cursor-random-512x512: - shard-rkl: NOTRUN -> [SKIP][166] ([i915#3359]) +1 other test skip [166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@kms_cursor_crc@cursor-random-512x512.html * igt@kms_cursor_crc@cursor-rapid-movement-32x32: - shard-dg2: NOTRUN -> [SKIP][167] ([i915#3555]) +6 other tests skip [167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-dg2: NOTRUN -> [SKIP][168] ([fdo#109274] / [i915#5354]) +2 other tests skip [168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-3/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size: - shard-rkl: NOTRUN -> [SKIP][169] ([i915#4103]) [169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html * igt@kms_cursor_legacy@cursor-vs-flip-varying-size: - shard-rkl: NOTRUN -> [INCOMPLETE][170] ([i915#10137]) [170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic: - shard-rkl: NOTRUN -> [SKIP][171] ([fdo#111825]) +10 other tests skip [171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html * igt@kms_cursor_legacy@cursorb-vs-flipa-toggle: - shard-tglu: NOTRUN -> [SKIP][172] ([fdo#109274]) [172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-4/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle: - shard-rkl: NOTRUN -> [SKIP][173] ([fdo#111767] / [fdo#111825]) +1 other test skip [173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions: - shard-dg2: NOTRUN -> [SKIP][174] ([i915#4103] / [i915#4213]) [174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle: - shard-tglu: NOTRUN -> [SKIP][175] ([i915#4103]) [175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html - shard-glk: NOTRUN -> [SKIP][176] ([fdo#109271]) +19 other tests skip [176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-glk9/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html * igt@kms_cursor_legacy@torture-bo@pipe-a: - shard-dg1: [PASS][177] -> [DMESG-WARN][178] ([i915#10166]) [177]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg1-15/igt@kms_cursor_legacy@torture-bo@pipe-a.html [178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-19/igt@kms_cursor_legacy@torture-bo@pipe-a.html - shard-tglu: [PASS][179] -> [DMESG-WARN][180] ([i915#10166]) [179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-tglu-2/igt@kms_cursor_legacy@torture-bo@pipe-a.html [180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-4/igt@kms_cursor_legacy@torture-bo@pipe-a.html * igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-1: - shard-dg2: NOTRUN -> [SKIP][181] ([fdo#110189] / [i915#9227]) [181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-10/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-1.html - shard-rkl: NOTRUN -> [SKIP][182] ([fdo#110189] / [i915#9723]) [182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-1.html * igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-3: - shard-dg1: NOTRUN -> [SKIP][183] ([fdo#110189] / [i915#9723]) [183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-13/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-3.html * igt@kms_dirtyfb@psr-dirtyfb-ioctl: - shard-dg2: NOTRUN -> [SKIP][184] ([i915#9833]) [184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-1/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][185] ([i915#3804]) [185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html * igt@kms_dsc@dsc-with-formats: - shard-rkl: NOTRUN -> [SKIP][186] ([i915#3555] / [i915#3840]) +1 other test skip [186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@kms_dsc@dsc-with-formats.html * igt@kms_dsc@dsc-with-output-formats-with-bpc: - shard-dg2: NOTRUN -> [SKIP][187] ([i915#3840] / [i915#9053]) [187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-6/igt@kms_dsc@dsc-with-output-formats-with-bpc.html * igt@kms_fbcon_fbt@psr: - shard-dg1: NOTRUN -> [SKIP][188] ([i915#3469]) [188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-15/igt@kms_fbcon_fbt@psr.html * igt@kms_feature_discovery@display-2x: - shard-dg2: NOTRUN -> [SKIP][189] ([i915#1839]) +1 other test skip [189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-10/igt@kms_feature_discovery@display-2x.html * igt@kms_feature_discovery@psr2: - shard-rkl: NOTRUN -> [SKIP][190] ([i915#658]) [190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@kms_feature_discovery@psr2.html * igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible: - shard-dg1: NOTRUN -> [SKIP][191] ([fdo#111825] / [i915#9934]) [191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-13/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html * igt@kms_flip@2x-busy-flip: - shard-dg2: NOTRUN -> [SKIP][192] ([fdo#109274]) +3 other tests skip [192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-1/igt@kms_flip@2x-busy-flip.html - shard-tglu: NOTRUN -> [SKIP][193] ([fdo#109274] / [i915#3637]) +1 other test skip [193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-2/igt@kms_flip@2x-busy-flip.html * igt@kms_flip@2x-flip-vs-blocking-wf-vblank: - shard-tglu: NOTRUN -> [SKIP][194] ([fdo#109274] / [fdo#111767] / [i915#3637]) +2 other tests skip [194]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-8/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html * igt@kms_flip@flip-vs-fences-interruptible: - shard-dg2: NOTRUN -> [SKIP][195] ([i915#8381]) +1 other test skip [195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@kms_flip@flip-vs-fences-interruptible.html * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-valid-mode: - shard-rkl: NOTRUN -> [SKIP][196] ([i915#2672]) +2 other tests skip [196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode: - shard-tglu: NOTRUN -> [SKIP][197] ([i915#2587] / [i915#2672]) +2 other tests skip [197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-10/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode: - shard-dg1: NOTRUN -> [SKIP][198] ([i915#2587] / [i915#2672]) [198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-17/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling@pipe-a-default-mode: - shard-mtlp: NOTRUN -> [SKIP][199] ([i915#2672]) [199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-valid-mode: - shard-dg2: NOTRUN -> [SKIP][200] ([i915#2672]) +1 other test skip [200]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-valid-mode.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-dg2: [PASS][201] -> [FAIL][202] ([i915#6880]) [201]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move.html [202]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc: - shard-dg2: NOTRUN -> [SKIP][203] ([i915#8708]) +14 other tests skip [203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt: - shard-rkl: NOTRUN -> [SKIP][204] ([fdo#111825] / [i915#1825]) +29 other tests skip [204]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-gtt: - shard-mtlp: NOTRUN -> [SKIP][205] ([i915#8708]) +1 other test skip [205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-pwrite: - shard-tglu: NOTRUN -> [SKIP][206] ([fdo#109280]) +13 other tests skip [206]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc: - shard-snb: [PASS][207] -> [SKIP][208] ([fdo#109271]) +8 other tests skip [207]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html [208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-snb5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-cpu: - shard-tglu: NOTRUN -> [SKIP][209] ([fdo#110189]) +10 other tests skip [209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-render: - shard-dg2: NOTRUN -> [SKIP][210] ([fdo#111767] / [i915#5354]) [210]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-pwrite: - shard-dg1: NOTRUN -> [SKIP][211] ([fdo#111825]) +5 other tests skip [211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-16/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff: - shard-tglu: NOTRUN -> [SKIP][212] ([fdo#109280] / [fdo#111767]) [212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-9/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff.html * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4: - shard-rkl: NOTRUN -> [SKIP][213] ([i915#5439]) [213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html * igt@kms_frontbuffer_tracking@plane-fbc-rte: - shard-dg2: NOTRUN -> [SKIP][214] ([i915#10070]) [214]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-1/igt@kms_frontbuffer_tracking@plane-fbc-rte.html - shard-rkl: NOTRUN -> [SKIP][215] ([i915#10070]) [215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@kms_frontbuffer_tracking@plane-fbc-rte.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move: - shard-dg2: NOTRUN -> [SKIP][216] ([i915#3458]) +14 other tests skip [216]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt: - shard-rkl: NOTRUN -> [SKIP][217] ([i915#3023]) +17 other tests skip [217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-dg1: NOTRUN -> [SKIP][218] ([i915#8708]) +6 other tests skip [218]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-12/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-pgflip-blt: - shard-mtlp: NOTRUN -> [SKIP][219] ([i915#1825]) +6 other tests skip [219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff: - shard-dg1: NOTRUN -> [SKIP][220] ([fdo#111767] / [fdo#111825]) +1 other test skip [220]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-15/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff.html * igt@kms_frontbuffer_tracking@psr-suspend: - shard-dg1: NOTRUN -> [SKIP][221] ([i915#3458]) +2 other tests skip [221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-17/igt@kms_frontbuffer_tracking@psr-suspend.html * igt@kms_hdr@bpc-switch-suspend: - shard-dg2: NOTRUN -> [SKIP][222] ([i915#3555] / [i915#8228]) [222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@kms_hdr@bpc-switch-suspend.html * igt@kms_hdr@invalid-hdr: - shard-rkl: NOTRUN -> [SKIP][223] ([i915#3555] / [i915#8228]) +1 other test skip [223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@kms_hdr@invalid-hdr.html - shard-tglu: NOTRUN -> [SKIP][224] ([i915#3555] / [i915#8228]) [224]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-9/igt@kms_hdr@invalid-hdr.html * igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1: - shard-mtlp: NOTRUN -> [SKIP][225] ([i915#9457]) +3 other tests skip [225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-8/igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1.html * igt@kms_plane_lowres@tiling-y: - shard-dg2: NOTRUN -> [SKIP][226] ([i915#8821]) [226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-6/igt@kms_plane_lowres@tiling-y.html * igt@kms_plane_multiple@tiling-yf: - shard-rkl: NOTRUN -> [SKIP][227] ([i915#3555]) +3 other tests skip [227]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@kms_plane_multiple@tiling-yf.html * igt@kms_plane_scaling@2x-scaler-multi-pipe: - shard-dg2: NOTRUN -> [SKIP][228] ([fdo#109274] / [i915#5354] / [i915#9423]) [228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@kms_plane_scaling@2x-scaler-multi-pipe.html * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2: - shard-rkl: NOTRUN -> [FAIL][229] ([i915#8292]) [229]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2.html * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-b-edp-1: - shard-mtlp: NOTRUN -> [SKIP][230] ([i915#5176]) +3 other tests skip [230]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-7/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-b-edp-1.html * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-hdmi-a-1: - shard-rkl: NOTRUN -> [SKIP][231] ([i915#9423]) +9 other tests skip [231]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-4/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-hdmi-a-1.html * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-c-hdmi-a-3: - shard-dg1: NOTRUN -> [SKIP][232] ([i915#9423]) +19 other tests skip [232]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-12/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-c-hdmi-a-3.html * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-d-hdmi-a-1: - shard-tglu: NOTRUN -> [SKIP][233] ([i915#9423]) +3 other tests skip [233]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-7/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-d-hdmi-a-1.html * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][234] ([i915#5235]) +7 other tests skip [234]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b-hdmi-a-2.html * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-3: - shard-dg2: NOTRUN -> [SKIP][235] ([i915#5235] / [i915#9423]) +11 other tests skip [235]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-1/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-3.html * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4: - shard-dg1: NOTRUN -> [SKIP][236] ([i915#5235]) +15 other tests skip [236]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-18/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4.html * igt@kms_pm_dc@dc5-psr: - shard-rkl: NOTRUN -> [SKIP][237] ([i915#9685]) [237]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@kms_pm_dc@dc5-psr.html - shard-tglu: NOTRUN -> [SKIP][238] ([i915#9685]) [238]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-9/igt@kms_pm_dc@dc5-psr.html * igt@kms_pm_dc@dc6-dpms: - shard-dg2: NOTRUN -> [SKIP][239] ([i915#5978]) [239]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-2/igt@kms_pm_dc@dc6-dpms.html * igt@kms_pm_dc@dc6-psr: - shard-dg2: NOTRUN -> [SKIP][240] ([i915#9685]) +1 other test skip [240]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-6/igt@kms_pm_dc@dc6-psr.html * igt@kms_pm_dc@dc9-dpms: - shard-rkl: NOTRUN -> [SKIP][241] ([i915#3361]) +1 other test skip [241]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@kms_pm_dc@dc9-dpms.html - shard-tglu: [PASS][242] -> [SKIP][243] ([i915#4281]) [242]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-tglu-3/igt@kms_pm_dc@dc9-dpms.html [243]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-9/igt@kms_pm_dc@dc9-dpms.html * igt@kms_pm_lpsp@kms-lpsp@pipe-a-hdmi-a-1: - shard-tglu: NOTRUN -> [FAIL][244] ([i915#9301]) [244]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-5/igt@kms_pm_lpsp@kms-lpsp@pipe-a-hdmi-a-1.html * igt@kms_pm_rpm@dpms-mode-unset-lpsp: - shard-rkl: NOTRUN -> [SKIP][245] ([i915#9519]) [245]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait: - shard-dg1: NOTRUN -> [SKIP][246] ([i915#9519]) [246]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-13/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html * igt@kms_pm_rpm@modeset-non-lpsp-stress: - shard-dg2: [PASS][247] -> [SKIP][248] ([i915#9519]) [247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg2-2/igt@kms_pm_rpm@modeset-non-lpsp-stress.html [248]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-10/igt@kms_pm_rpm@modeset-non-lpsp-stress.html * igt@kms_pm_rpm@pc8-residency: - shard-dg1: NOTRUN -> [SKIP][249] ([fdo#109293] / [fdo#109506]) [249]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-16/igt@kms_pm_rpm@pc8-residency.html * igt@kms_prime@basic-modeset-hybrid: - shard-rkl: NOTRUN -> [SKIP][250] ([i915#6524]) [250]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@kms_prime@basic-modeset-hybrid.html - shard-dg2: NOTRUN -> [SKIP][251] ([i915#6524] / [i915#6805]) [251]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-1/igt@kms_prime@basic-modeset-hybrid.html * igt@kms_psr2_su@page_flip-xrgb8888: - shard-dg2: NOTRUN -> [SKIP][252] ([i915#9683]) [252]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-1/igt@kms_psr2_su@page_flip-xrgb8888.html * igt@kms_rotation_crc@bad-tiling: - shard-dg2: NOTRUN -> [SKIP][253] ([i915#4235]) +2 other tests skip [253]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-10/igt@kms_rotation_crc@bad-tiling.html * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180: - shard-rkl: NOTRUN -> [SKIP][254] ([i915#5289]) [254]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html - shard-tglu: NOTRUN -> [SKIP][255] ([i915#5289]) [255]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-10/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0: - shard-rkl: [PASS][256] -> [ABORT][257] ([i915#8875] / [i915#9926]) [256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-rkl-7/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html [257]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0: - shard-rkl: NOTRUN -> [SKIP][258] ([fdo#111615] / [i915#5289]) [258]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90: - shard-dg1: NOTRUN -> [SKIP][259] ([fdo#111615] / [i915#5289]) [259]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-12/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html * igt@kms_scaling_modes@scaling-mode-none: - shard-dg1: NOTRUN -> [SKIP][260] ([i915#3555]) [260]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-12/igt@kms_scaling_modes@scaling-mode-none.html * igt@kms_setmode@clone-exclusive-crtc: - shard-tglu: NOTRUN -> [SKIP][261] ([i915#3555]) [261]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-4/igt@kms_setmode@clone-exclusive-crtc.html * igt@kms_sysfs_edid_timing: - shard-dg2: NOTRUN -> [FAIL][262] ([IGT#2]) [262]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-6/igt@kms_sysfs_edid_timing.html * igt@kms_tiled_display@basic-test-pattern-with-chamelium: - shard-mtlp: NOTRUN -> [SKIP][263] ([i915#8623]) [263]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html * igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1: - shard-mtlp: [PASS][264] -> [FAIL][265] ([i915#9196]) [264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-mtlp-6/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html [265]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-8/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html * igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1: - shard-tglu: [PASS][266] -> [FAIL][267] ([i915#9196]) [266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-tglu-7/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1.html [267]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-5/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-1.html * igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-3: - shard-dg1: NOTRUN -> [FAIL][268] ([i915#9196]) [268]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-13/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-3.html * igt@kms_vrr@flip-basic-fastset: - shard-mtlp: NOTRUN -> [SKIP][269] ([i915#8808] / [i915#9906]) [269]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-7/igt@kms_vrr@flip-basic-fastset.html * igt@kms_writeback@writeback-pixel-formats: - shard-tglu: NOTRUN -> [SKIP][270] ([i915#2437] / [i915#9412]) [270]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-2/igt@kms_writeback@writeback-pixel-formats.html * igt@perf@mi-rpc: - shard-rkl: NOTRUN -> [SKIP][271] ([i915#2434]) [271]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@perf@mi-rpc.html - shard-tglu: NOTRUN -> [SKIP][272] ([fdo#109289]) +2 other tests skip [272]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-4/igt@perf@mi-rpc.html * igt@perf@per-context-mode-unprivileged: - shard-rkl: NOTRUN -> [SKIP][273] ([i915#2435]) [273]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-1/igt@perf@per-context-mode-unprivileged.html * igt@perf_pmu@cpu-hotplug: - shard-rkl: NOTRUN -> [SKIP][274] ([i915#8850]) [274]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@perf_pmu@cpu-hotplug.html * igt@perf_pmu@event-wait@rcs0: - shard-rkl: NOTRUN -> [SKIP][275] ([fdo#112283]) [275]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-4/igt@perf_pmu@event-wait@rcs0.html * igt@prime_udl: - shard-tglu: NOTRUN -> [SKIP][276] ([fdo#109291]) [276]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-8/igt@prime_udl.html * igt@prime_vgem@basic-gtt: - shard-dg1: NOTRUN -> [SKIP][277] ([i915#3708] / [i915#4077]) [277]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-19/igt@prime_vgem@basic-gtt.html * igt@prime_vgem@basic-write: - shard-dg2: NOTRUN -> [SKIP][278] ([i915#3291] / [i915#3708]) [278]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-10/igt@prime_vgem@basic-write.html - shard-rkl: NOTRUN -> [SKIP][279] ([fdo#109295] / [i915#3291] / [i915#3708]) [279]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-3/igt@prime_vgem@basic-write.html * igt@prime_vgem@fence-read-hang: - shard-dg2: NOTRUN -> [SKIP][280] ([i915#3708]) [280]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@prime_vgem@fence-read-hang.html * igt@sriov_basic@bind-unbind-vf: - shard-dg2: NOTRUN -> [SKIP][281] ([i915#9917]) [281]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-6/igt@sriov_basic@bind-unbind-vf.html * igt@sriov_basic@enable-vfs-bind-unbind-each: - shard-rkl: NOTRUN -> [SKIP][282] ([i915#9917]) [282]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-4/igt@sriov_basic@enable-vfs-bind-unbind-each.html * igt@syncobj_timeline@invalid-wait-zero-handles: - shard-dg1: NOTRUN -> [FAIL][283] ([i915#9781]) [283]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-15/igt@syncobj_timeline@invalid-wait-zero-handles.html * igt@v3d/v3d_submit_cl@single-in-sync: - shard-tglu: NOTRUN -> [SKIP][284] ([fdo#109315] / [i915#2575]) +3 other tests skip [284]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-4/igt@v3d/v3d_submit_cl@single-in-sync.html * igt@v3d/v3d_submit_csd@bad-multisync-pad: - shard-rkl: NOTRUN -> [SKIP][285] ([fdo#109315]) +9 other tests skip [285]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@v3d/v3d_submit_csd@bad-multisync-pad.html * igt@v3d/v3d_submit_csd@job-perfmon: - shard-dg2: NOTRUN -> [SKIP][286] ([i915#2575]) +8 other tests skip [286]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@v3d/v3d_submit_csd@job-perfmon.html * igt@v3d/v3d_wait_bo@bad-bo: - shard-dg1: NOTRUN -> [SKIP][287] ([i915#2575]) +2 other tests skip [287]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-17/igt@v3d/v3d_wait_bo@bad-bo.html * igt@v3d/v3d_wait_bo@bad-pad: - shard-mtlp: NOTRUN -> [SKIP][288] ([i915#2575]) +2 other tests skip [288]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-4/igt@v3d/v3d_wait_bo@bad-pad.html * igt@vc4/vc4_label_bo@set-bad-handle: - shard-tglu: NOTRUN -> [SKIP][289] ([i915#2575]) +3 other tests skip [289]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-4/igt@vc4/vc4_label_bo@set-bad-handle.html * igt@vc4/vc4_label_bo@set-bad-name: - shard-dg1: NOTRUN -> [SKIP][290] ([i915#7711]) +1 other test skip [290]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-19/igt@vc4/vc4_label_bo@set-bad-name.html * igt@vc4/vc4_label_bo@set-label: - shard-mtlp: NOTRUN -> [SKIP][291] ([i915#7711]) +1 other test skip [291]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-7/igt@vc4/vc4_label_bo@set-label.html * igt@vc4/vc4_perfmon@create-perfmon-invalid-events: - shard-dg2: NOTRUN -> [SKIP][292] ([i915#7711]) +5 other tests skip [292]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-2/igt@vc4/vc4_perfmon@create-perfmon-invalid-events.html * igt@vc4/vc4_tiling@get-bad-flags: - shard-rkl: NOTRUN -> [SKIP][293] ([i915#7711]) +6 other tests skip [293]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@vc4/vc4_tiling@get-bad-flags.html #### Possible fixes #### * igt@gem_eio@unwedge-stress: - shard-dg1: [FAIL][294] ([i915#5784]) -> [PASS][295] +1 other test pass [294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg1-16/igt@gem_eio@unwedge-stress.html [295]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-16/igt@gem_eio@unwedge-stress.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-rkl: [FAIL][296] ([i915#2842]) -> [PASS][297] +1 other test pass [296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-rkl-7/igt@gem_exec_fair@basic-pace@rcs0.html [297]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-7/igt@gem_exec_fair@basic-pace@rcs0.html * igt@gem_exec_suspend@basic-s4-devices@smem: - shard-tglu: [ABORT][298] ([i915#7975] / [i915#8213]) -> [PASS][299] [298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-tglu-10/igt@gem_exec_suspend@basic-s4-devices@smem.html [299]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-2/igt@gem_exec_suspend@basic-s4-devices@smem.html * igt@gem_mmap_gtt@hang-user: - shard-tglu: [INCOMPLETE][300] ([i915#10137]) -> [PASS][301] [300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-tglu-6/igt@gem_mmap_gtt@hang-user.html [301]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-4/igt@gem_mmap_gtt@hang-user.html * igt@i915_module_load@reload-with-fault-injection: - shard-glk: [INCOMPLETE][302] ([i915#10137] / [i915#9200] / [i915#9849]) -> [PASS][303] [302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-glk4/igt@i915_module_load@reload-with-fault-injection.html [303]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-glk9/igt@i915_module_load@reload-with-fault-injection.html * igt@i915_pm_rps@reset: - shard-snb: [INCOMPLETE][304] ([i915#10137] / [i915#7790]) -> [PASS][305] [304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-snb2/igt@i915_pm_rps@reset.html [305]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-snb7/igt@i915_pm_rps@reset.html * igt@i915_power@sanity: - shard-mtlp: [SKIP][306] ([i915#7984]) -> [PASS][307] [306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-mtlp-7/igt@i915_power@sanity.html [307]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-6/igt@i915_power@sanity.html * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip: - shard-tglu: [FAIL][308] ([i915#3743]) -> [PASS][309] [308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-tglu-8/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html [309]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-6/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a4: - shard-dg1: [FAIL][310] ([i915#79]) -> [PASS][311] [310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg1-16/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a4.html [311]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-15/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a4.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render: - shard-snb: [SKIP][312] ([fdo#109271]) -> [PASS][313] +7 other tests pass [312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html [313]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite: - shard-dg2: [FAIL][314] ([i915#6880]) -> [PASS][315] +1 other test pass [314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html [315]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-3/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html * igt@kms_plane@pixel-format-source-clamping@pipe-a: - shard-rkl: [INCOMPLETE][316] ([i915#10056]) -> [PASS][317] [316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-rkl-4/igt@kms_plane@pixel-format-source-clamping@pipe-a.html [317]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@kms_plane@pixel-format-source-clamping@pipe-a.html * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4: - shard-dg1: [FAIL][318] ([i915#8292]) -> [PASS][319] [318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg1-18/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4.html [319]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-19/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4.html * igt@kms_pm_rpm@modeset-lpsp: - shard-rkl: [SKIP][320] ([i915#9519]) -> [PASS][321] +1 other test pass [320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-rkl-1/igt@kms_pm_rpm@modeset-lpsp.html [321]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-5/igt@kms_pm_rpm@modeset-lpsp.html * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait: - shard-dg2: [SKIP][322] ([i915#9519]) -> [PASS][323] [322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg2-2/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html [323]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-10/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html * igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1: - shard-mtlp: [FAIL][324] ([i915#9196]) -> [PASS][325] [324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-mtlp-6/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html [325]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-mtlp-8/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html * igt@perf@non-zero-reason@0-rcs0: - shard-dg2: [FAIL][326] ([i915#7484]) -> [PASS][327] [326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg2-1/igt@perf@non-zero-reason@0-rcs0.html [327]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-5/igt@perf@non-zero-reason@0-rcs0.html #### Warnings #### * igt@device_reset@unbind-reset-rebind: - shard-dg1: [INCOMPLETE][328] ([i915#10137] / [i915#9618]) -> [INCOMPLETE][329] ([i915#10137] / [i915#9408] / [i915#9618]) [328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg1-18/igt@device_reset@unbind-reset-rebind.html [329]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg1-12/igt@device_reset@unbind-reset-rebind.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-tglu: [FAIL][330] ([i915#2876]) -> [FAIL][331] ([i915#2842]) [330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-tglu-8/igt@gem_exec_fair@basic-pace@rcs0.html [331]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-9/igt@gem_exec_fair@basic-pace@rcs0.html * igt@kms_content_protection@atomic-dpms: - shard-snb: [SKIP][332] ([fdo#109271]) -> [INCOMPLETE][333] ([i915#8816]) +1 other test incomplete [332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-snb1/igt@kms_content_protection@atomic-dpms.html [333]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-snb7/igt@kms_content_protection@atomic-dpms.html * igt@kms_content_protection@mei-interface: - shard-rkl: [SKIP][334] ([i915#8063]) -> [SKIP][335] ([i915#9424]) [334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-rkl-6/igt@kms_content_protection@mei-interface.html [335]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-6/igt@kms_content_protection@mei-interface.html - shard-tglu: [SKIP][336] ([i915#8063]) -> [SKIP][337] ([i915#6944] / [i915#9424]) [336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-tglu-9/igt@kms_content_protection@mei-interface.html [337]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-tglu-10/igt@kms_content_protection@mei-interface.html * igt@kms_content_protection@uevent: - shard-snb: [INCOMPLETE][338] ([i915#8816]) -> [SKIP][339] ([fdo#109271]) [338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-snb7/igt@kms_content_protection@uevent.html [339]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-snb6/igt@kms_content_protection@uevent.html * igt@kms_multipipe_modeset@basic-max-pipe-crc-check: - shard-rkl: [SKIP][340] ([i915#4070] / [i915#4816]) -> [SKIP][341] ([i915#4816]) [340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-rkl-5/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html [341]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-rkl-4/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html * igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem: - shard-dg2: [CRASH][342] ([i915#9351]) -> [INCOMPLETE][343] ([i915#5493]) [342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14287/shard-dg2-3/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html [343]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/shard-dg2-10/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291 [fdo#109293]: https://bugs.freedesktop.org/show_bug.cgi?id=109293 [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295 [fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313 [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542 [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 [fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283 [i915#10031]: https://gitlab.freedesktop.org/drm/intel/issues/10031 [i915#10056]: https://gitlab.freedesktop.org/drm/intel/issues/10056 [i915#10070]: https://gitlab.freedesktop.org/drm/intel/issues/10070 [i915#10131]: https://gitlab.freedesktop.org/drm/intel/issues/10131 [i915#10137]: https://gitlab.freedesktop.org/drm/intel/issues/10137 [i915#10166]: https://gitlab.freedesktop.org/drm/intel/issues/10166 [i915#10278]: https://gitlab.freedesktop.org/drm/intel/issues/10278 [i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099 [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769 [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825 [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839 [i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434 [i915#2435]: https://gitlab.freedesktop.org/drm/intel/issues/2435 [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437 [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527 [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587 [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672 [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705 [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856 [i915#2876]: https://gitlab.freedesktop.org/drm/intel/issues/2876 [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023 [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291 [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297 [i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323 [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359 [i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361 [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458 [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469 [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742 [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743 [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804 [i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826 [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840 [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070 [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077 [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079 [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083 [i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212 [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213 [i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235 [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270 [i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281 [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387 [i915#4473]: https://gitlab.freedesktop.org/drm/intel/issues/4473 [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525 [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10692/index.html [-- Attachment #2: Type: text/html, Size: 118681 bytes --] ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf @ 2024-02-19 16:33 Kunal Joshi 2024-02-19 16:33 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi 0 siblings, 1 reply; 22+ messages in thread From: Kunal Joshi @ 2024-02-19 16:33 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi kmd series [1] adds supports for panel replay selective fetch, modify lib and kms_psr2_sf to extend kms_psr2_sf tests to validate panel replay selective fetch as well. [1] https://patchwork.freedesktop.org/patch/575163/?series=128193&rev=3 Kunal Joshi (3): lib/igt_psr: modify library to support multiple PSR/PR outputs lib/igt_psr: add support for PR selective update tests/intel/kms_psr2_sf: extend tests for panel replay sf lib/igt_psr.c | 90 +++++++----- lib/igt_psr.h | 14 +- tests/intel/kms_dirtyfb.c | 4 +- tests/intel/kms_fbcon_fbt.c | 4 +- tests/intel/kms_frontbuffer_tracking.c | 4 +- tests/intel/kms_pm_dc.c | 6 +- tests/intel/kms_psr.c | 4 +- tests/intel/kms_psr2_sf.c | 196 ++++++++++++++++++------- tests/intel/kms_psr2_su.c | 2 +- tests/intel/kms_psr_stress_test.c | 4 +- tests/kms_async_flips.c | 4 +- tests/kms_cursor_legacy.c | 4 +- 12 files changed, 215 insertions(+), 121 deletions(-) -- 2.25.1 ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs 2024-02-19 16:33 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi @ 2024-02-19 16:33 ` Kunal Joshi 2024-02-20 8:47 ` Hogander, Jouni 0 siblings, 1 reply; 22+ messages in thread From: Kunal Joshi @ 2024-02-19 16:33 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy We can have multiple panels connected to the system so PSR information should be exposed per output. changes provide support for multiple PSR/PR to be tested simultaneously. v2: Use macro instead of function (Jouni) v3: keep psr_enable in igt_fixture (Jouni) Cc: Jouni Högander <jouni.hogander@intel.com> Cc: Animesh Manna <animesh.manna@intel.com> Cc: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> --- lib/igt_psr.c | 76 ++++++++++++++------------ lib/igt_psr.h | 14 ++--- tests/intel/kms_dirtyfb.c | 4 +- tests/intel/kms_fbcon_fbt.c | 4 +- tests/intel/kms_frontbuffer_tracking.c | 4 +- tests/intel/kms_pm_dc.c | 6 +- tests/intel/kms_psr.c | 4 +- tests/intel/kms_psr2_sf.c | 5 +- tests/intel/kms_psr2_su.c | 2 +- tests/intel/kms_psr_stress_test.c | 4 +- tests/kms_async_flips.c | 4 +- tests/kms_cursor_legacy.c | 4 +- 12 files changed, 66 insertions(+), 65 deletions(-) diff --git a/lib/igt_psr.c b/lib/igt_psr.c index ac214fcfc..cad8cce05 100644 --- a/lib/igt_psr.c +++ b/lib/igt_psr.c @@ -27,6 +27,10 @@ #include "igt_sysfs.h" #include <errno.h> +#define SET_DEBUGFS_PATH(output, path) \ + sprintf(path, "%s%s%s", output ? output->name : "", output ? "/" : "", \ + output ? "i915_psr_status" : "i915_edp_psr_status") + bool psr_disabled_check(int debugfs_fd) { char buf[PSR_STATUS_MAX_LEN]; @@ -37,11 +41,13 @@ bool psr_disabled_check(int debugfs_fd) return strstr(buf, "PSR mode: disabled\n"); } -bool psr2_selective_fetch_check(int debugfs_fd) +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output) { char buf[PSR_STATUS_MAX_LEN]; + char debugfs_file[128] = {0}; - igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf, + SET_DEBUGFS_PATH(output, debugfs_file); + igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); return strstr(buf, "PSR2 selective fetch: enabled"); @@ -54,11 +60,7 @@ static bool psr_active_check(int debugfs_fd, enum psr_mode mode, igt_output_t *o const char *state = (mode == PSR_MODE_1 || mode == PR_MODE) ? "SRDENT" : "DEEP_SLEEP"; int ret; - if (output) - sprintf(debugfs_file, "%s/i915_psr_status", output->name); - else - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); - + SET_DEBUGFS_PATH(output, debugfs_file); ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); if (ret < 0) { @@ -90,13 +92,18 @@ bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *outp return igt_wait(!psr_active_check(debugfs_fd, mode, output), 500, 10); } -static ssize_t psr_write(int debugfs_fd, const char *buf) +static ssize_t psr_write(int debugfs_fd, const char *buf, igt_output_t *output) { + /* + * FIXME: Currently we don't have separate psr_debug file for each output. + * so, we are using i915_edp_psr_debug file for all outputs. + * Later we need to add support for separate psr_debug file for each output. + */ return igt_sysfs_write(debugfs_fd, "i915_edp_psr_debug", buf, - strlen(buf)); + strlen(buf)); } -static int has_psr_debugfs(int debugfs_fd) +static int has_psr_debugfs(int debugfs_fd, igt_output_t *output) { int ret; @@ -105,7 +112,7 @@ static int has_psr_debugfs(int debugfs_fd) * Legacy mode will return OK here, debugfs api will return -EINVAL. * -ENODEV is returned when PSR is unavailable. */ - ret = psr_write(debugfs_fd, "0xf"); + ret = psr_write(debugfs_fd, "0xf", output); if (ret == -EINVAL) { errno = 0; return 0; @@ -113,7 +120,7 @@ static int has_psr_debugfs(int debugfs_fd) return ret; /* legacy debugfs api, we enabled irqs by writing, disable them. */ - psr_write(debugfs_fd, "0"); + psr_write(debugfs_fd, "0", output); return -EINVAL; } @@ -134,14 +141,14 @@ static int psr_restore_debugfs_fd = -1; static void restore_psr_debugfs(int sig) { - psr_write(psr_restore_debugfs_fd, "0"); + psr_write(psr_restore_debugfs_fd, "0", NULL); } -static bool psr_set(int device, int debugfs_fd, int mode) +static bool psr_set(int device, int debugfs_fd, int mode, igt_output_t *output) { int ret; - ret = has_psr_debugfs(debugfs_fd); + ret = has_psr_debugfs(debugfs_fd, output); if (ret == -ENODEV) { igt_skip("PSR not available\n"); return false; @@ -179,7 +186,7 @@ static bool psr_set(int device, int debugfs_fd, int mode) debug_val = "0x1"; } - ret = psr_write(debugfs_fd, debug_val); + ret = psr_write(debugfs_fd, debug_val, output); igt_require_f(ret > 0, "PSR2 SF feature not available\n"); } @@ -193,15 +200,15 @@ static bool psr_set(int device, int debugfs_fd, int mode) return ret; } -bool psr_enable(int device, int debugfs_fd, enum psr_mode mode) +bool psr_enable(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output) { - return psr_set(device, debugfs_fd, mode); + return psr_set(device, debugfs_fd, mode, output); } -bool psr_disable(int device, int debugfs_fd) +bool psr_disable(int device, int debugfs_fd, igt_output_t *output) { /* Any mode different than PSR_MODE_1/2 will disable PSR */ - return psr_set(device, debugfs_fd, -1); + return psr_set(device, debugfs_fd, -1, output); } bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output) @@ -211,11 +218,7 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output char buf[PSR_STATUS_MAX_LEN]; int ret; - if (output) - sprintf(debugfs_file, "%s/i915_psr_status", output->name); - else - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); - + SET_DEBUGFS_PATH(output, debugfs_file); ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); if (ret < 1) @@ -305,7 +308,7 @@ void psr_print_debugfs(int debugfs_fd) igt_info("%s", buf); } -bool i915_psr2_selective_fetch_check(int drm_fd) +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output) { int debugfs_fd; bool ret; @@ -314,7 +317,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) return false; debugfs_fd = igt_debugfs_dir(drm_fd); - ret = psr2_selective_fetch_check(debugfs_fd); + ret = psr2_selective_fetch_check(debugfs_fd, output); close(debugfs_fd); return ret; @@ -331,7 +334,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) * Returns: * True if PSR mode changed to PSR1, false otherwise. */ -bool i915_psr2_sel_fetch_to_psr1(int drm_fd) +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) { int debugfs_fd; bool ret = false; @@ -340,8 +343,8 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) return ret; debugfs_fd = igt_debugfs_dir(drm_fd); - if (psr2_selective_fetch_check(debugfs_fd)) { - psr_set(drm_fd, debugfs_fd, PSR_MODE_1); + if (psr2_selective_fetch_check(debugfs_fd, output)) { + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); ret = true; } @@ -355,12 +358,12 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) * Restore PSR2 selective fetch after tests were executed, this function should * only be called if i915_psr2_sel_fetch_to_psr1() returned true. */ -void i915_psr2_sel_fetch_restore(int drm_fd) +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) { int debugfs_fd; debugfs_fd = igt_debugfs_dir(drm_fd); - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH); + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); close(debugfs_fd); } @@ -369,16 +372,17 @@ void i915_psr2_sel_fetch_restore(int drm_fd) * * Return the current PSR mode. */ -enum psr_mode psr_get_mode(int debugfs_fd) +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) { char buf[PSR_STATUS_MAX_LEN]; + char debugfs_file[128] = {0}; int ret; - - ret = igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf, + SET_DEBUGFS_PATH(output, debugfs_file); + ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); if (ret < 0) { - igt_info("Could not read i915_edp_psr_status: %s\n", + igt_info("Could not read psr status: %s\n", strerror(-ret)); return PSR_DISABLED; } diff --git a/lib/igt_psr.h b/lib/igt_psr.h index 82a4e8c5e..372bef2b2 100644 --- a/lib/igt_psr.h +++ b/lib/igt_psr.h @@ -46,21 +46,21 @@ enum fbc_mode { }; bool psr_disabled_check(int debugfs_fd); -bool psr2_selective_fetch_check(int debugfs_fd); +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output); bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); -bool psr_enable(int device, int debugfs_fd, enum psr_mode); -bool psr_disable(int device, int debugfs_fd); +bool psr_enable(int device, int debugfs_fd, enum psr_mode, igt_output_t *output); +bool psr_disable(int device, int debugfs_fd, igt_output_t *output); bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr2_wait_su(int debugfs_fd, uint16_t *num_su_blocks); void psr_print_debugfs(int debugfs_fd); -enum psr_mode psr_get_mode(int debugfs_fd); +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output); -bool i915_psr2_selective_fetch_check(int drm_fd); +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output); -bool i915_psr2_sel_fetch_to_psr1(int drm_fd); -void i915_psr2_sel_fetch_restore(int drm_fd); +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output); +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); #endif diff --git a/tests/intel/kms_dirtyfb.c b/tests/intel/kms_dirtyfb.c index 26b82e50a..c2411c824 100644 --- a/tests/intel/kms_dirtyfb.c +++ b/tests/intel/kms_dirtyfb.c @@ -127,7 +127,7 @@ static void enable_feature(data_t *data) intel_fbc_enable(data->drm_fd); break; case FEATURE_PSR: - psr_enable(data->drm_fd, data->debugfs_fd, PSR_MODE_1); + psr_enable(data->drm_fd, data->debugfs_fd, PSR_MODE_1, NULL); break; case FEATURE_DRRS: intel_drrs_enable(data->drm_fd, data->pipe); @@ -167,7 +167,7 @@ static void check_feature(data_t *data) static void disable_features(data_t *data) { intel_fbc_disable(data->drm_fd); - psr_disable(data->drm_fd, data->debugfs_fd); + psr_disable(data->drm_fd, data->debugfs_fd, NULL); intel_drrs_disable(data->drm_fd, data->pipe); } diff --git a/tests/intel/kms_fbcon_fbt.c b/tests/intel/kms_fbcon_fbt.c index 90484dccf..71e42f19c 100644 --- a/tests/intel/kms_fbcon_fbt.c +++ b/tests/intel/kms_fbcon_fbt.c @@ -277,7 +277,7 @@ static void disable_features(int device, int debugfs_fd) { igt_set_module_param_int(device, "enable_fbc", 0); if (psr_sink_support(device, debugfs_fd, PSR_MODE_1, NULL)) - psr_disable(device, debugfs_fd); + psr_disable(device, debugfs_fd, NULL); } static inline void fbc_modparam_enable(int device, int debugfs_fd) @@ -287,7 +287,7 @@ static inline void fbc_modparam_enable(int device, int debugfs_fd) static inline void psr_debugfs_enable(int device, int debugfs_fd) { - psr_enable(device, debugfs_fd, PSR_MODE_1); + psr_enable(device, debugfs_fd, PSR_MODE_1, NULL); } static void fbc_skips_on_fbcon(int debugfs_fd) diff --git a/tests/intel/kms_frontbuffer_tracking.c b/tests/intel/kms_frontbuffer_tracking.c index 912cca3f8..023843161 100644 --- a/tests/intel/kms_frontbuffer_tracking.c +++ b/tests/intel/kms_frontbuffer_tracking.c @@ -2234,7 +2234,7 @@ static bool disable_features(const struct test_mode *t) intel_fbc_disable(drm.fd); intel_drrs_disable(drm.fd, prim_mode_params.pipe); - return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : false; + return psr.can_test ? psr_disable(drm.fd, drm.debugfs, NULL) : false; } static void *busy_thread_func(void *data) @@ -2867,7 +2867,7 @@ static bool enable_features_for_test(const struct test_mode *t) if (t->feature & FEATURE_FBC) intel_fbc_enable(drm.fd); if (t->feature & FEATURE_PSR) - ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1); + ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1, NULL); if (t->feature & FEATURE_DRRS) intel_drrs_enable(drm.fd, prim_mode_params.pipe); diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c index 0d5824e67..7deebf83d 100644 --- a/tests/intel/kms_pm_dc.c +++ b/tests/intel/kms_pm_dc.c @@ -362,7 +362,7 @@ static void require_dc_counter(int debugfs_fd, int dc_flag) static void setup_dc3co(data_t *data) { data->op_psr_mode = PSR_MODE_2; - psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode); + psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, NULL); igt_require_f(psr_wait_entry(data->debugfs_fd, data->op_psr_mode, NULL), "PSR2 is not enabled\n"); } @@ -665,7 +665,7 @@ igt_main igt_require(psr_sink_support(data.drm_fd, data.debugfs_fd, PSR_MODE_1, NULL)); data.op_psr_mode = PSR_MODE_1; - psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode); + psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode, NULL); test_dc_state_psr(&data, CHECK_DC5); } @@ -675,7 +675,7 @@ igt_main igt_require(psr_sink_support(data.drm_fd, data.debugfs_fd, PSR_MODE_1, NULL)); data.op_psr_mode = PSR_MODE_1; - psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode); + psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode, NULL); igt_require_f(igt_pm_pc8_plus_residencies_enabled(data.msr_fd), "PC8+ residencies not supported\n"); if (intel_display_ver(data.devid) >= 14) diff --git a/tests/intel/kms_psr.c b/tests/intel/kms_psr.c index 521d4c708..3822b3081 100644 --- a/tests/intel/kms_psr.c +++ b/tests/intel/kms_psr.c @@ -519,7 +519,7 @@ static bool psr_enable_if_enabled(data_t *data) igt_skip("enable_psr modparam doesn't allow psr mode %d\n", data->op_psr_mode); - return psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode); + return psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, data->output); } static inline void manual(const char *expected) @@ -658,6 +658,7 @@ static void test_cleanup(data_t *data) igt_remove_fb(data->drm_fd, &data->fb_green); igt_remove_fb(data->drm_fd, &data->fb_white); + psr_disable(data->drm_fd, data->debugfs_fd, data->output); } static void setup_test_plane(data_t *data, int test_plane) @@ -976,7 +977,6 @@ igt_main } igt_fixture { - psr_disable(data.drm_fd, data.debugfs_fd); close(data.debugfs_fd); buf_ops_destroy(data.bops); diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c index ecf9ad77f..0fb300161 100644 --- a/tests/intel/kms_psr2_sf.c +++ b/tests/intel/kms_psr2_sf.c @@ -1014,7 +1014,7 @@ igt_main /* Test if PSR2 can be enabled */ igt_require_f(psr_enable(data.drm_fd, - data.debugfs_fd, PSR_MODE_2_SEL_FETCH), + data.debugfs_fd, PSR_MODE_2_SEL_FETCH, NULL), "Error enabling PSR2\n"); data.damage_area_count = MAX_DAMAGE_AREAS; @@ -1026,9 +1026,6 @@ igt_main igt_info("Big framebuffer size %dx%d\n", data.big_fb_width, data.big_fb_height); - igt_require_f(psr2_selective_fetch_check(data.debugfs_fd), - "PSR2 selective fetch not enabled\n"); - for_each_pipe_with_valid_output(&data.display, data.pipe, data.output) { coexist_features[n_pipes] = 0; if (check_psr2_support(&data)) { diff --git a/tests/intel/kms_psr2_su.c b/tests/intel/kms_psr2_su.c index 936b5beb3..437ee36f6 100644 --- a/tests/intel/kms_psr2_su.c +++ b/tests/intel/kms_psr2_su.c @@ -338,7 +338,7 @@ igt_main /* Test if PSR2 can be enabled */ igt_require_f(psr_enable(data.drm_fd, - data.debugfs_fd, PSR_MODE_2), + data.debugfs_fd, PSR_MODE_2, NULL), "Error enabling PSR2\n"); data.op = FRONTBUFFER; data.format = DRM_FORMAT_XRGB8888; diff --git a/tests/intel/kms_psr_stress_test.c b/tests/intel/kms_psr_stress_test.c index 7aea8e8a5..bca3bd513 100644 --- a/tests/intel/kms_psr_stress_test.c +++ b/tests/intel/kms_psr_stress_test.c @@ -230,7 +230,7 @@ static void prepare(data_t *data) r = timerfd_settime(data->completed_timerfd, 0, &interval, NULL); igt_require_f(r != -1, "Error setting completed_timerfd\n"); - data->initial_state = psr_get_mode(data->debugfs_fd); + data->initial_state = psr_get_mode(data->debugfs_fd, NULL); igt_require(data->initial_state != PSR_DISABLED); igt_require(psr_wait_entry(data->debugfs_fd, data->initial_state, NULL)); } @@ -343,7 +343,7 @@ static void run(data_t *data) } /* Check if after all this stress the PSR is still in the same state */ - igt_assert(psr_get_mode(data->debugfs_fd) == data->initial_state); + igt_assert(psr_get_mode(data->debugfs_fd, NULL) == data->initial_state); } igt_main diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c index a0349fa03..2895168f7 100644 --- a/tests/kms_async_flips.c +++ b/tests/kms_async_flips.c @@ -391,7 +391,7 @@ static void test_cursor(data_t *data) * necessary, causing the async flip to fail because async flip is not * supported in cursor plane. */ - igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd), + igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd, NULL), "PSR2 sel fetch causes cursor to be added to primary plane " \ "pages flips and async flip is not supported in cursor\n"); @@ -704,7 +704,7 @@ igt_main * necessary, causing the async flip to fail because async flip is not * supported in cursor plane. */ - igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_fd), + igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_fd, NULL), "PSR2 sel fetch causes cursor to be added to primary plane " \ "pages flips and async flip is not supported in cursor\n"); diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c index 0017659d4..a430f735a 100644 --- a/tests/kms_cursor_legacy.c +++ b/tests/kms_cursor_legacy.c @@ -1849,7 +1849,7 @@ igt_main * page flip with cursor legacy APIS when Intel's PSR2 selective * fetch is enabled, so switching PSR1 for this whole test. */ - intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd); + intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); } igt_describe("Test checks how many cursor updates we can fit between vblanks " @@ -2074,7 +2074,7 @@ igt_main igt_fixture { if (intel_psr2_restore) - i915_psr2_sel_fetch_restore(display.drm_fd); + i915_psr2_sel_fetch_restore(display.drm_fd, NULL); igt_display_fini(&display); drm_close_driver(display.drm_fd); } -- 2.25.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs 2024-02-19 16:33 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi @ 2024-02-20 8:47 ` Hogander, Jouni 0 siblings, 0 replies; 22+ messages in thread From: Hogander, Jouni @ 2024-02-20 8:47 UTC (permalink / raw) To: Joshi, Kunal1, igt-dev; +Cc: Murthy, Arun R, Manna, Animesh On Mon, 2024-02-19 at 22:03 +0530, Kunal Joshi wrote: > We can have multiple panels connected to the system so PSR > information > should be exposed per output. changes provide support for multiple > PSR/PR to be tested simultaneously. > > v2: Use macro instead of function (Jouni) > v3: keep psr_enable in igt_fixture (Jouni) > > Cc: Jouni Högander <jouni.hogander@intel.com> > Cc: Animesh Manna <animesh.manna@intel.com> > Cc: Arun R Murthy <arun.r.murthy@intel.com> > Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> > --- > lib/igt_psr.c | 76 ++++++++++++++---------- > -- > lib/igt_psr.h | 14 ++--- > tests/intel/kms_dirtyfb.c | 4 +- > tests/intel/kms_fbcon_fbt.c | 4 +- > tests/intel/kms_frontbuffer_tracking.c | 4 +- > tests/intel/kms_pm_dc.c | 6 +- > tests/intel/kms_psr.c | 4 +- > tests/intel/kms_psr2_sf.c | 5 +- > tests/intel/kms_psr2_su.c | 2 +- > tests/intel/kms_psr_stress_test.c | 4 +- > tests/kms_async_flips.c | 4 +- > tests/kms_cursor_legacy.c | 4 +- > 12 files changed, 66 insertions(+), 65 deletions(-) > > diff --git a/lib/igt_psr.c b/lib/igt_psr.c > index ac214fcfc..cad8cce05 100644 > --- a/lib/igt_psr.c > +++ b/lib/igt_psr.c > @@ -27,6 +27,10 @@ > #include "igt_sysfs.h" > #include <errno.h> > > +#define SET_DEBUGFS_PATH(output, path) \ > + sprintf(path, "%s%s%s", output ? output->name : "", output ? > "/" : "", \ > + output ? "i915_psr_status" : > "i915_edp_psr_status") > + > bool psr_disabled_check(int debugfs_fd) > { > char buf[PSR_STATUS_MAX_LEN]; > @@ -37,11 +41,13 @@ bool psr_disabled_check(int debugfs_fd) > return strstr(buf, "PSR mode: disabled\n"); > } > > -bool psr2_selective_fetch_check(int debugfs_fd) > +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > *output) > { > char buf[PSR_STATUS_MAX_LEN]; > + char debugfs_file[128] = {0}; > > - igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", > buf, > + SET_DEBUGFS_PATH(output, debugfs_file); > + igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, > sizeof(buf)); > > return strstr(buf, "PSR2 selective fetch: enabled"); > @@ -54,11 +60,7 @@ static bool psr_active_check(int debugfs_fd, enum > psr_mode mode, igt_output_t *o > const char *state = (mode == PSR_MODE_1 || mode == PR_MODE) ? > "SRDENT" : "DEEP_SLEEP"; > int ret; > > - if (output) > - sprintf(debugfs_file, "%s/i915_psr_status", output- > >name); > - else > - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); > - > + SET_DEBUGFS_PATH(output, debugfs_file); > ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, > buf, sizeof(buf)); > if (ret < 0) { > @@ -90,13 +92,18 @@ bool psr_long_wait_update(int debugfs_fd, enum > psr_mode mode, igt_output_t *outp > return igt_wait(!psr_active_check(debugfs_fd, mode, output), > 500, 10); > } > > -static ssize_t psr_write(int debugfs_fd, const char *buf) > +static ssize_t psr_write(int debugfs_fd, const char *buf, > igt_output_t *output) > { > + /* > + * FIXME: Currently we don't have separate psr_debug file for > each output. > + * so, we are using i915_edp_psr_debug file for all outputs. > + * Later we need to add support for separate psr_debug file > for each output. > + */ > return igt_sysfs_write(debugfs_fd, "i915_edp_psr_debug", buf, > - strlen(buf)); > + strlen(buf)); > } > > -static int has_psr_debugfs(int debugfs_fd) > +static int has_psr_debugfs(int debugfs_fd, igt_output_t *output) > { > int ret; > > @@ -105,7 +112,7 @@ static int has_psr_debugfs(int debugfs_fd) > * Legacy mode will return OK here, debugfs api will return - > EINVAL. > * -ENODEV is returned when PSR is unavailable. > */ > - ret = psr_write(debugfs_fd, "0xf"); > + ret = psr_write(debugfs_fd, "0xf", output); > if (ret == -EINVAL) { > errno = 0; > return 0; > @@ -113,7 +120,7 @@ static int has_psr_debugfs(int debugfs_fd) > return ret; > > /* legacy debugfs api, we enabled irqs by writing, disable > them. */ > - psr_write(debugfs_fd, "0"); > + psr_write(debugfs_fd, "0", output); > return -EINVAL; > } > > @@ -134,14 +141,14 @@ static int psr_restore_debugfs_fd = -1; > > static void restore_psr_debugfs(int sig) > { > - psr_write(psr_restore_debugfs_fd, "0"); > + psr_write(psr_restore_debugfs_fd, "0", NULL); > } > > -static bool psr_set(int device, int debugfs_fd, int mode) > +static bool psr_set(int device, int debugfs_fd, int mode, > igt_output_t *output) > { > int ret; > > - ret = has_psr_debugfs(debugfs_fd); > + ret = has_psr_debugfs(debugfs_fd, output); > if (ret == -ENODEV) { > igt_skip("PSR not available\n"); > return false; > @@ -179,7 +186,7 @@ static bool psr_set(int device, int debugfs_fd, > int mode) > debug_val = "0x1"; > } > > - ret = psr_write(debugfs_fd, debug_val); > + ret = psr_write(debugfs_fd, debug_val, output); > igt_require_f(ret > 0, "PSR2 SF feature not > available\n"); > } > > @@ -193,15 +200,15 @@ static bool psr_set(int device, int debugfs_fd, > int mode) > return ret; > } > > -bool psr_enable(int device, int debugfs_fd, enum psr_mode mode) > +bool psr_enable(int device, int debugfs_fd, enum psr_mode mode, > igt_output_t *output) > { > - return psr_set(device, debugfs_fd, mode); > + return psr_set(device, debugfs_fd, mode, output); > } > > -bool psr_disable(int device, int debugfs_fd) > +bool psr_disable(int device, int debugfs_fd, igt_output_t *output) > { > /* Any mode different than PSR_MODE_1/2 will disable PSR */ > - return psr_set(device, debugfs_fd, -1); > + return psr_set(device, debugfs_fd, -1, output); > } > > bool psr_sink_support(int device, int debugfs_fd, enum psr_mode > mode, igt_output_t *output) > @@ -211,11 +218,7 @@ bool psr_sink_support(int device, int > debugfs_fd, enum psr_mode mode, igt_output > char buf[PSR_STATUS_MAX_LEN]; > int ret; > > - if (output) > - sprintf(debugfs_file, "%s/i915_psr_status", output- > >name); > - else > - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); > - > + SET_DEBUGFS_PATH(output, debugfs_file); > ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, > sizeof(buf)); > if (ret < 1) > @@ -305,7 +308,7 @@ void psr_print_debugfs(int debugfs_fd) > igt_info("%s", buf); > } > > -bool i915_psr2_selective_fetch_check(int drm_fd) > +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t > *output) > { > int debugfs_fd; > bool ret; > @@ -314,7 +317,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) > return false; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - ret = psr2_selective_fetch_check(debugfs_fd); > + ret = psr2_selective_fetch_check(debugfs_fd, output); > close(debugfs_fd); > > return ret; > @@ -331,7 +334,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) > * Returns: > * True if PSR mode changed to PSR1, false otherwise. > */ > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd) > +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) > { > int debugfs_fd; > bool ret = false; > @@ -340,8 +343,8 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) > return ret; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - if (psr2_selective_fetch_check(debugfs_fd)) { > - psr_set(drm_fd, debugfs_fd, PSR_MODE_1); > + if (psr2_selective_fetch_check(debugfs_fd, output)) { > + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); > ret = true; > } > > @@ -355,12 +358,12 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) > * Restore PSR2 selective fetch after tests were executed, this > function should > * only be called if i915_psr2_sel_fetch_to_psr1() returned true. > */ > -void i915_psr2_sel_fetch_restore(int drm_fd) > +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) > { > int debugfs_fd; > > debugfs_fd = igt_debugfs_dir(drm_fd); > - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH); > + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); > close(debugfs_fd); > } > > @@ -369,16 +372,17 @@ void i915_psr2_sel_fetch_restore(int drm_fd) > * > * Return the current PSR mode. > */ > -enum psr_mode psr_get_mode(int debugfs_fd) > +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) > { > char buf[PSR_STATUS_MAX_LEN]; > + char debugfs_file[128] = {0}; > int ret; > > - > - ret = igt_debugfs_simple_read(debugfs_fd, > "i915_edp_psr_status", buf, > + SET_DEBUGFS_PATH(output, debugfs_file); > + ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, > sizeof(buf)); > if (ret < 0) { > - igt_info("Could not read i915_edp_psr_status: %s\n", > + igt_info("Could not read psr status: %s\n", > strerror(-ret)); > return PSR_DISABLED; > } > diff --git a/lib/igt_psr.h b/lib/igt_psr.h > index 82a4e8c5e..372bef2b2 100644 > --- a/lib/igt_psr.h > +++ b/lib/igt_psr.h > @@ -46,21 +46,21 @@ enum fbc_mode { > }; > > bool psr_disabled_check(int debugfs_fd); > -bool psr2_selective_fetch_check(int debugfs_fd); > +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t > *output); > bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t > *output); > bool psr_wait_update(int debugfs_fd, enum psr_mode mode, > igt_output_t *output); > bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, > igt_output_t *output); > -bool psr_enable(int device, int debugfs_fd, enum psr_mode); > -bool psr_disable(int device, int debugfs_fd); > +bool psr_enable(int device, int debugfs_fd, enum psr_mode, > igt_output_t *output); > +bool psr_disable(int device, int debugfs_fd, igt_output_t *output); > bool psr_sink_support(int device, int debugfs_fd, enum psr_mode > mode, igt_output_t *output); > bool psr2_wait_su(int debugfs_fd, uint16_t *num_su_blocks); > void psr_print_debugfs(int debugfs_fd); > -enum psr_mode psr_get_mode(int debugfs_fd); > +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output); > > -bool i915_psr2_selective_fetch_check(int drm_fd); > +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t > *output); > > -bool i915_psr2_sel_fetch_to_psr1(int drm_fd); > -void i915_psr2_sel_fetch_restore(int drm_fd); > +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output); > +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); > bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); > > #endif > diff --git a/tests/intel/kms_dirtyfb.c b/tests/intel/kms_dirtyfb.c > index 26b82e50a..c2411c824 100644 > --- a/tests/intel/kms_dirtyfb.c > +++ b/tests/intel/kms_dirtyfb.c > @@ -127,7 +127,7 @@ static void enable_feature(data_t *data) > intel_fbc_enable(data->drm_fd); > break; > case FEATURE_PSR: > - psr_enable(data->drm_fd, data->debugfs_fd, > PSR_MODE_1); > + psr_enable(data->drm_fd, data->debugfs_fd, > PSR_MODE_1, NULL); > break; > case FEATURE_DRRS: > intel_drrs_enable(data->drm_fd, data->pipe); > @@ -167,7 +167,7 @@ static void check_feature(data_t *data) > static void disable_features(data_t *data) > { > intel_fbc_disable(data->drm_fd); > - psr_disable(data->drm_fd, data->debugfs_fd); > + psr_disable(data->drm_fd, data->debugfs_fd, NULL); > intel_drrs_disable(data->drm_fd, data->pipe); > } > > diff --git a/tests/intel/kms_fbcon_fbt.c > b/tests/intel/kms_fbcon_fbt.c > index 90484dccf..71e42f19c 100644 > --- a/tests/intel/kms_fbcon_fbt.c > +++ b/tests/intel/kms_fbcon_fbt.c > @@ -277,7 +277,7 @@ static void disable_features(int device, int > debugfs_fd) > { > igt_set_module_param_int(device, "enable_fbc", 0); > if (psr_sink_support(device, debugfs_fd, PSR_MODE_1, NULL)) > - psr_disable(device, debugfs_fd); > + psr_disable(device, debugfs_fd, NULL); > } > > static inline void fbc_modparam_enable(int device, int debugfs_fd) > @@ -287,7 +287,7 @@ static inline void fbc_modparam_enable(int > device, int debugfs_fd) > > static inline void psr_debugfs_enable(int device, int debugfs_fd) > { > - psr_enable(device, debugfs_fd, PSR_MODE_1); > + psr_enable(device, debugfs_fd, PSR_MODE_1, NULL); > } > > static void fbc_skips_on_fbcon(int debugfs_fd) > diff --git a/tests/intel/kms_frontbuffer_tracking.c > b/tests/intel/kms_frontbuffer_tracking.c > index 912cca3f8..023843161 100644 > --- a/tests/intel/kms_frontbuffer_tracking.c > +++ b/tests/intel/kms_frontbuffer_tracking.c > @@ -2234,7 +2234,7 @@ static bool disable_features(const struct > test_mode *t) > intel_fbc_disable(drm.fd); > intel_drrs_disable(drm.fd, prim_mode_params.pipe); > > - return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : > false; > + return psr.can_test ? psr_disable(drm.fd, drm.debugfs, NULL) > : false; > } > > static void *busy_thread_func(void *data) > @@ -2867,7 +2867,7 @@ static bool enable_features_for_test(const > struct test_mode *t) > if (t->feature & FEATURE_FBC) > intel_fbc_enable(drm.fd); > if (t->feature & FEATURE_PSR) > - ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1); > + ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1, > NULL); > if (t->feature & FEATURE_DRRS) > intel_drrs_enable(drm.fd, prim_mode_params.pipe); > > diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c > index 0d5824e67..7deebf83d 100644 > --- a/tests/intel/kms_pm_dc.c > +++ b/tests/intel/kms_pm_dc.c > @@ -362,7 +362,7 @@ static void require_dc_counter(int debugfs_fd, > int dc_flag) > static void setup_dc3co(data_t *data) > { > data->op_psr_mode = PSR_MODE_2; > - psr_enable(data->drm_fd, data->debugfs_fd, data- > >op_psr_mode); > + psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, > NULL); > igt_require_f(psr_wait_entry(data->debugfs_fd, data- > >op_psr_mode, NULL), > "PSR2 is not enabled\n"); > } > @@ -665,7 +665,7 @@ igt_main > igt_require(psr_sink_support(data.drm_fd, > data.debugfs_fd, > PSR_MODE_1, NULL)); > data.op_psr_mode = PSR_MODE_1; > - psr_enable(data.drm_fd, data.debugfs_fd, > data.op_psr_mode); > + psr_enable(data.drm_fd, data.debugfs_fd, > data.op_psr_mode, NULL); > test_dc_state_psr(&data, CHECK_DC5); > } > > @@ -675,7 +675,7 @@ igt_main > igt_require(psr_sink_support(data.drm_fd, > data.debugfs_fd, > PSR_MODE_1, NULL)); > data.op_psr_mode = PSR_MODE_1; > - psr_enable(data.drm_fd, data.debugfs_fd, > data.op_psr_mode); > + psr_enable(data.drm_fd, data.debugfs_fd, > data.op_psr_mode, NULL); > igt_require_f(igt_pm_pc8_plus_residencies_enabled(dat > a.msr_fd), > "PC8+ residencies not supported\n"); > if (intel_display_ver(data.devid) >= 14) > diff --git a/tests/intel/kms_psr.c b/tests/intel/kms_psr.c > index 521d4c708..3822b3081 100644 > --- a/tests/intel/kms_psr.c > +++ b/tests/intel/kms_psr.c > @@ -519,7 +519,7 @@ static bool psr_enable_if_enabled(data_t *data) > igt_skip("enable_psr modparam doesn't allow psr mode > %d\n", > data->op_psr_mode); > > - return psr_enable(data->drm_fd, data->debugfs_fd, data- > >op_psr_mode); > + return psr_enable(data->drm_fd, data->debugfs_fd, data- > >op_psr_mode, data->output); > } > > static inline void manual(const char *expected) > @@ -658,6 +658,7 @@ static void test_cleanup(data_t *data) > > igt_remove_fb(data->drm_fd, &data->fb_green); > igt_remove_fb(data->drm_fd, &data->fb_white); > + psr_disable(data->drm_fd, data->debugfs_fd, data->output); > } > > static void setup_test_plane(data_t *data, int test_plane) > @@ -976,7 +977,6 @@ igt_main > } > > igt_fixture { > - psr_disable(data.drm_fd, data.debugfs_fd); > > close(data.debugfs_fd); > buf_ops_destroy(data.bops); > diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c > index ecf9ad77f..0fb300161 100644 > --- a/tests/intel/kms_psr2_sf.c > +++ b/tests/intel/kms_psr2_sf.c > @@ -1014,7 +1014,7 @@ igt_main > > /* Test if PSR2 can be enabled */ > igt_require_f(psr_enable(data.drm_fd, > - data.debugfs_fd, > PSR_MODE_2_SEL_FETCH), > + data.debugfs_fd, > PSR_MODE_2_SEL_FETCH, NULL), > "Error enabling PSR2\n"); > > data.damage_area_count = MAX_DAMAGE_AREAS; > @@ -1026,9 +1026,6 @@ igt_main > igt_info("Big framebuffer size %dx%d\n", > data.big_fb_width, data.big_fb_height); > > - > igt_require_f(psr2_selective_fetch_check(data.debugfs_f > d), > - "PSR2 selective fetch not enabled\n"); > - > for_each_pipe_with_valid_output(&data.display, > data.pipe, data.output) { > coexist_features[n_pipes] = 0; > if (check_psr2_support(&data)) { > diff --git a/tests/intel/kms_psr2_su.c b/tests/intel/kms_psr2_su.c > index 936b5beb3..437ee36f6 100644 > --- a/tests/intel/kms_psr2_su.c > +++ b/tests/intel/kms_psr2_su.c > @@ -338,7 +338,7 @@ igt_main > > /* Test if PSR2 can be enabled */ > igt_require_f(psr_enable(data.drm_fd, > - data.debugfs_fd, > PSR_MODE_2), > + data.debugfs_fd, PSR_MODE_2, > NULL), > "Error enabling PSR2\n"); > data.op = FRONTBUFFER; > data.format = DRM_FORMAT_XRGB8888; > diff --git a/tests/intel/kms_psr_stress_test.c > b/tests/intel/kms_psr_stress_test.c > index 7aea8e8a5..bca3bd513 100644 > --- a/tests/intel/kms_psr_stress_test.c > +++ b/tests/intel/kms_psr_stress_test.c > @@ -230,7 +230,7 @@ static void prepare(data_t *data) > r = timerfd_settime(data->completed_timerfd, 0, &interval, > NULL); > igt_require_f(r != -1, "Error setting completed_timerfd\n"); > > - data->initial_state = psr_get_mode(data->debugfs_fd); > + data->initial_state = psr_get_mode(data->debugfs_fd, NULL); > igt_require(data->initial_state != PSR_DISABLED); > igt_require(psr_wait_entry(data->debugfs_fd, data- > >initial_state, NULL)); > } > @@ -343,7 +343,7 @@ static void run(data_t *data) > } > > /* Check if after all this stress the PSR is still in the > same state */ > - igt_assert(psr_get_mode(data->debugfs_fd) == data- > >initial_state); > + igt_assert(psr_get_mode(data->debugfs_fd, NULL) == data- > >initial_state); > } > > igt_main > diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c > index a0349fa03..2895168f7 100644 > --- a/tests/kms_async_flips.c > +++ b/tests/kms_async_flips.c > @@ -391,7 +391,7 @@ static void test_cursor(data_t *data) > * necessary, causing the async flip to fail because async > flip is not > * supported in cursor plane. > */ > - igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd), > + igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd, > NULL), > "PSR2 sel fetch causes cursor to be added to > primary plane " \ > "pages flips and async flip is not supported in > cursor\n"); > > @@ -704,7 +704,7 @@ igt_main > * necessary, causing the async flip to fail because > async flip is not > * supported in cursor plane. > */ > - > igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_ > fd), > + igt_skip_on_f(i915_psr2_selective_fetch_check(data.dr > m_fd, NULL), > "PSR2 sel fetch causes cursor to be > added to primary plane " \ > "pages flips and async flip is not > supported in cursor\n"); > > diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c > index 0017659d4..a430f735a 100644 > --- a/tests/kms_cursor_legacy.c > +++ b/tests/kms_cursor_legacy.c > @@ -1849,7 +1849,7 @@ igt_main > * page flip with cursor legacy APIS when Intel's > PSR2 selective > * fetch is enabled, so switching PSR1 for this whole > test. > */ > - intel_psr2_restore = > i915_psr2_sel_fetch_to_psr1(display.drm_fd); > + intel_psr2_restore = > i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); > } > > igt_describe("Test checks how many cursor updates we can fit > between vblanks " > @@ -2074,7 +2074,7 @@ igt_main > > igt_fixture { > if (intel_psr2_restore) > - i915_psr2_sel_fetch_restore(display.drm_fd); > + i915_psr2_sel_fetch_restore(display.drm_fd, > NULL); > igt_display_fini(&display); > drm_close_driver(display.drm_fd); > } ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf @ 2024-02-21 9:01 Kunal Joshi 2024-02-21 9:01 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi 0 siblings, 1 reply; 22+ messages in thread From: Kunal Joshi @ 2024-02-21 9:01 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi kmd series [1] adds supports for panel replay selective fetch, modify lib and kms_psr2_sf to extend kms_psr2_sf tests to validate panel replay selective fetch as well. [1] https://patchwork.freedesktop.org/patch/575163/?series=128193&rev=3 Kunal Joshi (3): lib/igt_psr: modify library to support multiple PSR/PR outputs lib/igt_psr: add support for PR selective update tests/intel/kms_psr2_sf: extend tests for panel replay sf lib/igt_psr.c | 90 ++++++----- lib/igt_psr.h | 14 +- tests/intel/kms_dirtyfb.c | 4 +- tests/intel/kms_fbcon_fbt.c | 4 +- tests/intel/kms_frontbuffer_tracking.c | 4 +- tests/intel/kms_pm_dc.c | 6 +- tests/intel/kms_psr.c | 4 +- tests/intel/kms_psr2_sf.c | 200 ++++++++++++++++++------- tests/intel/kms_psr2_su.c | 2 +- tests/intel/kms_psr_stress_test.c | 4 +- tests/kms_async_flips.c | 4 +- tests/kms_cursor_legacy.c | 4 +- 12 files changed, 219 insertions(+), 121 deletions(-) -- 2.25.1 ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs 2024-02-21 9:01 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi @ 2024-02-21 9:01 ` Kunal Joshi 0 siblings, 0 replies; 22+ messages in thread From: Kunal Joshi @ 2024-02-21 9:01 UTC (permalink / raw) To: igt-dev; +Cc: Kunal Joshi, Jouni Högander, Animesh Manna, Arun R Murthy We can have multiple panels connected to the system so PSR information should be exposed per output. changes provide support for multiple PSR/PR to be tested simultaneously. v2: Use macro instead of function (Jouni) v3: keep psr_enable in igt_fixture (Jouni) Cc: Jouni Högander <jouni.hogander@intel.com> Cc: Animesh Manna <animesh.manna@intel.com> Cc: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Kunal Joshi <kunal1.joshi@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> --- lib/igt_psr.c | 76 ++++++++++++++------------ lib/igt_psr.h | 14 ++--- tests/intel/kms_dirtyfb.c | 4 +- tests/intel/kms_fbcon_fbt.c | 4 +- tests/intel/kms_frontbuffer_tracking.c | 4 +- tests/intel/kms_pm_dc.c | 6 +- tests/intel/kms_psr.c | 4 +- tests/intel/kms_psr2_sf.c | 5 +- tests/intel/kms_psr2_su.c | 2 +- tests/intel/kms_psr_stress_test.c | 4 +- tests/kms_async_flips.c | 4 +- tests/kms_cursor_legacy.c | 4 +- 12 files changed, 66 insertions(+), 65 deletions(-) diff --git a/lib/igt_psr.c b/lib/igt_psr.c index ac214fcfc..cad8cce05 100644 --- a/lib/igt_psr.c +++ b/lib/igt_psr.c @@ -27,6 +27,10 @@ #include "igt_sysfs.h" #include <errno.h> +#define SET_DEBUGFS_PATH(output, path) \ + sprintf(path, "%s%s%s", output ? output->name : "", output ? "/" : "", \ + output ? "i915_psr_status" : "i915_edp_psr_status") + bool psr_disabled_check(int debugfs_fd) { char buf[PSR_STATUS_MAX_LEN]; @@ -37,11 +41,13 @@ bool psr_disabled_check(int debugfs_fd) return strstr(buf, "PSR mode: disabled\n"); } -bool psr2_selective_fetch_check(int debugfs_fd) +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output) { char buf[PSR_STATUS_MAX_LEN]; + char debugfs_file[128] = {0}; - igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf, + SET_DEBUGFS_PATH(output, debugfs_file); + igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); return strstr(buf, "PSR2 selective fetch: enabled"); @@ -54,11 +60,7 @@ static bool psr_active_check(int debugfs_fd, enum psr_mode mode, igt_output_t *o const char *state = (mode == PSR_MODE_1 || mode == PR_MODE) ? "SRDENT" : "DEEP_SLEEP"; int ret; - if (output) - sprintf(debugfs_file, "%s/i915_psr_status", output->name); - else - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); - + SET_DEBUGFS_PATH(output, debugfs_file); ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); if (ret < 0) { @@ -90,13 +92,18 @@ bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *outp return igt_wait(!psr_active_check(debugfs_fd, mode, output), 500, 10); } -static ssize_t psr_write(int debugfs_fd, const char *buf) +static ssize_t psr_write(int debugfs_fd, const char *buf, igt_output_t *output) { + /* + * FIXME: Currently we don't have separate psr_debug file for each output. + * so, we are using i915_edp_psr_debug file for all outputs. + * Later we need to add support for separate psr_debug file for each output. + */ return igt_sysfs_write(debugfs_fd, "i915_edp_psr_debug", buf, - strlen(buf)); + strlen(buf)); } -static int has_psr_debugfs(int debugfs_fd) +static int has_psr_debugfs(int debugfs_fd, igt_output_t *output) { int ret; @@ -105,7 +112,7 @@ static int has_psr_debugfs(int debugfs_fd) * Legacy mode will return OK here, debugfs api will return -EINVAL. * -ENODEV is returned when PSR is unavailable. */ - ret = psr_write(debugfs_fd, "0xf"); + ret = psr_write(debugfs_fd, "0xf", output); if (ret == -EINVAL) { errno = 0; return 0; @@ -113,7 +120,7 @@ static int has_psr_debugfs(int debugfs_fd) return ret; /* legacy debugfs api, we enabled irqs by writing, disable them. */ - psr_write(debugfs_fd, "0"); + psr_write(debugfs_fd, "0", output); return -EINVAL; } @@ -134,14 +141,14 @@ static int psr_restore_debugfs_fd = -1; static void restore_psr_debugfs(int sig) { - psr_write(psr_restore_debugfs_fd, "0"); + psr_write(psr_restore_debugfs_fd, "0", NULL); } -static bool psr_set(int device, int debugfs_fd, int mode) +static bool psr_set(int device, int debugfs_fd, int mode, igt_output_t *output) { int ret; - ret = has_psr_debugfs(debugfs_fd); + ret = has_psr_debugfs(debugfs_fd, output); if (ret == -ENODEV) { igt_skip("PSR not available\n"); return false; @@ -179,7 +186,7 @@ static bool psr_set(int device, int debugfs_fd, int mode) debug_val = "0x1"; } - ret = psr_write(debugfs_fd, debug_val); + ret = psr_write(debugfs_fd, debug_val, output); igt_require_f(ret > 0, "PSR2 SF feature not available\n"); } @@ -193,15 +200,15 @@ static bool psr_set(int device, int debugfs_fd, int mode) return ret; } -bool psr_enable(int device, int debugfs_fd, enum psr_mode mode) +bool psr_enable(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output) { - return psr_set(device, debugfs_fd, mode); + return psr_set(device, debugfs_fd, mode, output); } -bool psr_disable(int device, int debugfs_fd) +bool psr_disable(int device, int debugfs_fd, igt_output_t *output) { /* Any mode different than PSR_MODE_1/2 will disable PSR */ - return psr_set(device, debugfs_fd, -1); + return psr_set(device, debugfs_fd, -1, output); } bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output) @@ -211,11 +218,7 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output char buf[PSR_STATUS_MAX_LEN]; int ret; - if (output) - sprintf(debugfs_file, "%s/i915_psr_status", output->name); - else - sprintf(debugfs_file, "%s", "i915_edp_psr_status"); - + SET_DEBUGFS_PATH(output, debugfs_file); ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); if (ret < 1) @@ -305,7 +308,7 @@ void psr_print_debugfs(int debugfs_fd) igt_info("%s", buf); } -bool i915_psr2_selective_fetch_check(int drm_fd) +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output) { int debugfs_fd; bool ret; @@ -314,7 +317,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) return false; debugfs_fd = igt_debugfs_dir(drm_fd); - ret = psr2_selective_fetch_check(debugfs_fd); + ret = psr2_selective_fetch_check(debugfs_fd, output); close(debugfs_fd); return ret; @@ -331,7 +334,7 @@ bool i915_psr2_selective_fetch_check(int drm_fd) * Returns: * True if PSR mode changed to PSR1, false otherwise. */ -bool i915_psr2_sel_fetch_to_psr1(int drm_fd) +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output) { int debugfs_fd; bool ret = false; @@ -340,8 +343,8 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) return ret; debugfs_fd = igt_debugfs_dir(drm_fd); - if (psr2_selective_fetch_check(debugfs_fd)) { - psr_set(drm_fd, debugfs_fd, PSR_MODE_1); + if (psr2_selective_fetch_check(debugfs_fd, output)) { + psr_set(drm_fd, debugfs_fd, PSR_MODE_1, output); ret = true; } @@ -355,12 +358,12 @@ bool i915_psr2_sel_fetch_to_psr1(int drm_fd) * Restore PSR2 selective fetch after tests were executed, this function should * only be called if i915_psr2_sel_fetch_to_psr1() returned true. */ -void i915_psr2_sel_fetch_restore(int drm_fd) +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output) { int debugfs_fd; debugfs_fd = igt_debugfs_dir(drm_fd); - psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH); + psr_set(drm_fd, debugfs_fd, PSR_MODE_2_SEL_FETCH, output); close(debugfs_fd); } @@ -369,16 +372,17 @@ void i915_psr2_sel_fetch_restore(int drm_fd) * * Return the current PSR mode. */ -enum psr_mode psr_get_mode(int debugfs_fd) +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output) { char buf[PSR_STATUS_MAX_LEN]; + char debugfs_file[128] = {0}; int ret; - - ret = igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf, + SET_DEBUGFS_PATH(output, debugfs_file); + ret = igt_debugfs_simple_read(debugfs_fd, debugfs_file, buf, sizeof(buf)); if (ret < 0) { - igt_info("Could not read i915_edp_psr_status: %s\n", + igt_info("Could not read psr status: %s\n", strerror(-ret)); return PSR_DISABLED; } diff --git a/lib/igt_psr.h b/lib/igt_psr.h index 82a4e8c5e..372bef2b2 100644 --- a/lib/igt_psr.h +++ b/lib/igt_psr.h @@ -46,21 +46,21 @@ enum fbc_mode { }; bool psr_disabled_check(int debugfs_fd); -bool psr2_selective_fetch_check(int debugfs_fd); +bool psr2_selective_fetch_check(int debugfs_fd, igt_output_t *output); bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output); -bool psr_enable(int device, int debugfs_fd, enum psr_mode); -bool psr_disable(int device, int debugfs_fd); +bool psr_enable(int device, int debugfs_fd, enum psr_mode, igt_output_t *output); +bool psr_disable(int device, int debugfs_fd, igt_output_t *output); bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output_t *output); bool psr2_wait_su(int debugfs_fd, uint16_t *num_su_blocks); void psr_print_debugfs(int debugfs_fd); -enum psr_mode psr_get_mode(int debugfs_fd); +enum psr_mode psr_get_mode(int debugfs_fd, igt_output_t *output); -bool i915_psr2_selective_fetch_check(int drm_fd); +bool i915_psr2_selective_fetch_check(int drm_fd, igt_output_t *output); -bool i915_psr2_sel_fetch_to_psr1(int drm_fd); -void i915_psr2_sel_fetch_restore(int drm_fd); +bool i915_psr2_sel_fetch_to_psr1(int drm_fd, igt_output_t *output); +void i915_psr2_sel_fetch_restore(int drm_fd, igt_output_t *output); bool is_psr_enable_possible(int drm_fd, enum psr_mode mode); #endif diff --git a/tests/intel/kms_dirtyfb.c b/tests/intel/kms_dirtyfb.c index 26b82e50a..c2411c824 100644 --- a/tests/intel/kms_dirtyfb.c +++ b/tests/intel/kms_dirtyfb.c @@ -127,7 +127,7 @@ static void enable_feature(data_t *data) intel_fbc_enable(data->drm_fd); break; case FEATURE_PSR: - psr_enable(data->drm_fd, data->debugfs_fd, PSR_MODE_1); + psr_enable(data->drm_fd, data->debugfs_fd, PSR_MODE_1, NULL); break; case FEATURE_DRRS: intel_drrs_enable(data->drm_fd, data->pipe); @@ -167,7 +167,7 @@ static void check_feature(data_t *data) static void disable_features(data_t *data) { intel_fbc_disable(data->drm_fd); - psr_disable(data->drm_fd, data->debugfs_fd); + psr_disable(data->drm_fd, data->debugfs_fd, NULL); intel_drrs_disable(data->drm_fd, data->pipe); } diff --git a/tests/intel/kms_fbcon_fbt.c b/tests/intel/kms_fbcon_fbt.c index 90484dccf..71e42f19c 100644 --- a/tests/intel/kms_fbcon_fbt.c +++ b/tests/intel/kms_fbcon_fbt.c @@ -277,7 +277,7 @@ static void disable_features(int device, int debugfs_fd) { igt_set_module_param_int(device, "enable_fbc", 0); if (psr_sink_support(device, debugfs_fd, PSR_MODE_1, NULL)) - psr_disable(device, debugfs_fd); + psr_disable(device, debugfs_fd, NULL); } static inline void fbc_modparam_enable(int device, int debugfs_fd) @@ -287,7 +287,7 @@ static inline void fbc_modparam_enable(int device, int debugfs_fd) static inline void psr_debugfs_enable(int device, int debugfs_fd) { - psr_enable(device, debugfs_fd, PSR_MODE_1); + psr_enable(device, debugfs_fd, PSR_MODE_1, NULL); } static void fbc_skips_on_fbcon(int debugfs_fd) diff --git a/tests/intel/kms_frontbuffer_tracking.c b/tests/intel/kms_frontbuffer_tracking.c index 912cca3f8..023843161 100644 --- a/tests/intel/kms_frontbuffer_tracking.c +++ b/tests/intel/kms_frontbuffer_tracking.c @@ -2234,7 +2234,7 @@ static bool disable_features(const struct test_mode *t) intel_fbc_disable(drm.fd); intel_drrs_disable(drm.fd, prim_mode_params.pipe); - return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : false; + return psr.can_test ? psr_disable(drm.fd, drm.debugfs, NULL) : false; } static void *busy_thread_func(void *data) @@ -2867,7 +2867,7 @@ static bool enable_features_for_test(const struct test_mode *t) if (t->feature & FEATURE_FBC) intel_fbc_enable(drm.fd); if (t->feature & FEATURE_PSR) - ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1); + ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1, NULL); if (t->feature & FEATURE_DRRS) intel_drrs_enable(drm.fd, prim_mode_params.pipe); diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c index 0d5824e67..7deebf83d 100644 --- a/tests/intel/kms_pm_dc.c +++ b/tests/intel/kms_pm_dc.c @@ -362,7 +362,7 @@ static void require_dc_counter(int debugfs_fd, int dc_flag) static void setup_dc3co(data_t *data) { data->op_psr_mode = PSR_MODE_2; - psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode); + psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, NULL); igt_require_f(psr_wait_entry(data->debugfs_fd, data->op_psr_mode, NULL), "PSR2 is not enabled\n"); } @@ -665,7 +665,7 @@ igt_main igt_require(psr_sink_support(data.drm_fd, data.debugfs_fd, PSR_MODE_1, NULL)); data.op_psr_mode = PSR_MODE_1; - psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode); + psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode, NULL); test_dc_state_psr(&data, CHECK_DC5); } @@ -675,7 +675,7 @@ igt_main igt_require(psr_sink_support(data.drm_fd, data.debugfs_fd, PSR_MODE_1, NULL)); data.op_psr_mode = PSR_MODE_1; - psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode); + psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode, NULL); igt_require_f(igt_pm_pc8_plus_residencies_enabled(data.msr_fd), "PC8+ residencies not supported\n"); if (intel_display_ver(data.devid) >= 14) diff --git a/tests/intel/kms_psr.c b/tests/intel/kms_psr.c index 521d4c708..3822b3081 100644 --- a/tests/intel/kms_psr.c +++ b/tests/intel/kms_psr.c @@ -519,7 +519,7 @@ static bool psr_enable_if_enabled(data_t *data) igt_skip("enable_psr modparam doesn't allow psr mode %d\n", data->op_psr_mode); - return psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode); + return psr_enable(data->drm_fd, data->debugfs_fd, data->op_psr_mode, data->output); } static inline void manual(const char *expected) @@ -658,6 +658,7 @@ static void test_cleanup(data_t *data) igt_remove_fb(data->drm_fd, &data->fb_green); igt_remove_fb(data->drm_fd, &data->fb_white); + psr_disable(data->drm_fd, data->debugfs_fd, data->output); } static void setup_test_plane(data_t *data, int test_plane) @@ -976,7 +977,6 @@ igt_main } igt_fixture { - psr_disable(data.drm_fd, data.debugfs_fd); close(data.debugfs_fd); buf_ops_destroy(data.bops); diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c index ecf9ad77f..0fb300161 100644 --- a/tests/intel/kms_psr2_sf.c +++ b/tests/intel/kms_psr2_sf.c @@ -1014,7 +1014,7 @@ igt_main /* Test if PSR2 can be enabled */ igt_require_f(psr_enable(data.drm_fd, - data.debugfs_fd, PSR_MODE_2_SEL_FETCH), + data.debugfs_fd, PSR_MODE_2_SEL_FETCH, NULL), "Error enabling PSR2\n"); data.damage_area_count = MAX_DAMAGE_AREAS; @@ -1026,9 +1026,6 @@ igt_main igt_info("Big framebuffer size %dx%d\n", data.big_fb_width, data.big_fb_height); - igt_require_f(psr2_selective_fetch_check(data.debugfs_fd), - "PSR2 selective fetch not enabled\n"); - for_each_pipe_with_valid_output(&data.display, data.pipe, data.output) { coexist_features[n_pipes] = 0; if (check_psr2_support(&data)) { diff --git a/tests/intel/kms_psr2_su.c b/tests/intel/kms_psr2_su.c index 936b5beb3..437ee36f6 100644 --- a/tests/intel/kms_psr2_su.c +++ b/tests/intel/kms_psr2_su.c @@ -338,7 +338,7 @@ igt_main /* Test if PSR2 can be enabled */ igt_require_f(psr_enable(data.drm_fd, - data.debugfs_fd, PSR_MODE_2), + data.debugfs_fd, PSR_MODE_2, NULL), "Error enabling PSR2\n"); data.op = FRONTBUFFER; data.format = DRM_FORMAT_XRGB8888; diff --git a/tests/intel/kms_psr_stress_test.c b/tests/intel/kms_psr_stress_test.c index 7aea8e8a5..bca3bd513 100644 --- a/tests/intel/kms_psr_stress_test.c +++ b/tests/intel/kms_psr_stress_test.c @@ -230,7 +230,7 @@ static void prepare(data_t *data) r = timerfd_settime(data->completed_timerfd, 0, &interval, NULL); igt_require_f(r != -1, "Error setting completed_timerfd\n"); - data->initial_state = psr_get_mode(data->debugfs_fd); + data->initial_state = psr_get_mode(data->debugfs_fd, NULL); igt_require(data->initial_state != PSR_DISABLED); igt_require(psr_wait_entry(data->debugfs_fd, data->initial_state, NULL)); } @@ -343,7 +343,7 @@ static void run(data_t *data) } /* Check if after all this stress the PSR is still in the same state */ - igt_assert(psr_get_mode(data->debugfs_fd) == data->initial_state); + igt_assert(psr_get_mode(data->debugfs_fd, NULL) == data->initial_state); } igt_main diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c index a0349fa03..2895168f7 100644 --- a/tests/kms_async_flips.c +++ b/tests/kms_async_flips.c @@ -391,7 +391,7 @@ static void test_cursor(data_t *data) * necessary, causing the async flip to fail because async flip is not * supported in cursor plane. */ - igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd), + igt_skip_on_f(i915_psr2_selective_fetch_check(data->drm_fd, NULL), "PSR2 sel fetch causes cursor to be added to primary plane " \ "pages flips and async flip is not supported in cursor\n"); @@ -704,7 +704,7 @@ igt_main * necessary, causing the async flip to fail because async flip is not * supported in cursor plane. */ - igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_fd), + igt_skip_on_f(i915_psr2_selective_fetch_check(data.drm_fd, NULL), "PSR2 sel fetch causes cursor to be added to primary plane " \ "pages flips and async flip is not supported in cursor\n"); diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c index 0017659d4..a430f735a 100644 --- a/tests/kms_cursor_legacy.c +++ b/tests/kms_cursor_legacy.c @@ -1849,7 +1849,7 @@ igt_main * page flip with cursor legacy APIS when Intel's PSR2 selective * fetch is enabled, so switching PSR1 for this whole test. */ - intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd); + intel_psr2_restore = i915_psr2_sel_fetch_to_psr1(display.drm_fd, NULL); } igt_describe("Test checks how many cursor updates we can fit between vblanks " @@ -2074,7 +2074,7 @@ igt_main igt_fixture { if (intel_psr2_restore) - i915_psr2_sel_fetch_restore(display.drm_fd); + i915_psr2_sel_fetch_restore(display.drm_fd, NULL); igt_display_fini(&display); drm_close_driver(display.drm_fd); } -- 2.25.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
end of thread, other threads:[~2024-02-21 8:52 UTC | newest] Thread overview: 22+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2024-02-18 9:17 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi 2024-02-18 9:17 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi 2024-02-19 7:45 ` Hogander, Jouni 2024-02-19 8:07 ` Joshi, Kunal1 2024-02-19 8:33 ` Hogander, Jouni 2024-02-19 8:36 ` Joshi, Kunal1 2024-02-18 9:17 ` [PATCH i-g-t 2/3] lib/igt_psr: add support for PR selective update Kunal Joshi 2024-02-19 8:00 ` Hogander, Jouni 2024-02-19 8:12 ` Joshi, Kunal1 2024-02-19 8:56 ` Hogander, Jouni 2024-02-19 9:01 ` Joshi, Kunal1 2024-02-19 10:01 ` Joshi, Kunal1 2024-02-19 10:29 ` Hogander, Jouni 2024-02-18 9:17 ` [PATCH i-g-t 3/3] tests/intel/kms_psr2_sf: extend tests for panel replay sf Kunal Joshi 2024-02-19 8:31 ` Hogander, Jouni 2024-02-18 9:36 ` ✗ GitLab.Pipeline: warning for extend psr2_sf test for pr_sf (rev5) Patchwork 2024-02-18 9:53 ` ✓ CI.xeBAT: success " Patchwork 2024-02-18 10:04 ` ✓ Fi.CI.BAT: " Patchwork 2024-02-18 11:26 ` ✗ Fi.CI.IGT: failure " Patchwork 2024-02-19 16:33 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi 2024-02-19 16:33 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi 2024-02-20 8:47 ` Hogander, Jouni 2024-02-21 9:01 [PATCH i-g-t 0/3] extend psr2_sf test for pr_sf Kunal Joshi 2024-02-21 9:01 ` [PATCH i-g-t 1/3] lib/igt_psr: modify library to support multiple PSR/PR outputs Kunal Joshi
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