* [PATCH 1/3] ARM: ep93xx: Move timer driver to the clocksource subsystem
@ 2018-09-30 21:16 Linus Walleij
2018-09-30 21:16 ` [PATCH 2/3] clocksource/driver/ep93xx: Fix up includes Linus Walleij
2018-09-30 21:16 ` [PATCH 3/3] clocksource/drivers/ep93xx: Create a state container Linus Walleij
0 siblings, 2 replies; 5+ messages in thread
From: Linus Walleij @ 2018-09-30 21:16 UTC (permalink / raw)
To: linux-arm-kernel
Before starting to expand the EP93xx timer driver to be more
self-contained and before adding device tree support, move it
over to the clocksource subsystem.
Provide a base passed in to the init function, and add a
static inline in the EP93xx soc.h local header to call down
into the timer driver. Expose the init function in a new
platform data header that can eventually go away the day
we have converted all EP93xx platforms over to use device
tree.
Also pass the IRQ as a parameter, else this will never work
with sparse IRQs.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Clocksource: please ACK this if OK so I can merge this
patch through the ARM SoC tree.
---
arch/arm/Kconfig | 2 +-
arch/arm/mach-ep93xx/Makefile | 2 +-
arch/arm/mach-ep93xx/core.c | 1 +
arch/arm/mach-ep93xx/include/mach/platform.h | 1 -
arch/arm/mach-ep93xx/soc.h | 8 ++++++++
drivers/clocksource/Kconfig | 8 ++++++++
drivers/clocksource/Makefile | 1 +
.../clocksource}/timer-ep93xx.c | 13 +++++++++----
include/linux/platform_data/timer-ep93xx.h | 7 +++++++
9 files changed, 36 insertions(+), 7 deletions(-)
rename {arch/arm/mach-ep93xx => drivers/clocksource}/timer-ep93xx.c (94%)
create mode 100644 include/linux/platform_data/timer-ep93xx.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e8cd55a5b04c..8d279e41cd9d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -375,8 +375,8 @@ config ARCH_EP93XX
select ARM_VIC
select AUTO_ZRELADDR
select CLKDEV_LOOKUP
- select CLKSRC_MMIO
select CPU_ARM920T
+ select EP93XX_TIMER
select GENERIC_CLOCKEVENTS
select GPIOLIB
help
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index 86768495f61d..6c8e4366e6cf 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -2,7 +2,7 @@
#
# Makefile for the linux kernel.
#
-obj-y := core.o clock.o timer-ep93xx.o
+obj-y := core.o clock.o
obj-$(CONFIG_EP93XX_DMA) += dma.o
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 927234d2a7ba..48b36eff0a94 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -40,6 +40,7 @@
#include <linux/random.h>
#include <mach/hardware.h>
+#include <linux/platform_data/timer-ep93xx.h>
#include <linux/platform_data/video-ep93xx.h>
#include <linux/platform_data/keypad-ep93xx.h>
#include <linux/platform_data/spi-ep93xx.h>
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index 8165d998b7fe..5c3c00f119f0 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -56,7 +56,6 @@ int ep93xx_ide_acquire_gpio(struct platform_device *pdev);
void ep93xx_ide_release_gpio(struct platform_device *pdev);
struct device *ep93xx_init_devices(void);
-extern void ep93xx_timer_init(void);
void ep93xx_restart(enum reboot_mode, const char *);
void ep93xx_init_late(void);
diff --git a/arch/arm/mach-ep93xx/soc.h b/arch/arm/mach-ep93xx/soc.h
index d20e631164cf..5d19b216e3c3 100644
--- a/arch/arm/mach-ep93xx/soc.h
+++ b/arch/arm/mach-ep93xx/soc.h
@@ -14,6 +14,9 @@
#define _EP93XX_SOC_H
#include <mach/ep93xx-regs.h>
+#include <mach/irqs.h>
+#include <linux/io.h>
+#include <linux/platform_data/timer-ep93xx.h>
/*
* EP93xx Physical Memory Map:
@@ -212,4 +215,9 @@ static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
ep93xx_devcfg_set_clear(0x00, bits);
}
+static inline void __init ep93xx_timer_init(void)
+{
+ ep93xx_timer_init_common(EP93XX_TIMER_BASE, IRQ_EP93XX_TIMER3);
+}
+
#endif /* _EP93XX_SOC_H */
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index a11f4ba98b05..7a68cd3df3dc 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -59,6 +59,14 @@ config DW_APB_TIMER_OF
select DW_APB_TIMER
select TIMER_OF
+config EP93XX_TIMER
+ bool "Cirrus Logic EP93xx timer driver" if COMPILE_TEST
+ depends on HAS_IOMEM
+ select CLKSRC_MMIO
+ help
+ Enables support for the Cirrus Logic EP93xx family
+ SoCs.
+
config FTTMR010_TIMER
bool "Faraday Technology timer driver" if COMPILE_TEST
depends on HAS_IOMEM
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index db51b2427e8a..ae6cbddb519b 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_DIGICOLOR_TIMER) += timer-digicolor.o
obj-$(CONFIG_OMAP_DM_TIMER) += timer-ti-dm.o
obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o
obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o
+obj-$(CONFIG_EP93XX_TIMER) += timer-ep93xx.o
obj-$(CONFIG_FTTMR010_TIMER) += timer-fttmr010.o
obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
obj-$(CONFIG_CLKSRC_NOMADIK_MTU) += nomadik-mtu.o
diff --git a/arch/arm/mach-ep93xx/timer-ep93xx.c b/drivers/clocksource/timer-ep93xx.c
similarity index 94%
rename from arch/arm/mach-ep93xx/timer-ep93xx.c
rename to drivers/clocksource/timer-ep93xx.c
index de998830f534..9b5e98446d77 100644
--- a/arch/arm/mach-ep93xx/timer-ep93xx.c
+++ b/drivers/clocksource/timer-ep93xx.c
@@ -7,8 +7,10 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
+#include <linux/platform_data/timer-ep93xx.h>
#include <asm/mach/time.h>
-#include "soc.h"
+
+static void __iomem *ep93xx_base;
/*************************************************************************
* Timer handling for EP93xx
@@ -28,7 +30,7 @@
* a stable 40 bit time base.
*************************************************************************
*/
-#define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
+#define EP93XX_TIMER_REG(x) (ep93xx_base + (x))
#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
@@ -124,8 +126,10 @@ static struct irqaction ep93xx_timer_irq = {
.dev_id = &ep93xx_clockevent,
};
-void __init ep93xx_timer_init(void)
+int __init ep93xx_timer_init_common(void __iomem *base, int irq)
{
+ ep93xx_base = base;
+
/* Enable and register clocksource and sched_clock on timer 4 */
writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
EP93XX_TIMER4_VALUE_HIGH);
@@ -136,9 +140,10 @@ void __init ep93xx_timer_init(void)
EP93XX_TIMER4_RATE);
/* Set up clockevent on timer 3 */
- setup_irq(IRQ_EP93XX_TIMER3, &ep93xx_timer_irq);
+ setup_irq(irq, &ep93xx_timer_irq);
clockevents_config_and_register(&ep93xx_clockevent,
EP93XX_TIMER123_RATE,
1,
0xffffffffU);
+ return 0;
}
diff --git a/include/linux/platform_data/timer-ep93xx.h b/include/linux/platform_data/timer-ep93xx.h
new file mode 100644
index 000000000000..e839e2051d81
--- /dev/null
+++ b/include/linux/platform_data/timer-ep93xx.h
@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __TIMER_EP93XX_H
+#define __TIMER_EP93XX_H
+
+extern int ep93xx_timer_init_common(void __iomem *base, int irq);
+
+#endif
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/3] clocksource/driver/ep93xx: Fix up includes
2018-09-30 21:16 [PATCH 1/3] ARM: ep93xx: Move timer driver to the clocksource subsystem Linus Walleij
@ 2018-09-30 21:16 ` Linus Walleij
2018-09-30 21:16 ` [PATCH 3/3] clocksource/drivers/ep93xx: Create a state container Linus Walleij
1 sibling, 0 replies; 5+ messages in thread
From: Linus Walleij @ 2018-09-30 21:16 UTC (permalink / raw)
To: linux-arm-kernel
Include the right interfaces for use with this driver.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Clocksource: please ACK this if OK so I can merge this
patch through the ARM SoC tree.
---
drivers/clocksource/timer-ep93xx.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/clocksource/timer-ep93xx.c b/drivers/clocksource/timer-ep93xx.c
index 9b5e98446d77..3dcc58de65ef 100644
--- a/drivers/clocksource/timer-ep93xx.c
+++ b/drivers/clocksource/timer-ep93xx.c
@@ -1,14 +1,12 @@
// SPDX-License-Identifier: GPL-2.0
#include <linux/kernel.h>
-#include <linux/init.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/sched_clock.h>
#include <linux/interrupt.h>
-#include <linux/irq.h>
#include <linux/io.h>
#include <linux/platform_data/timer-ep93xx.h>
-#include <asm/mach/time.h>
+#include <linux/slab.h>
static void __iomem *ep93xx_base;
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] clocksource/drivers/ep93xx: Create a state container
2018-09-30 21:16 [PATCH 1/3] ARM: ep93xx: Move timer driver to the clocksource subsystem Linus Walleij
2018-09-30 21:16 ` [PATCH 2/3] clocksource/driver/ep93xx: Fix up includes Linus Walleij
@ 2018-09-30 21:16 ` Linus Walleij
2018-10-01 9:22 ` Daniel Lezcano
1 sibling, 1 reply; 5+ messages in thread
From: Linus Walleij @ 2018-09-30 21:16 UTC (permalink / raw)
To: linux-arm-kernel
Create a struct to hold the clocksource state, augment
everywhere to pass this around, cut a shortcut using a
singleton for the clocksource and sched_clock callbacks
that need to be fast.
Request the IRQ in a normal way and use offsets to
read/write registers.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Clocksource: please ACK this if OK so I can merge this
patch through the ARM SoC tree.
---
drivers/clocksource/timer-ep93xx.c | 121 ++++++++++++++++-------------
1 file changed, 69 insertions(+), 52 deletions(-)
diff --git a/drivers/clocksource/timer-ep93xx.c b/drivers/clocksource/timer-ep93xx.c
index 3dcc58de65ef..2b68dd62c03f 100644
--- a/drivers/clocksource/timer-ep93xx.c
+++ b/drivers/clocksource/timer-ep93xx.c
@@ -8,8 +8,6 @@
#include <linux/platform_data/timer-ep93xx.h>
#include <linux/slab.h>
-static void __iomem *ep93xx_base;
-
/*************************************************************************
* Timer handling for EP93xx
*************************************************************************
@@ -28,109 +26,112 @@ static void __iomem *ep93xx_base;
* a stable 40 bit time base.
*************************************************************************
*/
-#define EP93XX_TIMER_REG(x) (ep93xx_base + (x))
-#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
-#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
-#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
+#define EP93XX_TIMER1_LOAD 0x00
+#define EP93XX_TIMER1_VALUE 0x04
+#define EP93XX_TIMER1_CONTROL 0x08
#define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
#define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
#define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
-#define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
-#define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
-#define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
-#define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
-#define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
-#define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
-#define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
+#define EP93XX_TIMER1_CLEAR 0x0c
+#define EP93XX_TIMER2_LOAD 0x20
+#define EP93XX_TIMER2_VALUE 0x24
+#define EP93XX_TIMER2_CONTROL 0x28
+#define EP93XX_TIMER2_CLEAR 0x2c
+#define EP93XX_TIMER4_VALUE_LOW 0x60
+#define EP93XX_TIMER4_VALUE_HIGH 0x64
#define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
-#define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
-#define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
-#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
-#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
+#define EP93XX_TIMER3_LOAD 0x80
+#define EP93XX_TIMER3_VALUE 0x84
+#define EP93XX_TIMER3_CONTROL 0x88
+#define EP93XX_TIMER3_CLEAR 0x8c
#define EP93XX_TIMER123_RATE 508469
#define EP93XX_TIMER4_RATE 983040
-static u64 notrace ep93xx_read_sched_clock(void)
-{
- u64 ret;
+struct ep93tmr {
+ void __iomem *base;
+ struct clock_event_device clkevt;
+};
- ret = readl(EP93XX_TIMER4_VALUE_LOW);
- ret |= ((u64) (readl(EP93XX_TIMER4_VALUE_HIGH) & 0xff) << 32);
- return ret;
+static struct ep93tmr *local_ep93tmr;
+
+static inline struct ep93tmr *to_ep93tmr(struct clock_event_device *evt)
+{
+ return container_of(evt, struct ep93tmr, clkevt);
}
-u64 ep93xx_clocksource_read(struct clocksource *c)
+static u64 ep93xx_clocksource_read(struct clocksource *c)
{
u64 ret;
- ret = readl(EP93XX_TIMER4_VALUE_LOW);
- ret |= ((u64) (readl(EP93XX_TIMER4_VALUE_HIGH) & 0xff) << 32);
+ ret = readl(local_ep93tmr->base + EP93XX_TIMER4_VALUE_LOW);
+ ret |= ((u64) (readl(local_ep93tmr->base + EP93XX_TIMER4_VALUE_HIGH)
+ & 0xff) << 32);
return (u64) ret;
}
+static u64 notrace ep93xx_read_sched_clock(void)
+{
+ return ep93xx_clocksource_read(NULL);
+}
+
static int ep93xx_clkevt_set_next_event(unsigned long next,
struct clock_event_device *evt)
{
+ struct ep93tmr *ep93tmr = to_ep93tmr(evt);
+
/* Default mode: periodic, off, 508 kHz */
u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
EP93XX_TIMER123_CONTROL_CLKSEL;
/* Clear timer */
- writel(tmode, EP93XX_TIMER3_CONTROL);
+ writel(tmode, ep93tmr->base + EP93XX_TIMER3_CONTROL);
/* Set next event */
- writel(next, EP93XX_TIMER3_LOAD);
+ writel(next, ep93tmr->base + EP93XX_TIMER3_LOAD);
writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
- EP93XX_TIMER3_CONTROL);
+ ep93tmr->base + EP93XX_TIMER3_CONTROL);
return 0;
}
static int ep93xx_clkevt_shutdown(struct clock_event_device *evt)
{
+ struct ep93tmr *ep93tmr = to_ep93tmr(evt);
+
/* Disable timer */
- writel(0, EP93XX_TIMER3_CONTROL);
+ writel(0, ep93tmr->base + EP93XX_TIMER3_CONTROL);
return 0;
}
-static struct clock_event_device ep93xx_clockevent = {
- .name = "timer1",
- .features = CLOCK_EVT_FEAT_ONESHOT,
- .set_state_shutdown = ep93xx_clkevt_shutdown,
- .set_state_oneshot = ep93xx_clkevt_shutdown,
- .tick_resume = ep93xx_clkevt_shutdown,
- .set_next_event = ep93xx_clkevt_set_next_event,
- .rating = 300,
-};
-
static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
{
struct clock_event_device *evt = dev_id;
+ struct ep93tmr *ep93tmr = to_ep93tmr(evt);
/* Writing any value clears the timer interrupt */
- writel(1, EP93XX_TIMER3_CLEAR);
+ writel(1, ep93tmr->base + EP93XX_TIMER3_CLEAR);
evt->event_handler(evt);
return IRQ_HANDLED;
}
-static struct irqaction ep93xx_timer_irq = {
- .name = "ep93xx timer",
- .flags = IRQF_TIMER | IRQF_IRQPOLL,
- .handler = ep93xx_timer_interrupt,
- .dev_id = &ep93xx_clockevent,
-};
-
int __init ep93xx_timer_init_common(void __iomem *base, int irq)
{
- ep93xx_base = base;
+ struct ep93tmr *tmr;
+ int ret;
+
+ tmr = kzalloc(sizeof(*tmr), GFP_KERNEL);
+ if (!tmr)
+ return -ENOMEM;
+ tmr->base = base;
+ local_ep93tmr = tmr;
/* Enable and register clocksource and sched_clock on timer 4 */
writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
- EP93XX_TIMER4_VALUE_HIGH);
+ tmr->base + EP93XX_TIMER4_VALUE_HIGH);
clocksource_mmio_init(NULL, "timer4",
EP93XX_TIMER4_RATE, 200, 40,
ep93xx_clocksource_read);
@@ -138,8 +139,24 @@ int __init ep93xx_timer_init_common(void __iomem *base, int irq)
EP93XX_TIMER4_RATE);
/* Set up clockevent on timer 3 */
- setup_irq(irq, &ep93xx_timer_irq);
- clockevents_config_and_register(&ep93xx_clockevent,
+ ret = request_irq(irq, ep93xx_timer_interrupt,
+ IRQF_TIMER | IRQF_IRQPOLL,
+ "EP93XX-TIMER3", &tmr->clkevt);
+ if (ret) {
+ pr_err("EP93XX-TIMER3 no IRQ\n");
+ return ret;
+ }
+
+ tmr->clkevt.name = "EP93XX-TIMER3";
+ tmr->clkevt.features = CLOCK_EVT_FEAT_ONESHOT;
+ tmr->clkevt.set_state_shutdown = ep93xx_clkevt_shutdown;
+ tmr->clkevt.set_state_oneshot = ep93xx_clkevt_shutdown;
+ tmr->clkevt.tick_resume = ep93xx_clkevt_shutdown;
+ tmr->clkevt.set_next_event = ep93xx_clkevt_set_next_event;
+ tmr->clkevt.cpumask = cpumask_of(0);
+ tmr->clkevt.rating = 300;
+ tmr->clkevt.irq = irq;
+ clockevents_config_and_register(&tmr->clkevt,
EP93XX_TIMER123_RATE,
1,
0xffffffffU);
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] clocksource/drivers/ep93xx: Create a state container
2018-09-30 21:16 ` [PATCH 3/3] clocksource/drivers/ep93xx: Create a state container Linus Walleij
@ 2018-10-01 9:22 ` Daniel Lezcano
2018-10-16 7:14 ` Linus Walleij
0 siblings, 1 reply; 5+ messages in thread
From: Daniel Lezcano @ 2018-10-01 9:22 UTC (permalink / raw)
To: linux-arm-kernel
On 30/09/2018 23:16, Linus Walleij wrote:
> Create a struct to hold the clocksource state, augment
> everywhere to pass this around, cut a shortcut using a
> singleton for the clocksource and sched_clock callbacks
> that need to be fast.
>
> Request the IRQ in a normal way and use offsets to
> read/write registers.
>
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> Clocksource: please ACK this if OK so I can merge this
> patch through the ARM SoC tree.
> ---
> drivers/clocksource/timer-ep93xx.c | 121 ++++++++++++++++-------------
> 1 file changed, 69 insertions(+), 52 deletions(-)
>
> diff --git a/drivers/clocksource/timer-ep93xx.c b/drivers/clocksource/timer-ep93xx.c
> index 3dcc58de65ef..2b68dd62c03f 100644
> --- a/drivers/clocksource/timer-ep93xx.c
> +++ b/drivers/clocksource/timer-ep93xx.c
> @@ -8,8 +8,6 @@
> #include <linux/platform_data/timer-ep93xx.h>
> #include <linux/slab.h>
>
> -static void __iomem *ep93xx_base;
> -
> /*************************************************************************
> * Timer handling for EP93xx
> *************************************************************************
> @@ -28,109 +26,112 @@ static void __iomem *ep93xx_base;
> * a stable 40 bit time base.
> *************************************************************************
> */
> -#define EP93XX_TIMER_REG(x) (ep93xx_base + (x))
> -#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
> -#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
> -#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
> +#define EP93XX_TIMER1_LOAD 0x00
> +#define EP93XX_TIMER1_VALUE 0x04
> +#define EP93XX_TIMER1_CONTROL 0x08
> #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
> #define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
> #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
> -#define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
> -#define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
> -#define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
> -#define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
> -#define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
> -#define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
> -#define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
> +#define EP93XX_TIMER1_CLEAR 0x0c
> +#define EP93XX_TIMER2_LOAD 0x20
> +#define EP93XX_TIMER2_VALUE 0x24
> +#define EP93XX_TIMER2_CONTROL 0x28
> +#define EP93XX_TIMER2_CLEAR 0x2c
> +#define EP93XX_TIMER4_VALUE_LOW 0x60
> +#define EP93XX_TIMER4_VALUE_HIGH 0x64
> #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
> -#define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
> -#define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
> -#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
> -#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
> +#define EP93XX_TIMER3_LOAD 0x80
> +#define EP93XX_TIMER3_VALUE 0x84
> +#define EP93XX_TIMER3_CONTROL 0x88
> +#define EP93XX_TIMER3_CLEAR 0x8c
>
> #define EP93XX_TIMER123_RATE 508469
> #define EP93XX_TIMER4_RATE 983040
>
> -static u64 notrace ep93xx_read_sched_clock(void)
> -{
> - u64 ret;
> +struct ep93tmr {
> + void __iomem *base;
> + struct clock_event_device clkevt;
> +};
Is it possible to replace by timer_of structure ?
--
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 3/3] clocksource/drivers/ep93xx: Create a state container
2018-10-01 9:22 ` Daniel Lezcano
@ 2018-10-16 7:14 ` Linus Walleij
0 siblings, 0 replies; 5+ messages in thread
From: Linus Walleij @ 2018-10-16 7:14 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Oct 1, 2018 at 11:22 AM Daniel Lezcano
<daniel.lezcano@linaro.org> wrote:
> On 30/09/2018 23:16, Linus Walleij wrote:
> > +struct ep93tmr {
> > + void __iomem *base;
> > + struct clock_event_device clkevt;
> > +};
>
> Is it possible to replace by timer_of structure ?
Not right now, because this platform does not (yet) use
device tree.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-10-16 7:14 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-09-30 21:16 [PATCH 1/3] ARM: ep93xx: Move timer driver to the clocksource subsystem Linus Walleij
2018-09-30 21:16 ` [PATCH 2/3] clocksource/driver/ep93xx: Fix up includes Linus Walleij
2018-09-30 21:16 ` [PATCH 3/3] clocksource/drivers/ep93xx: Create a state container Linus Walleij
2018-10-01 9:22 ` Daniel Lezcano
2018-10-16 7:14 ` Linus Walleij
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