[PATCH] drm/amd/display: Add logging when DP link training Channel EQ is Successful

[PATCH] drm/amd/display: Add logging when DP link training Channel EQ is Successful

[Srinivasan Shanmugam]

Log when Channel Equalization is successful,
and DP link training completed.

Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Fangzhi Zuo <Jerry.Zuo@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
---
 .../display/dc/link/protocols/link_dp_training_128b_132b.c   | 2 ++
 .../amd/display/dc/link/protocols/link_dp_training_8b_10b.c  | 5 ++++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
index 23d380f09a21..db9abb7ceeb9 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
@@ -118,6 +118,8 @@ static enum link_training_result dp_perform_128b_132b_channel_eq_done_sequence(
 		} else if (dp_is_ch_eq_done(lt_settings->link_settings.lane_count,
 				dpcd_lane_status)) {
 			/* pass */
+			DC_LOG_HW_LINK_TRAINING("%s: Channel EQ done.\n", __func__);
+			DC_LOG_HW_LINK_TRAINING("DP 128b/132b Link Training successful\n");
 			break;
 		} else if (loop_count >= lt_settings->eq_loop_count_limit) {
 			result = DP_128b_132b_MAX_LOOP_COUNT_REACHED;
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
index 14b98e096d39..41b38da9feb4 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
@@ -337,8 +337,11 @@ enum link_training_result perform_8b_10b_channel_equalization_sequence(
 		/* 6. check CHEQ done*/
 		if (dp_is_ch_eq_done(lane_count, dpcd_lane_status) &&
 				dp_is_symbol_locked(lane_count, dpcd_lane_status) &&
-				dp_is_interlane_aligned(dpcd_lane_status_updated))
+				dp_is_interlane_aligned(dpcd_lane_status_updated)) {
+			DC_LOG_HW_LINK_TRAINING("%s: Channel EQ done.\n",  __func__);
+			DC_LOG_HW_LINK_TRAINING("DP 8b/10b Link Training successful\n");
 			return LINK_TRAINING_SUCCESS;
+		}
 
 		/* 7. update VS/PE/PC2 in lt_settings*/
 		dp_decide_lane_settings(lt_settings, dpcd_lane_adjust,
-- 
2.25.1

Re: [PATCH] drm/amd/display: Add logging when DP link training Channel EQ is Successful

[Aurabindo Pillai]

On 4/13/23 15:56, Srinivasan Shanmugam wrote:
> Log when Channel Equalization is successful,
> and DP link training completed.
> 
> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
> Cc: Fangzhi Zuo <Jerry.Zuo@amd.com>
> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
> ---
>   .../display/dc/link/protocols/link_dp_training_128b_132b.c   | 2 ++
>   .../amd/display/dc/link/protocols/link_dp_training_8b_10b.c  | 5 ++++-
>   2 files changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
> index 23d380f09a21..db9abb7ceeb9 100644
> --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
> +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
> @@ -118,6 +118,8 @@ static enum link_training_result dp_perform_128b_132b_channel_eq_done_sequence(
>   		} else if (dp_is_ch_eq_done(lt_settings->link_settings.lane_count,
>   				dpcd_lane_status)) {
>   			/* pass */
> +			DC_LOG_HW_LINK_TRAINING("%s: Channel EQ done.\n", __func__);
> +			DC_LOG_HW_LINK_TRAINING("DP 128b/132b Link Training successful\n");

For consistency of the printed messages, you can either drop the %s or 
add it for both the lines.

>   			break;
>   		} else if (loop_count >= lt_settings->eq_loop_count_limit) {
>   			result = DP_128b_132b_MAX_LOOP_COUNT_REACHED;
> diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
> index 14b98e096d39..41b38da9feb4 100644
> --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
> +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
> @@ -337,8 +337,11 @@ enum link_training_result perform_8b_10b_channel_equalization_sequence(
>   		/* 6. check CHEQ done*/
>   		if (dp_is_ch_eq_done(lane_count, dpcd_lane_status) &&
>   				dp_is_symbol_locked(lane_count, dpcd_lane_status) &&
> -				dp_is_interlane_aligned(dpcd_lane_status_updated))
> +				dp_is_interlane_aligned(dpcd_lane_status_updated)) {
> +			DC_LOG_HW_LINK_TRAINING("%s: Channel EQ done.\n",  __func__);
> +			DC_LOG_HW_LINK_TRAINING("DP 8b/10b Link Training successful\n");

Same here.
>   			return LINK_TRAINING_SUCCESS;
> +		}
>   
>   		/* 7. update VS/PE/PC2 in lt_settings*/
>   		dp_decide_lane_settings(lt_settings, dpcd_lane_adjust,