All of lore.kernel.org
 help / color / mirror / Atom feed
From: haijie <haijie1@huawei.com>
To: kernel test robot <lkp@intel.com>,
	"vkoul@kernel.org" <vkoul@kernel.org>,
	"Wangzhou (B)" <wangzhou1@hisilicon.com>
Cc: "kbuild-all@lists.01.org" <kbuild-all@lists.01.org>,
	"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 2/8] dmaengine: hisilicon: Fix CQ head update
Date: Mon, 27 Jun 2022 06:55:40 +0000	[thread overview]
Message-ID: <25b3ee4b9c574856aee9ed9c5293d43f@huawei.com> (raw)
In-Reply-To: <202206262132.9GLS9dHC-lkp@intel.com>

Hi, kernel test robot,

Thanks and this will be corrected in the next version.

-----Original Message-----
From: kernel test robot [mailto:lkp@intel.com] 
Sent: Sunday, June 26, 2022 9:38 PM
To: haijie <haijie1@huawei.com>; vkoul@kernel.org; Wangzhou (B) <wangzhou1@hisilicon.com>
Cc: kbuild-all@lists.01.org; dmaengine@vger.kernel.org; linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/8] dmaengine: hisilicon: Fix CQ head update

Hi Jie,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on vkoul-dmaengine/next] [also build test ERROR on linus/master v5.19-rc3 next-20220624] [If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Jie-Hai/dmaengine-hisilicon-Add-support-for-hisi-dma-driver/20220625-154524
base:   https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git next
config: arc-allyesconfig
compiler: arceb-elf-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/4a79d13d35e4f95c88bc0dfb44923dbd030bb126
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Jie-Hai/dmaengine-hisilicon-Add-support-for-hisi-dma-driver/20220625-154524
        git checkout 4a79d13d35e4f95c88bc0dfb44923dbd030bb126
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=arc SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>

Note: the linux-review/Jie-Hai/dmaengine-hisilicon-Add-support-for-hisi-dma-driver/20220625-154524 HEAD e823cc5940ad1d20993113591a7ba26946ae0840 builds fine.
      It only hurts bisectability.

All errors (new ones prefixed by >>):

   drivers/dma/hisi_dma.c: In function 'hisi_dma_irq':
>> drivers/dma/hisi_dma.c:441:37: error: 'q_base' undeclared (first use 
>> in this function)
     441 |                 hisi_dma_chan_write(q_base, HISI_DMA_Q_CQ_HEAD_PTR,
         |                                     ^~~~~~
   drivers/dma/hisi_dma.c:441:37: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/dma/hisi_dma.c:441:45: error: 'HISI_DMA_Q_CQ_HEAD_PTR' undeclared (first use in this function); did you mean 'HISI_DMA_CQ_HEAD_PTR'?
     441 |                 hisi_dma_chan_write(q_base, HISI_DMA_Q_CQ_HEAD_PTR,
         |                                             ^~~~~~~~~~~~~~~~~~~~~~
         |                                             HISI_DMA_CQ_HEAD_PTR


vim +/q_base +441 drivers/dma/hisi_dma.c

   426	
   427	static irqreturn_t hisi_dma_irq(int irq, void *data)
   428	{
   429		struct hisi_dma_chan *chan = data;
   430		struct hisi_dma_dev *hdma_dev = chan->hdma_dev;
   431		struct hisi_dma_desc *desc;
   432		struct hisi_dma_cqe *cqe;
   433	
   434		spin_lock(&chan->vc.lock);
   435	
   436		desc = chan->desc;
   437		cqe = chan->cq + chan->cq_head;
   438		if (desc) {
   439			chan->cq_head = (chan->cq_head + 1) %
   440					hdma_dev->chan_depth;
 > 441			hisi_dma_chan_write(q_base, HISI_DMA_Q_CQ_HEAD_PTR,
   442					    chan->qp_num, chan->cq_head);
   443			if (FIELD_GET(STATUS_MASK, cqe->w0) == STATUS_SUCC) {
   444				vchan_cookie_complete(&desc->vd);
   445			} else {
   446				dev_err(&hdma_dev->pdev->dev, "task error!\n");
   447			}
   448	
   449			chan->desc = NULL;
   450		}
   451	
   452		spin_unlock(&chan->vc.lock);
   453	
   454		return IRQ_HANDLED;
   455	}
   456	

--
0-DAY CI Kernel Test Service
https://01.org/lkp

WARNING: multiple messages have this Message-ID (diff)
From: haijie <haijie1@huawei.com>
To: kbuild-all@lists.01.org
Subject: Re: [PATCH 2/8] dmaengine: hisilicon: Fix CQ head update
Date: Mon, 27 Jun 2022 06:55:40 +0000	[thread overview]
Message-ID: <25b3ee4b9c574856aee9ed9c5293d43f@huawei.com> (raw)
In-Reply-To: <202206262132.9GLS9dHC-lkp@intel.com>

[-- Attachment #1: Type: text/plain, Size: 4018 bytes --]

Hi, kernel test robot,

Thanks and this will be corrected in the next version.

-----Original Message-----
From: kernel test robot [mailto:lkp(a)intel.com] 
Sent: Sunday, June 26, 2022 9:38 PM
To: haijie <haijie1@huawei.com>; vkoul(a)kernel.org; Wangzhou (B) <wangzhou1@hisilicon.com>
Cc: kbuild-all(a)lists.01.org; dmaengine(a)vger.kernel.org; linux-kernel(a)vger.kernel.org
Subject: Re: [PATCH 2/8] dmaengine: hisilicon: Fix CQ head update

Hi Jie,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on vkoul-dmaengine/next] [also build test ERROR on linus/master v5.19-rc3 next-20220624] [If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Jie-Hai/dmaengine-hisilicon-Add-support-for-hisi-dma-driver/20220625-154524
base:   https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git next
config: arc-allyesconfig
compiler: arceb-elf-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/4a79d13d35e4f95c88bc0dfb44923dbd030bb126
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Jie-Hai/dmaengine-hisilicon-Add-support-for-hisi-dma-driver/20220625-154524
        git checkout 4a79d13d35e4f95c88bc0dfb44923dbd030bb126
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=arc SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>

Note: the linux-review/Jie-Hai/dmaengine-hisilicon-Add-support-for-hisi-dma-driver/20220625-154524 HEAD e823cc5940ad1d20993113591a7ba26946ae0840 builds fine.
      It only hurts bisectability.

All errors (new ones prefixed by >>):

   drivers/dma/hisi_dma.c: In function 'hisi_dma_irq':
>> drivers/dma/hisi_dma.c:441:37: error: 'q_base' undeclared (first use 
>> in this function)
     441 |                 hisi_dma_chan_write(q_base, HISI_DMA_Q_CQ_HEAD_PTR,
         |                                     ^~~~~~
   drivers/dma/hisi_dma.c:441:37: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/dma/hisi_dma.c:441:45: error: 'HISI_DMA_Q_CQ_HEAD_PTR' undeclared (first use in this function); did you mean 'HISI_DMA_CQ_HEAD_PTR'?
     441 |                 hisi_dma_chan_write(q_base, HISI_DMA_Q_CQ_HEAD_PTR,
         |                                             ^~~~~~~~~~~~~~~~~~~~~~
         |                                             HISI_DMA_CQ_HEAD_PTR


vim +/q_base +441 drivers/dma/hisi_dma.c

   426	
   427	static irqreturn_t hisi_dma_irq(int irq, void *data)
   428	{
   429		struct hisi_dma_chan *chan = data;
   430		struct hisi_dma_dev *hdma_dev = chan->hdma_dev;
   431		struct hisi_dma_desc *desc;
   432		struct hisi_dma_cqe *cqe;
   433	
   434		spin_lock(&chan->vc.lock);
   435	
   436		desc = chan->desc;
   437		cqe = chan->cq + chan->cq_head;
   438		if (desc) {
   439			chan->cq_head = (chan->cq_head + 1) %
   440					hdma_dev->chan_depth;
 > 441			hisi_dma_chan_write(q_base, HISI_DMA_Q_CQ_HEAD_PTR,
   442					    chan->qp_num, chan->cq_head);
   443			if (FIELD_GET(STATUS_MASK, cqe->w0) == STATUS_SUCC) {
   444				vchan_cookie_complete(&desc->vd);
   445			} else {
   446				dev_err(&hdma_dev->pdev->dev, "task error!\n");
   447			}
   448	
   449			chan->desc = NULL;
   450		}
   451	
   452		spin_unlock(&chan->vc.lock);
   453	
   454		return IRQ_HANDLED;
   455	}
   456	

--
0-DAY CI Kernel Test Service
https://01.org/lkp

  reply	other threads:[~2022-06-27  6:55 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-25  7:44 [PATCH 0/8] dmaengine: hisilicon: Add support for hisi dma driver Jie Hai
2022-06-25  7:44 ` [PATCH 1/8] dmaengine: hisilicon: Disable channels when unregister hisi_dma Jie Hai
2022-06-25  7:44 ` [PATCH 2/8] dmaengine: hisilicon: Fix CQ head update Jie Hai
2022-06-26 13:37   ` kernel test robot
2022-06-27  6:55     ` haijie [this message]
2022-06-27  6:55       ` haijie
2022-06-27  6:12   ` Vinod Koul
2022-06-27  7:01     ` haijie
2022-06-27 17:38       ` Vinod Koul
2022-06-25  7:44 ` [PATCH 3/8] dmaengine: hisilicon: Add multi-thread support for a DMA channel Jie Hai
2022-06-27  6:21   ` Vinod Koul
     [not found]     ` <eed10a2b5ea745878024ca653158f4de@huawei.com>
2022-06-27 13:14       ` haijie
2022-06-29  3:44     ` Jie Hai
2022-06-25  7:44 ` [PATCH 4/8] dmaengine: hisilicon: Use macros instead of magic number Jie Hai
2022-06-25  7:44 ` [PATCH 5/8] dmaengine: hisilicon: Adapt DMA driver to HiSilicon IP09 Jie Hai
2022-06-25  7:44 ` [PATCH 6/8] dmaengine: hisilicon: Add dfx feature for hisi dma driver Jie Hai
2022-06-25  9:36   ` kernel test robot
2022-06-27  6:55     ` haijie
2022-06-27  6:55       ` haijie
2022-06-25  7:44 ` [PATCH 7/8] Documentation: Add debugfs doc for hisi_dma Jie Hai
2022-06-27  5:50   ` Vinod Koul
2022-06-25  7:44 ` [PATCH 8/8] MAINTAINERS: Add debugfs files and maintainer " Jie Hai
2022-06-29  3:55 ` [PATCH v2 0/7] dmaengine: hisilicon: Add support for hisi dma driver Jie Hai
2022-06-29  3:55   ` [PATCH v2 1/7] dmaengine: hisilicon: Disable channels when unregister hisi_dma Jie Hai
2022-06-29  3:55   ` [PATCH v2 2/7] dmaengine: hisilicon: Fix CQ head update Jie Hai
2022-07-21 13:27     ` Vinod Koul
2022-07-26  1:38       ` Jie Hai
2022-06-29  3:55   ` [PATCH v2 3/7] dmaengine: hisilicon: Add multi-thread support for a DMA channel Jie Hai
2022-06-29  3:55   ` [PATCH v2 4/7] dmaengine: hisilicon: Use macros instead of magic number Jie Hai
2022-06-29  3:55   ` [PATCH v2 5/7] dmaengine: hisilicon: Adapt DMA driver to HiSilicon IP09 Jie Hai
2022-07-21 13:29     ` Vinod Koul
2022-07-26  1:40       ` Jie Hai
2022-06-29  3:55   ` [PATCH v2 6/7] dmaengine: hisilicon: Add dfx feature for hisi dma driver Jie Hai
2022-07-21 13:25     ` Vinod Koul
2022-07-26  1:43       ` Jie Hai
2022-07-26 12:39         ` Vinod Koul
2022-07-27  0:58           ` Jie Hai
2022-06-29  3:55   ` [PATCH v2 7/7] MAINTAINERS: Add myself as maintainer for hisi_dma Jie Hai
2022-07-08  3:16   ` [PATCH v2 0/7] dmaengine: hisilicon: Add support for hisi dma driver Zhou Wang
2022-07-26  1:35 ` [PATCH v3 " Jie Hai
2022-07-26  1:35   ` [PATCH v3 1/7] dmaengine: hisilicon: Disable channels when unregister hisi_dma Jie Hai
2022-07-26  1:35   ` [PATCH v3 2/7] dmaengine: hisilicon: Fix CQ head update Jie Hai
2022-07-26  1:35   ` [PATCH v3 3/7] dmaengine: hisilicon: Add multi-thread support for a DMA channel Jie Hai
2022-07-26  1:35   ` [PATCH v3 4/7] dmaengine: hisilicon: Use macros instead of magic number Jie Hai
2022-07-26  1:35   ` [PATCH v3 5/7] dmaengine: hisilicon: Adapt DMA driver to HiSilicon IP09 Jie Hai
2022-07-26  1:35   ` [PATCH v3 6/7] dmaengine: hisilicon: dump regs to debugfs Jie Hai
2022-07-26  1:35   ` [PATCH v3 7/7] MAINTAINERS: Add myself as maintainer for hisi_dma Jie Hai
2022-08-02 10:12 ` [PATCH v4 0/7] dmaengine: hisilicon: Add support for hisi dma driver Jie Hai
2022-08-02 10:12   ` [PATCH v4 1/7] dmaengine: hisilicon: Disable channels when unregister hisi_dma Jie Hai
2022-08-02 10:12   ` [PATCH v4 2/7] dmaengine: hisilicon: Fix CQ head update Jie Hai
2022-08-02 10:12   ` [PATCH v4 3/7] dmaengine: hisilicon: Add multi-thread support for a DMA channel Jie Hai
2022-08-02 10:12   ` [PATCH v4 4/7] dmaengine: hisilicon: Use macros instead of magic number Jie Hai
2022-08-02 10:12   ` [PATCH v4 5/7] dmaengine: hisilicon: Adapt DMA driver to HiSilicon IP09 Jie Hai
2022-08-05  7:41     ` Jie Hai
2022-08-02 10:12   ` [PATCH v4 6/7] dmaengine: hisilicon: Dump regs to debugfs Jie Hai
2022-08-02 10:12   ` [PATCH v4 7/7] MAINTAINERS: Add myself as maintainer for hisi_dma Jie Hai
2022-08-05  8:25 ` [PATCH v4 0/7] dmaengine: hisilicon: Add support for hisi dma driver Jie Hai
2022-08-05  8:25   ` [PATCH v5 1/7] dmaengine: hisilicon: Disable channels when unregister hisi_dma Jie Hai
2022-08-05  8:25   ` [PATCH v5 2/7] dmaengine: hisilicon: Fix CQ head update Jie Hai
2022-08-05  8:25   ` [PATCH v5 3/7] dmaengine: hisilicon: Add multi-thread support for a DMA channel Jie Hai
2022-08-05  8:25   ` [PATCH v5 4/7] dmaengine: hisilicon: Use macros instead of magic number Jie Hai
2022-08-05  8:25   ` [PATCH v5 5/7] dmaengine: hisilicon: Adapt DMA driver to HiSilicon IP09 Jie Hai
2022-08-05  8:25   ` [PATCH v5 6/7] dmaengine: hisilicon: Dump regs to debugfs Jie Hai
2022-08-05  8:25   ` [PATCH v5 7/7] MAINTAINERS: Add myself as maintainer for hisi_dma Jie Hai

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=25b3ee4b9c574856aee9ed9c5293d43f@huawei.com \
    --to=haijie1@huawei.com \
    --cc=dmaengine@vger.kernel.org \
    --cc=kbuild-all@lists.01.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=lkp@intel.com \
    --cc=vkoul@kernel.org \
    --cc=wangzhou1@hisilicon.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.