From: Arnd Bergmann <arnd@arndb.de> To: linux-arm-kernel@lists.infradead.org Cc: openwrt-devel@openwrt.org, Florian Fainelli <f.fainelli@gmail.com>, Paulius Zaleckas <paulius.zaleckas@gmail.com>, linux-pci@vger.kernel.org, Linus Walleij <linus.walleij@linaro.org>, Bjorn Helgaas <bhelgaas@google.com>, Janos Laube <janos.dev@gmail.com>, Hans Ulli Kroll <ulli.kroll@googlemail.com> Subject: Re: [PATCH 2/4] PCI: add driver for Cortina Gemini Host Bridge Date: Wed, 01 Feb 2017 12:11:57 +0100 [thread overview] Message-ID: <2695922.yyinjvNuJK@wuerfel> (raw) In-Reply-To: <20170128204839.18330-2-linus.walleij@linaro.org> On Saturday, January 28, 2017 9:48:37 PM CET Linus Walleij wrote: > +static int gemini_pci_read_config(struct pci_bus *bus, unsigned int fn, > + int config, int size, u32 *value) > +{ > + struct gemini_pci *p = bus->sysdata; > + unsigned long irq_flags; > + > + spin_lock_irqsave(&p->lock, irq_flags); > + > + writel(PCI_CONF_BUS(bus->number) | > + PCI_CONF_DEVICE(PCI_SLOT(fn)) | > + PCI_CONF_FUNCTION(PCI_FUNC(fn)) | > + PCI_CONF_WHERE(config) | > + PCI_CONF_ENABLE, > + p->base + PCI_CONFIG); > + > + *value = readl(p->base + PCI_DATA); > + > + if (size == 1) > + *value = (*value >> (8 * (config & 3))) & 0xFF; > + else if (size == 2) > + *value = (*value >> (8 * (config & 3))) & 0xFFFF; > + > + spin_unlock_irqrestore(&p->lock, irq_flags); The read_config/write_config functions are called under a spinlock, no need for another one. > + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + p->base = devm_ioremap_resource(dev, regs); > + if (IS_ERR(p->base)) > + return PTR_ERR(p->base); > + > + ret = of_pci_get_host_bridge_resources(dev->of_node, 0, 0xff, > + &res, &io_base); > + if (ret) > + return ret; > + > + ret = devm_request_pci_bus_resources(dev, &res); > + if (ret) > + return ret; > + > + /* No clue what these do */ > + pcibios_min_io = 0x100; > + pcibios_min_mem = 0; Don't touch these > + /* setup I/O space to 1MB size */ > + writel(GEMINI_PCI_IOSIZE_1M, p->base + PCI_IOSIZE); Maybe get the size from the resource instead? Note that pci_remap_iospace only registers 64K of I/O space, so you could also use that. > + /* setup hostbridge */ > + val = readl(p->base + PCI_CTRL); > + val |= PCI_COMMAND_IO; > + val |= PCI_COMMAND_MEMORY; > + val |= PCI_COMMAND_MASTER; > + writel(val, p->base + PCI_CTRL); > + > + /* Get the I/O and memory ranges from DT */ > + resource_list_for_each_entry(win, &res) { > + switch (resource_type(win->res)) { > + case IORESOURCE_IO: > + io = win->res; > + io->name = "Gemini PCI I/O"; > + ret = pci_remap_iospace(io, io_base); > + if (ret) { > + dev_warn(dev, "error %d: failed to map resource %pR\n", > + ret, io); > + continue; > + } > + break; > + case IORESOURCE_MEM: > + mem = win->res; > + mem->name = "Gemini PCI MEM"; > + break; > + case IORESOURCE_BUS: > + break; > + default: > + break; > + } > + } > + > + bus = pci_scan_root_bus(&pdev->dev, 0, &gemini_pci_ops, p, &res); Can you try using the new pci_register_host_bridge() API? Arnd _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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From: arnd@arndb.de (Arnd Bergmann) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/4] PCI: add driver for Cortina Gemini Host Bridge Date: Wed, 01 Feb 2017 12:11:57 +0100 [thread overview] Message-ID: <2695922.yyinjvNuJK@wuerfel> (raw) In-Reply-To: <20170128204839.18330-2-linus.walleij@linaro.org> On Saturday, January 28, 2017 9:48:37 PM CET Linus Walleij wrote: > +static int gemini_pci_read_config(struct pci_bus *bus, unsigned int fn, > + int config, int size, u32 *value) > +{ > + struct gemini_pci *p = bus->sysdata; > + unsigned long irq_flags; > + > + spin_lock_irqsave(&p->lock, irq_flags); > + > + writel(PCI_CONF_BUS(bus->number) | > + PCI_CONF_DEVICE(PCI_SLOT(fn)) | > + PCI_CONF_FUNCTION(PCI_FUNC(fn)) | > + PCI_CONF_WHERE(config) | > + PCI_CONF_ENABLE, > + p->base + PCI_CONFIG); > + > + *value = readl(p->base + PCI_DATA); > + > + if (size == 1) > + *value = (*value >> (8 * (config & 3))) & 0xFF; > + else if (size == 2) > + *value = (*value >> (8 * (config & 3))) & 0xFFFF; > + > + spin_unlock_irqrestore(&p->lock, irq_flags); The read_config/write_config functions are called under a spinlock, no need for another one. > + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + p->base = devm_ioremap_resource(dev, regs); > + if (IS_ERR(p->base)) > + return PTR_ERR(p->base); > + > + ret = of_pci_get_host_bridge_resources(dev->of_node, 0, 0xff, > + &res, &io_base); > + if (ret) > + return ret; > + > + ret = devm_request_pci_bus_resources(dev, &res); > + if (ret) > + return ret; > + > + /* No clue what these do */ > + pcibios_min_io = 0x100; > + pcibios_min_mem = 0; Don't touch these > + /* setup I/O space to 1MB size */ > + writel(GEMINI_PCI_IOSIZE_1M, p->base + PCI_IOSIZE); Maybe get the size from the resource instead? Note that pci_remap_iospace only registers 64K of I/O space, so you could also use that. > + /* setup hostbridge */ > + val = readl(p->base + PCI_CTRL); > + val |= PCI_COMMAND_IO; > + val |= PCI_COMMAND_MEMORY; > + val |= PCI_COMMAND_MASTER; > + writel(val, p->base + PCI_CTRL); > + > + /* Get the I/O and memory ranges from DT */ > + resource_list_for_each_entry(win, &res) { > + switch (resource_type(win->res)) { > + case IORESOURCE_IO: > + io = win->res; > + io->name = "Gemini PCI I/O"; > + ret = pci_remap_iospace(io, io_base); > + if (ret) { > + dev_warn(dev, "error %d: failed to map resource %pR\n", > + ret, io); > + continue; > + } > + break; > + case IORESOURCE_MEM: > + mem = win->res; > + mem->name = "Gemini PCI MEM"; > + break; > + case IORESOURCE_BUS: > + break; > + default: > + break; > + } > + } > + > + bus = pci_scan_root_bus(&pdev->dev, 0, &gemini_pci_ops, p, &res); Can you try using the new pci_register_host_bridge() API? Arnd
next prev parent reply other threads:[~2017-02-01 11:11 UTC|newest] Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-01-28 20:48 [PATCH 1/4] PCI: add DT bindings for Cortina Gemini PCI Host Bridge Linus Walleij 2017-01-28 20:48 ` Linus Walleij 2017-01-28 20:48 ` Linus Walleij 2017-01-28 20:48 ` [PATCH 2/4] PCI: add driver for Cortina Gemini " Linus Walleij 2017-01-28 20:48 ` Linus Walleij 2017-01-31 0:37 ` Bjorn Helgaas 2017-01-31 0:37 ` Bjorn Helgaas 2017-02-26 19:42 ` Linus Walleij 2017-02-26 19:42 ` Linus Walleij 2017-02-27 16:49 ` Bjorn Helgaas 2017-02-27 16:49 ` Bjorn Helgaas 2017-02-01 11:11 ` Arnd Bergmann [this message] 2017-02-01 11:11 ` Arnd Bergmann 2017-02-04 18:43 ` Linus Walleij 2017-02-04 18:43 ` Linus Walleij 2017-02-16 14:08 ` Arnd Bergmann 2017-02-16 14:08 ` Arnd Bergmann 2017-02-18 14:05 ` Linus Walleij 2017-02-18 14:05 ` Linus Walleij 2017-02-05 10:00 ` Hans Ulli Kroll 2017-02-05 10:00 ` Hans Ulli Kroll 2017-02-05 14:36 ` Linus Walleij 2017-02-05 14:36 ` Linus Walleij 2017-01-28 20:48 ` [PATCH 3/4] ARM: gemini: select MIGHT_HAVE_PCI Linus Walleij 2017-01-28 20:48 ` Linus Walleij 2017-01-28 20:48 ` [PATCH 4/4] ARM: dts: add PCI to the Gemini DTSI Linus Walleij 2017-01-28 20:48 ` Linus Walleij 2017-02-05 10:03 ` Hans Ulli Kroll 2017-02-05 10:03 ` Hans Ulli Kroll 2017-02-05 15:00 ` Linus Walleij 2017-02-05 15:00 ` Linus Walleij 2017-02-06 9:55 ` Hans Ulli Kroll 2017-02-06 9:55 ` Hans Ulli Kroll 2017-02-10 15:40 ` Arnd Bergmann 2017-02-10 15:40 ` Arnd Bergmann 2017-02-11 11:17 ` Linus Walleij 2017-02-11 11:17 ` Linus Walleij 2017-01-31 0:31 ` [PATCH 1/4] PCI: add DT bindings for Cortina Gemini PCI Host Bridge Bjorn Helgaas 2017-01-31 0:31 ` Bjorn Helgaas 2017-01-31 0:31 ` Bjorn Helgaas [not found] ` <20170131003137.GE20550-1RhO1Y9PlrlHTL0Zs8A6p5iNqAH0jzoTYJqu5kTmcBRl57MIdRCFDg@public.gmane.org> 2017-02-01 20:00 ` Linus Walleij 2017-02-01 20:00 ` Linus Walleij 2017-02-01 20:00 ` Linus Walleij [not found] ` <20170128204839.18330-1-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> 2017-02-01 11:09 ` Arnd Bergmann 2017-02-01 11:09 ` Arnd Bergmann 2017-02-01 11:09 ` Arnd Bergmann 2017-02-05 14:44 ` Linus Walleij 2017-02-05 14:44 ` Linus Walleij 2017-02-05 14:44 ` Linus Walleij 2017-02-01 11:19 ` Arnd Bergmann 2017-02-01 11:19 ` Arnd Bergmann 2017-02-01 11:19 ` Arnd Bergmann 2017-02-05 14:56 ` Linus Walleij 2017-02-05 14:56 ` Linus Walleij 2017-02-05 14:56 ` Linus Walleij [not found] ` <CACRpkdYpBYaeTo2SJ55=cwKcZ5Y7A1k-wy1N3UuR6u3L3RdNoA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2017-02-06 16:05 ` Arnd Bergmann 2017-02-06 16:05 ` Arnd Bergmann 2017-02-06 16:05 ` Arnd Bergmann 2017-02-01 16:02 ` Rob Herring 2017-02-01 16:02 ` Rob Herring 2017-02-01 16:02 ` Rob Herring 2017-02-01 20:04 ` Linus Walleij 2017-02-01 20:04 ` Linus Walleij 2017-02-01 20:04 ` Linus Walleij
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