All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Lazar, Lijo" <lijo.lazar@amd.com>
To: Graham Sider <Graham.Sider@amd.com>, amd-gfx@lists.freedesktop.org
Cc: Harish.Kasiviswanathan@amd.com, Elena.Sakhnovitch@amd.com
Subject: Re: [PATCH v5 7/9] drm/amd/pm: Add vangogh throttler translation
Date: Mon, 7 Jun 2021 20:05:12 +0530	[thread overview]
Message-ID: <26b9761c-eb4d-6c30-7817-18054efb6006@amd.com> (raw)
In-Reply-To: <20210607134439.28542-7-Graham.Sider@amd.com>



On 6/7/2021 7:14 PM, Graham Sider wrote:
> Perform dependent to independent throttle status translation
> for vangogh.
> 
> Signed-off-by: Graham Sider <Graham.Sider@amd.com>
> ---
>   .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c  | 38 ++++++++++++++-----
>   1 file changed, 29 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> index 77f532a49e37..589304367929 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> @@ -190,6 +190,20 @@ static struct cmn2asic_mapping vangogh_workload_map[PP_SMC_POWER_PROFILE_COUNT]
>   	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_CUSTOM,		WORKLOAD_PPLIB_CUSTOM_BIT),
>   };
>   
> +static const uint8_t vangogh_throttler_map[] = {
> +	[THROTTLER_STATUS_BIT_SPL]	= (SMU_THROTTLER_SPL_BIT),
> +	[THROTTLER_STATUS_BIT_FPPT]	= (SMU_THROTTLER_FPPT_BIT),
> +	[THROTTLER_STATUS_BIT_SPPT]	= (SMU_THROTTLER_SPPT_BIT),
> +	[THROTTLER_STATUS_BIT_SPPT_APU]	= (SMU_THROTTLER_SPPT_APU_BIT),
> +	[THROTTLER_STATUS_BIT_THM_CORE]	= (SMU_THROTTLER_TEMP_CORE_BIT),
> +	[THROTTLER_STATUS_BIT_THM_GFX]	= (SMU_THROTTLER_TEMP_VR_GFX_BIT),
> +	[THROTTLER_STATUS_BIT_THM_SOC]	= (SMU_THROTTLER_TEMP_VR_SOC_BIT),

Above two mappings don't look correct. They essentially mean throttling 
due to GFX/SOC domain temperatures in APU exceeding their limits, not 
the VR temperatures. Except those mappings, rest of the patch series 
looks good to me.

Thanks,
Lijo

> +	[THROTTLER_STATUS_BIT_TDC_VDD]	= (SMU_THROTTLER_TDC_VDD_BIT),
> +	[THROTTLER_STATUS_BIT_TDC_SOC]	= (SMU_THROTTLER_TDC_SOC_BIT),
> +	[THROTTLER_STATUS_BIT_TDC_GFX]	= (SMU_THROTTLER_TDC_GFX_BIT),
> +	[THROTTLER_STATUS_BIT_TDC_CVIP]	= (SMU_THROTTLER_TDC_CVIP_BIT),
> +};
> +
>   static int vangogh_tables_init(struct smu_context *smu)
>   {
>   	struct smu_table_context *smu_table = &smu->smu_table;
> @@ -226,7 +240,7 @@ static int vangogh_tables_init(struct smu_context *smu)
>   		goto err0_out;
>   	smu_table->metrics_time = 0;
>   
> -	smu_table->gpu_metrics_table_size = sizeof(struct gpu_metrics_v2_1);
> +	smu_table->gpu_metrics_table_size = sizeof(struct gpu_metrics_v2_2);
>   	smu_table->gpu_metrics_table = kzalloc(smu_table->gpu_metrics_table_size, GFP_KERNEL);
>   	if (!smu_table->gpu_metrics_table)
>   		goto err1_out;
> @@ -1632,8 +1646,8 @@ static ssize_t vangogh_get_legacy_gpu_metrics(struct smu_context *smu,
>   				      void **table)
>   {
>   	struct smu_table_context *smu_table = &smu->smu_table;
> -	struct gpu_metrics_v2_1 *gpu_metrics =
> -		(struct gpu_metrics_v2_1 *)smu_table->gpu_metrics_table;
> +	struct gpu_metrics_v2_2 *gpu_metrics =
> +		(struct gpu_metrics_v2_2 *)smu_table->gpu_metrics_table;
>   	SmuMetrics_legacy_t metrics;
>   	int ret = 0;
>   
> @@ -1641,7 +1655,7 @@ static ssize_t vangogh_get_legacy_gpu_metrics(struct smu_context *smu,
>   	if (ret)
>   		return ret;
>   
> -	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 2, 1);
> +	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 2, 2);
>   
>   	gpu_metrics->temperature_gfx = metrics.GfxTemperature;
>   	gpu_metrics->temperature_soc = metrics.SocTemperature;
> @@ -1674,20 +1688,23 @@ static ssize_t vangogh_get_legacy_gpu_metrics(struct smu_context *smu,
>   	gpu_metrics->current_l3clk[0] = metrics.L3Frequency[0];
>   
>   	gpu_metrics->throttle_status = metrics.ThrottlerStatus;
> +	gpu_metrics->indep_throttle_status =
> +			smu_cmn_get_indep_throttler_status(metrics.ThrottlerStatus,
> +							   vangogh_throttler_map);
>   
>   	gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
>   
>   	*table = (void *)gpu_metrics;
>   
> -	return sizeof(struct gpu_metrics_v2_1);
> +	return sizeof(struct gpu_metrics_v2_2);
>   }
>   
>   static ssize_t vangogh_get_gpu_metrics(struct smu_context *smu,
>   				      void **table)
>   {
>   	struct smu_table_context *smu_table = &smu->smu_table;
> -	struct gpu_metrics_v2_1 *gpu_metrics =
> -		(struct gpu_metrics_v2_1 *)smu_table->gpu_metrics_table;
> +	struct gpu_metrics_v2_2 *gpu_metrics =
> +		(struct gpu_metrics_v2_2 *)smu_table->gpu_metrics_table;
>   	SmuMetrics_t metrics;
>   	int ret = 0;
>   
> @@ -1695,7 +1712,7 @@ static ssize_t vangogh_get_gpu_metrics(struct smu_context *smu,
>   	if (ret)
>   		return ret;
>   
> -	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 2, 1);
> +	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 2, 2);
>   
>   	gpu_metrics->temperature_gfx = metrics.Current.GfxTemperature;
>   	gpu_metrics->temperature_soc = metrics.Current.SocTemperature;
> @@ -1735,12 +1752,15 @@ static ssize_t vangogh_get_gpu_metrics(struct smu_context *smu,
>   	gpu_metrics->current_l3clk[0] = metrics.Current.L3Frequency[0];
>   
>   	gpu_metrics->throttle_status = metrics.Current.ThrottlerStatus;
> +	gpu_metrics->indep_throttle_status =
> +			smu_cmn_get_indep_throttler_status(metrics.Current.ThrottlerStatus,
> +							   vangogh_throttler_map);
>   
>   	gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
>   
>   	*table = (void *)gpu_metrics;
>   
> -	return sizeof(struct gpu_metrics_v2_1);
> +	return sizeof(struct gpu_metrics_v2_2);
>   }
>   
>   static ssize_t vangogh_common_get_gpu_metrics(struct smu_context *smu,
> 
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

  reply	other threads:[~2021-06-07 14:35 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-07 13:44 [PATCH v5 1/9] drm/amd/pm: Add u64 throttler status field to gpu_metrics Graham Sider
2021-06-07 13:44 ` [PATCH v5 2/9] drm/amd/pm: Add ASIC independent throttle bits Graham Sider
2021-06-07 13:44 ` [PATCH v5 3/9] drm/amd/pm: Add common throttler translation func Graham Sider
2021-06-07 13:44 ` [PATCH v5 4/9] drm/amd/pm: Add arcturus throttler translation Graham Sider
2021-06-07 13:44 ` [PATCH v5 5/9] drm/amd/pm: Add navi1x " Graham Sider
2021-06-07 13:44 ` [PATCH v5 6/9] drm/amd/pm: Add sienna cichlid " Graham Sider
2021-06-07 13:44 ` [PATCH v5 7/9] drm/amd/pm: Add vangogh " Graham Sider
2021-06-07 14:35   ` Lazar, Lijo [this message]
2021-06-07 14:53     ` Sider, Graham
2021-06-08  7:26       ` Lazar, Lijo
2021-06-07 13:44 ` [PATCH v5 8/9] drm/amd/pm: Add renoir " Graham Sider
2021-06-07 13:44 ` [PATCH v5 9/9] drm/amd/pm: Add aldebaran " Graham Sider
2021-06-08  2:19   ` Quan, Evan

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=26b9761c-eb4d-6c30-7817-18054efb6006@amd.com \
    --to=lijo.lazar@amd.com \
    --cc=Elena.Sakhnovitch@amd.com \
    --cc=Graham.Sider@amd.com \
    --cc=Harish.Kasiviswanathan@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.