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From: "Quan, Evan" <Evan.Quan@amd.com>
To: "Sider, Graham" <Graham.Sider@amd.com>,
	"amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>
Cc: "Kasiviswanathan, Harish" <Harish.Kasiviswanathan@amd.com>,
	"Sider, Graham" <Graham.Sider@amd.com>,
	"Sakhnovitch, Elena \(Elen\)" <Elena.Sakhnovitch@amd.com>
Subject: RE: [PATCH v5 9/9] drm/amd/pm: Add aldebaran throttler translation
Date: Tue, 8 Jun 2021 02:19:44 +0000	[thread overview]
Message-ID: <DM6PR12MB2619E56750872D1CA71211EBE4379@DM6PR12MB2619.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20210607134439.28542-9-Graham.Sider@amd.com>

[AMD Official Use Only]

Series seems fine to me.
Reviewed-by: Evan Quan <evan.quan@amd.com>

BR
Evan
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Graham Sider
> Sent: Monday, June 7, 2021 9:45 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Kasiviswanathan, Harish <Harish.Kasiviswanathan@amd.com>; Sider,
> Graham <Graham.Sider@amd.com>; Sakhnovitch, Elena (Elen)
> <Elena.Sakhnovitch@amd.com>
> Subject: [PATCH v5 9/9] drm/amd/pm: Add aldebaran throttler translation
> 
> Perform dependent to independent throttle status translation for aldebaran.
> 
> Signed-off-by: Graham Sider <Graham.Sider@amd.com>
> ---
>  .../drm/amd/pm/swsmu/smu13/aldebaran_ppt.c    | 27 +++++++++++++++-
> ---
>  1 file changed, 22 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> index 7a1abb3d6a7a..0845d4b30a0d 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> @@ -191,6 +191,20 @@ static const struct cmn2asic_mapping
> aldebaran_table_map[SMU_TABLE_COUNT] = {
>  	TAB_MAP(I2C_COMMANDS),
>  };
> 
> +static const uint8_t aldebaran_throttler_map[] = {
> +	[THROTTLER_PPT0_BIT]		=
> (SMU_THROTTLER_PPT0_BIT),
> +	[THROTTLER_PPT1_BIT]		=
> (SMU_THROTTLER_PPT1_BIT),
> +	[THROTTLER_TDC_GFX_BIT]		=
> (SMU_THROTTLER_TDC_GFX_BIT),
> +	[THROTTLER_TDC_SOC_BIT]		=
> (SMU_THROTTLER_TDC_SOC_BIT),
> +	[THROTTLER_TDC_HBM_BIT]		=
> (SMU_THROTTLER_TDC_MEM_BIT),
> +	[THROTTLER_TEMP_GPU_BIT]	=
> (SMU_THROTTLER_TEMP_GPU_BIT),
> +	[THROTTLER_TEMP_MEM_BIT]	=
> (SMU_THROTTLER_TEMP_MEM_BIT),
> +	[THROTTLER_TEMP_VR_GFX_BIT]	=
> (SMU_THROTTLER_TEMP_VR_GFX_BIT),
> +	[THROTTLER_TEMP_VR_SOC_BIT]	=
> (SMU_THROTTLER_TEMP_VR_SOC_BIT),
> +	[THROTTLER_TEMP_VR_MEM_BIT]	=
> (SMU_THROTTLER_TEMP_VR_MEM0_BIT),
> +	[THROTTLER_APCC_BIT]		=
> (SMU_THROTTLER_APCC_BIT),
> +};
> +
>  static int aldebaran_tables_init(struct smu_context *smu)  {
>  	struct smu_table_context *smu_table = &smu->smu_table; @@ -
> 213,7 +227,7 @@ static int aldebaran_tables_init(struct smu_context *smu)
>  		return -ENOMEM;
>  	smu_table->metrics_time = 0;
> 
> -	smu_table->gpu_metrics_table_size = sizeof(struct
> gpu_metrics_v1_2);
> +	smu_table->gpu_metrics_table_size = sizeof(struct
> gpu_metrics_v1_3);
>  	smu_table->gpu_metrics_table = kzalloc(smu_table-
> >gpu_metrics_table_size, GFP_KERNEL);
>  	if (!smu_table->gpu_metrics_table) {
>  		kfree(smu_table->metrics_table);
> @@ -1713,8 +1727,8 @@ static ssize_t aldebaran_get_gpu_metrics(struct
> smu_context *smu,
>  					 void **table)
>  {
>  	struct smu_table_context *smu_table = &smu->smu_table;
> -	struct gpu_metrics_v1_2 *gpu_metrics =
> -		(struct gpu_metrics_v1_2 *)smu_table->gpu_metrics_table;
> +	struct gpu_metrics_v1_3 *gpu_metrics =
> +		(struct gpu_metrics_v1_3 *)smu_table->gpu_metrics_table;
>  	SmuMetrics_t metrics;
>  	int i, ret = 0;
> 
> @@ -1724,7 +1738,7 @@ static ssize_t aldebaran_get_gpu_metrics(struct
> smu_context *smu,
>  	if (ret)
>  		return ret;
> 
> -	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 2);
> +	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 3);
> 
>  	gpu_metrics->temperature_edge = metrics.TemperatureEdge;
>  	gpu_metrics->temperature_hotspot = metrics.TemperatureHotspot;
> @@ -1755,6 +1769,9 @@ static ssize_t aldebaran_get_gpu_metrics(struct
> smu_context *smu,
>  	gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
> 
>  	gpu_metrics->throttle_status = metrics.ThrottlerStatus;
> +	gpu_metrics->indep_throttle_status =
> +
> 	smu_cmn_get_indep_throttler_status(metrics.ThrottlerStatus,
> +
> aldebaran_throttler_map);
> 
>  	gpu_metrics->current_fan_speed = 0;
> 
> @@ -1776,7 +1793,7 @@ static ssize_t aldebaran_get_gpu_metrics(struct
> smu_context *smu,
> 
>  	*table = (void *)gpu_metrics;
> 
> -	return sizeof(struct gpu_metrics_v1_2);
> +	return sizeof(struct gpu_metrics_v1_3);
>  }
> 
>  static int aldebaran_mode2_reset(struct smu_context *smu)
> --
> 2.17.1
> 
> _______________________________________________
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> amd-gfx@lists.freedesktop.org
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> gfx&amp;data=04%7C01%7Cevan.quan%40amd.com%7C1360514bfba14bf2f
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      reply	other threads:[~2021-06-08  2:19 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-07 13:44 [PATCH v5 1/9] drm/amd/pm: Add u64 throttler status field to gpu_metrics Graham Sider
2021-06-07 13:44 ` [PATCH v5 2/9] drm/amd/pm: Add ASIC independent throttle bits Graham Sider
2021-06-07 13:44 ` [PATCH v5 3/9] drm/amd/pm: Add common throttler translation func Graham Sider
2021-06-07 13:44 ` [PATCH v5 4/9] drm/amd/pm: Add arcturus throttler translation Graham Sider
2021-06-07 13:44 ` [PATCH v5 5/9] drm/amd/pm: Add navi1x " Graham Sider
2021-06-07 13:44 ` [PATCH v5 6/9] drm/amd/pm: Add sienna cichlid " Graham Sider
2021-06-07 13:44 ` [PATCH v5 7/9] drm/amd/pm: Add vangogh " Graham Sider
2021-06-07 14:35   ` Lazar, Lijo
2021-06-07 14:53     ` Sider, Graham
2021-06-08  7:26       ` Lazar, Lijo
2021-06-07 13:44 ` [PATCH v5 8/9] drm/amd/pm: Add renoir " Graham Sider
2021-06-07 13:44 ` [PATCH v5 9/9] drm/amd/pm: Add aldebaran " Graham Sider
2021-06-08  2:19   ` Quan, Evan [this message]

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