From: Vidya Sagar <vidyas@nvidia.com> To: Raul Tambre <raul@tambre.ee>, bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh+dt@kernel.org, thierry.reding@gmail.com, jonathanh@nvidia.com Cc: kishon@ti.com, vkoul@kernel.org, kw@linux.com, krzk@kernel.org, p.zabel@pengutronix.de, mperttunen@nvidia.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, kthota@nvidia.com, mmaddireddy@nvidia.com, sagar.tv@gmail.com Subject: Re: [PATCH V2 2/8] dt-bindings: PCI: tegra: Add device tree support for Tegra234 Date: Sat, 23 Apr 2022 20:41:39 +0530 [thread overview] Message-ID: <26c0caf1-4cfc-9c7d-ac51-180ba4501bf5@nvidia.com> (raw) In-Reply-To: <50b80804-e95c-2137-5d74-2451e5bb826f@tambre.ee> On 4/23/2022 7:57 PM, Raul Tambre wrote: > External email: Use caution opening links or attachments > > > On 2022-04-23 15:48, Vidya Sagar wrote: >> @@ -47,16 +64,33 @@ Required properties: >> "p2u-N": where N ranges from 0 to one less than the total number >> of lanes >> - nvidia,bpmp: Must contain a pair of phandle to BPMP controller >> node followed >> by controller-id. Following are the controller ids for each >> controller. >> + Tegra194: >> + --------- >> 0: C0 >> 1: C1 >> 2: C2 >> 3: C3 >> 4: C4 >> 5: C5 >> + Tegra194: > > Should this be Tegra234? Yes. Oops... How did I miss this? My bad. > >> + --------- >> + 0 : C0 >> + 1 : C1 >> + 2 : C2 >> + 3 : C3 >> + 4 : C4 >> + 5 : C5 >> + 6 : C6 >> + 7 : C7 >> + 8 : C8 >> + 9 : C9 >> + 10: C10 >
WARNING: multiple messages have this Message-ID (diff)
From: Vidya Sagar <vidyas@nvidia.com> To: Raul Tambre <raul@tambre.ee>, bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh+dt@kernel.org, thierry.reding@gmail.com, jonathanh@nvidia.com Cc: kishon@ti.com, vkoul@kernel.org, kw@linux.com, krzk@kernel.org, p.zabel@pengutronix.de, mperttunen@nvidia.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, kthota@nvidia.com, mmaddireddy@nvidia.com, sagar.tv@gmail.com Subject: Re: [PATCH V2 2/8] dt-bindings: PCI: tegra: Add device tree support for Tegra234 Date: Sat, 23 Apr 2022 20:41:39 +0530 [thread overview] Message-ID: <26c0caf1-4cfc-9c7d-ac51-180ba4501bf5@nvidia.com> (raw) In-Reply-To: <50b80804-e95c-2137-5d74-2451e5bb826f@tambre.ee> On 4/23/2022 7:57 PM, Raul Tambre wrote: > External email: Use caution opening links or attachments > > > On 2022-04-23 15:48, Vidya Sagar wrote: >> @@ -47,16 +64,33 @@ Required properties: >> "p2u-N": where N ranges from 0 to one less than the total number >> of lanes >> - nvidia,bpmp: Must contain a pair of phandle to BPMP controller >> node followed >> by controller-id. Following are the controller ids for each >> controller. >> + Tegra194: >> + --------- >> 0: C0 >> 1: C1 >> 2: C2 >> 3: C3 >> 4: C4 >> 5: C5 >> + Tegra194: > > Should this be Tegra234? Yes. Oops... How did I miss this? My bad. > >> + --------- >> + 0 : C0 >> + 1 : C1 >> + 2 : C2 >> + 3 : C3 >> + 4 : C4 >> + 5 : C5 >> + 6 : C6 >> + 7 : C7 >> + 8 : C8 >> + 9 : C9 >> + 10: C10 > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2022-04-23 15:12 UTC|newest] Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-04-23 12:48 [PATCH V2 0/8] PCI: tegra: Add Tegra234 PCIe support Vidya Sagar 2022-04-23 12:48 ` Vidya Sagar 2022-04-23 12:48 ` [PATCH V2 1/8] dt-bindings: PHY: P2U: Add support for Tegra234 P2U block Vidya Sagar 2022-04-23 12:48 ` Vidya Sagar 2022-05-02 22:25 ` Rob Herring 2022-05-02 22:25 ` Rob Herring 2022-04-23 12:48 ` [PATCH V2 2/8] dt-bindings: PCI: tegra: Add device tree support for Tegra234 Vidya Sagar 2022-04-23 12:48 ` Vidya Sagar 2022-04-23 14:27 ` Raul Tambre 2022-04-23 14:27 ` Raul Tambre 2022-04-23 15:11 ` Vidya Sagar [this message] 2022-04-23 15:11 ` Vidya Sagar 2022-05-02 22:28 ` Rob Herring 2022-05-02 22:28 ` Rob Herring 2022-04-23 12:48 ` [PATCH V2 3/8] arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT Vidya Sagar 2022-04-23 12:48 ` Vidya Sagar 2022-04-23 12:48 ` [PATCH V2 4/8] arm64: tegra: Enable PCIe slots in P3737-0000 board Vidya Sagar 2022-04-23 12:48 ` Vidya Sagar 2022-04-23 12:48 ` [PATCH V2 5/8] phy: tegra: Add PCIe PIPE2UPHY support for Tegra234 Vidya Sagar 2022-04-23 12:48 ` Vidya Sagar 2022-04-23 12:48 ` [PATCH V2 6/8] PCI: Disable MSI for Tegra234 root ports Vidya Sagar 2022-04-23 12:48 ` Vidya Sagar 2022-04-23 12:48 ` [PATCH V2 7/8] Revert "PCI: tegra194: Rename tegra_pcie_dw to tegra194_pcie" Vidya Sagar 2022-04-23 12:48 ` Vidya Sagar 2022-04-23 12:48 ` [PATCH V2 8/8] PCI: tegra: Add Tegra234 PCIe support Vidya Sagar 2022-04-23 12:48 ` Vidya Sagar 2022-04-24 9:40 ` Raul Tambre 2022-04-24 9:40 ` Raul Tambre
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=26c0caf1-4cfc-9c7d-ac51-180ba4501bf5@nvidia.com \ --to=vidyas@nvidia.com \ --cc=bhelgaas@google.com \ --cc=devicetree@vger.kernel.org \ --cc=jonathanh@nvidia.com \ --cc=kishon@ti.com \ --cc=krzk@kernel.org \ --cc=kthota@nvidia.com \ --cc=kw@linux.com \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-pci@vger.kernel.org \ --cc=linux-phy@lists.infradead.org \ --cc=linux-tegra@vger.kernel.org \ --cc=lorenzo.pieralisi@arm.com \ --cc=mmaddireddy@nvidia.com \ --cc=mperttunen@nvidia.com \ --cc=p.zabel@pengutronix.de \ --cc=raul@tambre.ee \ --cc=robh+dt@kernel.org \ --cc=sagar.tv@gmail.com \ --cc=thierry.reding@gmail.com \ --cc=vkoul@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.