* [PATCH] mmc: mtk-sd: increase the minimum bus frequency @ 2021-03-05 2:30 ` Weijie Gao 2021-03-05 2:44 ` Jaehoon Chung 0 siblings, 1 reply; 3+ messages in thread From: Weijie Gao @ 2021-03-05 2:30 UTC (permalink / raw) To: u-boot With a 48MHz input clock, the lowest bus frequency can be as low as 48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause the mmc framework take seconds to finish the initialization. Limiting the minimum bus frequency to a slightly higher value can solve the issue without any side effects. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> --- drivers/mmc/mtk-sd.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c index 3b9c12266a..1e1726ef31 100644 --- a/drivers/mmc/mtk-sd.c +++ b/drivers/mmc/mtk-sd.c @@ -232,6 +232,8 @@ #define SCLK_CYCLES_SHIFT 20 +#define MIN_BUS_CLK 260000 + #define CMD_INTS_MASK \ (MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO) @@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice *dev) else cfg->f_min = host->src_clk_freq / (4 * 4095); + if (cfg->f_min < MIN_BUS_CLK) + cfg->f_min = MIN_BUS_CLK; + cfg->f_max = host->src_clk_freq; cfg->b_max = 1024; -- 2.17.1 ^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH] mmc: mtk-sd: increase the minimum bus frequency 2021-03-05 2:30 ` [PATCH] mmc: mtk-sd: increase the minimum bus frequency Weijie Gao @ 2021-03-05 2:44 ` Jaehoon Chung 2021-03-05 2:49 ` Weijie Gao 0 siblings, 1 reply; 3+ messages in thread From: Jaehoon Chung @ 2021-03-05 2:44 UTC (permalink / raw) To: u-boot Dear Waijie, On 3/5/21 11:30 AM, Weijie Gao wrote: > With a 48MHz input clock, the lowest bus frequency can be as low as > 48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause > the mmc framework take seconds to finish the initialization. > > Limiting the minimum bus frequency to a slightly higher value can solve the > issue without any side effects. > > Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> > --- > drivers/mmc/mtk-sd.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c > index 3b9c12266a..1e1726ef31 100644 > --- a/drivers/mmc/mtk-sd.c > +++ b/drivers/mmc/mtk-sd.c > @@ -232,6 +232,8 @@ > > #define SCLK_CYCLES_SHIFT 20 > > +#define MIN_BUS_CLK 260000 Is there any reason to define 260KHz? According to specification, clock frequency should be chosen one of {100000, 200000, 300000, 400000}. How about defined one of them? Best Regards, Jaehoon Chung > + > #define CMD_INTS_MASK \ > (MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO) > > @@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice *dev) > else > cfg->f_min = host->src_clk_freq / (4 * 4095); > > + if (cfg->f_min < MIN_BUS_CLK) > + cfg->f_min = MIN_BUS_CLK; > + > cfg->f_max = host->src_clk_freq; > > cfg->b_max = 1024; > ^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH] mmc: mtk-sd: increase the minimum bus frequency 2021-03-05 2:44 ` Jaehoon Chung @ 2021-03-05 2:49 ` Weijie Gao 0 siblings, 0 replies; 3+ messages in thread From: Weijie Gao @ 2021-03-05 2:49 UTC (permalink / raw) To: u-boot On Fri, 2021-03-05 at 11:44 +0900, Jaehoon Chung wrote: > Dear Waijie, > > On 3/5/21 11:30 AM, Weijie Gao wrote: > > With a 48MHz input clock, the lowest bus frequency can be as low as > > 48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause > > the mmc framework take seconds to finish the initialization. > > > > Limiting the minimum bus frequency to a slightly higher value can solve the > > issue without any side effects. > > > > Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> > > --- > > drivers/mmc/mtk-sd.c | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c > > index 3b9c12266a..1e1726ef31 100644 > > --- a/drivers/mmc/mtk-sd.c > > +++ b/drivers/mmc/mtk-sd.c > > @@ -232,6 +232,8 @@ > > > > #define SCLK_CYCLES_SHIFT 20 > > > > +#define MIN_BUS_CLK 260000 > > Is there any reason to define 260KHz? > According to specification, clock frequency should be chosen one of {100000, 200000, 300000, 400000}. > > How about defined one of them? This value is picked up from an old version driver (named msdc) [1]. Of course it's completely OK to change it to a standard value from the specification. [1] https://github.com/MediaTek-Labs/linkit-smart-7688-uboot/blob/master/drivers/msdc/msdc.h#L94 > > Best Regards, > Jaehoon Chung > > > + > > #define CMD_INTS_MASK \ > > (MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO) > > > > @@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice *dev) > > else > > cfg->f_min = host->src_clk_freq / (4 * 4095); > > > > + if (cfg->f_min < MIN_BUS_CLK) > > + cfg->f_min = MIN_BUS_CLK; > > + > > cfg->f_max = host->src_clk_freq; > > > > cfg->b_max = 1024; > > > ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2021-03-05 2:49 UTC | newest]
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2021-03-05 2:30 ` [PATCH] mmc: mtk-sd: increase the minimum bus frequency Weijie Gao
2021-03-05 2:44 ` Jaehoon Chung
2021-03-05 2:49 ` Weijie Gao
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