* Re: [OpenWrt-Devel] How to initialize multiple phy radios
[not found] ` <CA+i30h-Y_rB0kZfgWifk14Zw1CCkGZH5x5zf8+OH-GTwswXh3w@mail.gmail.com>
@ 2016-04-24 10:48 ` Christian Lamparter
2016-04-25 15:21 ` Valo, Kalle
0 siblings, 1 reply; 7+ messages in thread
From: Christian Lamparter @ 2016-04-24 10:48 UTC (permalink / raw)
To: David Hutchison; +Cc: OpenWrt Development List, ath10k
On Sunday, April 24, 2016 01:16:11 AM David Hutchison wrote:
> I spoke too soon:
> https://pci-ids.ucw.cz/read/PC/168c/0050
>
> It is the QCA9887, so it's definitely on the PCIe bus and is being seen.
Does ath10k support the QCA9887? I see no entry for this pci-id (168c:0050)
in ath10k's pci table [0] and there's no definition of it in the hardware
header either [1]. The chip-id is also not present. I CC'ed ath10k, since
this seems to be a new chip that might be easy to add.
> On Sun, Apr 24, 2016 at 1:13 AM, David Hutchison
> <dhutchison@bluemesh.net> wrote:
> > Here is the PCI noise is in the kernel log from ath79_register_pci():
> >
> > [ 0.510000] PCI host bridge to bus 0000:00
> > [ 0.510000] pci_bus 0000:00: root bus resource [mem 0x10000000-0x11ffffff]
> > [ 0.520000] pci_bus 0000:00: root bus resource [io 0x0000]
> > [ 0.520000] pci_bus 0000:00: No busn resource found for root bus,
> > will use [bus 00-ff]
> > [ 0.530000] pci 0000:00:00.0: [168c:0050] type 00 class 0x028000
> > [ 0.530000] pci 0000:00:00.0: reg 10: [mem 0x10000000-0x101fffff 64bit]
> > [ 0.530000] pci 0000:00:00.0: reg 30: [mem 0x00000000-0x0000ffff pref]
> > [ 0.530000] pci 0000:00:00.0: supports D1
> > [ 0.530000] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
> > [ 0.530000] pci_bus 0000:00: busn_res: [bus 00-ff] end is updated to 00
> > [ 0.530000] pci 0000:00:00.0: BAR 0: assigned [mem
> > 0x10000000-0x101fffff 64bit]
> > [ 0.530000] pci 0000:00:00.0: BAR 6: assigned [mem
> > 0x10200000-0x1020ffff pref]
> > [ 0.540000] pci 0000:00:00.0: using irq 40 for pin 1
> >
> > I compiled lspci in and it reports:
> > 00:00.0 Class 0280: 168c:0050
> >
> > As far as I know that's just a vendor/product ID, I tried looking it
> > up to verify that it was indeed the atheros qca988x but couldn't find
> > anything for certain.
> >
> > I verified ath10k is loaded:
> > ath10k_pci 27629 0
> > ath10k_core 247226 1 ath10k_pci
> > ath 18726 4 ath10k_core,ath9k,ath9k_common,ath9k_hw
> > mac80211 389729 2 ath10k_core,ath9k
> > cfg80211 217396 5 ath10k_core,ath9k,ath9k_common,ath,mac80211
> > compat 19304 7
> > ath10k_pci,ath10k_core,ath9k,ath9k_common,ath9k_hw,mac80211,cfg80211
> >
Regards,
Christian
[0] <https://git.kernel.org/cgit/linux/kernel/git/wireless/wireless-testing.git/tree/drivers/net/wireless/ath/ath10k/pci.c#n60>
[1] <https://git.kernel.org/cgit/linux/kernel/git/wireless/wireless-testing.git/tree/drivers/net/wireless/ath/ath10k/hw.h#n25>
_______________________________________________
ath10k mailing list
ath10k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath10k
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [OpenWrt-Devel] How to initialize multiple phy radios
2016-04-24 10:48 ` [OpenWrt-Devel] How to initialize multiple phy radios Christian Lamparter
@ 2016-04-25 15:21 ` Valo, Kalle
2016-04-25 16:53 ` David Hutchison
0 siblings, 1 reply; 7+ messages in thread
From: Valo, Kalle @ 2016-04-25 15:21 UTC (permalink / raw)
To: Christian Lamparter; +Cc: David Hutchison, OpenWrt Development List, ath10k
Christian Lamparter <chunkeey@googlemail.com> writes:
> On Sunday, April 24, 2016 01:16:11 AM David Hutchison wrote:
>> I spoke too soon:
>> https://pci-ids.ucw.cz/read/PC/168c/0050
>>
>> It is the QCA9887, so it's definitely on the PCIe bus and is being
>> seen.
>
> Does ath10k support the QCA9887? I see no entry for this pci-id (168c:0050)
> in ath10k's pci table [0] and there's no definition of it in the hardware
> header either [1]. The chip-id is also not present. I CC'ed ath10k, since
> this seems to be a new chip that might be easy to add.
Currently ath10k does not support QCA9887.
--
Kalle Valo
_______________________________________________
ath10k mailing list
ath10k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath10k
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [OpenWrt-Devel] How to initialize multiple phy radios
2016-04-25 15:21 ` Valo, Kalle
@ 2016-04-25 16:53 ` David Hutchison
2016-04-25 19:01 ` Christian Lamparter
0 siblings, 1 reply; 7+ messages in thread
From: David Hutchison @ 2016-04-25 16:53 UTC (permalink / raw)
To: Valo, Kalle; +Cc: Christian Lamparter, OpenWrt Development List, ath10k
Hello,
So with some modifications to pci.c, hw.h and core.c I was able to get
the radio initialized! :)
pci.c: added QCA9887_DEVICE_ID, modified ath10k_pci_id_table and
ath10k_pci_supp_chips
core.c: Duplicated QCA988X entry in ath10k_hw_params_list and passed
0x4100016d as the ID ( left everything else the same )
hw.h: added definitions for QCA9887
I found "https://github.com/kvalo/ath10k-firmware/blob/master/QCA9887/firmware-5.bin_10.2.3.31.7-1"
on your github and replaced
/lib/firmware/ath10k/QCA988X/hw2.0/firmware-5.bin on my board.
hotplug.d then loaded QCA9887 firmware on next boot.
Of course my approach was very much a hack. If there is anything I can
contribute to creating a patch for ath10k, please let me know. I would
love to help!
dmesg
[ 18.920000] ath10k_pci 0000:00:00.0: pci irq legacy interrupts 0
irq_mode 0 reset_mode 0
[ 19.030000] rev_id 00000000 QCA9887
[ 19.030000] dev_id 00000050 QCA9887
[ 20.460000] ath10k_pci 0000:00:00.0: qca988x hw2.0 (0x4100016d,
0x004000ff sub 0000:0000) fw 10.2.3.31.7-1 fwapi 5 bdapi 1 htt-ver 2.1
wmi-op 5 htt-op 2 cal file max-sta 1p
[ 20.480000] ath10k_pci 0000:00:00.0: debug 1 debugfs 1 tracing 0
dfs 0 testmode 1
iw phy phy1 info
Wiphy phy1
max # scan SSIDs: 16
max scan IEs length: 199 bytes
Retry short limit: 7
Retry long limit: 4
Coverage class: 0 (up to 0m)
Device supports AP-side u-APSD.
Available Antennas: TX 0x1 RX 0x1
Configured Antennas: TX 0x1 RX 0x1
Supported interface modes:
* managed
* AP
* AP/VLAN
* monitor
* mesh point
Band 2:
Capabilities: 0x19e3
RX LDPC
HT20/HT40
Static SM Power Save
RX HT20 SGI
RX HT40 SGI
TX STBC
RX STBC 1-stream
Max AMSDU length: 7935 bytes
DSSS/CCK HT40
Maximum RX AMPDU length 65535 bytes (exponent: 0x003)
Minimum RX AMPDU time spacing: 8 usec (0x06)
HT TX/RX MCS rate indexes supported: 0-7
VHT Capabilities (0x338001b2):
Max MPDU length: 11454
Supported Channel Width: neither 160 nor 80+80
RX LDPC
short GI (80 MHz)
TX STBC
RX antenna pattern consistency
TX antenna pattern consistency
VHT RX MCS set:
1 streams: MCS 0-9
2 streams: not supported
3 streams: not supported
4 streams: not supported
5 streams: not supported
6 streams: not supported
7 streams: not supported
8 streams: not supported
VHT RX highest supported: 0 Mbps
VHT TX MCS set:
1 streams: MCS 0-9
2 streams: not supported
3 streams: not supported
4 streams: not supported
5 streams: not supported
6 streams: not supported
7 streams: not supported
8 streams: not supported
VHT TX highest supported: 0 Mbps
Frequencies:
* 5180 MHz [36] (23.0 dBm)
* 5200 MHz [40] (23.0 dBm)
* 5220 MHz [44] (23.0 dBm)
* 5240 MHz [48] (23.0 dBm)
* 5260 MHz [52] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5280 MHz [56] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5300 MHz [60] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5320 MHz [64] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5500 MHz [100] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5520 MHz [104] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5540 MHz [108] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5560 MHz [112] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5580 MHz [116] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5600 MHz [120] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5620 MHz [124] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5640 MHz [128] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5660 MHz [132] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5680 MHz [136] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5700 MHz [140] (23.0 dBm) (no IR, radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5720 MHz [144] (23.0 dBm) (radar detection)
DFS state: usable (for 39 sec)
DFS CAC time: 60000 ms
* 5745 MHz [149] (30.0 dBm)
* 5765 MHz [153] (30.0 dBm)
* 5785 MHz [157] (30.0 dBm)
* 5805 MHz [161] (30.0 dBm)
* 5825 MHz [165] (30.0 dBm)
valid interface combinations:
* #{ AP, mesh point } <= 8,
total <= 8, #channels <= 1, STA/AP BI must match
HT Capability overrides:
* MCS: ff ff ff ff ff ff ff ff ff ff
* maximum A-MSDU length
* supported channel width
* short GI for 40 MHz
* max A-MPDU length exponent
* min MPDU start spacing
-- Davey
On Mon, Apr 25, 2016 at 9:21 AM, Valo, Kalle <kvalo@qca.qualcomm.com> wrote:
> Christian Lamparter <chunkeey@googlemail.com> writes:
>
>> On Sunday, April 24, 2016 01:16:11 AM David Hutchison wrote:
>>> I spoke too soon:
>>> https://pci-ids.ucw.cz/read/PC/168c/0050
>>>
>>> It is the QCA9887, so it's definitely on the PCIe bus and is being
>>> seen.
>>
>> Does ath10k support the QCA9887? I see no entry for this pci-id (168c:0050)
>> in ath10k's pci table [0] and there's no definition of it in the hardware
>> header either [1]. The chip-id is also not present. I CC'ed ath10k, since
>> this seems to be a new chip that might be easy to add.
>
> Currently ath10k does not support QCA9887.
>
> --
> Kalle Valo
_______________________________________________
ath10k mailing list
ath10k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath10k
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [OpenWrt-Devel] How to initialize multiple phy radios
2016-04-25 16:53 ` David Hutchison
@ 2016-04-25 19:01 ` Christian Lamparter
2016-04-25 22:14 ` David Hutchison
2016-04-26 7:20 ` Valo, Kalle
0 siblings, 2 replies; 7+ messages in thread
From: Christian Lamparter @ 2016-04-25 19:01 UTC (permalink / raw)
To: David Hutchison; +Cc: Valo, Kalle, OpenWrt Development List, ath10k
Hello,
On Monday, April 25, 2016 10:53:41 AM David Hutchison wrote:
> So with some modifications to pci.c, hw.h and core.c I was able to get
> the radio initialized! :)
Hey, that's nice! Can you make and post a patch for that?
I'm sure if it's just a matter of adding the new pci and chip
ids to the tables. You could just go ahead and post it, so it
will be picked up.
> pci.c: added QCA9887_DEVICE_ID, modified ath10k_pci_id_table and
> ath10k_pci_supp_chips
> core.c: Duplicated QCA988X entry in ath10k_hw_params_list and passed
> 0x4100016d as the ID ( left everything else the same )
> hw.h: added definitions for QCA9887
>
> I found "https://github.com/kvalo/ath10k-firmware/blob/master/QCA9887/firmware-5.bin_10.2.3.31.7-1"
> on your github and replaced
> /lib/firmware/ath10k/QCA988X/hw2.0/firmware-5.bin on my board.
> hotplug.d then loaded QCA9887 firmware on next boot.
>
> Of course my approach was very much a hack. If there is anything I can
> contribute to creating a patch for ath10k, please let me know. I would
> love to help!
>
> dmesg
> [ 18.920000] ath10k_pci 0000:00:00.0: pci irq legacy interrupts 0
> irq_mode 0 reset_mode 0
> [ 19.030000] rev_id 00000000 QCA9887
> [ 19.030000] dev_id 00000050 QCA9887
> [ 20.460000] ath10k_pci 0000:00:00.0: qca988x hw2.0 (0x4100016d,
> 0x004000ff sub 0000:0000) fw 10.2.3.31.7-1 fwapi 5 bdapi 1 htt-ver 2.1
> wmi-op 5 htt-op 2 cal file max-sta 1p
> [ 20.480000] ath10k_pci 0000:00:00.0: debug 1 debugfs 1 tracing 0
> dfs 0 testmode 1
>
...
Does the device work? Can you scan for networks, connect to networks
and create networks? That would be good to know.
Regards,
Christian
_______________________________________________
ath10k mailing list
ath10k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath10k
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [OpenWrt-Devel] How to initialize multiple phy radios
2016-04-25 19:01 ` Christian Lamparter
@ 2016-04-25 22:14 ` David Hutchison
2016-04-26 7:20 ` Valo, Kalle
1 sibling, 0 replies; 7+ messages in thread
From: David Hutchison @ 2016-04-25 22:14 UTC (permalink / raw)
To: Christian Lamparter; +Cc: Valo, Kalle, OpenWrt Development List, ath10k
Scanning appears to work ( iw dev wlan1 scan ) ,
As soon as I try to use hostapd to run as an AP I get:
[20475.140000] ath10k_pci 0000:00:00.0: firmware crashed! (uuid
b826d45e-e51f-4beb-a489-6b7a4d5c6f76)
[20475.150000] ath10k_pci 0000:00:00.0: qca988x hw2.0 (0x4100016d,
0x004000ff sub 0000:0000) fw 10.2.3.31.7-1 fwapi 5 bdapi 1 htt-ver 2.1
wmi-op 5 htt-op 2 cal file max-sta 1p
[20475.170000] ath10k_pci 0000:00:00.0: debug 1 debugfs 1 tracing 0
dfs 0 testmode 1
[20475.180000] ath10k_pci 0000:00:00.0: firmware register dump:
[20475.180000] ath10k_pci 0000:00:00.0: [00]: 0x4100016D 0x00000000
0x004146C8 0x004146C8
[20475.190000] ath10k_pci 0000:00:00.0: [04]: 0x004146C8 0x00060530
0x0000001F 0x00955A00
[20475.200000] ath10k_pci 0000:00:00.0: [08]: 0x0040AE04 0x00400000
0x00000007 0x00000000
[20475.210000] ath10k_pci 0000:00:00.0: [12]: 0x00000002 0xFFFFFFFF
0x00958360 0x0095836B
[20475.210000] ath10k_pci 0000:00:00.0: [16]: 0x809ACDE0 0x0040AD94
0x0040AE04 0x00400000
[20475.220000] ath10k_pci 0000:00:00.0: [20]: 0x00000000 0x00000000
0x00000000 0x0040E830
[20475.230000] ath10k_pci 0000:00:00.0: [24]: 0x809AC4E2 0x0040ADC4
0x00000001 0x0040AE04
[20475.240000] ath10k_pci 0000:00:00.0: [28]: 0x004133E0 0x00000001
0x0040AE08 0x00000000
[20475.250000] ath10k_pci 0000:00:00.0: [32]: 0x00000007 0x00000000
0x00000000 0x004133C8
[20475.260000] ath10k_pci 0000:00:00.0: [36]: 0x809B9C49 0x0040ADE4
0x00411568 0x0041158C
[20475.260000] ath10k_pci 0000:00:00.0: [40]: 0x00000001 0x00000000
0x00955A00 0x0040E840
[20475.270000] ath10k_pci 0000:00:00.0: [44]: 0x809B944C 0x0040AE04
0x00000001 0x00000000
[20475.280000] ath10k_pci 0000:00:00.0: [48]: 0x0040AE04 0x00000001
0x004133C8 0x004117AC
[20475.290000] ath10k_pci 0000:00:00.0: [52]: 0x809B9263 0x0040AEA4
0x0041ECF8 0x00411BC8
[20475.300000] ath10k_pci 0000:00:00.0: [56]: 0x004133C8 0x0040AE34
0x00411F08 0x00411F08
[20475.410000] ieee80211 phy1: Hardware restart was requested
-- Davey
On Mon, Apr 25, 2016 at 1:01 PM, Christian Lamparter
<chunkeey@googlemail.com> wrote:
> Hello,
>
> On Monday, April 25, 2016 10:53:41 AM David Hutchison wrote:
>> So with some modifications to pci.c, hw.h and core.c I was able to get
>> the radio initialized! :)
>
> Hey, that's nice! Can you make and post a patch for that?
> I'm sure if it's just a matter of adding the new pci and chip
> ids to the tables. You could just go ahead and post it, so it
> will be picked up.
>
>> pci.c: added QCA9887_DEVICE_ID, modified ath10k_pci_id_table and
>> ath10k_pci_supp_chips
>> core.c: Duplicated QCA988X entry in ath10k_hw_params_list and passed
>> 0x4100016d as the ID ( left everything else the same )
>> hw.h: added definitions for QCA9887
>>
>> I found "https://github.com/kvalo/ath10k-firmware/blob/master/QCA9887/firmware-5.bin_10.2.3.31.7-1"
>> on your github and replaced
>> /lib/firmware/ath10k/QCA988X/hw2.0/firmware-5.bin on my board.
>> hotplug.d then loaded QCA9887 firmware on next boot.
>>
>> Of course my approach was very much a hack. If there is anything I can
>> contribute to creating a patch for ath10k, please let me know. I would
>> love to help!
>>
>> dmesg
>> [ 18.920000] ath10k_pci 0000:00:00.0: pci irq legacy interrupts 0
>> irq_mode 0 reset_mode 0
>> [ 19.030000] rev_id 00000000 QCA9887
>> [ 19.030000] dev_id 00000050 QCA9887
>> [ 20.460000] ath10k_pci 0000:00:00.0: qca988x hw2.0 (0x4100016d,
>> 0x004000ff sub 0000:0000) fw 10.2.3.31.7-1 fwapi 5 bdapi 1 htt-ver 2.1
>> wmi-op 5 htt-op 2 cal file max-sta 1p
>> [ 20.480000] ath10k_pci 0000:00:00.0: debug 1 debugfs 1 tracing 0
>> dfs 0 testmode 1
>>
> ...
>
> Does the device work? Can you scan for networks, connect to networks
> and create networks? That would be good to know.
>
> Regards,
> Christian
>
_______________________________________________
ath10k mailing list
ath10k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath10k
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [OpenWrt-Devel] How to initialize multiple phy radios
2016-04-25 19:01 ` Christian Lamparter
2016-04-25 22:14 ` David Hutchison
@ 2016-04-26 7:20 ` Valo, Kalle
2016-04-26 12:21 ` Christian Lamparter
1 sibling, 1 reply; 7+ messages in thread
From: Valo, Kalle @ 2016-04-26 7:20 UTC (permalink / raw)
To: Christian Lamparter; +Cc: David Hutchison, OpenWrt Development List, ath10k
Christian Lamparter <chunkeey@googlemail.com> writes:
> Hello,
>
> On Monday, April 25, 2016 10:53:41 AM David Hutchison wrote:
>> So with some modifications to pci.c, hw.h and core.c I was able to get
>> the radio initialized! :)
>
> Hey, that's nice! Can you make and post a patch for that?
> I'm sure if it's just a matter of adding the new pci and chip
> ids to the tables. You could just go ahead and post it, so it
> will be picked up.
But remember that the basic functionality should somewhat work before we
add the ids to ath10k. The hardware support doesn't need to be perfect
but we should not enable something which is brokend and would just waste
users time.
--
Kalle Valo
_______________________________________________
ath10k mailing list
ath10k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath10k
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [OpenWrt-Devel] How to initialize multiple phy radios
2016-04-26 7:20 ` Valo, Kalle
@ 2016-04-26 12:21 ` Christian Lamparter
0 siblings, 0 replies; 7+ messages in thread
From: Christian Lamparter @ 2016-04-26 12:21 UTC (permalink / raw)
To: Valo, Kalle; +Cc: David Hutchison, OpenWrt Development List, ath10k
On Tuesday, April 26, 2016 07:20:32 AM Valo, Kalle wrote:
> Christian Lamparter <chunkeey@googlemail.com> writes:
> > On Monday, April 25, 2016 10:53:41 AM David Hutchison wrote:
> >> So with some modifications to pci.c, hw.h and core.c I was able to get
> >> the radio initialized! :)
> >
> > Hey, that's nice! Can you make and post a patch for that?
> > I'm sure if it's just a matter of adding the new pci and chip
> > ids to the tables. You could just go ahead and post it, so it
> > will be picked up.
> > [...] Editing...
> > Does the device work? Can you scan for networks, connect to networks
> > and create networks? That would be good to know.
^^^^
> But remember that the basic functionality should somewhat work before we
> add the ids to ath10k. The hardware support doesn't need to be perfect
> but we should not enable something which is brokend and would just waste
> users time.
Don't worry about that, I did include the highlighted sentence in the previous
mail as well (seems like it was lost during editing - readded it).
Anyway, I think David will figure out what's working and what isn't and will
let ath10k-devel know about it.
it.
Regards,
Christian
_______________________________________________
ath10k mailing list
ath10k@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/ath10k
^ permalink raw reply [flat|nested] 7+ messages in thread
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2016-04-24 10:48 ` [OpenWrt-Devel] How to initialize multiple phy radios Christian Lamparter
2016-04-25 15:21 ` Valo, Kalle
2016-04-25 16:53 ` David Hutchison
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all data and code used by this external index.