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From: "André Przywara" <andre.przywara@arm.com>
To: Frank Lee <frank@allwinnertech.com>, tiny.windzz@gmail.com
Cc: linux-kernel@vger.kernel.org, Maxime Ripard <mripard@kernel.org>,
	Vinod Koul <vkoul@kernel.org>,
	dmaengine@vger.kernel.org,
	Dan Williams <dan.j.williams@intel.com>,
	Chen-Yu Tsai <wens@csie.org>,
	linux-arm-kernel@lists.infradead.org,
	Jernej Skrabec <jernej.skrabec@siol.net>
Subject: Re: [RESEND PATCH 05/19] dmaengine: sun6i: Add support for A100 DMA
Date: Sat, 28 Nov 2020 20:31:52 +0000	[thread overview]
Message-ID: <29e575b6-14cb-73f1-512d-9f0f934490ea@arm.com> (raw)
In-Reply-To: <719852c6a9a597bd2e82d01a268ca02b9dee826c.1604988979.git.frank@allwinnertech.com>

On 10/11/2020 06:28, Frank Lee wrote:

Hi,

> From: Yangtao Li <frank@allwinnertech.com>
> 
> The dma of a100 is similar to h6, with some minor changes to
> support greater addressing capabilities.

So apparently those changes are backwards compatible, right?
Why do we need then a new struct now, when this is actually identical to
the existing H6 one?

So as this seems to work with the same settings as the H6, I think we
don't need any change in the driver at the moment, just using the H6
compatible as a fallback in the .dtsi.

Cheers,
Andre

P.S. I understand that Vinod already applied it, and it doesn't hurt to
have that in at the moment, if we fix the compatible usage.

> 
> Add support for it.>
> Signed-off-by: Yangtao Li <frank@allwinnertech.com>
> ---
>  drivers/dma/sun6i-dma.c | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> index f5f9c86c50bc..5cadd4d2b824 100644
> --- a/drivers/dma/sun6i-dma.c
> +++ b/drivers/dma/sun6i-dma.c
> @@ -1173,6 +1173,30 @@ static struct sun6i_dma_config sun50i_a64_dma_cfg = {
>  			     BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
>  };
>  
> +/*
> + * TODO: Add support for more than 4g physical addressing.
> + *
> + * The A100 binding uses the number of dma channels from the
> + * device tree node.
> + */
> +static struct sun6i_dma_config sun50i_a100_dma_cfg = {
> +	.clock_autogate_enable = sun6i_enable_clock_autogate_h3,
> +	.set_burst_length = sun6i_set_burst_length_h3,
> +	.set_drq          = sun6i_set_drq_h6,
> +	.set_mode         = sun6i_set_mode_h6,
> +	.src_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16),
> +	.dst_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16),
> +	.src_addr_widths   = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
> +	.dst_addr_widths   = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
> +	.has_mbus_clk = true,
> +};
> +
>  /*
>   * The H6 binding uses the number of dma channels from the
>   * device tree node.
> @@ -1225,6 +1249,7 @@ static const struct of_device_id sun6i_dma_match[] = {
>  	{ .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
>  	{ .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg },
>  	{ .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg },
> +	{ .compatible = "allwinner,sun50i-a100-dma", .data = &sun50i_a100_dma_cfg },
>  	{ .compatible = "allwinner,sun50i-h6-dma", .data = &sun50i_h6_dma_cfg },
>  	{ /* sentinel */ }
>  };
> 


WARNING: multiple messages have this Message-ID (diff)
From: "André Przywara" <andre.przywara@arm.com>
To: Frank Lee <frank@allwinnertech.com>, tiny.windzz@gmail.com
Cc: Jernej Skrabec <jernej.skrabec@siol.net>,
	Chen-Yu Tsai <wens@csie.org>, Maxime Ripard <mripard@kernel.org>,
	linux-kernel@vger.kernel.org, Vinod Koul <vkoul@kernel.org>,
	dmaengine@vger.kernel.org,
	Dan Williams <dan.j.williams@intel.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [RESEND PATCH 05/19] dmaengine: sun6i: Add support for A100 DMA
Date: Sat, 28 Nov 2020 20:31:52 +0000	[thread overview]
Message-ID: <29e575b6-14cb-73f1-512d-9f0f934490ea@arm.com> (raw)
In-Reply-To: <719852c6a9a597bd2e82d01a268ca02b9dee826c.1604988979.git.frank@allwinnertech.com>

On 10/11/2020 06:28, Frank Lee wrote:

Hi,

> From: Yangtao Li <frank@allwinnertech.com>
> 
> The dma of a100 is similar to h6, with some minor changes to
> support greater addressing capabilities.

So apparently those changes are backwards compatible, right?
Why do we need then a new struct now, when this is actually identical to
the existing H6 one?

So as this seems to work with the same settings as the H6, I think we
don't need any change in the driver at the moment, just using the H6
compatible as a fallback in the .dtsi.

Cheers,
Andre

P.S. I understand that Vinod already applied it, and it doesn't hurt to
have that in at the moment, if we fix the compatible usage.

> 
> Add support for it.>
> Signed-off-by: Yangtao Li <frank@allwinnertech.com>
> ---
>  drivers/dma/sun6i-dma.c | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
> 
> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> index f5f9c86c50bc..5cadd4d2b824 100644
> --- a/drivers/dma/sun6i-dma.c
> +++ b/drivers/dma/sun6i-dma.c
> @@ -1173,6 +1173,30 @@ static struct sun6i_dma_config sun50i_a64_dma_cfg = {
>  			     BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
>  };
>  
> +/*
> + * TODO: Add support for more than 4g physical addressing.
> + *
> + * The A100 binding uses the number of dma channels from the
> + * device tree node.
> + */
> +static struct sun6i_dma_config sun50i_a100_dma_cfg = {
> +	.clock_autogate_enable = sun6i_enable_clock_autogate_h3,
> +	.set_burst_length = sun6i_set_burst_length_h3,
> +	.set_drq          = sun6i_set_drq_h6,
> +	.set_mode         = sun6i_set_mode_h6,
> +	.src_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16),
> +	.dst_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16),
> +	.src_addr_widths   = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
> +	.dst_addr_widths   = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
> +			     BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
> +	.has_mbus_clk = true,
> +};
> +
>  /*
>   * The H6 binding uses the number of dma channels from the
>   * device tree node.
> @@ -1225,6 +1249,7 @@ static const struct of_device_id sun6i_dma_match[] = {
>  	{ .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
>  	{ .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg },
>  	{ .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg },
> +	{ .compatible = "allwinner,sun50i-a100-dma", .data = &sun50i_a100_dma_cfg },
>  	{ .compatible = "allwinner,sun50i-h6-dma", .data = &sun50i_h6_dma_cfg },
>  	{ /* sentinel */ }
>  };
> 


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  parent reply	other threads:[~2020-11-28 22:04 UTC|newest]

Thread overview: 84+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-10  6:20 [RESEND PATCH 00/19] Second step support for A100 Frank Lee
2020-11-10  6:20 ` Frank Lee
2020-11-10  6:22 ` [RESEND PATCH 01/19] pinctrl: sunxi: fix irq bank map for the Allwinner A100 pin controller Frank Lee
2020-11-10  6:22   ` Frank Lee
2020-11-24  8:40   ` Linus Walleij
2020-11-24  8:40     ` Linus Walleij
2020-11-10  6:23 ` [RESEND PATCH 02/19] pinctrl: sunxi: Mark the irq bank not found in sunxi_pinctrl_irq_handler() with WARN_ON Frank Lee
2020-11-10  6:23   ` Frank Lee
2020-11-24  8:41   ` Linus Walleij
2020-11-24  8:41     ` Linus Walleij
2020-11-10  6:24 ` [RESEND PATCH 03/19] pinctrl: sunxi: Always call chained_irq_{enter, exit} in sunxi_pinctrl_irq_handler Frank Lee
2020-11-10  6:24   ` Frank Lee
2020-11-24  8:41   ` Linus Walleij
2020-11-24  8:41     ` Linus Walleij
2020-11-10  6:26 ` [RESEND PATCH 04/19] dt-bindings: dma: allwinner,sun50i-a64-dma: Add A100 compatible Frank Lee
2020-11-10  6:26   ` [RESEND PATCH 04/19] dt-bindings: dma: allwinner, sun50i-a64-dma: " Frank Lee
2020-11-11 22:46   ` [RESEND PATCH 04/19] dt-bindings: dma: allwinner,sun50i-a64-dma: " Rob Herring
2020-11-11 22:46     ` [RESEND PATCH 04/19] dt-bindings: dma: allwinner, sun50i-a64-dma: " Rob Herring
2020-11-18 11:01   ` [RESEND PATCH 04/19] dt-bindings: dma: allwinner,sun50i-a64-dma: " Vinod Koul
2020-11-18 11:01     ` [RESEND PATCH 04/19] dt-bindings: dma: allwinner, sun50i-a64-dma: " Vinod Koul
2020-11-10  6:28 ` [RESEND PATCH 05/19] dmaengine: sun6i: Add support for A100 DMA Frank Lee
2020-11-10  6:28   ` Frank Lee
2020-11-18 10:59   ` Vinod Koul
2020-11-18 10:59     ` Vinod Koul
2020-11-28 20:31   ` André Przywara [this message]
2020-11-28 20:31     ` André Przywara
2020-11-10  6:29 ` [RESEND PATCH 06/19] arm64: allwinner: a100: Add device node for DMA controller Frank Lee
2020-11-10  6:29   ` Frank Lee
2020-11-28 20:34   ` André Przywara
2020-11-28 20:34     ` André Przywara
2020-11-10  6:31 ` [RESEND PATCH 07/19] arm64: dts: allwinner: A100: Add PMU mode Frank Lee
2020-11-10  6:31   ` Frank Lee
2020-11-28 20:47   ` André Przywara
2020-11-28 20:47     ` André Przywara
2020-11-10  6:32 ` [RESEND PATCH 08/19] phy: sun4i-usb: remove enable_pmu_unk1 from sun50i_h6_cfg Frank Lee
2020-11-10  6:32   ` Frank Lee
2020-11-19  6:19   ` Vinod Koul
2020-11-19  6:19     ` Vinod Koul
2020-11-10  6:35 ` [RESEND PATCH 09/19] phy: allwinner: Convert to devm_platform_ioremap_* API Frank Lee
2020-11-10  6:35   ` Frank Lee
2020-11-19  6:20   ` Vinod Koul
2020-11-19  6:20     ` Vinod Koul
2020-11-10  6:36 ` [RESEND PATCH 10/19] dt-bindings: watchdog: sun4i: Add A100 compatible Frank Lee
2020-11-10  6:36   ` Frank Lee
2020-11-11 22:46   ` Rob Herring
2020-11-11 22:46     ` Rob Herring
2020-11-10  6:38 ` [RESEND PATCH 11/19] arm64: dts: allwinner: a100: add watchdog node Frank Lee
2020-11-10  6:38   ` Frank Lee
2020-11-28 20:20   ` André Przywara
2020-11-28 20:20     ` André Przywara
2020-11-10  6:39 ` [RESEND PATCH 12/19] dt-bindings: Add bindings for USB phy on Allwinner A100 Frank Lee
2020-11-10  6:39   ` Frank Lee
2020-11-11 22:50   ` Rob Herring
2020-11-11 22:50     ` Rob Herring
2020-11-28 20:18     ` André Przywara
2020-11-28 20:18       ` André Przywara
2020-12-01 18:44       ` Maxime Ripard
2020-12-01 18:44         ` Maxime Ripard
2020-11-10  6:40 ` [RESEND PATCH 13/19] phy: sun4i-usb: add support for A100 USB PHY Frank Lee
2020-11-10  6:40   ` Frank Lee
2020-11-28 19:39   ` André Przywara
2020-11-28 19:39     ` André Przywara
2020-12-07  1:18   ` André Przywara
2020-12-07  1:18     ` André Przywara
2020-11-10  6:41 ` [RESEND PATCH 14/19] arm64: dts: allwinner: a100: add usb related nodes Frank Lee
2020-11-10  6:41   ` Frank Lee
2020-11-10  6:43 ` [RESEND PATCH 15/19] arm64: allwinner: A100: enable EHCI, OHCI and USB PHY nodes in Perf1 Frank Lee
2020-11-10  6:43   ` Frank Lee
2020-11-10  6:45 ` [RESEND PATCH 16/19] dt-bindings: mmc: sunxi: Add A100 compatibles Frank Lee
2020-11-10  6:45   ` Frank Lee
2020-11-11 22:51   ` Rob Herring
2020-11-11 22:51     ` Rob Herring
2020-11-10  6:46 ` [RESEND PATCH 17/19] mmc: sunxi: add support for A100 mmc controller Frank Lee
2020-11-10  6:46   ` Frank Lee
2020-11-28 19:56   ` André Przywara
2020-11-28 19:56     ` André Przywara
2020-11-29  1:38     ` André Przywara
2020-11-29  1:38       ` André Przywara
2020-11-10  6:48 ` [RESEND PATCH 18/19] arm64: allwinner: a100: Add MMC related nodes Frank Lee
2020-11-10  6:48   ` Frank Lee
2020-11-28 20:07   ` André Przywara
2020-11-28 20:07     ` André Przywara
2020-11-10  6:49 ` [RESEND PATCH 19/19] arm64: dts: allwinner: a100: perf1: Add eMMC and MMC node Frank Lee
2020-11-10  6:49   ` Frank Lee

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