* [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+
@ 2020-04-07 21:55 Bob Paauwe
2020-04-07 21:55 ` [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V15) Bob Paauwe
` (4 more replies)
0 siblings, 5 replies; 13+ messages in thread
From: Bob Paauwe @ 2020-04-07 21:55 UTC (permalink / raw)
To: intel-gfx
Test-with: <20200407215146.5331-1-bob.j.paauwe@intel.com>
Stanislav Lisovskiy (1):
drm/i915: Adding YUV444 packed format support for skl+ (V15)
drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
drivers/gpu/drm/i915/display/intel_sprite.c | 8 ++++++++
drivers/gpu/drm/i915/i915_reg.h | 2 +-
3 files changed, 14 insertions(+), 1 deletion(-)
--
2.21.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V15)
2020-04-07 21:55 [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+ Bob Paauwe
@ 2020-04-07 21:55 ` Bob Paauwe
2020-04-08 7:45 ` Jani Nikula
2020-04-07 22:52 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Adding YUV444 packed format support for skl+ (rev5) Patchwork
` (3 subsequent siblings)
4 siblings, 1 reply; 13+ messages in thread
From: Bob Paauwe @ 2020-04-07 21:55 UTC (permalink / raw)
To: intel-gfx
From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
PLANE_CTL_FORMAT_AYUV is already supported, according to hardware specification.
v2: Edited commit message, removed redundant whitespaces.
v3: Fixed fallthrough logic for the format switch cases.
v4: Yet again fixed fallthrough logic, to reuse code from other case
labels.
v5: Started to use XYUV instead of AYUV, as we don't use alpha.
v6: Removed unneeded initializer for new XYUV format.
v7: Added scaling support for DRM_FORMAT_XYUV
v8: Edited commit message to be more clear about skl+, renamed
PLANE_CTL_FORMAT_AYUV to PLANE_CTL_FORMAT_XYUV as this format
doesn't support per-pixel alpha. Fixed minor code issues.
v9: Moved DRM format check to proper place in intel_framebuffer_init.
v10: Added missing XYUV format to sprite planes for skl+.
v11: Changed DRM_FORMAT_XYUV to be DRM_FORMAT_XYUV8888.
v12: Fixed rebase conflicts
V13: Rebased.
Added format to ICL format lists.
V14: Added format to TGL format lists.
Rebased.
V15: Added format to glk_planar_formats[] and icl_sdr_y_plane_formats[] (Ville)
Placed XYUV8888 before XXVYU2101010 to be more consistent (Ville)
v12:
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
drivers/gpu/drm/i915/display/intel_sprite.c | 8 ++++++++
drivers/gpu/drm/i915/i915_reg.h | 2 +-
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 70ec301fe6e3..3654262570b2 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3342,6 +3342,8 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
return DRM_FORMAT_RGB565;
case PLANE_CTL_FORMAT_NV12:
return DRM_FORMAT_NV12;
+ case PLANE_CTL_FORMAT_XYUV:
+ return DRM_FORMAT_XYUV8888;
case PLANE_CTL_FORMAT_P010:
return DRM_FORMAT_P010;
case PLANE_CTL_FORMAT_P012:
@@ -4586,6 +4588,8 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
case DRM_FORMAT_XRGB16161616F:
case DRM_FORMAT_ARGB16161616F:
return PLANE_CTL_FORMAT_XRGB_16161616F;
+ case DRM_FORMAT_XYUV8888:
+ return PLANE_CTL_FORMAT_XYUV;
case DRM_FORMAT_YUYV:
return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;
case DRM_FORMAT_YVYU:
@@ -6175,6 +6179,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
case DRM_FORMAT_NV12:
+ case DRM_FORMAT_XYUV8888:
case DRM_FORMAT_P010:
case DRM_FORMAT_P012:
case DRM_FORMAT_P016:
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index deda351719db..1a4377c988f5 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -2503,6 +2503,7 @@ static const u32 skl_plane_formats[] = {
DRM_FORMAT_YVYU,
DRM_FORMAT_UYVY,
DRM_FORMAT_VYUY,
+ DRM_FORMAT_XYUV8888,
};
static const u32 skl_planar_formats[] = {
@@ -2521,6 +2522,7 @@ static const u32 skl_planar_formats[] = {
DRM_FORMAT_UYVY,
DRM_FORMAT_VYUY,
DRM_FORMAT_NV12,
+ DRM_FORMAT_XYUV8888,
};
static const u32 glk_planar_formats[] = {
@@ -2539,6 +2541,7 @@ static const u32 glk_planar_formats[] = {
DRM_FORMAT_UYVY,
DRM_FORMAT_VYUY,
DRM_FORMAT_NV12,
+ DRM_FORMAT_XYUV8888,
DRM_FORMAT_P010,
DRM_FORMAT_P012,
DRM_FORMAT_P016,
@@ -2562,6 +2565,7 @@ static const u32 icl_sdr_y_plane_formats[] = {
DRM_FORMAT_Y210,
DRM_FORMAT_Y212,
DRM_FORMAT_Y216,
+ DRM_FORMAT_XYUV8888,
DRM_FORMAT_XVYU2101010,
DRM_FORMAT_XVYU12_16161616,
DRM_FORMAT_XVYU16161616,
@@ -2589,6 +2593,7 @@ static const u32 icl_sdr_uv_plane_formats[] = {
DRM_FORMAT_Y210,
DRM_FORMAT_Y212,
DRM_FORMAT_Y216,
+ DRM_FORMAT_XYUV8888,
DRM_FORMAT_XVYU2101010,
DRM_FORMAT_XVYU12_16161616,
DRM_FORMAT_XVYU16161616,
@@ -2620,6 +2625,7 @@ static const u32 icl_hdr_plane_formats[] = {
DRM_FORMAT_Y210,
DRM_FORMAT_Y212,
DRM_FORMAT_Y216,
+ DRM_FORMAT_XYUV8888,
DRM_FORMAT_XVYU2101010,
DRM_FORMAT_XVYU12_16161616,
DRM_FORMAT_XVYU16161616,
@@ -2790,6 +2796,7 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
case DRM_FORMAT_NV12:
+ case DRM_FORMAT_XYUV8888:
case DRM_FORMAT_P010:
case DRM_FORMAT_P012:
case DRM_FORMAT_P016:
@@ -2854,6 +2861,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
case DRM_FORMAT_NV12:
+ case DRM_FORMAT_XYUV8888:
case DRM_FORMAT_P010:
case DRM_FORMAT_P012:
case DRM_FORMAT_P016:
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1a7bd6db164b..70c02e73e1d8 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6855,7 +6855,7 @@ enum {
#define PLANE_CTL_FORMAT_P012 (5 << 24)
#define PLANE_CTL_FORMAT_XRGB_16161616F (6 << 24)
#define PLANE_CTL_FORMAT_P016 (7 << 24)
-#define PLANE_CTL_FORMAT_AYUV (8 << 24)
+#define PLANE_CTL_FORMAT_XYUV (8 << 24)
#define PLANE_CTL_FORMAT_INDEXED (12 << 24)
#define PLANE_CTL_FORMAT_RGB_565 (14 << 24)
#define ICL_PLANE_CTL_FORMAT_MASK (0x1f << 23)
--
2.21.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Adding YUV444 packed format support for skl+ (rev5)
2020-04-07 21:55 [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+ Bob Paauwe
2020-04-07 21:55 ` [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V15) Bob Paauwe
@ 2020-04-07 22:52 ` Patchwork
2020-04-07 23:19 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2020-04-07 22:52 UTC (permalink / raw)
To: Bob Paauwe; +Cc: intel-gfx
== Series Details ==
Series: Adding YUV444 packed format support for skl+ (rev5)
URL : https://patchwork.freedesktop.org/series/73020/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6c533ea6ac21 drm/i915: Adding YUV444 packed format support for skl+ (V15)
-:9: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#9:
PLANE_CTL_FORMAT_AYUV is already supported, according to hardware specification.
total: 0 errors, 1 warnings, 0 checks, 87 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for Adding YUV444 packed format support for skl+ (rev5)
2020-04-07 21:55 [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+ Bob Paauwe
2020-04-07 21:55 ` [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V15) Bob Paauwe
2020-04-07 22:52 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Adding YUV444 packed format support for skl+ (rev5) Patchwork
@ 2020-04-07 23:19 ` Patchwork
2020-04-07 23:48 ` Paauwe, Bob J
2020-04-08 13:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-04-08 22:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 1 reply; 13+ messages in thread
From: Patchwork @ 2020-04-07 23:19 UTC (permalink / raw)
To: Bob Paauwe; +Cc: intel-gfx
== Series Details ==
Series: Adding YUV444 packed format support for skl+ (rev5)
URL : https://patchwork.freedesktop.org/series/73020/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8269 -> Patchwork_17241
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_17241 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_17241, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_17241:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@execlists:
- fi-icl-dsi: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-icl-dsi/igt@i915_selftest@live@execlists.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-icl-dsi/igt@i915_selftest@live@execlists.html
Known issues
------------
Here are the changes found in Patchwork_17241 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-hsw-4770: [PASS][3] -> [SKIP][4] ([fdo#109271]) +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html
#### Warnings ####
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [DMESG-FAIL][5] ([i915#62] / [i915#95]) -> [SKIP][6] ([fdo#109271])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
- fi-kbl-x1275: [DMESG-WARN][7] ([i915#62] / [i915#92]) -> [DMESG-WARN][8] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-kbl-x1275/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-kbl-x1275/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-kbl-x1275: [DMESG-WARN][9] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][10] ([i915#62] / [i915#92]) +6 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-kbl-x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-kbl-x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (53 -> 47)
------------------------------
Additional (1): fi-kbl-r
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5577 -> IGTPW_4428
* Linux: CI_DRM_8269 -> Patchwork_17241
CI-20190529: 20190529
CI_DRM_8269: 301d0427e2e3108839bf6c36f58dd0b2b5258c25 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_4428: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4428/index.html
IGT_5577: 7ee7e86fd79e4dbb6300ef4c23e50cb699216ae2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17241: 6c533ea6ac21d40eeb4ac157b771579e9bc19b9b @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6c533ea6ac21 drm/i915: Adding YUV444 packed format support for skl+ (V15)
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Adding YUV444 packed format support for skl+ (rev5)
2020-04-07 23:19 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
@ 2020-04-07 23:48 ` Paauwe, Bob J
2020-04-08 7:43 ` Saarinen, Jani
0 siblings, 1 reply; 13+ messages in thread
From: Paauwe, Bob J @ 2020-04-07 23:48 UTC (permalink / raw)
To: intel-gfx
I don't see how the patch would have any effect on execlist selftest. This seems to be some random machine error.
Bob
--
Bob Paauwe
Bob.J.Paauwe@intel.com
IOTG / Platform Software Engineering
Intel Corp. Folsom, CA
(916) 356-6193
(530) 409-0831 (cell)
> -----Original Message-----
> From: Patchwork <patchwork@emeril.freedesktop.org>
> Sent: Tuesday, April 07, 2020 4:19 PM
> To: Paauwe, Bob J <bob.j.paauwe@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: ✗ Fi.CI.BAT: failure for Adding YUV444 packed format support for skl+
> (rev5)
>
> == Series Details ==
>
> Series: Adding YUV444 packed format support for skl+ (rev5)
> URL : https://patchwork.freedesktop.org/series/73020/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_8269 -> Patchwork_17241
> ====================================================
>
> Summary
> -------
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_17241 absolutely need to
> be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_17241, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
> External URL: https://intel-gfx-ci.01.org/tree/drm-
> tip/Patchwork_17241/index.html
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in
> Patchwork_17241:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
> * igt@i915_selftest@live@execlists:
> - fi-icl-dsi: [PASS][1] -> [INCOMPLETE][2]
> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-icl-
> dsi/igt@i915_selftest@live@execlists.html
> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-icl-
> dsi/igt@i915_selftest@live@execlists.html
>
>
> Known issues
> ------------
>
> Here are the changes found in Patchwork_17241 that come from known
> issues:
>
> ### IGT changes ###
>
> #### Issues hit ####
>
> * igt@i915_pm_rpm@basic-pci-d3-state:
> - fi-hsw-4770: [PASS][3] -> [SKIP][4] ([fdo#109271]) +2 similar issues
> [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-hsw-
> 4770/igt@i915_pm_rpm@basic-pci-d3-state.html
> [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-hsw-
> 4770/igt@i915_pm_rpm@basic-pci-d3-state.html
>
>
> #### Warnings ####
>
> * igt@i915_pm_rpm@module-reload:
> - fi-kbl-x1275: [DMESG-FAIL][5] ([i915#62] / [i915#95]) -> [SKIP][6]
> ([fdo#109271])
> [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-kbl-
> x1275/igt@i915_pm_rpm@module-reload.html
> [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-kbl-
> x1275/igt@i915_pm_rpm@module-reload.html
>
> * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
> - fi-kbl-x1275: [DMESG-WARN][7] ([i915#62] / [i915#92]) -> [DMESG-
> WARN][8] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
> [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-kbl-
> x1275/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html
> [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-kbl-
> x1275/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html
>
> * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
> - fi-kbl-x1275: [DMESG-WARN][9] ([i915#62] / [i915#92] / [i915#95]) ->
> [DMESG-WARN][10] ([i915#62] / [i915#92]) +6 similar issues
> [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-kbl-
> x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
> [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-kbl-
> x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
>
>
> [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
> [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
> [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
> [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
>
>
> Participating hosts (53 -> 47)
> ------------------------------
>
> Additional (1): fi-kbl-r
> Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-
> p8600 fi-byt-clapper fi-bdw-samus
>
>
> Build changes
> -------------
>
> * CI: CI-20190529 -> None
> * IGT: IGT_5577 -> IGTPW_4428
> * Linux: CI_DRM_8269 -> Patchwork_17241
>
> CI-20190529: 20190529
> CI_DRM_8269: 301d0427e2e3108839bf6c36f58dd0b2b5258c25 @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGTPW_4428: https://intel-gfx-ci.01.org/tree/drm-
> tip/IGTPW_4428/index.html
> IGT_5577: 7ee7e86fd79e4dbb6300ef4c23e50cb699216ae2 @
> git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
> Patchwork_17241: 6c533ea6ac21d40eeb4ac157b771579e9bc19b9b @
> git://anongit.freedesktop.org/gfx-ci/linux
>
>
> == Linux commits ==
>
> 6c533ea6ac21 drm/i915: Adding YUV444 packed format support for skl+ (V15)
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/tree/drm-
> tip/Patchwork_17241/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Adding YUV444 packed format support for skl+ (rev5)
2020-04-07 23:48 ` Paauwe, Bob J
@ 2020-04-08 7:43 ` Saarinen, Jani
0 siblings, 0 replies; 13+ messages in thread
From: Saarinen, Jani @ 2020-04-08 7:43 UTC (permalink / raw)
To: Paauwe, Bob J, intel-gfx, Vudum, Lakshminarayana
+ Lakshmi.
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Paauwe,
> Bob J
> Sent: keskiviikko 8. huhtikuuta 2020 2.49
> To: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Adding YUV444 packed format
> support for skl+ (rev5)
>
> I don't see how the patch would have any effect on execlist selftest. This seems to
> be some random machine error.
>
> Bob
> --
> Bob Paauwe
> Bob.J.Paauwe@intel.com
> IOTG / Platform Software Engineering
> Intel Corp. Folsom, CA
> (916) 356-6193
> (530) 409-0831 (cell)
>
> > -----Original Message-----
> > From: Patchwork <patchwork@emeril.freedesktop.org>
> > Sent: Tuesday, April 07, 2020 4:19 PM
> > To: Paauwe, Bob J <bob.j.paauwe@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org
> > Subject: ✗ Fi.CI.BAT: failure for Adding YUV444 packed format support
> > for skl+
> > (rev5)
> >
> > == Series Details ==
> >
> > Series: Adding YUV444 packed format support for skl+ (rev5)
> > URL : https://patchwork.freedesktop.org/series/73020/
> > State : failure
> >
> > == Summary ==
> >
> > CI Bug Log - changes from CI_DRM_8269 -> Patchwork_17241
> > ====================================================
> >
> > Summary
> > -------
> >
> > **FAILURE**
> >
> > Serious unknown changes coming with Patchwork_17241 absolutely need
> > to be
> > verified manually.
> >
> > If you think the reported changes have nothing to do with the changes
> > introduced in Patchwork_17241, please notify your bug team to allow them
> > to document this new failure mode, which will reduce false positives in CI.
> >
> > External URL: https://intel-gfx-ci.01.org/tree/drm-
> > tip/Patchwork_17241/index.html
> >
> > Possible new issues
> > -------------------
> >
> > Here are the unknown changes that may have been introduced in
> > Patchwork_17241:
> >
> > ### IGT changes ###
> >
> > #### Possible regressions ####
> >
> > * igt@i915_selftest@live@execlists:
> > - fi-icl-dsi: [PASS][1] -> [INCOMPLETE][2]
> > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-icl-
> > dsi/igt@i915_selftest@live@execlists.html
> > [2]:
> > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-icl-
> > dsi/igt@i915_selftest@live@execlists.html
> >
> >
> > Known issues
> > ------------
> >
> > Here are the changes found in Patchwork_17241 that come from known
> > issues:
> >
> > ### IGT changes ###
> >
> > #### Issues hit ####
> >
> > * igt@i915_pm_rpm@basic-pci-d3-state:
> > - fi-hsw-4770: [PASS][3] -> [SKIP][4] ([fdo#109271]) +2 similar issues
> > [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-hsw-
> > 4770/igt@i915_pm_rpm@basic-pci-d3-state.html
> > [4]:
> > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-hsw-
> > 4770/igt@i915_pm_rpm@basic-pci-d3-state.html
> >
> >
> > #### Warnings ####
> >
> > * igt@i915_pm_rpm@module-reload:
> > - fi-kbl-x1275: [DMESG-FAIL][5] ([i915#62] / [i915#95]) -> [SKIP][6]
> > ([fdo#109271])
> > [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-kbl-
> > x1275/igt@i915_pm_rpm@module-reload.html
> > [6]:
> > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-kbl-
> > x1275/igt@i915_pm_rpm@module-reload.html
> >
> > * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
> > - fi-kbl-x1275: [DMESG-WARN][7] ([i915#62] / [i915#92]) -> [DMESG-
> > WARN][8] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
> > [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-kbl-
> > x1275/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html
> > [8]:
> > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-kbl-
> > x1275/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html
> >
> > * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
> > - fi-kbl-x1275: [DMESG-WARN][9] ([i915#62] / [i915#92] / [i915#95]) ->
> > [DMESG-WARN][10] ([i915#62] / [i915#92]) +6 similar issues
> > [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-kbl-
> > x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
> > [10]:
> > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-kbl-
> > x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
> >
> >
> > [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
> > [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
> > [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
> > [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
> >
> >
> > Participating hosts (53 -> 47)
> > ------------------------------
> >
> > Additional (1): fi-kbl-r
> > Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-
> > p8600 fi-byt-clapper fi-bdw-samus
> >
> >
> > Build changes
> > -------------
> >
> > * CI: CI-20190529 -> None
> > * IGT: IGT_5577 -> IGTPW_4428
> > * Linux: CI_DRM_8269 -> Patchwork_17241
> >
> > CI-20190529: 20190529
> > CI_DRM_8269: 301d0427e2e3108839bf6c36f58dd0b2b5258c25 @
> > git://anongit.freedesktop.org/gfx-ci/linux
> > IGTPW_4428: https://intel-gfx-ci.01.org/tree/drm-
> > tip/IGTPW_4428/index.html
> > IGT_5577: 7ee7e86fd79e4dbb6300ef4c23e50cb699216ae2 @
> > git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
> > Patchwork_17241: 6c533ea6ac21d40eeb4ac157b771579e9bc19b9b @
> > git://anongit.freedesktop.org/gfx-ci/linux
> >
> >
> > == Linux commits ==
> >
> > 6c533ea6ac21 drm/i915: Adding YUV444 packed format support for skl+
> > (V15)
> >
> > == Logs ==
> >
> > For more details see: https://intel-gfx-ci.01.org/tree/drm-
> > tip/Patchwork_17241/index.html
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V15)
2020-04-07 21:55 ` [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V15) Bob Paauwe
@ 2020-04-08 7:45 ` Jani Nikula
2020-04-16 9:10 ` Jani Nikula
0 siblings, 1 reply; 13+ messages in thread
From: Jani Nikula @ 2020-04-08 7:45 UTC (permalink / raw)
To: Bob Paauwe, intel-gfx
On Tue, 07 Apr 2020, Bob Paauwe <bob.j.paauwe@intel.com> wrote:
> From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
>
> PLANE_CTL_FORMAT_AYUV is already supported, according to hardware specification.
>
> v2: Edited commit message, removed redundant whitespaces.
>
> v3: Fixed fallthrough logic for the format switch cases.
>
> v4: Yet again fixed fallthrough logic, to reuse code from other case
> labels.
>
> v5: Started to use XYUV instead of AYUV, as we don't use alpha.
>
> v6: Removed unneeded initializer for new XYUV format.
>
> v7: Added scaling support for DRM_FORMAT_XYUV
>
> v8: Edited commit message to be more clear about skl+, renamed
> PLANE_CTL_FORMAT_AYUV to PLANE_CTL_FORMAT_XYUV as this format
> doesn't support per-pixel alpha. Fixed minor code issues.
>
> v9: Moved DRM format check to proper place in intel_framebuffer_init.
>
> v10: Added missing XYUV format to sprite planes for skl+.
>
> v11: Changed DRM_FORMAT_XYUV to be DRM_FORMAT_XYUV8888.
>
> v12: Fixed rebase conflicts
>
> V13: Rebased.
> Added format to ICL format lists.
>
> V14: Added format to TGL format lists.
> Rebased.
>
> V15: Added format to glk_planar_formats[] and icl_sdr_y_plane_formats[] (Ville)
> Placed XYUV8888 before XXVYU2101010 to be more consistent (Ville)
Okay, so we like to add the changelog of the patch itself to the commit
message, but this is ridiculous wrt the patch and the commit
message. Whoever ends up applying it, please just nuke the changelog. I
don't want that in the logs.
BR,
Jani.
>
> v12:
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
>
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
> drivers/gpu/drm/i915/display/intel_sprite.c | 8 ++++++++
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> 3 files changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 70ec301fe6e3..3654262570b2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3342,6 +3342,8 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
> return DRM_FORMAT_RGB565;
> case PLANE_CTL_FORMAT_NV12:
> return DRM_FORMAT_NV12;
> + case PLANE_CTL_FORMAT_XYUV:
> + return DRM_FORMAT_XYUV8888;
> case PLANE_CTL_FORMAT_P010:
> return DRM_FORMAT_P010;
> case PLANE_CTL_FORMAT_P012:
> @@ -4586,6 +4588,8 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
> case DRM_FORMAT_XRGB16161616F:
> case DRM_FORMAT_ARGB16161616F:
> return PLANE_CTL_FORMAT_XRGB_16161616F;
> + case DRM_FORMAT_XYUV8888:
> + return PLANE_CTL_FORMAT_XYUV;
> case DRM_FORMAT_YUYV:
> return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;
> case DRM_FORMAT_YVYU:
> @@ -6175,6 +6179,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
> case DRM_FORMAT_UYVY:
> case DRM_FORMAT_VYUY:
> case DRM_FORMAT_NV12:
> + case DRM_FORMAT_XYUV8888:
> case DRM_FORMAT_P010:
> case DRM_FORMAT_P012:
> case DRM_FORMAT_P016:
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index deda351719db..1a4377c988f5 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -2503,6 +2503,7 @@ static const u32 skl_plane_formats[] = {
> DRM_FORMAT_YVYU,
> DRM_FORMAT_UYVY,
> DRM_FORMAT_VYUY,
> + DRM_FORMAT_XYUV8888,
> };
>
> static const u32 skl_planar_formats[] = {
> @@ -2521,6 +2522,7 @@ static const u32 skl_planar_formats[] = {
> DRM_FORMAT_UYVY,
> DRM_FORMAT_VYUY,
> DRM_FORMAT_NV12,
> + DRM_FORMAT_XYUV8888,
> };
>
> static const u32 glk_planar_formats[] = {
> @@ -2539,6 +2541,7 @@ static const u32 glk_planar_formats[] = {
> DRM_FORMAT_UYVY,
> DRM_FORMAT_VYUY,
> DRM_FORMAT_NV12,
> + DRM_FORMAT_XYUV8888,
> DRM_FORMAT_P010,
> DRM_FORMAT_P012,
> DRM_FORMAT_P016,
> @@ -2562,6 +2565,7 @@ static const u32 icl_sdr_y_plane_formats[] = {
> DRM_FORMAT_Y210,
> DRM_FORMAT_Y212,
> DRM_FORMAT_Y216,
> + DRM_FORMAT_XYUV8888,
> DRM_FORMAT_XVYU2101010,
> DRM_FORMAT_XVYU12_16161616,
> DRM_FORMAT_XVYU16161616,
> @@ -2589,6 +2593,7 @@ static const u32 icl_sdr_uv_plane_formats[] = {
> DRM_FORMAT_Y210,
> DRM_FORMAT_Y212,
> DRM_FORMAT_Y216,
> + DRM_FORMAT_XYUV8888,
> DRM_FORMAT_XVYU2101010,
> DRM_FORMAT_XVYU12_16161616,
> DRM_FORMAT_XVYU16161616,
> @@ -2620,6 +2625,7 @@ static const u32 icl_hdr_plane_formats[] = {
> DRM_FORMAT_Y210,
> DRM_FORMAT_Y212,
> DRM_FORMAT_Y216,
> + DRM_FORMAT_XYUV8888,
> DRM_FORMAT_XVYU2101010,
> DRM_FORMAT_XVYU12_16161616,
> DRM_FORMAT_XVYU16161616,
> @@ -2790,6 +2796,7 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
> case DRM_FORMAT_UYVY:
> case DRM_FORMAT_VYUY:
> case DRM_FORMAT_NV12:
> + case DRM_FORMAT_XYUV8888:
> case DRM_FORMAT_P010:
> case DRM_FORMAT_P012:
> case DRM_FORMAT_P016:
> @@ -2854,6 +2861,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
> case DRM_FORMAT_UYVY:
> case DRM_FORMAT_VYUY:
> case DRM_FORMAT_NV12:
> + case DRM_FORMAT_XYUV8888:
> case DRM_FORMAT_P010:
> case DRM_FORMAT_P012:
> case DRM_FORMAT_P016:
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 1a7bd6db164b..70c02e73e1d8 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6855,7 +6855,7 @@ enum {
> #define PLANE_CTL_FORMAT_P012 (5 << 24)
> #define PLANE_CTL_FORMAT_XRGB_16161616F (6 << 24)
> #define PLANE_CTL_FORMAT_P016 (7 << 24)
> -#define PLANE_CTL_FORMAT_AYUV (8 << 24)
> +#define PLANE_CTL_FORMAT_XYUV (8 << 24)
> #define PLANE_CTL_FORMAT_INDEXED (12 << 24)
> #define PLANE_CTL_FORMAT_RGB_565 (14 << 24)
> #define ICL_PLANE_CTL_FORMAT_MASK (0x1f << 23)
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Adding YUV444 packed format support for skl+ (rev5)
2020-04-07 21:55 [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+ Bob Paauwe
` (2 preceding siblings ...)
2020-04-07 23:19 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
@ 2020-04-08 13:12 ` Patchwork
2020-04-08 22:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2020-04-08 13:12 UTC (permalink / raw)
To: Bob Paauwe; +Cc: intel-gfx
== Series Details ==
Series: Adding YUV444 packed format support for skl+ (rev5)
URL : https://patchwork.freedesktop.org/series/73020/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8269 -> Patchwork_17241
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/index.html
Known issues
------------
Here are the changes found in Patchwork_17241 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-hsw-4770: [PASS][1] -> [SKIP][2] ([fdo#109271]) +2 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@i915_selftest@live@execlists:
- fi-icl-dsi: [PASS][3] -> [INCOMPLETE][4] ([i915#656])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-icl-dsi/igt@i915_selftest@live@execlists.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-icl-dsi/igt@i915_selftest@live@execlists.html
#### Warnings ####
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [DMESG-FAIL][5] ([i915#62] / [i915#95]) -> [SKIP][6] ([fdo#109271])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
- fi-kbl-x1275: [DMESG-WARN][7] ([i915#62] / [i915#92]) -> [DMESG-WARN][8] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-kbl-x1275/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-kbl-x1275/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-kbl-x1275: [DMESG-WARN][9] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][10] ([i915#62] / [i915#92]) +6 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/fi-kbl-x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/fi-kbl-x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (53 -> 47)
------------------------------
Additional (1): fi-kbl-r
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5577 -> IGTPW_4428
* Linux: CI_DRM_8269 -> Patchwork_17241
CI-20190529: 20190529
CI_DRM_8269: 301d0427e2e3108839bf6c36f58dd0b2b5258c25 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_4428: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4428/index.html
IGT_5577: 7ee7e86fd79e4dbb6300ef4c23e50cb699216ae2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17241: 6c533ea6ac21d40eeb4ac157b771579e9bc19b9b @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6c533ea6ac21 drm/i915: Adding YUV444 packed format support for skl+ (V15)
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for Adding YUV444 packed format support for skl+ (rev5)
2020-04-07 21:55 [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+ Bob Paauwe
` (3 preceding siblings ...)
2020-04-08 13:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-04-08 22:39 ` Patchwork
4 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2020-04-08 22:39 UTC (permalink / raw)
To: Paauwe, Bob J; +Cc: intel-gfx
== Series Details ==
Series: Adding YUV444 packed format support for skl+ (rev5)
URL : https://patchwork.freedesktop.org/series/73020/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8269_full -> Patchwork_17241_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_17241_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_params@invalid-bsd-ring:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#109276])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-iclb4/igt@gem_exec_params@invalid-bsd-ring.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-iclb6/igt@gem_exec_params@invalid-bsd-ring.html
* igt@i915_pm_dc@dc6-dpms:
- shard-iclb: [PASS][3] -> [FAIL][4] ([i915#454])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-iclb1/igt@i915_pm_dc@dc6-dpms.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-iclb2/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_dc@dc6-psr:
- shard-skl: [PASS][5] -> [FAIL][6] ([i915#454])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-skl4/igt@i915_pm_dc@dc6-psr.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-skl9/igt@i915_pm_dc@dc6-psr.html
* igt@kms_cursor_crc@pipe-a-cursor-256x256-random:
- shard-kbl: [PASS][7] -> [FAIL][8] ([i915#54] / [i915#93] / [i915#95]) +3 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-256x256-random.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-256x256-random.html
* igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen:
- shard-apl: [PASS][9] -> [FAIL][10] ([i915#54])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-apl2/igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-apl2/igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen.html
- shard-glk: [PASS][11] -> [FAIL][12] ([i915#54])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-glk3/igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-glk3/igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen.html
- shard-skl: [PASS][13] -> [FAIL][14] ([i915#54]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-skl3/igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-skl7/igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen.html
- shard-kbl: [PASS][15] -> [FAIL][16] ([i915#54])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-kbl6/igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen.html
* igt@kms_draw_crc@draw-method-rgb565-mmap-wc-untiled:
- shard-glk: [PASS][17] -> [FAIL][18] ([i915#52] / [i915#54]) +2 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-glk9/igt@kms_draw_crc@draw-method-rgb565-mmap-wc-untiled.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-glk9/igt@kms_draw_crc@draw-method-rgb565-mmap-wc-untiled.html
* igt@kms_draw_crc@draw-method-xrgb2101010-blt-xtiled:
- shard-skl: [PASS][19] -> [FAIL][20] ([i915#52] / [i915#54])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-skl3/igt@kms_draw_crc@draw-method-xrgb2101010-blt-xtiled.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-skl6/igt@kms_draw_crc@draw-method-xrgb2101010-blt-xtiled.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: [PASS][21] -> [FAIL][22] ([i915#46])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-glk: [PASS][23] -> [FAIL][24] ([i915#34])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-glk7/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-glk6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff:
- shard-apl: [PASS][25] -> [FAIL][26] ([i915#49])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-apl4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-apl4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html
- shard-kbl: [PASS][27] -> [FAIL][28] ([i915#49])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html
- shard-glk: [PASS][29] -> [FAIL][30] ([i915#49])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-glk1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-glk2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render:
- shard-skl: [PASS][31] -> [FAIL][32] ([i915#49])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-skl8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-skl6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [PASS][33] -> [DMESG-WARN][34] ([i915#180]) +4 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- shard-kbl: [PASS][35] -> [INCOMPLETE][36] ([i915#155]) +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-kbl: [PASS][37] -> [DMESG-WARN][38] ([i915#180] / [i915#93] / [i915#95])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [PASS][39] -> [FAIL][40] ([fdo#108145] / [i915#265]) +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [PASS][41] -> [SKIP][42] ([fdo#109441])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-iclb8/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@perf@gen12-mi-rpc:
- shard-tglb: [PASS][43] -> [FAIL][44] ([i915#1085])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-tglb8/igt@perf@gen12-mi-rpc.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-tglb6/igt@perf@gen12-mi-rpc.html
#### Possible fixes ####
* igt@i915_pm_rpm@fences:
- shard-tglb: [SKIP][45] ([i915#1316] / [i915#579]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-tglb5/igt@i915_pm_rpm@fences.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-tglb8/igt@i915_pm_rpm@fences.html
- shard-skl: [SKIP][47] ([fdo#109271]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-skl10/igt@i915_pm_rpm@fences.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-skl1/igt@i915_pm_rpm@fences.html
- shard-iclb: [SKIP][49] ([i915#1316] / [i915#579]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-iclb4/igt@i915_pm_rpm@fences.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-iclb7/igt@i915_pm_rpm@fences.html
- shard-glk: [SKIP][51] ([fdo#109271]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-glk5/igt@i915_pm_rpm@fences.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-glk1/igt@i915_pm_rpm@fences.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [DMESG-WARN][53] ([i915#180]) -> [PASS][54] +2 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_draw_crc@draw-method-rgb565-blt-ytiled:
- shard-glk: [FAIL][55] ([i915#52] / [i915#54]) -> [PASS][56] +4 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-glk3/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-glk3/igt@kms_draw_crc@draw-method-rgb565-blt-ytiled.html
* igt@kms_draw_crc@fill-fb:
- shard-apl: [FAIL][57] ([i915#95]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-apl8/igt@kms_draw_crc@fill-fb.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-apl3/igt@kms_draw_crc@fill-fb.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: [FAIL][59] ([i915#79]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-glk6/igt@kms_flip@flip-vs-expired-vblank.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-glk6/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-apl: [DMESG-WARN][61] ([i915#180] / [i915#95]) -> [PASS][62] +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-apl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-apl8/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [FAIL][63] ([i915#1188]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-skl6/igt@kms_hdr@bpc-switch.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-skl7/igt@kms_hdr@bpc-switch.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][65] ([fdo#108145] / [i915#265]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr@no_drrs:
- shard-iclb: [FAIL][67] ([i915#173]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-iclb1/igt@kms_psr@no_drrs.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-iclb7/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-iclb: [SKIP][69] ([fdo#109441]) -> [PASS][70] +1 similar issue
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-iclb6/igt@kms_psr@psr2_sprite_mmap_gtt.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_vblank@pipe-a-accuracy-idle:
- shard-snb: [SKIP][71] ([fdo#109271]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-snb7/igt@kms_vblank@pipe-a-accuracy-idle.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-snb4/igt@kms_vblank@pipe-a-accuracy-idle.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-apl: [DMESG-WARN][73] ([i915#180]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-apl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-apl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
- shard-skl: [INCOMPLETE][75] ([i915#69]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-skl6/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-skl7/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
* {igt@perf@blocking-parameterized}:
- shard-iclb: [FAIL][77] ([i915#1542]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-iclb5/igt@perf@blocking-parameterized.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-iclb4/igt@perf@blocking-parameterized.html
#### Warnings ####
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-iclb: [SKIP][79] ([i915#588]) -> [SKIP][80] ([i915#658])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-iclb7/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@i915_pm_rpm@cursor:
- shard-snb: [SKIP][81] ([fdo#109271]) -> [INCOMPLETE][82] ([i915#82])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-snb5/igt@i915_pm_rpm@cursor.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-snb5/igt@i915_pm_rpm@cursor.html
* igt@kms_content_protection@uevent:
- shard-kbl: [FAIL][83] ([i915#357]) -> [FAIL][84] ([i915#357] / [i915#93] / [i915#95])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-kbl6/igt@kms_content_protection@uevent.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-kbl3/igt@kms_content_protection@uevent.html
- shard-apl: [FAIL][85] ([i915#357]) -> [FAIL][86] ([i915#357] / [i915#95])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-apl2/igt@kms_content_protection@uevent.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-apl7/igt@kms_content_protection@uevent.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-apl: [FAIL][87] ([fdo#108145] / [i915#265]) -> [FAIL][88] ([fdo#108145] / [i915#265] / [i915#95]) +1 similar issue
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-apl1/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-kbl: [FAIL][89] ([fdo#108145] / [i915#265]) -> [FAIL][90] ([fdo#108145] / [i915#265] / [i915#93] / [i915#95])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8269/shard-kbl1/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/shard-kbl1/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[i915#1085]: https://gitlab.freedesktop.org/drm/intel/issues/1085
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1316]: https://gitlab.freedesktop.org/drm/intel/issues/1316
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
[i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
[i915#357]: https://gitlab.freedesktop.org/drm/intel/issues/357
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#46]: https://gitlab.freedesktop.org/drm/intel/issues/46
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579
[i915#588]: https://gitlab.freedesktop.org/drm/intel/issues/588
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
[i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5577 -> IGTPW_4428
* Linux: CI_DRM_8269 -> Patchwork_17241
CI-20190529: 20190529
CI_DRM_8269: 301d0427e2e3108839bf6c36f58dd0b2b5258c25 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_4428: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4428/index.html
IGT_5577: 7ee7e86fd79e4dbb6300ef4c23e50cb699216ae2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17241: 6c533ea6ac21d40eeb4ac157b771579e9bc19b9b @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17241/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V15)
2020-04-08 7:45 ` Jani Nikula
@ 2020-04-16 9:10 ` Jani Nikula
2020-04-16 22:45 ` Paauwe, Bob J
0 siblings, 1 reply; 13+ messages in thread
From: Jani Nikula @ 2020-04-16 9:10 UTC (permalink / raw)
To: Bob Paauwe, intel-gfx
On Wed, 08 Apr 2020, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Tue, 07 Apr 2020, Bob Paauwe <bob.j.paauwe@intel.com> wrote:
>> From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
>>
>> PLANE_CTL_FORMAT_AYUV is already supported, according to hardware specification.
>>
>> v2: Edited commit message, removed redundant whitespaces.
>>
>> v3: Fixed fallthrough logic for the format switch cases.
>>
>> v4: Yet again fixed fallthrough logic, to reuse code from other case
>> labels.
>>
>> v5: Started to use XYUV instead of AYUV, as we don't use alpha.
>>
>> v6: Removed unneeded initializer for new XYUV format.
>>
>> v7: Added scaling support for DRM_FORMAT_XYUV
>>
>> v8: Edited commit message to be more clear about skl+, renamed
>> PLANE_CTL_FORMAT_AYUV to PLANE_CTL_FORMAT_XYUV as this format
>> doesn't support per-pixel alpha. Fixed minor code issues.
>>
>> v9: Moved DRM format check to proper place in intel_framebuffer_init.
>>
>> v10: Added missing XYUV format to sprite planes for skl+.
>>
>> v11: Changed DRM_FORMAT_XYUV to be DRM_FORMAT_XYUV8888.
>>
>> v12: Fixed rebase conflicts
>>
>> V13: Rebased.
>> Added format to ICL format lists.
>>
>> V14: Added format to TGL format lists.
>> Rebased.
>>
>> V15: Added format to glk_planar_formats[] and icl_sdr_y_plane_formats[] (Ville)
>> Placed XYUV8888 before XXVYU2101010 to be more consistent (Ville)
>
> Okay, so we like to add the changelog of the patch itself to the commit
> message, but this is ridiculous wrt the patch and the commit
> message. Whoever ends up applying it, please just nuke the changelog. I
> don't want that in the logs.
This turned out to be me. Pushed with the commit message cleaned up.
BR,
Jani.
>
> BR,
> Jani.
>
>
>>
>> v12:
>> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
>>
>> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
>> Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
>> drivers/gpu/drm/i915/display/intel_sprite.c | 8 ++++++++
>> drivers/gpu/drm/i915/i915_reg.h | 2 +-
>> 3 files changed, 14 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index 70ec301fe6e3..3654262570b2 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -3342,6 +3342,8 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
>> return DRM_FORMAT_RGB565;
>> case PLANE_CTL_FORMAT_NV12:
>> return DRM_FORMAT_NV12;
>> + case PLANE_CTL_FORMAT_XYUV:
>> + return DRM_FORMAT_XYUV8888;
>> case PLANE_CTL_FORMAT_P010:
>> return DRM_FORMAT_P010;
>> case PLANE_CTL_FORMAT_P012:
>> @@ -4586,6 +4588,8 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
>> case DRM_FORMAT_XRGB16161616F:
>> case DRM_FORMAT_ARGB16161616F:
>> return PLANE_CTL_FORMAT_XRGB_16161616F;
>> + case DRM_FORMAT_XYUV8888:
>> + return PLANE_CTL_FORMAT_XYUV;
>> case DRM_FORMAT_YUYV:
>> return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;
>> case DRM_FORMAT_YVYU:
>> @@ -6175,6 +6179,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
>> case DRM_FORMAT_UYVY:
>> case DRM_FORMAT_VYUY:
>> case DRM_FORMAT_NV12:
>> + case DRM_FORMAT_XYUV8888:
>> case DRM_FORMAT_P010:
>> case DRM_FORMAT_P012:
>> case DRM_FORMAT_P016:
>> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
>> index deda351719db..1a4377c988f5 100644
>> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
>> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
>> @@ -2503,6 +2503,7 @@ static const u32 skl_plane_formats[] = {
>> DRM_FORMAT_YVYU,
>> DRM_FORMAT_UYVY,
>> DRM_FORMAT_VYUY,
>> + DRM_FORMAT_XYUV8888,
>> };
>>
>> static const u32 skl_planar_formats[] = {
>> @@ -2521,6 +2522,7 @@ static const u32 skl_planar_formats[] = {
>> DRM_FORMAT_UYVY,
>> DRM_FORMAT_VYUY,
>> DRM_FORMAT_NV12,
>> + DRM_FORMAT_XYUV8888,
>> };
>>
>> static const u32 glk_planar_formats[] = {
>> @@ -2539,6 +2541,7 @@ static const u32 glk_planar_formats[] = {
>> DRM_FORMAT_UYVY,
>> DRM_FORMAT_VYUY,
>> DRM_FORMAT_NV12,
>> + DRM_FORMAT_XYUV8888,
>> DRM_FORMAT_P010,
>> DRM_FORMAT_P012,
>> DRM_FORMAT_P016,
>> @@ -2562,6 +2565,7 @@ static const u32 icl_sdr_y_plane_formats[] = {
>> DRM_FORMAT_Y210,
>> DRM_FORMAT_Y212,
>> DRM_FORMAT_Y216,
>> + DRM_FORMAT_XYUV8888,
>> DRM_FORMAT_XVYU2101010,
>> DRM_FORMAT_XVYU12_16161616,
>> DRM_FORMAT_XVYU16161616,
>> @@ -2589,6 +2593,7 @@ static const u32 icl_sdr_uv_plane_formats[] = {
>> DRM_FORMAT_Y210,
>> DRM_FORMAT_Y212,
>> DRM_FORMAT_Y216,
>> + DRM_FORMAT_XYUV8888,
>> DRM_FORMAT_XVYU2101010,
>> DRM_FORMAT_XVYU12_16161616,
>> DRM_FORMAT_XVYU16161616,
>> @@ -2620,6 +2625,7 @@ static const u32 icl_hdr_plane_formats[] = {
>> DRM_FORMAT_Y210,
>> DRM_FORMAT_Y212,
>> DRM_FORMAT_Y216,
>> + DRM_FORMAT_XYUV8888,
>> DRM_FORMAT_XVYU2101010,
>> DRM_FORMAT_XVYU12_16161616,
>> DRM_FORMAT_XVYU16161616,
>> @@ -2790,6 +2796,7 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
>> case DRM_FORMAT_UYVY:
>> case DRM_FORMAT_VYUY:
>> case DRM_FORMAT_NV12:
>> + case DRM_FORMAT_XYUV8888:
>> case DRM_FORMAT_P010:
>> case DRM_FORMAT_P012:
>> case DRM_FORMAT_P016:
>> @@ -2854,6 +2861,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
>> case DRM_FORMAT_UYVY:
>> case DRM_FORMAT_VYUY:
>> case DRM_FORMAT_NV12:
>> + case DRM_FORMAT_XYUV8888:
>> case DRM_FORMAT_P010:
>> case DRM_FORMAT_P012:
>> case DRM_FORMAT_P016:
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index 1a7bd6db164b..70c02e73e1d8 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -6855,7 +6855,7 @@ enum {
>> #define PLANE_CTL_FORMAT_P012 (5 << 24)
>> #define PLANE_CTL_FORMAT_XRGB_16161616F (6 << 24)
>> #define PLANE_CTL_FORMAT_P016 (7 << 24)
>> -#define PLANE_CTL_FORMAT_AYUV (8 << 24)
>> +#define PLANE_CTL_FORMAT_XYUV (8 << 24)
>> #define PLANE_CTL_FORMAT_INDEXED (12 << 24)
>> #define PLANE_CTL_FORMAT_RGB_565 (14 << 24)
>> #define ICL_PLANE_CTL_FORMAT_MASK (0x1f << 23)
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V15)
2020-04-16 9:10 ` Jani Nikula
@ 2020-04-16 22:45 ` Paauwe, Bob J
2020-04-17 6:31 ` Jani Nikula
0 siblings, 1 reply; 13+ messages in thread
From: Paauwe, Bob J @ 2020-04-16 22:45 UTC (permalink / raw)
To: Jani Nikula, intel-gfx
> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: Thursday, April 16, 2020 2:10 AM
> To: Paauwe, Bob J <bob.j.paauwe@intel.com>; intel-gfx <intel-
> gfx@lists.freedesktop.org>
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Subject: Re: [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format
> support for skl+ (V15)
>
> On Wed, 08 Apr 2020, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> > On Tue, 07 Apr 2020, Bob Paauwe <bob.j.paauwe@intel.com> wrote:
> >> From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> >>
> >> PLANE_CTL_FORMAT_AYUV is already supported, according to hardware
> specification.
> >>
> >> v2: Edited commit message, removed redundant whitespaces.
> >>
> >> v3: Fixed fallthrough logic for the format switch cases.
> >>
> >> v4: Yet again fixed fallthrough logic, to reuse code from other case
> >> labels.
> >>
> >> v5: Started to use XYUV instead of AYUV, as we don't use alpha.
> >>
> >> v6: Removed unneeded initializer for new XYUV format.
> >>
> >> v7: Added scaling support for DRM_FORMAT_XYUV
> >>
> >> v8: Edited commit message to be more clear about skl+, renamed
> >> PLANE_CTL_FORMAT_AYUV to PLANE_CTL_FORMAT_XYUV as this
> format
> >> doesn't support per-pixel alpha. Fixed minor code issues.
> >>
> >> v9: Moved DRM format check to proper place in intel_framebuffer_init.
> >>
> >> v10: Added missing XYUV format to sprite planes for skl+.
> >>
> >> v11: Changed DRM_FORMAT_XYUV to be DRM_FORMAT_XYUV8888.
> >>
> >> v12: Fixed rebase conflicts
> >>
> >> V13: Rebased.
> >> Added format to ICL format lists.
> >>
> >> V14: Added format to TGL format lists.
> >> Rebased.
> >>
> >> V15: Added format to glk_planar_formats[] and icl_sdr_y_plane_formats[]
> (Ville)
> >> Placed XYUV8888 before XXVYU2101010 to be more consistent (Ville)
> >
> > Okay, so we like to add the changelog of the patch itself to the commit
> > message, but this is ridiculous wrt the patch and the commit
> > message. Whoever ends up applying it, please just nuke the changelog. I
> > don't want that in the logs.
>
> This turned out to be me. Pushed with the commit message cleaned up.
>
> BR,
> Jani.
Thanks Jani! What about the corresponding IGT patch? Did that get pushed too so that this won't break CI?
https://patchwork.freedesktop.org/series/70516/
Bob
>
>
> >
> > BR,
> > Jani.
> >
> >
> >>
> >> v12:
> >> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> >>
> >> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> >> Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
> >> ---
> >> drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
> >> drivers/gpu/drm/i915/display/intel_sprite.c | 8 ++++++++
> >> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> >> 3 files changed, 14 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> >> index 70ec301fe6e3..3654262570b2 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> >> @@ -3342,6 +3342,8 @@ int skl_format_to_fourcc(int format, bool
> rgb_order, bool alpha)
> >> return DRM_FORMAT_RGB565;
> >> case PLANE_CTL_FORMAT_NV12:
> >> return DRM_FORMAT_NV12;
> >> + case PLANE_CTL_FORMAT_XYUV:
> >> + return DRM_FORMAT_XYUV8888;
> >> case PLANE_CTL_FORMAT_P010:
> >> return DRM_FORMAT_P010;
> >> case PLANE_CTL_FORMAT_P012:
> >> @@ -4586,6 +4588,8 @@ static u32 skl_plane_ctl_format(u32
> pixel_format)
> >> case DRM_FORMAT_XRGB16161616F:
> >> case DRM_FORMAT_ARGB16161616F:
> >> return PLANE_CTL_FORMAT_XRGB_16161616F;
> >> + case DRM_FORMAT_XYUV8888:
> >> + return PLANE_CTL_FORMAT_XYUV;
> >> case DRM_FORMAT_YUYV:
> >> return PLANE_CTL_FORMAT_YUV422 |
> PLANE_CTL_YUV422_YUYV;
> >> case DRM_FORMAT_YVYU:
> >> @@ -6175,6 +6179,7 @@ static int skl_update_scaler_plane(struct
> intel_crtc_state *crtc_state,
> >> case DRM_FORMAT_UYVY:
> >> case DRM_FORMAT_VYUY:
> >> case DRM_FORMAT_NV12:
> >> + case DRM_FORMAT_XYUV8888:
> >> case DRM_FORMAT_P010:
> >> case DRM_FORMAT_P012:
> >> case DRM_FORMAT_P016:
> >> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
> b/drivers/gpu/drm/i915/display/intel_sprite.c
> >> index deda351719db..1a4377c988f5 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> >> @@ -2503,6 +2503,7 @@ static const u32 skl_plane_formats[] = {
> >> DRM_FORMAT_YVYU,
> >> DRM_FORMAT_UYVY,
> >> DRM_FORMAT_VYUY,
> >> + DRM_FORMAT_XYUV8888,
> >> };
> >>
> >> static const u32 skl_planar_formats[] = {
> >> @@ -2521,6 +2522,7 @@ static const u32 skl_planar_formats[] = {
> >> DRM_FORMAT_UYVY,
> >> DRM_FORMAT_VYUY,
> >> DRM_FORMAT_NV12,
> >> + DRM_FORMAT_XYUV8888,
> >> };
> >>
> >> static const u32 glk_planar_formats[] = {
> >> @@ -2539,6 +2541,7 @@ static const u32 glk_planar_formats[] = {
> >> DRM_FORMAT_UYVY,
> >> DRM_FORMAT_VYUY,
> >> DRM_FORMAT_NV12,
> >> + DRM_FORMAT_XYUV8888,
> >> DRM_FORMAT_P010,
> >> DRM_FORMAT_P012,
> >> DRM_FORMAT_P016,
> >> @@ -2562,6 +2565,7 @@ static const u32 icl_sdr_y_plane_formats[] = {
> >> DRM_FORMAT_Y210,
> >> DRM_FORMAT_Y212,
> >> DRM_FORMAT_Y216,
> >> + DRM_FORMAT_XYUV8888,
> >> DRM_FORMAT_XVYU2101010,
> >> DRM_FORMAT_XVYU12_16161616,
> >> DRM_FORMAT_XVYU16161616,
> >> @@ -2589,6 +2593,7 @@ static const u32 icl_sdr_uv_plane_formats[] = {
> >> DRM_FORMAT_Y210,
> >> DRM_FORMAT_Y212,
> >> DRM_FORMAT_Y216,
> >> + DRM_FORMAT_XYUV8888,
> >> DRM_FORMAT_XVYU2101010,
> >> DRM_FORMAT_XVYU12_16161616,
> >> DRM_FORMAT_XVYU16161616,
> >> @@ -2620,6 +2625,7 @@ static const u32 icl_hdr_plane_formats[] = {
> >> DRM_FORMAT_Y210,
> >> DRM_FORMAT_Y212,
> >> DRM_FORMAT_Y216,
> >> + DRM_FORMAT_XYUV8888,
> >> DRM_FORMAT_XVYU2101010,
> >> DRM_FORMAT_XVYU12_16161616,
> >> DRM_FORMAT_XVYU16161616,
> >> @@ -2790,6 +2796,7 @@ static bool
> skl_plane_format_mod_supported(struct drm_plane *_plane,
> >> case DRM_FORMAT_UYVY:
> >> case DRM_FORMAT_VYUY:
> >> case DRM_FORMAT_NV12:
> >> + case DRM_FORMAT_XYUV8888:
> >> case DRM_FORMAT_P010:
> >> case DRM_FORMAT_P012:
> >> case DRM_FORMAT_P016:
> >> @@ -2854,6 +2861,7 @@ static bool
> gen12_plane_format_mod_supported(struct drm_plane *_plane,
> >> case DRM_FORMAT_UYVY:
> >> case DRM_FORMAT_VYUY:
> >> case DRM_FORMAT_NV12:
> >> + case DRM_FORMAT_XYUV8888:
> >> case DRM_FORMAT_P010:
> >> case DRM_FORMAT_P012:
> >> case DRM_FORMAT_P016:
> >> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> >> index 1a7bd6db164b..70c02e73e1d8 100644
> >> --- a/drivers/gpu/drm/i915/i915_reg.h
> >> +++ b/drivers/gpu/drm/i915/i915_reg.h
> >> @@ -6855,7 +6855,7 @@ enum {
> >> #define PLANE_CTL_FORMAT_P012 (5 << 24)
> >> #define PLANE_CTL_FORMAT_XRGB_16161616F (6 << 24)
> >> #define PLANE_CTL_FORMAT_P016 (7 << 24)
> >> -#define PLANE_CTL_FORMAT_AYUV (8 << 24)
> >> +#define PLANE_CTL_FORMAT_XYUV (8 << 24)
> >> #define PLANE_CTL_FORMAT_INDEXED (12 << 24)
> >> #define PLANE_CTL_FORMAT_RGB_565 (14 << 24)
> >> #define ICL_PLANE_CTL_FORMAT_MASK (0x1f << 23)
>
> --
> Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V15)
2020-04-16 22:45 ` Paauwe, Bob J
@ 2020-04-17 6:31 ` Jani Nikula
0 siblings, 0 replies; 13+ messages in thread
From: Jani Nikula @ 2020-04-17 6:31 UTC (permalink / raw)
To: Paauwe, Bob J, intel-gfx
On Thu, 16 Apr 2020, "Paauwe, Bob J" <bob.j.paauwe@intel.com> wrote:
> Thanks Jani! What about the corresponding IGT patch? Did that get
> pushed too so that this won't break CI?
>
> https://patchwork.freedesktop.org/series/70516/
Pushed now, thanks for the reminder.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V15)
2020-02-27 19:15 ` [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+ Bob Paauwe
@ 2020-02-27 19:15 ` Bob Paauwe
0 siblings, 0 replies; 13+ messages in thread
From: Bob Paauwe @ 2020-02-27 19:15 UTC (permalink / raw)
To: intel-gfx
From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
PLANE_CTL_FORMAT_AYUV is already supported, according to hardware specification.
v2: Edited commit message, removed redundant whitespaces.
v3: Fixed fallthrough logic for the format switch cases.
v4: Yet again fixed fallthrough logic, to reuse code from other case
labels.
v5: Started to use XYUV instead of AYUV, as we don't use alpha.
v6: Removed unneeded initializer for new XYUV format.
v7: Added scaling support for DRM_FORMAT_XYUV
v8: Edited commit message to be more clear about skl+, renamed
PLANE_CTL_FORMAT_AYUV to PLANE_CTL_FORMAT_XYUV as this format
doesn't support per-pixel alpha. Fixed minor code issues.
v9: Moved DRM format check to proper place in intel_framebuffer_init.
v10: Added missing XYUV format to sprite planes for skl+.
v11: Changed DRM_FORMAT_XYUV to be DRM_FORMAT_XYUV8888.
v12: Fixed rebase conflicts
V13: Rebased.
Added format to ICL format lists.
V14: Added format to TGL format lists.
Rebased.
V15: Added format to glk_planar_formats[] and icl_sdr_y_plane_formats[] (Ville)
Placed XYUV8888 before XXVYU2101010 to be more consistent (Ville)
v12:
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
drivers/gpu/drm/i915/display/intel_sprite.c | 8 ++++++++
drivers/gpu/drm/i915/i915_reg.h | 2 +-
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 61ba1f2256a0..919270b7e240 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3331,6 +3331,8 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
return DRM_FORMAT_RGB565;
case PLANE_CTL_FORMAT_NV12:
return DRM_FORMAT_NV12;
+ case PLANE_CTL_FORMAT_XYUV:
+ return DRM_FORMAT_XYUV8888;
case PLANE_CTL_FORMAT_P010:
return DRM_FORMAT_P010;
case PLANE_CTL_FORMAT_P012:
@@ -4570,6 +4572,8 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
case DRM_FORMAT_XRGB16161616F:
case DRM_FORMAT_ARGB16161616F:
return PLANE_CTL_FORMAT_XRGB_16161616F;
+ case DRM_FORMAT_XYUV8888:
+ return PLANE_CTL_FORMAT_XYUV;
case DRM_FORMAT_YUYV:
return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;
case DRM_FORMAT_YVYU:
@@ -6186,6 +6190,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
case DRM_FORMAT_NV12:
+ case DRM_FORMAT_XYUV8888:
case DRM_FORMAT_P010:
case DRM_FORMAT_P012:
case DRM_FORMAT_P016:
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 7abeefe8dce5..18f6e0363cc0 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -2483,6 +2483,7 @@ static const u32 skl_plane_formats[] = {
DRM_FORMAT_YVYU,
DRM_FORMAT_UYVY,
DRM_FORMAT_VYUY,
+ DRM_FORMAT_XYUV8888,
};
static const u32 skl_planar_formats[] = {
@@ -2501,6 +2502,7 @@ static const u32 skl_planar_formats[] = {
DRM_FORMAT_UYVY,
DRM_FORMAT_VYUY,
DRM_FORMAT_NV12,
+ DRM_FORMAT_XYUV8888,
};
static const u32 glk_planar_formats[] = {
@@ -2519,6 +2521,7 @@ static const u32 glk_planar_formats[] = {
DRM_FORMAT_UYVY,
DRM_FORMAT_VYUY,
DRM_FORMAT_NV12,
+ DRM_FORMAT_XYUV8888,
DRM_FORMAT_P010,
DRM_FORMAT_P012,
DRM_FORMAT_P016,
@@ -2542,6 +2545,7 @@ static const u32 icl_sdr_y_plane_formats[] = {
DRM_FORMAT_Y210,
DRM_FORMAT_Y212,
DRM_FORMAT_Y216,
+ DRM_FORMAT_XYUV8888,
DRM_FORMAT_XVYU2101010,
DRM_FORMAT_XVYU12_16161616,
DRM_FORMAT_XVYU16161616,
@@ -2569,6 +2573,7 @@ static const u32 icl_sdr_uv_plane_formats[] = {
DRM_FORMAT_Y210,
DRM_FORMAT_Y212,
DRM_FORMAT_Y216,
+ DRM_FORMAT_XYUV8888,
DRM_FORMAT_XVYU2101010,
DRM_FORMAT_XVYU12_16161616,
DRM_FORMAT_XVYU16161616,
@@ -2600,6 +2605,7 @@ static const u32 icl_hdr_plane_formats[] = {
DRM_FORMAT_Y210,
DRM_FORMAT_Y212,
DRM_FORMAT_Y216,
+ DRM_FORMAT_XYUV8888,
DRM_FORMAT_XVYU2101010,
DRM_FORMAT_XVYU12_16161616,
DRM_FORMAT_XVYU16161616,
@@ -2770,6 +2776,7 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
case DRM_FORMAT_NV12:
+ case DRM_FORMAT_XYUV8888:
case DRM_FORMAT_P010:
case DRM_FORMAT_P012:
case DRM_FORMAT_P016:
@@ -2834,6 +2841,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
case DRM_FORMAT_NV12:
+ case DRM_FORMAT_XYUV8888:
case DRM_FORMAT_P010:
case DRM_FORMAT_P012:
case DRM_FORMAT_P016:
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b09c1d6dc0aa..17e6453d31d7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6768,7 +6768,7 @@ enum {
#define PLANE_CTL_FORMAT_P012 (5 << 24)
#define PLANE_CTL_FORMAT_XRGB_16161616F (6 << 24)
#define PLANE_CTL_FORMAT_P016 (7 << 24)
-#define PLANE_CTL_FORMAT_AYUV (8 << 24)
+#define PLANE_CTL_FORMAT_XYUV (8 << 24)
#define PLANE_CTL_FORMAT_INDEXED (12 << 24)
#define PLANE_CTL_FORMAT_RGB_565 (14 << 24)
#define ICL_PLANE_CTL_FORMAT_MASK (0x1f << 23)
--
2.21.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 13+ messages in thread
end of thread, other threads:[~2020-04-17 6:31 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-07 21:55 [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+ Bob Paauwe
2020-04-07 21:55 ` [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V15) Bob Paauwe
2020-04-08 7:45 ` Jani Nikula
2020-04-16 9:10 ` Jani Nikula
2020-04-16 22:45 ` Paauwe, Bob J
2020-04-17 6:31 ` Jani Nikula
2020-04-07 22:52 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Adding YUV444 packed format support for skl+ (rev5) Patchwork
2020-04-07 23:19 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-04-07 23:48 ` Paauwe, Bob J
2020-04-08 7:43 ` Saarinen, Jani
2020-04-08 13:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-04-08 22:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2020-02-19 21:15 [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V14) Bob Paauwe
2020-02-27 19:15 ` [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+ Bob Paauwe
2020-02-27 19:15 ` [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V15) Bob Paauwe
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