[PATCH 5/5] Reduce assembly instruction size

[PATCH 5/5] Reduce assembly instruction size

[Frediano Ziglio]

Use 32 bit versions in all cases, not only for registers till 8th.
This reduces the encoding from (example with r14):

     49 c7 c6 ff 7f 00 00    mov    $0x7fff,%r14

to

     41 be ff 7f 00 00       mov    $0x7fff,%r14d

Signed-off-by: Frediano Ziglio <frediano.ziglio@cloud.com>
---
 xen/arch/x86/include/asm/asm_defns.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/x86/include/asm/asm_defns.h b/xen/arch/x86/include/asm/asm_defns.h
index 51bf1cf1e6..a9a6c21c76 100644
--- a/xen/arch/x86/include/asm/asm_defns.h
+++ b/xen/arch/x86/include/asm/asm_defns.h
@@ -136,7 +136,7 @@ register unsigned long current_stack_pointer asm("rsp");
 #define STACK_CPUINFO_FIELD(field) (1 - CPUINFO_sizeof + CPUINFO_##field)
 #define GET_STACK_END(reg)                        \
         .if .Lr##reg >= 8;                        \
-        movq $STACK_SIZE-1, %r##reg;              \
+        movl $STACK_SIZE-1, %r##reg##d;           \
         .else;                                    \
         movl $STACK_SIZE-1, %e##reg;              \
         .endif;                                   \
-- 
2.34.1

Re: [PATCH 5/5] Reduce assembly instruction size

[Jan Beulich]

On 05.02.2024 11:49, Frediano Ziglio wrote:
> Use 32 bit versions in all cases, not only for registers till 8th.
> This reduces the encoding from (example with r14):
> 
>      49 c7 c6 ff 7f 00 00    mov    $0x7fff,%r14
> 
> to
> 
>      41 be ff 7f 00 00       mov    $0x7fff,%r14d
> 
> Signed-off-by: Frediano Ziglio <frediano.ziglio@cloud.com>

Reviewed-by: Jan Beulich <jbeulich@suse.com>