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* [PATCH 0/4] target/alpha,arm,ppc: More uses of tcg_constant()
@ 2021-10-24 16:16 Philippe Mathieu-Daudé
  2021-10-24 16:16 ` [PATCH 1/4] target/alpha: Use tcg_constant_i64() in gen_call_pal() Philippe Mathieu-Daudé
                   ` (3 more replies)
  0 siblings, 4 replies; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-24 16:16 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Richard Henderson, Greg Kurz,
	Philippe Mathieu-Daudé,
	qemu-arm, qemu-ppc, David Gibson

Few more cases where we can use tcg_constant().

Philippe Mathieu-Daudé (4):
  target/alpha: Use tcg_constant_i64() in gen_call_pal()
  target/arm: Use tcg_constant_i64() in do_sat_addsub_64()
  target/ppc: Use tcg_constant_tl() in gen_op_cmp()
  target/ppc: Use tcg_constant_i32() in gen_ld/st()

 target/alpha/translate.c   |  9 +++------
 target/arm/translate-sve.c | 17 ++++++++--------
 target/ppc/translate.c     | 40 ++++++++++++++++----------------------
 3 files changed, 28 insertions(+), 38 deletions(-)

-- 
2.31.1



^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH 1/4] target/alpha: Use tcg_constant_i64() in gen_call_pal()
  2021-10-24 16:16 [PATCH 0/4] target/alpha,arm,ppc: More uses of tcg_constant() Philippe Mathieu-Daudé
@ 2021-10-24 16:16 ` Philippe Mathieu-Daudé
  2021-10-24 21:19   ` Richard Henderson
  2021-10-24 16:16 ` [PATCH 2/4] target/arm: Use tcg_constant_i64() in do_sat_addsub_64() Philippe Mathieu-Daudé
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-24 16:16 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Richard Henderson, Greg Kurz,
	Philippe Mathieu-Daudé,
	qemu-arm, qemu-ppc, David Gibson

Avoid using a TCG temporary by moving the flag and
exception address to the constant pool.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/alpha/translate.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index a4c3f43e720..326d4216aad 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/translate.c
@@ -1191,20 +1191,17 @@ static DisasJumpType gen_call_pal(DisasContext *ctx, int palcode)
     return gen_excp(ctx, EXCP_CALL_PAL, palcode);
 #else
     {
-        TCGv tmp = tcg_temp_new();
         uint64_t exc_addr = ctx->base.pc_next;
         uint64_t entry = ctx->palbr;
 
         if (ctx->tbflags & ENV_FLAG_PAL_MODE) {
             exc_addr |= 1;
         } else {
-            tcg_gen_movi_i64(tmp, 1);
-            st_flag_byte(tmp, ENV_FLAG_PAL_SHIFT);
+            st_flag_byte(tcg_constant_i64(1), ENV_FLAG_PAL_SHIFT);
         }
 
-        tcg_gen_movi_i64(tmp, exc_addr);
-        tcg_gen_st_i64(tmp, cpu_env, offsetof(CPUAlphaState, exc_addr));
-        tcg_temp_free(tmp);
+        tcg_gen_st_i64(tcg_constant_i64(exc_addr),
+                       cpu_env, offsetof(CPUAlphaState, exc_addr));
 
         entry += (palcode & 0x80
                   ? 0x2000 + (palcode - 0x80) * 64
-- 
2.31.1



^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH 2/4] target/arm: Use tcg_constant_i64() in do_sat_addsub_64()
  2021-10-24 16:16 [PATCH 0/4] target/alpha,arm,ppc: More uses of tcg_constant() Philippe Mathieu-Daudé
  2021-10-24 16:16 ` [PATCH 1/4] target/alpha: Use tcg_constant_i64() in gen_call_pal() Philippe Mathieu-Daudé
@ 2021-10-24 16:16 ` Philippe Mathieu-Daudé
  2021-10-24 21:24   ` Richard Henderson
  2021-10-24 16:16 ` [PATCH 3/4] target/ppc: Use tcg_constant_tl() in gen_op_cmp() Philippe Mathieu-Daudé
  2021-10-24 16:16 ` [PATCH 4/4] target/ppc: Use tcg_constant_i32() in gen_ld/st() Philippe Mathieu-Daudé
  3 siblings, 1 reply; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-24 16:16 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Richard Henderson, Greg Kurz,
	Philippe Mathieu-Daudé,
	qemu-arm, qemu-ppc, David Gibson

The immediate value used for comparison is constant and
read-only. Move it to the constant pool. This frees a
TCG temporary for unsigned saturation opcodes.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/arm/translate-sve.c | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index bc91a641711..76b5fe9f313 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -1943,20 +1943,20 @@ static void do_sat_addsub_32(TCGv_i64 reg, TCGv_i64 val, bool u, bool d)
 static void do_sat_addsub_64(TCGv_i64 reg, TCGv_i64 val, bool u, bool d)
 {
     TCGv_i64 t0 = tcg_temp_new_i64();
-    TCGv_i64 t1 = tcg_temp_new_i64();
     TCGv_i64 t2;
 
     if (u) {
         if (d) {
             tcg_gen_sub_i64(t0, reg, val);
-            tcg_gen_movi_i64(t1, 0);
-            tcg_gen_movcond_i64(TCG_COND_LTU, reg, reg, val, t1, t0);
+            t2 = tcg_constant_i64(0);
+            tcg_gen_movcond_i64(TCG_COND_LTU, reg, reg, val, t2, t0);
         } else {
             tcg_gen_add_i64(t0, reg, val);
-            tcg_gen_movi_i64(t1, -1);
-            tcg_gen_movcond_i64(TCG_COND_LTU, reg, t0, reg, t1, t0);
+            t2 = tcg_constant_i64(-1);
+            tcg_gen_movcond_i64(TCG_COND_LTU, reg, t0, reg, t2, t0);
         }
     } else {
+        TCGv_i64 t1 = tcg_temp_new_i64();
         if (d) {
             /* Detect signed overflow for subtraction.  */
             tcg_gen_xor_i64(t0, reg, val);
@@ -1966,7 +1966,7 @@ static void do_sat_addsub_64(TCGv_i64 reg, TCGv_i64 val, bool u, bool d)
 
             /* Bound the result.  */
             tcg_gen_movi_i64(reg, INT64_MIN);
-            t2 = tcg_const_i64(0);
+            t2 = tcg_constant_i64(0);
             tcg_gen_movcond_i64(TCG_COND_LT, reg, t0, t2, reg, t1);
         } else {
             /* Detect signed overflow for addition.  */
@@ -1977,13 +1977,12 @@ static void do_sat_addsub_64(TCGv_i64 reg, TCGv_i64 val, bool u, bool d)
 
             /* Bound the result.  */
             tcg_gen_movi_i64(t1, INT64_MAX);
-            t2 = tcg_const_i64(0);
+            t2 = tcg_constant_i64(0);
             tcg_gen_movcond_i64(TCG_COND_LT, reg, t0, t2, t1, reg);
         }
-        tcg_temp_free_i64(t2);
+        tcg_temp_free_i64(t1);
     }
     tcg_temp_free_i64(t0);
-    tcg_temp_free_i64(t1);
 }
 
 /* Similarly with a vector and a scalar operand.  */
-- 
2.31.1



^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH 3/4] target/ppc: Use tcg_constant_tl() in gen_op_cmp()
  2021-10-24 16:16 [PATCH 0/4] target/alpha,arm,ppc: More uses of tcg_constant() Philippe Mathieu-Daudé
  2021-10-24 16:16 ` [PATCH 1/4] target/alpha: Use tcg_constant_i64() in gen_call_pal() Philippe Mathieu-Daudé
  2021-10-24 16:16 ` [PATCH 2/4] target/arm: Use tcg_constant_i64() in do_sat_addsub_64() Philippe Mathieu-Daudé
@ 2021-10-24 16:16 ` Philippe Mathieu-Daudé
  2021-10-24 21:25   ` Richard Henderson
  2021-10-25  0:21   ` David Gibson
  2021-10-24 16:16 ` [PATCH 4/4] target/ppc: Use tcg_constant_i32() in gen_ld/st() Philippe Mathieu-Daudé
  3 siblings, 2 replies; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-24 16:16 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Richard Henderson, Greg Kurz,
	Philippe Mathieu-Daudé,
	qemu-arm, qemu-ppc, David Gibson

Avoid using a TCG temporary by moving the compared values
to the constant pool.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/ppc/translate.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 518337bcb7f..507f6699f47 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -1430,23 +1430,20 @@ static opc_handler_t invalid_handler = {
 static inline void gen_op_cmp(TCGv arg0, TCGv arg1, int s, int crf)
 {
     TCGv t0 = tcg_temp_new();
-    TCGv t1 = tcg_temp_new();
     TCGv_i32 t = tcg_temp_new_i32();
 
-    tcg_gen_movi_tl(t0, CRF_EQ);
-    tcg_gen_movi_tl(t1, CRF_LT);
     tcg_gen_movcond_tl((s ? TCG_COND_LT : TCG_COND_LTU),
-                       t0, arg0, arg1, t1, t0);
-    tcg_gen_movi_tl(t1, CRF_GT);
+                       t0, arg0, arg1,
+                       tcg_constant_tl(CRF_LT), tcg_constant_tl(CRF_EQ));
     tcg_gen_movcond_tl((s ? TCG_COND_GT : TCG_COND_GTU),
-                       t0, arg0, arg1, t1, t0);
+                       t0, arg0, arg1,
+                       tcg_constant_tl(CRF_GT), t0);
 
     tcg_gen_trunc_tl_i32(t, t0);
     tcg_gen_trunc_tl_i32(cpu_crf[crf], cpu_so);
     tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t);
 
     tcg_temp_free(t0);
-    tcg_temp_free(t1);
     tcg_temp_free_i32(t);
 }
 
-- 
2.31.1



^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH 4/4] target/ppc: Use tcg_constant_i32() in gen_ld/st()
  2021-10-24 16:16 [PATCH 0/4] target/alpha,arm,ppc: More uses of tcg_constant() Philippe Mathieu-Daudé
                   ` (2 preceding siblings ...)
  2021-10-24 16:16 ` [PATCH 3/4] target/ppc: Use tcg_constant_tl() in gen_op_cmp() Philippe Mathieu-Daudé
@ 2021-10-24 16:16 ` Philippe Mathieu-Daudé
  2021-10-24 21:27   ` Richard Henderson
  2021-10-25  0:21   ` David Gibson
  3 siblings, 2 replies; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-24 16:16 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, Richard Henderson, Greg Kurz,
	Philippe Mathieu-Daudé,
	qemu-arm, qemu-ppc, David Gibson

Avoid using a TCG temporary by moving the MemOp index
to the constant pool.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/ppc/translate.c | 29 +++++++++++++----------------
 1 file changed, 13 insertions(+), 16 deletions(-)

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 507f6699f47..9a4ae61a39d 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -3347,15 +3347,14 @@ static void gen_lq(DisasContext *ctx)
 
     if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
         if (HAVE_ATOMIC128) {
-            TCGv_i32 oi = tcg_temp_new_i32();
+            TCGv_i32 oi;
             if (ctx->le_mode) {
-                tcg_gen_movi_i32(oi, make_memop_idx(MO_LEQ, ctx->mem_idx));
+                oi = tcg_constant_i32(make_memop_idx(MO_LEQ, ctx->mem_idx));
                 gen_helper_lq_le_parallel(lo, cpu_env, EA, oi);
             } else {
-                tcg_gen_movi_i32(oi, make_memop_idx(MO_BEQ, ctx->mem_idx));
+                oi = tcg_constant_i32(make_memop_idx(MO_BEQ, ctx->mem_idx));
                 gen_helper_lq_be_parallel(lo, cpu_env, EA, oi);
             }
-            tcg_temp_free_i32(oi);
             tcg_gen_ld_i64(hi, cpu_env, offsetof(CPUPPCState, retxh));
         } else {
             /* Restart with exclusive lock.  */
@@ -3458,17 +3457,16 @@ static void gen_std(DisasContext *ctx)
 
         if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
             if (HAVE_ATOMIC128) {
-                TCGv_i32 oi = tcg_temp_new_i32();
+                TCGv_i32 oi;
                 if (ctx->le_mode) {
-                    tcg_gen_movi_i32(oi, make_memop_idx(MO_LE | MO_128,
-                                                        ctx->mem_idx));
+                    oi = tcg_constant_i32(make_memop_idx(MO_LE | MO_128,
+                                                         ctx->mem_idx));
                     gen_helper_stq_le_parallel(cpu_env, EA, lo, hi, oi);
                 } else {
-                    tcg_gen_movi_i32(oi, make_memop_idx(MO_BE | MO_128,
-                                                        ctx->mem_idx));
+                    oi = tcg_constant_i32(make_memop_idx(MO_BE | MO_128,
+                                                         ctx->mem_idx));
                     gen_helper_stq_be_parallel(cpu_env, EA, lo, hi, oi);
                 }
-                tcg_temp_free_i32(oi);
             } else {
                 /* Restart with exclusive lock.  */
                 gen_helper_exit_atomic(cpu_env);
@@ -4065,17 +4063,16 @@ static void gen_lqarx(DisasContext *ctx)
 
     if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
         if (HAVE_ATOMIC128) {
-            TCGv_i32 oi = tcg_temp_new_i32();
+            TCGv_i32 oi;
             if (ctx->le_mode) {
-                tcg_gen_movi_i32(oi, make_memop_idx(MO_LE | MO_128 | MO_ALIGN,
-                                                    ctx->mem_idx));
+                oi = tcg_constant_i32(make_memop_idx(MO_LE | MO_128 | MO_ALIGN,
+                                                     ctx->mem_idx));
                 gen_helper_lq_le_parallel(lo, cpu_env, EA, oi);
             } else {
-                tcg_gen_movi_i32(oi, make_memop_idx(MO_BE | MO_128 | MO_ALIGN,
-                                                    ctx->mem_idx));
+                oi = tcg_constant_i32(make_memop_idx(MO_BE | MO_128 | MO_ALIGN,
+                                                     ctx->mem_idx));
                 gen_helper_lq_be_parallel(lo, cpu_env, EA, oi);
             }
-            tcg_temp_free_i32(oi);
             tcg_gen_ld_i64(hi, cpu_env, offsetof(CPUPPCState, retxh));
         } else {
             /* Restart with exclusive lock.  */
-- 
2.31.1



^ permalink raw reply related	[flat|nested] 11+ messages in thread

* Re: [PATCH 1/4] target/alpha: Use tcg_constant_i64() in gen_call_pal()
  2021-10-24 16:16 ` [PATCH 1/4] target/alpha: Use tcg_constant_i64() in gen_call_pal() Philippe Mathieu-Daudé
@ 2021-10-24 21:19   ` Richard Henderson
  0 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2021-10-24 21:19 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-devel
  Cc: Peter Maydell, qemu-arm, qemu-ppc, Greg Kurz, David Gibson

On 10/24/21 9:16 AM, Philippe Mathieu-Daudé wrote:
> Avoid using a TCG temporary by moving the flag and
> exception address to the constant pool.
> 
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
>   target/alpha/translate.c | 9 +++------
>   1 file changed, 3 insertions(+), 6 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH 2/4] target/arm: Use tcg_constant_i64() in do_sat_addsub_64()
  2021-10-24 16:16 ` [PATCH 2/4] target/arm: Use tcg_constant_i64() in do_sat_addsub_64() Philippe Mathieu-Daudé
@ 2021-10-24 21:24   ` Richard Henderson
  0 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2021-10-24 21:24 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-devel
  Cc: Peter Maydell, qemu-arm, qemu-ppc, Greg Kurz, David Gibson

On 10/24/21 9:16 AM, Philippe Mathieu-Daudé wrote:
> The immediate value used for comparison is constant and
> read-only. Move it to the constant pool. This frees a
> TCG temporary for unsigned saturation opcodes.
> 
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
>   target/arm/translate-sve.c | 17 ++++++++---------
>   1 file changed, 8 insertions(+), 9 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH 3/4] target/ppc: Use tcg_constant_tl() in gen_op_cmp()
  2021-10-24 16:16 ` [PATCH 3/4] target/ppc: Use tcg_constant_tl() in gen_op_cmp() Philippe Mathieu-Daudé
@ 2021-10-24 21:25   ` Richard Henderson
  2021-10-25  0:21   ` David Gibson
  1 sibling, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2021-10-24 21:25 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-devel
  Cc: Peter Maydell, qemu-arm, qemu-ppc, Greg Kurz, David Gibson

On 10/24/21 9:16 AM, Philippe Mathieu-Daudé wrote:
> Avoid using a TCG temporary by moving the compared values
> to the constant pool.
> 
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
>   target/ppc/translate.c | 11 ++++-------
>   1 file changed, 4 insertions(+), 7 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH 4/4] target/ppc: Use tcg_constant_i32() in gen_ld/st()
  2021-10-24 16:16 ` [PATCH 4/4] target/ppc: Use tcg_constant_i32() in gen_ld/st() Philippe Mathieu-Daudé
@ 2021-10-24 21:27   ` Richard Henderson
  2021-10-25  0:21   ` David Gibson
  1 sibling, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2021-10-24 21:27 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-devel
  Cc: Peter Maydell, qemu-arm, qemu-ppc, Greg Kurz, David Gibson

On 10/24/21 9:16 AM, Philippe Mathieu-Daudé wrote:
> Avoid using a TCG temporary by moving the MemOp index
> to the constant pool.
> 
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
>   target/ppc/translate.c | 29 +++++++++++++----------------
>   1 file changed, 13 insertions(+), 16 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH 3/4] target/ppc: Use tcg_constant_tl() in gen_op_cmp()
  2021-10-24 16:16 ` [PATCH 3/4] target/ppc: Use tcg_constant_tl() in gen_op_cmp() Philippe Mathieu-Daudé
  2021-10-24 21:25   ` Richard Henderson
@ 2021-10-25  0:21   ` David Gibson
  1 sibling, 0 replies; 11+ messages in thread
From: David Gibson @ 2021-10-25  0:21 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Peter Maydell, Richard Henderson, qemu-devel, Greg Kurz,
	qemu-arm, qemu-ppc

[-- Attachment #1: Type: text/plain, Size: 1819 bytes --]

On Sun, Oct 24, 2021 at 06:16:18PM +0200, Philippe Mathieu-Daudé wrote:
> Avoid using a TCG temporary by moving the compared values
> to the constant pool.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Acked-by: David Gibson <david@gibson.dropbear.id.au>

> ---
>  target/ppc/translate.c | 11 ++++-------
>  1 file changed, 4 insertions(+), 7 deletions(-)
> 
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 518337bcb7f..507f6699f47 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -1430,23 +1430,20 @@ static opc_handler_t invalid_handler = {
>  static inline void gen_op_cmp(TCGv arg0, TCGv arg1, int s, int crf)
>  {
>      TCGv t0 = tcg_temp_new();
> -    TCGv t1 = tcg_temp_new();
>      TCGv_i32 t = tcg_temp_new_i32();
>  
> -    tcg_gen_movi_tl(t0, CRF_EQ);
> -    tcg_gen_movi_tl(t1, CRF_LT);
>      tcg_gen_movcond_tl((s ? TCG_COND_LT : TCG_COND_LTU),
> -                       t0, arg0, arg1, t1, t0);
> -    tcg_gen_movi_tl(t1, CRF_GT);
> +                       t0, arg0, arg1,
> +                       tcg_constant_tl(CRF_LT), tcg_constant_tl(CRF_EQ));
>      tcg_gen_movcond_tl((s ? TCG_COND_GT : TCG_COND_GTU),
> -                       t0, arg0, arg1, t1, t0);
> +                       t0, arg0, arg1,
> +                       tcg_constant_tl(CRF_GT), t0);
>  
>      tcg_gen_trunc_tl_i32(t, t0);
>      tcg_gen_trunc_tl_i32(cpu_crf[crf], cpu_so);
>      tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t);
>  
>      tcg_temp_free(t0);
> -    tcg_temp_free(t1);
>      tcg_temp_free_i32(t);
>  }
>  

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

[-- Attachment #2: signature.asc --]
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^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH 4/4] target/ppc: Use tcg_constant_i32() in gen_ld/st()
  2021-10-24 16:16 ` [PATCH 4/4] target/ppc: Use tcg_constant_i32() in gen_ld/st() Philippe Mathieu-Daudé
  2021-10-24 21:27   ` Richard Henderson
@ 2021-10-25  0:21   ` David Gibson
  1 sibling, 0 replies; 11+ messages in thread
From: David Gibson @ 2021-10-25  0:21 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé
  Cc: Peter Maydell, Richard Henderson, qemu-devel, Greg Kurz,
	qemu-arm, qemu-ppc

[-- Attachment #1: Type: text/plain, Size: 4280 bytes --]

On Sun, Oct 24, 2021 at 06:16:19PM +0200, Philippe Mathieu-Daudé wrote:
> Avoid using a TCG temporary by moving the MemOp index
> to the constant pool.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Acked-by: David Gibson <david@gibson.dropbear.id.au>

> ---
>  target/ppc/translate.c | 29 +++++++++++++----------------
>  1 file changed, 13 insertions(+), 16 deletions(-)
> 
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 507f6699f47..9a4ae61a39d 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -3347,15 +3347,14 @@ static void gen_lq(DisasContext *ctx)
>  
>      if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
>          if (HAVE_ATOMIC128) {
> -            TCGv_i32 oi = tcg_temp_new_i32();
> +            TCGv_i32 oi;
>              if (ctx->le_mode) {
> -                tcg_gen_movi_i32(oi, make_memop_idx(MO_LEQ, ctx->mem_idx));
> +                oi = tcg_constant_i32(make_memop_idx(MO_LEQ, ctx->mem_idx));
>                  gen_helper_lq_le_parallel(lo, cpu_env, EA, oi);
>              } else {
> -                tcg_gen_movi_i32(oi, make_memop_idx(MO_BEQ, ctx->mem_idx));
> +                oi = tcg_constant_i32(make_memop_idx(MO_BEQ, ctx->mem_idx));
>                  gen_helper_lq_be_parallel(lo, cpu_env, EA, oi);
>              }
> -            tcg_temp_free_i32(oi);
>              tcg_gen_ld_i64(hi, cpu_env, offsetof(CPUPPCState, retxh));
>          } else {
>              /* Restart with exclusive lock.  */
> @@ -3458,17 +3457,16 @@ static void gen_std(DisasContext *ctx)
>  
>          if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
>              if (HAVE_ATOMIC128) {
> -                TCGv_i32 oi = tcg_temp_new_i32();
> +                TCGv_i32 oi;
>                  if (ctx->le_mode) {
> -                    tcg_gen_movi_i32(oi, make_memop_idx(MO_LE | MO_128,
> -                                                        ctx->mem_idx));
> +                    oi = tcg_constant_i32(make_memop_idx(MO_LE | MO_128,
> +                                                         ctx->mem_idx));
>                      gen_helper_stq_le_parallel(cpu_env, EA, lo, hi, oi);
>                  } else {
> -                    tcg_gen_movi_i32(oi, make_memop_idx(MO_BE | MO_128,
> -                                                        ctx->mem_idx));
> +                    oi = tcg_constant_i32(make_memop_idx(MO_BE | MO_128,
> +                                                         ctx->mem_idx));
>                      gen_helper_stq_be_parallel(cpu_env, EA, lo, hi, oi);
>                  }
> -                tcg_temp_free_i32(oi);
>              } else {
>                  /* Restart with exclusive lock.  */
>                  gen_helper_exit_atomic(cpu_env);
> @@ -4065,17 +4063,16 @@ static void gen_lqarx(DisasContext *ctx)
>  
>      if (tb_cflags(ctx->base.tb) & CF_PARALLEL) {
>          if (HAVE_ATOMIC128) {
> -            TCGv_i32 oi = tcg_temp_new_i32();
> +            TCGv_i32 oi;
>              if (ctx->le_mode) {
> -                tcg_gen_movi_i32(oi, make_memop_idx(MO_LE | MO_128 | MO_ALIGN,
> -                                                    ctx->mem_idx));
> +                oi = tcg_constant_i32(make_memop_idx(MO_LE | MO_128 | MO_ALIGN,
> +                                                     ctx->mem_idx));
>                  gen_helper_lq_le_parallel(lo, cpu_env, EA, oi);
>              } else {
> -                tcg_gen_movi_i32(oi, make_memop_idx(MO_BE | MO_128 | MO_ALIGN,
> -                                                    ctx->mem_idx));
> +                oi = tcg_constant_i32(make_memop_idx(MO_BE | MO_128 | MO_ALIGN,
> +                                                     ctx->mem_idx));
>                  gen_helper_lq_be_parallel(lo, cpu_env, EA, oi);
>              }
> -            tcg_temp_free_i32(oi);
>              tcg_gen_ld_i64(hi, cpu_env, offsetof(CPUPPCState, retxh));
>          } else {
>              /* Restart with exclusive lock.  */

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2021-10-25  0:39 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-24 16:16 [PATCH 0/4] target/alpha,arm,ppc: More uses of tcg_constant() Philippe Mathieu-Daudé
2021-10-24 16:16 ` [PATCH 1/4] target/alpha: Use tcg_constant_i64() in gen_call_pal() Philippe Mathieu-Daudé
2021-10-24 21:19   ` Richard Henderson
2021-10-24 16:16 ` [PATCH 2/4] target/arm: Use tcg_constant_i64() in do_sat_addsub_64() Philippe Mathieu-Daudé
2021-10-24 21:24   ` Richard Henderson
2021-10-24 16:16 ` [PATCH 3/4] target/ppc: Use tcg_constant_tl() in gen_op_cmp() Philippe Mathieu-Daudé
2021-10-24 21:25   ` Richard Henderson
2021-10-25  0:21   ` David Gibson
2021-10-24 16:16 ` [PATCH 4/4] target/ppc: Use tcg_constant_i32() in gen_ld/st() Philippe Mathieu-Daudé
2021-10-24 21:27   ` Richard Henderson
2021-10-25  0:21   ` David Gibson

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